diff --git a/.azure-pipelines/azure-pipelines-build.yml b/.azure-pipelines/azure-pipelines-build.yml index 9ef929530d50..941c30ecbea2 100644 --- a/.azure-pipelines/azure-pipelines-build.yml +++ b/.azure-pipelines/azure-pipelines-build.yml @@ -186,3 +186,13 @@ jobs: fi displayName: "Build sonic image" - template: .azure-pipelines/check-dirty-version.yml@buildimage + - task: ManifestGeneratorTask@0 + condition: ne(variables.SKIP_MG, 'y') + timeoutInMinutes: 60 + continueOnError: true + displayName: "Manifest Generator" + inputs: + BuildDropPath: '$(System.DefaultWorkingDirectory)/target/' + ManifestDirPath: 'target/' + BuildComponentPath: $(System.DefaultWorkingDirectory)/src/ + diff --git a/.azure-pipelines/azure-pipelines-image-template.yml b/.azure-pipelines/azure-pipelines-image-template.yml index c2e8b8856f50..fde8b76c4b83 100644 --- a/.azure-pipelines/azure-pipelines-image-template.yml +++ b/.azure-pipelines/azure-pipelines-image-template.yml @@ -42,6 +42,10 @@ jobs: fetchDepth: 0 condition: and(succeeded(), eq(variables.SKIP_CHECKOUT, '')) displayName: 'Checkout code' + - script: | + set -x + sudo setfacl -R -b $(Agent.BuildDirectory) + displayName: 'setfacl' - script: | BRANCH_NAME=$(Build.SourceBranchName) [ -n "$SYSTEM_PULLREQUEST_PULLREQUESTID" ] && BRANCH_NAME="$SYSTEM_PULLREQUEST_TARGETBRANCH-$SYSTEM_PULLREQUEST_PULLREQUESTNUMBER" diff --git a/Makefile b/Makefile index ca2192f66fea..c560b83c7cfd 100644 --- a/Makefile +++ b/Makefile @@ -37,6 +37,9 @@ endif PLATFORM_PATH := platform/$(if $(PLATFORM),$(PLATFORM),$(CONFIGURED_PLATFORM)) PLATFORM_CHECKOUT := platform/checkout PLATFORM_CHECKOUT_FILE := $(PLATFORM_CHECKOUT)/$(PLATFORM).ini +ifeq ($(SMARTSWITCH),1) +PLATFORM_CHECKOUT_FILE := $(PLATFORM_CHECKOUT)/$(PLATFORM)-smartswitch.ini +endif PLATFORM_CHECKOUT_CMD := $(shell if [ -f $(PLATFORM_CHECKOUT_FILE) ]; then PLATFORM_PATH=$(PLATFORM_PATH) j2 $(PLATFORM_CHECKOUT)/template.j2 $(PLATFORM_CHECKOUT_FILE); fi) MAKE_WITH_RETRY := ./scripts/run_with_retry $(MAKE) diff --git a/README.md b/README.md index 9ea16954201a..2488f972df41 100644 --- a/README.md +++ b/README.md @@ -13,6 +13,20 @@ [![VS](https://dev.azure.com/mssonic/build/_apis/build/status/vs/Azure.sonic-buildimage.official.vs?branchName=master&label=VS)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=142&branchName=master) +*202405 builds*: + +[![Broadcom](https://dev.azure.com/mssonic/build/_apis/build/status/broadcom/Azure.sonic-buildimage.official.broadcom?branchName=202405&label=Broadcom)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=138&branchName=202405) +[![Centec](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec?branchName=202405&label=Centec)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=143&branchName=202405) +[![Centec(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec-arm64?branchName=202405&label=Centec-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=140&branchName=202405) +[![Innovium](https://dev.azure.com/mssonic/build/_apis/build/status/innovium/Azure.sonic-buildimage.official.innovium?branchName=202405&label=Innovium)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=148&branchName=202405) +[![Mellanox](https://dev.azure.com/mssonic/build/_apis/build/status/mellanox/Azure.sonic-buildimage.official.mellanox?branchName=202405&label=Mellanox)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=139&branchName=202405) +[![Marvell(armhf)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-armhf?branchName=202405&label=Marvell-armhf)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=141&branchName=202405) +[![Marvell(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-arm64?branchName=202405&label=Marvell-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=999&branchName=202405) +[![Nephos](https://dev.azure.com/mssonic/build/_apis/build/status/nephos/Azure.sonic-buildimage.official.nephos?branchName=202405&label=Nephos)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=149&branchName=202405) +[![Nvidia-Bluefield](https://dev.azure.com/mssonic/build/_apis/build/status/nvidia/Azure.sonic-buildimage.official.nvidia-bluefield?branchName=202405&label=Nvidia-Bluefield)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=1665&branchName=202405) +[![Pensando](https://dev.azure.com/mssonic/build/_apis/build/status/pensando/Azure.sonic-buildimage.official.pensando?branchName=202405&label=Pensando)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=1366&branchName=202405) +[![VS](https://dev.azure.com/mssonic/build/_apis/build/status/vs/Azure.sonic-buildimage.official.vs?branchName=202405&label=VS)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=142&branchName=202405) + *202311 builds*: [![Broadcom](https://dev.azure.com/mssonic/build/_apis/build/status/broadcom/Azure.sonic-buildimage.official.broadcom?branchName=202311&label=Broadcom)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=138&branchName=202311) diff --git a/build_debian.sh b/build_debian.sh index 3763e5e25336..8c767d619196 100755 --- a/build_debian.sh +++ b/build_debian.sh @@ -33,7 +33,7 @@ CONFIGURED_ARCH=$([ -f .arch ] && cat .arch || echo amd64) ## docker engine version (with platform) DOCKER_VERSION=5:24.0.2-1~debian.12~$IMAGE_DISTRO CONTAINERD_IO_VERSION=1.6.21-1 -LINUX_KERNEL_VERSION=6.1.0-11-2 +LINUX_KERNEL_VERSION=6.1.0-22-2 ## Working directory to prepare the file system FILESYSTEM_ROOT=./fsroot diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/hwsku.json b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/hwsku.json new file mode 100644 index 000000000000..ad8ffe6d8a95 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/hwsku.json @@ -0,0 +1,104 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet8": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet16": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet24": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet32": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet40": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet48": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet56": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet64": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet72": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet80": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet88": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet96": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet104": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet112": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet120": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet128": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet136": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet144": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet152": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet160": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet168": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet176": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet184": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet192": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet200": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet208": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet216": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet224": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet232": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet240": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet248": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet256": { + "default_brkout_mode": "1x10G", + "fec": "none" + } + } +} diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/media_settings.json b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/media_settings.json new file mode 100644 index 000000000000..080607fa20b5 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/media_settings.json @@ -0,0 +1,2397 @@ +{ + "PORT_MEDIA_SETTINGS": { + "1": { + "Default": { + "main": { + "lane0": "0x71", + "lane1": "0x71", + "lane2": "0x71", + "lane3": "0x71", + "lane4": "0x71", + "lane5": "0x71", + "lane6": "0x71", + "lane7": "0x71" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "2": { + "Default": { + "main": { + "lane0": "0x71", + "lane1": "0x71", + "lane2": "0x71", + "lane3": "0x71", + "lane4": "0x71", + "lane5": "0x71", + "lane6": "0x71", + "lane7": "0x71" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "3": { + "Default": { + "main": { + "lane0": "0x71", + "lane1": "0x71", + "lane2": "0x71", + "lane3": "0x71", + "lane4": "0x71", + "lane5": "0x71", + "lane6": "0x71", + "lane7": "0x71" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "4": { + "Default": { + "main": { + "lane0": "0x71", + "lane1": "0x71", + "lane2": "0x71", + "lane3": "0x71", + "lane4": "0x71", + "lane5": "0x71", + "lane6": "0x71", + "lane7": "0x71" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "5": { + "Default": { + "main": { + "lane0": "0x71", + "lane1": "0x71", + "lane2": "0x71", + "lane3": "0x71", + "lane4": "0x71", + "lane5": "0x71", + "lane6": "0x71", + "lane7": "0x71" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": 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"pre2": { + "lane0": "0x3", + "lane1": "0x2", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x2", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "29": { + "Default": { + "main": { + "lane0": "0x82", + "lane1": "0x82", + "lane2": "0x82", + "lane3": "0x82", + "lane4": "0x82", + "lane5": "0x82", + "lane6": "0x82", + "lane7": "0x82" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xfffffff2", + "lane5": "0xffffffed", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffb", + "lane5": "0xfffffffd", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff1", + "lane5": "0xfffffff2", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x3", + "lane5": "0x1", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "30": { + "Default": { + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xffffffee", + "lane1": "0xffffffee", + "lane2": "0xffffffee", + "lane3": "0xffffffee", + "lane4": "0xffffffee", + "lane5": "0xffffffee", + "lane6": "0xffffffee", + "lane7": "0xffffffee" + }, + "post2": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2", + "lane4": "0x2", + "lane5": "0x2", + "lane6": "0x2", + "lane7": "0x2" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "31": { + "Default": { + "main": { + "lane0": "0x85", + "lane1": "0x85", + "lane2": "0x85", + "lane3": "0x82", + "lane4": "0x85", + "lane5": "0x85", + "lane6": "0x85", + "lane7": "0x85" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xffffffee", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffc", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff1", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff3", + "lane4": "0xfffffff1", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2", + "lane4": "0x2", + "lane5": "0x2", + "lane6": "0x2", + "lane7": "0x2" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "32": { + "Default": { + "main": { + "lane0": "0x82", + "lane1": "0x7e", + "lane2": "0x7e", + "lane3": "0x7e", + "lane4": "0x82", + "lane5": "0x7e", + "lane6": "0x82", + "lane7": "0x82" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xffffffef", + "lane2": "0xffffffef", + "lane3": "0xffffffef", + "lane4": "0xfffffff4", + "lane5": "0xffffffef", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffa", + "lane5": "0xfffffffc", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xffffffef", + "lane2": "0xffffffef", + "lane3": "0xffffffef", + "lane4": "0xfffffff0", + "lane5": "0xffffffef", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "33": { + "Default": { + "main": { + "lane0": "0x22" + }, + "post1": { + "lane0": "0x9" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + }, + "pre1": { + "lane0": "0x1" + }, + "pre2": { + "lane0": "0x0" + }, + "pre3": { + "lane0": "0x0" + } + } + } + } +} \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/sai.profile b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/sai.profile new file mode 100644 index 000000000000..20bd05292042 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th4-a7060dx5-32-100Gx48-400Gx8.config.bcm diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/th4-a7060dx5-32-100Gx48-400Gx8.config.bcm b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/th4-a7060dx5-32-100Gx48-400Gx8.config.bcm new file mode 100644 index 000000000000..19a537063da4 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/th4-a7060dx5-32-100Gx48-400Gx8.config.bcm @@ -0,0 +1,789 @@ +# configuration yaml file +# device: +# : +# : +# ? +# : +# : +# ... +# : +# : +# : +# : +# ... +# : +# + +--- +bcm_device: + 0: + global: + pktio_mode: 1 + default_cpu_tx_queue: 7 + vlan_flooding_l2mc_num_reserved: 0 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + # LTSW uses value 1 for ALPM combined mode + l3_alpm_template: 1 + l3_alpm_hit_skip: 1 + sai_feat_tail_timestamp : 1 + sai_field_group_auto_prioritize: 1 + #l3_intf_vlan_split_egress for MTU at L3IF + l3_intf_vlan_split_egress : 1 + + # vxlan + l3_alpm_template: 1 + riot_overlay_l3_egress_mem_size: 16384 + riot_overlay_l3_intf_mem_size: 4096 + l3_ecmp_member_first_lkup_mem_size: 12288 + bcm_tunnel_term_compatible_mode: 1 + shared_l2_tunnel: 1 + sai_tunnel_support: 10 + sai_tunnel_underlay_route_mode: 2 + sai_tunnel_ecmp_sharing_mode: 0 # change to 2 if SAI_NEXT_HOP_GROUP_ATTR_LEVEL_1 used + + # bfd + #bfd_enable: 1 + #bfd_sha1_keys: 5 + #bfd_num_sessions: 2048 + #bfd_simple_password_keys: 5 + #num_queues_pci: 47 + #num_queues_uc0: 1 + #bfd_feature_enable: 1 + #bfd_use_endpoint_id_as_discriminator: 1 + #bfd_tx_raw_ingress_enable: 1 + #sai_eapp_config_file: "/usr/share/sonic/device/x86_64-broadcom_common/eapps/eapp_config.json" +--- +device: + 0: + PC_SERDES_CONFIG: + PKG_SWAP_BYPASS: 1 + + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67235401 + TX_LANE_MAP: 0x2731465 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x31752064 + TX_LANE_MAP: 0x76025314 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67241503 + TX_LANE_MAP: 0x13650274 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x01 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x46025713 + TX_LANE_MAP: 0x31650274 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62713054 + TX_LANE_MAP: 0x21703465 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0xd8 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13460257 + TX_LANE_MAP: 0x64137502 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43512670 + TX_LANE_MAP: 0x2571364 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x14270356 + TX_LANE_MAP: 0x64237501 + RX_POLARITY_FLIP: 0xfb + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76140235 + TX_LANE_MAP: 0x74036521 + RX_POLARITY_FLIP: 0xc1 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47125603 + TX_LANE_MAP: 0x30451276 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76041235 + TX_LANE_MAP: 0x74036512 + RX_POLARITY_FLIP: 0x40 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x27145603 + TX_LANE_MAP: 0x21450376 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x2735146 + TX_LANE_MAP: 0x3657421 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0xc8 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47306521 + TX_LANE_MAP: 0x12643075 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x20157436 + TX_LANE_MAP: 0x56237104 + RX_POLARITY_FLIP: 0x08 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x14270356 + TX_LANE_MAP: 0x76325014 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56704312 + TX_LANE_MAP: 0x32641570 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21564073 + TX_LANE_MAP: 0x50314762 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36715402 + TX_LANE_MAP: 0x32641075 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x51462073 + TX_LANE_MAP: 0x5127634 + RX_POLARITY_FLIP: 0x69 + TX_POLARITY_FLIP: 0x08 + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73204651 + TX_LANE_MAP: 0x32640175 + RX_POLARITY_FLIP: 0x69 + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x5134627 + TX_LANE_MAP: 0x60137254 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57420163 + TX_LANE_MAP: 0x32651074 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x5134627 + TX_LANE_MAP: 0x10524376 + RX_POLARITY_FLIP: 0x05 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73520146 + TX_LANE_MAP: 0x31650274 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x16072354 + TX_LANE_MAP: 0x51634270 + RX_POLARITY_FLIP: 0x01 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72530164 + TX_LANE_MAP: 0x32506147 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x4371256 + TX_LANE_MAP: 0x21673054 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0xcc + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67241503 + TX_LANE_MAP: 0x12730465 + RX_POLARITY_FLIP: 0x20 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73625140 + TX_LANE_MAP: 0x12640573 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23674015 + TX_LANE_MAP: 0x57206143 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57314260 + TX_LANE_MAP: 0x1735264 + RX_POLARITY_FLIP: 0x10 + TX_POLARITY_FLIP: 0x00 +... +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 3 + ? + PORT_ID: 5 + : + PC_PHYS_PORT_ID: 5 + ? + PORT_ID: 6 + : + PC_PHYS_PORT_ID: 7 + ? + PORT_ID: 9 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 10 + : + PC_PHYS_PORT_ID: 11 + ? + PORT_ID: 13 + : + PC_PHYS_PORT_ID: 13 + ? + PORT_ID: 14 + : + PC_PHYS_PORT_ID: 15 + ? + PORT_ID: 17 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 18 + : + PC_PHYS_PORT_ID: 19 + ? + PORT_ID: 21 + : + PC_PHYS_PORT_ID: 21 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 23 + ? + PORT_ID: 25 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 26 + : + PC_PHYS_PORT_ID: 27 + ? + PORT_ID: 29 + : + PC_PHYS_PORT_ID: 29 + ? + PORT_ID: 30 + : + PC_PHYS_PORT_ID: 31 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 259 + ? + PORT_ID: 34 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 35 + : + PC_PHYS_PORT_ID: 35 + ? + PORT_ID: 38 + : + PC_PHYS_PORT_ID: 37 + ? + PORT_ID: 39 + : + PC_PHYS_PORT_ID: 39 + ? + PORT_ID: 42 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 43 + : + PC_PHYS_PORT_ID: 43 + ? + PORT_ID: 46 + : + PC_PHYS_PORT_ID: 45 + ? + PORT_ID: 47 + : + PC_PHYS_PORT_ID: 47 + ? + PORT_ID: 50 + : + PC_PHYS_PORT_ID: 258 + ? + PORT_ID: 51 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 52 + : + PC_PHYS_PORT_ID: 51 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 53 + ? + PORT_ID: 56 + : + PC_PHYS_PORT_ID: 55 + ? + PORT_ID: 59 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 60 + : + PC_PHYS_PORT_ID: 59 + ? + PORT_ID: 63 + : + PC_PHYS_PORT_ID: 61 + ? + PORT_ID: 64 + : + PC_PHYS_PORT_ID: 63 + ? + PORT_ID: 67 + : + PC_PHYS_PORT_ID: 260 + ? + PORT_ID: 204 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 205 + : + PC_PHYS_PORT_ID: 195 + ? + PORT_ID: 208 + : + PC_PHYS_PORT_ID: 197 + ? + PORT_ID: 209 + : + PC_PHYS_PORT_ID: 199 + ? + PORT_ID: 212 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 213 + : + PC_PHYS_PORT_ID: 203 + ? + PORT_ID: 216 + : + PC_PHYS_PORT_ID: 205 + ? + PORT_ID: 217 + : + PC_PHYS_PORT_ID: 207 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 222 + : + PC_PHYS_PORT_ID: 211 + ? + PORT_ID: 225 + : + PC_PHYS_PORT_ID: 213 + ? + PORT_ID: 226 + : + PC_PHYS_PORT_ID: 215 + ? + PORT_ID: 229 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 230 + : + PC_PHYS_PORT_ID: 219 + ? + PORT_ID: 233 + : + PC_PHYS_PORT_ID: 221 + ? + PORT_ID: 234 + : + PC_PHYS_PORT_ID: 223 + ? + PORT_ID: 237 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 238 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 229 + ? + PORT_ID: 246 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 250 + : + PC_PHYS_PORT_ID: 237 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 259 + : + PC_PHYS_PORT_ID: 245 + ? + PORT_ID: 263 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 267 + : + PC_PHYS_PORT_ID: 253 + ? + PORT_ID: 271 + : + PC_PHYS_PORT_ID: 266 + + +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: 0 + : + &port_mode_10g + ENABLE: 1 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [[50, 50]] + : + ENABLE: 0 + MAX_FRAME_SIZE: 9416 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [[1, 2], + [5, 6], + [9, 10], + [13, 14], + [17, 18], + [21, 22], + [25, 26], + [29, 30], + [34, 35], + [38, 39], + [42, 43], + [46, 47], + [51, 52], + [55, 56], + [59, 60], + [63, 64], + [204, 205], + [208, 209], + [212, 213], + [216, 217], + [221, 222], + [225, 226], + [229, 230], + [233, 234]] + : + ENABLE: 0 + SPEED: 100000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS528 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: [[238], + [242], + [246], + [250], + [255], + [259], + [263], + [267]] + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0 + + # Per pipe flex state configuration + #FLEX_STATE_CONFIG: + # FLEX_STATE_ING_OPERMODE_PIPEUNIQUE: 0 + # FLEX_STATE_EGR_OPERMODE_PIPEUNIQUE: 1 + + # Lossy vs Lossless mode + TM_THD_CONFIG: + THRESHOLD_MODE: LOSSLESS + + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/media_settings.json b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/media_settings.json new file mode 100644 index 000000000000..40dee23001f3 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/media_settings.json @@ -0,0 +1,2397 @@ +{ + "PORT_MEDIA_SETTINGS": { + "1": { + "Default": { + "main": { + "lane0": "0x82", + "lane1": "0x82", + "lane2": "0x82", + "lane3": "0x82", + "lane4": "0x82", + "lane5": "0x82", + "lane6": "0x82", + "lane7": "0x82" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "pre2": { + "lane0": "0x8", + "lane1": "0x8", + "lane2": "0x8", + "lane3": "0x8", + "lane4": "0x8", + "lane5": "0x8", + "lane6": "0x8", + "lane7": "0x8" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "2": { + "Default": { + "main": { + "lane0": "0x82", + "lane1": "0x82", + "lane2": "0x82", + "lane3": "0x82", + "lane4": "0x82", + "lane5": "0x82", + "lane6": "0x82", + "lane7": "0x82" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "pre2": { + "lane0": "0x8", + "lane1": "0x8", + "lane2": "0x8", + "lane3": "0x8", + "lane4": "0x8", + "lane5": "0x8", + "lane6": "0x8", + "lane7": "0x8" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "3": { + "Default": { + "main": { + "lane0": "0x82", + "lane1": "0x82", + "lane2": "0x82", + "lane3": "0x82", + "lane4": "0x82", + "lane5": "0x82", + "lane6": "0x82", + "lane7": "0x82" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "pre2": { + "lane0": "0x8", + "lane1": "0x8", + "lane2": "0x8", + "lane3": "0x8", + "lane4": "0x8", + "lane5": "0x8", + "lane6": "0x8", + "lane7": "0x8" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "4": { + "Default": { + "main": { + "lane0": "0x82", + "lane1": "0x82", + "lane2": "0x82", + "lane3": "0x82", + "lane4": "0x82", + "lane5": "0x82", + "lane6": "0x82", + "lane7": "0x82" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "pre2": { + "lane0": "0x8", + "lane1": "0x8", + "lane2": "0x8", + "lane3": "0x8", + "lane4": "0x8", + "lane5": "0x8", + "lane6": "0x8", + "lane7": "0x8" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "5": { + "Default": { + "main": { + "lane0": "0x82", + "lane1": "0x82", + "lane2": "0x82", + "lane3": "0x82", + "lane4": "0x82", + "lane5": "0x82", + "lane6": "0x82", + "lane7": "0x82" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": 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+ "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "pre2": { + "lane0": "0x8", + "lane1": "0x8", + "lane2": "0x8", + "lane3": "0x8", + "lane4": "0x8", + "lane5": "0x8", + "lane6": "0x8", + "lane7": "0x8" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "33": { + "Default": { + "main": { + "lane0": "0x22" + }, + "post1": { + "lane0": "0x9" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + }, + "pre1": { + "lane0": "0x1" + }, + "pre2": { + "lane0": "0x0" + }, + "pre3": { + "lane0": "0x0" + } + } + } + } +} \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/port_config.ini b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/port_config.ini index 8a509463df4c..eff97ad3254a 100644 --- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/port_config.ini +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/port_config.ini @@ -1,114 +1,114 @@ -#name lanes alias index speed fec -Ethernet0 1 Ethernet1/1 1 25000 -Ethernet1 5 Ethernet1/2 1 25000 -Ethernet2 3 Ethernet1/3 1 25000 -Ethernet3 7 Ethernet1/4 1 25000 -Ethernet8 9 Ethernet2/1 2 25000 -Ethernet9 13 Ethernet2/2 2 25000 -Ethernet10 11 Ethernet2/3 2 25000 -Ethernet11 15 Ethernet2/4 2 25000 -Ethernet16 17 Ethernet3/1 3 25000 -Ethernet17 21 Ethernet3/2 3 25000 -Ethernet18 19 Ethernet3/3 3 25000 -Ethernet19 23 Ethernet3/4 3 25000 -Ethernet24 25 Ethernet4/1 4 25000 -Ethernet25 29 Ethernet4/2 4 25000 -Ethernet26 27 Ethernet4/3 4 25000 -Ethernet27 31 Ethernet4/4 4 25000 -Ethernet32 33 Ethernet5/1 5 25000 -Ethernet33 37 Ethernet5/2 5 25000 -Ethernet34 35 Ethernet5/3 5 25000 -Ethernet35 39 Ethernet5/4 5 25000 -Ethernet40 41 Ethernet6/1 6 25000 -Ethernet41 45 Ethernet6/2 6 25000 -Ethernet42 43 Ethernet6/3 6 25000 -Ethernet43 47 Ethernet6/4 6 25000 -Ethernet48 49 Ethernet7/1 7 25000 -Ethernet49 53 Ethernet7/2 7 25000 -Ethernet50 51 Ethernet7/3 7 25000 -Ethernet51 55 Ethernet7/4 7 25000 -Ethernet56 57 Ethernet8/1 8 25000 -Ethernet57 61 Ethernet8/2 8 25000 -Ethernet58 59 Ethernet8/3 8 25000 -Ethernet59 63 Ethernet8/4 8 25000 -Ethernet64 65 Ethernet9/1 9 25000 -Ethernet65 69 Ethernet9/2 9 25000 -Ethernet66 67 Ethernet9/3 9 25000 -Ethernet67 71 Ethernet9/4 9 25000 -Ethernet72 73 Ethernet10/1 10 25000 -Ethernet73 77 Ethernet10/2 10 25000 -Ethernet74 75 Ethernet10/3 10 25000 -Ethernet75 79 Ethernet10/4 10 25000 -Ethernet80 81 Ethernet11/1 11 25000 -Ethernet81 85 Ethernet11/2 11 25000 -Ethernet82 83 Ethernet11/3 11 25000 -Ethernet83 87 Ethernet11/4 11 25000 -Ethernet88 89 Ethernet12/1 12 25000 -Ethernet89 93 Ethernet12/2 12 25000 -Ethernet90 91 Ethernet12/3 12 25000 -Ethernet91 95 Ethernet12/4 12 25000 -Ethernet96 97 Ethernet13/1 13 25000 -Ethernet97 101 Ethernet13/2 13 25000 -Ethernet98 99 Ethernet13/3 13 25000 -Ethernet99 103 Ethernet13/4 13 25000 -Ethernet104 105 Ethernet14/1 14 25000 -Ethernet105 109 Ethernet14/2 14 25000 -Ethernet106 107 Ethernet14/3 14 25000 -Ethernet107 111 Ethernet14/4 14 25000 -Ethernet112 113 Ethernet15/1 15 25000 -Ethernet113 117 Ethernet15/2 15 25000 -Ethernet114 115 Ethernet15/3 15 25000 -Ethernet115 119 Ethernet15/4 15 25000 -Ethernet120 121 Ethernet16/1 16 25000 -Ethernet121 125 Ethernet16/2 16 25000 -Ethernet122 123 Ethernet16/3 16 25000 -Ethernet123 127 Ethernet16/4 16 25000 -Ethernet128 385 Ethernet17/1 17 25000 -Ethernet129 389 Ethernet17/2 17 25000 -Ethernet130 387 Ethernet17/3 17 25000 -Ethernet131 391 Ethernet17/4 17 25000 -Ethernet136 393 Ethernet18/1 18 25000 -Ethernet137 397 Ethernet18/2 18 25000 -Ethernet138 395 Ethernet18/3 18 25000 -Ethernet139 399 Ethernet18/4 18 25000 -Ethernet144 401 Ethernet19/1 19 25000 -Ethernet145 405 Ethernet19/2 19 25000 -Ethernet146 403 Ethernet19/3 19 25000 -Ethernet147 407 Ethernet19/4 19 25000 -Ethernet152 409 Ethernet20/1 20 25000 -Ethernet153 413 Ethernet20/2 20 25000 -Ethernet154 411 Ethernet20/3 20 25000 -Ethernet155 415 Ethernet20/4 20 25000 -Ethernet160 417 Ethernet21/1 21 25000 -Ethernet161 421 Ethernet21/2 21 25000 -Ethernet162 419 Ethernet21/3 21 25000 -Ethernet163 423 Ethernet21/4 21 25000 -Ethernet168 425 Ethernet22/1 22 25000 -Ethernet169 429 Ethernet22/2 22 25000 -Ethernet170 427 Ethernet22/3 22 25000 -Ethernet171 431 Ethernet22/4 22 25000 -Ethernet176 433 Ethernet23/1 23 25000 -Ethernet177 437 Ethernet23/2 23 25000 -Ethernet178 435 Ethernet23/3 23 25000 -Ethernet179 439 Ethernet23/4 23 25000 -Ethernet184 441 Ethernet24/1 24 25000 -Ethernet185 445 Ethernet24/2 24 25000 -Ethernet186 443 Ethernet24/3 24 25000 -Ethernet187 447 Ethernet24/4 24 25000 -Ethernet192 449,450,451,452 Ethernet25/1 25 100000 rs -Ethernet196 453,454,455,456 Ethernet25/5 25 100000 rs -Ethernet200 457,458,459,460 Ethernet26/1 26 100000 rs -Ethernet204 461,462,463,464 Ethernet26/5 26 100000 rs -Ethernet208 465,466,467,468 Ethernet27/1 27 100000 rs -Ethernet212 469,470,471,472 Ethernet27/5 27 100000 rs -Ethernet216 473,474,475,476 Ethernet28/1 28 100000 rs -Ethernet220 477,478,479,480 Ethernet28/5 28 100000 rs -Ethernet224 481,482,483,484 Ethernet29/1 29 200000 rs -Ethernet228 485,486,487,488 Ethernet29/5 29 200000 rs -Ethernet232 489,490,491,492 Ethernet30/1 30 200000 rs -Ethernet236 493,494,495,496 Ethernet30/5 30 200000 rs -Ethernet240 497,498,499,500 Ethernet31/1 31 200000 rs -Ethernet244 501,502,503,504 Ethernet31/5 31 200000 rs -Ethernet248 505,506,507,508 Ethernet32/1 32 200000 rs -Ethernet252 509,510,511,512 Ethernet32/5 32 200000 rs -Ethernet256 513 Ethernet33 33 10000 none +#name lanes alias index speed fec subport +Ethernet0 1 Ethernet1/1 1 25000 none 1 +Ethernet1 5 Ethernet1/2 1 25000 none 2 +Ethernet2 3 Ethernet1/3 1 25000 none 3 +Ethernet3 7 Ethernet1/4 1 25000 none 4 +Ethernet8 9 Ethernet2/1 2 25000 none 1 +Ethernet9 13 Ethernet2/2 2 25000 none 2 +Ethernet10 11 Ethernet2/3 2 25000 none 3 +Ethernet11 15 Ethernet2/4 2 25000 none 4 +Ethernet16 17 Ethernet3/1 3 25000 none 1 +Ethernet17 21 Ethernet3/2 3 25000 none 2 +Ethernet18 19 Ethernet3/3 3 25000 none 3 +Ethernet19 23 Ethernet3/4 3 25000 none 4 +Ethernet24 25 Ethernet4/1 4 25000 none 1 +Ethernet25 29 Ethernet4/2 4 25000 none 2 +Ethernet26 27 Ethernet4/3 4 25000 none 3 +Ethernet27 31 Ethernet4/4 4 25000 none 4 +Ethernet32 33 Ethernet5/1 5 25000 none 1 +Ethernet33 37 Ethernet5/2 5 25000 none 2 +Ethernet34 35 Ethernet5/3 5 25000 none 3 +Ethernet35 39 Ethernet5/4 5 25000 none 4 +Ethernet40 41 Ethernet6/1 6 25000 none 1 +Ethernet41 45 Ethernet6/2 6 25000 none 2 +Ethernet42 43 Ethernet6/3 6 25000 none 3 +Ethernet43 47 Ethernet6/4 6 25000 none 4 +Ethernet48 49 Ethernet7/1 7 25000 none 1 +Ethernet49 53 Ethernet7/2 7 25000 none 2 +Ethernet50 51 Ethernet7/3 7 25000 none 3 +Ethernet51 55 Ethernet7/4 7 25000 none 4 +Ethernet56 57 Ethernet8/1 8 25000 none 1 +Ethernet57 61 Ethernet8/2 8 25000 none 2 +Ethernet58 59 Ethernet8/3 8 25000 none 3 +Ethernet59 63 Ethernet8/4 8 25000 none 4 +Ethernet64 65 Ethernet9/1 9 25000 none 1 +Ethernet65 69 Ethernet9/2 9 25000 none 2 +Ethernet66 67 Ethernet9/3 9 25000 none 3 +Ethernet67 71 Ethernet9/4 9 25000 none 4 +Ethernet72 73 Ethernet10/1 10 25000 none 1 +Ethernet73 77 Ethernet10/2 10 25000 none 2 +Ethernet74 75 Ethernet10/3 10 25000 none 3 +Ethernet75 79 Ethernet10/4 10 25000 none 4 +Ethernet80 81 Ethernet11/1 11 25000 none 1 +Ethernet81 85 Ethernet11/2 11 25000 none 2 +Ethernet82 83 Ethernet11/3 11 25000 none 3 +Ethernet83 87 Ethernet11/4 11 25000 none 4 +Ethernet88 89 Ethernet12/1 12 25000 none 1 +Ethernet89 93 Ethernet12/2 12 25000 none 2 +Ethernet90 91 Ethernet12/3 12 25000 none 3 +Ethernet91 95 Ethernet12/4 12 25000 none 4 +Ethernet96 97 Ethernet13/1 13 25000 none 1 +Ethernet97 101 Ethernet13/2 13 25000 none 2 +Ethernet98 99 Ethernet13/3 13 25000 none 3 +Ethernet99 103 Ethernet13/4 13 25000 none 4 +Ethernet104 105 Ethernet14/1 14 25000 none 1 +Ethernet105 109 Ethernet14/2 14 25000 none 2 +Ethernet106 107 Ethernet14/3 14 25000 none 3 +Ethernet107 111 Ethernet14/4 14 25000 none 4 +Ethernet112 113 Ethernet15/1 15 25000 none 1 +Ethernet113 117 Ethernet15/2 15 25000 none 2 +Ethernet114 115 Ethernet15/3 15 25000 none 3 +Ethernet115 119 Ethernet15/4 15 25000 none 4 +Ethernet120 121 Ethernet16/1 16 25000 none 1 +Ethernet121 125 Ethernet16/2 16 25000 none 2 +Ethernet122 123 Ethernet16/3 16 25000 none 3 +Ethernet123 127 Ethernet16/4 16 25000 none 4 +Ethernet128 385 Ethernet17/1 17 25000 none 1 +Ethernet129 389 Ethernet17/2 17 25000 none 2 +Ethernet130 387 Ethernet17/3 17 25000 none 3 +Ethernet131 391 Ethernet17/4 17 25000 none 4 +Ethernet136 393 Ethernet18/1 18 25000 none 1 +Ethernet137 397 Ethernet18/2 18 25000 none 2 +Ethernet138 395 Ethernet18/3 18 25000 none 3 +Ethernet139 399 Ethernet18/4 18 25000 none 4 +Ethernet144 401 Ethernet19/1 19 25000 none 1 +Ethernet145 405 Ethernet19/2 19 25000 none 2 +Ethernet146 403 Ethernet19/3 19 25000 none 3 +Ethernet147 407 Ethernet19/4 19 25000 none 4 +Ethernet152 409 Ethernet20/1 20 25000 none 1 +Ethernet153 413 Ethernet20/2 20 25000 none 2 +Ethernet154 411 Ethernet20/3 20 25000 none 3 +Ethernet155 415 Ethernet20/4 20 25000 none 4 +Ethernet160 417 Ethernet21/1 21 25000 none 1 +Ethernet161 421 Ethernet21/2 21 25000 none 2 +Ethernet162 419 Ethernet21/3 21 25000 none 3 +Ethernet163 423 Ethernet21/4 21 25000 none 4 +Ethernet168 425 Ethernet22/1 22 25000 none 1 +Ethernet169 429 Ethernet22/2 22 25000 none 2 +Ethernet170 427 Ethernet22/3 22 25000 none 3 +Ethernet171 431 Ethernet22/4 22 25000 none 4 +Ethernet176 433 Ethernet23/1 23 25000 none 1 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"0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "pre2": { + "lane0": "0x8", + "lane1": "0x8", + "lane2": "0x8", + "lane3": "0x8", + "lane4": "0x8", + "lane5": "0x8", + "lane6": "0x8", + "lane7": "0x8" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "33": { + "Default": { + "main": { + "lane0": "0x22" + }, + "post1": { + "lane0": "0x9" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + }, + "pre1": { + "lane0": "0x1" + }, + "pre2": { + "lane0": "0x0" + }, + "pre3": { + "lane0": "0x0" + } + } + } + } +} \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm index bcd5bb3e5833..79ebb0dfe5df 100644 --- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm @@ -1926,95 +1926,3 @@ device: DEVICE_CONFIG: AUTOLOAD_BOARD_SETTINGS: 0 ... -## Baseline ---- -device: - 0: - TM_THD_CONFIG: - SKIP_BUFFER_RESERVATION: 1 - THRESHOLD_MODE: LOSSY_AND_LOSSLESS -... ---- -device: - 0: - TM_ING_THD_HEADROOM_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_HEADROOM_POOL_ID: [[0,3]] - : - LIMIT_CELLS: 0 - - TM_ING_THD_SERVICE_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_ING_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_OFFSET_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - - TM_EGR_THD_SERVICE_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_EGR_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_LIMIT_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - YELLOW_SHARED_LIMIT_CELLS: 0 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 - RED_SHARED_LIMIT_CELLS: 0 - RED_SHARED_RESUME_LIMIT_CELLS: 0 - - TM_THD_MC_EGR_SERVICE_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_EGR_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_LIMIT_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - YELLOW_SHARED_LIMIT_CELLS: 0 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 - RED_SHARED_LIMIT_CELLS: 0 - RED_SHARED_RESUME_LIMIT_CELLS: 0 - - TM_ING_PORT_PRI_GRP: - ? - PORT_ID: [[1, 8], - [11, 18], - [22, 29], - [33, 40], - [44, 51], - [55, 62], - [66, 73], - [77, 84], - [88, 95], - [99, 106], - [110, 117], - [121, 128], - [132, 139], - [143, 150], - [154, 161], - [165, 172], - [176, 183], - [187, 194], - [198, 205], - [209, 216], - [220, 227], - [231, 238], - [242, 249], - [253, 260], - [264, 271], - [275, 282], - [286, 293], - [297, 304], - [308, 315], - [319, 326], - [330, 337], - [341, 348]] - TM_PRI_GRP_ID: 3 - : - PFC: 1 - LOSSLESS: 1 -... diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/BALANCED b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/BALANCED new file mode 120000 index 000000000000..afd21766cc64 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/BALANCED @@ -0,0 +1 @@ +../../../common/profiles/th5/gen/BALANCED \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffer_ports.j2 new file mode 100644 index 000000000000..725347049cf1 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffer_ports.j2 @@ -0,0 +1,6 @@ +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 512, 4) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers.json.j2 new file mode 100644 index 000000000000..0b1cb2c541b6 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers_defaults_t0.j2 new file mode 120000 index 000000000000..9524e6a476ac --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +BALANCED/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers_defaults_t1.j2 new file mode 120000 index 000000000000..c25cc95d6d57 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers_defaults_t1.j2 @@ -0,0 +1 @@ +BALANCED/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/hwsku.json b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/hwsku.json new file mode 100644 index 000000000000..b40939ff01fd --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/hwsku.json @@ -0,0 +1,202 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "2x400G" + }, + "Ethernet8": { + "default_brkout_mode": "2x400G" + }, + "Ethernet16": { + "default_brkout_mode": "2x400G" + }, + "Ethernet24": { + "default_brkout_mode": "2x400G" + }, + "Ethernet32": { + "default_brkout_mode": "2x400G" + }, + "Ethernet40": { + "default_brkout_mode": "2x400G" + }, + "Ethernet48": { + "default_brkout_mode": "2x400G" + }, + "Ethernet56": { + "default_brkout_mode": "2x400G" + }, + "Ethernet64": { + "default_brkout_mode": "2x400G" + }, + "Ethernet72": { + "default_brkout_mode": "2x400G" + }, + "Ethernet80": { + "default_brkout_mode": "2x400G" + }, + "Ethernet88": { + "default_brkout_mode": "2x400G" + }, + "Ethernet96": { + "default_brkout_mode": "2x400G" + }, + "Ethernet104": { + "default_brkout_mode": "2x400G" + }, + "Ethernet112": { + "default_brkout_mode": "2x400G" + }, + "Ethernet120": { + "default_brkout_mode": "2x400G" + }, + "Ethernet128": { + "default_brkout_mode": "2x400G" + }, + "Ethernet136": { + "default_brkout_mode": "2x400G" + }, + "Ethernet144": { + "default_brkout_mode": "2x400G" + }, + "Ethernet152": { + "default_brkout_mode": "2x400G" + }, + "Ethernet160": { + "default_brkout_mode": "2x400G" + }, + "Ethernet168": { + "default_brkout_mode": "2x400G" + }, + "Ethernet176": { + "default_brkout_mode": "2x400G" + }, + "Ethernet184": { + "default_brkout_mode": "2x400G" + }, + "Ethernet192": { + "default_brkout_mode": "2x400G" + }, + "Ethernet200": { + "default_brkout_mode": "2x400G" + }, + "Ethernet208": { + "default_brkout_mode": "2x400G" + }, + "Ethernet216": { + "default_brkout_mode": "2x400G" + }, + "Ethernet224": { + "default_brkout_mode": "2x400G" + }, + "Ethernet232": { + "default_brkout_mode": "2x400G" + }, + "Ethernet240": { + "default_brkout_mode": "2x400G" + }, + "Ethernet248": { + "default_brkout_mode": "2x400G" + }, + "Ethernet256": { + "default_brkout_mode": "2x400G" + }, + "Ethernet264": { + "default_brkout_mode": "2x400G" + }, + "Ethernet272": { + "default_brkout_mode": "2x400G" + }, + "Ethernet280": { + "default_brkout_mode": "2x400G" + }, + "Ethernet288": { + "default_brkout_mode": "2x400G" + }, + "Ethernet296": { + "default_brkout_mode": "2x400G" + }, + "Ethernet304": { + "default_brkout_mode": "2x400G" + }, + "Ethernet312": { + "default_brkout_mode": "2x400G" + }, + "Ethernet320": { + "default_brkout_mode": "2x400G" + }, + "Ethernet328": { + "default_brkout_mode": "2x400G" + }, + "Ethernet336": { + "default_brkout_mode": "2x400G" + }, + "Ethernet344": { + "default_brkout_mode": "2x400G" + }, + "Ethernet352": { + "default_brkout_mode": "2x400G" + }, + "Ethernet360": { + "default_brkout_mode": "2x400G" + }, + "Ethernet368": { + "default_brkout_mode": "2x400G" + }, + "Ethernet376": { + "default_brkout_mode": "2x400G" + }, + "Ethernet384": { + "default_brkout_mode": "2x400G" + }, + "Ethernet392": { + "default_brkout_mode": "2x400G" + }, + "Ethernet400": { + "default_brkout_mode": "2x400G" + }, + "Ethernet408": { + "default_brkout_mode": "2x400G" + }, + "Ethernet416": { + "default_brkout_mode": "2x400G" + }, + "Ethernet424": { + "default_brkout_mode": "2x400G" + }, + "Ethernet432": { + "default_brkout_mode": "2x400G" + }, + "Ethernet440": { + "default_brkout_mode": "2x400G" + }, + "Ethernet448": { + "default_brkout_mode": "2x400G" + }, + "Ethernet456": { + "default_brkout_mode": "2x400G" + }, + "Ethernet464": { + "default_brkout_mode": "2x400G" + }, + "Ethernet472": { + "default_brkout_mode": "2x400G" + }, + "Ethernet480": { + "default_brkout_mode": "2x400G" + }, + "Ethernet488": { + "default_brkout_mode": "2x400G" + }, + "Ethernet496": { + "default_brkout_mode": "2x400G" + }, + "Ethernet504": { + "default_brkout_mode": "2x400G" + }, + "Ethernet512": { + "default_brkout_mode": "1x10G" + }, + "Ethernet513": { + "default_brkout_mode": "1x10G" + } + } +} diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/pg_profile_lookup.ini new file mode 120000 index 000000000000..297cddb2d223 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/pg_profile_lookup.ini @@ -0,0 +1 @@ +BALANCED/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/port_config.ini b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/port_config.ini new file mode 100644 index 000000000000..68f871ff6a17 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/port_config.ini @@ -0,0 +1,131 @@ +# name lanes alias index speed fec +Ethernet0 17,18,19,20 Ethernet1/1 1 400000 rs +Ethernet4 21,22,23,24 Ethernet1/5 1 400000 rs +Ethernet8 1,2,3,4 Ethernet2/1 2 400000 rs +Ethernet12 5,6,7,8 Ethernet2/5 2 400000 rs +Ethernet16 9,10,11,12 Ethernet3/1 3 400000 rs +Ethernet20 13,14,15,16 Ethernet3/5 3 400000 rs +Ethernet24 25,26,27,28 Ethernet4/1 4 400000 rs +Ethernet28 29,30,31,32 Ethernet4/5 4 400000 rs +Ethernet32 57,58,59,60 Ethernet5/1 5 400000 rs +Ethernet36 61,62,63,64 Ethernet5/5 5 400000 rs +Ethernet40 41,42,43,44 Ethernet6/1 6 400000 rs +Ethernet44 45,46,47,48 Ethernet6/5 6 400000 rs +Ethernet48 33,34,35,36 Ethernet7/1 7 400000 rs +Ethernet52 37,38,39,40 Ethernet7/5 7 400000 rs +Ethernet56 49,50,51,52 Ethernet8/1 8 400000 rs +Ethernet60 53,54,55,56 Ethernet8/5 8 400000 rs +Ethernet64 89,90,91,92 Ethernet9/1 9 400000 rs +Ethernet68 93,94,95,96 Ethernet9/5 9 400000 rs +Ethernet72 73,74,75,76 Ethernet10/1 10 400000 rs +Ethernet76 77,78,79,80 Ethernet10/5 10 400000 rs +Ethernet80 65,66,67,68 Ethernet11/1 11 400000 rs +Ethernet84 69,70,71,72 Ethernet11/5 11 400000 rs +Ethernet88 81,82,83,84 Ethernet12/1 12 400000 rs +Ethernet92 85,86,87,88 Ethernet12/5 12 400000 rs +Ethernet96 121,122,123,124 Ethernet13/1 13 400000 rs +Ethernet100 125,126,127,128 Ethernet13/5 13 400000 rs +Ethernet104 105,106,107,108 Ethernet14/1 14 400000 rs +Ethernet108 109,110,111,112 Ethernet14/5 14 400000 rs +Ethernet112 97,98,99,100 Ethernet15/1 15 400000 rs +Ethernet116 101,102,103,104 Ethernet15/5 15 400000 rs +Ethernet120 113,114,115,116 Ethernet16/1 16 400000 rs +Ethernet124 117,118,119,120 Ethernet16/5 16 400000 rs +Ethernet128 153,154,155,156 Ethernet17/1 17 400000 rs +Ethernet132 157,158,159,160 Ethernet17/5 17 400000 rs +Ethernet136 137,138,139,140 Ethernet18/1 18 400000 rs +Ethernet140 141,142,143,144 Ethernet18/5 18 400000 rs +Ethernet144 129,130,131,132 Ethernet19/1 19 400000 rs +Ethernet148 133,134,135,136 Ethernet19/5 19 400000 rs +Ethernet152 145,146,147,148 Ethernet20/1 20 400000 rs +Ethernet156 149,150,151,152 Ethernet20/5 20 400000 rs +Ethernet160 185,186,187,188 Ethernet21/1 21 400000 rs +Ethernet164 189,190,191,192 Ethernet21/5 21 400000 rs +Ethernet168 169,170,171,172 Ethernet22/1 22 400000 rs +Ethernet172 173,174,175,176 Ethernet22/5 22 400000 rs +Ethernet176 161,162,163,164 Ethernet23/1 23 400000 rs +Ethernet180 165,166,167,168 Ethernet23/5 23 400000 rs +Ethernet184 177,178,179,180 Ethernet24/1 24 400000 rs +Ethernet188 181,182,183,184 Ethernet24/5 24 400000 rs +Ethernet192 217,218,219,220 Ethernet25/1 25 400000 rs +Ethernet196 221,222,223,224 Ethernet25/5 25 400000 rs +Ethernet200 201,202,203,204 Ethernet26/1 26 400000 rs +Ethernet204 205,206,207,208 Ethernet26/5 26 400000 rs +Ethernet208 193,194,195,196 Ethernet27/1 27 400000 rs +Ethernet212 197,198,199,200 Ethernet27/5 27 400000 rs +Ethernet216 209,210,211,212 Ethernet28/1 28 400000 rs +Ethernet220 213,214,215,216 Ethernet28/5 28 400000 rs +Ethernet224 249,250,251,252 Ethernet29/1 29 400000 rs +Ethernet228 253,254,255,256 Ethernet29/5 29 400000 rs +Ethernet232 233,234,235,236 Ethernet30/1 30 400000 rs +Ethernet236 237,238,239,240 Ethernet30/5 30 400000 rs +Ethernet240 225,226,227,228 Ethernet31/1 31 400000 rs +Ethernet244 229,230,231,232 Ethernet31/5 31 400000 rs +Ethernet248 241,242,243,244 Ethernet32/1 32 400000 rs +Ethernet252 245,246,247,248 Ethernet32/5 32 400000 rs +Ethernet256 273,274,275,276 Ethernet33/1 33 400000 rs +Ethernet260 277,278,279,280 Ethernet33/5 33 400000 rs +Ethernet264 257,258,259,260 Ethernet34/1 34 400000 rs +Ethernet268 261,262,263,264 Ethernet34/5 34 400000 rs +Ethernet272 265,266,267,268 Ethernet35/1 35 400000 rs +Ethernet276 269,270,271,272 Ethernet35/5 35 400000 rs +Ethernet280 281,282,283,284 Ethernet36/1 36 400000 rs +Ethernet284 285,286,287,288 Ethernet36/5 36 400000 rs +Ethernet288 313,314,315,316 Ethernet37/1 37 400000 rs +Ethernet292 317,318,319,320 Ethernet37/5 37 400000 rs +Ethernet296 297,298,299,300 Ethernet38/1 38 400000 rs +Ethernet300 301,302,303,304 Ethernet38/5 38 400000 rs +Ethernet304 289,290,291,292 Ethernet39/1 39 400000 rs +Ethernet308 293,294,295,296 Ethernet39/5 39 400000 rs +Ethernet312 305,306,307,308 Ethernet40/1 40 400000 rs +Ethernet316 309,310,311,312 Ethernet40/5 40 400000 rs +Ethernet320 345,346,347,348 Ethernet41/1 41 400000 rs +Ethernet324 349,350,351,352 Ethernet41/5 41 400000 rs +Ethernet328 329,330,331,332 Ethernet42/1 42 400000 rs +Ethernet332 333,334,335,336 Ethernet42/5 42 400000 rs +Ethernet336 321,322,323,324 Ethernet43/1 43 400000 rs +Ethernet340 325,326,327,328 Ethernet43/5 43 400000 rs +Ethernet344 337,338,339,340 Ethernet44/1 44 400000 rs +Ethernet348 341,342,343,344 Ethernet44/5 44 400000 rs +Ethernet352 377,378,379,380 Ethernet45/1 45 400000 rs +Ethernet356 381,382,383,384 Ethernet45/5 45 400000 rs +Ethernet360 361,362,363,364 Ethernet46/1 46 400000 rs +Ethernet364 365,366,367,368 Ethernet46/5 46 400000 rs +Ethernet368 353,354,355,356 Ethernet47/1 47 400000 rs +Ethernet372 357,358,359,360 Ethernet47/5 47 400000 rs +Ethernet376 369,370,371,372 Ethernet48/1 48 400000 rs +Ethernet380 373,374,375,376 Ethernet48/5 48 400000 rs +Ethernet384 409,410,411,412 Ethernet49/1 49 400000 rs +Ethernet388 413,414,415,416 Ethernet49/5 49 400000 rs +Ethernet392 393,394,395,396 Ethernet50/1 50 400000 rs +Ethernet396 397,398,399,400 Ethernet50/5 50 400000 rs +Ethernet400 385,386,387,388 Ethernet51/1 51 400000 rs +Ethernet404 389,390,391,392 Ethernet51/5 51 400000 rs +Ethernet408 401,402,403,404 Ethernet52/1 52 400000 rs +Ethernet412 405,406,407,408 Ethernet52/5 52 400000 rs +Ethernet416 441,442,443,444 Ethernet53/1 53 400000 rs +Ethernet420 445,446,447,448 Ethernet53/5 53 400000 rs +Ethernet424 425,426,427,428 Ethernet54/1 54 400000 rs +Ethernet428 429,430,431,432 Ethernet54/5 54 400000 rs +Ethernet432 417,418,419,420 Ethernet55/1 55 400000 rs +Ethernet436 421,422,423,424 Ethernet55/5 55 400000 rs +Ethernet440 433,434,435,436 Ethernet56/1 56 400000 rs +Ethernet444 437,438,439,440 Ethernet56/5 56 400000 rs +Ethernet448 473,474,475,476 Ethernet57/1 57 400000 rs +Ethernet452 477,478,479,480 Ethernet57/5 57 400000 rs +Ethernet456 457,458,459,460 Ethernet58/1 58 400000 rs +Ethernet460 461,462,463,464 Ethernet58/5 58 400000 rs +Ethernet464 449,450,451,452 Ethernet59/1 59 400000 rs +Ethernet468 453,454,455,456 Ethernet59/5 59 400000 rs +Ethernet472 465,466,467,468 Ethernet60/1 60 400000 rs +Ethernet476 469,470,471,472 Ethernet60/5 60 400000 rs +Ethernet480 505,506,507,508 Ethernet61/1 61 400000 rs +Ethernet484 509,510,511,512 Ethernet61/5 61 400000 rs +Ethernet488 489,490,491,492 Ethernet62/1 62 400000 rs +Ethernet492 493,494,495,496 Ethernet62/5 62 400000 rs +Ethernet496 481,482,483,484 Ethernet63/1 63 400000 rs +Ethernet500 485,486,487,488 Ethernet63/5 63 400000 rs +Ethernet504 497,498,499,500 Ethernet64/1 64 400000 rs +Ethernet508 501,502,503,504 Ethernet64/5 64 400000 rs +Ethernet512 513 Ethernet65 65 10000 none +Ethernet513 515 Ethernet66 66 10000 none diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/qos.json.j2 new file mode 100644 index 000000000000..3e548325ea30 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/sai.profile b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/sai.profile new file mode 100644 index 000000000000..89cfbc9f1b84 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64de.config.bcm diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/th5-a7060x6-64de.config.bcm new file mode 100644 index 000000000000..4d9a3da5baca --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/th5-a7060x6-64de.config.bcm @@ -0,0 +1,1427 @@ +# +# $Copyright: (c) 2022 Broadcom. +# Broadcom Proprietary and Confidential. All rights reserved.$ +# +# BCM78900 64x800g port configuration. +# +# configuration yaml file +# device: +# : +#
: +# ? +# : +# : +# ... +# : +# : +# : +# : +# ... +# : +# + +--- +bcm_device: + 0: + global: + pktio_mode: 1 + default_cpu_tx_queue: 7 + vlan_flooding_l2mc_num_reserved: 0 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + # LTSW uses value 1 for ALPM combined mode + l3_alpm_template: 1 + l3_alpm_hit_skip: 1 + sai_feat_tail_timestamp : 1 + sai_port_phy_time_sync_en : 1 + sai_field_group_auto_prioritize: 1 + #l3_intf_vlan_split_egress for MTU at L3IF + l3_intf_vlan_split_egress : 1 + pfc_deadlock_seq_control : 1 + sai_tunnel_support: 2 + bcm_tunnel_term_compatible_mode: 1 + l3_ecmp_member_first_lkup_mem_size: 12288 +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15047362 + TX_LANE_MAP: 0x4152637 + RX_POLARITY_FLIP: 0xc3 + TX_POLARITY_FLIP: 0xcc + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x17063524 + TX_LANE_MAP: 0x60714253 + RX_POLARITY_FLIP: 0x97 + TX_POLARITY_FLIP: 0xcc + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x6172435 + TX_LANE_MAP: 0x71605342 + RX_POLARITY_FLIP: 0x33 + TX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x40516273 + TX_LANE_MAP: 0x51403726 + RX_POLARITY_FLIP: 0x33 + TX_POLARITY_FLIP: 0xc3 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71630524 + TX_LANE_MAP: 0x4371625 + RX_POLARITY_FLIP: 0x47 + TX_POLARITY_FLIP: 0xc9 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x70625143 + TX_LANE_MAP: 0x60534172 + RX_POLARITY_FLIP: 0x1e + TX_POLARITY_FLIP: 0x2c + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x17063524 + TX_LANE_MAP: 0x60715243 + RX_POLARITY_FLIP: 0x38 + TX_POLARITY_FLIP: 0x4e + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36172405 + TX_LANE_MAP: 0x73402516 + RX_POLARITY_FLIP: 0xd2 + TX_POLARITY_FLIP: 0xc9 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71630524 + TX_LANE_MAP: 0x4371625 + RX_POLARITY_FLIP: 0x47 + TX_POLARITY_FLIP: 0xc9 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x70625143 + TX_LANE_MAP: 0x60534172 + RX_POLARITY_FLIP: 0x1e + TX_POLARITY_FLIP: 0x6c + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62704351 + TX_LANE_MAP: 0x53607241 + RX_POLARITY_FLIP: 0xb4 + TX_POLARITY_FLIP: 0x6c + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36172405 + TX_LANE_MAP: 0x73402516 + RX_POLARITY_FLIP: 0xd2 + TX_POLARITY_FLIP: 0xc9 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71630524 + TX_LANE_MAP: 0x4371625 + RX_POLARITY_FLIP: 0x47 + TX_POLARITY_FLIP: 0xc9 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x70625143 + TX_LANE_MAP: 0x60534172 + RX_POLARITY_FLIP: 0x1e + TX_POLARITY_FLIP: 0x6c + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62704351 + TX_LANE_MAP: 0x53607241 + RX_POLARITY_FLIP: 0xb4 + TX_POLARITY_FLIP: 0x6c + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36172405 + TX_LANE_MAP: 0x73402516 + RX_POLARITY_FLIP: 0xd2 + TX_POLARITY_FLIP: 0xc9 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15347062 + TX_LANE_MAP: 0x60734152 + RX_POLARITY_FLIP: 0x3f + TX_POLARITY_FLIP: 0x76 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x17360524 + TX_LANE_MAP: 0x16270435 + RX_POLARITY_FLIP: 0x7b + TX_POLARITY_FLIP: 0x9b + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36172405 + TX_LANE_MAP: 0x27163504 + RX_POLARITY_FLIP: 0x21 + TX_POLARITY_FLIP: 0x91 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43516270 + TX_LANE_MAP: 0x37065241 + RX_POLARITY_FLIP: 0x30 + TX_POLARITY_FLIP: 0x16 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15347062 + TX_LANE_MAP: 0x60734152 + RX_POLARITY_FLIP: 0x3f + TX_POLARITY_FLIP: 0x76 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x17360524 + TX_LANE_MAP: 0x16270435 + RX_POLARITY_FLIP: 0x7b + TX_POLARITY_FLIP: 0x9b + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36172405 + TX_LANE_MAP: 0x27163504 + RX_POLARITY_FLIP: 0x21 + TX_POLARITY_FLIP: 0x91 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43516270 + TX_LANE_MAP: 0x37065241 + RX_POLARITY_FLIP: 0x30 + TX_POLARITY_FLIP: 0x16 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43612705 + TX_LANE_MAP: 0x63507241 + RX_POLARITY_FLIP: 0xfc + TX_POLARITY_FLIP: 0x8e + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x17360524 + TX_LANE_MAP: 0x16270435 + RX_POLARITY_FLIP: 0x7b + TX_POLARITY_FLIP: 0x9b + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36172405 + TX_LANE_MAP: 0x27163504 + RX_POLARITY_FLIP: 0x21 + TX_POLARITY_FLIP: 0x91 + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43516270 + TX_LANE_MAP: 0x37065241 + RX_POLARITY_FLIP: 0x30 + TX_POLARITY_FLIP: 0x36 + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73621504 + TX_LANE_MAP: 0x62734051 + RX_POLARITY_FLIP: 0xf0 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71605342 + TX_LANE_MAP: 0x6172435 + RX_POLARITY_FLIP: 0xa5 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x60714253 + TX_LANE_MAP: 0x17063524 + RX_POLARITY_FLIP: 0x21 + TX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26370415 + TX_LANE_MAP: 0x37265140 + RX_POLARITY_FLIP: 0x30 + TX_POLARITY_FLIP: 0xc3 + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15047362 + TX_LANE_MAP: 0x4152637 + RX_POLARITY_FLIP: 0xf0 + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x17063524 + TX_LANE_MAP: 0x60714253 + RX_POLARITY_FLIP: 0xa5 + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x6172435 + TX_LANE_MAP: 0x71605342 + RX_POLARITY_FLIP: 0xed + TX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x40516273 + TX_LANE_MAP: 0x51403726 + RX_POLARITY_FLIP: 0xfc + TX_POLARITY_FLIP: 0xc3 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x70621534 + TX_LANE_MAP: 0x14250637 + RX_POLARITY_FLIP: 0x0c + TX_POLARITY_FLIP: 0x64 + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71635042 + TX_LANE_MAP: 0x61724053 + RX_POLARITY_FLIP: 0x48 + TX_POLARITY_FLIP: 0x9c + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x6241537 + TX_LANE_MAP: 0x51624073 + RX_POLARITY_FLIP: 0x7b + TX_POLARITY_FLIP: 0x3a + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26073415 + TX_LANE_MAP: 0x52413706 + RX_POLARITY_FLIP: 0xfc + TX_POLARITY_FLIP: 0x9e + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x70621534 + TX_LANE_MAP: 0x14250637 + RX_POLARITY_FLIP: 0x0c + TX_POLARITY_FLIP: 0x64 + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71635042 + TX_LANE_MAP: 0x61724053 + RX_POLARITY_FLIP: 0x48 + TX_POLARITY_FLIP: 0x98 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63714250 + TX_LANE_MAP: 0x72615340 + RX_POLARITY_FLIP: 0xed + TX_POLARITY_FLIP: 0x9d + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26073415 + TX_LANE_MAP: 0x52413706 + RX_POLARITY_FLIP: 0xfc + TX_POLARITY_FLIP: 0x9e + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x70621534 + TX_LANE_MAP: 0x14250637 + RX_POLARITY_FLIP: 0x0c + TX_POLARITY_FLIP: 0x64 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71635042 + TX_LANE_MAP: 0x61724053 + RX_POLARITY_FLIP: 0x48 + TX_POLARITY_FLIP: 0x98 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63714250 + TX_LANE_MAP: 0x72615340 + RX_POLARITY_FLIP: 0xed + TX_POLARITY_FLIP: 0x9d + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26073415 + TX_LANE_MAP: 0x52413706 + RX_POLARITY_FLIP: 0xfc + TX_POLARITY_FLIP: 0x9e + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x5247163 + TX_LANE_MAP: 0x61524073 + RX_POLARITY_FLIP: 0x8b + TX_POLARITY_FLIP: 0x93 + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x7261534 + TX_LANE_MAP: 0x6351427 + RX_POLARITY_FLIP: 0xd2 + TX_POLARITY_FLIP: 0x63 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26073415 + TX_LANE_MAP: 0x35062714 + RX_POLARITY_FLIP: 0x87 + TX_POLARITY_FLIP: 0x63 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x42506371 + TX_LANE_MAP: 0x25167340 + RX_POLARITY_FLIP: 0xe1 + TX_POLARITY_FLIP: 0x63 + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x5247163 + TX_LANE_MAP: 0x61524073 + RX_POLARITY_FLIP: 0x8b + TX_POLARITY_FLIP: 0x93 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x7261534 + TX_LANE_MAP: 0x6351427 + RX_POLARITY_FLIP: 0xd2 + TX_POLARITY_FLIP: 0x63 + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26073415 + TX_LANE_MAP: 0x35062714 + RX_POLARITY_FLIP: 0x87 + TX_POLARITY_FLIP: 0x63 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x42506371 + TX_LANE_MAP: 0x25167340 + RX_POLARITY_FLIP: 0xe1 + TX_POLARITY_FLIP: 0x63 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62730415 + TX_LANE_MAP: 0x73624150 + RX_POLARITY_FLIP: 0x98 + TX_POLARITY_FLIP: 0x1b + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x7261534 + TX_LANE_MAP: 0x6351427 + RX_POLARITY_FLIP: 0xd2 + TX_POLARITY_FLIP: 0x63 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26073415 + TX_LANE_MAP: 0x35062714 + RX_POLARITY_FLIP: 0x87 + TX_POLARITY_FLIP: 0x63 + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x42506371 + TX_LANE_MAP: 0x25167340 + RX_POLARITY_FLIP: 0xe1 + TX_POLARITY_FLIP: 0x62 + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73621504 + TX_LANE_MAP: 0x62734051 + RX_POLARITY_FLIP: 0xc2 + TX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71605342 + TX_LANE_MAP: 0x6172435 + RX_POLARITY_FLIP: 0x96 + TX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x60714253 + TX_LANE_MAP: 0x17063524 + RX_POLARITY_FLIP: 0xcc + TX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26370415 + TX_LANE_MAP: 0x37265140 + RX_POLARITY_FLIP: 0xcc + TX_POLARITY_FLIP: 0xc3 +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 5 + ? + PORT_ID: 3 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 4 + : + PC_PHYS_PORT_ID: 13 + ? + PORT_ID: 11 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 12 + : + PC_PHYS_PORT_ID: 21 + ? + PORT_ID: 13 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 14 + : + PC_PHYS_PORT_ID: 29 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 23 + : + PC_PHYS_PORT_ID: 37 + ? + PORT_ID: 24 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 25 + : + PC_PHYS_PORT_ID: 45 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 34 + : + PC_PHYS_PORT_ID: 53 + ? + PORT_ID: 35 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 36 + : + PC_PHYS_PORT_ID: 61 + ? + PORT_ID: 44 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 45 + : + PC_PHYS_PORT_ID: 69 + ? + PORT_ID: 46 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 47 + : + PC_PHYS_PORT_ID: 77 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 56 + : + PC_PHYS_PORT_ID: 85 + ? + PORT_ID: 57 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 58 + : + PC_PHYS_PORT_ID: 93 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 67 + : + PC_PHYS_PORT_ID: 101 + ? + PORT_ID: 68 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 69 + : + PC_PHYS_PORT_ID: 109 + ? + PORT_ID: 77 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 78 + : + PC_PHYS_PORT_ID: 117 + ? + PORT_ID: 79 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 80 + : + PC_PHYS_PORT_ID: 125 + ? + PORT_ID: 88 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 89 + : + PC_PHYS_PORT_ID: 133 + ? + PORT_ID: 90 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 91 + : + PC_PHYS_PORT_ID: 141 + ? + PORT_ID: 99 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 100 + : + PC_PHYS_PORT_ID: 149 + ? + PORT_ID: 101 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 102 + : + PC_PHYS_PORT_ID: 157 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 111 + : + PC_PHYS_PORT_ID: 165 + ? + PORT_ID: 112 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 113 + : + PC_PHYS_PORT_ID: 173 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 181 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 124 + : + PC_PHYS_PORT_ID: 189 + ? + PORT_ID: 132 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 133 + : + PC_PHYS_PORT_ID: 197 + ? + PORT_ID: 134 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 135 + : + PC_PHYS_PORT_ID: 205 + ? + PORT_ID: 143 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 144 + : + PC_PHYS_PORT_ID: 213 + ? + PORT_ID: 145 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 146 + : + PC_PHYS_PORT_ID: 221 + ? + PORT_ID: 154 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 155 + : + PC_PHYS_PORT_ID: 229 + ? + PORT_ID: 156 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 157 + : + PC_PHYS_PORT_ID: 237 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 166 + : + PC_PHYS_PORT_ID: 245 + ? + PORT_ID: 167 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 168 + : + PC_PHYS_PORT_ID: 253 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 177 + : + PC_PHYS_PORT_ID: 261 + ? + PORT_ID: 178 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 179 + : + PC_PHYS_PORT_ID: 269 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 188 + : + PC_PHYS_PORT_ID: 277 + ? + PORT_ID: 189 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 190 + : + PC_PHYS_PORT_ID: 285 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 199 + : + PC_PHYS_PORT_ID: 293 + ? + PORT_ID: 200 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 201 + : + PC_PHYS_PORT_ID: 301 + ? + PORT_ID: 209 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 210 + : + PC_PHYS_PORT_ID: 309 + ? + PORT_ID: 211 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 212 + : + PC_PHYS_PORT_ID: 317 + ? + PORT_ID: 220 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 325 + ? + PORT_ID: 222 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 223 + : + PC_PHYS_PORT_ID: 333 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 232 + : + PC_PHYS_PORT_ID: 341 + ? + PORT_ID: 233 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 234 + : + PC_PHYS_PORT_ID: 349 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 243 + : + PC_PHYS_PORT_ID: 357 + ? + PORT_ID: 244 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 245 + : + PC_PHYS_PORT_ID: 365 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 254 + : + PC_PHYS_PORT_ID: 373 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 256 + : + PC_PHYS_PORT_ID: 381 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 265 + : + PC_PHYS_PORT_ID: 389 + ? + PORT_ID: 266 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 267 + : + PC_PHYS_PORT_ID: 397 + ? + PORT_ID: 275 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 276 + : + PC_PHYS_PORT_ID: 405 + ? + PORT_ID: 277 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 278 + : + PC_PHYS_PORT_ID: 413 + ? + PORT_ID: 286 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 287 + : + PC_PHYS_PORT_ID: 421 + ? + PORT_ID: 288 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 289 + : + PC_PHYS_PORT_ID: 429 + ? + PORT_ID: 297 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 298 + : + PC_PHYS_PORT_ID: 437 + ? + PORT_ID: 299 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 300 + : + PC_PHYS_PORT_ID: 445 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 309 + : + PC_PHYS_PORT_ID: 453 + ? + PORT_ID: 310 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 311 + : + PC_PHYS_PORT_ID: 461 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 320 + : + PC_PHYS_PORT_ID: 469 + ? + PORT_ID: 321 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 322 + : + PC_PHYS_PORT_ID: 477 + ? + PORT_ID: 330 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 331 + : + PC_PHYS_PORT_ID: 485 + ? + PORT_ID: 332 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 333 + : + PC_PHYS_PORT_ID: 493 + ? + PORT_ID: 341 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 342 + : + PC_PHYS_PORT_ID: 501 + ? + PORT_ID: 343 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 344 + : + PC_PHYS_PORT_ID: 509 + ? + PORT_ID: 76 + : + PC_PHYS_PORT_ID: 513 + ? + PORT_ID: 274 + : + PC_PHYS_PORT_ID: 515 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: [[1, 4], + [11, 14], + [22, 25], + [33, 36], + [44, 47], + [55, 58], + [66, 69], + [77, 80], + [88, 91], + [99, 102], + [110, 113], + [121, 124], + [132, 135], + [143, 146], + [154, 157], + [165, 168], + [176, 179], + [187, 190], + [198, 201], + [209, 212], + [220, 223], + [231, 234], + [242, 245], + [253, 256], + [264, 267], + [275, 278], + [286, 289], + [297, 300], + [308, 311], + [319, 322], + [330, 333], + [341, 344]] + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: [[76, 76], [274, 274]] + : + ENABLE: 0 + MAX_FRAME_SIZE: 9416 + SPEED: 10000 + NUM_LANES: 1 +... +--- +bcm_device: + 0: + global: + ftem_mem_entries: 65536 + sai_stats_support_mask: 0 + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm index ee71dbf00d69..afe53dfe8ad6 100644 --- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm @@ -1158,95 +1158,3 @@ device: DEVICE_CONFIG: AUTOLOAD_BOARD_SETTINGS: 0 ... -## Baseline ---- -device: - 0: - TM_THD_CONFIG: - SKIP_BUFFER_RESERVATION: 1 - THRESHOLD_MODE: LOSSY_AND_LOSSLESS -... ---- -device: - 0: - TM_ING_THD_HEADROOM_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_HEADROOM_POOL_ID: [[0,3]] - : - LIMIT_CELLS: 0 - - TM_ING_THD_SERVICE_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_ING_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_OFFSET_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - - TM_EGR_THD_SERVICE_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_EGR_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_LIMIT_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - YELLOW_SHARED_LIMIT_CELLS: 0 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 - RED_SHARED_LIMIT_CELLS: 0 - RED_SHARED_RESUME_LIMIT_CELLS: 0 - - TM_THD_MC_EGR_SERVICE_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_EGR_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_LIMIT_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - YELLOW_SHARED_LIMIT_CELLS: 0 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 - RED_SHARED_LIMIT_CELLS: 0 - RED_SHARED_RESUME_LIMIT_CELLS: 0 - - TM_ING_PORT_PRI_GRP: - ? - PORT_ID: [[1, 2], - [11, 12], - [22, 23], - [33, 34], - [44, 45], - [55, 56], - [66, 67], - [77, 78], - [88, 89], - [99, 100], - [110, 111], - [121, 122], - [132, 133], - [143, 144], - [154, 155], - [165, 166], - [176, 177], - [187, 188], - [198, 199], - [209, 210], - [220, 221], - [231, 232], - [242, 243], - [253, 254], - [264, 265], - [275, 276], - [286, 287], - [297, 298], - [308, 309], - [319, 320], - [330, 331], - [341, 342]] - TM_PRI_GRP_ID: 3 - : - PFC: 1 - LOSSLESS: 1 -... diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm index cf48a993b3a3..d4af799ff797 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm @@ -1425,95 +1425,3 @@ device: DEVICE_CONFIG: AUTOLOAD_BOARD_SETTINGS: 0 ... -## Baseline ---- -device: - 0: - TM_THD_CONFIG: - SKIP_BUFFER_RESERVATION: 1 - THRESHOLD_MODE: LOSSY_AND_LOSSLESS -... ---- -device: - 0: - TM_ING_THD_HEADROOM_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_HEADROOM_POOL_ID: [[0,3]] - : - LIMIT_CELLS: 0 - - TM_ING_THD_SERVICE_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_ING_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_OFFSET_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - - TM_EGR_THD_SERVICE_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_EGR_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_LIMIT_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - YELLOW_SHARED_LIMIT_CELLS: 0 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 - RED_SHARED_LIMIT_CELLS: 0 - RED_SHARED_RESUME_LIMIT_CELLS: 0 - - TM_THD_MC_EGR_SERVICE_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_EGR_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_LIMIT_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - YELLOW_SHARED_LIMIT_CELLS: 0 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 - RED_SHARED_LIMIT_CELLS: 0 - RED_SHARED_RESUME_LIMIT_CELLS: 0 - - TM_ING_PORT_PRI_GRP: - ? - PORT_ID: [[1, 4], - [11, 14], - [22, 25], - [33, 36], - [44, 47], - [55, 58], - [66, 69], - [77, 80], - [88, 91], - [99, 102], - [110, 113], - [121, 124], - [132, 135], - [143, 146], - [154, 157], - [165, 168], - [176, 179], - [187, 190], - [198, 201], - [209, 212], - [220, 223], - [231, 234], - [242, 245], - [253, 256], - [264, 267], - [275, 278], - [286, 289], - [297, 300], - [308, 311], - [319, 322], - [330, 333], - [341, 344]] - TM_PRI_GRP_ID: 3 - : - PFC: 1 - LOSSLESS: 1 -... diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2 index b1418a68eb31..f4b26e0f3497 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2 +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2 @@ -5,13 +5,13 @@ {%- macro generate_buffer_pool_and_profiles() %} "BUFFER_POOL": { "ingress_lossless_pool": { - "size": "165603428", + "size": "165660324", "type": "ingress", "mode": "dynamic", "xoff": "29520896" }, "egress_lossless_pool": { - "size": "165603428", + "size": "165660324", "type": "egress", "mode": "dynamic" } diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm index 425915e05e6b..bc493b222406 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm @@ -1169,95 +1169,3 @@ device: DEVICE_CONFIG: AUTOLOAD_BOARD_SETTINGS: 0 ... -## Baseline ---- -device: - 0: - TM_THD_CONFIG: - SKIP_BUFFER_RESERVATION: 1 - THRESHOLD_MODE: LOSSY_AND_LOSSLESS -... ---- -device: - 0: - TM_ING_THD_HEADROOM_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_HEADROOM_POOL_ID: [[0,3]] - : - LIMIT_CELLS: 0 - - TM_ING_THD_SERVICE_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_ING_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_OFFSET_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - - TM_EGR_THD_SERVICE_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_EGR_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_LIMIT_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - YELLOW_SHARED_LIMIT_CELLS: 0 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 - RED_SHARED_LIMIT_CELLS: 0 - RED_SHARED_RESUME_LIMIT_CELLS: 0 - - TM_THD_MC_EGR_SERVICE_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_EGR_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_LIMIT_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - YELLOW_SHARED_LIMIT_CELLS: 0 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 - RED_SHARED_LIMIT_CELLS: 0 - RED_SHARED_RESUME_LIMIT_CELLS: 0 - - TM_ING_PORT_PRI_GRP: - ? - PORT_ID: [[1, 2], - [11, 12], - [22, 23], - [33, 34], - [44, 45], - [55, 56], - [66, 67], - [77, 78], - [88, 89], - [99, 100], - [110, 111], - [121, 122], - [132, 133], - [143, 144], - [154, 155], - [165, 166], - [176, 177], - [187, 188], - [198, 199], - [209, 210], - [220, 221], - [231, 232], - [242, 243], - [253, 254], - [264, 265], - [275, 276], - [286, 287], - [297, 298], - [308, 309], - [319, 320], - [330, 331], - [341, 342]] - TM_PRI_GRP_ID: 3 - : - PFC: 1 - LOSSLESS: 1 -... diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/BALANCED b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/BALANCED new file mode 120000 index 000000000000..afd21766cc64 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/BALANCED @@ -0,0 +1 @@ +../../../common/profiles/th5/gen/BALANCED \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffer_ports.j2 new file mode 100644 index 000000000000..55d8aacb3400 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffer_ports.j2 @@ -0,0 +1,6 @@ +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 512, 2) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers.json.j2 new file mode 100644 index 000000000000..0b1cb2c541b6 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers_defaults_t0.j2 new file mode 120000 index 000000000000..9524e6a476ac --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +BALANCED/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers_defaults_t1.j2 new file mode 120000 index 000000000000..c25cc95d6d57 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers_defaults_t1.j2 @@ -0,0 +1 @@ +BALANCED/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/hwsku.json new file mode 100644 index 000000000000..a82d093767d3 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/hwsku.json @@ -0,0 +1,106 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "8x100G" + }, + "Ethernet16": { + "default_brkout_mode": "8x100G" + }, + "Ethernet32": { + "default_brkout_mode": "8x100G" + }, + "Ethernet48": { + "default_brkout_mode": "8x100G" + }, + "Ethernet64": { + "default_brkout_mode": "8x100G" + }, + "Ethernet80": { + "default_brkout_mode": "8x100G" + }, + "Ethernet96": { + "default_brkout_mode": "8x100G" + }, + "Ethernet112": { + "default_brkout_mode": "8x100G" + }, + "Ethernet128": { + "default_brkout_mode": "8x100G" + }, + "Ethernet144": { + "default_brkout_mode": "8x100G" + }, + "Ethernet160": { + "default_brkout_mode": "8x100G" + }, + "Ethernet176": { + "default_brkout_mode": "8x100G" + }, + "Ethernet192": { + "default_brkout_mode": "8x100G" + }, + "Ethernet208": { + "default_brkout_mode": "8x100G" + }, + "Ethernet224": { + "default_brkout_mode": "8x100G" + }, + "Ethernet240": { + "default_brkout_mode": "8x100G" + }, + "Ethernet256": { + "default_brkout_mode": "8x100G" + }, + "Ethernet272": { + "default_brkout_mode": "8x100G" + }, + "Ethernet288": { + "default_brkout_mode": "8x100G" + }, + "Ethernet304": { + "default_brkout_mode": "8x100G" + }, + "Ethernet320": { + "default_brkout_mode": "8x100G" + }, + "Ethernet336": { + "default_brkout_mode": "8x100G" + }, + "Ethernet352": { + "default_brkout_mode": "8x100G" + }, + "Ethernet368": { + "default_brkout_mode": "8x100G" + }, + "Ethernet384": { + "default_brkout_mode": "8x100G" + }, + "Ethernet400": { + "default_brkout_mode": "8x100G" + }, + "Ethernet416": { + "default_brkout_mode": "8x100G" + }, + "Ethernet432": { + "default_brkout_mode": "8x100G" + }, + "Ethernet448": { + "default_brkout_mode": "8x100G" + }, + "Ethernet464": { + "default_brkout_mode": "8x100G" + }, + "Ethernet480": { + "default_brkout_mode": "8x100G" + }, + "Ethernet496": { + "default_brkout_mode": "8x100G" + }, + "Ethernet512": { + "default_brkout_mode": "1x10G" + }, + "Ethernet513": { + "default_brkout_mode": "1x10G" + } + } +} diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/pg_profile_lookup.ini new file mode 120000 index 000000000000..297cddb2d223 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/pg_profile_lookup.ini @@ -0,0 +1 @@ +BALANCED/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/port_config.ini new file mode 100644 index 000000000000..be2e547eb6c8 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/port_config.ini @@ -0,0 +1,259 @@ +# name lanes alias index speed fec +Ethernet0 17 Ethernet1/1 1 100000 rs +Ethernet1 18 Ethernet1/2 1 100000 rs +Ethernet2 19 Ethernet1/3 1 100000 rs +Ethernet3 20 Ethernet1/4 1 100000 rs +Ethernet4 21 Ethernet1/5 1 100000 rs +Ethernet5 22 Ethernet1/6 1 100000 rs +Ethernet6 23 Ethernet1/7 1 100000 rs +Ethernet7 24 Ethernet1/8 1 100000 rs +Ethernet16 9 Ethernet3/1 3 100000 rs +Ethernet17 10 Ethernet3/2 3 100000 rs +Ethernet18 11 Ethernet3/3 3 100000 rs +Ethernet19 12 Ethernet3/4 3 100000 rs +Ethernet20 13 Ethernet3/5 3 100000 rs +Ethernet21 14 Ethernet3/6 3 100000 rs +Ethernet22 15 Ethernet3/7 3 100000 rs +Ethernet23 16 Ethernet3/8 3 100000 rs +Ethernet32 57 Ethernet5/1 5 100000 rs +Ethernet33 58 Ethernet5/2 5 100000 rs +Ethernet34 59 Ethernet5/3 5 100000 rs +Ethernet35 60 Ethernet5/4 5 100000 rs +Ethernet36 61 Ethernet5/5 5 100000 rs +Ethernet37 62 Ethernet5/6 5 100000 rs +Ethernet38 63 Ethernet5/7 5 100000 rs +Ethernet39 64 Ethernet5/8 5 100000 rs +Ethernet48 33 Ethernet7/1 7 100000 rs +Ethernet49 34 Ethernet7/2 7 100000 rs +Ethernet50 35 Ethernet7/3 7 100000 rs +Ethernet51 36 Ethernet7/4 7 100000 rs +Ethernet52 37 Ethernet7/5 7 100000 rs +Ethernet53 38 Ethernet7/6 7 100000 rs +Ethernet54 39 Ethernet7/7 7 100000 rs +Ethernet55 40 Ethernet7/8 7 100000 rs +Ethernet64 89 Ethernet9/1 9 100000 rs +Ethernet65 90 Ethernet9/2 9 100000 rs +Ethernet66 91 Ethernet9/3 9 100000 rs +Ethernet67 92 Ethernet9/4 9 100000 rs +Ethernet68 93 Ethernet9/5 9 100000 rs +Ethernet69 94 Ethernet9/6 9 100000 rs +Ethernet70 95 Ethernet9/7 9 100000 rs +Ethernet71 96 Ethernet9/8 9 100000 rs +Ethernet80 65 Ethernet11/1 11 100000 rs +Ethernet81 66 Ethernet11/2 11 100000 rs +Ethernet82 67 Ethernet11/3 11 100000 rs +Ethernet83 68 Ethernet11/4 11 100000 rs +Ethernet84 69 Ethernet11/5 11 100000 rs +Ethernet85 70 Ethernet11/6 11 100000 rs +Ethernet86 71 Ethernet11/7 11 100000 rs +Ethernet87 72 Ethernet11/8 11 100000 rs +Ethernet96 121 Ethernet13/1 13 100000 rs +Ethernet97 122 Ethernet13/2 13 100000 rs +Ethernet98 123 Ethernet13/3 13 100000 rs +Ethernet99 124 Ethernet13/4 13 100000 rs +Ethernet100 125 Ethernet13/5 13 100000 rs +Ethernet101 126 Ethernet13/6 13 100000 rs +Ethernet102 127 Ethernet13/7 13 100000 rs +Ethernet103 128 Ethernet13/8 13 100000 rs +Ethernet112 97 Ethernet15/1 15 100000 rs +Ethernet113 98 Ethernet15/2 15 100000 rs +Ethernet114 99 Ethernet15/3 15 100000 rs +Ethernet115 100 Ethernet15/4 15 100000 rs +Ethernet116 101 Ethernet15/5 15 100000 rs +Ethernet117 102 Ethernet15/6 15 100000 rs +Ethernet118 103 Ethernet15/7 15 100000 rs +Ethernet119 104 Ethernet15/8 15 100000 rs +Ethernet128 153 Ethernet17/1 17 100000 rs +Ethernet129 154 Ethernet17/2 17 100000 rs +Ethernet130 155 Ethernet17/3 17 100000 rs +Ethernet131 156 Ethernet17/4 17 100000 rs +Ethernet132 157 Ethernet17/5 17 100000 rs +Ethernet133 158 Ethernet17/6 17 100000 rs +Ethernet134 159 Ethernet17/7 17 100000 rs +Ethernet135 160 Ethernet17/8 17 100000 rs +Ethernet144 129 Ethernet19/1 19 100000 rs +Ethernet145 130 Ethernet19/2 19 100000 rs +Ethernet146 131 Ethernet19/3 19 100000 rs +Ethernet147 132 Ethernet19/4 19 100000 rs +Ethernet148 133 Ethernet19/5 19 100000 rs +Ethernet149 134 Ethernet19/6 19 100000 rs +Ethernet150 135 Ethernet19/7 19 100000 rs +Ethernet151 136 Ethernet19/8 19 100000 rs +Ethernet160 185 Ethernet21/1 21 100000 rs +Ethernet161 186 Ethernet21/2 21 100000 rs +Ethernet162 187 Ethernet21/3 21 100000 rs +Ethernet163 188 Ethernet21/4 21 100000 rs +Ethernet164 189 Ethernet21/5 21 100000 rs +Ethernet165 190 Ethernet21/6 21 100000 rs +Ethernet166 191 Ethernet21/7 21 100000 rs +Ethernet167 192 Ethernet21/8 21 100000 rs +Ethernet176 161 Ethernet23/1 23 100000 rs +Ethernet177 162 Ethernet23/2 23 100000 rs +Ethernet178 163 Ethernet23/3 23 100000 rs +Ethernet179 164 Ethernet23/4 23 100000 rs +Ethernet180 165 Ethernet23/5 23 100000 rs +Ethernet181 166 Ethernet23/6 23 100000 rs +Ethernet182 167 Ethernet23/7 23 100000 rs +Ethernet183 168 Ethernet23/8 23 100000 rs +Ethernet192 217 Ethernet25/1 25 100000 rs +Ethernet193 218 Ethernet25/2 25 100000 rs +Ethernet194 219 Ethernet25/3 25 100000 rs +Ethernet195 220 Ethernet25/4 25 100000 rs +Ethernet196 221 Ethernet25/5 25 100000 rs +Ethernet197 222 Ethernet25/6 25 100000 rs +Ethernet198 223 Ethernet25/7 25 100000 rs +Ethernet199 224 Ethernet25/8 25 100000 rs +Ethernet208 193 Ethernet27/1 27 100000 rs +Ethernet209 194 Ethernet27/2 27 100000 rs +Ethernet210 195 Ethernet27/3 27 100000 rs +Ethernet211 196 Ethernet27/4 27 100000 rs +Ethernet212 197 Ethernet27/5 27 100000 rs +Ethernet213 198 Ethernet27/6 27 100000 rs +Ethernet214 199 Ethernet27/7 27 100000 rs +Ethernet215 200 Ethernet27/8 27 100000 rs +Ethernet224 249 Ethernet29/1 29 100000 rs +Ethernet225 250 Ethernet29/2 29 100000 rs +Ethernet226 251 Ethernet29/3 29 100000 rs +Ethernet227 252 Ethernet29/4 29 100000 rs +Ethernet228 253 Ethernet29/5 29 100000 rs +Ethernet229 254 Ethernet29/6 29 100000 rs +Ethernet230 255 Ethernet29/7 29 100000 rs +Ethernet231 256 Ethernet29/8 29 100000 rs +Ethernet240 225 Ethernet31/1 31 100000 rs +Ethernet241 226 Ethernet31/2 31 100000 rs +Ethernet242 227 Ethernet31/3 31 100000 rs +Ethernet243 228 Ethernet31/4 31 100000 rs +Ethernet244 229 Ethernet31/5 31 100000 rs +Ethernet245 230 Ethernet31/6 31 100000 rs +Ethernet246 231 Ethernet31/7 31 100000 rs +Ethernet247 232 Ethernet31/8 31 100000 rs +Ethernet256 273 Ethernet33/1 33 100000 rs +Ethernet257 274 Ethernet33/2 33 100000 rs +Ethernet258 275 Ethernet33/3 33 100000 rs +Ethernet259 276 Ethernet33/4 33 100000 rs +Ethernet260 277 Ethernet33/5 33 100000 rs +Ethernet261 278 Ethernet33/6 33 100000 rs +Ethernet262 279 Ethernet33/7 33 100000 rs +Ethernet263 280 Ethernet33/8 33 100000 rs +Ethernet272 265 Ethernet35/1 35 100000 rs +Ethernet273 266 Ethernet35/2 35 100000 rs +Ethernet274 267 Ethernet35/3 35 100000 rs +Ethernet275 268 Ethernet35/4 35 100000 rs +Ethernet276 269 Ethernet35/5 35 100000 rs +Ethernet277 270 Ethernet35/6 35 100000 rs +Ethernet278 271 Ethernet35/7 35 100000 rs +Ethernet279 272 Ethernet35/8 35 100000 rs +Ethernet288 313 Ethernet37/1 37 100000 rs +Ethernet289 314 Ethernet37/2 37 100000 rs +Ethernet290 315 Ethernet37/3 37 100000 rs +Ethernet291 316 Ethernet37/4 37 100000 rs +Ethernet292 317 Ethernet37/5 37 100000 rs +Ethernet293 318 Ethernet37/6 37 100000 rs +Ethernet294 319 Ethernet37/7 37 100000 rs +Ethernet295 320 Ethernet37/8 37 100000 rs +Ethernet304 289 Ethernet39/1 39 100000 rs +Ethernet305 290 Ethernet39/2 39 100000 rs +Ethernet306 291 Ethernet39/3 39 100000 rs +Ethernet307 292 Ethernet39/4 39 100000 rs +Ethernet308 293 Ethernet39/5 39 100000 rs +Ethernet309 294 Ethernet39/6 39 100000 rs +Ethernet310 295 Ethernet39/7 39 100000 rs +Ethernet311 296 Ethernet39/8 39 100000 rs +Ethernet320 345 Ethernet41/1 41 100000 rs +Ethernet321 346 Ethernet41/2 41 100000 rs +Ethernet322 347 Ethernet41/3 41 100000 rs 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+Ethernet503 488 Ethernet63/8 63 100000 rs +Ethernet512 513 Ethernet65 65 10000 none +Ethernet513 515 Ethernet66 66 10000 none diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/qos.json.j2 new file mode 100644 index 000000000000..3e548325ea30 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/sai.profile b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/sai.profile new file mode 100644 index 000000000000..50c136d97b24 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm new file mode 100644 index 000000000000..ba9dff7e73d3 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm @@ -0,0 +1,1928 @@ +# +# $Copyright: (c) 2022 Broadcom. +# Broadcom Proprietary and Confidential. All rights reserved.$ +# +# BCM78900 64x800g port configuration. +# +# configuration yaml file +# device: +# : +#
: +# ? +# : +# : +# ... +# : +# : +# : +# : +# ... +# : +# +--- +bcm_device: + 0: + global: + pktio_mode: 1 + default_cpu_tx_queue: 7 + vlan_flooding_l2mc_num_reserved: 0 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + # LTSW uses value 1 for ALPM combined mode + l3_alpm_template: 1 + l3_alpm_hit_skip: 1 + sai_feat_tail_timestamp : 1 + sai_port_phy_time_sync_en : 1 + sai_field_group_auto_prioritize: 1 + #l3_intf_vlan_split_egress for MTU at L3IF + l3_intf_vlan_split_egress : 1 + pfc_deadlock_seq_control : 1 + sai_tunnel_support: 2 + mmu_init_config: "\"TH5-MSFT-PROD\"" + bcm_tunnel_term_compatible_mode: 1 + l3_ecmp_member_first_lkup_mem_size: 12288 +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761032 + TX_LANE_MAP: 0x32107654 + RX_POLARITY_FLIP: 0x66 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761032 + TX_LANE_MAP: 0x32107654 + RX_POLARITY_FLIP: 0x26 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32107654 + TX_LANE_MAP: 0x54761032 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0x66 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32107654 + TX_LANE_MAP: 0x54761032 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0x66 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13027654 + TX_LANE_MAP: 0x21305674 + RX_POLARITY_FLIP: 0x6c + TX_POLARITY_FLIP: 0xa6 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13027654 + TX_LANE_MAP: 0x21305674 + RX_POLARITY_FLIP: 0x6c + TX_POLARITY_FLIP: 0xb6 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23016745 + TX_LANE_MAP: 0x54670123 + RX_POLARITY_FLIP: 0x97 + TX_POLARITY_FLIP: 0x35 + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54760213 + TX_LANE_MAP: 0x74563021 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0x65 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13027654 + TX_LANE_MAP: 0x21305674 + RX_POLARITY_FLIP: 0x6c + TX_POLARITY_FLIP: 0xa6 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13027654 + TX_LANE_MAP: 0x21305674 + RX_POLARITY_FLIP: 0x6c + TX_POLARITY_FLIP: 0xa6 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54760213 + TX_LANE_MAP: 0x74563021 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0x65 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54760213 + TX_LANE_MAP: 0x74563021 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0x65 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13027654 + TX_LANE_MAP: 0x21305674 + RX_POLARITY_FLIP: 0x6c + TX_POLARITY_FLIP: 0xa6 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13027654 + TX_LANE_MAP: 0x21305674 + RX_POLARITY_FLIP: 0x6c + TX_POLARITY_FLIP: 0xa6 + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54760213 + TX_LANE_MAP: 0x74563021 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0x65 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54760213 + TX_LANE_MAP: 0x74563021 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0x65 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761302 + TX_LANE_MAP: 0x54762130 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761302 + TX_LANE_MAP: 0x54762130 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x2137654 + TX_LANE_MAP: 0x30217654 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x2137654 + TX_LANE_MAP: 0x30217654 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761302 + TX_LANE_MAP: 0x54762130 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761302 + TX_LANE_MAP: 0x54762130 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x2137654 + TX_LANE_MAP: 0x30217654 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x2137654 + TX_LANE_MAP: 0x30217654 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x31204675 + TX_LANE_MAP: 0x47561203 + RX_POLARITY_FLIP: 0x11 + TX_POLARITY_FLIP: 0x2b + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761302 + TX_LANE_MAP: 0x54762130 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x2137654 + TX_LANE_MAP: 0x30217654 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x2137654 + TX_LANE_MAP: 0x30217654 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0x9a + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32107654 + TX_LANE_MAP: 0x54761032 + RX_POLARITY_FLIP: 0x33 + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32107654 + TX_LANE_MAP: 0x54761032 + RX_POLARITY_FLIP: 0x33 + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761032 + TX_LANE_MAP: 0x32107654 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0x66 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761032 + TX_LANE_MAP: 0x32107654 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0x66 + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761032 + TX_LANE_MAP: 0x32107654 + RX_POLARITY_FLIP: 0x33 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761032 + TX_LANE_MAP: 0x32107654 + RX_POLARITY_FLIP: 0x33 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32107654 + TX_LANE_MAP: 0x54761032 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x66 + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32107654 + TX_LANE_MAP: 0x54761032 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x66 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x2137654 + TX_LANE_MAP: 0x30217654 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x2137654 + TX_LANE_MAP: 0x30217654 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0x9a + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x31204675 + TX_LANE_MAP: 0x47561203 + RX_POLARITY_FLIP: 0x11 + TX_POLARITY_FLIP: 0x2b + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761302 + TX_LANE_MAP: 0x54762130 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x2137654 + TX_LANE_MAP: 0x30217654 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x2137654 + TX_LANE_MAP: 0x30217654 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761302 + TX_LANE_MAP: 0x54762130 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761302 + TX_LANE_MAP: 0x54762130 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x2137654 + TX_LANE_MAP: 0x30217654 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x2137654 + TX_LANE_MAP: 0x30217654 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761302 + TX_LANE_MAP: 0x54762130 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761302 + TX_LANE_MAP: 0x54762130 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54760213 + TX_LANE_MAP: 0x74563021 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0x65 + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54760213 + TX_LANE_MAP: 0x74563021 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0x65 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13027654 + TX_LANE_MAP: 0x21305674 + RX_POLARITY_FLIP: 0x6c + TX_POLARITY_FLIP: 0xa6 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13027654 + TX_LANE_MAP: 0x21305674 + RX_POLARITY_FLIP: 0x6c + TX_POLARITY_FLIP: 0xa6 + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54760213 + TX_LANE_MAP: 0x74563021 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0x65 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54760213 + TX_LANE_MAP: 0x74563021 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0x65 + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13027654 + TX_LANE_MAP: 0x21305674 + RX_POLARITY_FLIP: 0x6c + TX_POLARITY_FLIP: 0xa6 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13027654 + TX_LANE_MAP: 0x21305674 + RX_POLARITY_FLIP: 0x6c + TX_POLARITY_FLIP: 0xa6 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23016745 + TX_LANE_MAP: 0x54670123 + RX_POLARITY_FLIP: 0x97 + TX_POLARITY_FLIP: 0x35 + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54760213 + TX_LANE_MAP: 0x74563021 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0x65 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13027654 + TX_LANE_MAP: 0x21305674 + RX_POLARITY_FLIP: 0x6c + TX_POLARITY_FLIP: 0xa6 + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13027654 + TX_LANE_MAP: 0x21305674 + RX_POLARITY_FLIP: 0x6c + TX_POLARITY_FLIP: 0xb6 + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32107654 + TX_LANE_MAP: 0x54761032 + RX_POLARITY_FLIP: 0x67 + TX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32107654 + TX_LANE_MAP: 0x54761032 + RX_POLARITY_FLIP: 0x66 + TX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761032 + TX_LANE_MAP: 0x32107654 + RX_POLARITY_FLIP: 0xaa + TX_POLARITY_FLIP: 0x66 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761032 + TX_LANE_MAP: 0x32107654 + RX_POLARITY_FLIP: 0xaa + TX_POLARITY_FLIP: 0x66 +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 2 + ? + PORT_ID: 3 + : + PC_PHYS_PORT_ID: 3 + ? + PORT_ID: 4 + : + PC_PHYS_PORT_ID: 4 + ? + PORT_ID: 5 + : + PC_PHYS_PORT_ID: 5 + ? + PORT_ID: 6 + : + PC_PHYS_PORT_ID: 6 + ? + PORT_ID: 7 + : + PC_PHYS_PORT_ID: 7 + ? + PORT_ID: 8 + : + PC_PHYS_PORT_ID: 8 + ? + PORT_ID: 11 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 12 + : + PC_PHYS_PORT_ID: 18 + ? + PORT_ID: 13 + : + PC_PHYS_PORT_ID: 19 + ? + PORT_ID: 14 + : + PC_PHYS_PORT_ID: 20 + ? + PORT_ID: 15 + : + PC_PHYS_PORT_ID: 21 + ? + PORT_ID: 16 + : + PC_PHYS_PORT_ID: 22 + ? + PORT_ID: 17 + : + PC_PHYS_PORT_ID: 23 + ? + PORT_ID: 18 + : + PC_PHYS_PORT_ID: 24 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 23 + : + PC_PHYS_PORT_ID: 34 + ? + PORT_ID: 24 + : + PC_PHYS_PORT_ID: 35 + ? + PORT_ID: 25 + : + PC_PHYS_PORT_ID: 36 + ? + PORT_ID: 26 + : + PC_PHYS_PORT_ID: 37 + ? + PORT_ID: 27 + : + PC_PHYS_PORT_ID: 38 + ? + PORT_ID: 28 + : + PC_PHYS_PORT_ID: 39 + ? + PORT_ID: 29 + : + PC_PHYS_PORT_ID: 40 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 34 + : + PC_PHYS_PORT_ID: 50 + ? + PORT_ID: 35 + : + PC_PHYS_PORT_ID: 51 + ? + PORT_ID: 36 + : + PC_PHYS_PORT_ID: 52 + ? + PORT_ID: 37 + : + PC_PHYS_PORT_ID: 53 + ? + PORT_ID: 38 + : + PC_PHYS_PORT_ID: 54 + ? + PORT_ID: 39 + : + PC_PHYS_PORT_ID: 55 + ? + PORT_ID: 40 + : + PC_PHYS_PORT_ID: 56 + ? + PORT_ID: 44 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 45 + : + PC_PHYS_PORT_ID: 66 + ? + PORT_ID: 46 + : + PC_PHYS_PORT_ID: 67 + ? + PORT_ID: 47 + : + PC_PHYS_PORT_ID: 68 + ? + PORT_ID: 48 + : + PC_PHYS_PORT_ID: 69 + ? + PORT_ID: 49 + : + PC_PHYS_PORT_ID: 70 + ? + PORT_ID: 50 + : + PC_PHYS_PORT_ID: 71 + ? + PORT_ID: 51 + : + PC_PHYS_PORT_ID: 72 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 56 + : + PC_PHYS_PORT_ID: 82 + ? + PORT_ID: 57 + : + PC_PHYS_PORT_ID: 83 + ? + PORT_ID: 58 + : + PC_PHYS_PORT_ID: 84 + ? + PORT_ID: 59 + : + PC_PHYS_PORT_ID: 85 + ? + PORT_ID: 60 + : + PC_PHYS_PORT_ID: 86 + ? + PORT_ID: 61 + : + PC_PHYS_PORT_ID: 87 + ? + PORT_ID: 62 + : + PC_PHYS_PORT_ID: 88 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 67 + : + PC_PHYS_PORT_ID: 98 + ? + PORT_ID: 68 + : + PC_PHYS_PORT_ID: 99 + ? + PORT_ID: 69 + : + PC_PHYS_PORT_ID: 100 + ? + PORT_ID: 70 + : + PC_PHYS_PORT_ID: 101 + ? + PORT_ID: 71 + : + PC_PHYS_PORT_ID: 102 + ? + PORT_ID: 72 + : + PC_PHYS_PORT_ID: 103 + ? + PORT_ID: 73 + : + PC_PHYS_PORT_ID: 104 + ? + PORT_ID: 77 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 78 + : + PC_PHYS_PORT_ID: 114 + ? + PORT_ID: 79 + : + PC_PHYS_PORT_ID: 115 + ? + PORT_ID: 80 + : + PC_PHYS_PORT_ID: 116 + ? + PORT_ID: 81 + : + PC_PHYS_PORT_ID: 117 + ? + PORT_ID: 82 + : + PC_PHYS_PORT_ID: 118 + ? + PORT_ID: 83 + : + PC_PHYS_PORT_ID: 119 + ? + PORT_ID: 84 + : + PC_PHYS_PORT_ID: 120 + ? + PORT_ID: 88 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 89 + : + PC_PHYS_PORT_ID: 130 + ? + PORT_ID: 90 + : + PC_PHYS_PORT_ID: 131 + ? + PORT_ID: 91 + : + PC_PHYS_PORT_ID: 132 + ? + PORT_ID: 92 + : + PC_PHYS_PORT_ID: 133 + ? + PORT_ID: 93 + : + PC_PHYS_PORT_ID: 134 + ? + PORT_ID: 94 + : + PC_PHYS_PORT_ID: 135 + ? + PORT_ID: 95 + : + PC_PHYS_PORT_ID: 136 + ? + PORT_ID: 99 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 100 + : + PC_PHYS_PORT_ID: 146 + ? + PORT_ID: 101 + : + PC_PHYS_PORT_ID: 147 + ? + PORT_ID: 102 + : + PC_PHYS_PORT_ID: 148 + ? + PORT_ID: 103 + : + PC_PHYS_PORT_ID: 149 + ? + PORT_ID: 104 + : + PC_PHYS_PORT_ID: 150 + ? + PORT_ID: 105 + : + PC_PHYS_PORT_ID: 151 + ? + PORT_ID: 106 + : + PC_PHYS_PORT_ID: 152 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 111 + : + PC_PHYS_PORT_ID: 162 + ? + PORT_ID: 112 + : + PC_PHYS_PORT_ID: 163 + ? + PORT_ID: 113 + : + PC_PHYS_PORT_ID: 164 + ? + PORT_ID: 114 + : + PC_PHYS_PORT_ID: 165 + ? + PORT_ID: 115 + : + PC_PHYS_PORT_ID: 166 + ? + PORT_ID: 116 + : + PC_PHYS_PORT_ID: 167 + ? + PORT_ID: 117 + : + PC_PHYS_PORT_ID: 168 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 178 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 179 + ? + PORT_ID: 124 + : + PC_PHYS_PORT_ID: 180 + ? + PORT_ID: 125 + : + PC_PHYS_PORT_ID: 181 + ? + PORT_ID: 126 + : + PC_PHYS_PORT_ID: 182 + ? + PORT_ID: 127 + : + PC_PHYS_PORT_ID: 183 + ? + PORT_ID: 128 + : + PC_PHYS_PORT_ID: 184 + ? + PORT_ID: 132 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 133 + : + PC_PHYS_PORT_ID: 194 + ? + PORT_ID: 134 + : + PC_PHYS_PORT_ID: 195 + ? + PORT_ID: 135 + : + PC_PHYS_PORT_ID: 196 + ? + PORT_ID: 136 + : + PC_PHYS_PORT_ID: 197 + ? + PORT_ID: 137 + : + PC_PHYS_PORT_ID: 198 + ? + PORT_ID: 138 + : + PC_PHYS_PORT_ID: 199 + ? + PORT_ID: 139 + : + PC_PHYS_PORT_ID: 200 + ? + PORT_ID: 143 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 144 + : + PC_PHYS_PORT_ID: 210 + ? + PORT_ID: 145 + : + PC_PHYS_PORT_ID: 211 + ? + PORT_ID: 146 + : + PC_PHYS_PORT_ID: 212 + ? + PORT_ID: 147 + : + PC_PHYS_PORT_ID: 213 + ? + PORT_ID: 148 + : + PC_PHYS_PORT_ID: 214 + ? + PORT_ID: 149 + : + PC_PHYS_PORT_ID: 215 + ? + PORT_ID: 150 + : + PC_PHYS_PORT_ID: 216 + ? + PORT_ID: 154 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 155 + : + PC_PHYS_PORT_ID: 226 + ? + PORT_ID: 156 + : + PC_PHYS_PORT_ID: 227 + ? + PORT_ID: 157 + : + PC_PHYS_PORT_ID: 228 + ? + PORT_ID: 158 + : + PC_PHYS_PORT_ID: 229 + ? + PORT_ID: 159 + : + PC_PHYS_PORT_ID: 230 + ? + PORT_ID: 160 + : + PC_PHYS_PORT_ID: 231 + ? + PORT_ID: 161 + : + PC_PHYS_PORT_ID: 232 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 166 + : + PC_PHYS_PORT_ID: 242 + ? + PORT_ID: 167 + : + PC_PHYS_PORT_ID: 243 + ? + PORT_ID: 168 + : + PC_PHYS_PORT_ID: 244 + ? + PORT_ID: 169 + : + PC_PHYS_PORT_ID: 245 + ? + PORT_ID: 170 + : + PC_PHYS_PORT_ID: 246 + ? + PORT_ID: 171 + : + PC_PHYS_PORT_ID: 247 + ? + PORT_ID: 172 + : + PC_PHYS_PORT_ID: 248 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 177 + : + PC_PHYS_PORT_ID: 258 + ? + PORT_ID: 178 + : + PC_PHYS_PORT_ID: 259 + ? + PORT_ID: 179 + : + PC_PHYS_PORT_ID: 260 + ? + PORT_ID: 180 + : + PC_PHYS_PORT_ID: 261 + ? + PORT_ID: 181 + : + PC_PHYS_PORT_ID: 262 + ? + PORT_ID: 182 + : + PC_PHYS_PORT_ID: 263 + ? + PORT_ID: 183 + : + PC_PHYS_PORT_ID: 264 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 188 + : + PC_PHYS_PORT_ID: 274 + ? + PORT_ID: 189 + : + PC_PHYS_PORT_ID: 275 + ? + PORT_ID: 190 + : + PC_PHYS_PORT_ID: 276 + ? + PORT_ID: 191 + : + PC_PHYS_PORT_ID: 277 + ? + PORT_ID: 192 + : + PC_PHYS_PORT_ID: 278 + ? + PORT_ID: 193 + : + PC_PHYS_PORT_ID: 279 + ? + PORT_ID: 194 + : + PC_PHYS_PORT_ID: 280 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 199 + : + PC_PHYS_PORT_ID: 290 + ? + PORT_ID: 200 + : + PC_PHYS_PORT_ID: 291 + ? + PORT_ID: 201 + : + PC_PHYS_PORT_ID: 292 + ? + PORT_ID: 202 + : + PC_PHYS_PORT_ID: 293 + ? + PORT_ID: 203 + : + PC_PHYS_PORT_ID: 294 + ? + PORT_ID: 204 + : + PC_PHYS_PORT_ID: 295 + ? + PORT_ID: 205 + : + PC_PHYS_PORT_ID: 296 + ? + PORT_ID: 209 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 210 + : + PC_PHYS_PORT_ID: 306 + ? + PORT_ID: 211 + : + PC_PHYS_PORT_ID: 307 + ? + PORT_ID: 212 + : + PC_PHYS_PORT_ID: 308 + ? + PORT_ID: 213 + : + PC_PHYS_PORT_ID: 309 + ? + PORT_ID: 214 + : + PC_PHYS_PORT_ID: 310 + ? + PORT_ID: 215 + : + PC_PHYS_PORT_ID: 311 + ? + PORT_ID: 216 + : + PC_PHYS_PORT_ID: 312 + ? + PORT_ID: 220 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 322 + ? + PORT_ID: 222 + : + PC_PHYS_PORT_ID: 323 + ? + PORT_ID: 223 + : + PC_PHYS_PORT_ID: 324 + ? + PORT_ID: 224 + : + PC_PHYS_PORT_ID: 325 + ? + PORT_ID: 225 + : + PC_PHYS_PORT_ID: 326 + ? + PORT_ID: 226 + : + PC_PHYS_PORT_ID: 327 + ? + PORT_ID: 227 + : + PC_PHYS_PORT_ID: 328 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 232 + : + PC_PHYS_PORT_ID: 338 + ? + PORT_ID: 233 + : + PC_PHYS_PORT_ID: 339 + ? + PORT_ID: 234 + : + PC_PHYS_PORT_ID: 340 + ? + PORT_ID: 235 + : + PC_PHYS_PORT_ID: 341 + ? + PORT_ID: 236 + : + PC_PHYS_PORT_ID: 342 + ? + PORT_ID: 237 + : + PC_PHYS_PORT_ID: 343 + ? + PORT_ID: 238 + : + PC_PHYS_PORT_ID: 344 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 243 + : + PC_PHYS_PORT_ID: 354 + ? + PORT_ID: 244 + : + PC_PHYS_PORT_ID: 355 + ? + PORT_ID: 245 + : + PC_PHYS_PORT_ID: 356 + ? + PORT_ID: 246 + : + PC_PHYS_PORT_ID: 357 + ? + PORT_ID: 247 + : + PC_PHYS_PORT_ID: 358 + ? + PORT_ID: 248 + : + PC_PHYS_PORT_ID: 359 + ? + PORT_ID: 249 + : + PC_PHYS_PORT_ID: 360 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 254 + : + PC_PHYS_PORT_ID: 370 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 371 + ? + PORT_ID: 256 + : + PC_PHYS_PORT_ID: 372 + ? + PORT_ID: 257 + : + PC_PHYS_PORT_ID: 373 + ? + PORT_ID: 258 + : + PC_PHYS_PORT_ID: 374 + ? + PORT_ID: 259 + : + PC_PHYS_PORT_ID: 375 + ? + PORT_ID: 260 + : + PC_PHYS_PORT_ID: 376 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 265 + : + PC_PHYS_PORT_ID: 386 + ? + PORT_ID: 266 + : + PC_PHYS_PORT_ID: 387 + ? + PORT_ID: 267 + : + PC_PHYS_PORT_ID: 388 + ? + PORT_ID: 268 + : + PC_PHYS_PORT_ID: 389 + ? + PORT_ID: 269 + : + PC_PHYS_PORT_ID: 390 + ? + PORT_ID: 270 + : + PC_PHYS_PORT_ID: 391 + ? + PORT_ID: 271 + : + PC_PHYS_PORT_ID: 392 + ? + PORT_ID: 275 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 276 + : + PC_PHYS_PORT_ID: 402 + ? + PORT_ID: 277 + : + PC_PHYS_PORT_ID: 403 + ? + PORT_ID: 278 + : + PC_PHYS_PORT_ID: 404 + ? + PORT_ID: 279 + : + PC_PHYS_PORT_ID: 405 + ? + PORT_ID: 280 + : + PC_PHYS_PORT_ID: 406 + ? + PORT_ID: 281 + : + PC_PHYS_PORT_ID: 407 + ? + PORT_ID: 282 + : + PC_PHYS_PORT_ID: 408 + ? + PORT_ID: 286 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 287 + : + PC_PHYS_PORT_ID: 418 + ? + PORT_ID: 288 + : + PC_PHYS_PORT_ID: 419 + ? + PORT_ID: 289 + : + PC_PHYS_PORT_ID: 420 + ? + PORT_ID: 290 + : + PC_PHYS_PORT_ID: 421 + ? + PORT_ID: 291 + : + PC_PHYS_PORT_ID: 422 + ? + PORT_ID: 292 + : + PC_PHYS_PORT_ID: 423 + ? + PORT_ID: 293 + : + PC_PHYS_PORT_ID: 424 + ? + PORT_ID: 297 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 298 + : + PC_PHYS_PORT_ID: 434 + ? + PORT_ID: 299 + : + PC_PHYS_PORT_ID: 435 + ? + PORT_ID: 300 + : + PC_PHYS_PORT_ID: 436 + ? + PORT_ID: 301 + : + PC_PHYS_PORT_ID: 437 + ? + PORT_ID: 302 + : + PC_PHYS_PORT_ID: 438 + ? + PORT_ID: 303 + : + PC_PHYS_PORT_ID: 439 + ? + PORT_ID: 304 + : + PC_PHYS_PORT_ID: 440 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 309 + : + PC_PHYS_PORT_ID: 450 + ? + PORT_ID: 310 + : + PC_PHYS_PORT_ID: 451 + ? + PORT_ID: 311 + : + PC_PHYS_PORT_ID: 452 + ? + PORT_ID: 312 + : + PC_PHYS_PORT_ID: 453 + ? + PORT_ID: 313 + : + PC_PHYS_PORT_ID: 454 + ? + PORT_ID: 314 + : + PC_PHYS_PORT_ID: 455 + ? + PORT_ID: 315 + : + PC_PHYS_PORT_ID: 456 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 320 + : + PC_PHYS_PORT_ID: 466 + ? + PORT_ID: 321 + : + PC_PHYS_PORT_ID: 467 + ? + PORT_ID: 322 + : + PC_PHYS_PORT_ID: 468 + ? + PORT_ID: 323 + : + PC_PHYS_PORT_ID: 469 + ? + PORT_ID: 324 + : + PC_PHYS_PORT_ID: 470 + ? + PORT_ID: 325 + : + PC_PHYS_PORT_ID: 471 + ? + PORT_ID: 326 + : + PC_PHYS_PORT_ID: 472 + ? + PORT_ID: 330 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 331 + : + PC_PHYS_PORT_ID: 482 + ? + PORT_ID: 332 + : + PC_PHYS_PORT_ID: 483 + ? + PORT_ID: 333 + : + PC_PHYS_PORT_ID: 484 + ? + PORT_ID: 334 + : + PC_PHYS_PORT_ID: 485 + ? + PORT_ID: 335 + : + PC_PHYS_PORT_ID: 486 + ? + PORT_ID: 336 + : + PC_PHYS_PORT_ID: 487 + ? + PORT_ID: 337 + : + PC_PHYS_PORT_ID: 488 + ? + PORT_ID: 341 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 342 + : + PC_PHYS_PORT_ID: 498 + ? + PORT_ID: 343 + : + PC_PHYS_PORT_ID: 499 + ? + PORT_ID: 344 + : + PC_PHYS_PORT_ID: 500 + ? + PORT_ID: 345 + : + PC_PHYS_PORT_ID: 501 + ? + PORT_ID: 346 + : + PC_PHYS_PORT_ID: 502 + ? + PORT_ID: 347 + : + PC_PHYS_PORT_ID: 503 + ? + PORT_ID: 348 + : + PC_PHYS_PORT_ID: 504 + ? + PORT_ID: 76 + : + PC_PHYS_PORT_ID: 513 + ? + PORT_ID: 274 + : + PC_PHYS_PORT_ID: 515 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: [[1, 8], + [11, 18], + [22, 29], + [33, 40], + [44, 51], + [55, 62], + [66, 73], + [77, 84], + [88, 95], + [99, 106], + [110, 117], + [121, 128], + [132, 139], + [143, 150], + [154, 161], + [165, 172], + [176, 183], + [187, 194], + [198, 205], + [209, 216], + [220, 227], + [231, 238], + [242, 249], + [253, 260], + [264, 271], + [275, 282], + [286, 293], + [297, 304], + [308, 315], + [319, 326], + [330, 337], + [341, 348]] + : + ENABLE: 0 + SPEED: 100000 + NUM_LANES: 1 + FEC_MODE: PC_FEC_RS544 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: [[76, 76], [274, 274]] + : + ENABLE: 0 + MAX_FRAME_SIZE: 9416 + SPEED: 10000 + NUM_LANES: 1 +... +--- +bcm_device: + 0: + global: + ftem_mem_entries: 65536 +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0 + + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm index 969e7447420e..b76c615c26f2 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm @@ -1169,95 +1169,3 @@ device: DEVICE_CONFIG: AUTOLOAD_BOARD_SETTINGS: 0 ... -## Baseline ---- -device: - 0: - TM_THD_CONFIG: - SKIP_BUFFER_RESERVATION: 1 - THRESHOLD_MODE: LOSSY_AND_LOSSLESS -... ---- -device: - 0: - TM_ING_THD_HEADROOM_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_HEADROOM_POOL_ID: [[0,3]] - : - LIMIT_CELLS: 0 - - TM_ING_THD_SERVICE_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_ING_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_OFFSET_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - - TM_EGR_THD_SERVICE_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_EGR_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_LIMIT_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - YELLOW_SHARED_LIMIT_CELLS: 0 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 - RED_SHARED_LIMIT_CELLS: 0 - RED_SHARED_RESUME_LIMIT_CELLS: 0 - - TM_THD_MC_EGR_SERVICE_POOL: - ? - BUFFER_POOL: [[0,1]] - TM_EGR_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_LIMIT_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - YELLOW_SHARED_LIMIT_CELLS: 0 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 - RED_SHARED_LIMIT_CELLS: 0 - RED_SHARED_RESUME_LIMIT_CELLS: 0 - - TM_ING_PORT_PRI_GRP: - ? - PORT_ID: [[1, 2], - [11, 12], - [22, 23], - [33, 34], - [44, 45], - [55, 56], - [66, 67], - [77, 78], - [88, 89], - [99, 100], - [110, 111], - [121, 122], - [132, 133], - [143, 144], - [154, 155], - [165, 166], - [176, 177], - [187, 188], - [198, 199], - [209, 210], - [220, 221], - [231, 232], - [242, 243], - [253, 254], - [264, 265], - [275, 276], - [286, 287], - [297, 298], - [308, 309], - [319, 320], - [330, 331], - [341, 342]] - TM_PRI_GRP_ID: 3 - : - PFC: 1 - LOSSLESS: 1 -... diff --git a/device/arista/x86_64-arista_7060x6_64pe/platform.json b/device/arista/x86_64-arista_7060x6_64pe/platform.json index 1d8ef14e4a93..045388d03a23 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/platform.json +++ b/device/arista/x86_64-arista_7060x6_64pe/platform.json @@ -333,6 +333,16 @@ "Ethernet1/3", "Ethernet1/5", "Ethernet1/7" + ], + "8x100G": [ + "Ethernet1/1", + "Ethernet1/2", + "Ethernet1/3", + "Ethernet1/4", + "Ethernet1/5", + "Ethernet1/6", + "Ethernet1/7", + "Ethernet1/8" ] } }, @@ -355,6 +365,16 @@ "Ethernet2/3", "Ethernet2/5", "Ethernet2/7" + ], + "8x100G": [ + "Ethernet2/1", + "Ethernet2/2", + "Ethernet2/3", + "Ethernet2/4", + "Ethernet2/5", + "Ethernet2/6", + "Ethernet2/7", + "Ethernet2/8" ] } }, @@ -377,6 +397,16 @@ "Ethernet3/3", "Ethernet3/5", "Ethernet3/7" + ], + "8x100G": [ + "Ethernet3/1", + "Ethernet3/2", + "Ethernet3/3", + "Ethernet3/4", + "Ethernet3/5", + "Ethernet3/6", + "Ethernet3/7", + "Ethernet3/8" ] } }, @@ -399,6 +429,16 @@ "Ethernet4/3", "Ethernet4/5", "Ethernet4/7" + ], + "8x100G": [ + "Ethernet4/1", + "Ethernet4/2", + "Ethernet4/3", + "Ethernet4/4", + "Ethernet4/5", + "Ethernet4/6", + "Ethernet4/7", + "Ethernet4/8" ] } }, @@ -421,6 +461,16 @@ "Ethernet5/3", "Ethernet5/5", "Ethernet5/7" + ], + "8x100G": [ + "Ethernet5/1", + "Ethernet5/2", + "Ethernet5/3", + "Ethernet5/4", + "Ethernet5/5", + "Ethernet5/6", + "Ethernet5/7", + "Ethernet5/8" ] } }, @@ -443,6 +493,16 @@ "Ethernet6/3", "Ethernet6/5", "Ethernet6/7" + ], + "8x100G": [ + "Ethernet6/1", + "Ethernet6/2", + "Ethernet6/3", + "Ethernet6/4", + "Ethernet6/5", + "Ethernet6/6", + "Ethernet6/7", + "Ethernet6/8" ] } }, @@ -465,6 +525,16 @@ "Ethernet7/3", "Ethernet7/5", "Ethernet7/7" + ], + "8x100G": [ + "Ethernet7/1", + "Ethernet7/2", + "Ethernet7/3", + "Ethernet7/4", + "Ethernet7/5", + "Ethernet7/6", + "Ethernet7/7", + "Ethernet7/8" ] } }, @@ -487,6 +557,16 @@ "Ethernet8/3", "Ethernet8/5", "Ethernet8/7" + ], + "8x100G": [ + "Ethernet8/1", + "Ethernet8/2", + "Ethernet8/3", + "Ethernet8/4", + "Ethernet8/5", + "Ethernet8/6", + "Ethernet8/7", + "Ethernet8/8" ] } }, @@ -509,6 +589,16 @@ "Ethernet9/3", "Ethernet9/5", "Ethernet9/7" + ], + "8x100G": [ + "Ethernet9/1", + "Ethernet9/2", + "Ethernet9/3", + "Ethernet9/4", + "Ethernet9/5", + "Ethernet9/6", + "Ethernet9/7", + "Ethernet9/8" ] } }, @@ -531,6 +621,16 @@ "Ethernet10/3", "Ethernet10/5", "Ethernet10/7" + ], + "8x100G": [ + "Ethernet10/1", + "Ethernet10/2", + "Ethernet10/3", + "Ethernet10/4", + "Ethernet10/5", + "Ethernet10/6", + "Ethernet10/7", + "Ethernet10/8" ] } }, @@ -553,6 +653,16 @@ "Ethernet11/3", "Ethernet11/5", "Ethernet11/7" + ], + "8x100G": [ + "Ethernet11/1", + "Ethernet11/2", + "Ethernet11/3", + "Ethernet11/4", + "Ethernet11/5", + "Ethernet11/6", + "Ethernet11/7", + "Ethernet11/8" ] } }, @@ -575,6 +685,16 @@ "Ethernet12/3", "Ethernet12/5", "Ethernet12/7" + ], + "8x100G": [ + "Ethernet12/1", + "Ethernet12/2", + "Ethernet12/3", + "Ethernet12/4", + "Ethernet12/5", + "Ethernet12/6", + "Ethernet12/7", + "Ethernet12/8" ] } }, @@ -597,6 +717,16 @@ "Ethernet13/3", "Ethernet13/5", "Ethernet13/7" + ], + "8x100G": [ + "Ethernet13/1", + "Ethernet13/2", + "Ethernet13/3", + "Ethernet13/4", + "Ethernet13/5", + "Ethernet13/6", + "Ethernet13/7", + "Ethernet13/8" ] } }, @@ -619,6 +749,16 @@ "Ethernet14/3", "Ethernet14/5", "Ethernet14/7" + ], + "8x100G": [ + "Ethernet14/1", + "Ethernet14/2", + "Ethernet14/3", + "Ethernet14/4", + "Ethernet14/5", + "Ethernet14/6", + "Ethernet14/7", + "Ethernet14/8" ] } }, @@ -641,6 +781,16 @@ "Ethernet15/3", "Ethernet15/5", "Ethernet15/7" + ], + "8x100G": [ + "Ethernet15/1", + "Ethernet15/2", + "Ethernet15/3", + "Ethernet15/4", + "Ethernet15/5", + "Ethernet15/6", + "Ethernet15/7", + "Ethernet15/8" ] } }, @@ -663,6 +813,16 @@ "Ethernet16/3", "Ethernet16/5", "Ethernet16/7" + ], + "8x100G": [ + "Ethernet16/1", + "Ethernet16/2", + "Ethernet16/3", + "Ethernet16/4", + "Ethernet16/5", + "Ethernet16/6", + "Ethernet16/7", + "Ethernet16/8" ] } }, @@ -685,6 +845,16 @@ "Ethernet17/3", "Ethernet17/5", "Ethernet17/7" + ], + "8x100G": [ + "Ethernet17/1", + "Ethernet17/2", + "Ethernet17/3", + "Ethernet17/4", + "Ethernet17/5", + "Ethernet17/6", + "Ethernet17/7", + "Ethernet17/8" ] } }, @@ -707,6 +877,16 @@ "Ethernet18/3", "Ethernet18/5", "Ethernet18/7" + ], + "8x100G": [ + "Ethernet18/1", + "Ethernet18/2", + "Ethernet18/3", + "Ethernet18/4", + "Ethernet18/5", + "Ethernet18/6", + "Ethernet18/7", + "Ethernet18/8" ] } }, @@ -729,6 +909,16 @@ "Ethernet19/3", "Ethernet19/5", "Ethernet19/7" + ], + "8x100G": [ + "Ethernet19/1", + "Ethernet19/2", + "Ethernet19/3", + "Ethernet19/4", + "Ethernet19/5", + "Ethernet19/6", + "Ethernet19/7", + "Ethernet19/8" ] } }, @@ -751,6 +941,16 @@ "Ethernet20/3", "Ethernet20/5", "Ethernet20/7" + ], + "8x100G": [ + "Ethernet20/1", + "Ethernet20/2", + "Ethernet20/3", + "Ethernet20/4", + "Ethernet20/5", + "Ethernet20/6", + "Ethernet20/7", + "Ethernet20/8" ] } }, @@ -773,6 +973,16 @@ "Ethernet21/3", "Ethernet21/5", "Ethernet21/7" + ], + "8x100G": [ + "Ethernet21/1", + "Ethernet21/2", + "Ethernet21/3", + "Ethernet21/4", + "Ethernet21/5", + "Ethernet21/6", + "Ethernet21/7", + "Ethernet21/8" ] } }, @@ -795,6 +1005,16 @@ "Ethernet22/3", "Ethernet22/5", "Ethernet22/7" + ], + "8x100G": [ + "Ethernet22/1", + "Ethernet22/2", + "Ethernet22/3", + "Ethernet22/4", + "Ethernet22/5", + "Ethernet22/6", + "Ethernet22/7", + "Ethernet22/8" ] } }, @@ -817,6 +1037,16 @@ "Ethernet23/3", "Ethernet23/5", "Ethernet23/7" + ], + "8x100G": [ + "Ethernet23/1", + "Ethernet23/2", + "Ethernet23/3", + "Ethernet23/4", + "Ethernet23/5", + "Ethernet23/6", + "Ethernet23/7", + "Ethernet23/8" ] } }, @@ -839,6 +1069,16 @@ "Ethernet24/3", "Ethernet24/5", "Ethernet24/7" + ], + "8x100G": [ + "Ethernet24/1", + "Ethernet24/2", + "Ethernet24/3", + "Ethernet24/4", + "Ethernet24/5", + "Ethernet24/6", + "Ethernet24/7", + "Ethernet24/8" ] } }, @@ -861,6 +1101,16 @@ "Ethernet25/3", "Ethernet25/5", "Ethernet25/7" + ], + "8x100G": [ + "Ethernet25/1", + "Ethernet25/2", + "Ethernet25/3", + "Ethernet25/4", + "Ethernet25/5", + "Ethernet25/6", + "Ethernet25/7", + "Ethernet25/8" ] } }, @@ -883,6 +1133,16 @@ "Ethernet26/3", "Ethernet26/5", "Ethernet26/7" + ], + "8x100G": [ + "Ethernet26/1", + "Ethernet26/2", + "Ethernet26/3", + "Ethernet26/4", + "Ethernet26/5", + "Ethernet26/6", + "Ethernet26/7", + "Ethernet26/8" ] } }, @@ -905,6 +1165,16 @@ "Ethernet27/3", "Ethernet27/5", "Ethernet27/7" + ], + "8x100G": [ + "Ethernet27/1", + "Ethernet27/2", + "Ethernet27/3", + "Ethernet27/4", + "Ethernet27/5", + "Ethernet27/6", + "Ethernet27/7", + "Ethernet27/8" ] } }, @@ -927,6 +1197,16 @@ "Ethernet28/3", "Ethernet28/5", "Ethernet28/7" + ], + "8x100G": [ + "Ethernet28/1", + "Ethernet28/2", + "Ethernet28/3", + "Ethernet28/4", + "Ethernet28/5", + "Ethernet28/6", + "Ethernet28/7", + "Ethernet28/8" ] } }, @@ -949,6 +1229,16 @@ "Ethernet29/3", "Ethernet29/5", "Ethernet29/7" + ], + "8x100G": [ + "Ethernet29/1", + "Ethernet29/2", + "Ethernet29/3", + "Ethernet29/4", + "Ethernet29/5", + "Ethernet29/6", + "Ethernet29/7", + "Ethernet29/8" ] } }, @@ -971,6 +1261,16 @@ "Ethernet30/3", "Ethernet30/5", "Ethernet30/7" + ], + "8x100G": [ + "Ethernet30/1", + "Ethernet30/2", + "Ethernet30/3", + "Ethernet30/4", + "Ethernet30/5", + "Ethernet30/6", + "Ethernet30/7", + "Ethernet30/8" ] } }, @@ -993,6 +1293,16 @@ "Ethernet31/3", "Ethernet31/5", "Ethernet31/7" + ], + "8x100G": [ + "Ethernet31/1", + "Ethernet31/2", + "Ethernet31/3", + "Ethernet31/4", + "Ethernet31/5", + "Ethernet31/6", + "Ethernet31/7", + "Ethernet31/8" ] } }, @@ -1015,6 +1325,16 @@ "Ethernet32/3", "Ethernet32/5", "Ethernet32/7" + ], + "8x100G": [ + "Ethernet32/1", + "Ethernet32/2", + "Ethernet32/3", + "Ethernet32/4", + "Ethernet32/5", + "Ethernet32/6", + "Ethernet32/7", + "Ethernet32/8" ] } }, @@ -1037,6 +1357,16 @@ "Ethernet33/3", "Ethernet33/5", "Ethernet33/7" + ], + "8x100G": [ + "Ethernet33/1", + "Ethernet33/2", + "Ethernet33/3", + "Ethernet33/4", + "Ethernet33/5", + "Ethernet33/6", + "Ethernet33/7", + "Ethernet33/8" ] } }, @@ -1059,6 +1389,16 @@ "Ethernet34/3", "Ethernet34/5", "Ethernet34/7" + ], + "8x100G": [ + "Ethernet34/1", + "Ethernet34/2", + "Ethernet34/3", + "Ethernet34/4", + "Ethernet34/5", + "Ethernet34/6", + "Ethernet34/7", + "Ethernet34/8" ] } }, @@ -1081,6 +1421,16 @@ "Ethernet35/3", "Ethernet35/5", "Ethernet35/7" + ], + "8x100G": [ + "Ethernet35/1", + "Ethernet35/2", + "Ethernet35/3", + "Ethernet35/4", + "Ethernet35/5", + "Ethernet35/6", + "Ethernet35/7", + "Ethernet35/8" ] } }, @@ -1103,6 +1453,16 @@ "Ethernet36/3", "Ethernet36/5", "Ethernet36/7" + ], + "8x100G": [ + "Ethernet36/1", + "Ethernet36/2", + "Ethernet36/3", + "Ethernet36/4", + "Ethernet36/5", + "Ethernet36/6", + "Ethernet36/7", + "Ethernet36/8" ] } }, @@ -1125,6 +1485,16 @@ "Ethernet37/3", "Ethernet37/5", "Ethernet37/7" + ], + "8x100G": [ + "Ethernet37/1", + "Ethernet37/2", + "Ethernet37/3", + "Ethernet37/4", + "Ethernet37/5", + "Ethernet37/6", + "Ethernet37/7", + "Ethernet37/8" ] } }, @@ -1147,6 +1517,16 @@ "Ethernet38/3", "Ethernet38/5", "Ethernet38/7" + ], + "8x100G": [ + "Ethernet38/1", + "Ethernet38/2", + "Ethernet38/3", + "Ethernet38/4", + "Ethernet38/5", + "Ethernet38/6", + "Ethernet38/7", + "Ethernet38/8" ] } }, @@ -1169,6 +1549,16 @@ "Ethernet39/3", "Ethernet39/5", "Ethernet39/7" + ], + "8x100G": [ + "Ethernet39/1", + "Ethernet39/2", + "Ethernet39/3", + "Ethernet39/4", + "Ethernet39/5", + "Ethernet39/6", + "Ethernet39/7", + "Ethernet39/8" ] } }, @@ -1191,6 +1581,16 @@ "Ethernet40/3", "Ethernet40/5", "Ethernet40/7" + ], + "8x100G": [ + "Ethernet40/1", + "Ethernet40/2", + "Ethernet40/3", + "Ethernet40/4", + "Ethernet40/5", + "Ethernet40/6", + "Ethernet40/7", + "Ethernet40/8" ] } }, @@ -1213,6 +1613,16 @@ "Ethernet41/3", "Ethernet41/5", "Ethernet41/7" + ], + "8x100G": [ + "Ethernet41/1", + "Ethernet41/2", + "Ethernet41/3", + "Ethernet41/4", + "Ethernet41/5", + "Ethernet41/6", + "Ethernet41/7", + "Ethernet41/8" ] } }, @@ -1235,6 +1645,16 @@ "Ethernet42/3", "Ethernet42/5", "Ethernet42/7" + ], + "8x100G": [ + "Ethernet42/1", + "Ethernet42/2", + "Ethernet42/3", + "Ethernet42/4", + "Ethernet42/5", + "Ethernet42/6", + "Ethernet42/7", + "Ethernet42/8" ] } }, @@ -1257,6 +1677,16 @@ "Ethernet43/3", "Ethernet43/5", "Ethernet43/7" + ], + "8x100G": [ + "Ethernet43/1", + "Ethernet43/2", + "Ethernet43/3", + "Ethernet43/4", + "Ethernet43/5", + "Ethernet43/6", + "Ethernet43/7", + "Ethernet43/8" ] } }, @@ -1279,6 +1709,16 @@ "Ethernet44/3", "Ethernet44/5", "Ethernet44/7" + ], + "8x100G": [ + "Ethernet44/1", + "Ethernet44/2", + "Ethernet44/3", + "Ethernet44/4", + "Ethernet44/5", + "Ethernet44/6", + "Ethernet44/7", + "Ethernet44/8" ] } }, @@ -1301,6 +1741,16 @@ "Ethernet45/3", "Ethernet45/5", "Ethernet45/7" + ], + "8x100G": [ + "Ethernet45/1", + "Ethernet45/2", + "Ethernet45/3", + "Ethernet45/4", + "Ethernet45/5", + "Ethernet45/6", + "Ethernet45/7", + "Ethernet45/8" ] } }, @@ -1323,6 +1773,16 @@ "Ethernet46/3", "Ethernet46/5", "Ethernet46/7" + ], + "8x100G": [ + "Ethernet46/1", + "Ethernet46/2", + "Ethernet46/3", + "Ethernet46/4", + "Ethernet46/5", + "Ethernet46/6", + "Ethernet46/7", + "Ethernet46/8" ] } }, @@ -1345,6 +1805,16 @@ "Ethernet47/3", "Ethernet47/5", "Ethernet47/7" + ], + "8x100G": [ + "Ethernet47/1", + "Ethernet47/2", + "Ethernet47/3", + "Ethernet47/4", + "Ethernet47/5", + "Ethernet47/6", + "Ethernet47/7", + "Ethernet47/8" ] } }, @@ -1367,6 +1837,16 @@ "Ethernet48/3", "Ethernet48/5", "Ethernet48/7" + ], + "8x100G": [ + "Ethernet48/1", + "Ethernet48/2", + "Ethernet48/3", + "Ethernet48/4", + "Ethernet48/5", + "Ethernet48/6", + "Ethernet48/7", + "Ethernet48/8" ] } }, @@ -1389,6 +1869,16 @@ "Ethernet49/3", "Ethernet49/5", "Ethernet49/7" + ], + "8x100G": [ + "Ethernet49/1", + "Ethernet49/2", + "Ethernet49/3", + "Ethernet49/4", + "Ethernet49/5", + "Ethernet49/6", + "Ethernet49/7", + "Ethernet49/8" ] } }, @@ -1411,6 +1901,16 @@ "Ethernet50/3", "Ethernet50/5", "Ethernet50/7" + ], + "8x100G": [ + "Ethernet50/1", + "Ethernet50/2", + "Ethernet50/3", + "Ethernet50/4", + "Ethernet50/5", + "Ethernet50/6", + "Ethernet50/7", + "Ethernet50/8" ] } }, @@ -1433,6 +1933,16 @@ "Ethernet51/3", "Ethernet51/5", "Ethernet51/7" + ], + "8x100G": [ + "Ethernet51/1", + "Ethernet51/2", + "Ethernet51/3", + "Ethernet51/4", + "Ethernet51/5", + "Ethernet51/6", + "Ethernet51/7", + "Ethernet51/8" ] } }, @@ -1455,6 +1965,16 @@ "Ethernet52/3", "Ethernet52/5", "Ethernet52/7" + ], + "8x100G": [ + "Ethernet52/1", + "Ethernet52/2", + "Ethernet52/3", + "Ethernet52/4", + "Ethernet52/5", + "Ethernet52/6", + "Ethernet52/7", + "Ethernet52/8" ] } }, @@ -1477,6 +1997,16 @@ "Ethernet53/3", "Ethernet53/5", "Ethernet53/7" + ], + "8x100G": [ + "Ethernet53/1", + "Ethernet53/2", + "Ethernet53/3", + "Ethernet53/4", + "Ethernet53/5", + "Ethernet53/6", + "Ethernet53/7", + "Ethernet53/8" ] } }, @@ -1499,6 +2029,16 @@ "Ethernet54/3", "Ethernet54/5", "Ethernet54/7" + ], + "8x100G": [ + "Ethernet54/1", + "Ethernet54/2", + "Ethernet54/3", + "Ethernet54/4", + "Ethernet54/5", + "Ethernet54/6", + "Ethernet54/7", + "Ethernet54/8" ] } }, @@ -1521,6 +2061,16 @@ "Ethernet55/3", "Ethernet55/5", "Ethernet55/7" + ], + "8x100G": [ + "Ethernet55/1", + "Ethernet55/2", + "Ethernet55/3", + "Ethernet55/4", + "Ethernet55/5", + "Ethernet55/6", + "Ethernet55/7", + "Ethernet55/8" ] } }, @@ -1543,6 +2093,16 @@ "Ethernet56/3", "Ethernet56/5", "Ethernet56/7" + ], + "8x100G": [ + "Ethernet56/1", + "Ethernet56/2", + "Ethernet56/3", + "Ethernet56/4", + "Ethernet56/5", + "Ethernet56/6", + "Ethernet56/7", + "Ethernet56/8" ] } }, @@ -1565,6 +2125,16 @@ "Ethernet57/3", "Ethernet57/5", "Ethernet57/7" + ], + "8x100G": [ + "Ethernet57/1", + "Ethernet57/2", + "Ethernet57/3", + "Ethernet57/4", + "Ethernet57/5", + "Ethernet57/6", + "Ethernet57/7", + "Ethernet57/8" ] } }, @@ -1587,6 +2157,16 @@ "Ethernet58/3", "Ethernet58/5", "Ethernet58/7" + ], + "8x100G": [ + "Ethernet58/1", + "Ethernet58/2", + "Ethernet58/3", + "Ethernet58/4", + "Ethernet58/5", + "Ethernet58/6", + "Ethernet58/7", + "Ethernet58/8" ] } }, @@ -1609,6 +2189,16 @@ "Ethernet59/3", "Ethernet59/5", "Ethernet59/7" + ], + "8x100G": [ + "Ethernet59/1", + "Ethernet59/2", + "Ethernet59/3", + "Ethernet59/4", + "Ethernet59/5", + "Ethernet59/6", + "Ethernet59/7", + "Ethernet59/8" ] } }, @@ -1631,6 +2221,16 @@ "Ethernet60/3", "Ethernet60/5", "Ethernet60/7" + ], + "8x100G": [ + "Ethernet60/1", + "Ethernet60/2", + "Ethernet60/3", + "Ethernet60/4", + "Ethernet60/5", + "Ethernet60/6", + "Ethernet60/7", + "Ethernet60/8" ] } }, @@ -1653,6 +2253,16 @@ "Ethernet61/3", "Ethernet61/5", "Ethernet61/7" + ], + "8x100G": [ + "Ethernet61/1", + "Ethernet61/2", + "Ethernet61/3", + "Ethernet61/4", + "Ethernet61/5", + "Ethernet61/6", + "Ethernet61/7", + "Ethernet61/8" ] } }, @@ -1675,6 +2285,16 @@ "Ethernet62/3", "Ethernet62/5", "Ethernet62/7" + ], + "8x100G": [ + "Ethernet62/1", + "Ethernet62/2", + "Ethernet62/3", + "Ethernet62/4", + "Ethernet62/5", + "Ethernet62/6", + "Ethernet62/7", + "Ethernet62/8" ] } }, @@ -1697,6 +2317,16 @@ "Ethernet63/3", "Ethernet63/5", "Ethernet63/7" + ], + "8x100G": [ + "Ethernet63/1", + "Ethernet63/2", + "Ethernet63/3", + "Ethernet63/4", + "Ethernet63/5", + "Ethernet63/6", + "Ethernet63/7", + "Ethernet63/8" ] } }, @@ -1719,6 +2349,16 @@ "Ethernet64/3", "Ethernet64/5", "Ethernet64/7" + ], + "8x100G": [ + "Ethernet64/1", + "Ethernet64/2", + "Ethernet64/3", + "Ethernet64/4", + "Ethernet64/5", + "Ethernet64/6", + "Ethernet64/7", + "Ethernet64/8" ] } }, diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2 index de7cac15435a..0433fd6c1cf5 100644 --- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2 +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2 @@ -1050,3 +1050,4 @@ serdes_preemphasis_117=0x105004 {{ mmu_sock }} {{ IPinIP_sock }} phy_an_lt_msft=1 +phy_unlos_msft=1 diff --git a/device/arista/x86_64-arista_7800_sup/platform.json b/device/arista/x86_64-arista_7800_sup/platform.json index 0f9e91af98e8..85f2949ac04d 100644 --- a/device/arista/x86_64-arista_7800_sup/platform.json +++ b/device/arista/x86_64-arista_7800_sup/platform.json @@ -210,7 +210,40 @@ ] } ], - "thermals": [], + "thermals": [ + { + "name": "Supervisor front", + "controllable": false + }, + { + "name": "Physical id 0", + "controllable": false + }, + { + "name": "CPU core0", + "controllable": false + }, + { + "name": "CPU core1", + "controllable": false + }, + { + "name": "CPU core2", + "controllable": false + }, + { + "name": "CPU core3", + "controllable": false + }, + { + "name": "CPU core4", + "controllable": false + }, + { + "name": "CPU core5", + "controllable": false + } + ], "sfps": [] }, "interfaces": {} diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 index efee1fee3e2c..b036683d1dba 100644 --- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 @@ -40,7 +40,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2 index 5825848d4a4e..38ee97c304e8 100644 --- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2 @@ -40,7 +40,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2 index 35a7f535744c..6990e4de7a9b 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2 @@ -40,7 +40,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2 index 18bf47b013eb..857d7f26511e 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2 @@ -40,7 +40,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2 index b49aea94064b..1aea50e1fd28 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2 @@ -40,7 +40,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2 index 9fa59b61c065..19caf55f0009 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2 @@ -40,7 +40,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2 index 615280ab2ecb..2af84b9a9c55 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2 @@ -40,7 +40,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2 index 407058909c69..b4c4ff9ccf0b 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2 @@ -40,7 +40,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/media_settings.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/media_settings.json index 7ce47e003202..e9f452042347 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/media_settings.json +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/media_settings.json @@ -13,44 +13,44 @@ "lane7": "0x88" }, "post1": { - "lane0": "-0x3", - "lane1": "-0x5", - "lane2": "-0x7", - "lane3": "-0x1", - "lane4": "-0xc", - "lane5": "-0x5", - "lane6": "-0x3", - "lane7": "-0xe" + "lane0": "0xfffffffd", + "lane1": "0xfffffffb", + "lane2": "0xfffffff9", + "lane3": "0xffffffff", + "lane4": "0xfffffff4", + "lane5": "0xfffffffb", + "lane6": "0xfffffffd", + "lane7": "0xfffffff2" }, "post2": { "lane0": "0x0", - "lane1": "-0x2", - "lane2": "-0x2", - "lane3": "-0x3", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffd", "lane4": "0x0", - "lane5": "-0x2", + "lane5": "0xfffffffe", "lane6": "0x0", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x3", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x3", - "lane5": "-0x3", - "lane6": "-0x1", - "lane7": "-0x4" + "lane0": "0xffffffff", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xffffffff", + "lane7": "0xfffffffc" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0x10", - "lane2": "-0x10", - "lane3": "-0x11", - "lane4": "-0x10", - "lane5": "-0x10", - "lane6": "-0x10", - "lane7": "-0xe" + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xffffffef", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff2" }, "pre2": { "lane0": "0x2", @@ -71,10 +71,10 @@ "lane3": "0x4b" }, "post1": { - "lane0": "-0x1d", - "lane1": "-0x19", - "lane2": "-0x17", - "lane3": "-0x15" + "lane0": "0xffffffe3", + "lane1": "0xffffffe7", + "lane2": "0xffffffe9", + "lane3": "0xffffffeb" }, "post2": { "lane0": "0x0", @@ -89,10 +89,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x8", - "lane1": "-0x7", - "lane2": "-0x5", - "lane3": "-0x4" + "lane0": "0xfffffff8", + "lane1": "0xfffffff9", + "lane2": "0xfffffffb", + "lane3": "0xfffffffc" }, "pre2": { "lane0": "0x0", @@ -115,44 +115,44 @@ "lane7": "0x8d" }, "post1": { - "lane0": "-0x5", - "lane1": "-0x8", - "lane2": "-0xc", - "lane3": "-0x5", - "lane4": "-0x8", - "lane5": "-0xa", - "lane6": "-0x5", - "lane7": "-0x8" + "lane0": "0xfffffffb", + "lane1": "0xfffffff8", + "lane2": "0xfffffff4", + "lane3": "0xfffffffb", + "lane4": "0xfffffff8", + "lane5": "0xfffffff6", + "lane6": "0xfffffffb", + "lane7": "0xfffffff8" }, "post2": { - "lane0": "-0x2", - "lane1": "-0x3", + "lane0": "0xfffffffe", + "lane1": "0xfffffffd", "lane2": "0x0", - "lane3": "-0x2", - "lane4": "-0x3", - "lane5": "-0x2", - "lane6": "-0x2", - "lane7": "-0x3" + "lane3": "0xfffffffe", + "lane4": "0xfffffffd", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffd" }, "post3": { - "lane0": "-0x3", - "lane1": "-0x1", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x1", - "lane5": "-0x3", - "lane6": "-0x3", - "lane7": "-0x1" + "lane0": "0xfffffffd", + "lane1": "0xffffffff", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xffffffff", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xf", - "lane2": "-0x10", - "lane3": "-0x10", - "lane4": "-0xf", - "lane5": "-0x14", - "lane6": "-0x10", - "lane7": "-0xf" + "lane0": "0xfffffff0", + "lane1": "0xfffffff1", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff1", + "lane5": "0xffffffec", + "lane6": "0xfffffff0", + "lane7": "0xfffffff1" }, "pre2": { "lane0": "0x3", @@ -173,10 +173,10 @@ "lane3": "0x4e" }, "post1": { - "lane0": "-0x14", - "lane1": "-0x14", - "lane2": "-0x16", - "lane3": "-0x16" + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffea", + "lane3": "0xffffffea" }, "post2": { "lane0": "0x0", @@ -191,10 +191,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x5", - "lane1": "-0x5", - "lane2": "-0x5", - "lane3": "-0x5" + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", @@ -217,44 +217,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0xc", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0x7", - "lane4": "-0x3", - "lane5": "-0xe", - "lane6": "-0x7", - "lane7": "-0x3" + "lane0": "0xfffffff4", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffffd", + "lane5": "0xfffffff2", + "lane6": "0xfffffff9", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", - "lane3": "-0x2", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", "lane4": "0x0", "lane5": "0x0", - "lane6": "-0x2", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x3", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x1", - "lane5": "-0x4", - "lane6": "-0x3", - "lane7": "-0x1" + "lane0": "0xfffffffd", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xffffffff", + "lane5": "0xfffffffc", + "lane6": "0xfffffffd", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0x10", - "lane4": "-0x10", - "lane5": "-0xe", - "lane6": "-0x10", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff2", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -275,10 +275,10 @@ "lane3": "0x55" }, "post1": { - "lane0": "-0x17", - "lane1": "-0x17", - "lane2": "-0x19", - "lane3": "-0x19" + "lane0": "0xffffffe9", + "lane1": "0xffffffe9", + "lane2": "0xffffffe7", + "lane3": "0xffffffe7" }, "post2": { "lane0": "0x0", @@ -293,10 +293,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x5", - "lane1": "-0x5", - "lane2": "-0x7", - "lane3": "-0x7" + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9" }, "pre2": { "lane0": "0x0", @@ -319,44 +319,44 @@ "lane7": "0x8d" }, "post1": { - "lane0": "-0xc", - "lane1": "-0x5", - "lane2": "-0x8", - "lane3": "-0x5", - "lane4": "-0xc", - "lane5": "-0x8", - "lane6": "-0x8", - "lane7": "-0x5" + "lane0": "0xfffffff4", + "lane1": "0xfffffffb", + "lane2": "0xfffffff8", + "lane3": "0xfffffffb", + "lane4": "0xfffffff4", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffffb" }, "post2": { "lane0": "0x0", - "lane1": "-0x2", - "lane2": "-0x3", - "lane3": "-0x2", + "lane1": "0xfffffffe", + "lane2": "0xfffffffd", + "lane3": "0xfffffffe", "lane4": "0x0", - "lane5": "-0x3", - "lane6": "-0x3", - "lane7": "-0x2" + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffe" }, "post3": { - "lane0": "-0x3", - "lane1": "-0x3", - "lane2": "-0x1", - "lane3": "-0x3", - "lane4": "-0x3", - "lane5": "-0x1", - "lane6": "-0x1", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xffffffff", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xfffffffd" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0x10", - "lane2": "-0xf", - "lane3": "-0x10", - "lane4": "-0x10", - "lane5": "-0xf", - "lane6": "-0xf", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff1", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -377,10 +377,10 @@ "lane3": "0x59" }, "post1": { - "lane0": "-0x1d", - "lane1": "-0x1d", - "lane2": "-0x1d", - "lane3": "-0x1d" + "lane0": "0xffffffe3", + "lane1": "0xffffffe3", + "lane2": "0xffffffe3", + "lane3": "0xffffffe3" }, "post2": { "lane0": "0x0", @@ -395,10 +395,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x8", - "lane1": "-0x8", - "lane2": "-0x8", - "lane3": "-0x8" + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" }, "pre2": { "lane0": "0x0", @@ -421,44 +421,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0xc", - "lane2": "-0xe", - "lane3": "-0x7", - "lane4": "-0xe", - "lane5": "-0x7", - "lane6": "-0xe", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffff4", + "lane2": "0xfffffff2", + "lane3": "0xfffffff9", + "lane4": "0xfffffff2", + "lane5": "0xfffffff9", + "lane6": "0xfffffff2", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", "lane2": "0x0", - "lane3": "-0x2", + "lane3": "0xfffffffe", "lane4": "0x0", - "lane5": "-0x2", + "lane5": "0xfffffffe", "lane6": "0x0", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x3", - "lane2": "-0x4", - "lane3": "-0x3", - "lane4": "-0x4", - "lane5": "-0x3", - "lane6": "-0x4", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xfffffffd", + "lane2": "0xfffffffc", + "lane3": "0xfffffffd", + "lane4": "0xfffffffc", + "lane5": "0xfffffffd", + "lane6": "0xfffffffc", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0x10", - "lane2": "-0xe", - "lane3": "-0x10", - "lane4": "-0xe", - "lane5": "-0x10", - "lane6": "-0xe", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff2", + "lane3": "0xfffffff0", + "lane4": "0xfffffff2", + "lane5": "0xfffffff0", + "lane6": "0xfffffff2", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -479,10 +479,10 @@ "lane3": "0x59" }, "post1": { - "lane0": "-0x1d", - "lane1": "-0x1d", - "lane2": "-0x1d", - "lane3": "-0x1d" + "lane0": "0xffffffe3", + "lane1": "0xffffffe3", + "lane2": "0xffffffe3", + "lane3": "0xffffffe3" }, "post2": { "lane0": "0x0", @@ -497,10 +497,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x8", - "lane1": "-0x8", - "lane2": "-0x8", - "lane3": "-0x8" + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" }, "pre2": { "lane0": "0x0", @@ -523,44 +523,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0x7", - "lane4": "-0x3", - "lane5": "-0xe", - "lane6": "-0x7", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffffd", + "lane5": "0xfffffff2", + "lane6": "0xfffffff9", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", - "lane3": "-0x2", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", "lane4": "0x0", "lane5": "0x0", - "lane6": "-0x2", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x1", - "lane5": "-0x4", - "lane6": "-0x3", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xffffffff", + "lane5": "0xfffffffc", + "lane6": "0xfffffffd", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0x10", - "lane4": "-0x10", - "lane5": "-0xe", - "lane6": "-0x10", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff2", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -581,10 +581,10 @@ "lane3": "0x59" }, "post1": { - "lane0": "-0x1d", - "lane1": "-0x1d", - "lane2": "-0x1d", - "lane3": "-0x1d" + "lane0": "0xffffffe3", + "lane1": "0xffffffe3", + "lane2": "0xffffffe3", + "lane3": "0xffffffe3" }, "post2": { "lane0": "0x0", @@ -599,10 +599,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x8", - "lane1": "-0x8", - "lane2": "-0x8", - "lane3": "-0x8" + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" }, "pre2": { "lane0": "0x0", @@ -625,44 +625,44 @@ "lane7": "0x88" }, "post1": { - "lane0": "-0x3", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0xe", - "lane4": "-0x3", - "lane5": "-0x7", - "lane6": "-0x7", - "lane7": "-0xe" + "lane0": "0xfffffffd", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff2", + "lane4": "0xfffffffd", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff2" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", + "lane2": "0xfffffffe", "lane3": "0x0", "lane4": "0x0", - "lane5": "-0x2", - "lane6": "-0x2", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x4", - "lane4": "-0x1", - "lane5": "-0x3", - "lane6": "-0x3", - "lane7": "-0x4" + "lane0": "0xffffffff", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffc", + "lane4": "0xffffffff", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffc" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0xe", - "lane4": "-0x10", - "lane5": "-0x10", - "lane6": "-0x10", - "lane7": "-0xe" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff2", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff2" }, "pre2": { "lane0": "0x2", @@ -683,10 +683,10 @@ "lane3": "0x59" }, "post1": { - "lane0": "-0x1d", - "lane1": "-0x1d", - "lane2": "-0x1d", - "lane3": "-0x1d" + "lane0": "0xffffffe3", + "lane1": "0xffffffe3", + "lane2": "0xffffffe3", + "lane3": "0xffffffe3" }, "post2": { "lane0": "0x0", @@ -701,10 +701,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x8", - "lane1": "-0x8", - "lane2": "-0x8", - "lane3": "-0x8" + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" }, "pre2": { "lane0": "0x0", @@ -727,44 +727,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0x3", - "lane2": "-0xe", - "lane3": "-0x7", - "lane4": "-0xe", - "lane5": "-0x7", - "lane6": "-0xe", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffff2", + "lane3": "0xfffffff9", + "lane4": "0xfffffff2", + "lane5": "0xfffffff9", + "lane6": "0xfffffff2", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", "lane2": "0x0", - "lane3": "-0x2", + "lane3": "0xfffffffe", "lane4": "0x0", - "lane5": "-0x2", + "lane5": "0xfffffffe", "lane6": "0x0", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x1", - "lane2": "-0x4", - "lane3": "-0x3", - "lane4": "-0x4", - "lane5": "-0x3", - "lane6": "-0x4", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xfffffffc", + "lane3": "0xfffffffd", + "lane4": "0xfffffffc", + "lane5": "0xfffffffd", + "lane6": "0xfffffffc", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0x10", - "lane2": "-0xe", - "lane3": "-0x10", - "lane4": "-0xe", - "lane5": "-0x10", - "lane6": "-0xe", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff2", + "lane3": "0xfffffff0", + "lane4": "0xfffffff2", + "lane5": "0xfffffff0", + "lane6": "0xfffffff2", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -785,10 +785,10 @@ "lane3": "0x59" }, "post1": { - "lane0": "-0x1d", - "lane1": "-0x1d", - "lane2": "-0x1d", - "lane3": "-0x1d" + "lane0": "0xffffffe3", + "lane1": "0xffffffe3", + "lane2": "0xffffffe3", + "lane3": "0xffffffe3" }, "post2": { "lane0": "0x0", @@ -803,10 +803,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x8", - "lane1": "-0x8", - "lane2": "-0x8", - "lane3": "-0x8" + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" }, "pre2": { "lane0": "0x0", @@ -829,44 +829,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0x7", - "lane4": "-0x3", - "lane5": "-0xe", - "lane6": "-0x7", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffffd", + "lane5": "0xfffffff2", + "lane6": "0xfffffff9", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", - "lane3": "-0x2", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", "lane4": "0x0", "lane5": "0x0", - "lane6": "-0x2", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x1", - "lane5": "-0x4", - "lane6": "-0x3", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xffffffff", + "lane5": "0xfffffffc", + "lane6": "0xfffffffd", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0x10", - "lane4": "-0x10", - "lane5": "-0xe", - "lane6": "-0x10", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff2", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -887,10 +887,10 @@ "lane3": "0x59" }, "post1": { - "lane0": "-0x1d", - "lane1": "-0x1d", - "lane2": "-0x1d", - "lane3": "-0x1d" + "lane0": "0xffffffe3", + "lane1": "0xffffffe3", + "lane2": "0xffffffe3", + "lane3": "0xffffffe3" }, "post2": { "lane0": "0x0", @@ -905,10 +905,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x8", - "lane1": "-0x8", - "lane2": "-0x8", - "lane3": "-0x8" + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" }, "pre2": { "lane0": "0x0", @@ -931,44 +931,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0x7", - "lane4": "-0x3", - "lane5": "-0xe", - "lane6": "-0x7", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffffd", + "lane5": "0xfffffff2", + "lane6": "0xfffffff9", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", - "lane3": "-0x2", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", "lane4": "0x0", "lane5": "0x0", - "lane6": "-0x2", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x1", - "lane5": "-0x4", - "lane6": "-0x3", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xffffffff", + "lane5": "0xfffffffc", + "lane6": "0xfffffffd", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0x10", - "lane4": "-0x10", - "lane5": "-0xe", - "lane6": "-0x10", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff2", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -989,10 +989,10 @@ "lane3": "0x53" }, "post1": { - "lane0": "-0x15", - "lane1": "-0x16", - "lane2": "-0x14", - "lane3": "-0x16" + "lane0": "0xffffffeb", + "lane1": "0xffffffea", + "lane2": "0xffffffec", + "lane3": "0xffffffea" }, "post2": { "lane0": "0x0", @@ -1007,10 +1007,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x6", - "lane1": "-0x5", - "lane2": "-0x5", - "lane3": "-0x5" + "lane0": "0xfffffffa", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", @@ -1033,44 +1033,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0x3", - "lane2": "-0xe", - "lane3": "-0x7", - "lane4": "-0xe", - "lane5": "-0x7", - "lane6": "-0xe", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffff2", + "lane3": "0xfffffff9", + "lane4": "0xfffffff2", + "lane5": "0xfffffff9", + "lane6": "0xfffffff2", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", "lane2": "0x0", - "lane3": "-0x2", + "lane3": "0xfffffffe", "lane4": "0x0", - "lane5": "-0x2", + "lane5": "0xfffffffe", "lane6": "0x0", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x1", - "lane2": "-0x4", - "lane3": "-0x3", - "lane4": "-0x4", - "lane5": "-0x3", - "lane6": "-0x4", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xfffffffc", + "lane3": "0xfffffffd", + "lane4": "0xfffffffc", + "lane5": "0xfffffffd", + "lane6": "0xfffffffc", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0x10", - "lane2": "-0xe", - "lane3": "-0x10", - "lane4": "-0xe", - "lane5": "-0x10", - "lane6": "-0xe", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff2", + "lane3": "0xfffffff0", + "lane4": "0xfffffff2", + "lane5": "0xfffffff0", + "lane6": "0xfffffff2", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -1091,10 +1091,10 @@ "lane3": "0x59" }, "post1": { - "lane0": "-0x15", - "lane1": "-0x15", - "lane2": "-0x1d", - "lane3": "-0x1d" + "lane0": "0xffffffeb", + "lane1": "0xffffffeb", + "lane2": "0xffffffe3", + "lane3": "0xffffffe3" }, "post2": { "lane0": "0x0", @@ -1109,10 +1109,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x4", - "lane1": "-0x4", - "lane2": "-0x8", - "lane3": "-0x8" + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" }, "pre2": { "lane0": "0x0", @@ -1135,44 +1135,44 @@ "lane7": "0x88" }, "post1": { - "lane0": "-0x3", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0xe", - "lane4": "-0x3", - "lane5": "-0x7", - "lane6": "-0x7", - "lane7": "-0xe" + "lane0": "0xfffffffd", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff2", + "lane4": "0xfffffffd", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff2" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", + "lane2": "0xfffffffe", "lane3": "0x0", "lane4": "0x0", - "lane5": "-0x2", - "lane6": "-0x2", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x4", - "lane4": "-0x1", - "lane5": "-0x3", - "lane6": "-0x3", - "lane7": "-0x4" + "lane0": "0xffffffff", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffc", + "lane4": "0xffffffff", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffc" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0xe", - "lane4": "-0x10", - "lane5": "-0x10", - "lane6": "-0x10", - "lane7": "-0xe" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff2", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff2" }, "pre2": { "lane0": "0x2", @@ -1193,10 +1193,10 @@ "lane3": "0x53" }, "post1": { - "lane0": "-0x15", - "lane1": "-0x16", - "lane2": "-0x15", - "lane3": "-0x16" + "lane0": "0xffffffeb", + "lane1": "0xffffffea", + "lane2": "0xffffffeb", + "lane3": "0xffffffea" }, "post2": { "lane0": "0x0", @@ -1211,10 +1211,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x6", - "lane1": "-0x5", - "lane2": "-0x6", - "lane3": "-0x5" + "lane0": "0xfffffffa", + "lane1": "0xfffffffb", + "lane2": "0xfffffffa", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", @@ -1237,44 +1237,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0x7", - "lane4": "-0x3", - "lane5": "-0xe", - "lane6": "-0x7", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffffd", + "lane5": "0xfffffff2", + "lane6": "0xfffffff9", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", - "lane3": "-0x2", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", "lane4": "0x0", "lane5": "0x0", - "lane6": "-0x2", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x1", - "lane5": "-0x4", - "lane6": "-0x3", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xffffffff", + "lane5": "0xfffffffc", + "lane6": "0xfffffffd", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0x10", - "lane4": "-0x10", - "lane5": "-0xe", - "lane6": "-0x10", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff2", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -1295,10 +1295,10 @@ "lane3": "0x4b" }, "post1": { - "lane0": "-0x16", - "lane1": "-0x16", - "lane2": "-0x16", - "lane3": "-0x14" + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffec" }, "post2": { "lane0": "0x0", @@ -1313,10 +1313,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x5", - "lane1": "-0x5", - "lane2": "-0x5", - "lane3": "-0x5" + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", @@ -1339,44 +1339,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0x3", - "lane2": "-0xe", - "lane3": "-0x7", - "lane4": "-0xe", - "lane5": "-0x7", - "lane6": "-0xe", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffff2", + "lane3": "0xfffffff9", + "lane4": "0xfffffff2", + "lane5": "0xfffffff9", + "lane6": "0xfffffff2", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", "lane2": "0x0", - "lane3": "-0x2", + "lane3": "0xfffffffe", "lane4": "0x0", - "lane5": "-0x2", + "lane5": "0xfffffffe", "lane6": "0x0", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x1", - "lane2": "-0x4", - "lane3": "-0x3", - "lane4": "-0x4", - "lane5": "-0x3", - "lane6": "-0x4", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xfffffffc", + "lane3": "0xfffffffd", + "lane4": "0xfffffffc", + "lane5": "0xfffffffd", + "lane6": "0xfffffffc", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0x10", - "lane2": "-0xe", - "lane3": "-0x10", - "lane4": "-0xe", - "lane5": "-0x10", - "lane6": "-0xe", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff2", + "lane3": "0xfffffff0", + "lane4": "0xfffffff2", + "lane5": "0xfffffff0", + "lane6": "0xfffffff2", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -1397,10 +1397,10 @@ "lane3": "0x50" }, "post1": { - "lane0": "-0x19", - "lane1": "-0x19", - "lane2": "-0x15", - "lane3": "-0x17" + "lane0": "0xffffffe7", + "lane1": "0xffffffe7", + "lane2": "0xffffffeb", + "lane3": "0xffffffe9" }, "post2": { "lane0": "0x0", @@ -1415,10 +1415,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x7", - "lane1": "-0x7", - "lane2": "-0x4", - "lane3": "-0x5" + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffffc", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", @@ -1441,44 +1441,44 @@ "lane7": "0x88" }, "post1": { - "lane0": "-0xc", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0x5", - "lane4": "-0x3", - "lane5": "-0x7", - "lane6": "-0x7", - "lane7": "-0xe" + "lane0": "0xfffffff4", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffffb", + "lane4": "0xfffffffd", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff2" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", - "lane3": "-0x2", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", "lane4": "0x0", - "lane5": "-0x2", - "lane6": "-0x2", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x5", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x1", - "lane5": "-0x3", - "lane6": "-0x3", - "lane7": "-0x4" + "lane0": "0xfffffffb", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xffffffff", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffc" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0x10", - "lane4": "-0x10", - "lane5": "-0x10", - "lane6": "-0x10", - "lane7": "-0xe" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff2" }, "pre2": { "lane0": "0x3", @@ -1499,10 +1499,10 @@ "lane3": "0x53" }, "post1": { - "lane0": "-0x16", - "lane1": "-0x16", - "lane2": "-0x15", - "lane3": "-0x16" + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffeb", + "lane3": "0xffffffea" }, "post2": { "lane0": "0x0", @@ -1517,10 +1517,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x5", - "lane1": "-0x5", - "lane2": "-0x6", - "lane3": "-0x5" + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffa", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", @@ -1543,44 +1543,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0x7", - "lane4": "-0x3", - "lane5": "-0xe", - "lane6": "-0x7", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffffd", + "lane5": "0xfffffff2", + "lane6": "0xfffffff9", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", - "lane3": "-0x2", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", "lane4": "0x0", "lane5": "0x0", - "lane6": "-0x2", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x1", - "lane5": "-0x4", - "lane6": "-0x3", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xffffffff", + "lane5": "0xfffffffc", + "lane6": "0xfffffffd", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0x10", - "lane4": "-0x10", - "lane5": "-0xe", - "lane6": "-0x10", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff2", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -1601,10 +1601,10 @@ "lane3": "0x50" }, "post1": { - "lane0": "-0x19", - "lane1": "-0x15", - "lane2": "-0x1d", - "lane3": "-0x17" + "lane0": "0xffffffe7", + "lane1": "0xffffffeb", + "lane2": "0xffffffe3", + "lane3": "0xffffffe9" }, "post2": { "lane0": "0x0", @@ -1619,10 +1619,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x7", - "lane1": "-0x4", - "lane2": "-0x8", - "lane3": "-0x5" + "lane0": "0xfffffff9", + "lane1": "0xfffffffc", + "lane2": "0xfffffff8", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", @@ -1645,44 +1645,44 @@ "lane7": "0x90" }, "post1": { - "lane0": "-0x5", - "lane1": "-0x1", - "lane2": "-0xc", - "lane3": "-0xe", - "lane4": "-0x7", - "lane5": "-0xc", - "lane6": "-0x5", - "lane7": "-0x1" + "lane0": "0xfffffffb", + "lane1": "0xffffffff", + "lane2": "0xfffffff4", + "lane3": "0xfffffff2", + "lane4": "0xfffffff9", + "lane5": "0xfffffff4", + "lane6": "0xfffffffb", + "lane7": "0xffffffff" }, "post2": { - "lane0": "-0x2", - "lane1": "-0x3", + "lane0": "0xfffffffe", + "lane1": "0xfffffffd", "lane2": "0x0", "lane3": "0x0", - "lane4": "-0x2", + "lane4": "0xfffffffe", "lane5": "0x0", - "lane6": "-0x2", - "lane7": "-0x3" + "lane6": "0xfffffffe", + "lane7": "0xfffffffd" }, "post3": { - "lane0": "-0x3", - "lane1": "-0x3", - "lane2": "-0x3", - "lane3": "-0x4", - "lane4": "-0x3", - "lane5": "-0x3", - "lane6": "-0x3", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffc", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0x11", - "lane2": "-0x10", - "lane3": "-0xe", - "lane4": "-0x10", - "lane5": "-0x10", - "lane6": "-0x10", - "lane7": "-0x11" + "lane0": "0xfffffff0", + "lane1": "0xffffffef", + "lane2": "0xfffffff0", + "lane3": "0xfffffff2", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xffffffef" }, "pre2": { "lane0": "0x3", @@ -1703,10 +1703,10 @@ "lane3": "0x55" }, "post1": { - "lane0": "-0x16", - "lane1": "-0x16", - "lane2": "-0x15", - "lane3": "-0x15" + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffeb", + "lane3": "0xffffffeb" }, "post2": { "lane0": "0x0", @@ -1721,10 +1721,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x5", - "lane1": "-0x5", - "lane2": "-0x6", - "lane3": "-0x6" + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa" }, "pre2": { "lane0": "0x0", @@ -1747,44 +1747,44 @@ "lane7": "0x8d" }, "post1": { - "lane0": "-0xc", - "lane1": "-0x5", - "lane2": "-0x8", - "lane3": "-0x8", - "lane4": "-0xc", - "lane5": "-0x5", - "lane6": "-0xc", - "lane7": "-0x5" + "lane0": "0xfffffff4", + "lane1": "0xfffffffb", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff4", + "lane5": "0xfffffffb", + "lane6": "0xfffffff4", + "lane7": "0xfffffffb" }, "post2": { "lane0": "0x0", - "lane1": "-0x2", - "lane2": "-0x3", - "lane3": "-0x3", + "lane1": "0xfffffffe", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", "lane4": "0x0", - "lane5": "-0x2", + "lane5": "0xfffffffe", "lane6": "0x0", - "lane7": "-0x2" + "lane7": "0xfffffffe" }, "post3": { - "lane0": "-0x3", - "lane1": "-0x3", - "lane2": "-0x1", - "lane3": "-0x1", - "lane4": "-0x3", - "lane5": "-0x3", - "lane6": "-0x3", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0x10", - "lane2": "-0xf", - "lane3": "-0xf", - "lane4": "-0x10", - "lane5": "-0x10", - "lane6": "-0x10", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff1", + "lane3": "0xfffffff1", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -1805,10 +1805,10 @@ "lane3": "0x4b" }, "post1": { - "lane0": "-0x15", - "lane1": "-0x1d", - "lane2": "-0x1d", - "lane3": "-0x15" + "lane0": "0xffffffeb", + "lane1": "0xffffffe3", + "lane2": "0xffffffe3", + "lane3": "0xffffffeb" }, "post2": { "lane0": "0x0", @@ -1823,10 +1823,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x4", - "lane1": "-0x8", - "lane2": "-0x8", - "lane3": "-0x4" + "lane0": "0xfffffffc", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffffc" }, "pre2": { "lane0": "0x0", @@ -1849,44 +1849,44 @@ "lane7": "0x8d" }, "post1": { - "lane0": "-0xc", - "lane1": "-0x5", - "lane2": "-0x1", - "lane3": "-0x1", - "lane4": "-0xc", - "lane5": "-0x5", - "lane6": "-0xc", - "lane7": "-0x5" + "lane0": "0xfffffff4", + "lane1": "0xfffffffb", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xfffffff4", + "lane5": "0xfffffffb", + "lane6": "0xfffffff4", + "lane7": "0xfffffffb" }, "post2": { "lane0": "0x0", - "lane1": "-0x2", - "lane2": "-0x3", - "lane3": "-0x3", + "lane1": "0xfffffffe", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", "lane4": "0x0", - "lane5": "-0x2", + "lane5": "0xfffffffe", "lane6": "0x0", - "lane7": "-0x2" + "lane7": "0xfffffffe" }, "post3": { - "lane0": "-0x3", - "lane1": "-0x3", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x3", - "lane5": "-0x3", - "lane6": "-0x3", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0x10", - "lane2": "-0x11", - "lane3": "-0x11", - "lane4": "-0x10", - "lane5": "-0x10", - "lane6": "-0x10", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xffffffef", + "lane3": "0xffffffef", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -1907,10 +1907,10 @@ "lane3": "0x50" }, "post1": { - "lane0": "-0x19", - "lane1": "-0x19", - "lane2": "-0x17", - "lane3": "-0x17" + "lane0": "0xffffffe7", + "lane1": "0xffffffe7", + "lane2": "0xffffffe9", + "lane3": "0xffffffe9" }, "post2": { "lane0": "0x0", @@ -1925,10 +1925,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x7", - "lane1": "-0x7", - "lane2": "-0x5", - "lane3": "-0x5" + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", @@ -1951,44 +1951,44 @@ "lane7": "0x8d" }, "post1": { - "lane0": "-0x5", - "lane1": "-0x8", - "lane2": "-0xc", - "lane3": "-0x5", - "lane4": "-0x8", - "lane5": "-0xc", - "lane6": "-0x5", - "lane7": "-0x8" + "lane0": "0xfffffffb", + "lane1": "0xfffffff8", + "lane2": "0xfffffff4", + "lane3": "0xfffffffb", + "lane4": "0xfffffff8", + "lane5": "0xfffffff4", + "lane6": "0xfffffffb", + "lane7": "0xfffffff8" }, "post2": { - "lane0": "-0x2", - "lane1": "-0x3", + "lane0": "0xfffffffe", + "lane1": "0xfffffffd", "lane2": "0x0", - "lane3": "-0x2", - "lane4": "-0x3", + "lane3": "0xfffffffe", + "lane4": "0xfffffffd", "lane5": "0x0", - "lane6": "-0x2", - "lane7": "-0x3" + "lane6": "0xfffffffe", + "lane7": "0xfffffffd" }, "post3": { - "lane0": "-0x3", - "lane1": "-0x1", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x1", - "lane5": "-0x3", - "lane6": "-0x3", - "lane7": "-0x1" + "lane0": "0xfffffffd", + "lane1": "0xffffffff", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xffffffff", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xf", - "lane2": "-0x10", - "lane3": "-0x10", - "lane4": "-0xf", - "lane5": "-0x10", - "lane6": "-0x10", - "lane7": "-0xf" + "lane0": "0xfffffff0", + "lane1": "0xfffffff1", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff1", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff1" }, "pre2": { "lane0": "0x3", @@ -2009,10 +2009,10 @@ "lane3": "0x4e" }, "post1": { - "lane0": "-0x14", - "lane1": "-0x14", - "lane2": "-0x16", - "lane3": "-0x16" + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffea", + "lane3": "0xffffffea" }, "post2": { "lane0": "0x0", @@ -2027,10 +2027,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x5", - "lane1": "-0x5", - "lane2": "-0x5", - "lane3": "-0x5" + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", @@ -2053,44 +2053,44 @@ "lane7": "0x89" }, "post1": { - "lane0": "-0x3", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0x7", - "lane4": "-0x3", - "lane5": "-0xe", - "lane6": "-0x7", - "lane7": "-0xc" + "lane0": "0xfffffffd", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffffd", + "lane5": "0xfffffff2", + "lane6": "0xfffffff9", + "lane7": "0xfffffff4" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", - "lane3": "-0x2", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", "lane4": "0x0", "lane5": "0x0", - "lane6": "-0x2", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x1", - "lane5": "-0x4", - "lane6": "-0x3", - "lane7": "-0x3" + "lane0": "0xffffffff", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xffffffff", + "lane5": "0xfffffffc", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0x10", - "lane4": "-0x10", - "lane5": "-0xe", - "lane6": "-0x10", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff2", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -2111,10 +2111,10 @@ "lane3": "0x55" }, "post1": { - "lane0": "-0x17", - "lane1": "-0x17", - "lane2": "-0x19", - "lane3": "-0x19" + "lane0": "0xffffffe9", + "lane1": "0xffffffe9", + "lane2": "0xffffffe7", + "lane3": "0xffffffe7" }, "post2": { "lane0": "0x0", @@ -2129,10 +2129,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x5", - "lane1": "-0x5", - "lane2": "-0x7", - "lane3": "-0x7" + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9" }, "pre2": { "lane0": "0x0", @@ -2155,44 +2155,44 @@ "lane7": "0x88" }, "post1": { - "lane0": "-0xc", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0xe", - "lane4": "-0x3", - "lane5": "-0x7", - "lane6": "-0x7", - "lane7": "-0xe" + "lane0": "0xfffffff4", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff2", + "lane4": "0xfffffffd", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff2" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", + "lane2": "0xfffffffe", "lane3": "0x0", "lane4": "0x0", - "lane5": "-0x2", - "lane6": "-0x2", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x3", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x4", - "lane4": "-0x1", - "lane5": "-0x3", - "lane6": "-0x3", - "lane7": "-0x4" + "lane0": "0xfffffffd", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffc", + "lane4": "0xffffffff", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffc" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0xe", - "lane4": "-0x10", - "lane5": "-0x10", - "lane6": "-0x10", - "lane7": "-0xe" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff2", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff2" }, "pre2": { "lane0": "0x2", @@ -2213,10 +2213,10 @@ "lane3": "0x59" }, "post1": { - "lane0": "-0x1d", - "lane1": "-0x1d", - "lane2": "-0x1d", - "lane3": "-0x1d" + "lane0": "0xffffffe3", + "lane1": "0xffffffe3", + "lane2": "0xffffffe3", + "lane3": "0xffffffe3" }, "post2": { "lane0": "0x0", @@ -2231,10 +2231,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x8", - "lane1": "-0x8", - "lane2": "-0x8", - "lane3": "-0x8" + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" }, "pre2": { "lane0": "0x0", @@ -2257,44 +2257,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0x3", - "lane2": "-0xe", - "lane3": "-0x7", - "lane4": "-0xe", - "lane5": "-0x7", - "lane6": "-0xe", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffff2", + "lane3": "0xfffffff9", + "lane4": "0xfffffff2", + "lane5": "0xfffffff9", + "lane6": "0xfffffff2", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", "lane2": "0x0", - "lane3": "-0x2", + "lane3": "0xfffffffe", "lane4": "0x0", - "lane5": "-0x2", + "lane5": "0xfffffffe", "lane6": "0x0", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x1", - "lane2": "-0x4", - "lane3": "-0x3", - "lane4": "-0x4", - "lane5": "-0x3", - "lane6": "-0x4", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xfffffffc", + "lane3": "0xfffffffd", + "lane4": "0xfffffffc", + "lane5": "0xfffffffd", + "lane6": "0xfffffffc", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0x10", - "lane2": "-0xe", - "lane3": "-0x10", - "lane4": "-0xe", - "lane5": "-0x10", - "lane6": "-0xe", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff2", + "lane3": "0xfffffff0", + "lane4": "0xfffffff2", + "lane5": "0xfffffff0", + "lane6": "0xfffffff2", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -2315,10 +2315,10 @@ "lane3": "0x59" }, "post1": { - "lane0": "-0x1d", - "lane1": "-0x1d", - "lane2": "-0x1d", - "lane3": "-0x1d" + "lane0": "0xffffffe3", + "lane1": "0xffffffe3", + "lane2": "0xffffffe3", + "lane3": "0xffffffe3" }, "post2": { "lane0": "0x0", @@ -2333,10 +2333,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x8", - "lane1": "-0x8", - "lane2": "-0x8", - "lane3": "-0x8" + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" }, "pre2": { "lane0": "0x0", @@ -2359,44 +2359,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0x7", - "lane4": "-0x3", - "lane5": "-0xe", - "lane6": "-0x7", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffffd", + "lane5": "0xfffffff2", + "lane6": "0xfffffff9", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", - "lane3": "-0x2", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", "lane4": "0x0", "lane5": "0x0", - "lane6": "-0x2", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x1", - "lane5": "-0x4", - "lane6": "-0x3", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xffffffff", + "lane5": "0xfffffffc", + "lane6": "0xfffffffd", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0x10", - "lane4": "-0x10", - "lane5": "-0xe", - "lane6": "-0x10", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff2", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -2417,10 +2417,10 @@ "lane3": "0x59" }, "post1": { - "lane0": "-0x1d", - "lane1": "-0x1d", - "lane2": "-0x1d", - "lane3": "-0x1d" + "lane0": "0xffffffe3", + "lane1": "0xffffffe3", + "lane2": "0xffffffe3", + "lane3": "0xffffffe3" }, "post2": { "lane0": "0x0", @@ -2435,10 +2435,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x8", - "lane1": "-0x8", - "lane2": "-0x8", - "lane3": "-0x8" + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" }, "pre2": { "lane0": "0x0", @@ -2461,44 +2461,44 @@ "lane7": "0x88" }, "post1": { - "lane0": "-0x3", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0xe", - "lane4": "-0x3", - "lane5": "-0x7", - "lane6": "-0x7", - "lane7": "-0xe" + "lane0": "0xfffffffd", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff2", + "lane4": "0xfffffffd", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff2" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", + "lane2": "0xfffffffe", "lane3": "0x0", "lane4": "0x0", - "lane5": "-0x2", - "lane6": "-0x2", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x4", - "lane4": "-0x1", - "lane5": "-0x3", - "lane6": "-0x3", - "lane7": "-0x4" + "lane0": "0xffffffff", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffc", + "lane4": "0xffffffff", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffc" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0xe", - "lane4": "-0x10", - "lane5": "-0x10", - "lane6": "-0x10", - "lane7": "-0xe" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff2", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff2" }, "pre2": { "lane0": "0x2", @@ -2519,10 +2519,10 @@ "lane3": "0x59" }, "post1": { - "lane0": "-0x1d", - "lane1": "-0x1d", - "lane2": "-0x1d", - "lane3": "-0x1d" + "lane0": "0xffffffe3", + "lane1": "0xffffffe3", + "lane2": "0xffffffe3", + "lane3": "0xffffffe3" }, "post2": { "lane0": "0x0", @@ -2537,10 +2537,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x8", - "lane1": "-0x8", - "lane2": "-0x8", - "lane3": "-0x8" + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" }, "pre2": { "lane0": "0x0", @@ -2563,44 +2563,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0x3", - "lane2": "-0xe", - "lane3": "-0x7", - "lane4": "-0xe", - "lane5": "-0x7", - "lane6": "-0xe", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffff2", + "lane3": "0xfffffff9", + "lane4": "0xfffffff2", + "lane5": "0xfffffff9", + "lane6": "0xfffffff2", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", "lane2": "0x0", - "lane3": "-0x2", + "lane3": "0xfffffffe", "lane4": "0x0", - "lane5": "-0x2", + "lane5": "0xfffffffe", "lane6": "0x0", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x1", - "lane2": "-0x4", - "lane3": "-0x3", - "lane4": "-0x4", - "lane5": "-0x3", - "lane6": "-0x4", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xfffffffc", + "lane3": "0xfffffffd", + "lane4": "0xfffffffc", + "lane5": "0xfffffffd", + "lane6": "0xfffffffc", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0x10", - "lane2": "-0xe", - "lane3": "-0x10", - "lane4": "-0xe", - "lane5": "-0x10", - "lane6": "-0xe", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff2", + "lane3": "0xfffffff0", + "lane4": "0xfffffff2", + "lane5": "0xfffffff0", + "lane6": "0xfffffff2", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -2621,10 +2621,10 @@ "lane3": "0x59" }, "post1": { - "lane0": "-0x1d", - "lane1": "-0x1d", - "lane2": "-0x1d", - "lane3": "-0x1d" + "lane0": "0xffffffe3", + "lane1": "0xffffffe3", + "lane2": "0xffffffe3", + "lane3": "0xffffffe3" }, "post2": { "lane0": "0x0", @@ -2639,10 +2639,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x8", - "lane1": "-0x8", - "lane2": "-0x8", - "lane3": "-0x8" + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" }, "pre2": { "lane0": "0x0", @@ -2665,44 +2665,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0x7", - "lane4": "-0x3", - "lane5": "-0xe", - "lane6": "-0x7", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffffd", + "lane5": "0xfffffff2", + "lane6": "0xfffffff9", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", - "lane3": "-0x2", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", "lane4": "0x0", "lane5": "0x0", - "lane6": "-0x2", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x1", - "lane5": "-0x4", - "lane6": "-0x3", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xffffffff", + "lane5": "0xfffffffc", + "lane6": "0xfffffffd", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0x10", - "lane4": "-0x10", - "lane5": "-0xe", - "lane6": "-0x10", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff2", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -2723,10 +2723,10 @@ "lane3": "0x59" }, "post1": { - "lane0": "-0x1d", - "lane1": "-0x1d", - "lane2": "-0x1d", - "lane3": "-0x1d" + "lane0": "0xffffffe3", + "lane1": "0xffffffe3", + "lane2": "0xffffffe3", + "lane3": "0xffffffe3" }, "post2": { "lane0": "0x0", @@ -2741,10 +2741,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x8", - "lane1": "-0x8", - "lane2": "-0x8", - "lane3": "-0x8" + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" }, "pre2": { "lane0": "0x0", @@ -2767,44 +2767,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0x7", - "lane4": "-0x3", - "lane5": "-0xe", - "lane6": "-0x7", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffffd", + "lane5": "0xfffffff2", + "lane6": "0xfffffff9", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", - "lane3": "-0x2", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", "lane4": "0x0", "lane5": "0x0", - "lane6": "-0x2", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x1", - "lane5": "-0x4", - "lane6": "-0x3", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xffffffff", + "lane5": "0xfffffffc", + "lane6": "0xfffffffd", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0x10", - "lane4": "-0x10", - "lane5": "-0xe", - "lane6": "-0x10", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff2", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -2825,10 +2825,10 @@ "lane3": "0x4b" }, "post1": { - "lane0": "-0x16", - "lane1": "-0x16", - "lane2": "-0x14", - "lane3": "-0x14" + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffec", + "lane3": "0xffffffec" }, "post2": { "lane0": "0x0", @@ -2843,10 +2843,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x5", - "lane1": "-0x5", - "lane2": "-0x5", - "lane3": "-0x5" + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", @@ -2869,44 +2869,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0x3", - "lane2": "-0xe", - "lane3": "-0x7", - "lane4": "-0xe", - "lane5": "-0x7", - "lane6": "-0xe", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffff2", + "lane3": "0xfffffff9", + "lane4": "0xfffffff2", + "lane5": "0xfffffff9", + "lane6": "0xfffffff2", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", "lane2": "0x0", - "lane3": "-0x2", + "lane3": "0xfffffffe", "lane4": "0x0", - "lane5": "-0x2", + "lane5": "0xfffffffe", "lane6": "0x0", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x1", - "lane2": "-0x4", - "lane3": "-0x3", - "lane4": "-0x4", - "lane5": "-0x3", - "lane6": "-0x4", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xfffffffc", + "lane3": "0xfffffffd", + "lane4": "0xfffffffc", + "lane5": "0xfffffffd", + "lane6": "0xfffffffc", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0x10", - "lane2": "-0xe", - "lane3": "-0x10", - "lane4": "-0xe", - "lane5": "-0x10", - "lane6": "-0xe", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff2", + "lane3": "0xfffffff0", + "lane4": "0xfffffff2", + "lane5": "0xfffffff0", + "lane6": "0xfffffff2", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -2927,10 +2927,10 @@ "lane3": "0x59" }, "post1": { - "lane0": "-0x15", - "lane1": "-0x17", - "lane2": "-0x19", - "lane3": "-0x1d" + "lane0": "0xffffffeb", + "lane1": "0xffffffe9", + "lane2": "0xffffffe7", + "lane3": "0xffffffe3" }, "post2": { "lane0": "0x0", @@ -2945,10 +2945,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x4", - "lane1": "-0x5", - "lane2": "-0x7", - "lane3": "-0x8" + "lane0": "0xfffffffc", + "lane1": "0xfffffffb", + "lane2": "0xfffffff9", + "lane3": "0xfffffff8" }, "pre2": { "lane0": "0x0", @@ -2971,44 +2971,44 @@ "lane7": "0x88" }, "post1": { - "lane0": "-0x3", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0xe", - "lane4": "-0x3", - "lane5": "-0x7", - "lane6": "-0x7", - "lane7": "-0xe" + "lane0": "0xfffffffd", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff2", + "lane4": "0xfffffffd", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff2" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", + "lane2": "0xfffffffe", "lane3": "0x0", "lane4": "0x0", - "lane5": "-0x2", - "lane6": "-0x2", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x4", - "lane4": "-0x1", - "lane5": "-0x3", - "lane6": "-0x3", - "lane7": "-0x4" + "lane0": "0xffffffff", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffc", + "lane4": "0xffffffff", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffc" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0xe", - "lane4": "-0x10", - "lane5": "-0x10", - "lane6": "-0x10", - "lane7": "-0xe" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff2", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff2" }, "pre2": { "lane0": "0x2", @@ -3029,10 +3029,10 @@ "lane3": "0x4b" }, "post1": { - "lane0": "-0x16", - "lane1": "-0x16", - "lane2": "-0x16", - "lane3": "-0x14" + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffec" }, "post2": { "lane0": "0x0", @@ -3047,10 +3047,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x5", - "lane1": "-0x5", - "lane2": "-0x5", - "lane3": "-0x5" + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", @@ -3073,44 +3073,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0x7", - "lane4": "-0x3", - "lane5": "-0xe", - "lane6": "-0x7", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffffd", + "lane5": "0xfffffff2", + "lane6": "0xfffffff9", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", - "lane3": "-0x2", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", "lane4": "0x0", "lane5": "0x0", - "lane6": "-0x2", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x1", - "lane5": "-0x4", - "lane6": "-0x3", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xffffffff", + "lane5": "0xfffffffc", + "lane6": "0xfffffffd", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0x10", - "lane4": "-0x10", - "lane5": "-0xe", - "lane6": "-0x10", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff2", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -3131,10 +3131,10 @@ "lane3": "0x4b" }, "post1": { - "lane0": "-0x16", - "lane1": "-0x16", - "lane2": "-0x14", - "lane3": "-0x14" + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffec", + "lane3": "0xffffffec" }, "post2": { "lane0": "0x0", @@ -3149,10 +3149,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x5", - "lane1": "-0x5", - "lane2": "-0x5", - "lane3": "-0x5" + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", @@ -3175,44 +3175,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0x3", - "lane1": "-0x3", - "lane2": "-0xe", - "lane3": "-0x7", - "lane4": "-0xe", - "lane5": "-0x7", - "lane6": "-0xe", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffff2", + "lane3": "0xfffffff9", + "lane4": "0xfffffff2", + "lane5": "0xfffffff9", + "lane6": "0xfffffff2", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", "lane2": "0x0", - "lane3": "-0x2", + "lane3": "0xfffffffe", "lane4": "0x0", - "lane5": "-0x2", + "lane5": "0xfffffffe", "lane6": "0x0", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x1", - "lane2": "-0x4", - "lane3": "-0x3", - "lane4": "-0x4", - "lane5": "-0x3", - "lane6": "-0x4", - "lane7": "-0x1" + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xfffffffc", + "lane3": "0xfffffffd", + "lane4": "0xfffffffc", + "lane5": "0xfffffffd", + "lane6": "0xfffffffc", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0x10", - "lane2": "-0xe", - "lane3": "-0x10", - "lane4": "-0xe", - "lane5": "-0x10", - "lane6": "-0xe", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff2", + "lane3": "0xfffffff0", + "lane4": "0xfffffff2", + "lane5": "0xfffffff0", + "lane6": "0xfffffff2", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -3233,10 +3233,10 @@ "lane3": "0x50" }, "post1": { - "lane0": "-0x19", - "lane1": "-0x19", - "lane2": "-0x17", - "lane3": "-0x17" + "lane0": "0xffffffe7", + "lane1": "0xffffffe7", + "lane2": "0xffffffe9", + "lane3": "0xffffffe9" }, "post2": { "lane0": "0x0", @@ -3251,10 +3251,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x7", - "lane1": "-0x7", - "lane2": "-0x5", - "lane3": "-0x5" + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", @@ -3277,44 +3277,44 @@ "lane7": "0x88" }, "post1": { - "lane0": "-0x3", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0xe", - "lane4": "-0x3", - "lane5": "-0x7", - "lane6": "-0x7", - "lane7": "-0xe" + "lane0": "0xfffffffd", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff2", + "lane4": "0xfffffffd", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff2" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", + "lane2": "0xfffffffe", "lane3": "0x0", "lane4": "0x0", - "lane5": "-0x2", - "lane6": "-0x2", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", "lane7": "0x0" }, "post3": { - "lane0": "-0x1", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x4", - "lane4": "-0x1", - "lane5": "-0x3", - "lane6": "-0x3", - "lane7": "-0x4" + "lane0": "0xffffffff", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffc", + "lane4": "0xffffffff", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffc" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0xe", - "lane4": "-0x10", - "lane5": "-0x10", - "lane6": "-0x10", - "lane7": "-0xe" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff2", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff2" }, "pre2": { "lane0": "0x2", @@ -3335,10 +3335,10 @@ "lane3": "0x4b" }, "post1": { - "lane0": "-0x16", - "lane1": "-0x14", - "lane2": "-0x16", - "lane3": "-0x14" + "lane0": "0xffffffea", + "lane1": "0xffffffec", + "lane2": "0xffffffea", + "lane3": "0xffffffec" }, "post2": { "lane0": "0x0", @@ -3353,10 +3353,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x5", - "lane1": "-0x5", - "lane2": "-0x5", - "lane3": "-0x5" + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", @@ -3379,44 +3379,44 @@ "lane7": "0x94" }, "post1": { - "lane0": "-0xc", - "lane1": "-0xe", - "lane2": "-0x7", - "lane3": "-0x8", - "lane4": "-0x3", - "lane5": "-0x5", - "lane6": "-0xf", - "lane7": "-0x3" + "lane0": "0xfffffff4", + "lane1": "0xfffffff2", + "lane2": "0xfffffff9", + "lane3": "0xfffffff8", + "lane4": "0xfffffffd", + "lane5": "0xfffffffb", + "lane6": "0xfffffff1", + "lane7": "0xfffffffd" }, "post2": { "lane0": "0x0", "lane1": "0x0", - "lane2": "-0x2", - "lane3": "-0x3", + "lane2": "0xfffffffe", + "lane3": "0xfffffffd", "lane4": "0x0", - "lane5": "-0x2", - "lane6": "-0x3", + "lane5": "0xfffffffe", + "lane6": "0xfffffffd", "lane7": "0x0" }, "post3": { - "lane0": "-0x3", - "lane1": "-0x4", - "lane2": "-0x3", - "lane3": "-0x1", - "lane4": "-0x1", - "lane5": "-0x3", - "lane6": "-0x2", - "lane7": "-0x1" + "lane0": "0xfffffffd", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xfffffffd", + "lane6": "0xfffffffe", + "lane7": "0xffffffff" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0xe", - "lane2": "-0x10", - "lane3": "-0xf", - "lane4": "-0x10", - "lane5": "-0x10", - "lane6": "-0x12", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff2", + "lane2": "0xfffffff0", + "lane3": "0xfffffff1", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xffffffee", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -3437,10 +3437,10 @@ "lane3": "0x50" }, "post1": { - "lane0": "-0x19", - "lane1": "-0x17", - "lane2": "-0x19", - "lane3": "-0x17" + "lane0": "0xffffffe7", + "lane1": "0xffffffe9", + "lane2": "0xffffffe7", + "lane3": "0xffffffe9" }, "post2": { "lane0": "0x0", @@ -3455,10 +3455,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x7", - "lane1": "-0x5", - "lane2": "-0x7", - "lane3": "-0x5" + "lane0": "0xfffffff9", + "lane1": "0xfffffffb", + "lane2": "0xfffffff9", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", @@ -3481,44 +3481,44 @@ "lane7": "0x90" }, "post1": { - "lane0": "-0x5", - "lane1": "-0x1", - "lane2": "-0xc", - "lane3": "-0x5", - "lane4": "-0x1", - "lane5": "-0xc", - "lane6": "-0x5", - "lane7": "-0x1" + "lane0": "0xfffffffb", + "lane1": "0xffffffff", + "lane2": "0xfffffff4", + "lane3": "0xfffffffb", + "lane4": "0xffffffff", + "lane5": "0xfffffff4", + "lane6": "0xfffffffb", + "lane7": "0xffffffff" }, "post2": { - "lane0": "-0x2", - "lane1": "-0x3", + "lane0": "0xfffffffe", + "lane1": "0xfffffffd", "lane2": "0x0", - "lane3": "-0x2", - "lane4": "-0x3", + "lane3": "0xfffffffe", + "lane4": "0xfffffffd", "lane5": "0x0", - "lane6": "-0x2", - "lane7": "-0x3" + "lane6": "0xfffffffe", + "lane7": "0xfffffffd" }, "post3": { - "lane0": "-0x3", - "lane1": "-0x3", - "lane2": "-0x3", - "lane3": "-0x3", - "lane4": "-0x3", - "lane5": "-0x3", - "lane6": "-0x3", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0x11", - "lane2": "-0x10", - "lane3": "-0x10", - "lane4": "-0x11", - "lane5": "-0x10", - "lane6": "-0x10", - "lane7": "-0x11" + "lane0": "0xfffffff0", + "lane1": "0xffffffef", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xffffffef", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xffffffef" }, "pre2": { "lane0": "0x3", @@ -3539,10 +3539,10 @@ "lane3": "0x4e" }, "post1": { - "lane0": "-0x14", - "lane1": "-0x14", - "lane2": "-0x16", - "lane3": "-0x16" + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffea", + "lane3": "0xffffffea" }, "post2": { "lane0": "0x0", @@ -3557,10 +3557,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x5", - "lane1": "-0x5", - "lane2": "-0x5", - "lane3": "-0x5" + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", @@ -3583,44 +3583,44 @@ "lane7": "0x8d" }, "post1": { - "lane0": "-0xc", - "lane1": "-0x5", - "lane2": "-0x8", - "lane3": "-0x8", - "lane4": "-0xc", - "lane5": "-0x5", - "lane6": "-0xc", - "lane7": "-0x5" + "lane0": "0xfffffff4", + "lane1": "0xfffffffb", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff4", + "lane5": "0xfffffffb", + "lane6": "0xfffffff4", + "lane7": "0xfffffffb" }, "post2": { "lane0": "0x0", - "lane1": "-0x2", - "lane2": "-0x3", - "lane3": "-0x3", + "lane1": "0xfffffffe", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", "lane4": "0x0", - "lane5": "-0x2", + "lane5": "0xfffffffe", "lane6": "0x0", - "lane7": "-0x2" + "lane7": "0xfffffffe" }, "post3": { - "lane0": "-0x3", - "lane1": "-0x3", - "lane2": "-0x1", - "lane3": "-0x1", - "lane4": "-0x3", - "lane5": "-0x3", - "lane6": "-0x3", - "lane7": "-0x3" + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" }, "pre1": { - "lane0": "-0x10", - "lane1": "-0x10", - "lane2": "-0xf", - "lane3": "-0xf", - "lane4": "-0x10", - "lane5": "-0x10", - "lane6": "-0x10", - "lane7": "-0x10" + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff1", + "lane3": "0xfffffff1", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" }, "pre2": { "lane0": "0x2", @@ -3641,10 +3641,10 @@ "lane3": "0x50" }, "post1": { - "lane0": "-0x17", - "lane1": "-0x19", - "lane2": "-0x19", - "lane3": "-0x17" + "lane0": "0xffffffe9", + "lane1": "0xffffffe7", + "lane2": "0xffffffe7", + "lane3": "0xffffffe9" }, "post2": { "lane0": "0x0", @@ -3659,10 +3659,10 @@ "lane3": "0x0" }, "pre1": { - "lane0": "-0x5", - "lane1": "-0x7", - "lane2": "-0x7", - "lane3": "-0x5" + "lane0": "0xfffffffb", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffffb" }, "pre2": { "lane0": "0x0", diff --git a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/port_config.ini b/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/port_config.ini deleted file mode 100644 index 90ecfa4859ad..000000000000 --- a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/port_config.ini +++ /dev/null @@ -1,57 +0,0 @@ -# name lanes alias index speed autoneg -Ethernet0 26 Ethernet1/0/1 1 1000 1 -Ethernet1 25 Ethernet1/0/2 2 1000 1 -Ethernet2 28 Ethernet1/0/3 3 1000 1 -Ethernet3 27 Ethernet1/0/4 4 1000 1 -Ethernet4 30 Ethernet1/0/5 5 1000 1 -Ethernet5 29 Ethernet1/0/6 6 1000 1 -Ethernet6 32 Ethernet1/0/7 7 1000 1 -Ethernet7 31 Ethernet1/0/8 8 1000 1 -Ethernet8 34 Ethernet1/0/9 9 1000 1 -Ethernet9 33 Ethernet1/0/10 10 1000 1 -Ethernet10 36 Ethernet1/0/11 11 1000 1 -Ethernet11 35 Ethernet1/0/12 12 1000 1 -Ethernet12 38 Ethernet1/0/13 13 1000 1 -Ethernet13 37 Ethernet1/0/14 14 1000 1 -Ethernet14 40 Ethernet1/0/15 15 1000 1 -Ethernet15 39 Ethernet1/0/16 16 1000 1 -Ethernet16 42 Ethernet1/0/17 17 1000 1 -Ethernet17 41 Ethernet1/0/18 18 1000 1 -Ethernet18 44 Ethernet1/0/19 19 1000 1 -Ethernet19 43 Ethernet1/0/20 20 1000 1 -Ethernet20 50 Ethernet1/0/21 21 1000 1 -Ethernet21 49 Ethernet1/0/22 22 1000 1 -Ethernet22 52 Ethernet1/0/23 23 1000 1 -Ethernet23 51 Ethernet1/0/24 24 1000 1 -Ethernet24 2 Ethernet1/0/25 25 1000 1 -Ethernet25 1 Ethernet1/0/26 26 1000 1 -Ethernet26 4 Ethernet1/0/27 27 1000 1 -Ethernet27 3 Ethernet1/0/28 28 1000 1 -Ethernet28 6 Ethernet1/0/29 29 1000 1 -Ethernet29 5 Ethernet1/0/30 30 1000 1 -Ethernet30 8 Ethernet1/0/31 31 1000 1 -Ethernet31 7 Ethernet1/0/32 32 1000 1 -Ethernet32 10 Ethernet1/0/33 33 1000 1 -Ethernet33 9 Ethernet1/0/34 34 1000 1 -Ethernet34 12 Ethernet1/0/35 35 1000 1 -Ethernet35 11 Ethernet1/0/36 36 1000 1 -Ethernet36 14 Ethernet1/0/37 37 1000 1 -Ethernet37 13 Ethernet1/0/38 38 1000 1 -Ethernet38 16 Ethernet1/0/39 39 1000 1 -Ethernet39 15 Ethernet1/0/40 40 1000 1 -Ethernet40 18 Ethernet1/0/41 41 1000 1 -Ethernet41 17 Ethernet1/0/42 42 1000 1 -Ethernet42 20 Ethernet1/0/43 43 1000 1 -Ethernet43 19 Ethernet1/0/44 44 1000 1 -Ethernet44 22 Ethernet1/0/45 45 1000 1 -Ethernet45 21 Ethernet1/0/46 46 1000 1 -Ethernet46 24 Ethernet1/0/47 47 1000 1 -Ethernet47 23 Ethernet1/0/48 48 1000 1 -Ethernet48 60 Ethernet1/0/49 49 10000 0 -Ethernet49 58 Ethernet1/0/50 50 10000 0 -Ethernet50 59 Ethernet1/0/51 51 10000 0 -Ethernet51 57 Ethernet1/0/52 52 10000 0 -Ethernet52 62 Ethernet1/0/53 53 10000 0 -Ethernet53 64 Ethernet1/0/54 54 10000 0 -Ethernet54 61 Ethernet1/0/55 55 10000 0 -Ethernet55 63 Ethernet1/0/56 56 10000 0 diff --git a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/sai.profile b/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/sai.profile deleted file mode 100644 index 2e5979fd112c..000000000000 --- a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/sai.profile +++ /dev/null @@ -1 +0,0 @@ -SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/belgite.config.bcm diff --git a/device/celestica/x86_64-cel_belgite-r0/custom_led.bin b/device/celestica/x86_64-cel_belgite-r0/custom_led.bin deleted file mode 100644 index c1b5e0e1b1d6..000000000000 Binary files a/device/celestica/x86_64-cel_belgite-r0/custom_led.bin and /dev/null differ diff --git a/device/celestica/x86_64-cel_belgite-r0/default_sku b/device/celestica/x86_64-cel_belgite-r0/default_sku deleted file mode 100644 index 3eeb370889f9..000000000000 --- a/device/celestica/x86_64-cel_belgite-r0/default_sku +++ /dev/null @@ -1 +0,0 @@ -CELESTICA-BELGITE t1 diff --git a/device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json.original b/device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json.original deleted file mode 100644 index 8f43a3f6090d..000000000000 --- a/device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json.original +++ /dev/null @@ -1,686 +0,0 @@ -{ - "PLATFORM": - { - "num_psus":2, - "num_fantrays":3, - "num_fans_pertray":1, - "num_ports":56, - "num_temps":4, - "pddf_dev_types": - { - "description":"Belgite - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", - "CPLD": - [ - "i2c_cpld" - ], - "PSU": - [ - "psu_eeprom", - "psu_pmbus" - ], - "FAN": - [ - "fan_ctrl", - "fan_eeprom", - "fan_cpld" - ], - "PORT_MODULE": - [ - "pddf_xcvr" - ] - }, - "std_perm_kos": - [ - "i2c-ismt", - "i2c-i801" - ], - "std_kos": - [ - "i2c_dev", - "i2c_mux_pca954x", - "gpio_pca953x", - "mc24lc64t", - "optoe" - ], - "pddf_kos": - [ - "pddf_client_module", - "pddf_mux_module", - "pddf_psu_driver_module", - "pddf_psu_module", - "pddf_gpio_module", - "pddf_xcvr_module", - "pddf_xcvr_driver_module", - "pddf_led_module", - "pddf_fan_driver_module", - "pddf_fan_module", - "pddf_led_module" - ], - "custom_kos": - [ - "pddf_custom_psu" - ] - }, - "SYSTEM": - { - "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, - "i2c": - { - "CONTROLLERS": - [ - { "dev_name":"i2c-0", "dev":"SMBUS0" } - ] - } - }, - "SMBUS0": - { - "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, - "i2c": - { - "topo_info": {"dev_addr": "0x0"}, - "DEVICES": - [ - {"dev": "EEPROM1"}, - {"dev": "MUX1"} - ] - } - }, - "EEPROM1": - { - "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, - "i2c": - { - "topo_info": {"parent_bus": "0x0", "dev_addr": "0x52", "dev_type": "24lc64t"}, - "dev_attr": {"access_mode": "BLOCK"}, - "attr_list": - [ - {"attr_name": "eeprom"} - ] - } - }, - "MUX1": - { - "dev_info": { "device_type":"MUX", "device_name":"MUX1", "device_parent":"SMBUS0"}, - "i2c": - { - "topo_info": { "parent_bus":"0x0", "dev_addr":"0x70", "dev_type":"pca9548"}, - "dev_attr": { "virt_bus":"0x2"}, - "channel": - [ - {"chn":"0", "dev":"CPLD1" }, - {"chn":"0", "dev":"FAN-CTRL1" }, - {"chn":"2", "dev":"PSU1" }, - {"chn":"2", "dev":"PSU2" }, - {"chn":"3", "dev":"TEMP1"}, - {"chn":"3", "dev":"TEMP2"}, - {"chn":"4", "dev":"TEMP3"}, - {"chn":"4", "dev":"TEMP4"}, - {"chn":"7", "dev":"MUX2"} - ] - } - }, - "MUX2": - { - "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"MUX1"}, - "i2c": - { - "topo_info": { "parent_bus":"0x9", "dev_addr":"0x71", "dev_type":"pca9548"}, - "dev_attr": { "virt_bus":"0x10"}, - "channel": - [ - {"chn":"0", "dev":"PORT49"}, - {"chn":"1", "dev":"PORT50"}, - {"chn":"2", "dev":"PORT51"}, - {"chn":"3", "dev":"PORT52"}, - {"chn":"4", "dev":"PORT53"}, - {"chn":"5", "dev":"PORT54"}, - {"chn":"6", "dev":"PORT55"}, - {"chn":"7", "dev":"PORT56"} - ] - } - }, - "CPLD1": - { - "dev_info": {"device_type": "CPLD", "device_name": "CPLD1", "device_parent": "MUX1"}, - "i2c": - { - "topo_info": {"parent_bus": "0x2", "dev_addr": "0x32", "dev_type": "i2c_cpld"}, - "dev_attr": {} - } - }, - "PSU1": - { - "dev_info": { "device_type":"PSU", "device_name":"PSU1", "device_parent":"MUX1"}, - "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, - "i2c": - { - "interface": - [ - { "itf":"pmbus", "dev":"PSU1-PMBUS" } - ] - } - }, - "PSU1-PMBUS": - { - "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU1"}, - "i2c": - { - "topo_info":{ "parent_bus":"0x4", "dev_addr":"0x58", "dev_type":"psu_pmbus"}, - "attr_list": - [ - { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x10", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"psu_model_name", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"16" }, - { "attr_name":"psu_mfr_id", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7" }, - { "attr_name":"psu_serial_num", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"16" }, - { "attr_name":"psu_v_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_i_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_p_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_v_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_i_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_fan_dir", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xc5", "attr_mask":"0x18", "attr_cmpval":"0x08", "attr_len":"1"}, - { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} - ] - } - }, - "PSU2": - { - "dev_info": { "device_type":"PSU", "device_name":"PSU2", "device_parent":"MUX1" }, - "dev_attr": { "dev_idx":"2", "num_psu_fans":"1"}, - "i2c": - { - "interface": - [ - { "itf":"pmbus", "dev":"PSU2-PMBUS"} - ] - } - }, - "PSU2-PMBUS": - { - "dev_info": {"device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU2"}, - "i2c": - { - "topo_info": { "parent_bus":"0x4", "dev_addr":"0x59", "dev_type":"psu_pmbus"}, - "attr_list": - [ - { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x20", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x8", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"psu_model_name", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"16" }, - { "attr_name":"psu_mfr_id", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7" }, - { "attr_name":"psu_serial_num", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"16" }, - { "attr_name":"psu_v_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_i_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_p_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_v_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_i_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_p_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_fan_dir", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xc5", "attr_mask":"0x18", "attr_cmpval":"0x08", "attr_len":"1"}, - { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_temp1_input", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} - ] - } - }, - "TEMP1": - { - "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"MUX1"}, - "dev_attr": { "display_name":"LM75_U10"}, - "i2c": - { - "topo_info": { "parent_bus":"0x5", "dev_addr":"0x48", "dev_type":"lm75"}, - "attr_list": - [ - { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, - { "attr_name": "temp1_max_hyst"}, - { "attr_name": "temp1_input"} - ] - } - }, - "TEMP2": - { - "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"MUX1"}, - "dev_attr": { "display_name":"LM75_U4"}, - "i2c": - { - "topo_info": { "parent_bus":"0x5", "dev_addr":"0x49", "dev_type":"lm75"}, - "attr_list": - [ - { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, - { "attr_name": "temp1_max_hyst"}, - { "attr_name": "temp1_input"} - ] - } - }, - "TEMP3": - { - "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP3", "device_parent":"MUX1"}, - "dev_attr": { "display_name":"LM75_U7"}, - "i2c": - { - "topo_info": { "parent_bus":"0x6", "dev_addr":"0x4a", "dev_type":"lm75"}, - "attr_list": - [ - { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, - { "attr_name": "temp1_max_hyst"}, - { "attr_name": "temp1_input"} - ] - } - }, - "TEMP4": - { - "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP4", "device_parent":"MUX1"}, - "dev_attr": { "display_name":"LM75_U60"}, - "i2c": - { - "topo_info": { "parent_bus":"0x6", "dev_addr":"0x49", "dev_type":"lm75"}, - "attr_list": - [ - { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, - { "attr_name": "temp1_max_hyst"}, - { "attr_name": "temp1_input"} - ] - } - }, - "PORT49": - { - "dev_info": { "device_type":"SFP28", "device_name":"PORT49", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"49"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT49-EEPROM" }, - { "itf":"control", "dev":"PORT49-CTRL" } - ] - } - }, - "PORT49-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT49"}, - "i2c": - { - "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT49-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX2", "virt_parent":"PORT49"}, - "i2c": - { - "topo_info": { "parent_bus":"0x10", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"} - ] - } - }, - "PORT50": - { - "dev_info": { "device_type":"SFP28", "device_name":"PORT50", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"50"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT50-EEPROM" }, - { "itf":"control", "dev":"PORT50-CTRL" } - ] - } - }, - "PORT50-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT50"}, - "i2c": - { - "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT50-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX2", "virt_parent":"PORT50"}, - "i2c": - { - "topo_info": { "parent_bus":"0x11", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"} - - ] - } - }, - "PORT51": - { - "dev_info": { "device_type":"SFP28", "device_name":"PORT51", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"51"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT51-EEPROM" }, - { "itf":"control", "dev":"PORT51-CTRL" } - ] - } - }, - "PORT51-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT51"}, - "i2c": - { - "topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT51-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX2", "virt_parent":"PORT51"}, - "i2c": - { - "topo_info": { "parent_bus":"0x12", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"} - ] - } - }, - "PORT52": - { - "dev_info": { "device_type":"SFP28", "device_name":"PORT52", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"52"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT52-EEPROM" }, - { "itf":"control", "dev":"PORT52-CTRL" } - ] - } - }, - "PORT52-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT52"}, - "i2c": - { - "topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT52-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX2", "virt_parent":"PORT52"}, - "i2c": - { - "topo_info": { "parent_bus":"0x13", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"} - - ] - } - }, - "PORT53": - { - "dev_info": { "device_type":"SFP28", "device_name":"PORT53", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"53"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT53-EEPROM" }, - { "itf":"control", "dev":"PORT53-CTRL" } - ] - } - }, - "PORT53-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT53"}, - "i2c": - { - "topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT53-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX2", "virt_parent":"PORT53"}, - "i2c": - { - "topo_info": { "parent_bus":"0x14", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} - - ] - } - }, - "PORT54": - { - "dev_info": { "device_type":"SFP28", "device_name":"PORT54", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"54"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT54-EEPROM" }, - { "itf":"control", "dev":"PORT54-CTRL" } - ] - } - }, - "PORT54-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT54"}, - "i2c": - { - "topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT54-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX2", "virt_parent":"PORT54"}, - "i2c": - { - "topo_info": { "parent_bus":"0x15", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"} - ] - } - }, - "PORT55": - { - "dev_info": { "device_type":"SFP28", "device_name":"PORT55", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"55"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT55-EEPROM" }, - { "itf":"control", "dev":"PORT55-CTRL" } - ] - } - }, - "PORT55-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT55"}, - "i2c": - { - "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT55-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX2", "virt_parent":"PORT55"}, - "i2c": - { - "topo_info": { "parent_bus":"0x16", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} - ] - } - }, - "PORT56": - { - "dev_info": { "device_type":"SFP28", "device_name":"PORT56", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"56"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT56-EEPROM" }, - { "itf":"control", "dev":"PORT56-CTRL" } - ] - } - }, - "PORT56-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT56"}, - "i2c": - { - "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT56-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX2", "virt_parent":"PORT56"}, - "i2c": - { - "topo_info": { "parent_bus":"0x17", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"} - ] - } - }, - "FAN-CTRL1": - { - "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL1", "device_parent":"MUX1"}, - "i2c": - { - "topo_info": { "parent_bus":"0x2", "dev_addr":"0x66", "dev_type":"fan_cpld"}, - "dev_attr": { "num_fantrays":"3"}, - "attr_list": - [ - { "attr_name":"fan1_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x32", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan2_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x36", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan3_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x3a", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan1_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan2_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan3_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan1_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x31", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, - { "attr_name":"fan2_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x35", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150" , "attr_is_divisor":0}, - { "attr_name":"fan3_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x39", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0} - ] - } - }, - "SYS_LED": - { - "dev_info": { "device_type":"LED", "device_name":"SYS_LED"}, - "dev_attr": { "index":"0", "flag": "rw"}, - "i2c" : { - "attr_list": - [ - {"attr_name":"amber","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x1","swpld_addr_offset":"0x43"}, - {"attr_name":"green","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x2","swpld_addr_offset":"0x43"}, - {"attr_name":"off","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x0","swpld_addr_offset":"0x43"} - ] - } - }, - "FANTRAY1_LED": - { - "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, - "dev_attr": { "index":"0", "flag": "rw"}, - "i2c" : { - "attr_list": - [ - {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x33"}, - {"attr_name":"red","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x33"} - ] - } - }, - "FANTRAY2_LED": - { - "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, - "dev_attr": { "index":"1", "flag": "rw"}, - "i2c" : { - "attr_list": - [ - {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x37"}, - {"attr_name":"red","attr_devtype":"cpld","attr_devname":"CPLD1B","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x37"} - ] - } - }, - "FANTRAY3_LED": - { - "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, - "dev_attr": { "index":"2", "flag": "rw"}, - "i2c" : { - "attr_list": - [ - {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x3b"}, - {"attr_name":"red","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x3b"} - ] - } - } -} diff --git a/device/celestica/x86_64-cel_belgite-r0/platform_components.json b/device/celestica/x86_64-cel_belgite-r0/platform_components.json deleted file mode 100644 index 23a4ce41cd67..000000000000 --- a/device/celestica/x86_64-cel_belgite-r0/platform_components.json +++ /dev/null @@ -1,10 +0,0 @@ -{ - "chassis": { - "E1070": { - "component": { - "SWCPLD": {}, - "BIOS": {} - } - } - } -} diff --git a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/belgite.config.bcm b/device/celestica/x86_64-cel_ds1000-r0/DS1000/ds1000.config.bcm similarity index 98% rename from device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/belgite.config.bcm rename to device/celestica/x86_64-cel_ds1000-r0/DS1000/ds1000.config.bcm index a249804582c9..fd2ca27948be 100644 --- a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/belgite.config.bcm +++ b/device/celestica/x86_64-cel_ds1000-r0/DS1000/ds1000.config.bcm @@ -166,4 +166,5 @@ portmap_56=63:10 pbmp_xport_xe=0x01FFFFFFFFFFFFFE -# \ No newline at end of file +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc +# diff --git a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/hwsku.json b/device/celestica/x86_64-cel_ds1000-r0/DS1000/hwsku.json similarity index 100% rename from device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/hwsku.json rename to device/celestica/x86_64-cel_ds1000-r0/DS1000/hwsku.json diff --git a/device/celestica/x86_64-cel_ds1000-r0/DS1000/port_config.ini b/device/celestica/x86_64-cel_ds1000-r0/DS1000/port_config.ini new file mode 100644 index 000000000000..123c4f10df22 --- /dev/null +++ b/device/celestica/x86_64-cel_ds1000-r0/DS1000/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed autoneg +Ethernet0 26 Eth1/1 1 1000 1 +Ethernet1 25 Eth2/1 2 1000 1 +Ethernet2 28 Eth3/1 3 1000 1 +Ethernet3 27 Eth4/1 4 1000 1 +Ethernet4 30 Eth5/1 5 1000 1 +Ethernet5 29 Eth6/1 6 1000 1 +Ethernet6 32 Eth7/1 7 1000 1 +Ethernet7 31 Eth8/1 8 1000 1 +Ethernet8 34 Eth9/1 9 1000 1 +Ethernet9 33 Eth10/1 10 1000 1 +Ethernet10 36 Eth11/1 11 1000 1 +Ethernet11 35 Eth12/1 12 1000 1 +Ethernet12 38 Eth13/1 13 1000 1 +Ethernet13 37 Eth14/1 14 1000 1 +Ethernet14 40 Eth15/1 15 1000 1 +Ethernet15 39 Eth16/1 16 1000 1 +Ethernet16 42 Eth17/1 17 1000 1 +Ethernet17 41 Eth18/1 18 1000 1 +Ethernet18 44 Eth19/1 19 1000 1 +Ethernet19 43 Eth20/1 20 1000 1 +Ethernet20 50 Eth21/1 21 1000 1 +Ethernet21 49 Eth22/1 22 1000 1 +Ethernet22 52 Eth23/1 23 1000 1 +Ethernet23 51 Eth24/1 24 1000 1 +Ethernet24 2 Eth25/1 25 1000 1 +Ethernet25 1 Eth26/1 26 1000 1 +Ethernet26 4 Eth27/1 27 1000 1 +Ethernet27 3 Eth28/1 28 1000 1 +Ethernet28 6 Eth29/1 29 1000 1 +Ethernet29 5 Eth30/1 30 1000 1 +Ethernet30 8 Eth31/1 31 1000 1 +Ethernet31 7 Eth32/1 32 1000 1 +Ethernet32 10 Eth33/1 33 1000 1 +Ethernet33 9 Eth34/1 34 1000 1 +Ethernet34 12 Eth35/1 35 1000 1 +Ethernet35 11 Eth36/1 36 1000 1 +Ethernet36 14 Eth37/1 37 1000 1 +Ethernet37 13 Eth38/1 38 1000 1 +Ethernet38 16 Eth39/1 39 1000 1 +Ethernet39 15 Eth40/1 40 1000 1 +Ethernet40 18 Eth41/1 41 1000 1 +Ethernet41 17 Eth42/1 42 1000 1 +Ethernet42 20 Eth43/1 43 1000 1 +Ethernet43 19 Eth44/1 44 1000 1 +Ethernet44 22 Eth45/1 45 1000 1 +Ethernet45 21 Eth46/1 46 1000 1 +Ethernet46 24 Eth47/1 47 1000 1 +Ethernet47 23 Eth48/1 48 1000 1 +Ethernet48 60 Eth49/1 49 10000 0 +Ethernet49 58 Eth50/1 50 10000 0 +Ethernet50 59 Eth51/1 51 10000 0 +Ethernet51 57 Eth52/1 52 10000 0 +Ethernet52 62 Eth53/1 53 10000 0 +Ethernet53 64 Eth54/1 54 10000 0 +Ethernet54 61 Eth55/1 55 10000 0 +Ethernet55 63 Eth56/1 56 10000 0 diff --git a/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai.profile b/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai.profile new file mode 100644 index 000000000000..d58abd359c7f --- /dev/null +++ b/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/ds1000.config.bcm diff --git a/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai_postinit_cmd.soc new file mode 100644 index 000000000000..0de17febfeaf --- /dev/null +++ b/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai_postinit_cmd.soc @@ -0,0 +1,6 @@ +modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1 +modreg ING_MISC_CONFIG INPUT_PRI_UNTAGGED=1 +modreg QTG_CHIP_CONFIG.qtgport0 PAUSE_PFC_SEL=1 +modreg QTG_CHIP_CONFIG.qtgport1 PAUSE_PFC_SEL=1 +modreg CHIP_CONFIG.pmqport0 PAUSE_PFC_SEL=1 +modreg CHIP_CONFIG.pmqport1 PAUSE_PFC_SEL=1 diff --git a/device/celestica/x86_64-cel_ds1000-r0/custom_led.bin b/device/celestica/x86_64-cel_ds1000-r0/custom_led.bin new file mode 100755 index 000000000000..1fe3d5abac5a Binary files /dev/null and b/device/celestica/x86_64-cel_ds1000-r0/custom_led.bin differ diff --git a/device/celestica/x86_64-cel_ds1000-r0/default_sku b/device/celestica/x86_64-cel_ds1000-r0/default_sku new file mode 100644 index 000000000000..e83707dd8d95 --- /dev/null +++ b/device/celestica/x86_64-cel_ds1000-r0/default_sku @@ -0,0 +1 @@ +DS1000 t1 diff --git a/device/celestica/x86_64-cel_belgite-r0/installer.conf b/device/celestica/x86_64-cel_ds1000-r0/installer.conf similarity index 83% rename from device/celestica/x86_64-cel_belgite-r0/installer.conf rename to device/celestica/x86_64-cel_ds1000-r0/installer.conf index 430473933330..fbc96da1773d 100644 --- a/device/celestica/x86_64-cel_belgite-r0/installer.conf +++ b/device/celestica/x86_64-cel_ds1000-r0/installer.conf @@ -1,4 +1,4 @@ -CONSOLE_PORT=0x3f8 +CONSOLE_PORT=0xe060 CONSOLE_DEV=0 -CONSOLE_SPEED=9600 +CONSOLE_SPEED=115200 ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off modprobe.blacklist=gpio_ich,i2c-ismt,i2c_ismt,i2c-i801,i2c_i801 crashkernel=0M-2G:256M,2G-4G:320M,4G-8G:384M,8G-:448M acpi_no_watchdog" diff --git a/device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/Makefile b/device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/Makefile similarity index 99% rename from device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/Makefile rename to device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/Makefile index ddc700bfb87e..21bd48d0ab3b 100755 --- a/device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/Makefile +++ b/device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/Makefile @@ -21,4 +21,3 @@ all: clean: rm -rf *.elf *.o *.map *.bin - diff --git a/device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/custom_led.c b/device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/custom_led.c similarity index 79% rename from device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/custom_led.c rename to device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/custom_led.c index 712b5503e34b..fea5bc581f16 100755 --- a/device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/custom_led.c +++ b/device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/custom_led.c @@ -82,31 +82,42 @@ This array would have port speed for each port, as per bit mapping defined in "soc_led_speed_t" in $SDK/include/shared/cmicfw/cmicx_led_public.h file. Here is an exception, please keep in mind: -1. For TH3, port status/speed of xe1 (physical port 258) is located in the +1. For TH3, port status/speed of xe1 (physical port 258) is located in the accumulation entry/speed array of physical port 259. ******************************************************************************/ #include #define ACTIVITY_TICKS 2 -#define READ_LED_ACCU_DATA(base, port) (*((uint16 *)(base + ((port - 1) * sizeof(uint32))))) -#define WRITE_LED_SEND_DATA(base, port, val) (*((uint16 *)(base + ((port - 1) * sizeof(uint32)))) = val) + +/*! Macro to calculate LED RAM address. */ +#define LED_HW_RAM_ADDR(base, port) \ + (base + (port * sizeof(uint32))) + +/*! Macro to read LED RAM. */ +#define LED_HW_RAM_READ16(base, port) \ + *((uint16 *) LED_HW_RAM_ADDR(base, port)) + +/*! Macro to write LED RAM. */ +#define LED_HW_RAM_WRITE16(base, port, val) \ + *((uint16 *) LED_HW_RAM_ADDR(base, port)) = (val) #define PORT_NUM_TOTAL 56 #define LED_GREEN_BICOLOR 0x2 //bit : 10 #define LED_AMBER_BICOLOR 0x1 //bit : 01 #define LED_OFF_BICOLOR 0x3 //bit : 11 - +#define LED_SW_LINK_UP 0x1 + unsigned short portmap[] = { 25, 26, 27, 28, 29, 30, 31, 32, - 33, 34, 35, 36, 37, 38, 39, 40, + 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 49, 50, 51, 52, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 24, 23, 22, 21, - 20, 19, 18, 17, 16, 15, 14, 13, + 20, 19, 18, 17, 16, 15, 14, 13, 60, 58, 59, 57, 62, 64, 61, 63 -}; +}; /* @@ -123,49 +134,59 @@ unsigned short portmap[] = { void custom_led_handler(soc_led_custom_handler_ctrl_t *ctrl, uint32 activity_count) { - unsigned short accu_val = 0, send_val = 0; - unsigned short port, physical_port; - + uint8 idx = 0; + uint16 accu_val = 0, send_val = 0; + uint16 uc_port = 0, physical_port = 0; + /* Physical port numbers to be used */ - for(port = 1; port <= PORT_NUM_TOTAL; port++) { + for(uc_port = 0; uc_port < PORT_NUM_TOTAL; uc_port++) { + + // change to zero-based + physical_port = portmap[uc_port] - 1; - physical_port = portmap[port-1]; - /* Read value from led_ram bank0 */ - accu_val = READ_LED_ACCU_DATA(ctrl->accu_ram_base, physical_port); + accu_val = LED_HW_RAM_READ16(ctrl->accu_ram_base, physical_port); - send_val = 0xff; - - if (((accu_val & LED_OUTPUT_RX) || (accu_val & LED_OUTPUT_TX)) && (activity_count & ACTIVITY_TICKS)) + send_val = LED_OFF_BICOLOR; + + if (((accu_val & LED_HW_RX) || (accu_val & LED_HW_TX)) && (activity_count & ACTIVITY_TICKS)) { send_val = LED_OFF_BICOLOR; } - else if ( accu_val & LED_OUTPUT_LINK_UP) + else if (ctrl->led_control_data[physical_port] & LED_SW_LINK_UP) { send_val = LED_GREEN_BICOLOR; } else { send_val = LED_OFF_BICOLOR; - } - + } + /* Write value to led_ram bank1 */ - WRITE_LED_SEND_DATA(ctrl->pat_ram_base, port, send_val); + LED_HW_RAM_WRITE16(ctrl->pat_ram_base, uc_port, send_val); } /* for */ - /* Send the pattern over LED interface 1 for ports 1 - 56*/ - ctrl->intf_ctrl[1].valid = 1; - ctrl->intf_ctrl[1].start_row = 0; - ctrl->intf_ctrl[1].end_row = 55; - ctrl->intf_ctrl[1].pat_width = 2; - - /* Invalidate rest of the interfaces */ - ctrl->intf_ctrl[0].valid = 0; - ctrl->intf_ctrl[2].valid = 0; - ctrl->intf_ctrl[3].valid = 0; - ctrl->intf_ctrl[4].valid = 0; + /* Configure LED HW interfaces based on board configuration */ + for (idx = 0; idx < LED_HW_INTF_MAX_NUM; idx++) { + soc_led_intf_ctrl_t *lic = &ctrl->intf_ctrl[idx]; + switch (idx) { + case 0: + lic->valid = 0; + break; + case 1: + lic->valid = 1; + lic->start_row = 0; + lic->end_row = 55; + lic->pat_width = 2; + break; + default: + + /* Invalidate rest of the interfaces */ + lic->valid = 0; + break; + } + } return; } - diff --git a/device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/custom_led.lds b/device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/custom_led.lds similarity index 100% rename from device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/custom_led.lds rename to device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/custom_led.lds diff --git a/device/celestica/x86_64-cel_ds1000-r0/led_proc_init.soc b/device/celestica/x86_64-cel_ds1000-r0/led_proc_init.soc new file mode 100644 index 000000000000..7bd004f12b82 --- /dev/null +++ b/device/celestica/x86_64-cel_ds1000-r0/led_proc_init.soc @@ -0,0 +1,5 @@ +linkscan off +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +sleep 3 +led auto on; led start +linkscan on diff --git a/device/celestica/x86_64-cel_belgite-r0/media_settings.json b/device/celestica/x86_64-cel_ds1000-r0/media_settings.json similarity index 99% rename from device/celestica/x86_64-cel_belgite-r0/media_settings.json rename to device/celestica/x86_64-cel_ds1000-r0/media_settings.json index 50f7c545f09e..fc52c39c7a60 100644 --- a/device/celestica/x86_64-cel_belgite-r0/media_settings.json +++ b/device/celestica/x86_64-cel_ds1000-r0/media_settings.json @@ -46,4 +46,3 @@ } } } - diff --git a/device/celestica/x86_64-cel_belgite-r0/pcie.yaml b/device/celestica/x86_64-cel_ds1000-r0/pcie.yaml similarity index 56% rename from device/celestica/x86_64-cel_belgite-r0/pcie.yaml rename to device/celestica/x86_64-cel_ds1000-r0/pcie.yaml index 46e202526716..47e5ecbead8f 100644 --- a/device/celestica/x86_64-cel_belgite-r0/pcie.yaml +++ b/device/celestica/x86_64-cel_ds1000-r0/pcie.yaml @@ -1,121 +1,143 @@ - bus: '00' dev: '00' fn: '0' - id: 1980 - name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent' + id: '1980' + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev + 11)' - bus: '00' dev: '04' fn: '0' id: 19a1 - name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers' + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers + (rev 11)' - bus: '00' dev: '05' fn: '0' id: 19a2 - name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 Series Root Complex Event Collector' + name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 + Series Root Complex Event Collector (rev 11)' - bus: '00' dev: '06' fn: '0' - id: 19e2 - name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT Root Port' + id: 19a3 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT + Root Port (rev 11)' - bus: '00' - dev: '09' + dev: 09 fn: '0' - id: b277 - name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port' + id: 19a4 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #0 (rev 11)' - bus: '00' - dev: '0b' + dev: 0b fn: '0' - id: 1533 - name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port' + id: 19a6 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #2 (rev 11)' - bus: '00' - dev: '0e' + dev: 0e fn: '0' id: 19a8 - name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port' + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #4 (rev 11)' - bus: '00' dev: '12' fn: '0' id: 19ac - name: 'System peripheral: Intel Corporation DNV SMBus Contoller - Host' + name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller + - Host (rev 11)' - bus: '00' dev: '14' fn: '0' id: 19c2 - name: 'SATA controller: Intel Corporation DNV SATA Controller 1' + name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller + 1 (rev 11)' - bus: '00' dev: '15' fn: '0' id: 19d0 - name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI Controller' + name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI + Controller (rev 11)' - bus: '00' dev: '16' fn: '0' - id: 15ce - name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN Root Port' + id: 19d1 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #0 (rev 11)' - bus: '00' dev: '18' fn: '0' id: 19d3 - name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME HECI 1' + name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME + HECI 1 (rev 11)' - bus: '00' - dev: '1a' + dev: 1a fn: '0' id: 19d8 - name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller' + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' - bus: '00' - dev: '1a' + dev: 1a fn: '1' id: 19d8 - name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller' + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' - bus: '00' - dev: '1a' + dev: 1a fn: '2' id: 19d8 - name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller' + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' - bus: '00' - dev: '1f' + dev: 1f fn: '0' id: 19dc - name: 'ISA bridge: Intel Corporation DNV LPC or eSPI' + name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev + 11)' - bus: '00' - dev: '1f' + dev: 1f fn: '2' id: 19de - name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management Controller' + name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management + Controller (rev 11)' - bus: '00' - dev: '1f' + dev: 1f fn: '4' id: 19df - name: 'SMBus: Intel Corporation DNV SMBus controller' + name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev + 11)' - bus: '00' - dev: '1f' + dev: 1f fn: '5' id: 19e0 - name: 'Serial bus controller [0c80]: Intel Corporation DNV SPI Controller' + name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series + SPI Controller (rev 11)' - bus: '01' dev: '00' fn: '0' id: 19e2 - name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology' + name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology + (rev 11)' - bus: '02' dev: '00' fn: '0' id: b277 - name: 'Ethernet controller: Broadcom Limited Device b277' + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b277 (rev 02)' - bus: '03' dev: '00' fn: '0' - id: 1533 - name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' - bus: '05' dev: '00' fn: '0' - id: 15ce - name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 10 GbE SFP+' + id: 15c2 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' - bus: '05' dev: '00' fn: '1' - id: 15ce - name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 10 GbE SFP+' - + id: 15c2 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' diff --git a/device/celestica/x86_64-cel_belgite-r0/pddf/pd-plugin.json b/device/celestica/x86_64-cel_ds1000-r0/pddf/pd-plugin.json similarity index 84% rename from device/celestica/x86_64-cel_belgite-r0/pddf/pd-plugin.json rename to device/celestica/x86_64-cel_ds1000-r0/pddf/pd-plugin.json index 454afd239964..f0ce24dc6524 100644 --- a/device/celestica/x86_64-cel_belgite-r0/pddf/pd-plugin.json +++ b/device/celestica/x86_64-cel_ds1000-r0/pddf/pd-plugin.json @@ -11,14 +11,14 @@ }, "PSU": { - "psu_present": + "psu_present": { "i2c": { "valmap": { "1":true, "0":false } } }, - "psu_power_good": + "psu_power_good": { "i2c": { @@ -29,7 +29,7 @@ { "i2c": { - "valmap": { "0":"INTAKE", "1":"EXHAUST" } + "valmap": { "0":"intake", "1":"exhaust" } } }, "PSU_FAN_MAX_SPEED":"18000" @@ -40,7 +40,7 @@ { "i2c": { - "valmap": {"1":"EXHAUST", "0":"INTAKE"} + "valmap": {"1":"exhaust", "0":"intake"} } }, "present": diff --git a/device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json b/device/celestica/x86_64-cel_ds1000-r0/pddf/pddf-device.json similarity index 87% rename from device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json rename to device/celestica/x86_64-cel_ds1000-r0/pddf/pddf-device.json index a97102c1f4cb..02293634e7f7 100644 --- a/device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json +++ b/device/celestica/x86_64-cel_ds1000-r0/pddf/pddf-device.json @@ -1,685 +1,682 @@ -{ - "PLATFORM": - { - "num_psus":2, - "num_fantrays":3, - "num_fans_pertray":1, - "num_ports":56, - "num_temps":4, - "pddf_dev_types": - { - "description":"Belgite - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", - "CPLD": - [ - "i2c_cpld" - ], - "PSU": - [ - "psu_eeprom", - "psu_pmbus" - ], - "FAN": - [ - "fan_ctrl", - "fan_eeprom", - "fan_cpld" - ], - "PORT_MODULE": - [ - "pddf_xcvr" - ] - }, - "std_perm_kos": - [ - "i2c-ismt", - "i2c-i801" - ], - "std_kos": - [ - "i2c_dev", - "i2c_mux_pca954x force_deselect_on_exit=1", - "gpio_pca953x", - "mc24lc64t", - "optoe" - ], - "pddf_kos": - [ - "pddf_client_module", - "pddf_mux_module", - "pddf_psu_driver_module", - "pddf_psu_module", - "pddf_gpio_module", - "pddf_xcvr_module", - "pddf_xcvr_driver_module", - "pddf_led_module", - "pddf_fan_driver_module", - "pddf_fan_module", - "pddf_led_module" - ], - "custom_kos": - [ - "pddf_custom_psu", - "pddf_custom_wdt" - ] - }, - "SYSTEM": - { - "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, - "i2c": - { - "CONTROLLERS": - [ - { "dev_name":"i2c-0", "dev":"SMBUS0" } - ] - } - }, - "SMBUS0": - { - "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, - "i2c": - { - "topo_info": {"dev_addr": "0x0"}, - "DEVICES": - [ - {"dev": "EEPROM1"}, - {"dev": "MUX1"} - ] - } - }, - "EEPROM1": - { - "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, - "i2c": - { - "topo_info": {"parent_bus": "0x0", "dev_addr": "0x52", "dev_type": "24lc64t"}, - "dev_attr": {"access_mode": "BLOCK"}, - "attr_list": - [ - {"attr_name": "eeprom"} - ] - } - }, - "MUX1": - { - "dev_info": { "device_type":"MUX", "device_name":"MUX1", "device_parent":"SMBUS0"}, - "i2c": - { - "topo_info": { "parent_bus":"0x0", "dev_addr":"0x70", "dev_type":"pca9548"}, - "dev_attr": { "virt_bus":"0x2"}, - "channel": - [ - {"chn":"0", "dev":"CPLD1" }, - {"chn":"0", "dev":"FAN-CTRL" }, - {"chn":"2", "dev":"PSU1" }, - {"chn":"2", "dev":"PSU2" }, - {"chn":"3", "dev":"TEMP1"}, - {"chn":"3", "dev":"TEMP2"}, - {"chn":"4", "dev":"TEMP3"}, - {"chn":"4", "dev":"TEMP4"}, - {"chn":"7", "dev":"MUX2"} - ] - } - }, - "MUX2": - { - "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"MUX1"}, - "i2c": - { - "topo_info": { "parent_bus":"0x9", "dev_addr":"0x71", "dev_type":"pca9548"}, - "dev_attr": { "virt_bus":"0xA"}, - "channel": - [ - {"chn":"0", "dev":"PORT49"}, - {"chn":"1", "dev":"PORT50"}, - {"chn":"2", "dev":"PORT51"}, - {"chn":"3", "dev":"PORT52"}, - {"chn":"4", "dev":"PORT53"}, - {"chn":"5", "dev":"PORT54"}, - {"chn":"6", "dev":"PORT55"}, - {"chn":"7", "dev":"PORT56"} - ] - } - }, - "CPLD1": - { - "dev_info": {"device_type": "CPLD", "device_name": "CPLD1", "device_parent": "MUX1"}, - "i2c": - { - "topo_info": {"parent_bus": "0x2", "dev_addr": "0x32", "dev_type": "i2c_cpld"}, - "dev_attr": {} - } - }, - "PSU1": - { - "dev_info": { "device_type":"PSU", "device_name":"PSU1", "device_parent":"MUX1"}, - "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, - "i2c": - { - "interface": - [ - { "itf":"pmbus", "dev":"PSU1-PMBUS" } - ] - } - }, - "PSU1-PMBUS": - { - "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU1"}, - "i2c": - { - "topo_info":{ "parent_bus":"0x4", "dev_addr":"0x58", "dev_type":"psu_pmbus"}, - "attr_list": - [ - { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x10", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"psu_model_name", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13" }, - { "attr_name":"psu_mfr_id", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"11" }, - { "attr_name":"psu_serial_num", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"14" }, - { "attr_name":"psu_v_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_i_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_v_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_i_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_fan_dir", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"1"}, - { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} - ] - } - }, - "PSU2": - { - "dev_info": { "device_type":"PSU", "device_name":"PSU2", "device_parent":"MUX1" }, - "dev_attr": { "dev_idx":"2", "num_psu_fans":"1"}, - "i2c": - { - "interface": - [ - { "itf":"pmbus", "dev":"PSU2-PMBUS"} - ] - } - }, - "PSU2-PMBUS": - { - "dev_info": {"device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU2"}, - "i2c": - { - "topo_info": { "parent_bus":"0x4", "dev_addr":"0x59", "dev_type":"psu_pmbus"}, - "attr_list": - [ - { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x20", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x8", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"psu_model_name", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13" }, - { "attr_name":"psu_mfr_id", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"11" }, - { "attr_name":"psu_serial_num", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"14" }, - { "attr_name":"psu_v_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_i_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_v_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_i_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_p_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_fan_dir", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"1"}, - { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_temp1_input", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} - ] - } - }, - "TEMP1": - { - "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"MUX1"}, - "dev_attr": { "display_name":"LM75_U10"}, - "i2c": - { - "topo_info": { "parent_bus":"0x5", "dev_addr":"0x48", "dev_type":"lm75"}, - "attr_list": - [ - { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, - { "attr_name": "temp1_max_hyst"}, - { "attr_name": "temp1_input"} - ] - } - }, - "TEMP2": - { - "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"MUX1"}, - "dev_attr": { "display_name":"LM75_U4"}, - "i2c": - { - "topo_info": { "parent_bus":"0x5", "dev_addr":"0x49", "dev_type":"lm75"}, - "attr_list": - [ - { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, - { "attr_name": "temp1_max_hyst"}, - { "attr_name": "temp1_input"} - ] - } - }, - "TEMP3": - { - "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP3", "device_parent":"MUX1"}, - "dev_attr": { "display_name":"LM75_U7"}, - "i2c": - { - "topo_info": { "parent_bus":"0x6", "dev_addr":"0x4a", "dev_type":"lm75"}, - "attr_list": - [ - { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, - { "attr_name": "temp1_max_hyst"}, - { "attr_name": "temp1_input"} - ] - } - }, - "TEMP4": - { - "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP4", "device_parent":"MUX1"}, - "dev_attr": { "display_name":"LM75_U60"}, - "i2c": - { - "topo_info": { "parent_bus":"0x6", "dev_addr":"0x49", "dev_type":"lm75"}, - "attr_list": - [ - { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, - { "attr_name": "temp1_max_hyst"}, - { "attr_name": "temp1_input"} - ] - } - }, - "PORT49": - { - "dev_info": { "device_type":"SFP+", "device_name":"PORT49", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"49"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT49-EEPROM" }, - { "itf":"control", "dev":"PORT49-CTRL" } - ] - } - }, - "PORT49-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT49"}, - "i2c": - { - "topo_info": { "parent_bus":"0xA", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT49-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX2", "virt_parent":"PORT49"}, - "i2c": - { - "topo_info": { "parent_bus":"0xA", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"} - ] - } - }, - "PORT50": - { - "dev_info": { "device_type":"SFP+", "device_name":"PORT50", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"50"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT50-EEPROM" }, - { "itf":"control", "dev":"PORT50-CTRL" } - ] - } - }, - "PORT50-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT50"}, - "i2c": - { - "topo_info": { "parent_bus":"0xB", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT50-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX2", "virt_parent":"PORT50"}, - "i2c": - { - "topo_info": { "parent_bus":"0xB", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"} - - ] - } - }, - "PORT51": - { - "dev_info": { "device_type":"SFP+", "device_name":"PORT51", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"51"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT51-EEPROM" }, - { "itf":"control", "dev":"PORT51-CTRL" } - ] - } - }, - "PORT51-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT51"}, - "i2c": - { - "topo_info": { "parent_bus":"0xC", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT51-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX2", "virt_parent":"PORT51"}, - "i2c": - { - "topo_info": { "parent_bus":"0xC", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"} - ] - } - }, - "PORT52": - { - "dev_info": { "device_type":"SFP+", "device_name":"PORT52", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"52"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT52-EEPROM" }, - { "itf":"control", "dev":"PORT52-CTRL" } - ] - } - }, - "PORT52-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT52"}, - "i2c": - { - "topo_info": { "parent_bus":"0xD", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT52-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX2", "virt_parent":"PORT52"}, - "i2c": - { - "topo_info": { "parent_bus":"0xD", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"} - - ] - } - }, - "PORT53": - { - "dev_info": { "device_type":"SFP+", "device_name":"PORT53", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"53"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT53-EEPROM" }, - { "itf":"control", "dev":"PORT53-CTRL" } - ] - } - }, - "PORT53-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT53"}, - "i2c": - { - "topo_info": { "parent_bus":"0xE", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT53-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX2", "virt_parent":"PORT53"}, - "i2c": - { - "topo_info": { "parent_bus":"0xE", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} - - ] - } - }, - "PORT54": - { - "dev_info": { "device_type":"SFP+", "device_name":"PORT54", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"54"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT54-EEPROM" }, - { "itf":"control", "dev":"PORT54-CTRL" } - ] - } - }, - "PORT54-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT54"}, - "i2c": - { - "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT54-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX2", "virt_parent":"PORT54"}, - "i2c": - { - "topo_info": { "parent_bus":"0xF", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"} - ] - } - }, - "PORT55": - { - "dev_info": { "device_type":"SFP+", "device_name":"PORT55", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"55"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT55-EEPROM" }, - { "itf":"control", "dev":"PORT55-CTRL" } - ] - } - }, - "PORT55-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT55"}, - "i2c": - { - "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT55-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX2", "virt_parent":"PORT55"}, - "i2c": - { - "topo_info": { "parent_bus":"0x10", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} - ] - } - }, - "PORT56": - { - "dev_info": { "device_type":"SFP+", "device_name":"PORT56", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"56"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT56-EEPROM" }, - { "itf":"control", "dev":"PORT56-CTRL" } - ] - } - }, - "PORT56-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT56"}, - "i2c": - { - "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT56-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX2", "virt_parent":"PORT56"}, - "i2c": - { - "topo_info": { "parent_bus":"0x11", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"} - ] - } - }, - "FAN-CTRL": - { - "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"MUX1"}, - "i2c": - { - "topo_info": { "parent_bus":"0x2", "dev_addr":"0x66", "dev_type":"fan_cpld"}, - "dev_attr": { "num_fantrays":"3"}, - "attr_list": - [ - { "attr_name":"fan1_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x32", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan2_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x36", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan3_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x3a", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan1_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan2_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan3_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan1_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x31", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, - { "attr_name":"fan2_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x35", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150" , "attr_is_divisor":0}, - { "attr_name":"fan3_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x39", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0} - ] - } - }, - "SYS_LED": - { - "dev_info": { "device_type":"LED", "device_name":"SYS_LED"}, - "dev_attr": { "index":"0"}, - "i2c" : { - "attr_list": - [ - {"attr_name":"STATUS_LED_COLOR_AMBER","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x1","swpld_addr_offset":"0x43"}, - {"attr_name":"STATUS_LED_COLOR_GREEN","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x2","swpld_addr_offset":"0x43"}, - {"attr_name":"STATUS_LED_COLOR_OFF","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x3","swpld_addr_offset":"0x43"} - ] - } - }, - "FANTRAY1_LED": - { - "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, - "dev_attr": { "index":"0"}, - "i2c" : { - "attr_list": - [ - {"attr_name":"STATUS_LED_COLOR_GREEN","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x33"}, - {"attr_name":"STATUS_LED_COLOR_AMBER","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x33"} - ] - } - }, - "FANTRAY2_LED": - { - "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, - "dev_attr": { "index":"1"}, - "i2c" : { - "attr_list": - [ - {"attr_name":"STATUS_LED_COLOR_GREEN","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x37"}, - {"attr_name":"STATUS_LED_COLOR_AMBER","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x37"} - ] - } - }, - "FANTRAY3_LED": - { - "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, - "dev_attr": { "index":"2"}, - "i2c" : { - "attr_list": - [ - {"attr_name":"STATUS_LED_COLOR_GREEN","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x3b"}, - {"attr_name":"STATUS_LED_COLOR_AMBER","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x3b"} - ] - } - } -} +{ + "PLATFORM": + { + "num_psus":2, + "num_fantrays":3, + "num_fans_pertray":1, + "num_ports":56, + "num_temps":4, + "pddf_dev_types": + { + "description":"DS1000 - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", + "CPLD": + [ + "i2c_cpld" + ], + "PSU": + [ + "psu_eeprom", + "psu_pmbus" + ], + "FAN": + [ + "fan_ctrl", + "fan_eeprom", + "fan_cpld" + ], + "PORT_MODULE": + [ + "pddf_xcvr" + ] + }, + "std_perm_kos": + [ + "i2c-ismt", + "i2c-i801" + ], + "std_kos": + [ + "i2c_dev", + "i2c_mux_pca954x force_deselect_on_exit=1", + "gpio_pca953x", + "mc24lc64t", + "optoe" + ], + "pddf_kos": + [ + "pddf_client_module", + "pddf_mux_module", + "pddf_psu_driver_module", + "pddf_psu_module", + "pddf_gpio_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_led_module", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_led_module" + ], + "custom_kos": + [ + "pddf_custom_psu", + "pddf_custom_wdt" + ] + }, + "SYSTEM": + { + "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, + "i2c": + { + "CONTROLLERS": + [ + { "dev_name":"i2c-0", "dev":"SMBUS0" } + ] + } + }, + "SMBUS0": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x0"}, + "DEVICES": + [ + {"dev": "EEPROM1"}, + {"dev": "MUX1"} + ] + } + }, + "EEPROM1": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x52", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": + [ + {"attr_name": "eeprom"} + ] + } + }, + "MUX1": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX1", "device_parent":"SMBUS0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x0", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2"}, + "channel": + [ + {"chn":"0", "dev":"CPLD1" }, + {"chn":"0", "dev":"FAN-CTRL" }, + {"chn":"2", "dev":"PSU1" }, + {"chn":"2", "dev":"PSU2" }, + {"chn":"3", "dev":"TEMP1"}, + {"chn":"3", "dev":"TEMP2"}, + {"chn":"4", "dev":"TEMP3"}, + {"chn":"4", "dev":"TEMP4"}, + {"chn":"7", "dev":"MUX2"} + ] + } + }, + "MUX2": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"MUX1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x71", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0xA"}, + "channel": + [ + {"chn":"0", "dev":"PORT49"}, + {"chn":"1", "dev":"PORT50"}, + {"chn":"2", "dev":"PORT51"}, + {"chn":"3", "dev":"PORT52"}, + {"chn":"4", "dev":"PORT53"}, + {"chn":"5", "dev":"PORT54"}, + {"chn":"6", "dev":"PORT55"}, + {"chn":"7", "dev":"PORT56"} + ] + } + }, + "CPLD1": + { + "dev_info": {"device_type": "CPLD", "device_name": "CPLD1", "device_parent": "MUX1"}, + "i2c": + { + "topo_info": {"parent_bus": "0x2", "dev_addr": "0x32", "dev_type": "i2c_cpld"}, + "dev_attr": {} + } + }, + "PSU1": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU 1", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, + "i2c": + { + "interface": + [ + { "itf":"pmbus", "dev":"PSU1-PMBUS" } + ] + } + }, + "PSU1-PMBUS": + { + "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU1"}, + "i2c": + { + "topo_info":{ "parent_bus":"0x4", "dev_addr":"0x58", "dev_type":"psu_pmbus"}, + "attr_list": + [ + { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x10", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"psu_model_name", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13" }, + { "attr_name":"psu_mfr_id", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"11" }, + { "attr_name":"psu_serial_num", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"14" }, + { "attr_name":"psu_v_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_i_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_v_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_i_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_fan_dir", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"1"}, + { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} + ] + } + }, + "PSU2": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU 2", "device_parent":"MUX1" }, + "dev_attr": { "dev_idx":"2", "num_psu_fans":"1"}, + "i2c": + { + "interface": + [ + { "itf":"pmbus", "dev":"PSU2-PMBUS"} + ] + } + }, + "PSU2-PMBUS": + { + "dev_info": {"device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x59", "dev_type":"psu_pmbus"}, + "attr_list": + [ + { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x20", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x8", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"psu_model_name", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13" }, + { "attr_name":"psu_mfr_id", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"11" }, + { "attr_name":"psu_serial_num", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"14" }, + { "attr_name":"psu_v_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_i_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_v_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_i_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_p_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_fan_dir", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"1"}, + { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_temp1_input", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} + ] + } + }, + "TEMP1": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"MUX1"}, + "dev_attr": { "display_name":"Front Left Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x48", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "TEMP2": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"MUX1"}, + "dev_attr": { "display_name":"Front Right Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x49", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "TEMP3": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP3", "device_parent":"MUX1"}, + "dev_attr": { "display_name":"Rear Right Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x4a", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "TEMP4": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP4", "device_parent":"MUX1"}, + "dev_attr": { "display_name":"ASIC External Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x49", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "PORT49": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT49", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"49"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT49-EEPROM" }, + { "itf":"control", "dev":"PORT49-CTRL" } + ] + } + }, + "PORT49-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT49"}, + "i2c": + { + "topo_info": { "parent_bus":"0xA", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT49-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX2", "virt_parent":"PORT49"}, + "i2c": + { + "topo_info": { "parent_bus":"0xA", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"} + ] + } + }, + "PORT50": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT50", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"50"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT50-EEPROM" }, + { "itf":"control", "dev":"PORT50-CTRL" } + ] + } + }, + "PORT50-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT50"}, + "i2c": + { + "topo_info": { "parent_bus":"0xB", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT50-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX2", "virt_parent":"PORT50"}, + "i2c": + { + "topo_info": { "parent_bus":"0xB", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"} + ] + } + }, + "PORT51": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT51", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"51"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT51-EEPROM" }, + { "itf":"control", "dev":"PORT51-CTRL" } + ] + } + }, + "PORT51-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT51"}, + "i2c": + { + "topo_info": { "parent_bus":"0xC", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT51-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX2", "virt_parent":"PORT51"}, + "i2c": + { + "topo_info": { "parent_bus":"0xC", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"} + ] + } + }, + "PORT52": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT52", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"52"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT52-EEPROM" }, + { "itf":"control", "dev":"PORT52-CTRL" } + ] + } + }, + "PORT52-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT52"}, + "i2c": + { + "topo_info": { "parent_bus":"0xD", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT52-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX2", "virt_parent":"PORT52"}, + "i2c": + { + "topo_info": { "parent_bus":"0xD", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, + { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"} + ] + } + }, + "PORT53": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT53", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"53"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT53-EEPROM" }, + { "itf":"control", "dev":"PORT53-CTRL" } + ] + } + }, + "PORT53-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT53"}, + "i2c": + { + "topo_info": { "parent_bus":"0xE", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT53-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX2", "virt_parent":"PORT53"}, + "i2c": + { + "topo_info": { "parent_bus":"0xE", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, + { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + "PORT54": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT54", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"54"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT54-EEPROM" }, + { "itf":"control", "dev":"PORT54-CTRL" } + ] + } + }, + "PORT54-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT54"}, + "i2c": + { + "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT54-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX2", "virt_parent":"PORT54"}, + "i2c": + { + "topo_info": { "parent_bus":"0xF", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, + { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"} + ] + } + }, + "PORT55": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT55", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"55"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT55-EEPROM" }, + { "itf":"control", "dev":"PORT55-CTRL" } + ] + } + }, + "PORT55-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT55"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT55-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX2", "virt_parent":"PORT55"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + "PORT56": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT56", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"56"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT56-EEPROM" }, + { "itf":"control", "dev":"PORT56-CTRL" } + ] + } + }, + "PORT56-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT56-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX2", "virt_parent":"PORT56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, + { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"} + ] + } + }, + "FAN-CTRL": + { + "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"MUX1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x66", "dev_type":"fan_cpld"}, + "dev_attr": { "num_fantrays":"3"}, + "attr_list": + [ + { "attr_name":"fan1_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x32", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan2_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x36", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan3_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x3a", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan1_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan2_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan3_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan1_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x31", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + { "attr_name":"fan2_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x35", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150" , "attr_is_divisor":0}, + { "attr_name":"fan3_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x39", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0} + ] + } + }, + "SYS_LED": + { + "dev_info": { "device_type":"LED", "device_name":"SYS_LED"}, + "dev_attr": { "index":"0"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"amber","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x1","swpld_addr_offset":"0x43"}, + {"attr_name":"green","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x2","swpld_addr_offset":"0x43"}, + {"attr_name":"off","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x3","swpld_addr_offset":"0x43"} + ] + } + }, + "FANTRAY1_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"0"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x33"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x33"} + ] + } + }, + "FANTRAY2_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"1"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x37"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x37"} + ] + } + }, + "FANTRAY3_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"2"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x3b"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x3b"} + ] + } + } +} diff --git a/device/celestica/x86_64-cel_belgite-r0/pddf_support b/device/celestica/x86_64-cel_ds1000-r0/pddf_support similarity index 100% rename from device/celestica/x86_64-cel_belgite-r0/pddf_support rename to device/celestica/x86_64-cel_ds1000-r0/pddf_support diff --git a/device/celestica/x86_64-cel_belgite-r0/platform.json b/device/celestica/x86_64-cel_ds1000-r0/platform.json similarity index 62% rename from device/celestica/x86_64-cel_belgite-r0/platform.json rename to device/celestica/x86_64-cel_ds1000-r0/platform.json index 0e40fe8a88fa..79ae7f0bad87 100644 --- a/device/celestica/x86_64-cel_belgite-r0/platform.json +++ b/device/celestica/x86_64-cel_ds1000-r0/platform.json @@ -1,94 +1,70 @@ { "chassis": { - "name": "E1070", + "name": "DS1000", "status_led": { "controllable": true, "colors": ["green", "amber", "off"] }, - "thermal_manager": false, + "thermal_manager": false, "components": [ - { - "name": "SWCPLD" - }, - { - "name": "BIOS" - } - ], - "fans": [ { - "name": "Fantray1_1", - "speed": { - "controllable": true - }, - "status_led": { - "controllable": true, - "colors": ["green", "amber","off"] - } + "name": "CPLD SW" }, { - "name": "Fantray2_1", - "speed": { - "controllable": true - }, - "status_led": { - "controllable": true, - "colors": ["green", "amber","off"] - } + "name": "BIOS" }, { - "name": "Fantray3_1", - "speed": { - "controllable": true - }, - "status_led": { - "controllable": true, - "colors": ["green", "amber","off"] - } + "name": "ONIE" }, { - "name": "Fantray1_1", + "name": "SSD" + } + ], + "fans": [ + { + "name": "Fan 1", "speed": { "controllable": true }, "status_led": { "controllable": true, - "colors": ["green", "amber","off"] + "colors": ["green", "amber", "off"] } }, { - "name": "Fantray2_1", + "name": "Fan 2", "speed": { "controllable": true }, "status_led": { "controllable": true, - "colors": ["green", "amber","off"] + "colors": ["green", "amber", "off"] } }, { - "name": "Fantray3_1", + "name": "Fan 3", "speed": { "controllable": true }, "status_led": { "controllable": true, - "colors": ["green", "amber","off"] + "colors": ["green", "amber", "off"] } } ], "fan_drawers": [ { - "name": "Fantray1", + "name": "Drawer 1", "speed": { "controllable": false }, "status_led": { "controllable": false }, - "max_consumed_power": false, + "max_consumed_power": false, "fans": [ { - "name": "Fantray1_1", + "name": "Fan 1", "speed": { "controllable": false }, @@ -99,17 +75,17 @@ ] }, { - "name": "Fantray2", + "name": "Drawer 2", "speed": { "controllable": false }, "status_led": { "controllable": false }, - "max_consumed_power": false, + "max_consumed_power": false, "fans": [ { - "name": "Fantray2_1", + "name": "Fan 2", "speed": { "controllable": false }, @@ -120,17 +96,17 @@ ] }, { - "name": "Fantray3", + "name": "Drawer 3", "speed": { "controllable": false }, "status_led": { "controllable": false }, - "max_consumed_power": false, + "max_consumed_power": false, "fans": [ { - "name": "Fantray3_1", + "name": "Fan 3", "speed": { "controllable": false }, @@ -143,10 +119,10 @@ ], "psus": [ { - "name": "PSU1", + "name": "PSU 1", "fans": [ { - "name": "PSU1_FAN1", + "name": "PSU 1 Fan 1", "speed": { "controllable": false }, @@ -155,7 +131,7 @@ } } ], - "current": true, + "current": true, "power": true, "max_power": false, "voltage_high_threshold": false, @@ -167,10 +143,10 @@ } }, { - "name": "PSU2", + "name": "PSU 2", "fans": [ { - "name": "PSU2_FAN1", + "name": "PSU 2 Fan 1", "speed": { "controllable": false }, @@ -179,7 +155,7 @@ } } ], - "current": true, + "current": true, "power": true, "max_power": false, "voltage_high_threshold": false, @@ -193,175 +169,31 @@ ], "thermals": [ { - "name": "LM75_U10", + "name": "Front Left Temp", "controllable": false, "low-threshold": false, "low-crit-threshold": true }, { - "name": "LM75_U4", + "name": "Front Right Temp", "controllable": false, "low-threshold": false, "low-crit-threshold": true }, { - "name": "LM75_U7", + "name": "Rear Right Temp", "controllable": false, "low-threshold": false, "low-crit-threshold": true }, { - "name": "LM75_U60", + "name": "ASIC External Temp", "controllable": false, "low-threshold": false, "low-crit-threshold": true } ], "sfps": [ - { - "name": "PORT0" - }, - { - "name": "PORT1" - }, - { - "name": "PORT2" - }, - { - "name": "PORT3" - }, - { - "name": "PORT4" - }, - { - "name": "PORT5" - }, - { - "name": "PORT6" - }, - { - "name": "PORT7" - }, - { - "name": "PORT8" - }, - { - "name": "PORT9" - }, - { - "name": "PORT10" - }, - { - "name": "PORT11" - }, - { - "name": "PORT12" - }, - { - "name": "PORT13" - }, - { - "name": "PORT14" - }, - { - "name": "PORT15" - }, - { - "name": "PORT16" - }, - { - "name": "PORT17" - }, - { - "name": "PORT18" - }, - { - "name": "PORT19" - }, - { - "name": "PORT20" - }, - { - "name": "PORT21" - }, - { - "name": "PORT22" - }, - { - "name": "PORT23" - }, - { - "name": "PORT24" - }, - { - "name": "PORT25" - }, - { - "name": "PORT26" - }, - { - "name": "PORT27" - }, - { - "name": "PORT28" - }, - { - "name": "PORT29" - }, - { - "name": "PORT30" - }, - { - "name": "PORT31" - }, - { - "name": "PORT32" - }, - { - "name": "PORT33" - }, - { - "name": "PORT34" - }, - { - "name": "PORT35" - }, - { - "name": "PORT36" - }, - { - "name": "PORT37" - }, - { - "name": "PORT38" - }, - { - "name": "PORT39" - }, - { - "name": "PORT40" - }, - { - "name": "PORT41" - }, - { - "name": "PORT42" - }, - { - "name": "PORT43" - }, - { - "name": "PORT44" - }, - { - "name": "PORT45" - }, - { - "name": "PORT46" - }, - { - "name": "PORT47" - }, { "name": "PORT48" }, @@ -393,392 +225,392 @@ "index": "1", "lanes": "26", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/1"] + "1x1000[100,10]": ["Eth1/1"] } }, "Ethernet1": { "index": "2", "lanes": "25", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/2"] + "1x1000[100,10]": ["Eth2/1"] } }, "Ethernet2": { "index": "3", "lanes": "28", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/3"] + "1x1000[100,10]": ["Eth3/1"] } }, "Ethernet3": { "index": "4", "lanes": "27", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/4"] + "1x1000[100,10]": ["Eth4/1"] } }, "Ethernet4": { "index": "5", "lanes": "30", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/5"] + "1x1000[100,10]": ["Eth5/1"] } }, "Ethernet5": { "index": "6", "lanes": "29", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/6"] + "1x1000[100,10]": ["Eth6/1"] } }, "Ethernet6": { "index": "7", "lanes": "32", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/7"] + "1x1000[100,10]": ["Eth7/1"] } }, "Ethernet7": { "index": "8", "lanes": "31", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/8"] + "1x1000[100,10]": ["Eth8/1"] } }, "Ethernet8": { "index": "9", "lanes": "34", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/9"] + "1x1000[100,10]": ["Eth9/1"] } }, "Ethernet9": { "index": "10", "lanes": "33", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/10"] + "1x1000[100,10]": ["Eth10/1"] } }, "Ethernet10": { "index": "11", "lanes": "36", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/11"] + "1x1000[100,10]": ["Eth11/1"] } }, "Ethernet11": { "index": "12", "lanes": "35", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/12"] + "1x1000[100,10]": ["Eth12/1"] } }, "Ethernet12": { "index": "13", "lanes": "38", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/13"] + "1x1000[100,10]": ["Eth13/1"] } }, "Ethernet13": { "index": "14", "lanes": "37", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/14"] + "1x1000[100,10]": ["Eth14/1"] } }, "Ethernet14": { "index": "15", "lanes": "40", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/15"] + "1x1000[100,10]": ["Eth15/1"] } }, "Ethernet15": { "index": "16", "lanes": "39", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/16"] + "1x1000[100,10]": ["Eth16/1"] } }, "Ethernet16": { "index": "17", "lanes": "42", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/17"] + "1x1000[100,10]": ["Eth17/1"] } }, "Ethernet17": { "index": "18", "lanes": "41", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/18"] + "1x1000[100,10]": ["Eth18/1"] } }, "Ethernet18": { "index": "19", "lanes": "44", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/19"] + "1x1000[100,10]": ["Eth19/1"] } }, "Ethernet19": { "index": "20", "lanes": "43", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/20"] + "1x1000[100,10]": ["Eth20/1"] } }, "Ethernet20": { "index": "21", "lanes": "50", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/21"] + "1x1000[100,10]": ["Eth21/1"] } }, "Ethernet21": { "index": "22", "lanes": "49", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/22"] + "1x1000[100,10]": ["Eth22/1"] } }, "Ethernet22": { "index": "23", "lanes": "52", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/23"] + "1x1000[100,10]": ["Eth23/1"] } }, "Ethernet23": { "index": "24", "lanes": "51", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/24"] + "1x1000[100,10]": ["Eth24/1"] } }, "Ethernet24": { "index": "25", "lanes": "2", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/25"] + "1x1000[100,10]": ["Eth25/1"] } }, "Ethernet25": { "index": "26", "lanes": "1", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/26"] + "1x1000[100,10]": ["Eth26/1"] } }, "Ethernet26": { "index": "27", "lanes": "4", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/27"] + "1x1000[100,10]": ["Eth27/1"] } }, "Ethernet27": { "index": "28", "lanes": "3", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/28"] + "1x1000[100,10]": ["Eth28/1"] } }, "Ethernet28": { "index": "29", "lanes": "6", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/29"] + "1x1000[100,10]": ["Eth29/1"] } }, "Ethernet29": { "index": "30", "lanes": "5", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/30"] + "1x1000[100,10]": ["Eth30/1"] } }, "Ethernet30": { "index": "31", "lanes": "8", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/31"] + "1x1000[100,10]": ["Eth31/1"] } }, "Ethernet31": { "index": "32", "lanes": "7", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/32"] + "1x1000[100,10]": ["Eth32/1"] } }, "Ethernet32": { "index": "33", "lanes": "10", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/33"] + "1x1000[100,10]": ["Eth33/1"] } }, "Ethernet33": { "index": "34", "lanes": "9", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/34"] + "1x1000[100,10]": ["Eth34/1"] } }, "Ethernet34": { "index": "35", "lanes": "12", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/35"] + "1x1000[100,10]": ["Eth35/1"] } }, "Ethernet35": { "index": "36", "lanes": "11", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/36"] + "1x1000[100,10]": ["Eth36/1"] } }, "Ethernet36": { "index": "37", "lanes": "14", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/37"] + "1x1000[100,10]": ["Eth37/1"] } }, "Ethernet37": { "index": "38", "lanes": "13", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/38"] + "1x1000[100,10]": ["Eth38/1"] } }, "Ethernet38": { "index": "39", "lanes": "16", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/39"] + "1x1000[100,10]": ["Eth39/1"] } }, "Ethernet39": { "index": "40", "lanes": "15", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/40"] + "1x1000[100,10]": ["Eth40/1"] } }, "Ethernet40": { "index": "41", "lanes": "18", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/41"] + "1x1000[100,10]": ["Eth41/1"] } }, "Ethernet41": { "index": "42", "lanes": "17", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/42"] + "1x1000[100,10]": ["Eth42/1"] } }, "Ethernet42": { "index": "43", "lanes": "20", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/43"] + "1x1000[100,10]": ["Eth43/1"] } }, "Ethernet43": { "index": "44", "lanes": "19", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/44"] + "1x1000[100,10]": ["Eth44/1"] } }, "Ethernet44": { "index": "45", "lanes": "22", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/45"] + "1x1000[100,10]": ["Eth45/1"] } }, "Ethernet45": { "index": "46", "lanes": "21", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/46"] + "1x1000[100,10]": ["Eth46/1"] } }, "Ethernet46": { "index": "47", "lanes": "24", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/47"] + "1x1000[100,10]": ["Eth47/1"] } }, "Ethernet47": { "index": "48", "lanes": "23", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/48"] + "1x1000[100,10]": ["Eth48/1"] } }, "Ethernet48": { "index": "49", "lanes": "60", "breakout_modes": { - "1x10G[1G]": ["Ethernet1/0/49"] + "1x10G[1G]": ["Eth49/1"] } }, "Ethernet49": { "index": "50", "lanes": "58", "breakout_modes": { - "1x10G[1G]": ["Ethernet1/0/50"] + "1x10G[1G]": ["Eth50/1"] } }, "Ethernet50": { "index": "51", "lanes": "59", "breakout_modes": { - "1x10G[1G]": ["Ethernet1/0/51"] + "1x10G[1G]": ["Eth51/1"] } }, "Ethernet51": { "index": "52", "lanes": "57", "breakout_modes": { - "1x10G[1G]": ["Ethernet1/0/52"] + "1x10G[1G]": ["Eth52/1"] } }, "Ethernet52": { "index": "53", "lanes": "62", "breakout_modes": { - "1x10G[1G]": ["Ethernet1/0/53"] + "1x10G[1G]": ["Eth53/1"] } }, "Ethernet53": { "index": "54", "lanes": "64", "breakout_modes": { - "1x10G[1G]": ["Ethernet1/0/54"] + "1x10G[1G]": ["Eth54/1"] } }, "Ethernet54": { "index": "55", "lanes": "61", "breakout_modes": { - "1x10G[1G]": ["Ethernet1/0/55"] + "1x10G[1G]": ["Eth55/1"] } }, "Ethernet55": { "index": "56", "lanes": "63", "breakout_modes": { - "1x10G[1G]": ["Ethernet1/0/56"] + "1x10G[1G]": ["Eth56/1"] } } } diff --git a/device/celestica/x86_64-cel_belgite-r0/platform_asic b/device/celestica/x86_64-cel_ds1000-r0/platform_asic similarity index 100% rename from device/celestica/x86_64-cel_belgite-r0/platform_asic rename to device/celestica/x86_64-cel_ds1000-r0/platform_asic diff --git a/device/celestica/x86_64-cel_ds1000-r0/platform_components.json b/device/celestica/x86_64-cel_ds1000-r0/platform_components.json new file mode 100644 index 000000000000..deeabc3dee41 --- /dev/null +++ b/device/celestica/x86_64-cel_ds1000-r0/platform_components.json @@ -0,0 +1,12 @@ +{ + "chassis": { + "DS1000": { + "component": { + "BIOS": {}, + "ONIE": {}, + "CPLD SW": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_ds1000-r0/platform_reboot b/device/celestica/x86_64-cel_ds1000-r0/platform_reboot new file mode 100755 index 000000000000..233af9d08514 --- /dev/null +++ b/device/celestica/x86_64-cel_ds1000-r0/platform_reboot @@ -0,0 +1,3 @@ +#!/bin/bash + +/usr/local/bin/ds1000_platform_shutdown.sh system diff --git a/device/celestica/x86_64-cel_belgite-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_ds1000-r0/plugins/eeprom.py similarity index 100% rename from device/celestica/x86_64-cel_belgite-r0/plugins/eeprom.py rename to device/celestica/x86_64-cel_ds1000-r0/plugins/eeprom.py diff --git a/device/celestica/x86_64-cel_belgite-r0/plugins/psuutil.py b/device/celestica/x86_64-cel_ds1000-r0/plugins/psuutil.py similarity index 100% rename from device/celestica/x86_64-cel_belgite-r0/plugins/psuutil.py rename to device/celestica/x86_64-cel_ds1000-r0/plugins/psuutil.py diff --git a/device/celestica/x86_64-cel_belgite-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_ds1000-r0/plugins/sfputil.py similarity index 100% rename from device/celestica/x86_64-cel_belgite-r0/plugins/sfputil.py rename to device/celestica/x86_64-cel_ds1000-r0/plugins/sfputil.py diff --git a/device/celestica/x86_64-cel_belgite-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_ds1000-r0/pmon_daemon_control.json similarity index 100% rename from device/celestica/x86_64-cel_belgite-r0/pmon_daemon_control.json rename to device/celestica/x86_64-cel_ds1000-r0/pmon_daemon_control.json diff --git a/device/celestica/x86_64-cel_ds1000-r0/sensors.conf b/device/celestica/x86_64-cel_ds1000-r0/sensors.conf new file mode 100644 index 000000000000..aeb82af7eaf5 --- /dev/null +++ b/device/celestica/x86_64-cel_ds1000-r0/sensors.conf @@ -0,0 +1,45 @@ +# libsensors configuration file for Celestica DS1000 + +bus "i2c-6" "i2c-0-mux (chan_id 4)" +bus "i2c-4" "i2c-0-mux (chan_id 2)" +bus "i2c-2" "i2c-0-mux (chan_id 0)" +bus "i2c-5" "i2c-0-mux (chan_id 3)" + +chip "fan_cpld-i2c-2-66" + label fan1 "Fantray1_1 speed" + label fan2 "Fantray2_1 speed" + label fan3 "Fantray3_1 speed" + +chip "psu_pmbus-i2c-4-58" + label fan1 "PSU1 fan speed" + label in3 "PSU1 output voltage" + label temp1 "PSU1 temperature" + label power2 "PSU1 output power" + label curr2 "PSU1 output current" + +chip "psu_pmbus-i2c-4-59" + label fan1 "PSU2 fan speed" + label in3 "PSU2 output voltage" + label temp1 "PSU2 temperature" + label power2 "PSU2 output power" + label curr2 "PSU2 output current" + +chip "lm75-i2c-5-48" + label temp1 "Front Left Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +chip "lm75-i2c-5-49" + label temp1 "Front Right Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +chip "lm75-i2c-6-4a" + label temp1 "Rear Right Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +chip "lm75-i2c-6-49" + set temp1_max 110 + set temp1_max_hyst 105 + label temp1 "ASIC External Temp" diff --git a/device/celestica/x86_64-cel_belgite-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_ds1000-r0/system_health_monitoring_config.json similarity index 86% rename from device/celestica/x86_64-cel_belgite-r0/system_health_monitoring_config.json rename to device/celestica/x86_64-cel_ds1000-r0/system_health_monitoring_config.json index 28b3e30a6699..6f7d70895afd 100644 --- a/device/celestica/x86_64-cel_belgite-r0/system_health_monitoring_config.json +++ b/device/celestica/x86_64-cel_ds1000-r0/system_health_monitoring_config.json @@ -3,8 +3,8 @@ "devices_to_ignore": [ "asic", "psu.temperature", - "PSU1_FAN1", - "PSU2_FAN1" + "PSU 1 Fan 1", + "PSU 2 Fan 1" ], "user_defined_checkers": [], "polling_interval": 60, diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers.json.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers.json.j2 new file mode 100644 index 000000000000..b67cf577ab75 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} + diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_def.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_def.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_def.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..44fcf21887a6 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t0.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t1.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..5fe9cabcfd34 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t1.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "196608", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "33004032", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "12766208", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"33004032" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/hwsku.json b/device/celestica/x86_64-cel_ds2000-r0/DS2000/hwsku.json new file mode 100644 index 000000000000..059666102d99 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/hwsku.json @@ -0,0 +1,284 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet1": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet2": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet3": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet4": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet5": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet6": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet7": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet9": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet10": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet11": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet12": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet13": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet14": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet15": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet17": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet18": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet19": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet20": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet21": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet22": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet23": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet25": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet26": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet27": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet28": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet29": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet30": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet31": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet33": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet34": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet35": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet36": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet37": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet38": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet39": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet41": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet42": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet43": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet44": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet45": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet46": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet47": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet52": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet60": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet68": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet76": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + } + } +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/l2/config b/device/celestica/x86_64-cel_ds2000-r0/DS2000/l2/config new file mode 100644 index 000000000000..1cc35f24ade0 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/l2/config @@ -0,0 +1,7 @@ +l2_mem_entries=229376 +l3_mem_entries=16384 +l3_alpm_enable=0 +fpem_mem_entries=32768 +sai_tunnel_support=1 +use_all_splithorizon_groups=1 +flow_init_mode=1 diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/l3/config b/device/celestica/x86_64-cel_ds2000-r0/DS2000/l3/config new file mode 100644 index 000000000000..fff0cf54b08a --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/l3/config @@ -0,0 +1,5 @@ +l2_mem_entries=40960 +l3_mem_entries=40960 +l3_alpm_enable=2 +use_all_splithorizon_groups=1 +sai_tunnel_support=1 diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/port_config.ini b/device/celestica/x86_64-cel_ds2000-r0/DS2000/port_config.ini new file mode 100644 index 000000000000..9b9c028ebaac --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed mtu admin_status fec +Ethernet0 29 Eth1/1 1 25000 9216 up rs +Ethernet1 30 Eth2/1 2 25000 9216 up rs +Ethernet2 31 Eth3/1 3 25000 9216 up rs +Ethernet3 32 Eth4/1 4 25000 9216 up rs +Ethernet4 33 Eth5/1 5 25000 9216 up rs +Ethernet5 34 Eth6/1 6 25000 9216 up rs +Ethernet6 35 Eth7/1 7 25000 9216 up rs +Ethernet7 36 Eth8/1 8 25000 9216 up rs +Ethernet8 37 Eth9/1 9 25000 9216 up rs +Ethernet9 38 Eth10/1 10 25000 9216 up rs +Ethernet10 39 Eth11/1 11 25000 9216 up rs +Ethernet11 40 Eth12/1 12 25000 9216 up rs +Ethernet12 49 Eth13/1 13 25000 9216 up rs +Ethernet13 50 Eth14/1 14 25000 9216 up rs +Ethernet14 51 Eth15/1 15 25000 9216 up rs +Ethernet15 52 Eth16/1 16 25000 9216 up rs +Ethernet16 53 Eth17/1 17 25000 9216 up rs +Ethernet17 54 Eth18/1 18 25000 9216 up rs +Ethernet18 55 Eth19/1 19 25000 9216 up rs +Ethernet19 56 Eth20/1 20 25000 9216 up rs +Ethernet20 57 Eth21/1 21 25000 9216 up rs +Ethernet21 58 Eth22/1 22 25000 9216 up rs +Ethernet22 59 Eth23/1 23 25000 9216 up rs +Ethernet23 60 Eth24/1 24 25000 9216 up rs +Ethernet24 9 Eth25/1 25 25000 9216 up rs +Ethernet25 10 Eth26/1 26 25000 9216 up rs +Ethernet26 11 Eth27/1 27 25000 9216 up rs +Ethernet27 12 Eth28/1 28 25000 9216 up rs +Ethernet28 13 Eth29/1 29 25000 9216 up rs +Ethernet29 14 Eth30/1 30 25000 9216 up rs +Ethernet30 15 Eth31/1 31 25000 9216 up rs +Ethernet31 16 Eth32/1 32 25000 9216 up rs +Ethernet32 17 Eth33/1 33 25000 9216 up rs +Ethernet33 18 Eth34/1 34 25000 9216 up rs +Ethernet34 19 Eth35/1 35 25000 9216 up rs +Ethernet35 20 Eth36/1 36 25000 9216 up rs +Ethernet36 61 Eth37/1 37 25000 9216 up rs +Ethernet37 62 Eth38/1 38 25000 9216 up rs +Ethernet38 63 Eth39/1 39 25000 9216 up rs +Ethernet39 64 Eth40/1 40 25000 9216 up rs +Ethernet40 65 Eth41/1 41 25000 9216 up rs +Ethernet41 66 Eth42/1 42 25000 9216 up rs +Ethernet42 67 Eth43/1 43 25000 9216 up rs +Ethernet43 68 Eth44/1 44 25000 9216 up rs +Ethernet44 69 Eth45/1 45 25000 9216 up rs +Ethernet45 70 Eth46/1 46 25000 9216 up rs +Ethernet46 71 Eth47/1 47 25000 9216 up rs +Ethernet47 72 Eth48/1 48 25000 9216 up rs +Ethernet48 41,42,43,44 Eth49/1 49 100000 9216 up rs +Ethernet52 45,46,47,48 Eth50/1 50 100000 9216 up rs +Ethernet56 73,74,75,76 Eth51/1 51 100000 9216 up rs +Ethernet60 77,78,79,80 Eth52/1 52 100000 9216 up rs +Ethernet64 1,2,3,4 Eth53/1 53 100000 9216 up rs +Ethernet68 21,22,23,24 Eth54/1 54 100000 9216 up rs +Ethernet72 5,6,7,8 Eth55/1 55 100000 9216 up rs +Ethernet76 25,26,27,28 Eth56/1 56 100000 9216 up rs diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos.json.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos.json.j2 new file mode 100644 index 000000000000..ee67c6e26221 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config_t1.j2' %} diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos_config_t1.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos_config_t1.j2 new file mode 100644 index 000000000000..5fe5324a85c1 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos_config_t1.j2 @@ -0,0 +1,175 @@ +{%- set PORT_ALL = [] %} +{%- for port in PORT %} + {%- if PORT_ALL.append(port) %}{% endif %} +{%- endfor %} +{%- if PORT_ALL | sort_by_port_index %}{% endif %} + +{%- set port_names_list_all = [] %} +{%- for port in PORT_ALL %} + {%- if port_names_list_all.append(port) %}{% endif %} +{%- endfor %} +{%- set port_names_all = port_names_list_all | join(',') -%} + + +{%- set PORT_ACTIVE = [] %} +{%- if DEVICE_NEIGHBOR is not defined %} + {%- set PORT_ACTIVE = PORT_ALL %} +{%- else %} + {%- for port in DEVICE_NEIGHBOR.keys() %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} +{%- if PORT_ACTIVE | sort_by_port_index %}{% endif %} + +{%- set port_names_list_active = [] %} +{%- for port in PORT_ACTIVE %} + {%- if port_names_list_active.append(port) %}{%- endif %} +{%- endfor %} +{%- set port_names_active = port_names_list_active | join(',') -%} + + +{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%} + + +{ +{% if generate_tc_to_pg_map is defined %} + {{- generate_tc_to_pg_map() }} +{% else %} + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "3", + "4": "4", + "5": "0", + "6": "0", + "7": "7" + } + }, +{% endif %} + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0" : "1", + "1" : "1", + "2" : "1", + "3" : "3", + "4" : "4", + "5" : "2", + "6" : "1", + "7" : "1", + "8" : "0", + "9" : "1", + "10": "1", + "11": "1", + "12": "1", + "13": "1", + "14": "1", + "15": "1", + "16": "1", + "17": "1", + "18": "1", + "19": "1", + "20": "1", + "21": "1", + "22": "1", + "23": "1", + "24": "1", + "25": "1", + "26": "1", + "27": "1", + "28": "1", + "29": "1", + "30": "1", + "31": "1", + "32": "1", + "33": "1", + "34": "1", + "35": "1", + "36": "1", + "37": "1", + "38": "1", + "39": "1", + "40": "1", + "41": "1", + "42": "1", + "43": "1", + "44": "1", + "45": "1", + "46": "5", + "47": "1", + "48": "6", + "49": "1", + "50": "1", + "51": "1", + "52": "1", + "53": "1", + "54": "1", + "55": "1", + "56": "1", + "57": "1", + "58": "1", + "59": "1", + "60": "1", + "61": "1", + "62": "1", + "63": "1" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type" : "DWRR", + "weight": "14" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "15" + } + }, +{% if asic_type in pfc_to_pg_map_supported_asics %} + "PFC_PRIORITY_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "3": "3", + "4": "4" + } + }, +{% endif %} + "PORT_QOS_MAP": { +{% for port in PORT_ACTIVE %} + "{{ port }}": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", +{% if asic_type in pfc_to_pg_map_supported_asics %} + "pfc_to_pg_map" : "[PFC_PRIORITY_TO_PRIORITY_GROUP_MAP|AZURE]", +{% endif %} + "pfc_enable" : "3,4" + }{% if not loop.last %},{% endif %} +{% endfor %} + } +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai.profile b/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai.profile new file mode 100644 index 000000000000..6ca4984b91d3 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h-2a.config.bcm +SAI_LED_PORT_LOCATOR_FW_FILE=/usr/share/sonic/platform/port_locator.bin diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai_postinit_cmd.soc new file mode 100644 index 000000000000..731625308a5e --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai_postinit_cmd.soc @@ -0,0 +1,2 @@ +modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1 +modreg ING_MISC_CONFIG INPUT_PRI_UNTAGGED=1 diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/td3-as13-48f8h-2a.config.bcm b/device/celestica/x86_64-cel_ds2000-r0/DS2000/td3-as13-48f8h-2a.config.bcm new file mode 100644 index 000000000000..5abc527f9419 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/td3-as13-48f8h-2a.config.bcm @@ -0,0 +1,461 @@ +#polarity/lanemap is using TH2 style. +core_clock_frequency=1525 +dpp_clock_ratio=2:3 + +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 + + +oversubscribe_mode=1 + +pbmp_xport_xe=0x1FFFFFFFFFFFFFFFE + +parity_enable=0 +mem_cache_enable=0 + +l2_mem_entries=32768 +l3_mem_entries=16384 +fpem_mem_entries=16384 +l2xmsg_mode=1 + +# Tunnel +sai_tunnel_support=1 +bcm_tunnel_term_compatible_mode=1 +use_all_splithorizon_groups=1 + +# RIOT Enable +riot_enable=1 +riot_overlay_l3_intf_mem_size=8192 +riot_overlay_l3_egress_mem_size=32768 +l3_ecmp_levels=2 +riot_overlay_ecmp_resilient_hash_size=16384 +flow_init_mode=1 + +# Platform specfic +bcm_stat_interval=2000000 +cdma_timeout_usec=3000000 +help_cli_enable=1 +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=0x1 +l3_alpm_enable=2 +l3_max_ecmp_mode=1 +max_vp_lags=0 +memlist_enable=1 +reglist_enable=1 +miim_intr_enable=0 +module_64ports=1 +port_flex_enable=1 +schan_intr_enable=0 +stable_size=0x5500000 ;Specify the stable cache size in bytes used for Warm boot operations +tdma_timeout_usec=3000000 +skip_L2_USER_ENTRY=0 +l3_alpm_ipv6_128b_bkt_rsvd=1 + + + +#FC0 +portmap_1=1:100 + +#FC1 +portmap_2=5:100 + +#FC2 +portmap_3=9:25 +portmap_4=10:25 +portmap_5=11:25 +portmap_6=12:25 + +#FC3 +portmap_7=13:25 +portmap_8=14:25 +portmap_9=15:25 +portmap_10=16:25 + +#FC4 +portmap_11=17:25 +portmap_12=18:25 +portmap_13=19:25 +portmap_14=20:25 + +#FC5 +portmap_15=21:100 + +#FC6 +portmap_16=25:100 + +#FC7 +portmap_29=29:25 +portmap_30=30:25 +portmap_31=31:25 +portmap_20=32:25 + +#FC8 +portmap_21=33:25 +portmap_22=34:25 +portmap_23=35:25 +portmap_24=36:25 + +#FC9 +portmap_25=37:25 +portmap_26=38:25 +portmap_27=39:25 +portmap_28=40:25 + +#FC10 +portmap_33=41:100 + +#FC11 +portmap_61=45:100 + +#FC12 +portmap_62=49:25 +portmap_63=50:25 +portmap_37=51:25 +portmap_38=52:25 + +#FC13 +portmap_39=53:25 +portmap_40=54:25 +portmap_41=55:25 +portmap_42=56:25 + +#FC14 +portmap_43=57:25 +portmap_44=58:25 +portmap_45=59:25 +portmap_46=60:25 + +#FC15 +portmap_47=61:25 +portmap_48=62:25 +portmap_49=63:25 +portmap_50=64:25 + +#FC16 +portmap_51=65:25 +portmap_52=66:25 +portmap_53=67:25 +portmap_54=68:25 + +#FC17 +portmap_55=69:25 +portmap_56=70:25 +portmap_57=71:25 +portmap_58=72:25 + +#FC18 +portmap_59=73:100 + +#FC19 +portmap_60=77:100 + + +#portmap_64=81:10 + +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{1.0}=0x1302 +phy_chain_tx_lane_map_physical{5.0}=0x1032 +phy_chain_rx_lane_map_physical{5.0}=0x1302 +phy_chain_tx_lane_map_physical{9.0}=0x0123 +phy_chain_rx_lane_map_physical{9.0}=0x1032 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x1032 +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x1032 +phy_chain_tx_lane_map_physical{21.0}=0x1302 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_tx_lane_map_physical{25.0}=0x3120 +phy_chain_rx_lane_map_physical{25.0}=0x1032 +phy_chain_tx_lane_map_physical{29.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x1032 +phy_chain_tx_lane_map_physical{33.0}=0x0123 +phy_chain_rx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{37.0}=0x0123 +phy_chain_rx_lane_map_physical{37.0}=0x1032 +phy_chain_tx_lane_map_physical{41.0}=0x1302 +phy_chain_rx_lane_map_physical{41.0}=0x1023 +phy_chain_tx_lane_map_physical{45.0}=0x1032 +phy_chain_rx_lane_map_physical{45.0}=0x0213 +phy_chain_tx_lane_map_physical{49.0}=0x3210 +phy_chain_rx_lane_map_physical{49.0}=0x2301 +phy_chain_tx_lane_map_physical{53.0}=0x3210 +phy_chain_rx_lane_map_physical{53.0}=0x2301 +phy_chain_tx_lane_map_physical{57.0}=0x3210 +phy_chain_rx_lane_map_physical{57.0}=0x2301 +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x2301 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x2301 +phy_chain_tx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x2301 +phy_chain_tx_lane_map_physical{73.0}=0x2301 +phy_chain_rx_lane_map_physical{73.0}=0x2031 +phy_chain_tx_lane_map_physical{77.0}=0x0132 +phy_chain_rx_lane_map_physical{77.0}=0x3012 +phy_chain_tx_lane_map_physical{81.0}=0x3210 +phy_chain_rx_lane_map_physical{81.0}=0x3201 + +#FC0 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 + +#FC1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 + +#FC2 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x1 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 + +#FC3 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 + +#FC4 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x1 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 + +#FC5 +phy_chain_tx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 + +#FC6 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x1 +phy_chain_tx_polarity_flip_physical{27.0}=0x1 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 + +#FC7 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x1 + +#FC8 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +#FC9 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 + +#FC10 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 + +#FC11 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 + +#FC12 +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 + +#FC13 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x1 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 + +#FC14 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x0 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 + +#FC15 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 + +#FC16 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 + +#FC17 +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 + +#FC18 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 + +#FC19 +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 + + +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x1 + +dport_map_port_29=1 +dport_map_port_30=2 +dport_map_port_31=3 +dport_map_port_20=4 +dport_map_port_21=5 +dport_map_port_22=6 +dport_map_port_23=7 +dport_map_port_24=8 +dport_map_port_25=9 +dport_map_port_26=10 +dport_map_port_27=11 +dport_map_port_28=12 +dport_map_port_62=13 +dport_map_port_63=14 +dport_map_port_37=15 +dport_map_port_38=16 +dport_map_port_39=17 +dport_map_port_40=18 +dport_map_port_41=19 +dport_map_port_42=20 +dport_map_port_43=21 +dport_map_port_44=22 +dport_map_port_45=23 +dport_map_port_46=24 +dport_map_port_3=25 +dport_map_port_4=26 +dport_map_port_5=27 +dport_map_port_6=28 +dport_map_port_7=29 +dport_map_port_8=30 +dport_map_port_9=31 +dport_map_port_10=32 +dport_map_port_11=33 +dport_map_port_12=34 +dport_map_port_13=35 +dport_map_port_14=36 +dport_map_port_47=37 +dport_map_port_48=38 +dport_map_port_49=39 +dport_map_port_50=40 +dport_map_port_51=41 +dport_map_port_52=42 +dport_map_port_53=43 +dport_map_port_54=44 +dport_map_port_55=45 +dport_map_port_56=46 +dport_map_port_57=47 +dport_map_port_58=48 +dport_map_port_33=49 +dport_map_port_61=50 +dport_map_port_59=51 +dport_map_port_60=52 +dport_map_port_1=53 +dport_map_port_15=54 +dport_map_port_2=55 +dport_map_port_16=56 + +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc + diff --git a/device/celestica/x86_64-cel_ds2000-r0/custom_led.bin b/device/celestica/x86_64-cel_ds2000-r0/custom_led.bin new file mode 100644 index 000000000000..7e6b6f96c1d4 Binary files /dev/null and b/device/celestica/x86_64-cel_ds2000-r0/custom_led.bin differ diff --git a/device/celestica/x86_64-cel_ds2000-r0/default_sku b/device/celestica/x86_64-cel_ds2000-r0/default_sku new file mode 100644 index 000000000000..ae9d33331e85 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/default_sku @@ -0,0 +1 @@ +DS2000 t1 diff --git a/device/celestica/x86_64-cel_ds2000-r0/installer.conf b/device/celestica/x86_64-cel_ds2000-r0/installer.conf new file mode 100644 index 000000000000..bb956b2aefb1 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_DEV=0 +CONSOLE_PORT=0xe060 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="processor.max_cstate=1 intel_idle.max_cstate=0 intel_iommu=off noirqdebug acpi_no_watchdog" diff --git a/device/celestica/x86_64-cel_ds2000-r0/led_proc_init.soc b/device/celestica/x86_64-cel_ds2000-r0/led_proc_init.soc new file mode 100644 index 000000000000..6f242fa07d89 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/led_proc_init.soc @@ -0,0 +1,8 @@ +#Enable all ports +#port all en=1 +#sleep 6 +#linkscan 250000; port xe,ce linkscan=on + +#Load LED +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +led auto on; led start diff --git a/device/celestica/x86_64-cel_ds2000-r0/media_settings.json b/device/celestica/x86_64-cel_ds2000-r0/media_settings.json new file mode 100644 index 000000000000..299dfd211ecf --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/media_settings.json @@ -0,0 +1,834 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-48": { + "25000-copper-1.0M": { + "preemphasis": { + "lane0": "0x1a400a" + } + }, + "25000-copper-3.0M": { + "preemphasis": { + "lane0": "0x1a400a" + } + }, + "25000-copper-5.0M": { + "preemphasis": { + "lane0": "0x1a400a" + } + }, + "10000-copper-1.0M": { + "preemphasis": { + "lane0": "0x19410a" + } + }, + "10000-copper-3.0M": { + "preemphasis": { + "lane0": "0x19410a" + } + }, + "10000-copper-5.0M": { + "preemphasis": { + "lane0": "0x19410a" + } + }, + "10000-copper-7.0M": { + "preemphasis": { + "lane0": "0x19410a" + } + }, + "Default": { + "preemphasis": { + "lane0": "0x14410a" + } + } + }, + "49-60": { + "25000-copper-1.0M": { + "preemphasis": { + "lane0": "0x1a400a", + "lane1": "0x1a400a", + "lane2": "0x1a400a", + "lane3": "0x1a400a" + } + }, + "25000-copper-3.0M": { + "preemphasis": { + "lane0": "0x1a400a", + "lane1": "0x1a400a", + "lane2": "0x1a400a", + "lane3": "0x1a400a" + } + }, + "25000-copper-5.0M": { + "preemphasis": { + "lane0": "0x1a400a", + "lane1": "0x1a400a", + "lane2": "0x1a400a", + "lane3": "0x1a400a" + } + }, + "10000-copper-1.0M": { + "preemphasis": { + "lane0": "0x19410a", + "lane1": "0x19410a", + "lane2": "0x19410a", + "lane3": "0x19410a" + } + }, + "10000-copper-3.0M": { + "preemphasis": { + "lane0": "0x19410a", + "lane1": "0x19410a", + "lane2": "0x19410a", + "lane3": "0x19410a" + } + }, + "10000-copper-5.0M": { + "preemphasis": { + "lane0": "0x19410a", + "lane1": "0x19410a", + "lane2": "0x19410a", + "lane3": "0x19410a" + } + }, + "10000-copper-7.0M": { + "preemphasis": { + "lane0": "0x19410a", + "lane1": "0x19410a", + "lane2": "0x19410a", + "lane3": "0x19410a" + } + }, + "Default": { + "preemphasis": { + "lane0": "0x14410a", + "lane1": "0x14410a", + "lane2": "0x14410a", + "lane3": "0x14410a" + } + } + } + }, + "PORT_MEDIA_SETTINGS": { + "1": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x053602" + } + } + }, + "2": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x053602" + } + } + }, + "3": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x053602" + } + } + }, + "4": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094a04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x083902" + } + } + }, + "5": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b06" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073802" + } + } + }, + "6": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073802" + } + } + }, + "7": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073702" + } + } + }, + "8": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073702" + } + } + }, + "9": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073702" + } + } + }, + "10": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073702" + } + } + }, + "11": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x053602" + } + } + }, + "12": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x053602" + } + } + }, + "13": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x093a02" + } + } + }, + "14": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0a3b02" + } + } + }, + "15": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0d4002" + } + } + }, + "16": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0d4002" + } + } + }, + "17": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0d4002" + } + } + }, + "18": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0d4002" + } + } + }, + "19": { + "25000-optical": { + "preemphasis": { + "lane0": "0x104c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3f02" + } + } + }, + "20": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3f02" + } + } + }, + "21": { + "25000-optical": { + "preemphasis": { + "lane0": "0x104c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3d02" + } + } + }, + "22": { + "25000-optical": { + "preemphasis": { + "lane0": "0x104c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3f02" + } + } + }, + "23": { + "25000-optical": { + "preemphasis": { + "lane0": "0x104c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3d02" + } + } + }, + "24": { + "25000-optical": { + "preemphasis": { + "lane0": "0x104c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3f02" + } + } + }, + "25": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124305" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x124702" + } + } + }, + "26": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124305" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x114602" + } + } + }, + "27": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124305" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0f4402" + } + } + }, + "28": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124305" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0f4402" + } + } + }, + "29": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124305" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0e4202" + } + } + }, + "30": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124305" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0e4202" + } + } + }, + "31": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124305" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0d4002" + } + } + }, + "32": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124305" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0d4002" + } + } + }, + "33": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124b07" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3f02" + } + } + }, + "34": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124b07" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3d02" + } + } + }, + "35": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124b07" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0b3c02" + } + } + }, + "36": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124b07" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0b3c02" + } + } + }, + "37": { + "25000-optical": { + "preemphasis": { + "lane0": "0x104c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3d02" + } + } + }, + "38": { + "25000-optical": { + "preemphasis": { + "lane0": "0x104c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3d02" + } + } + }, + "39": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073702" + } + } + }, + "40": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073802" + } + } + }, + "41": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073802" + } + } + }, + "42": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073802" + } + } + }, + "43": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073802" + } + } + }, + "44": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094c04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x083902" + } + } + }, + "45": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x083902" + } + } + }, + "46": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x093a02" + } + } + }, + "47": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x093a02" + } + } + }, + "48": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x093a02" + } + } + }, + "49": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114b08", + "lane1": "0x114b08", + "lane2": "0x114b08", + "lane3": "0x114b08" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0e4202", + "lane1": "0x0e4202", + "lane2": "0x0e4202", + "lane3": "0x0e4202" + } + } + }, + "50": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124a08", + "lane1": "0x124a08", + "lane2": "0x124a08", + "lane3": "0x124a08" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x124702", + "lane1": "0x124702", + "lane2": "0x124702", + "lane3": "0x124702" + } + } + }, + "51": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114b08", + "lane1": "0x114b08", + "lane2": "0x114b08", + "lane3": "0x114b08" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0f4402", + "lane1": "0x0f4402", + "lane2": "0x0f4402", + "lane3": "0x0f4402" + } + } + }, + "52": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114b08", + "lane1": "0x114b08", + "lane2": "0x114b08", + "lane3": "0x114b08" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0f4402", + "lane1": "0x0f4402", + "lane2": "0x0f4402", + "lane3": "0x0f4402" + } + } + }, + "53": { + "25000-optical": { + "preemphasis": { + "lane0": "0x154708", + "lane1": "0x154708", + "lane2": "0x154708", + "lane3": "0x154708" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0a3b02", + "lane1": "0x0a3b02", + "lane2": "0x0a3b02", + "lane3": "0x0a3b02" + } + } + }, + "54": { + "25000-optical": { + "preemphasis": { + "lane0": "0x154609", + "lane1": "0x154609", + "lane2": "0x154609", + "lane3": "0x154609" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3f02", + "lane1": "0x0c3f02", + "lane2": "0x0c3f02", + "lane3": "0x0c3f02" + } + } + }, + "55": { + "25000-optical": { + "preemphasis": { + "lane0": "0x164509", + "lane1": "0x164509", + "lane2": "0x164509", + "lane3": "0x164509" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0a3b02", + "lane1": "0x0a3b02", + "lane2": "0x0a3b02", + "lane3": "0x0a3b02" + } + } + }, + "56": { + "25000-optical": { + "preemphasis": { + "lane0": "0x154708", + "lane1": "0x154708", + "lane2": "0x154708", + "lane3": "0x154708" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3f02", + "lane1": "0x0c3f02", + "lane2": "0x0c3f02", + "lane3": "0x0c3f02" + } + } + } + } +} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_ds2000-r0/pddf/pd-plugin.json b/device/celestica/x86_64-cel_ds2000-r0/pddf/pd-plugin.json new file mode 100644 index 000000000000..839c9b5dfccd --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/pddf/pd-plugin.json @@ -0,0 +1,145 @@ +{ + "PSU": + { + "name": + { + "1": "PSU 1", + "2": "PSU 2" + }, + "fan_name": + { + "1": + { + "1": "PSU 1 Fan 1" + }, + "2": + { + "1": "PSU 2 Fan 1" + } + }, + "thermal_name": + { + "1": "PSU 1 Temp1", + "2": "PSU 2 Temp1" + }, + "psu_present": + { + "bmc": + { + "valmap": { "0": true, "4":false, "8":false } + }, + "i2c": + { + "valmap": {"1":true, "0": false} + } + }, + + "psu_power_good": + { + "bmc": + { + "valmap": { "1": true, "2": true, "0":false } + }, + "i2c": + { + "valmap": {"1":true, "0": false} + } + + }, + + "psu_fan_dir": + { + "bmc": + { + "valmap": { "B2F":"INTAKE", "F2B":"EXHAUST" } + }, + "i2c": + { + "valmap": { "FSP550-29FM":"INTAKE", "FSP550-20FM":"EXHAUST"} + } + + }, + + "psu_led_color": + { + "colmap": {"green":"green", "red":"amber"} + }, + + "PSU_FAN_MAX_SPEED":"18000" + }, + + "FAN": + { + "direction": + { + "bmc": + { + "valmap": { "1":"INTAKE", "0":"EXHAUST" } + }, + "i2c": + { + "valmap": { "1":"INTAKE", "0":"EXHAUST" } + } + }, + "drawer_name": + { + "1": "Fantray 1", + "2": "Fantray 2", + "3": "Fantray 3", + "4": "Fantray 4" + }, + "name": + { + "1": + { + "1": "Fan 1 Front", + "2": "Fan 1 Rear" + }, + "2": + { + "1": "Fan 2 Front", + "2": "Fan 2 Rear" + }, + "3": + { + "1": "Fan 3 Front", + "2": "Fan 3 Rear" + }, + "4": + { + "1": "Fan 4 Front", + "2": "Fan 4 Rear" + } + }, + "present": + { + "bmc": + { + "valmap": {"0":true, "1":false} + }, + "bmc": + { + "valmap": {"0":true, "1":false} + }, + "i2c": + { + "valmap": {"1":true, "0":false} + } + }, + + "fan_master_led_color": + { + "colmap": {"green":"green", "red":"amber"} + }, + + "duty_cycle_to_pwm": "lambda dc: ((dc*255.0)/100)", + + "pwm_to_duty_cycle": "lambda pwm: ((pwm*100.0)/256)", + + "FAN_MAX_RPM_SPEED": + { + "Front": "23300", + "Rear": "20300" + } + } +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-bmc.json b/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-bmc.json new file mode 100644 index 000000000000..5f4ef1700b91 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-bmc.json @@ -0,0 +1,2891 @@ +{ +"PLATFORM": +{ + "num_psus":2, + "num_fantrays":4, + "num_fans_pertray":2, + "num_ports":56, + "num_temps":9, + "bmc_present": "True", + "pddf_dev_types": + { + "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", + "CPLD": + [ + "i2c_cpld" + ], + "PSU": + [ + "psu_eeprom", + "psu_pmbus" + ], + "FAN": + [ + "fan_ctrl" + ], + "PORT_MODULE": + [ + "pddf_xcvr" + ], + "FPGAPCIE": + [ + "fpgapci" + ] + + }, + "std_perm_kos": + [ + "i2c_ismt", + "i2c-i801" + ], + + "std_kos": + [ + "lpc_ich", + "i2c_dev", + "ipmi_devintf", + "ipmi_si", + "i2c_mux_pca954x", + "optoe", + "mc24lc64t" + ], + + "pddf_kos": + [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_led_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_fpgapci_driver", + "pddf_fpgapci_module" + ], + + "custom_kos": + [ + "pddf_custom_fpga_algo" + ] + }, + + "SYSTEM": + { + "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, + "i2c": + { + "CONTROLLERS": + [ + { "dev_name":"i2c-0", "dev":"SMBUS0" }, + { "dev_name":"pcie-0", "dev":"PCIE0" } + ] + } + }, + + "SMBUS0": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x0"}, + "DEVICES": + [ + {"dev": "EEPROM1"} + ] + } + }, + + "EEPROM1": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + + "PCIE0": + { + "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"}, + "i2c": + { + "DEVICES": + [ + {"dev": "FPGAPCIE0"} + ] + } + }, + + "FPGAPCIE0": + { + "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x0"}, + "dev_attr": { "vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0", "data_size":"0x25000", "i2c_ch_base_offset":"0x00010000", "i2c_ch_size":"0x1000", "virt_i2c_ch":"0xd"}, + "channel": + [ + { "chn":"1", "dev":"MUX1" }, + { "chn":"1", "dev":"MUX2" }, + { "chn":"1", "dev":"MUX3" }, + { "chn":"1", "dev":"MUX4" }, + { "chn":"1", "dev":"MUX5" }, + { "chn":"1", "dev":"MUX6" }, + { "chn":"2", "dev":"MUX7" }, + { "chn":"3", "dev":"CPLD1" }, + { "chn":"3", "dev":"CPLD2" }, + { "chn":"4", "dev":"CPLD_B" } + ] + } + }, + + "MUX1": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT1" }, + { "chn":"1", "dev":"PORT2" }, + { "chn":"2", "dev":"PORT3" }, + { "chn":"3", "dev":"PORT4" }, + { "chn":"4", "dev":"PORT5" }, + { "chn":"5", "dev":"PORT6" }, + { "chn":"6", "dev":"PORT7" }, + { "chn":"7", "dev":"PORT8" } + ] + } + }, + + "MUX2": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0xa", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT9" }, + { "chn":"1", "dev":"PORT10" }, + { "chn":"2", "dev":"PORT11" }, + { "chn":"3", "dev":"PORT12" }, + { "chn":"4", "dev":"PORT13" }, + { "chn":"5", "dev":"PORT14" }, + { "chn":"6", "dev":"PORT15" }, + { "chn":"7", "dev":"PORT16" } + ] + } + }, + + + "MUX3": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x74", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x12", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT17" }, + { "chn":"1", "dev":"PORT18" }, + { "chn":"2", "dev":"PORT19" }, + { "chn":"3", "dev":"PORT20" }, + { "chn":"4", "dev":"PORT21" }, + { "chn":"5", "dev":"PORT22" }, + { "chn":"6", "dev":"PORT23" }, + { "chn":"7", "dev":"PORT24" } + ] + } + }, + + "MUX4": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x75", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x1a", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT25" }, + { "chn":"1", "dev":"PORT26" }, + { "chn":"2", "dev":"PORT27" }, + { "chn":"3", "dev":"PORT28" }, + { "chn":"4", "dev":"PORT29" }, + { "chn":"5", "dev":"PORT30" }, + { "chn":"6", "dev":"PORT31" }, + { "chn":"7", "dev":"PORT32" } + ] + } + }, + + "MUX5": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX5", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x76", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x22", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT33" }, + { "chn":"1", "dev":"PORT34" }, + { "chn":"2", "dev":"PORT35" }, + { "chn":"3", "dev":"PORT36" }, + { "chn":"4", "dev":"PORT37" }, + { "chn":"5", "dev":"PORT38" }, + { "chn":"6", "dev":"PORT39" }, + { "chn":"7", "dev":"PORT40" } + ] + } + }, + + "MUX6": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX6", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x77", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2a", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT41" }, + { "chn":"1", "dev":"PORT42" }, + { "chn":"2", "dev":"PORT43" }, + { "chn":"3", "dev":"PORT44" }, + { "chn":"4", "dev":"PORT45" }, + { "chn":"5", "dev":"PORT46" }, + { "chn":"6", "dev":"PORT47" }, + { "chn":"7", "dev":"PORT48" } + ] + } + }, + "MUX7": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX7", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x74", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x32", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT53" }, + { "chn":"1", "dev":"PORT54" }, + { "chn":"2", "dev":"PORT55" }, + { "chn":"3", "dev":"PORT56" }, + { "chn":"4", "dev":"PORT49" }, + { "chn":"5", "dev":"PORT50" }, + { "chn":"6", "dev":"PORT51" }, + { "chn":"7", "dev":"PORT52" } + ] + } + }, + + "CPLD1": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x30", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD2": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x31", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_B": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD_B", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x67", "dev_addr":"0x0d", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "PORT1": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT1", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"1"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT1-EEPROM" }, + { "itf":"control", "dev":"PORT1-CTRL" } + + ] + } + }, + "PORT1-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT1-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX1", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT2": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT2", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"2"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT2-EEPROM" }, + { "itf":"control", "dev":"PORT2-CTRL" } + ] + } + }, + + "PORT2-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT2-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX1", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT3": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT3", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"3"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT3-EEPROM" }, + { "itf":"control", "dev":"PORT3-CTRL" } + ] + } + }, + "PORT3-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT3-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX1", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT4": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT4", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"4"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT4-EEPROM" }, + { "itf":"control", "dev":"PORT4-CTRL" } + ] + } + }, + "PORT4-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT4-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX1", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT5": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT5", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"5"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT5-EEPROM" }, + { "itf":"control", "dev":"PORT5-CTRL" } + ] + } + }, + + "PORT5-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT5-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX1", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT6": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT6", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"6"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT6-EEPROM" }, + { "itf":"control", "dev":"PORT6-CTRL" } + ] + } + }, + "PORT6-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT6-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX1", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT7": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT7", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"7"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT7-EEPROM" }, + { "itf":"control", "dev":"PORT7-CTRL" } + ] + } + }, + "PORT7-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT7-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT8": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT8", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"8"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT8-EEPROM" }, + { "itf":"control", "dev":"PORT8-CTRL" } + ] + } + }, + "PORT8-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT8-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX1", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT9": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT9", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"9"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT9-EEPROM" }, + { "itf":"control", "dev":"PORT9-CTRL" } + ] + } + }, + "PORT9-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT9-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX2", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT10": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT10", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"10"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT10-EEPROM" }, + { "itf":"control", "dev":"PORT10-CTRL" } + ] + } + }, + "PORT10-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT10-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX2", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT11": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT11", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"11"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT11-EEPROM" }, + { "itf":"control", "dev":"PORT11-CTRL" } + ] + } + }, + "PORT11-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT11-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX2", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT12": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT12", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"12"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT12-EEPROM" }, + { "itf":"control", "dev":"PORT12-CTRL" } + ] + } + }, + "PORT12-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT12-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX2", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT13": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT13", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"13"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT13-EEPROM" }, + { "itf":"control", "dev":"PORT13-CTRL" } + ] + } + }, + "PORT13-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT13-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX2", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT14": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT14", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"14"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT14-EEPROM" }, + { "itf":"control", "dev":"PORT14-CTRL" } + ] + } + }, + "PORT14-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT14-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX2", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0xf", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT15": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT15", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"15"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT15-EEPROM" }, + { "itf":"control", "dev":"PORT15-CTRL" } + ] + } + }, + "PORT15-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT15-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX2", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT16": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT16", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"16"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT16-EEPROM" }, + { "itf":"control", "dev":"PORT16-CTRL" } + ] + } + }, + "PORT16-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT16-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX2", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT17": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT17", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"17"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT17-EEPROM" }, + { "itf":"control", "dev":"PORT17-CTRL" } + ] + } + }, + "PORT17-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT17-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX3", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x12", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT18": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT18", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"18"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT18-EEPROM" }, + { "itf":"control", "dev":"PORT18-CTRL" } + ] + } + }, + "PORT18-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT18-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX3", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x13", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT19": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT19", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"19"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT19-EEPROM" }, + { "itf":"control", "dev":"PORT19-CTRL" } + ] + } + }, + "PORT19-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT19-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX3", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x14", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT20": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT20", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"20"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT20-EEPROM" }, + { "itf":"control", "dev":"PORT20-CTRL" } + ] + } + }, + "PORT20-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT20-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX3", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x15", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT21": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT21", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"21"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT21-EEPROM" }, + { "itf":"control", "dev":"PORT21-CTRL" } + ] + } + }, + "PORT21-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT21-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX3", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT22": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT22", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"22"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT22-EEPROM" }, + { "itf":"control", "dev":"PORT22-CTRL" } + ] + } + }, + "PORT22-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT22-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX3", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT23": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT23", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"23"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT23-EEPROM" }, + { "itf":"control", "dev":"PORT23-CTRL" } + ] + } + }, + "PORT23-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT23-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX3", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x18", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT24": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT24", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"24"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT24-EEPROM" }, + { "itf":"control", "dev":"PORT24-CTRL" } + ] + } + }, + "PORT24-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT24-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX3", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x19", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT25": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT25", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"25"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT25-EEPROM" }, + { "itf":"control", "dev":"PORT25-CTRL" } + ] + } + }, + "PORT25-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT25-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT26": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT26", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"26"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT26-EEPROM" }, + { "itf":"control", "dev":"PORT26-CTRL" } + ] + } + }, + "PORT26-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT26-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT27": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT27", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"27"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT27-EEPROM" }, + { "itf":"control", "dev":"PORT27-CTRL" } + ] + } + }, + "PORT27-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT27-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT28": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT28", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"28"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT28-EEPROM" }, + { "itf":"control", "dev":"PORT28-CTRL" } + ] + } + }, + "PORT28-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT28-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT29": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT29", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"29"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT29-EEPROM" }, + { "itf":"control", "dev":"PORT29-CTRL" } + ] + } + }, + "PORT29-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT29-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT30": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT30", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"30"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT30-EEPROM" }, + { "itf":"control", "dev":"PORT30-CTRL" } + ] + } + }, + "PORT30-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT30-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT31": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT31", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"31"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT31-EEPROM" }, + { "itf":"control", "dev":"PORT31-CTRL" } + ] + } + }, + "PORT31-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT31-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT32": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT32", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"32"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT32-EEPROM" }, + { "itf":"control", "dev":"PORT32-CTRL" } + ] + } + }, + "PORT32-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT32-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT32-CTRL", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT33": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT33", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"33"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT33-EEPROM" }, + { "itf":"control", "dev":"PORT33-CTRL" } + ] + } + }, + "PORT33-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT33-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT33-CTRL", "device_parent":"MUX5", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x210", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT34": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT34", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"34"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT34-EEPROM" }, + { "itf":"control", "dev":"PORT34-CTRL" } + ] + } + }, + "PORT34-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT34-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": { "parent_bus":"0x23", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT34-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT34-CTRL", "device_parent":"MUX5", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": { "parent_bus":"0x23", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x220", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT35": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT35", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"35"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT35-EEPROM" }, + { "itf":"control", "dev":"PORT35-CTRL" } + ] + } + }, + "PORT35-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT35-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT35"}, + "i2c": + { + "topo_info": { "parent_bus":"0x24", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT35-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT35-CTRL", "device_parent":"MUX5", "virt_parent":"PORT35"}, + "i2c": + { + "topo_info": { "parent_bus":"0x24", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x230", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT36": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT36", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"36"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT36-EEPROM" }, + { "itf":"control", "dev":"PORT36-CTRL" } + ] + } + }, + "PORT36-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT36-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT36"}, + "i2c": + { + "topo_info": { "parent_bus":"0x25", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT36-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT36-CTRL", "device_parent":"MUX5", "virt_parent":"PORT36"}, + "i2c": + { + "topo_info": { "parent_bus":"0x25", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x240", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT37": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT37", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"37"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT37-EEPROM" }, + { "itf":"control", "dev":"PORT37-CTRL" } + ] + } + }, + "PORT37-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT37-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT37"}, + "i2c": + { + "topo_info": { "parent_bus":"0x26", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT37-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT37-CTRL", "device_parent":"MUX5", "virt_parent":"PORT37"}, + "i2c": + { + "topo_info": { "parent_bus":"0x26", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x250", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT38": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT38", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"38"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT38-EEPROM" }, + { "itf":"control", "dev":"PORT38-CTRL" } + ] + } + }, + "PORT38-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT38-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT38"}, + "i2c": + { + "topo_info": { "parent_bus":"0x27", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT38-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT38-CTRL", "device_parent":"MUX5", "virt_parent":"PORT38"}, + "i2c": + { + "topo_info": { "parent_bus":"0x27", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x260", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT39": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT39", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"39"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT39-EEPROM" }, + { "itf":"control", "dev":"PORT39-CTRL" } + ] + } + }, + "PORT39-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT39-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT39"}, + "i2c": + { + "topo_info": { "parent_bus":"0x28", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT39-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT39-CTRL", "device_parent":"MUX5", "virt_parent":"PORT39"}, + "i2c": + { + "topo_info": { "parent_bus":"0x28", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x270", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT40": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT40", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"40"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT40-EEPROM" }, + { "itf":"control", "dev":"PORT40-CTRL" } + ] + } + }, + "PORT40-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT40-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT40"}, + "i2c": + { + "topo_info": { "parent_bus":"0x29", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT40-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT40-CTRL", "device_parent":"MUX5", "virt_parent":"PORT40"}, + "i2c": + { + "topo_info": { "parent_bus":"0x29", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x280", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT41": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT41", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"41"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT41-EEPROM" }, + { "itf":"control", "dev":"PORT41-CTRL" } + ] + } + }, + "PORT41-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT41-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT41"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2a", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT41-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT41-CTRL", "device_parent":"MUX6", "virt_parent":"PORT41"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x290", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT42": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT42", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"42"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT42-EEPROM" }, + { "itf":"control", "dev":"PORT42-CTRL" } + ] + } + }, + "PORT42-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT42-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT42"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2b", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT42-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT42-CTRL", "device_parent":"MUX6", "virt_parent":"PORT42"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2a0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT43": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT43", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"43"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT43-EEPROM" }, + { "itf":"control", "dev":"PORT43-CTRL" } + ] + } + }, + "PORT43-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT43-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT43"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2c", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT43-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT43-CTRL", "device_parent":"MUX6", "virt_parent":"PORT43"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2b0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT44": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT44", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"44"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT44-EEPROM" }, + { "itf":"control", "dev":"PORT44-CTRL" } + ] + } + }, + "PORT44-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT44-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT44"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2d", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT44-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT44-CTRL", "device_parent":"MUX6", "virt_parent":"PORT44"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2c0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT45": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT45", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"45"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT45-EEPROM" }, + { "itf":"control", "dev":"PORT45-CTRL" } + ] + } + }, + "PORT45-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT45-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT45"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2e", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT45-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT45-CTRL", "device_parent":"MUX6", "virt_parent":"PORT45"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2d0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT46": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT46", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"46"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT46-EEPROM" }, + { "itf":"control", "dev":"PORT46-CTRL" } + ] + } + }, + "PORT46-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT46-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT46"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2f", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT46-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT46-CTRL", "device_parent":"MUX6", "virt_parent":"PORT46"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2e0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT47": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT47", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"47"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT47-EEPROM" }, + { "itf":"control", "dev":"PORT47-CTRL" } + ] + } + }, + "PORT47-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT47-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT47"}, + "i2c": + { + "topo_info": { "parent_bus":"0x30", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT47-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT47-CTRL", "device_parent":"MUX6", "virt_parent":"PORT47"}, + "i2c": + { + "topo_info": { "parent_bus":"0x30", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2f0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT48": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT48", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"48"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT48-EEPROM" }, + { "itf":"control", "dev":"PORT48-CTRL" } + ] + } + }, + "PORT48-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT48-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT48"}, + "i2c": + { + "topo_info": { "parent_bus":"0x31", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT48-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT48-CTRL", "device_parent":"MUX6", "virt_parent":"PORT48"}, + "i2c": + { + "topo_info": { "parent_bus":"0x31", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x300", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT49": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT49", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"49"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT49-EEPROM" }, + { "itf":"control", "dev":"PORT49-CTRL" } + ] + } + }, + "PORT49-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT49"}, + "i2c": + { + "topo_info": { "parent_bus":"0x36", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT49-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX7", "virt_parent":"PORT49"}, + "i2c": + { + "topo_info": { "parent_bus":"0x36", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + + ] + } + }, + + "PORT50": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT50", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"50"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT50-EEPROM" }, + { "itf":"control", "dev":"PORT50-CTRL" } + ] + } + }, + "PORT50-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT50"}, + "i2c": + { + "topo_info": { "parent_bus":"0x37", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT50-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX7", "virt_parent":"PORT50"}, + "i2c": + { + "topo_info": { "parent_bus":"0x37", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT51": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT51", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"51"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT51-EEPROM" }, + { "itf":"control", "dev":"PORT51-CTRL" } + ] + } + }, + "PORT51-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT51"}, + "i2c": + { + "topo_info": { "parent_bus":"0x38", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT51-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX7", "virt_parent":"PORT51"}, + "i2c": + { + "topo_info": { "parent_bus":"0x38", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT52": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT52", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"52"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT52-EEPROM" }, + { "itf":"control", "dev":"PORT52-CTRL" } + ] + } + }, + "PORT52-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT52"}, + "i2c": + { + "topo_info": { "parent_bus":"0x39", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT52-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX7", "virt_parent":"PORT52"}, + "i2c": + { + "topo_info": { "parent_bus":"0x39", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT53": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT53", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"53"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT53-EEPROM" }, + { "itf":"control", "dev":"PORT53-CTRL" } + ] + } + }, + "PORT53-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT53"}, + "i2c": + { + "topo_info": { "parent_bus":"0x32", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT53-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX7", "virt_parent":"PORT53"}, + "i2c": + { + "topo_info": { "parent_bus":"0x32", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT54": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT54", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"54"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT54-EEPROM" }, + { "itf":"control", "dev":"PORT54-CTRL" } + ] + } + }, + "PORT54-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT54"}, + "i2c": + { + "topo_info": { "parent_bus":"0x33", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT54-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX7", "virt_parent":"PORT54"}, + "i2c": + { + "topo_info": { "parent_bus":"0x33", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT55": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT55", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"55"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT55-EEPROM" }, + { "itf":"control", "dev":"PORT55-CTRL" } + ] + } + }, + "PORT55-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT55"}, + "i2c": + { + "topo_info": { "parent_bus":"0x34", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT55-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX7", "virt_parent":"PORT55"}, + "i2c": + { + "topo_info": { "parent_bus":"0x34", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT56": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT56", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"56"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT56-EEPROM" }, + { "itf":"control", "dev":"PORT56-CTRL" } + ] + } + }, + "PORT56-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x35", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT56-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX7", "virt_parent":"PORT56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x35", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PSU1": + { + "dev_info": { "device_type":"PSU"}, + "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x3A 0x64 0x0 0x1 0x60", "raw": "1", "type":"mask", "mask":"0x2"}, + { "attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x3A 0x64 0x0 0x1 0x60", "raw": "1", "type":"mask", "mask":"0x8"}, + { "attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Name", "separator":": ","field_pos":"2"}, + { "attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Serial", "separator":": ","field_pos":"2"}, + { "attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Manufacturer", "separator":":", "field_pos":"2"}, + { "attr_name":"psu_fan_dir", "bmc_cmd":"ipmitool fru print 0 | grep -e B2F -e F2B", "raw": "0", "field_name":"Product Extra", "separator":":", "field_pos":"2"}, + { "attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x21", "type": "raw", "raw": "1", "offset": "0", "multiplier": "6000000"}, + { "attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1F", "type": "raw", "raw": "1", "offset" : "0", "multiplier": "100"}, + { "attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x20", "type": "raw", "raw": "1", "offset" : "0", "multiplier": "500"}, + { "attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1B", "type": "raw", "raw": "1", "offset": "0", "multiplier": "6000000"}, + { "attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x19", "type": "raw", "raw": "1", "offset": "0", "multiplier": "100"}, + { "attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1A", "type": "raw", "raw": "1", "offset": "0", "multiplier": "500"}, + { "attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1C", "type": "raw", "raw": "1", "offset": "0", "multiplier": "200"}, + { "attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1D", "type": "raw", "raw":"1", "offset": "0", "multiplier": "1000"}, + { "attr_name":"psu_temp2_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1E", "type": "raw", "raw":"1", "offset": "0", "multiplier": "1000"} + ] + } + } + }, + + "PSU2": + { + "dev_info": { "device_type":"PSU"}, + "dev_attr": { "dev_idx":"2", "num_psu_fans": "1"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x3A 0x64 0x0 0x1 0x60", "raw": "1", "type":"mask", "mask":"0x1"}, + { "attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x3A 0x64 0x0 0x1 0x60", "raw": "1", "type":"mask", "mask":"0x4"}, + { "attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Product Name", "separator":": ","field_pos":"2"}, + { "attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Product Serial", "separator":": ","field_pos":"2"}, + { "attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Product Manufacturer", "separator":":", "field_pos":"2"}, + { "attr_name":"psu_fan_dir", "bmc_cmd":"ipmitool fru print 0 | grep -e B2F -e F2B", "raw": "0", "field_name":"Product Extra", "separator":":", "field_pos":"2"}, + { "attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2A", "type": "raw", "raw": "1", "offset": "0", "multiplier": "6000000"}, + { "attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x28", "type": "raw", "raw": "1", "offset" : "0", "multiplier": "100"}, + { "attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x29", "type": "raw", "raw": "1", "offset" : "0", "multiplier": "500"}, + { "attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x24", "type": "raw", "raw": "1", "offset": "0", "multiplier": "6000000"}, + { "attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x22", "type": "raw", "raw": "1", "offset": "0", "multiplier": "100"}, + { "attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x23", "type": "raw", "raw": "1", "offset": "0", "multiplier": "500"}, + { "attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x25", "type": "raw", "raw": "1", "offset": "0", "multiplier": "200"}, + { "attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x26", "type": "raw", "raw":"1", "offset": "0", "multiplier": "1000"}, + { "attr_name":"psu_temp2_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x27", "type": "raw", "raw":"1", "offset": "0", "multiplier": "1000"} + ] + } + } + }, + + "FAN-CTRL": + { + "dev_info": { "device_type":"FAN"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"fan1_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type": "raw", "raw": "1"}, + { "attr_name":"fan2_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type": "raw", "raw": "1"}, + { "attr_name":"fan3_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type": "raw", "raw": "1"}, + { "attr_name":"fan4_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type": "raw", "raw": "1"}, + { "attr_name":"fan5_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type": "raw", "raw": "1"}, + { "attr_name":"fan6_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type": "raw", "raw": "1"}, + { "attr_name":"fan7_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type": "raw", "raw": "1"}, + { "attr_name":"fan8_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type": "raw", "raw": "1"}, + { "attr_name":"fan1_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type": "raw", "raw": "1"}, + { "attr_name":"fan2_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type": "raw", "raw": "1"}, + { "attr_name":"fan3_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type": "raw", "raw": "1"}, + { "attr_name":"fan4_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type": "raw", "raw": "1"}, + { "attr_name":"fan5_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type": "raw", "raw": "1"}, + { "attr_name":"fan6_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type": "raw", "raw": "1"}, + { "attr_name":"fan7_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type": "raw", "raw": "1"}, + { "attr_name":"fan8_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type": "raw", "raw": "1"}, + { "attr_name":"fan1_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x00", "raw": "1", "type": "raw", "offset": "0", "multiplier": "120"}, + { "attr_name":"fan2_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x00", "raw": "1", "type": "raw", "offset": "1", "multiplier": "120"}, + { "attr_name":"fan3_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x01", "raw": "1", "type": "raw", "offset": "0", "multiplier": "120"}, + { "attr_name":"fan4_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x01", "raw": "1", "type": "raw", "offset": "1", "multiplier": "120"}, + { "attr_name":"fan5_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x02", "raw": "1", "type": "raw", "offset": "0", "multiplier": "120"}, + { "attr_name":"fan6_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x02", "raw": "1", "type": "raw", "offset": "1", "multiplier": "120"}, + { "attr_name":"fan7_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x03", "raw": "1", "type": "raw", "offset": "0", "multiplier": "120"}, + { "attr_name":"fan8_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x03", "raw": "1", "type": "raw", "offset": "1", "multiplier": "120"}, + { "attr_name":"fan1_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x00", "type": "raw", "raw": "1"}, + { "attr_name":"fan2_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x00", "type": "raw", "raw": "1"}, + { "attr_name":"fan3_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x01", "type": "raw", "raw": "1"}, + { "attr_name":"fan4_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x01", "type": "raw", "raw": "1"}, + { "attr_name":"fan5_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x02", "type": "raw", "raw": "1"}, + { "attr_name":"fan6_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x02", "type": "raw", "raw": "1"}, + { "attr_name":"fan7_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x03", "type": "raw", "raw": "1"}, + { "attr_name":"fan8_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x03", "type": "raw", "raw": "1"} + ] + } + } + }, + + "TEMP1": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"CPU Internal Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x7", "type": "raw", "raw":"1", "offset": "5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x7", "type": "raw", "raw": "1", "offset": "0"} + + ] + } + } + }, + + "TEMP2": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"Baseboard Left Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x01", "type": "raw", "raw": "1", "offset":"0"} + + ] + } + } + }, + + "TEMP3": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"Baseboard Right Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x02", "type": "raw", "raw": "1", "offset": "0"} + + ] + } + } + }, + + + "TEMP4": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"ASIC External Front Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x03", "type": "raw", "raw": "1", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x03", "type": "raw", "raw": "1", "offset" : "0"} + + ] + } + } + }, + + "TEMP5": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"ASIC External Rear Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x04", "type": "raw", "raw": "1", "offset" : "0"} + + ] + } + } + }, + + "TEMP6": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"Switchboard Left Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x06", "type": "raw", "raw": "1", "offset":"5", "decrementor": "5"}, + { "attr_name":"temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x06", "type": "raw", "raw": "1", "offset":"4", "decrementor": "5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x06", "type": "raw", "raw": "1", "offset" : "0"} + + ] + } + } + }, + + + "TEMP7": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"Switchboard Right Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x05", "type": "raw", "raw": "1", "offset":"5", "decrementor": "5"}, + { "attr_name":"temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x05", "type": "raw", "raw": "1", "offset":"4", "decrementor": "5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x05", "type": "raw", "raw": "1", "offset" : "0"} + + ] + } + } + }, + + "TEMP8": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"VDD CORE Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x49", "type": "raw", "raw": "1", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x49", "type": "raw", "raw": "1", "offset" : "0"} + + ] + } + } + }, + + "TEMP9": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"VDD ANLG Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x50", "type": "raw", "raw": "1", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x50", "type": "raw", "raw": "1", "offset" : "0"} + + ] + } + } + }, + "SYS_LED": + { + "dev_info": { "device_type":"LED", "device_name":"SYS_LED"}, + "dev_attr": { "index":"0", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}, + { "attr_name":"amber_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"}, + { "attr_name":"amber_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x04"}, + { "attr_name":"green_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x05"}, + { "attr_name":"green_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x06"}, + { "attr_name":"both_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x07"}, + { "attr_name":"both_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x08"} + ] + } + } + }, + "ALARM_LED": + { + "dev_info": { "device_type":"LED", "device_name":"ALARM_LED"}, + "dev_attr": { "index":"0", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}, + { "attr_name":"amber_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"}, + { "attr_name":"amber_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x04"}, + { "attr_name":"green_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x05"}, + { "attr_name":"green_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x06"}, + { "attr_name":"both_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x07"}, + { "attr_name":"both_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x08"} + ] + } + } + }, + "FANTRAY1_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY1_LED"}, + "dev_attr": { "index":"0", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x4", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x4", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x4", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"} + ] + } + } + }, + "FANTRAY2_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY2_LED"}, + "dev_attr": { "index":"1", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x5", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x5", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x5", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"} + ] + } + } + }, + "FANTRAY3_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY3_LED"}, + "dev_attr": { "index":"2", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x6", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x6", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x6", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"} + ] + } + } + }, + "FANTRAY4_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY4_LED"}, + "dev_attr": { "index":"3", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x7", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x7", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x7", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"} + ] + } + } + } +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-nonbmc.json b/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-nonbmc.json new file mode 100644 index 000000000000..0335e9cf8c03 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-nonbmc.json @@ -0,0 +1,2889 @@ +{ +"PLATFORM": +{ + "num_psus":2, + "num_fantrays":4, + "num_fans_pertray":2, + "num_ports":56, + "num_temps":8, + "bmc_present": "False", + "pddf_dev_types": + { + "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", + "CPLD": + [ + "i2c_cpld" + ], + "PSU": + [ + "psu_pmbus" + ], + "FAN": + [ + "fan_ctrl", + "fan_cpld" + ], + "PORT_MODULE": + [ + "pddf_xcvr" + ], + "FPGAPCIE": + [ + "fpgapci" + ] + + }, + "std_perm_kos": + [ + "i2c_ismt", + "i2c-i801" + ], + + "std_kos": + [ + "lpc_ich", + "i2c_dev", + "i2c_mux_pca954x", + "optoe", + "mc24lc64t" + ], + + "pddf_kos": + [ + "pddf_client_module", + "pddf_psu_module", + "pddf_fan_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_led_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_fpgapci_driver", + "pddf_fpgapci_module" + ], + + "custom_kos": + [ + "pddf_custom_fpga_algo", + "pddf_custom_psu_driver_module" + ] + }, + + "SYSTEM": + { + "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, + "i2c": + { + "CONTROLLERS": + [ + { "dev_name":"i2c-0", "dev":"SMBUS0" }, + { "dev_name":"pcie-0", "dev":"PCIE0" } + ] + } + }, + + "SMBUS0": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x0"}, + "DEVICES": + [ + {"dev": "EEPROM1"} + ] + } + }, + + "EEPROM1": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + + "PCIE0": + { + "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"}, + "i2c": + { + "DEVICES": + [ + {"dev": "FPGAPCIE0"} + ] + } + }, + + "FPGAPCIE0": + { + "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x0"}, + "dev_attr": { "vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0", "data_size":"0x25000", "i2c_ch_base_offset":"0x00010000", "i2c_ch_size":"0x1000", "virt_i2c_ch":"0xd"}, + "channel": + [ + { "chn":"1", "dev":"MUX1" }, + { "chn":"1", "dev":"MUX2" }, + { "chn":"1", "dev":"MUX3" }, + { "chn":"1", "dev":"MUX4" }, + { "chn":"1", "dev":"MUX5" }, + { "chn":"1", "dev":"MUX6" }, + { "chn":"2", "dev":"MUX7" }, + { "chn":"3", "dev":"CPLD1" }, + { "chn":"3", "dev":"CPLD2" }, + { "chn":"6", "dev":"CPLD_B" }, + { "chn":"6", "dev":"FAN-CTRL" }, + { "chn":"7", "dev":"MUX8" }, + { "chn":"9", "dev":"TEMP7" }, + { "chn":"9", "dev":"TEMP8" }, + { "chn":"10", "dev":"TEMP1" }, + { "chn":"10", "dev":"TEMP2" }, + { "chn":"10", "dev":"TEMP3" }, + { "chn":"10", "dev":"TEMP4" }, + { "chn":"10", "dev":"TEMP5" }, + { "chn":"10", "dev":"TEMP6" } + ] + } + }, + + "MUX1": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT1" }, + { "chn":"1", "dev":"PORT2" }, + { "chn":"2", "dev":"PORT3" }, + { "chn":"3", "dev":"PORT4" }, + { "chn":"4", "dev":"PORT5" }, + { "chn":"5", "dev":"PORT6" }, + { "chn":"6", "dev":"PORT7" }, + { "chn":"7", "dev":"PORT8" } + ] + } + }, + + "MUX2": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0xa", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT9" }, + { "chn":"1", "dev":"PORT10" }, + { "chn":"2", "dev":"PORT11" }, + { "chn":"3", "dev":"PORT12" }, + { "chn":"4", "dev":"PORT13" }, + { "chn":"5", "dev":"PORT14" }, + { "chn":"6", "dev":"PORT15" }, + { "chn":"7", "dev":"PORT16" } + ] + } + }, + + + "MUX3": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x74", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x12", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT17" }, + { "chn":"1", "dev":"PORT18" }, + { "chn":"2", "dev":"PORT19" }, + { "chn":"3", "dev":"PORT20" }, + { "chn":"4", "dev":"PORT21" }, + { "chn":"5", "dev":"PORT22" }, + { "chn":"6", "dev":"PORT23" }, + { "chn":"7", "dev":"PORT24" } + ] + } + }, + + "MUX4": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x75", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x1a", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT25" }, + { "chn":"1", "dev":"PORT26" }, + { "chn":"2", "dev":"PORT27" }, + { "chn":"3", "dev":"PORT28" }, + { "chn":"4", "dev":"PORT29" }, + { "chn":"5", "dev":"PORT30" }, + { "chn":"6", "dev":"PORT31" }, + { "chn":"7", "dev":"PORT32" } + ] + } + }, + + "MUX5": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX5", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x76", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x22", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT33" }, + { "chn":"1", "dev":"PORT34" }, + { "chn":"2", "dev":"PORT35" }, + { "chn":"3", "dev":"PORT36" }, + { "chn":"4", "dev":"PORT37" }, + { "chn":"5", "dev":"PORT38" }, + { "chn":"6", "dev":"PORT39" }, + { "chn":"7", "dev":"PORT40" } + ] + } + }, + + "MUX6": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX6", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x77", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2a", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT41" }, + { "chn":"1", "dev":"PORT42" }, + { "chn":"2", "dev":"PORT43" }, + { "chn":"3", "dev":"PORT44" }, + { "chn":"4", "dev":"PORT45" }, + { "chn":"5", "dev":"PORT46" }, + { "chn":"6", "dev":"PORT47" }, + { "chn":"7", "dev":"PORT48" } + ] + } + }, + "MUX7": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX7", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x74", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x32", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT53" }, + { "chn":"1", "dev":"PORT54" }, + { "chn":"2", "dev":"PORT55" }, + { "chn":"3", "dev":"PORT56" }, + { "chn":"4", "dev":"PORT49" }, + { "chn":"5", "dev":"PORT50" }, + { "chn":"6", "dev":"PORT51" }, + { "chn":"7", "dev":"PORT52" } + ] + } + }, + + "CPLD1": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x30", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD2": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x31", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_B": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD_B", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x69", "dev_addr":"0x0d", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "MUX8": + { + "dev_info": {"device_type":"MUX", "device_name":"MUX8", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6a", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x3a", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PSU1"}, + {"chn":"1", "dev":"PSU2"} + ] + } + }, + + "PORT1": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT1", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"1"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT1-EEPROM" }, + { "itf":"control", "dev":"PORT1-CTRL" } + + ] + } + }, + "PORT1-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT1-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX1", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT2": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT2", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"2"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT2-EEPROM" }, + { "itf":"control", "dev":"PORT2-CTRL" } + ] + } + }, + + "PORT2-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT2-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX1", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT3": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT3", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"3"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT3-EEPROM" }, + { "itf":"control", "dev":"PORT3-CTRL" } + ] + } + }, + "PORT3-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT3-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX1", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT4": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT4", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"4"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT4-EEPROM" }, + { "itf":"control", "dev":"PORT4-CTRL" } + ] + } + }, + "PORT4-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT4-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX1", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT5": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT5", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"5"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT5-EEPROM" }, + { "itf":"control", "dev":"PORT5-CTRL" } + ] + } + }, + + "PORT5-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT5-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX1", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT6": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT6", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"6"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT6-EEPROM" }, + { "itf":"control", "dev":"PORT6-CTRL" } + ] + } + }, + "PORT6-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT6-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX1", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT7": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT7", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"7"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT7-EEPROM" }, + { "itf":"control", "dev":"PORT7-CTRL" } + ] + } + }, + "PORT7-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT7-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT8": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT8", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"8"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT8-EEPROM" }, + { "itf":"control", "dev":"PORT8-CTRL" } + ] + } + }, + "PORT8-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT8-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX1", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT9": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT9", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"9"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT9-EEPROM" }, + { "itf":"control", "dev":"PORT9-CTRL" } + ] + } + }, + "PORT9-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT9-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX2", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT10": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT10", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"10"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT10-EEPROM" }, + { "itf":"control", "dev":"PORT10-CTRL" } + ] + } + }, + "PORT10-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT10-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX2", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT11": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT11", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"11"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT11-EEPROM" }, + { "itf":"control", "dev":"PORT11-CTRL" } + ] + } + }, + "PORT11-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT11-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX2", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT12": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT12", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"12"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT12-EEPROM" }, + { "itf":"control", "dev":"PORT12-CTRL" } + ] + } + }, + "PORT12-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT12-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX2", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT13": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT13", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"13"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT13-EEPROM" }, + { "itf":"control", "dev":"PORT13-CTRL" } + ] + } + }, + "PORT13-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT13-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX2", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT14": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT14", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"14"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT14-EEPROM" }, + { "itf":"control", "dev":"PORT14-CTRL" } + ] + } + }, + "PORT14-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT14-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX2", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0xf", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT15": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT15", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"15"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT15-EEPROM" }, + { "itf":"control", "dev":"PORT15-CTRL" } + ] + } + }, + "PORT15-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT15-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX2", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT16": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT16", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"16"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT16-EEPROM" }, + { "itf":"control", "dev":"PORT16-CTRL" } + ] + } + }, + "PORT16-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT16-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX2", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT17": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT17", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"17"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT17-EEPROM" }, + { "itf":"control", "dev":"PORT17-CTRL" } + ] + } + }, + "PORT17-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT17-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX3", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x12", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT18": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT18", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"18"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT18-EEPROM" }, + { "itf":"control", "dev":"PORT18-CTRL" } + ] + } + }, + "PORT18-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT18-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX3", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x13", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT19": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT19", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"19"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT19-EEPROM" }, + { "itf":"control", "dev":"PORT19-CTRL" } + ] + } + }, + "PORT19-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT19-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX3", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x14", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT20": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT20", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"20"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT20-EEPROM" }, + { "itf":"control", "dev":"PORT20-CTRL" } + ] + } + }, + "PORT20-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT20-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX3", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x15", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT21": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT21", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"21"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT21-EEPROM" }, + { "itf":"control", "dev":"PORT21-CTRL" } + ] + } + }, + "PORT21-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT21-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX3", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT22": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT22", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"22"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT22-EEPROM" }, + { "itf":"control", "dev":"PORT22-CTRL" } + ] + } + }, + "PORT22-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT22-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX3", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT23": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT23", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"23"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT23-EEPROM" }, + { "itf":"control", "dev":"PORT23-CTRL" } + ] + } + }, + "PORT23-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT23-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX3", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x18", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT24": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT24", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"24"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT24-EEPROM" }, + { "itf":"control", "dev":"PORT24-CTRL" } + ] + } + }, + "PORT24-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT24-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX3", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x19", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT25": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT25", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"25"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT25-EEPROM" }, + { "itf":"control", "dev":"PORT25-CTRL" } + ] + } + }, + "PORT25-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT25-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT26": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT26", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"26"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT26-EEPROM" }, + { "itf":"control", "dev":"PORT26-CTRL" } + ] + } + }, + "PORT26-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT26-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT27": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT27", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"27"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT27-EEPROM" }, + { "itf":"control", "dev":"PORT27-CTRL" } + ] + } + }, + "PORT27-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT27-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT28": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT28", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"28"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT28-EEPROM" }, + { "itf":"control", "dev":"PORT28-CTRL" } + ] + } + }, + "PORT28-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT28-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT29": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT29", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"29"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT29-EEPROM" }, + { "itf":"control", "dev":"PORT29-CTRL" } + ] + } + }, + "PORT29-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT29-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT30": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT30", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"30"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT30-EEPROM" }, + { "itf":"control", "dev":"PORT30-CTRL" } + ] + } + }, + "PORT30-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT30-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT31": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT31", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"31"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT31-EEPROM" }, + { "itf":"control", "dev":"PORT31-CTRL" } + ] + } + }, + "PORT31-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT31-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT32": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT32", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"32"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT32-EEPROM" }, + { "itf":"control", "dev":"PORT32-CTRL" } + ] + } + }, + "PORT32-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT32-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT32-CTRL", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT33": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT33", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"33"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT33-EEPROM" }, + { "itf":"control", "dev":"PORT33-CTRL" } + ] + } + }, + "PORT33-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT33-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT33-CTRL", "device_parent":"MUX5", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x210", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT34": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT34", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"34"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT34-EEPROM" }, + { "itf":"control", "dev":"PORT34-CTRL" } + ] + } + }, + "PORT34-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT34-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": { "parent_bus":"0x23", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT34-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT34-CTRL", "device_parent":"MUX5", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": { "parent_bus":"0x23", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x220", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT35": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT35", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"35"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT35-EEPROM" }, + { "itf":"control", "dev":"PORT35-CTRL" } + ] + } + }, + "PORT35-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT35-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT35"}, + "i2c": + { + "topo_info": { "parent_bus":"0x24", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT35-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT35-CTRL", "device_parent":"MUX5", "virt_parent":"PORT35"}, + "i2c": + { + "topo_info": { "parent_bus":"0x24", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x230", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT36": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT36", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"36"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT36-EEPROM" }, + { "itf":"control", "dev":"PORT36-CTRL" } + ] + } + }, + "PORT36-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT36-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT36"}, + "i2c": + { + "topo_info": { "parent_bus":"0x25", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT36-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT36-CTRL", "device_parent":"MUX5", "virt_parent":"PORT36"}, + "i2c": + { + "topo_info": { "parent_bus":"0x25", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x240", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT37": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT37", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"37"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT37-EEPROM" }, + { "itf":"control", "dev":"PORT37-CTRL" } + ] + } + }, + "PORT37-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT37-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT37"}, + "i2c": + { + "topo_info": { "parent_bus":"0x26", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT37-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT37-CTRL", "device_parent":"MUX5", "virt_parent":"PORT37"}, + "i2c": + { + "topo_info": { "parent_bus":"0x26", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x250", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT38": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT38", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"38"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT38-EEPROM" }, + { "itf":"control", "dev":"PORT38-CTRL" } + ] + } + }, + "PORT38-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT38-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT38"}, + "i2c": + { + "topo_info": { "parent_bus":"0x27", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT38-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT38-CTRL", "device_parent":"MUX5", "virt_parent":"PORT38"}, + "i2c": + { + "topo_info": { "parent_bus":"0x27", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x260", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT39": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT39", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"39"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT39-EEPROM" }, + { "itf":"control", "dev":"PORT39-CTRL" } + ] + } + }, + "PORT39-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT39-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT39"}, + "i2c": + { + "topo_info": { "parent_bus":"0x28", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT39-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT39-CTRL", "device_parent":"MUX5", "virt_parent":"PORT39"}, + "i2c": + { + "topo_info": { "parent_bus":"0x28", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x270", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT40": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT40", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"40"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT40-EEPROM" }, + { "itf":"control", "dev":"PORT40-CTRL" } + ] + } + }, + "PORT40-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT40-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT40"}, + "i2c": + { + "topo_info": { "parent_bus":"0x29", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT40-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT40-CTRL", "device_parent":"MUX5", "virt_parent":"PORT40"}, + "i2c": + { + "topo_info": { "parent_bus":"0x29", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x280", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT41": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT41", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"41"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT41-EEPROM" }, + { "itf":"control", "dev":"PORT41-CTRL" } + ] + } + }, + "PORT41-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT41-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT41"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2a", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT41-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT41-CTRL", "device_parent":"MUX6", "virt_parent":"PORT41"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x290", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT42": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT42", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"42"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT42-EEPROM" }, + { "itf":"control", "dev":"PORT42-CTRL" } + ] + } + }, + "PORT42-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT42-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT42"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2b", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT42-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT42-CTRL", "device_parent":"MUX6", "virt_parent":"PORT42"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2a0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT43": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT43", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"43"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT43-EEPROM" }, + { "itf":"control", "dev":"PORT43-CTRL" } + ] + } + }, + "PORT43-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT43-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT43"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2c", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT43-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT43-CTRL", "device_parent":"MUX6", "virt_parent":"PORT43"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2b0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT44": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT44", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"44"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT44-EEPROM" }, + { "itf":"control", "dev":"PORT44-CTRL" } + ] + } + }, + "PORT44-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT44-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT44"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2d", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT44-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT44-CTRL", "device_parent":"MUX6", "virt_parent":"PORT44"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2c0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT45": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT45", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"45"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT45-EEPROM" }, + { "itf":"control", "dev":"PORT45-CTRL" } + ] + } + }, + "PORT45-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT45-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT45"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2e", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT45-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT45-CTRL", "device_parent":"MUX6", "virt_parent":"PORT45"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2d0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT46": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT46", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"46"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT46-EEPROM" }, + { "itf":"control", "dev":"PORT46-CTRL" } + ] + } + }, + "PORT46-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT46-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT46"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2f", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT46-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT46-CTRL", "device_parent":"MUX6", "virt_parent":"PORT46"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2e0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT47": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT47", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"47"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT47-EEPROM" }, + { "itf":"control", "dev":"PORT47-CTRL" } + ] + } + }, + "PORT47-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT47-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT47"}, + "i2c": + { + "topo_info": { "parent_bus":"0x30", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT47-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT47-CTRL", "device_parent":"MUX6", "virt_parent":"PORT47"}, + "i2c": + { + "topo_info": { "parent_bus":"0x30", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2f0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT48": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT48", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"48"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT48-EEPROM" }, + { "itf":"control", "dev":"PORT48-CTRL" } + ] + } + }, + "PORT48-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT48-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT48"}, + "i2c": + { + "topo_info": { "parent_bus":"0x31", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT48-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT48-CTRL", "device_parent":"MUX6", "virt_parent":"PORT48"}, + "i2c": + { + "topo_info": { "parent_bus":"0x31", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x300", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT49": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT49", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"49"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT49-EEPROM" }, + { "itf":"control", "dev":"PORT49-CTRL" } + ] + } + }, + "PORT49-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT49"}, + "i2c": + { + "topo_info": { "parent_bus":"0x36", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT49-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX7", "virt_parent":"PORT49"}, + "i2c": + { + "topo_info": { "parent_bus":"0x36", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + + ] + } + }, + + "PORT50": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT50", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"50"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT50-EEPROM" }, + { "itf":"control", "dev":"PORT50-CTRL" } + ] + } + }, + "PORT50-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT50"}, + "i2c": + { + "topo_info": { "parent_bus":"0x37", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT50-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX7", "virt_parent":"PORT50"}, + "i2c": + { + "topo_info": { "parent_bus":"0x37", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT51": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT51", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"51"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT51-EEPROM" }, + { "itf":"control", "dev":"PORT51-CTRL" } + ] + } + }, + "PORT51-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT51"}, + "i2c": + { + "topo_info": { "parent_bus":"0x38", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT51-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX7", "virt_parent":"PORT51"}, + "i2c": + { + "topo_info": { "parent_bus":"0x38", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT52": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT52", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"52"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT52-EEPROM" }, + { "itf":"control", "dev":"PORT52-CTRL" } + ] + } + }, + "PORT52-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT52"}, + "i2c": + { + "topo_info": { "parent_bus":"0x39", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT52-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX7", "virt_parent":"PORT52"}, + "i2c": + { + "topo_info": { "parent_bus":"0x39", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT53": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT53", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"53"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT53-EEPROM" }, + { "itf":"control", "dev":"PORT53-CTRL" } + ] + } + }, + "PORT53-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT53"}, + "i2c": + { + "topo_info": { "parent_bus":"0x32", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT53-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX7", "virt_parent":"PORT53"}, + "i2c": + { + "topo_info": { "parent_bus":"0x32", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT54": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT54", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"54"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT54-EEPROM" }, + { "itf":"control", "dev":"PORT54-CTRL" } + ] + } + }, + "PORT54-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT54"}, + "i2c": + { + "topo_info": { "parent_bus":"0x33", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT54-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX7", "virt_parent":"PORT54"}, + "i2c": + { + "topo_info": { "parent_bus":"0x33", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT55": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT55", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"55"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT55-EEPROM" }, + { "itf":"control", "dev":"PORT55-CTRL" } + ] + } + }, + "PORT55-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT55"}, + "i2c": + { + "topo_info": { "parent_bus":"0x34", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT55-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX7", "virt_parent":"PORT55"}, + "i2c": + { + "topo_info": { "parent_bus":"0x34", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT56": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT56", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"56"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT56-EEPROM" }, + { "itf":"control", "dev":"PORT56-CTRL" } + ] + } + }, + "PORT56-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x35", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT56-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX7", "virt_parent":"PORT56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x35", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PSU1": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU1", "device_parent":"MUX8"}, + "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, + "i2c": + { + "interface": + [ + {"itf":"pmbus", "dev":"PSU1-PMBUS"} + + ] + } + }, + + "PSU1-PMBUS": + { + "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX8", "virt_parent":"PSU1"}, + "i2c": + { + "topo_info":{ "parent_bus":"0x3a", "dev_addr":"0x5a", "dev_type":"psu_pmbus"}, + "attr_list": + [ + {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x08", "attr_cmpval":"0x00", "attr_len":"1"}, + {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x02", "attr_cmpval":"0x02", "attr_len":"1"}, + {"attr_name":"psu_model_name", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_serial_num", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"14"}, + {"attr_name":"psu_mfr_id", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"7"}, + {"attr_name":"psu_fan_dir", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_p_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_input", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_max", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_min", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_out_max", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} + ] + } + }, + + "PSU2": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU2", "device_parent":"MUX8"}, + "dev_attr": { "dev_idx":"2", "num_psu_fans": "1"}, + "i2c": + { + "interface": + [ + {"itf":"pmbus", "dev":"PSU2-PMBUS"} + + ] + } + }, + + "PSU2-PMBUS": + { + "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX8", "virt_parent":"PSU2"}, + "i2c": + { + "topo_info":{ "parent_bus":"0x3b", "dev_addr":"0x5b", "dev_type":"psu_pmbus"}, + "attr_list": + [ + {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x04", "attr_cmpval":"0x00", "attr_len":"1"}, + {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x01", "attr_cmpval":"0x01", "attr_len":"1"}, + {"attr_name":"psu_model_name", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_serial_num", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"14"}, + {"attr_name":"psu_mfr_id", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7"}, + {"attr_name":"psu_fan_dir", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_p_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_input", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_min", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} + ] + } + }, + + "FAN-CTRL": + { + "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"FPGAPCIE0"}, + "i2c": { + "topo_info": { "parent_bus":"0x69", "dev_addr":"0x16", "dev_type":"fan_cpld"}, + "dev_attr": { "num_fantrays":"4"}, + "attr_list": + [ + { "attr_name":"fan1_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb4", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan2_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb4", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan3_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xba", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan4_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xba", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan5_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc6", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan6_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc6", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan7_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xcc", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan8_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xcc", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan1_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb4", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"fan2_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb4", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"fan3_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xba", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"fan4_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xba", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"fan5_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc6", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"fan6_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc6", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"fan7_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xcc", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"fan8_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xcc", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"fan1_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb0", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + { "attr_name":"fan2_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb1", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + { "attr_name":"fan3_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb6", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + { "attr_name":"fan4_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb7", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + { "attr_name":"fan5_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc2", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + { "attr_name":"fan6_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc3", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + { "attr_name":"fan7_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc8", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + { "attr_name":"fan8_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc9", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + { "attr_name":"fan1_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb2", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan2_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb2", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan3_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb8", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan4_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb8", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan5_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc4", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan6_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc4", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan7_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xca", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan8_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xca", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "TEMP1": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP1", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"Base_Temp_U5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4d", "dev_type":"lm75"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP2": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP2", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"Base_Temp_U56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4e", "dev_type":"lm75"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP3": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP3", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"Switch_Temp_U31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4c", "dev_type":"lm75"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP4": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP4", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"Switch_Temp_U30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x49", "dev_type":"lm75"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP5": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP5", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"Switch_Temp_U28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4b", "dev_type":"lm75"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP6": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP6", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"Switch_Temp_U29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4a", "dev_type":"lm75"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP7": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP7", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"VDD_CORE_Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6c", "dev_addr":"0x7a", "dev_type":"mp2975"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP8": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP8", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"VDD_ANLG_Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6c", "dev_addr":"0x70", "dev_type":"mp2975"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "SYS_LED": + { + "dev_info": {"device_type":"LED", "device_name":"SYS_LED"}, + "dev_attr": {"index":"0"}, + "i2c": { + "attr_list": + [ + {"attr_name":"green", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"green", "value":"0x10", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"}, + {"attr_name":"amber", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"amber", "value":"0x20", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"}, + {"attr_name":"green_blink", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"green_blink", "value":"0x02", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"}, + {"attr_name":"off", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"off", "value":"0x33", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"} + ] + } + }, + "FANTRAY1_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"0"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"}, + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"} + ] + } + }, + "FANTRAY2_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"1"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"}, + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"} + ] + } + }, + "FANTRAY3_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"2"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"}, + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"} + ] + } + }, + "FANTRAY4_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"3"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xcb"}, + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xcb"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xcb"} + ] + } + } +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/pddf_support b/device/celestica/x86_64-cel_ds2000-r0/pddf_support new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/device/celestica/x86_64-cel_ds2000-r0/platform.json b/device/celestica/x86_64-cel_ds2000-r0/platform.json new file mode 100644 index 000000000000..876067eaaba3 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/platform.json @@ -0,0 +1,404 @@ +{ + "interfaces": { + "Ethernet0": { + "index": "1", + "lanes": "29", + "breakout_modes": { + "1x25G[10G]": ["Eth1/1"] + } + }, + "Ethernet1": { + "index": "2", + "lanes": "30", + "breakout_modes": { + "1x25G[10G]": ["Eth2/1"] + } + }, + "Ethernet2": { + "index": "3", + "lanes": "31", + "breakout_modes": { + "1x25G[10G]": ["Eth3/1"] + } + }, + "Ethernet3": { + "index": "4", + "lanes": "32", + "breakout_modes": { + "1x25G[10G]": ["Eth4/1"] + } + }, + "Ethernet4": { + "index": "5", + "lanes": "33", + "breakout_modes": { + "1x25G[10G]": ["Eth5/1"] + } + }, + "Ethernet5": { + "index": "6", + "lanes": "34", + "breakout_modes": { + "1x25G[10G]": ["Eth6/1"] + } + }, + "Ethernet6": { + "index": "7", + "lanes": "35", + "breakout_modes": { + "1x25G[10G]": ["Eth7/1"] + } + }, + "Ethernet7": { + "index": "8", + "lanes": "36", + "breakout_modes": { + "1x25G[10G]": ["Eth8/1"] + } + }, + "Ethernet8": { + "index": "9", + "lanes": "37", + "breakout_modes": { + "1x25G[10G]": ["Eth9/1"] + } + }, + "Ethernet9": { + "index": "10", + "lanes": "38", + "breakout_modes": { + "1x25G[10G]": ["Eth10/1"] + } + }, + "Ethernet10": { + "index": "11", + "lanes": "39", + "breakout_modes": { + "1x25G[10G]": ["Eth11/1"] + } + }, + "Ethernet11": { + "index": "12", + "lanes": "40", + "breakout_modes": { + "1x25G[10G]": ["Eth12/1"] + } + }, + "Ethernet12": { + "index": "13", + "lanes": "49", + "breakout_modes": { + "1x25G[10G]": ["Eth13/1"] + } + }, + "Ethernet13": { + "index": "14", + "lanes": "50", + "breakout_modes": { + "1x25G[10G]": ["Eth14/1"] + } + }, + "Ethernet14": { + "index": "15", + "lanes": "51", + "breakout_modes": { + "1x25G[10G]": ["Eth15/1"] + } + }, + "Ethernet15": { + "index": "16", + "lanes": "52", + "breakout_modes": { + "1x25G[10G]": ["Eth16/1"] + } + }, + "Ethernet16": { + "index": "17", + "lanes": "53", + "breakout_modes": { + "1x25G[10G]": ["Eth17/1"] + } + }, + "Ethernet17": { + "index": "18", + "lanes": "54", + "breakout_modes": { + "1x25G[10G]": ["Eth18/1"] + } + }, + "Ethernet18": { + "index": "19", + "lanes": "55", + "breakout_modes": { + "1x25G[10G]": ["Eth19/1"] + } + }, + "Ethernet19": { + "index": "20", + "lanes": "56", + "breakout_modes": { + "1x25G[10G]": ["Eth20/1"] + } + }, + "Ethernet20": { + "index": "21", + "lanes": "57", + "breakout_modes": { + "1x25G[10G]": ["Eth21/1"] + } + }, + "Ethernet21": { + "index": "22", + "lanes": "58", + "breakout_modes": { + "1x25G[10G]": ["Eth22/1"] + } + }, + "Ethernet22": { + "index": "23", + "lanes": "59", + "breakout_modes": { + "1x25G[10G]": ["Eth23/1"] + } + }, + "Ethernet23": { + "index": "24", + "lanes": "60", + "breakout_modes": { + "1x25G[10G]": ["Eth24/1"] + } + }, + "Ethernet24": { + "index": "25", + "lanes": "9", + "breakout_modes": { + "1x25G[10G]": ["Eth25/1"] + } + }, + "Ethernet25": { + "index": "26", + "lanes": "10", + "breakout_modes": { + "1x25G[10G]": ["Eth26/1"] + } + }, + "Ethernet26": { + "index": "27", + "lanes": "11", + "breakout_modes": { + "1x25G[10G]": ["Eth27/1"] + } + }, + "Ethernet27": { + "index": "28", + "lanes": "12", + "breakout_modes": { + "1x25G[10G]": ["Eth28/1"] + } + }, + "Ethernet28": { + "index": "29", + "lanes": "13", + "breakout_modes": { + "1x25G[10G]": ["Eth29/1"] + } + }, + "Ethernet29": { + "index": "30", + "lanes": "14", + "breakout_modes": { + "1x25G[10G]": ["Eth30/1"] + } + }, + "Ethernet30": { + "index": "31", + "lanes": "15", + "breakout_modes": { + "1x25G[10G]": ["Eth31/1"] + } + }, + "Ethernet31": { + "index": "32", + "lanes": "16", + "breakout_modes": { + "1x25G[10G]": ["Eth32/1"] + } + }, + "Ethernet32": { + "index": "33", + "lanes": "17", + "breakout_modes": { + "1x25G[10G]": ["Eth33/1"] + } + }, + "Ethernet33": { + "index": "34", + "lanes": "18", + "breakout_modes": { + "1x25G[10G]": ["Eth34/1"] + } + }, + "Ethernet34": { + "index": "35", + "lanes": "19", + "breakout_modes": { + "1x25G[10G]": ["Eth35/1"] + } + }, + "Ethernet35": { + "index": "36", + "lanes": "20", + "breakout_modes": { + "1x25G[10G]": ["Eth36/1"] + } + }, + "Ethernet36": { + "index": "37", + "lanes": "61", + "breakout_modes": { + "1x25G[10G]": ["Eth37/1"] + } + }, + "Ethernet37": { + "index": "38", + "lanes": "62", + "breakout_modes": { + "1x25G[10G]": ["Eth38/1"] + } + }, + "Ethernet38": { + "index": "39", + "lanes": "63", + "breakout_modes": { + "1x25G[10G]": ["Eth39/1"] + } + }, + "Ethernet39": { + "index": "40", + "lanes": "64", + "breakout_modes": { + "1x25G[10G]": ["Eth40/1"] + } + }, + "Ethernet40": { + "index": "41", + "lanes": "65", + "breakout_modes": { + "1x25G[10G]": ["Eth41/1"] + } + }, + "Ethernet41": { + "index": "42", + "lanes": "66", + "breakout_modes": { + "1x25G[10G]": ["Eth42/1"] + } + }, + "Ethernet42": { + "index": "43", + "lanes": "67", + "breakout_modes": { + "1x25G[10G]": ["Eth43/1"] + } + }, + "Ethernet43": { + "index": "44", + "lanes": "68", + "breakout_modes": { + "1x25G[10G]": ["Eth44/1"] + } + }, + "Ethernet44": { + "index": "45", + "lanes": "69", + "breakout_modes": { + "1x25G[10G]": ["Eth45/1"] + } + }, + "Ethernet45": { + "index": "46", + "lanes": "70", + "breakout_modes": { + "1x25G[10G]": ["Eth46/1"] + } + }, + "Ethernet46": { + "index": "47", + "lanes": "71", + "breakout_modes": { + "1x25G[10G]": ["Eth47/1"] + } + }, + "Ethernet47": { + "index": "48", + "lanes": "72", + "breakout_modes": { + "1x25G[10G]": ["Eth48/1"] + } + }, + "Ethernet48": { + "index": "49,49,49,49", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G" : ["Eth49/1"], + "1x40G": ["Eth49/1"] + } + }, + "Ethernet52": { + "index": "50,50,50,50", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G" : ["Eth50/1"], + "1x40G": ["Eth50/1"] + } + }, + "Ethernet56": { + "index": "51,51,51,51", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x100G" : ["Eth51/1"], + "1x40G": ["Eth51/1"] + } + }, + "Ethernet60": { + "index": "52,52,52,52", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x100G" : ["Eth52/1"], + "1x40G": ["Eth52/1"] + } + }, + "Ethernet64": { + "index": "53,53,53,53", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x100G" : ["Eth53/1"], + "1x40G": ["Eth53/1"] + } + }, + "Ethernet68": { + "index": "54,54,54,54", + "lanes": "21,22,23,24", + "breakout_modes": { + "1x100G" : ["Eth54/1"], + "1x40G": ["Eth54/1"] + } + }, + "Ethernet72": { + "index": "55,55,55,55", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x100G" : ["Eth55/1"], + "1x40G": ["Eth55/1"] + } + }, + "Ethernet76": { + "index": "56,56,56,56", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x100G" : ["Eth56/1"], + "1x40G": ["Eth56/1"] + } + } + } +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/platform_asic b/device/celestica/x86_64-cel_ds2000-r0/platform_asic new file mode 100644 index 000000000000..960467652765 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/celestica/x86_64-cel_ds2000-r0/platform_components-bmc.json b/device/celestica/x86_64-cel_ds2000-r0/platform_components-bmc.json new file mode 100644 index 000000000000..f2afe7f6b7d5 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/platform_components-bmc.json @@ -0,0 +1,18 @@ +{ + "chassis": { + "DS2000": { + "component": { + "BIOS": {}, + "ONIE": {}, + "BMC": {}, + "FPGA": {}, + "CPLD COMe": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {}, + "ASIC PCIe": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/platform_components-nonbmc.json b/device/celestica/x86_64-cel_ds2000-r0/platform_components-nonbmc.json new file mode 100644 index 000000000000..6acc9a21ba5c --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/platform_components-nonbmc.json @@ -0,0 +1,15 @@ +{ + "chassis": { + "Questone2a_v2": { + "component": { + "ONIE": {}, + "ASIC_PCIe": {}, + "SSD": {}, + "BIOS": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/platform_reboot b/device/celestica/x86_64-cel_ds2000-r0/platform_reboot new file mode 100644 index 000000000000..d3d10c5b4324 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/platform_reboot @@ -0,0 +1,3 @@ +#!/bin/bash + +/usr/local/bin/ds2000_platform_shutdown.sh system diff --git a/device/celestica/x86_64-cel_ds2000-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_ds2000-r0/plugins/eeprom.py new file mode 100644 index 000000000000..22895539823f --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/plugins/eeprom.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica DX010 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) + diff --git a/device/celestica/x86_64-cel_ds2000-r0/plugins/pcie.yaml b/device/celestica/x86_64-cel_ds2000-r0/plugins/pcie.yaml new file mode 100644 index 000000000000..2074bf094d56 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/plugins/pcie.yaml @@ -0,0 +1,22 @@ +- bus: '00' + dev: '14' + fn: '0' + id: 19c2 + name: 'SATA controller: Intel Corporation DNV SATA Controller 1 (rev 11)' +- bus: '02' + dev: '00' + fn: '0' + id: b870 + name: 'Ethernet controller: Broadcom Limited Device b870 (rev 01)' +- bus: '03' + dev: '00' + fn: '0' + id: '7021' + name: 'Memory controller: Xilinx Corporation Device 7021' +- bus: '04' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' + diff --git a/device/celestica/x86_64-cel_ds2000-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_ds2000-r0/plugins/sfputil.py new file mode 100755 index 000000000000..03882c65ac00 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/plugins/sfputil.py @@ -0,0 +1,312 @@ +#!/usr/bin/env python +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase + import struct +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 55 + QSFP_PORT_START = 48 + QSFP_PORT_END = 55 + __xcvr_presence = {} + + EEPROM_OFFSET = 9 + PORT_INFO_PATH = '/sys/class/questone2_fpga' + + _port_name = "" + _port_to_eeprom_mapping = {} + _port_to_i2cbus_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.QSFP_PORT_END + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + @property + def port_to_i2cbus_mapping(self): + return self._port_to_i2cbus_mapping + + def get_port_name(self, port_num): + if port_num in self.qsfp_ports: + self._port_name = "QSFP" + str(port_num - self.QSFP_PORT_START + 1) + else: + self._port_name = "SFP" + str(port_num + 1) + return self._port_name + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.DOM_EEPROM_ADDR, 256) + + def __init__(self): + # Override port_to_eeprom_mapping for class initialization + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' + + for x in range(self.PORT_START, self.PORT_END+1): + # port_index = 0 , it's path = /sys/bus/i2c/devices/i2c-10/10-0050/eeprom + # port_index = 55, it's path = /sys/bus/i2c/devices/i2c-65/65-0050/eeprom + # so the real offset is 10 + self.port_to_i2cbus_mapping[x] = (x + 1 + self.EEPROM_OFFSET) + self.port_to_eeprom_mapping[x] = eeprom_path.format( + x + 1 + self.EEPROM_OFFSET) + SfpUtilBase.__init__(self) + for x in range(self.PORT_START, self.PORT_END+1): + self.__xcvr_presence[x] = self.get_presence(x) + + def _do_write_file(self, file_handle, offset, value): + file_handle.seek(offset) + file_handle.write(hex(value)) + file_handle.close() + + def get_presence(self, port_num): + + # Check for invalid port_num + if port_num not in range(self.port_start, self.port_end + 1): + return False + + # Get path for access port presence status + port_name = self.get_port_name(port_num) + sysfs_filename = "qsfp_modprs" if port_num in self.qsfp_ports else "sfp_modabs" + reg_path = "/".join([self.PORT_INFO_PATH, port_name, sysfs_filename]) + + # Read status + try: + reg_file = open(reg_path) + content = reg_file.readline().rstrip() + reg_value = int(content) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # Module present is active low + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + if not self.get_presence(port_num): + return None + + eeprom_raw = [] + eeprom_raw.append("0x00") + + lpmode = False + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(port_num + 1 + self.EEPROM_OFFSET) + if port_num >= 49: + try: + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + eeprom.seek(93) + raw = eeprom.read(1) + eeprom.close() + except Exception as err: + return None + + if len(raw) == 0: + return None + eeprom_raw[0] = hex(ord(raw[0]))[2:].zfill(2) + + power_data = int(eeprom_raw[0], 16) + # if lpmod, power-override bit and power-set bit are both setted + # bit0 bit1 + lpmode = power_data & 0x03 != 0 + else: + return None + + return lpmode + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + if not self.get_presence(port_num): + return False + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(port_num + 1 + self.EEPROM_OFFSET) + try: + reg_file = open(eeprom_path, mode="wb+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_file.seek(93) + power_raw = reg_file.read(1) + if power_raw is None: + return False + power_data = int(hex(ord(power_raw))[2:].zfill(2), 16) + + if lpmode: + power_data |= 0x03 + else: + power_data &= ~(0x03) + + reg_file.seek(93) + reg_file.write(struct.pack('B', int(power_data))) + reg_file.close() + + return True + + def reset(self, port_num): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + try: + port_name = self.get_port_name(port_num) + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(0)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_file.seek(0) + reg_file.write(hex(1)) + reg_file.close() + + return True + + def get_transceiver_change_event(self, timeout=0): + """ + To detect if any transceiver change event happens. + """ + start_ms = time.time() * 1000 + xcvr_change_event_dict = {} + event = False + + while True: + time.sleep(0.5) + for port in range(self.port_start, self.port_end+1): + curr_presence = self.get_presence(port) + if curr_presence != self.__xcvr_presence[port]: + if curr_presence is True: + xcvr_change_event_dict[str(port)] = '1' + self.__xcvr_presence[port] = True + elif curr_presence is False: + xcvr_change_event_dict[str(port)] = '0' + self.__xcvr_presence[port] = False + event = True + + if event is True: + return True, xcvr_change_event_dict + + if timeout: + now_ms = time.time() * 1000 + if (now_ms - start_ms >= timeout): + return True, xcvr_change_event_dict + + def tx_disable(self, port_num, disable): + """ + @param port_num index of physical port + @param disable, True -- disable port tx signal + False -- enable port tx signal + @return True when operation success, False on failure. + """ + TX_DISABLE_BYTE_OFFSET = 86 + if port_num not in range(self.port_start, self.port_end + 1) or type(disable) != bool: + return False + + # QSFP, set eeprom to disable tx + if port_num in self.qsfp_ports: + presence = self.get_presence(port_num) + if not presence: + return True + + disable = b'\x0f' if disable else b'\x00' + # open eeprom + try: + with open(self.port_to_eeprom_mapping[port_num], mode="wb", buffering=0) as sysfsfile: + sysfsfile.seek(TX_DISABLE_BYTE_OFFSET) + sysfsfile.write(bytearray(disable)) + except IOError: + return False + + # SFP, set tx_disable pin + else: + try: + disable = hex(1) if disable else hex(0) + port_name = self.get_port_name(port_num) + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "sfp_txdisable"]), "w") + reg_file.write(disable) + reg_file.close() + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + return True + + def reset_all(self): + result = True + port_sysfs_path = [] + for port in range(self.port_start, self.port_end+1): + if port not in self.qsfp_ports: + continue + + presence = self.get_presence(port) + if not presence: + continue + + try: + port_name = self.get_port_name(port) + sysfs_path = "/".join([self.PORT_INFO_PATH, + port_name, "qsfp_reset"]) + reg_file = open(sysfs_path, "w") + port_sysfs_path.append(sysfs_path) + except IOError as e: + result = False + continue + + self._do_write_file(reg_file, 0, 0) + + time.sleep(1) + + for sysfs_path in port_sysfs_path: + try: + reg_file = open(sysfs_path, "w") + except IOError as e: + result = False + continue + + self._do_write_file(reg_file, 0, 1) + + return result diff --git a/device/celestica/x86_64-cel_ds2000-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_ds2000-r0/pmon_daemon_control.json new file mode 100644 index 000000000000..94592fa8cebc --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_ds2000-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..5661a0d21396 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/system_health_monitoring_config.json @@ -0,0 +1,16 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu.temperature", + "PSU 1 Fan 1", + "PSU 2 Fan 1" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "alternate_blink_4hz" + } +} diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers.json.j2 b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers.json.j2 new file mode 100644 index 000000000000..0b1cb2c541b6 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_def.j2 b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_def.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_def.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..44fcf21887a6 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t0.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t1.j2 b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t1.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/hwsku.json b/device/celestica/x86_64-cel_ds3000-r0/DS3000/hwsku.json new file mode 100644 index 000000000000..28e50b8c0385 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/hwsku.json @@ -0,0 +1,169 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet4": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet12": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet20": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet28": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet36": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet44": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet52": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet60": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet68": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet76": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet80": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet84": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet88": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet92": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet96": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet100": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet104": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet108": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet112": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet116": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet120": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet124": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet128": { + "default_brkout_mode": "1x10G", + "autoneg": "off", + "fec": "none" + } + } +} diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/l2/config b/device/celestica/x86_64-cel_ds3000-r0/DS3000/l2/config new file mode 100644 index 000000000000..45a7b84d5032 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/l2/config @@ -0,0 +1,3 @@ +l2_mem_entries=139264 +l3_mem_entries=8192 +l3_alpm_enable=0 diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/l3/config b/device/celestica/x86_64-cel_ds3000-r0/DS3000/l3/config new file mode 100644 index 000000000000..3467c1b39716 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/l3/config @@ -0,0 +1,3 @@ +l2_mem_entries=40000 +l3_mem_entries=40000 +l3_alpm_enable=2 diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/pg_profile_lookup.ini b/device/celestica/x86_64-cel_ds3000-r0/DS3000/pg_profile_lookup.ini new file mode 100644 index 000000000000..9f2eacb6fc42 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 56368 18432 55120 -3 2496 + 25000 5m 56368 18432 55120 -3 2496 + 40000 5m 56368 18432 55120 -3 2496 + 50000 5m 56368 18432 55120 -3 2496 + 100000 5m 56368 18432 55120 -3 2496 + 10000 40m 56368 18432 55120 -3 2496 + 25000 40m 56368 18432 55120 -3 2496 + 40000 40m 56368 18432 55120 -3 2496 + 50000 40m 56368 18432 55120 -3 2496 + 100000 40m 56368 18432 55120 -3 2496 + 10000 300m 56368 18432 55120 -3 2496 + 25000 300m 56368 18432 55120 -3 2496 + 40000 300m 56368 18432 55120 -3 2496 + 50000 300m 56368 18432 55120 -3 2496 + 100000 300m 56368 18432 55120 -3 2496 diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/port_config.ini b/device/celestica/x86_64-cel_ds3000-r0/DS3000/port_config.ini new file mode 100644 index 000000000000..8cd1c833a929 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/port_config.ini @@ -0,0 +1,34 @@ +# name lanes alias index speed valid_speeds +Ethernet0 1,2,3,4 Eth1/1 1 100000 100000,40000 +Ethernet4 5,6,7,8 Eth2/1 2 100000 100000,40000 +Ethernet8 9,10,11,12 Eth3/1 3 100000 100000,40000 +Ethernet12 13,14,15,16 Eth4/1 4 100000 100000,40000 +Ethernet16 17,18,19,20 Eth5/1 5 100000 100000,40000 +Ethernet20 21,22,23,24 Eth6/1 6 100000 100000,40000 +Ethernet24 25,26,27,28 Eth7/1 7 100000 100000,40000 +Ethernet28 29,30,31,32 Eth8/1 8 100000 100000,40000 +Ethernet32 33,34,35,36 Eth9/1 9 100000 100000,40000 +Ethernet36 37,38,39,40 Eth10/1 10 100000 100000,40000 +Ethernet40 41,42,43,44 Eth11/1 11 100000 100000,40000 +Ethernet44 45,46,47,48 Eth12/1 12 100000 100000,40000 +Ethernet48 49,50,51,52 Eth13/1 13 100000 100000,40000 +Ethernet52 53,54,55,56 Eth14/1 14 100000 100000,40000 +Ethernet56 57,58,59,60 Eth15/1 15 100000 100000,40000 +Ethernet60 61,62,63,64 Eth16/1 16 100000 100000,40000 +Ethernet64 65,66,67,68 Eth17/1 17 100000 100000,40000 +Ethernet68 69,70,71,72 Eth18/1 18 100000 100000,40000 +Ethernet72 73,74,75,76 Eth19/1 19 100000 100000,40000 +Ethernet76 77,78,79,80 Eth20/1 20 100000 100000,40000 +Ethernet80 81,82,83,84 Eth21/1 21 100000 100000,40000 +Ethernet84 85,86,87,88 Eth22/1 22 100000 100000,40000 +Ethernet88 89,90,91,92 Eth23/1 23 100000 100000,40000 +Ethernet92 93,94,95,96 Eth24/1 24 100000 100000,40000 +Ethernet96 97,98,99,100 Eth25/1 25 100000 100000,40000 +Ethernet100 101,102,103,104 Eth26/1 26 100000 100000,40000 +Ethernet104 105,106,107,108 Eth27/1 27 100000 100000,40000 +Ethernet108 109,110,111,112 Eth28/1 28 100000 100000,40000 +Ethernet112 113,114,115,116 Eth29/1 29 100000 100000,40000 +Ethernet116 117,118,119,120 Eth30/1 30 100000 100000,40000 +Ethernet120 121,122,123,124 Eth31/1 31 100000 100000,40000 +Ethernet124 125,126,127,128 Eth32/1 32 100000 100000,40000 +Ethernet128 129 Eth33/1 33 10000 10000,1000 diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/qos.json.j2 b/device/celestica/x86_64-cel_ds3000-r0/DS3000/qos.json.j2 new file mode 100644 index 000000000000..3e548325ea30 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/sai.profile b/device/celestica/x86_64-cel_ds3000-r0/DS3000/sai.profile new file mode 100644 index 000000000000..992e6ba1f49a --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-ds3000-32x100G.config.bcm +SAI_NUM_ECMP_MEMBERS=64 diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/td3-ds3000-32x100G.config.bcm b/device/celestica/x86_64-cel_ds3000-r0/DS3000/td3-ds3000-32x100G.config.bcm new file mode 100644 index 000000000000..8987f360b2b0 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/td3-ds3000-32x100G.config.bcm @@ -0,0 +1,545 @@ +help_cli_enable=1 +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=0x1 +l2_mem_entries=32768 +l2xmsg_mode=1 +l3_max_ecmp_mode=1 +l3_mem_entries=32768 +l3_alpm_ipv6_128b_bkt_rsvd=1 +l3_alpm_enable=2 +#lpm_scaling_enable=1 +max_vp_lags=0 +#mem_cache_enable=0 +memlist_enable=1 +reglist_enable=1 +#scache_filename=/tmp/scache +schan_intr_enable=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 +miim_intr_enable=0 +module_64ports=1 +oversubscribe_mode=1 +parity_enable=0 +serdes_lane_config_dfe=on +#serdes_fec_enable=1 +serdes_if_type_ce=14 +pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000 +pbmp_xport_xe=0x3ffffffffffffffffffffffffffffffffe +port_flex_enable=1 +fpem_mem_entries=32768 + +#Tunnels +bcm_tunnel_term_compatible_mode=1 +sai_tunnel_support=1 +use_all_splithorizon_groups=1 + +#RIOT Enable +riot_enable=1 +riot_overlay_l3_intf_mem_size=8192 +riot_overlay_l3_egress_mem_size=32768 +l3_ecmp_levels=2 +riot_overlay_ecmp_resilient_hash_size=16384 +flow_init_mode=1 + +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 +phy_an_c73=1 + +portmap_1=1:100 +portmap_5=5:100 +portmap_9=9:100 +portmap_13=13:100 +portmap_17=17:100 +portmap_21=21:100 +portmap_25=25:100 +portmap_29=29:100 +portmap_33=33:100 +portmap_37=37:100 +portmap_41=41:100 +portmap_45=45:100 +portmap_49=49:100 +portmap_53=53:100 +portmap_57=57:100 +portmap_61=61:100 +portmap_67=65:100 +portmap_71=69:100 +portmap_75=73:100 +portmap_79=77:100 +portmap_83=81:100 +portmap_87=85:100 +portmap_91=89:100 +portmap_95=93:100 +portmap_99=97:100 +portmap_103=101:100 +portmap_107=105:100 +portmap_111=109:100 +portmap_115=113:100 +portmap_119=117:100 +portmap_123=121:100 +portmap_127=125:100 +portmap_66=129:10:m +#portmap_130=128:10:m + +#wc0 lane swap +phy_chain_tx_lane_map_physical{1.0}=0x0132 +phy_chain_rx_lane_map_physical{1.0}=0x3210 + +#wc1 lane swap +phy_chain_tx_lane_map_physical{5.0}=0x2301 +phy_chain_rx_lane_map_physical{5.0}=0x2031 + +#wc2 lane swap +phy_chain_tx_lane_map_physical{9.0}=0x0132 +phy_chain_rx_lane_map_physical{9.0}=0x3210 + +#wc3 lane swap +phy_chain_tx_lane_map_physical{13.0}=0x3201 +phy_chain_rx_lane_map_physical{13.0}=0x2031 + +#wc4 lane swap +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x3210 + +#wc5 lane swap +phy_chain_tx_lane_map_physical{21.0}=0x2301 +phy_chain_rx_lane_map_physical{21.0}=0x2031 + +#wc6 lane swap +phy_chain_tx_lane_map_physical{25.0}=0x0123 +phy_chain_rx_lane_map_physical{25.0}=0x3210 + +#wc7 lane swap +phy_chain_tx_lane_map_physical{29.0}=0x3201 +phy_chain_rx_lane_map_physical{29.0}=0x2031 + +#wc8 lane swap +phy_chain_tx_lane_map_physical{33.0}=0x0213 +phy_chain_rx_lane_map_physical{33.0}=0x1302 + +#wc9 lane swap +phy_chain_tx_lane_map_physical{37.0}=0x1302 +phy_chain_rx_lane_map_physical{37.0}=0x2031 + +#wc10 lane swap +phy_chain_tx_lane_map_physical{41.0}=0x0231 +phy_chain_rx_lane_map_physical{41.0}=0x3120 + +#wc11 lane swap +phy_chain_tx_lane_map_physical{45.0}=0x1302 +phy_chain_rx_lane_map_physical{45.0}=0x2031 + +#wc12 lane swap +phy_chain_tx_lane_map_physical{49.0}=0x2103 +phy_chain_rx_lane_map_physical{49.0}=0x3120 + +#wc13 lane swap +phy_chain_tx_lane_map_physical{53.0}=0x2301 +phy_chain_rx_lane_map_physical{53.0}=0x2031 + +#wc14 lane swap +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x2301 + +#wc15 lane swap +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x1032 + +#wc16 lane swap +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x1023 + +#wc17 lane swap +phy_chain_tx_lane_map_physical{69.0}=0x0123 +phy_chain_rx_lane_map_physical{69.0}=0x1302 + +#wc18 lane swap +phy_chain_tx_lane_map_physical{73.0}=0x2301 +phy_chain_rx_lane_map_physical{73.0}=0x1032 + +#wc19 lane swap +phy_chain_tx_lane_map_physical{77.0}=0x2013 +phy_chain_rx_lane_map_physical{77.0}=0x3120 + +#wc20 lane swap +phy_chain_tx_lane_map_physical{81.0}=0x1302 +phy_chain_rx_lane_map_physical{81.0}=0x2031 + +#wc21 lane swap +phy_chain_tx_lane_map_physical{85.0}=0x0123 +phy_chain_rx_lane_map_physical{85.0}=0x2130 + +#wc22 lane swap +phy_chain_tx_lane_map_physical{89.0}=0x2301 +phy_chain_rx_lane_map_physical{89.0}=0x2031 + +#wc23 lane swap +phy_chain_tx_lane_map_physical{93.0}=0x0312 +phy_chain_rx_lane_map_physical{93.0}=0x2310 + +#wc24 lane swap +phy_chain_tx_lane_map_physical{97.0}=0x2301 +phy_chain_rx_lane_map_physical{97.0}=0x1032 + +#wc25 lane swap +phy_chain_tx_lane_map_physical{101.0}=0x0123 +phy_chain_rx_lane_map_physical{101.0}=0x3210 + +#wc26 lane swap +phy_chain_tx_lane_map_physical{105.0}=0x2301 +phy_chain_rx_lane_map_physical{105.0}=0x1032 + +#wc27 lane swap +phy_chain_tx_lane_map_physical{109.0}=0x0123 +phy_chain_rx_lane_map_physical{109.0}=0x3210 + +#wc28 lane swap +phy_chain_tx_lane_map_physical{113.0}=0x2301 +phy_chain_rx_lane_map_physical{113.0}=0x2031 + +#wc29 lane swap +phy_chain_tx_lane_map_physical{117.0}=0x0123 +phy_chain_rx_lane_map_physical{117.0}=0x3210 + +#wc30 lane swap +phy_chain_tx_lane_map_physical{121.0}=0x2301 +phy_chain_rx_lane_map_physical{121.0}=0x1032 + +#wc31 lane swap +phy_chain_tx_lane_map_physical{125.0}=0x0123 +phy_chain_rx_lane_map_physical{125.0}=0x3210 + +#MC lane swap +phy_chain_tx_lane_map_physical{129.0}=0x3210 +phy_chain_rx_lane_map_physical{129.0}=0x3210 + + +#wc0 P/N flip +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 + +#wc1 P/N flip +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 + +#wc2 P/N flip +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x1 + +#wc3 P/N flip +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 + +#wc4 P/N flip +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 + +#wc5 P/N flip +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 + +#wc6 P/N flip +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x1 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 + +#wc7 P/N flip +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 + +#wc8 P/N flip +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 + +#wc9 P/N flip +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x1 + +#wc10 P/N flip +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 + +#wc11 P/N flip +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 + +#wc12 P/N flip +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 + +#wc13 P/N flip +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x1 + +#wc14 P/N flip +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 + +#wc15 P/N flip +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 + +#wc16 P/N flip +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 + +#wc17 P/N flip +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 + +#wc18 P/N flip +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 + +#wc19 P/N flip +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 + +#wc20 P/N flip +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_tx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_tx_polarity_flip_physical{83.0}=0x1 +phy_chain_rx_polarity_flip_physical{83.0}=0x1 +phy_chain_tx_polarity_flip_physical{84.0}=0x1 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 + +#wc21 P/N flip +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 + +#wc22 P/N flip +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x1 + +#wc23 P/N flip +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x1 + +#wc24 P/N flip +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 + +#wc25 P/N flip +phy_chain_tx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 + +#wc26 P/N flip +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 + +#wc27 P/N flip +phy_chain_tx_polarity_flip_physical{109.0}=0x1 +phy_chain_rx_polarity_flip_physical{109.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 + +#wc28 P/N flip +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 + +#wc29 P/N flip +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 + +#wc30 P/N flip +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x1 + +#wc31 P/N flip +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_rx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x0 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +#MC P/N flip +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 diff --git a/device/celestica/x86_64-cel_ds3000-r0/custom_led.bin b/device/celestica/x86_64-cel_ds3000-r0/custom_led.bin new file mode 100644 index 000000000000..3fb048fce6b5 Binary files /dev/null and b/device/celestica/x86_64-cel_ds3000-r0/custom_led.bin differ diff --git a/device/celestica/x86_64-cel_ds3000-r0/default_sku b/device/celestica/x86_64-cel_ds3000-r0/default_sku new file mode 100644 index 000000000000..dbfb3ae8e6b9 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/default_sku @@ -0,0 +1 @@ +DS3000 t1 diff --git a/device/celestica/x86_64-cel_ds3000-r0/installer.conf b/device/celestica/x86_64-cel_ds3000-r0/installer.conf new file mode 100644 index 000000000000..6e8098123edb --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_DEV=0 +CONSOLE_PORT=0xe060 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off noirqdebug earlycon=uart8250,mmio,0xdf37b000" diff --git a/device/celestica/x86_64-cel_belgite-r0/led_proc_init.soc b/device/celestica/x86_64-cel_ds3000-r0/led_proc_init.soc similarity index 71% rename from device/celestica/x86_64-cel_belgite-r0/led_proc_init.soc rename to device/celestica/x86_64-cel_ds3000-r0/led_proc_init.soc index 57ee7fedaf2b..90aa9ba607ac 100644 --- a/device/celestica/x86_64-cel_belgite-r0/led_proc_init.soc +++ b/device/celestica/x86_64-cel_ds3000-r0/led_proc_init.soc @@ -1,3 +1,2 @@ m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin -led auto on -led start +led auto on; led start diff --git a/device/celestica/x86_64-cel_ds3000-r0/media_settings.json b/device/celestica/x86_64-cel_ds3000-r0/media_settings.json new file mode 100644 index 000000000000..ded54074ab7e --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/media_settings.json @@ -0,0 +1,408 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-32": { + "25000-copper-1.0M": { + "preemphasis": { + "lane0": "0x16440a", + "lane1": "0x16440a", + "lane2": "0x16440a", + "lane3": "0x16440a" + } + }, + "25000-copper-2.0M": { + "preemphasis": { + "lane0": "0x18420a", + "lane1": "0x18420a", + "lane2": "0x18420a", + "lane3": "0x18420a" + } + }, + "25000-copper-3.0M": { + "preemphasis": { + "lane0": "0x1a400a", + "lane1": "0x1a400a", + "lane2": "0x1a400a", + "lane3": "0x1a400a" + } + }, + "25000-copper-5.0M": { + "preemphasis": { + "lane0": "0x1a400a", + "lane1": "0x1a400a", + "lane2": "0x1a400a", + "lane3": "0x1a400a" + } + }, + "10000-copper-1.0M": { + "preemphasis": { + "lane0": "0xc2808", + "lane1": "0xc2808", + "lane2": "0xc2808", + "lane3": "0xc2808" + } + }, + "10000-copper-3.0M": { + "preemphasis": { + "lane0": "0xc2808", + "lane1": "0xc2808", + "lane2": "0xc2808", + "lane3": "0xc2808" + } + }, + "10000-copper-5.0M": { + "preemphasis": { + "lane0": "0xc2808", + "lane1": "0xc2808", + "lane2": "0xc2808", + "lane3": "0xc2808" + } + }, + "10000-copper-7.0M": { + "preemphasis": { + "lane0": "0xd2708", + "lane1": "0xd2708", + "lane2": "0xd2708", + "lane3": "0xd2708" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0xa4200", + "lane1": "0xa4200", + "lane2": "0xa4200", + "lane3": "0xa4200" + } + }, + "Default": { + "preemphasis": { + "lane0": "0x14410a", + "lane1": "0x14410a", + "lane2": "0x14410a", + "lane3": "0x14410a" + } + } + } + }, + "PORT_MEDIA_SETTINGS": { + "1": { + "25000-optical": { + "preemphasis": { + "lane0": "0x164608", + "lane1": "0x164608", + "lane2": "0x164608", + "lane3": "0x164608" + } + } + }, + "2": { + "25000-optical": { + "preemphasis": { + "lane0": "0x164608", + "lane1": "0x164608", + "lane2": "0x164608", + "lane3": "0x164608" + } + } + }, + "3": { + "25000-optical": { + "preemphasis": { + "lane0": "0x164608", + "lane1": "0x164608", + "lane2": "0x164608", + "lane3": "0x164608" + } + } + }, + "4": { + "25000-optical": { + "preemphasis": { + "lane0": "0x134908", + "lane1": "0x134908", + "lane2": "0x134908", + "lane3": "0x134908" + } + } + }, + "5": { + "25000-optical": { + "preemphasis": { + "lane0": "0x134908", + "lane1": "0x134908", + "lane2": "0x134908", + "lane3": "0x134908" + } + } + }, + "6": { + "25000-optical": { + "preemphasis": { + "lane0": "0x134908", + "lane1": "0x134908", + "lane2": "0x134908", + "lane3": "0x134908" + } + } + }, + "7": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124a08", + "lane1": "0x124a08", + "lane2": "0x124a08", + "lane3": "0x124a08" + } + } + }, + "8": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124a08", + "lane1": "0x124a08", + "lane2": "0x124a08", + "lane3": "0x124a08" + } + } + }, + "9": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114b08", + "lane1": "0x114b08", + "lane2": "0x114b08", + "lane3": "0x114b08" + } + } + }, + "10": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114b08", + "lane1": "0x114b08", + "lane2": "0x114b08", + "lane3": "0x114b08" + } + } + }, + "11": { + "25000-optical": { + "preemphasis": { + "lane0": "0xf4d08", + "lane1": "0xf4d08", + "lane2": "0xf4d08", + "lane3": "0xf4d08" + } + } + }, + "12": { + "25000-optical": { + "preemphasis": { + "lane0": "0xf4d08", + "lane1": "0xf4d08", + "lane2": "0xf4d08", + "lane3": "0xf4d08" + } + } + }, + "13": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "14": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "15": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "16": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "17": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "18": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "19": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "20": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "21": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "22": { + "25000-optical": { + "preemphasis": { + "lane0": "0xf4d08", + "lane1": "0xf4d08", + "lane2": "0xf4d08", + "lane3": "0xf4d08" + } + } + }, + "23": { + "25000-optical": { + "preemphasis": { + "lane0": "0xf4d08", + "lane1": "0xf4d08", + "lane2": "0xf4d08", + "lane3": "0xf4d08" + } + } + }, + "24": { + "25000-optical": { + "preemphasis": { + "lane0": "0xf4d08", + "lane1": "0xf4d08", + "lane2": "0xf4d08", + "lane3": "0xf4d08" + } + } + }, + "25": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114b08", + "lane1": "0x114b08", + "lane2": "0x114b08", + "lane3": "0x114b08" + } + } + }, + "26": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114b08", + "lane1": "0x114b08", + "lane2": "0x114b08", + "lane3": "0x114b08" + } + } + }, + "27": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114b08", + "lane1": "0x114b08", + "lane2": "0x114b08", + "lane3": "0x114b08" + } + } + }, + "28": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124a08", + "lane1": "0x124a08", + "lane2": "0x124a08", + "lane3": "0x124a08" + } + } + }, + "29": { + "25000-optical": { + "preemphasis": { + "lane0": "0x134908", + "lane1": "0x134908", + "lane2": "0x134908", + "lane3": "0x134908" + } + } + }, + "30": { + "25000-optical": { + "preemphasis": { + "lane0": "0x134908", + "lane1": "0x134908", + "lane2": "0x134908", + "lane3": "0x134908" + } + } + }, + "31": { + "25000-optical": { + "preemphasis": { + "lane0": "0x134908", + "lane1": "0x134908", + "lane2": "0x134908", + "lane3": "0x134908" + } + } + }, + "32": { + "25000-optical": { + "preemphasis": { + "lane0": "0x164608", + "lane1": "0x164608", + "lane2": "0x164608", + "lane3": "0x164608" + } + } + } + } +} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_ds3000-r0/pcie.yaml b/device/celestica/x86_64-cel_ds3000-r0/pcie.yaml new file mode 100644 index 000000000000..2b9612671602 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/pcie.yaml @@ -0,0 +1,165 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '1980' + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev + 11)' +- bus: '00' + dev: '04' + fn: '0' + id: 19a1 + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers + (rev 11)' +- bus: '00' + dev: '05' + fn: '0' + id: 19a2 + name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 + Series Root Complex Event Collector (rev 11)' +- bus: '00' + dev: '06' + fn: '0' + id: 19a3 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT + Root Port (rev 11)' +- bus: '00' + dev: 09 + fn: '0' + id: 19a4 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #0 (rev 11)' +- bus: '00' + dev: 0b + fn: '0' + id: 19a6 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #2 (rev 11)' +- bus: '00' + dev: 0c + fn: '0' + id: 19a7 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #3 (rev 11)' +- bus: '00' + dev: 0e + fn: '0' + id: 19a8 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #4 (rev 11)' +- bus: '00' + dev: '10' + fn: '0' + id: 19aa + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #6 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 19ac + name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller + - Host (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 19c2 + name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller + 1 (rev 11)' +- bus: '00' + dev: '15' + fn: '0' + id: 19d0 + name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI + Controller (rev 11)' +- bus: '00' + dev: '16' + fn: '0' + id: 19d1 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #0 (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 19d3 + name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME + HECI 1 (rev 11)' +- bus: '00' + dev: 1a + fn: '0' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1a + fn: '1' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1a + fn: '2' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1c + fn: '0' + id: 19db + name: 'SD Host controller: Intel Corporation Device 19db (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 19dc + name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev + 11)' +- bus: '00' + dev: 1f + fn: '2' + id: 19de + name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management + Controller (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 19df + name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev + 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 19e0 + name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series + SPI Controller (rev 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 19e2 + name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology + (rev 11)' +- bus: '02' + dev: '00' + fn: '0' + id: b870 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b870 (rev 01)' +- bus: '03' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '06' + dev: '00' + fn: '0' + id: '7021' + name: 'Memory controller: Xilinx Corporation Device 7021' +- bus: '07' + dev: '00' + fn: '0' + id: 15c2 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: '07' + dev: '00' + fn: '1' + id: 15c2 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' diff --git a/device/celestica/x86_64-cel_ds3000-r0/pddf/pd-plugin.json b/device/celestica/x86_64-cel_ds3000-r0/pddf/pd-plugin.json new file mode 100644 index 000000000000..a3660c24c82e --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/pddf/pd-plugin.json @@ -0,0 +1,138 @@ +{ + "PSU": + { + "name": + { + "1": "PSU 1", + "2": "PSU 2" + }, + "fan_name": + { + "1": + { + "1": "PSU 1 Fan 1" + }, + "2": + { + "1": "PSU 2 Fan 1" + } + }, + "thermal_name": + { + "1": "PSU 1 Temp1", + "2": "PSU 2 Temp1" + }, + "psu_present": + { + "bmc": + { + "valmap": { "1":true, "0":false } + }, + "i2c": + { + "valmap": { "1":true, "0":false } + } + }, + + "psu_power_good": + { + "bmc": + { + "valmap": { "0": true, "8":false } + }, + "i2c": + { + "valmap": { "1": true, "0": false } + } + }, + + "psu_fan_dir": + { + "bmc": + { + "valmap": { "1":"INTAKE", "0":"EXHAUST" } + }, + "i2c": + { + "valmap": { "0": "INTAKE", "1":"EXHAUST" } + } + }, + + "psu_led_color": + { + "colmap": {"green":"green", "red":"amber"} + }, + + "PSU_FAN_MAX_SPEED":"18000" + }, + + "FAN": + { + "drawer_name": + { + "1": "Fantray 1", + "2": "Fantray 2", + "3": "Fantray 3", + "4": "Fantray 4" + }, + "name": + { + "1": + { + "1": "Fan 1 Front", + "2": "Fan 1 Rear" + }, + "2": + { + "1": "Fan 2 Front", + "2": "Fan 2 Rear" + }, + "3": + { + "1": "Fan 3 Front", + "2": "Fan 3 Rear" + }, + "4": + { + "1": "Fan 4 Front", + "2": "Fan 4 Rear" + } + }, + "direction": + { + "bmc": + { + "valmap": { "1":"INTAKE", "0":"EXHAUST" } + }, + "i2c": + { + "valmap": { "1":"INTAKE", "0":"EXHAUST" } + } + }, + + "present": + { + "bmc": + { + "valmap": {"0":true, "1":false} + }, + "i2c": + { + "valmap": {"0":true, "1":false} + } + }, + + "fan_master_led_color": + { + "colmap": {"green":"green", "red":"amber"} + }, + + "duty_cycle_to_pwm": "lambda dc: ((dc*255.0)/100)", + + "pwm_to_duty_cycle": "lambda pwm: ((pwm*100.0)/256)", + + "FRONT_FAN_MAX_RPM_SPEED":"24000", + "REAR_FAN_MAX_RPM_SPEED":"21000" + } + +} diff --git a/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-bmc.json b/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-bmc.json new file mode 100644 index 000000000000..961169bde17a --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-bmc.json @@ -0,0 +1,2123 @@ +{ +"PLATFORM": +{ + "num_psus":2, + "num_fantrays":4, + "num_fans_pertray":2, + "num_ports":33, + "num_temps":11, + "num_components":10, + "pddf_dev_types": + { + "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", + "CPLD": + [ + "i2c_cpld" + ], + "PSU": + [ + "psu_eeprom", + "psu_pmbus" + ], + "FAN": + [ + "fan_ctrl" + ], + "PORT_MODULE": + [ + "pddf_xcvr" + ], + "FPGAPCIE": + [ + "fpgapci" + ] + + }, + "std_perm_kos": + [ + "i2c_ismt", + "i2c-i801" + ], + + "std_kos": + [ + "lpc_ich", + "i2c_dev", + "ipmi_devintf", + "ipmi_si", + "i2c_mux_pca954x", + "optoe", + "mc24lc64t", + "baseboard_cpld" + ], + + "pddf_kos": + [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_led_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_fpgapci_driver", + "pddf_fpgapci_module" + ], + + "custom_kos": + [ + "pddf_custom_fpga_algo" + ] + }, + + "COMPONENT1": + { + "comp_attr":{ "name": "BIOS", "type": "bios", "description": "Basic Input/Output System"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "echo `dmidecode -s bios-version`-`dmidecode -s bios-release-date`" }, + { "attr_name":"update", "cmd": "afulnx_64 {} /p /b /n /me /x /k" } + ] + }, + "COMPONENT2": + { + "comp_attr":{ "name": "BMC", "type": "bmc", "description":"Baseboard Management Controller "}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=(`ipmitool raw 0x6 0x1 | cut -d ' ' -f 4,5,16,15,14`) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}" } + ] + }, + "COMPONENT3": + { + "comp_attr":{ "name": "CPLD BASE", "type": "cpld", "description": "Base Board CPLD"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/baseboard/version) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" }, + { "attr_name":"update", "cmd": "ispvm {}" } + ] + }, + "COMPONENT4": + { + "comp_attr":{ "name": "CPLD SW1", "type": "cpld", "description":"Switch Board CPLD"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(i2cget -y -f 102 0x30 0) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" } + ] + }, + "COMPONENT5": + { + "comp_attr":{ "name": "CPLD SW2", "type": "cpld", "description":"Switch Board CPLD"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(i2cget -y -f 102 0x31 0) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" } + ] + }, + "COMPONENT6": + { + "comp_attr":{ "name": "CPLD COMe", "type": "cpld", "description": "COMe Board CPLD"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/baseboard/come_cpld_version) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" } + ] + }, + "COMPONENT7": + { + "comp_attr":{ "name": "FPGA", "type": "fpga", "description": "Baseboard FPGA"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/fpga_sysfs/version) && printf '%d.%d' $(($r>>16)) $(($r&0xffff))" }, + { "attr_name":"update", "cmd": "fpga_prog /sys/bus/pci/devices/0000:06:00.0/resource0 {}" } + ] + }, + "COMPONENT8": + { + "comp_attr":{ "name": "PCIe", "type": "pcie", "description":"ASIC PCIe Firmware"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "bcmcmd 'pciephy fw version' | grep 'PCIe FW version' | cut -d ' ' -f 4" } + ] + }, + "COMPONENT9": + { + "comp_attr":{ "name": "SSD", "type": "ssd", "description":"SSD firmware version"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "ssdutil -v | grep 'Firmware' | awk '{ print $3 }'" } + ] + }, + + "SYSTEM": + { + "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, + "i2c": + { + "CONTROLLERS": + [ + { "dev_name":"i2c-0", "dev":"SMBUS0" }, + { "dev_name":"i2c-1", "dev":"SMBUS1" }, + { "dev_name":"pcie-0", "dev":"PCIE0" } + ] + } + }, + + "SMBUS0": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x0"}, + "DEVICES": + [ + {"dev": "EEPROM1"} + ] + } + }, + + "EEPROM1": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "SMBUS1": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x1"}, + "DEVICES": + [ + {"dev": "COME_CPLD"} + ] + } + }, + + "COME_CPLD": + { + "dev_info": {"device_type": "CPLD", "device_name": "CPLD COMe", "device_parent": "SMBUS1"}, + "i2c": + { + "topo_info": {"parent_bus": "0x1", "dev_addr": "0x0d", "dev_type": "i2c_cpld"}, + "dev_attr": {} + } + }, + + "PCIE0": + { + "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"}, + "i2c": + { + "DEVICES": + [ + {"dev": "FPGAPCIE0"} + ] + } + }, + + "FPGAPCIE0": + { + "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x0"}, + "dev_attr": { "vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0", "data_size":"0x25000", "i2c_ch_base_offset":"0x10000", "i2c_ch_size":"0x1000", "virt_i2c_ch":"0xc"}, + "channel": + [ + { "chn":"3", "dev":"CPLD_S1" }, + { "chn":"3", "dev":"CPLD_S2" }, + { "chn":"2", "dev":"MUX1" }, + { "chn":"2", "dev":"MUX2" }, + { "chn":"2", "dev":"MUX3" }, + { "chn":"2", "dev":"MUX4" }, + { "chn":"1", "dev":"MUX5" } + ] + } + }, + + "CPLD_S1": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD SW1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x30", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_S2": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD SW2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x31", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "MUX1": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PORT1" }, + { "chn":"1", "dev":"PORT2" }, + { "chn":"2", "dev":"PORT3" }, + { "chn":"3", "dev":"PORT4" }, + { "chn":"4", "dev":"PORT5" }, + { "chn":"5", "dev":"PORT6" }, + { "chn":"6", "dev":"PORT7" }, + { "chn":"7", "dev":"PORT8" } + ] + } + }, + + "MUX2": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0xa", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PORT9" }, + { "chn":"1", "dev":"PORT10" }, + { "chn":"2", "dev":"PORT11" }, + { "chn":"3", "dev":"PORT12" }, + { "chn":"4", "dev":"PORT13" }, + { "chn":"5", "dev":"PORT14" }, + { "chn":"6", "dev":"PORT15" }, + { "chn":"7", "dev":"PORT16" } + ] + } + }, + + "MUX3": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x74", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x12", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PORT17" }, + { "chn":"1", "dev":"PORT18" }, + { "chn":"2", "dev":"PORT19" }, + { "chn":"3", "dev":"PORT20" }, + { "chn":"4", "dev":"PORT21" }, + { "chn":"5", "dev":"PORT22" }, + { "chn":"6", "dev":"PORT23" }, + { "chn":"7", "dev":"PORT24" } + ] + } + }, + + "MUX4": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x75", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x1a", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PORT25" }, + { "chn":"1", "dev":"PORT26" }, + { "chn":"2", "dev":"PORT27" }, + { "chn":"3", "dev":"PORT28" }, + { "chn":"4", "dev":"PORT29" }, + { "chn":"5", "dev":"PORT30" }, + { "chn":"6", "dev":"PORT31" }, + { "chn":"7", "dev":"PORT32" } + ] + } + }, + "MUX5": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX5", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x22"}, + "channel": + [ + { "chn":"0", "dev":"PORT33" } + ] + } + }, + + "PORT1": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT1", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"1"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT1-EEPROM" }, + { "itf":"control", "dev":"PORT1-CTRL" } + + ] + } + }, + "PORT1-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT1-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX1", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + "PORT2": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT2", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"2"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT2-EEPROM" }, + { "itf":"control", "dev":"PORT2-CTRL" } + ] + } + }, + + "PORT2-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT2-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX1", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT3": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT3", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"3"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT3-EEPROM" }, + { "itf":"control", "dev":"PORT3-CTRL" } + ] + } + }, + "PORT3-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT3-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX1", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT4": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT4", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"4"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT4-EEPROM" }, + { "itf":"control", "dev":"PORT4-CTRL" } + ] + } + }, + "PORT4-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT4-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX1", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT5": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT5", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"5"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT5-EEPROM" }, + { "itf":"control", "dev":"PORT5-CTRL" } + ] + } + }, + + "PORT5-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT5-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX1", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT6": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT6", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"6"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT6-EEPROM" }, + { "itf":"control", "dev":"PORT6-CTRL" } + ] + } + }, + "PORT6-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT6-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX1", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT7": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT7", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"7"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT7-EEPROM" }, + { "itf":"control", "dev":"PORT7-CTRL" } + ] + } + }, + "PORT7-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT7-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT8": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT8", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"8"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT8-EEPROM" }, + { "itf":"control", "dev":"PORT8-CTRL" } + ] + } + }, + "PORT8-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT8-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX1", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT9": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT9", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"9"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT9-EEPROM" }, + { "itf":"control", "dev":"PORT9-CTRL" } + ] + } + }, + "PORT9-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT9-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX2", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT10": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT10", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"10"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT10-EEPROM" }, + { "itf":"control", "dev":"PORT10-CTRL" } + ] + } + }, + "PORT10-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT10-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX2", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT11": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT11", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"11"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT11-EEPROM" }, + { "itf":"control", "dev":"PORT11-CTRL" } + ] + } + }, + "PORT11-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT11-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX2", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT12": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT12", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"12"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT12-EEPROM" }, + { "itf":"control", "dev":"PORT12-CTRL" } + ] + } + }, + "PORT12-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT12-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX2", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT13": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT13", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"13"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT13-EEPROM" }, + { "itf":"control", "dev":"PORT13-CTRL" } + ] + } + }, + "PORT13-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT13-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX2", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT14": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT14", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"14"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT14-EEPROM" }, + { "itf":"control", "dev":"PORT14-CTRL" } + ] + } + }, + "PORT14-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT14-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX2", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0xf", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT15": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT15", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"15"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT15-EEPROM" }, + { "itf":"control", "dev":"PORT15-CTRL" } + ] + } + }, + "PORT15-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT15-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX2", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT16": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT16", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"16"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT16-EEPROM" }, + { "itf":"control", "dev":"PORT16-CTRL" } + ] + } + }, + "PORT16-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT16-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX2", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT17": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT17", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"17"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT17-EEPROM" }, + { "itf":"control", "dev":"PORT17-CTRL" } + ] + } + }, + "PORT17-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT17-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX3", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x12", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT18": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT18", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"18"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT18-EEPROM" }, + { "itf":"control", "dev":"PORT18-CTRL" } + ] + } + }, + "PORT18-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT18-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX3", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x13", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT19": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT19", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"19"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT19-EEPROM" }, + { "itf":"control", "dev":"PORT19-CTRL" } + ] + } + }, + "PORT19-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT19-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX3", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x14", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT20": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT20", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"20"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT20-EEPROM" }, + { "itf":"control", "dev":"PORT20-CTRL" } + ] + } + }, + "PORT20-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT20-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX3", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x15", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT21": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT21", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"21"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT21-EEPROM" }, + { "itf":"control", "dev":"PORT21-CTRL" } + ] + } + }, + "PORT21-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT21-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX3", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT22": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT22", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"22"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT22-EEPROM" }, + { "itf":"control", "dev":"PORT22-CTRL" } + ] + } + }, + "PORT22-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT22-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX3", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT23": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT23", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"23"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT23-EEPROM" }, + { "itf":"control", "dev":"PORT23-CTRL" } + ] + } + }, + "PORT23-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT23-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX3", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x18", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT24": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT24", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"24"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT24-EEPROM" }, + { "itf":"control", "dev":"PORT24-CTRL" } + ] + } + }, + "PORT24-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT24-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX3", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x19", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT25": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT25", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"25"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT25-EEPROM" }, + { "itf":"control", "dev":"PORT25-CTRL" } + ] + } + }, + "PORT25-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT25-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT26": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT26", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"26"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT26-EEPROM" }, + { "itf":"control", "dev":"PORT26-CTRL" } + ] + } + }, + "PORT26-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT26-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT27": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT27", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"27"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT27-EEPROM" }, + { "itf":"control", "dev":"PORT27-CTRL" } + ] + } + }, + "PORT27-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT27-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT28": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT28", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"28"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT28-EEPROM" }, + { "itf":"control", "dev":"PORT28-CTRL" } + ] + } + }, + "PORT28-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT28-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT29": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT29", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"29"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT29-EEPROM" }, + { "itf":"control", "dev":"PORT29-CTRL" } + ] + } + }, + "PORT29-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT29-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT30": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT30", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"30"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT30-EEPROM" }, + { "itf":"control", "dev":"PORT30-CTRL" } + ] + } + }, + "PORT30-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT30-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT31": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT31", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"31"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT31-EEPROM" }, + { "itf":"control", "dev":"PORT31-CTRL" } + ] + } + }, + "PORT31-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT31-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT32": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT32", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"32"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT32-EEPROM" }, + { "itf":"control", "dev":"PORT32-CTRL" } + ] + } + }, + "PORT32-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT32-CTRL": + { + "dev_info": { "device_type":"pci", "device_name":"PORT32-CTRL", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT33": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT33", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"33"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT33-EEPROM" }, + { "itf":"control", "dev":"PORT33-CTRL" } + ] + } + }, + "PORT33-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT33-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT33-CTRL", "device_parent":"MUX5", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"} + ] + } + }, + + "PSU1": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU 1"}, + "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x0f", "raw": "1", "type":"raw", "offset":"2", "mask":"0x8"}, + { "attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x0f", "raw": "1", "type":"raw", "offset":"2", "mask":"0x1"}, + { "attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Name", "separator":": ","field_pos":"2"}, + { "attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Serial", "separator":": ","field_pos":"2"}, + { "attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Manufacturer", "separator":":", "field_pos":"2"}, + { "attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x21", "raw": "1", "type":"raw", "offset":"0", "multiplier":"6000000"}, + { "attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x1f", "raw":"1", "type":"raw", "offset":"0", "multiplier":"100"}, + { "attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x20", "raw":"1", "type":"raw", "offset":"0", "multiplier":"500"}, + { "attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x1b", "raw": "1", "type":"raw", "offset":"0", "multiplier":"6000000"}, + { "attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x19", "raw":"1", "type":"raw", "offset":"0", "multiplier":"100"}, + { "attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x1a", "raw":"1", "type":"raw", "offset":"0", "multiplier":"500"}, + { "attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x1c", "raw":"1", "type":"raw", "offset":"0", "multiplier":"200"}, + { "attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x1d", "raw":"1", "type":"raw", "offset":"0", "multiplier":"1000"}, + { "attr_name":"psu_temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x1d", "raw":"1", "type":"raw", "offset":"5", "multiplier":"1000"} + ] + } + } + }, + + "PSU2": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU 2"}, + "dev_attr": { "dev_idx":"2", "num_psu_fans": "1"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x10", "raw": "1", "type":"raw", "offset":"2", "mask":"0x8"}, + { "attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x10", "raw": "1", "type":"raw", "offset":"2", "mask":"0x1"}, + { "attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Name", "separator":": ","field_pos":"2"}, + { "attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Serial", "separator":": ","field_pos":"2"}, + { "attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Manufacturer", "separator":":", "field_pos":"2"}, + { "attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x2a", "raw": "1", "type":"raw", "offset":"0", "multiplier":"6000000"}, + { "attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x28", "raw":"1", "type":"raw", "offset":"0", "multiplier":"100"}, + { "attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x29", "raw":"1", "type":"raw", "offset":"0", "multiplier":"500"}, + { "attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x24", "raw": "1", "type":"raw", "offset":"0", "multiplier":"6000000"}, + { "attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x22", "raw":"1", "type":"raw", "offset":"0", "multiplier":"100"}, + { "attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x23", "raw":"1", "type":"raw", "offset":"0", "multiplier":"500"}, + { "attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x25", "raw":"1", "type":"raw", "offset":"0", "multiplier":"200"}, + { "attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x26", "raw":"1", "type":"raw", "offset":"0", "multiplier":"1000"}, + { "attr_name":"psu_temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x26", "raw":"1", "type":"raw", "offset":"5", "multiplier":"1000"} + ] + } + } + }, + + "FAN-CTRL": + { + "dev_info": { "device_type":"FAN"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"fan1_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type":"raw", "raw":"1"}, + {"attr_name":"fan2_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type":"raw", "raw":"1"}, + {"attr_name":"fan3_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type":"raw", "raw":"1"}, + {"attr_name":"fan4_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type":"raw", "raw":"1"}, + {"attr_name":"fan5_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type":"raw", "raw":"1"}, + {"attr_name":"fan6_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type":"raw", "raw":"1"}, + {"attr_name":"fan7_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type":"raw", "raw":"1"}, + {"attr_name":"fan8_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type":"raw", "raw":"1"}, + {"attr_name":"fan1_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type":"raw", "raw": "1"}, + {"attr_name":"fan2_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type":"raw", "raw": "1"}, + {"attr_name":"fan3_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type":"raw", "raw": "1"}, + {"attr_name":"fan4_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type":"raw", "raw": "1"}, + {"attr_name":"fan5_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type":"raw", "raw": "1"}, + {"attr_name":"fan6_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type":"raw", "raw": "1"}, + {"attr_name":"fan7_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type":"raw", "raw": "1"}, + {"attr_name":"fan8_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type":"raw", "raw": "1"}, + {"attr_name":"fan1_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 00", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan2_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 00", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan3_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 01", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan4_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 01", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan5_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 02", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan6_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 02", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan7_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 03", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan8_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 03", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + { "attr_name":"fan1_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan1_Front", "field_pos":"3", "multiplier":"1"}, + { "attr_name":"fan2_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan1_Rear", "field_pos":"3", "multiplier":"1"}, + { "attr_name":"fan3_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan2_Front", "field_pos":"3", "multiplier":"1"}, + { "attr_name":"fan4_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan2_Rear", "field_pos":"3", "multiplier":"1"}, + { "attr_name":"fan5_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan3_Front", "field_pos":"3", "multiplier":"1"}, + { "attr_name":"fan6_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan3_Rear", "field_pos":"3", "multiplier":"1"}, + { "attr_name":"fan7_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan4_Front", "field_pos":"3", "multiplier":"1"}, + { "attr_name":"fan8_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan4_Rear", "field_pos":"3", "multiplier":"1"} + ] + } + } + }, + + "TEMP1": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"CPU Internal Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x7", "raw":"1", "type": "raw", "offset":"5"}, + { "attr_name":"temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x7", "raw":"1", "type": "raw", "offset":"6"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x7", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP2": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"Baseboard Left Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x1", "raw":"1", "type": "raw", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1", "raw":"1", "type": "raw", "offset":"0"} + + ] + } + } + }, + "TEMP3": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"Baseboard Right Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x1", "raw":"1", "type": "raw", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP4": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"ASIC External Front Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP5": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"ASIC External Rear Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x4", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP6": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"Switchboard Left Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x6", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP7": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"Switchboard Right Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x5", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP8": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"MP2975 VDD CORE Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x49", "raw":"1", "type": "raw", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x49", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP9": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"MP2975 VDD ANLG Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x50", "raw":"1", "type": "raw", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x50", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP10": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"PSU 1 Temp2"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x1E", "raw":"1", "type": "raw", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1E", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP11": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"PSU 2 Temp2"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x27", "raw":"1", "type": "raw", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x27", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "SYS_LED": + { + "dev_info": { "device_type":"LED", "device_name":"SYS_LED"}, + "dev_attr": { "index":"0", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}, + { "attr_name":"amber_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"}, + { "attr_name":"amber_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x04"}, + { "attr_name":"green_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x05"}, + { "attr_name":"green_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x06"}, + { "attr_name":"both_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x07"}, + { "attr_name":"both_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x08"}, + { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x09"} + ] + } + } + }, + "ALARM_LED": + { + "dev_info": { "device_type":"LED", "device_name":"ALARM_LED"}, + "dev_attr": { "index":"0", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}, + { "attr_name":"amber_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"}, + { "attr_name":"amber_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x04"}, + { "attr_name":"green_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x05"}, + { "attr_name":"green_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x06"}, + { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x09"} + ] + } + } + }, + "FANTRAY1_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY1_LED"}, + "dev_attr": { "index":"0", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x04", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x04", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x04", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}, + { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x04", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"} + ] + } + } + }, + "FANTRAY2_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY2_LED"}, + "dev_attr": { "index":"1", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x05", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x05", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x05", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}, + { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x05", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"} + ] + } + } + }, + "FANTRAY3_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY3_LED"}, + "dev_attr": { "index":"2", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x06", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x06", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x06", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}, + { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x06", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"} + ] + } + } + }, + "FANTRAY4_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY4_LED"}, + "dev_attr": { "index":"3", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x07", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x07", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x07", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}, + { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x07", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"} + ] + } + } + } +} diff --git a/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-nonbmc.json b/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-nonbmc.json new file mode 100644 index 000000000000..f50535020007 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-nonbmc.json @@ -0,0 +1,2216 @@ +{ +"PLATFORM": +{ + "num_psus":2, + "num_fantrays":4, + "num_fans_pertray":2, + "num_ports":33, + "num_temps":6, + "num_components":8, + "pddf_dev_types": + { + "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", + "CPLD": + [ + "i2c_cpld" + ], + "PSU": + [ + "psu_pmbus" + ], + "FAN": + [ + "fan_ctrl", + "fan_eeprom", + "fan_cpld" + ], + "PORT_MODULE": + [ + "pddf_xcvr" + ], + "FPGAPCIE": + [ + "fpgapci" + ] + + }, + "std_perm_kos": + [ + "i2c_ismt", + "i2c-i801" + ], + + "std_kos": + [ + "lpc_ich", + "i2c_dev", + "i2c_mux_pca954x", + "optoe", + "mc24lc64t", + "ucd9000", + "mp2975", + "lm75", + "at24" + ], + + "pddf_kos": + [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_fan_module", + "pddf_psu_module", + "pddf_led_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_fpgapci_driver", + "pddf_fpgapci_module" + ], + + "custom_kos": + [ + "pddf_custom_psu_driver_module", + "pddf_custom_fpga_algo" + ] + }, + + "COMPONENT1": + { + "comp_attr":{ "name": "BIOS", "type": "bios", "description": "Basic Input/Output System"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "echo `dmidecode -s bios-version`-`dmidecode -s bios-release-date`" }, + { "attr_name":"update", "cmd": "afulnx_64 {} /p /b /n /me /x /k" } + ] + }, + "COMPONENT2": + { + "comp_attr":{ "name": "CPLD BASE", "type": "cpld", "description": "Base Board CPLD"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/baseboard/version) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" }, + { "attr_name":"update", "cmd": "ispvm {}" } + ] + }, + "COMPONENT3": + { + "comp_attr":{ "name": "CPLD SW1", "type": "cpld", "description":"Switch Board CPLD"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(i2cget -y -f 102 0x30 0) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" } + ] + }, + "COMPONENT4": + { + "comp_attr":{ "name": "CPLD SW2", "type": "cpld", "description":"Switch Board CPLD"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(i2cget -y -f 102 0x31 0) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" } + ] + }, + "COMPONENT5": + { + "comp_attr":{ "name": "CPLD COMe", "type": "cpld", "description": "COMe Board CPLD"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/baseboard/come_cpld_version) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" } + ] + }, + "COMPONENT6": + { + "comp_attr":{ "name": "FPGA", "type": "fpga", "description": "Baseboard FPGA"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/fpga_sysfs/version) && printf '%d.%d' $(($r>>16)) $(($r&0xffff))" }, + { "attr_name":"update", "cmd": "fpga_prog /sys/bus/pci/devices/0000:06:00.0/resource0 {}" } + ] + }, + "COMPONENT7": + { + "comp_attr":{ "name": "PCIe", "type": "pcie", "description":"ASIC PCIe Firmware"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "bcmcmd 'pciephy fw version' | grep 'PCIe FW version' | cut -d ' ' -f 4" } + ] + }, + "COMPONENT8": + { + "comp_attr":{ "name": "SSD", "type": "ssd", "description":"SSD firmware version"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "ssdutil -v | grep 'Firmware' | awk '{ print $3 }'" } + ] + }, + + "SYSTEM": + { + "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, + "i2c": + { + "CONTROLLERS": + [ + { "dev_name":"i2c-0", "dev":"SMBUS0" }, + { "dev_name":"i2c-1", "dev":"SMBUS1" }, + { "dev_name":"pcie-0", "dev":"PCIE0" } + ] + } + }, + + "SMBUS0": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x0"}, + "DEVICES": + [ + {"dev": "EEPROM1"} + ] + } + }, + + "EEPROM1": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "SMBUS1": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x1"}, + "DEVICES": + [ + {"dev": "COME_CPLD"} + ] + } + }, + + "COME_CPLD": + { + "dev_info": {"device_type": "CPLD", "device_name": "CPLD COMe", "device_parent": "SMBUS1"}, + "i2c": + { + "topo_info": {"parent_bus": "0x1", "dev_addr": "0x0d", "dev_type": "i2c_cpld"}, + "dev_attr": {} + } + }, + + "PCIE0": + { + "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"}, + "i2c": + { + "DEVICES": + [ + {"dev": "FPGAPCIE0"} + ] + } + }, + + "FPGAPCIE0": + { + "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x0"}, + "dev_attr": { "vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0", "data_size":"0x25000", "i2c_ch_base_offset":"0x10000", "i2c_ch_size":"0x1000", "virt_i2c_ch":"0xc"}, + "channel": + [ + { "chn":"2", "dev":"MUX1" }, + { "chn":"2", "dev":"MUX2" }, + { "chn":"2", "dev":"MUX3" }, + { "chn":"2", "dev":"MUX4" }, + { "chn":"1", "dev":"MUX5" }, + { "chn":"3", "dev":"CPLD_S1" }, + { "chn":"3", "dev":"CPLD_S2" }, + { "chn":"4", "dev":"EEPROM_COME" }, + { "chn":"4", "dev":"CPLD_COME" }, + { "chn":"5", "dev":"EEPROM_BASEBOARD" }, + { "chn":"6", "dev":"FAN-CTRL" }, + { "chn":"6", "dev":"CPLD_BASEBOARD" }, + { "chn":"7", "dev":"MUX6" }, + { "chn":"10", "dev":"TEMP1" }, + { "chn":"10", "dev":"TEMP2" }, + { "chn":"10", "dev":"TEMP3" }, + { "chn":"10", "dev":"TEMP4" }, + { "chn":"10", "dev":"TEMP5" }, + { "chn":"10", "dev":"TEMP6" }, + { "chn":"11", "dev":"MUX7" } + ] + } + }, + + "TEMP1": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"FPGAPCIE0"}, + "dev_attr": { "display_name":"Base_Temp_U5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4d", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "TEMP2": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"FPGAPCIE0"}, + "dev_attr": { "display_name":"Base_Temp_U56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4e", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "TEMP3": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP3", "device_parent":"FPGAPCIE0"}, + "dev_attr": { "display_name":"Switch_Temp_U17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4c", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "TEMP4": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP4", "device_parent":"FPGAPCIE0"}, + "dev_attr": { "display_name":"Switch_Temp_U18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x49", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "TEMP5": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP5", "device_parent":"FPGAPCIE0"}, + "dev_attr": { "display_name":"Switch_Temp_U28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4a", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "TEMP6": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP6", "device_parent":"FPGAPCIE0"}, + "dev_attr": { "display_name":"Switch_Temp_U29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4b", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + + "CPLD_BASEBOARD": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD BASE", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x69", "dev_addr":"0x0d", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "EEPROM_BASEBOARD": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM_BASEBOARD", "device_parent": "FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x68", "dev_addr": "0x57", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "EEPROM_COME": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM_COME", "device_parent": "FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x67", "dev_addr": "0x50", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "CPLD_COME": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD_COME", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x67", "dev_addr":"0x0d", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_S1": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD SW1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x30", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_S2": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD SW2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x31", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "MUX1": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PORT1" }, + { "chn":"1", "dev":"PORT2" }, + { "chn":"2", "dev":"PORT3" }, + { "chn":"3", "dev":"PORT4" }, + { "chn":"4", "dev":"PORT5" }, + { "chn":"5", "dev":"PORT6" }, + { "chn":"6", "dev":"PORT7" }, + { "chn":"7", "dev":"PORT8" } + ] + } + }, + + "MUX2": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0xa", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PORT9" }, + { "chn":"1", "dev":"PORT10" }, + { "chn":"2", "dev":"PORT11" }, + { "chn":"3", "dev":"PORT12" }, + { "chn":"4", "dev":"PORT13" }, + { "chn":"5", "dev":"PORT14" }, + { "chn":"6", "dev":"PORT15" }, + { "chn":"7", "dev":"PORT16" } + ] + } + }, + + "MUX3": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x74", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x12", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PORT17" }, + { "chn":"1", "dev":"PORT18" }, + { "chn":"2", "dev":"PORT19" }, + { "chn":"3", "dev":"PORT20" }, + { "chn":"4", "dev":"PORT21" }, + { "chn":"5", "dev":"PORT22" }, + { "chn":"6", "dev":"PORT23" }, + { "chn":"7", "dev":"PORT24" } + ] + } + }, + + "MUX4": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x75", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x1a", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PORT25" }, + { "chn":"1", "dev":"PORT26" }, + { "chn":"2", "dev":"PORT27" }, + { "chn":"3", "dev":"PORT28" }, + { "chn":"4", "dev":"PORT29" }, + { "chn":"5", "dev":"PORT30" }, + { "chn":"6", "dev":"PORT31" }, + { "chn":"7", "dev":"PORT32" } + ] + } + }, + "MUX5": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX5", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x22"}, + "channel": + [ + { "chn":"0", "dev":"PORT33" } + ] + } + }, + + "MUX6": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX6", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6a", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2a", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PSU1" }, + { "chn":"0", "dev":"PSU1-EEPROM" }, + { "chn":"1", "dev":"PSU2" }, + { "chn":"1", "dev":"PSU2-EEPROM" } + ] + } + }, + + "MUX7": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX7", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6e", "dev_addr":"0x77", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x32", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"FANTRAY1_EEPROM" }, + { "chn":"1", "dev":"FANTRAY2_EEPROM" }, + { "chn":"3", "dev":"FANTRAY3_EEPROM" }, + { "chn":"4", "dev":"FANTRAY4_EEPROM" } + ] + } + }, + + "PORT1": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT1", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"1"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT1-EEPROM" }, + { "itf":"control", "dev":"PORT1-CTRL" } + + ] + } + }, + "PORT1-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT1-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX1", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + "PORT2": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT2", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"2"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT2-EEPROM" }, + { "itf":"control", "dev":"PORT2-CTRL" } + ] + } + }, + + "PORT2-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT2-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX1", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT3": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT3", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"3"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT3-EEPROM" }, + { "itf":"control", "dev":"PORT3-CTRL" } + ] + } + }, + "PORT3-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT3-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX1", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT4": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT4", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"4"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT4-EEPROM" }, + { "itf":"control", "dev":"PORT4-CTRL" } + ] + } + }, + "PORT4-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT4-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX1", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT5": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT5", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"5"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT5-EEPROM" }, + { "itf":"control", "dev":"PORT5-CTRL" } + ] + } + }, + + "PORT5-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT5-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX1", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT6": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT6", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"6"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT6-EEPROM" }, + { "itf":"control", "dev":"PORT6-CTRL" } + ] + } + }, + "PORT6-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT6-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX1", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT7": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT7", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"7"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT7-EEPROM" }, + { "itf":"control", "dev":"PORT7-CTRL" } + ] + } + }, + "PORT7-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT7-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT8": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT8", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"8"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT8-EEPROM" }, + { "itf":"control", "dev":"PORT8-CTRL" } + ] + } + }, + "PORT8-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT8-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX1", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT9": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT9", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"9"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT9-EEPROM" }, + { "itf":"control", "dev":"PORT9-CTRL" } + ] + } + }, + "PORT9-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT9-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX2", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT10": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT10", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"10"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT10-EEPROM" }, + { "itf":"control", "dev":"PORT10-CTRL" } + ] + } + }, + "PORT10-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT10-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX2", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT11": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT11", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"11"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT11-EEPROM" }, + { "itf":"control", "dev":"PORT11-CTRL" } + ] + } + }, + "PORT11-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT11-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX2", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT12": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT12", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"12"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT12-EEPROM" }, + { "itf":"control", "dev":"PORT12-CTRL" } + ] + } + }, + "PORT12-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT12-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX2", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT13": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT13", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"13"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT13-EEPROM" }, + { "itf":"control", "dev":"PORT13-CTRL" } + ] + } + }, + "PORT13-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT13-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX2", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT14": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT14", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"14"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT14-EEPROM" }, + { "itf":"control", "dev":"PORT14-CTRL" } + ] + } + }, + "PORT14-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT14-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX2", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0xf", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT15": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT15", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"15"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT15-EEPROM" }, + { "itf":"control", "dev":"PORT15-CTRL" } + ] + } + }, + "PORT15-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT15-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX2", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT16": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT16", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"16"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT16-EEPROM" }, + { "itf":"control", "dev":"PORT16-CTRL" } + ] + } + }, + "PORT16-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT16-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX2", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT17": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT17", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"17"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT17-EEPROM" }, + { "itf":"control", "dev":"PORT17-CTRL" } + ] + } + }, + "PORT17-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT17-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX3", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x12", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT18": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT18", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"18"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT18-EEPROM" }, + { "itf":"control", "dev":"PORT18-CTRL" } + ] + } + }, + "PORT18-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT18-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX3", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x13", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT19": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT19", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"19"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT19-EEPROM" }, + { "itf":"control", "dev":"PORT19-CTRL" } + ] + } + }, + "PORT19-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT19-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX3", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x14", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT20": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT20", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"20"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT20-EEPROM" }, + { "itf":"control", "dev":"PORT20-CTRL" } + ] + } + }, + "PORT20-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT20-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX3", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x15", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT21": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT21", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"21"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT21-EEPROM" }, + { "itf":"control", "dev":"PORT21-CTRL" } + ] + } + }, + "PORT21-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT21-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX3", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT22": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT22", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"22"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT22-EEPROM" }, + { "itf":"control", "dev":"PORT22-CTRL" } + ] + } + }, + "PORT22-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT22-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX3", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT23": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT23", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"23"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT23-EEPROM" }, + { "itf":"control", "dev":"PORT23-CTRL" } + ] + } + }, + "PORT23-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT23-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX3", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x18", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT24": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT24", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"24"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT24-EEPROM" }, + { "itf":"control", "dev":"PORT24-CTRL" } + ] + } + }, + "PORT24-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT24-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX3", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x19", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT25": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT25", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"25"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT25-EEPROM" }, + { "itf":"control", "dev":"PORT25-CTRL" } + ] + } + }, + "PORT25-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT25-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT26": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT26", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"26"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT26-EEPROM" }, + { "itf":"control", "dev":"PORT26-CTRL" } + ] + } + }, + "PORT26-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT26-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT27": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT27", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"27"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT27-EEPROM" }, + { "itf":"control", "dev":"PORT27-CTRL" } + ] + } + }, + "PORT27-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT27-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT28": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT28", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"28"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT28-EEPROM" }, + { "itf":"control", "dev":"PORT28-CTRL" } + ] + } + }, + "PORT28-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT28-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT29": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT29", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"29"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT29-EEPROM" }, + { "itf":"control", "dev":"PORT29-CTRL" } + ] + } + }, + "PORT29-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT29-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT30": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT30", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"30"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT30-EEPROM" }, + { "itf":"control", "dev":"PORT30-CTRL" } + ] + } + }, + "PORT30-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT30-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT31": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT31", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"31"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT31-EEPROM" }, + { "itf":"control", "dev":"PORT31-CTRL" } + ] + } + }, + "PORT31-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT31-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT32": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT32", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"32"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT32-EEPROM" }, + { "itf":"control", "dev":"PORT32-CTRL" } + ] + } + }, + "PORT32-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT32-CTRL": + { + "dev_info": { "device_type":"pci", "device_name":"PORT32-CTRL", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT33": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT33", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"33"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT33-EEPROM" }, + { "itf":"control", "dev":"PORT33-CTRL" } + ] + } + }, + "PORT33-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT33-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT33-CTRL", "device_parent":"MUX5", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"} + ] + } + }, + + "PSU1": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU 1", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, + "i2c": + { + "interface": + [ + { "itf":"pmbus", "dev":"PSU1-PMBUS" } + ] + } + }, + "PSU1-PMBUS": + { + "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX6", "virt_parent":"PSU1" }, + "i2c": + { + "topo_info":{ "parent_bus":"0x2a", "dev_addr":"0x5a", "dev_type":"psu_pmbus"}, + "attr_list": + [ + {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0x60", "attr_mask":"0x08", "attr_cmpval":"0x00", "attr_len":"1"}, + {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0x60", "attr_mask":"0x02", "attr_cmpval":"0x02", "attr_len":"1"}, + {"attr_name":"psu_model_name", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_serial_num", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"13"}, + {"attr_name":"psu_mfr_id", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"7"}, + {"attr_name":"psu_fan_dir", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"1"}, + {"attr_name":"psu_p_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_input", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_max", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_min", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_out_max", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} + ] + } + }, + "PSU1-EEPROM": + { + "dev_info": {"device_type": "EEPROM", "device_name": "PSU1-EEPROM", "device_parent": "MUX6"}, + "i2c": + { + "topo_info": {"parent_bus": "0x2a", "dev_addr": "0x52", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "PSU2": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU 2", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"2", "num_psu_fans": "1"}, + "i2c": + { + "interface": + [ + { "itf":"pmbus", "dev":"PSU2-PMBUS" } + ] + } + }, + "PSU2-PMBUS": + { + "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX6", "virt_parent":"PSU2" }, + "i2c": + { + "topo_info":{ "parent_bus":"0x2b", "dev_addr":"0x5b", "dev_type":"psu_pmbus"}, + "attr_list": + [ + {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0x60", "attr_mask":"0x04", "attr_cmpval":"0x00", "attr_len":"1"}, + {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0x60", "attr_mask":"0x01", "attr_cmpval":"0x01", "attr_len":"1"}, + {"attr_name":"psu_model_name", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_serial_num", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13"}, + {"attr_name":"psu_mfr_id", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7"}, + {"attr_name":"psu_fan_dir", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"1"}, + {"attr_name":"psu_p_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_input", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_min", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} + ] + } + }, + "PSU2-EEPROM": + { + "dev_info": {"device_type": "EEPROM", "device_name": "PSU2-EEPROM", "device_parent": "MUX6"}, + "i2c": + { + "topo_info": {"parent_bus": "0x2b", "dev_addr": "0x53", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "FANTRAY1_EEPROM": + { + "dev_info": {"device_type": "EEPROM", "device_name": "FANTRAY1_EEPROM", "device_parent": "MUX7"}, + "i2c": + { + "topo_info": {"parent_bus": "0x32", "dev_addr": "0x50", "dev_type": "24c64"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + "FANTRAY2_EEPROM": + { + "dev_info": {"device_type": "EEPROM", "device_name": "FANTRAY2_EEPROM", "device_parent": "MUX7"}, + "i2c": + { + "topo_info": {"parent_bus": "0x33", "dev_addr": "0x50", "dev_type": "24c64"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + "FANTRAY3_EEPROM": + { + "dev_info": {"device_type": "EEPROM", "device_name": "FANTRAY3_EEPROM", "device_parent": "MUX7"}, + "i2c": + { + "topo_info": {"parent_bus": "0x35", "dev_addr": "0x50", "dev_type": "24c64"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + "FANTRAY4_EEPROM": + { + "dev_info": {"device_type": "EEPROM", "device_name": "FANTRAY4_EEPROM", "device_parent": "MUX7"}, + "i2c": + { + "topo_info": {"parent_bus": "0x36", "dev_addr": "0x50", "dev_type": "24c64"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "FAN-CTRL": + { + "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x69", "dev_addr":"0x16", "dev_type":"fan_cpld"}, + "dev_attr": { "num_fantrays":"4"}, + "attr_list": + [ + {"attr_name":"fan1_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb4", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"}, + {"attr_name":"fan2_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb4", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"}, + {"attr_name":"fan3_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xba", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"}, + {"attr_name":"fan4_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xba", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"}, + {"attr_name":"fan5_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc6", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"}, + {"attr_name":"fan6_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc6", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"}, + {"attr_name":"fan7_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xcc", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"}, + {"attr_name":"fan8_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xcc", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"}, + {"attr_name":"fan1_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb4", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"}, + {"attr_name":"fan2_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb4", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"}, + {"attr_name":"fan3_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xba", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"}, + {"attr_name":"fan4_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xba", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"}, + {"attr_name":"fan5_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc6", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"}, + {"attr_name":"fan6_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc6", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"}, + {"attr_name":"fan7_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xcc", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"}, + {"attr_name":"fan8_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xcc", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"}, + {"attr_name":"fan1_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb0", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + {"attr_name":"fan2_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb1", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + {"attr_name":"fan3_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb6", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + {"attr_name":"fan4_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb7", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + {"attr_name":"fan5_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc2", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + {"attr_name":"fan6_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc3", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + {"attr_name":"fan7_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc8", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + {"attr_name":"fan8_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc9", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + {"attr_name":"fan1_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb2", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"}, + {"attr_name":"fan2_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb2", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"}, + {"attr_name":"fan3_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb8", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"}, + {"attr_name":"fan4_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb8", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"}, + {"attr_name":"fan5_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc4", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"}, + {"attr_name":"fan6_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc4", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"}, + {"attr_name":"fan7_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xca", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"}, + {"attr_name":"fan8_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xca", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"} + ] + } + }, + + "FANTRAY1_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"0"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"}, + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"} + ] + } + }, + "FANTRAY2_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"1"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"}, + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"} + ] + } + }, + "FANTRAY3_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"2"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xbf"}, + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xbf"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xbf"} + ] + } + }, + "FANTRAY4_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"3"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"}, + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"} + ] + } + }, + + "PSU_LED": + { + "dev_info": { "device_type":"LED", "device_name":"PSU_LED"}, + "dev_attr": { "index":"0", "flag": "rw"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green", "descr": "Green", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "bits" : "7:6", "value" : "0x1", "swpld_addr" : "0x0d", "swpld_addr_offset" : "0x61"}, + {"attr_name":"amber", "descr": "Amber", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "bits" : "7:6", "value" : "0x2", "swpld_addr" : "0x0d", "swpld_addr_offset" : "0x61"}, + {"attr_name":"off", "descr": "Off", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "bits" : "7:6", "value" : "0x3", "swpld_addr" : "0x0d", "swpld_addr_offset" : "0x61"} + ] + } + } +} diff --git a/device/celestica/x86_64-cel_ds3000-r0/pddf_support b/device/celestica/x86_64-cel_ds3000-r0/pddf_support new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/device/celestica/x86_64-cel_ds3000-r0/platform.json b/device/celestica/x86_64-cel_ds3000-r0/platform.json new file mode 100644 index 000000000000..c180d6d186d5 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/platform.json @@ -0,0 +1,267 @@ +{ + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x100G":["Eth1/1"], + "1x40G": ["Eth1/1"] + } + }, + "Ethernet4": { + "index": "2,2,2,2", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x100G": ["Eth2/1"], + "1x40G": ["Eth2/1"] + } + }, + "Ethernet8": { + "index": "3,3,3,3", + "lanes": "9,10,11,12", + "breakout_modes": { + "1x100G": ["Eth3/1"], + "1x40G": ["Eth3/1"] + } + }, + "Ethernet12": { + "index": "4,4,4,4", + "lanes": "13,14,15,16", + "breakout_modes": { + "1x100G": ["Eth4/1"], + "1x40G": ["Eth4/1"] + } + }, + "Ethernet16": { + "index": "5,5,5,5", + "lanes": "17,18,19,20", + "breakout_modes": { + "1x100G": ["Eth5/1"], + "1x40G": ["Eth5/1"] + } + }, + "Ethernet20": { + "index": "6,6,6,6", + "lanes": "21,22,23,24", + "breakout_modes": { + "1x100G": ["Eth6/1"], + "1x40G": ["Eth6/1"] + } + }, + "Ethernet24": { + "index": "7,7,7,7", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x100G": ["Eth7/1"], + "1x40G": ["Eth7/1"] + } + }, + "Ethernet28": { + "index": "8,8,8,8", + "lanes": "29,30,31,32", + "breakout_modes": { + "1x100G": ["Eth8/1"], + "1x40G": ["Eth8/1"] + } + }, + "Ethernet32": { + "index": "9,9,9,9", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G": ["Eth9/1"], + "1x40G": ["Eth9/1"] + } + }, + "Ethernet36": { + "index": "10,10,10,10", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x100G": ["Eth10/1"], + "1x40G": ["Eth10/1"] + } + }, + "Ethernet40": { + "index": "11,11,11,11", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G": ["Eth11/1"], + "1x40G": ["Eth11/1"] + } + }, + "Ethernet44": { + "index": "12,12,12,12", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G": ["Eth12/1"], + "1x40G": ["Eth12/1"] + } + }, + "Ethernet48": { + "index": "13,13,13,13", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x100G": ["Eth13/1"], + "1x40G": ["Eth13/1"] + } + }, + "Ethernet52": { + "index": "14,14,14,14", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x100G": ["Eth14/1"], + "1x40G": ["Eth14/1"] + } + }, + "Ethernet56": { + "index": "15,15,15,15", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x100G": ["Eth15/1"], + "1x40G": ["Eth15/1"] + } + }, + "Ethernet60": { + "index": "16,16,16,16", + "lanes": "61,62,63,64", + "breakout_modes": { + "1x100G": ["Eth16/1"], + "1x40G": ["Eth16/1"] + } + }, + "Ethernet64": { + "index": "17,17,17,17", + "lanes": "65,66,67,68", + "breakout_modes": { + "1x100G": ["Eth17/1"], + "1x40G": ["Eth17/1"] + } + }, + "Ethernet68": { + "index": "18,18,18,18", + "lanes": "69,70,71,72", + "breakout_modes": { + "1x100G": ["Eth18/1"], + "1x40G": ["Eth18/1"] + } + }, + "Ethernet72": { + "index": "19,19,19,19", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x100G": ["Eth19/1"], + "1x40G": ["Eth19/1"] + } + }, + "Ethernet76": { + "index": "20,20,20,20", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x100G": ["Eth20/1"], + "1x40G": ["Eth20/1"] + } + }, + "Ethernet80": { + "index": "21,21,21,21", + "lanes": "81,82,83,84", + "breakout_modes": { + "1x100G": ["Eth21/1"], + "1x40G": ["Eth21/1"] + } + }, + "Ethernet84": { + "index": "22,22,22,22", + "lanes": "85,86,87,88", + "breakout_modes": { + "1x100G": ["Eth22/1"], + "1x40G": ["Eth22/1"] + } + }, + "Ethernet88": { + "index": "23,23,23,23", + "lanes": "89,90,91,92", + "breakout_modes": { + "1x100G": ["Eth23/1"], + "1x40G": ["Eth23/1"] + } + }, + "Ethernet92": { + "index": "24,24,24,24", + "lanes": "93,94,95,96", + "breakout_modes": { + "1x100G": ["Eth24/1"], + "1x40G": ["Eth24/1"] + } + }, + "Ethernet96": { + "index": "25,25,25,25", + "lanes": "97,98,99,100", + "breakout_modes": { + "1x100G": ["Eth25/1"], + "1x40G": ["Eth25/1"] + } + }, + "Ethernet100": { + "index": "26,26,26,26", + "lanes": "101,102,103,104", + "breakout_modes": { + "1x100G": ["Eth26/1"], + "1x40G": ["Eth26/1"] + } + }, + "Ethernet104": { + "index": "27,27,27,27", + "lanes": "105,106,107,108", + "breakout_modes": { + "1x100G": ["Eth27/1"], + "1x40G": ["Eth27/1"] + } + }, + "Ethernet108": { + "index": "28,28,28,28", + "lanes": "109,110,111,112", + "breakout_modes": { + "1x100G": ["Eth28/1"], + "1x40G": ["Eth28/1"] + } + }, + "Ethernet112": { + "index": "29,29,29,29", + "lanes": "113,114,115,116", + "breakout_modes": { + "1x100G": ["Eth29/1"], + "1x40G": ["Eth29/1"] + } + }, + "Ethernet116": { + "index": "30,30,30,30", + "lanes": "117,118,119,120", + "breakout_modes": { + "1x100G": ["Eth30/1"], + "1x40G": ["Eth30/1"] + } + }, + "Ethernet120": { + "index": "31,31,31,31", + "lanes": "121,122,123,124", + "breakout_modes": { + "1x100G": ["Eth31/1"], + "1x40G": ["Eth31/1"] + } + }, + "Ethernet124": { + "index": "32,32,32,32", + "lanes": "125,126,127,128", + "breakout_modes": { + "1x100G": ["Eth32/1"], + "1x40G": ["Eth32/1"] + } + }, + "Ethernet128": { + "index": "33", + "lanes": "129", + "breakout_modes": { + "1x10G": ["Eth33/1"] + } + } + } +} diff --git a/device/celestica/x86_64-cel_ds3000-r0/platform_asic b/device/celestica/x86_64-cel_ds3000-r0/platform_asic new file mode 100644 index 000000000000..960467652765 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/celestica/x86_64-cel_ds3000-r0/platform_components.json b/device/celestica/x86_64-cel_ds3000-r0/platform_components.json new file mode 100644 index 000000000000..fa985b8f01e9 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/platform_components.json @@ -0,0 +1,18 @@ +{ + "chassis": { + "DS3000": { + "component": { + "BIOS": {}, + "ONIE": {}, + "BMC": {}, + "FPGA": {}, + "CPLD COMe": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {}, + "ASIC PCIe": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_ds3000-r0/platform_reboot b/device/celestica/x86_64-cel_ds3000-r0/platform_reboot new file mode 100755 index 000000000000..b5212804e636 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/platform_reboot @@ -0,0 +1,3 @@ +#!/bin/bash + +/usr/local/bin/ds3000_platform_shutdown.sh system diff --git a/device/celestica/x86_64-cel_ds3000-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_ds3000-r0/pmon_daemon_control.json new file mode 100644 index 000000000000..5e59513ef696 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/pmon_daemon_control.json @@ -0,0 +1,7 @@ +{ + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false, + "skip_fancontrol": true +} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_ds3000-r0/sensors.conf b/device/celestica/x86_64-cel_ds3000-r0/sensors.conf new file mode 100644 index 000000000000..8d441077a677 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/sensors.conf @@ -0,0 +1,87 @@ +# LM75B temperature sensors +bus "i2c-109" "i2c-pci-9" + chip "lm75-i2c-109-4a" + label temp1 "Switchboard U28 Sensor Temp" + set temp1_max 60 + set temp1_max_hyst 57 + chip "lm75-i2c-109-4b" + label temp1 "Switchboard U29 Sensor Temp" + set temp1_max 60 + set temp1_max_hyst 57 + chip "lm75-i2c-109-4c" + label temp1 "Switchboard U17 Sensor Temp" + chip "lm75-i2c-109-49" + label temp1 "Switchboard U18 Sensor Temp" + chip "lm75-i2c-109-4d" + label temp1 "Baseboard U5 Sensor Temp" + set temp1_max 55 + set temp1_max_hyst 52 + chip "lm75-i2c-109-4e" + label temp1 "Baseboard U56 Sensor Temp" + set temp1_max 55 + set temp1_max_hyst 52 + +# PSU +bus "i2c-43" "i2c-106-mux (chan_id 1)" + chip "psu_pmbus-i2c-43-5b" + label in3 "PSU2 input voltage" + label fan1 "PSU2 FAN speed" + label temp1 "PSU2 temperature" + label power2 "PSU2 AC Power Voltage" + label curr2 "PSU2 AC current" + +bus "i2c-42" "i2c-106-mux (chan_id 0)" + chip "psu_pmbus-i2c-42-5a" + label in3 "PSU1 input voltage" + label fan1 "PSU1 FAN speed" + label temp1 "PSU1 temperature" + label power2 "PSU1 AC Power Voltage" + label curr2 "PSU1 AC current" + +# MP2975 power chip +bus "i2c-108" "i2c-pci-8" + chip "mp2975-i2c-108-70" + label in1 "VDD ANLG input voltage" + label in2 "VDD ANLG output voltage" + label in3 "VDD ANLG output voltage" + label temp1 "VDD ANLG temperature" + label power1 "VDD ANLG input power" + label power2 "VDD ANLG output power" + label power3 "VDD ANLG output power" + label curr1 "VDD ANLG input current" + label curr2 "VDD ANLG output current" + label curr3 "VDD ANLG output current" + label curr4 "VDD ANLG output current" + label curr5 "VDD ANLG output current" + +bus "i2c-108" "i2c-pci-8" + chip "mp2975-i2c-108-7a" + label in1 "VDD CORE input voltage" + label in2 "VDD CORE output voltage" + label in3 "VDD CORE output voltage" + label temp1 "VDD CORE temperature" + label power1 "VDD CORE input power" + label power2 "VDD CORE output power" + label power3 "VDD CORE output power" + label curr1 "VDD CORE input current" + label curr2 "VDD CORE output current" + label curr3 "VDD CORE output current" + label curr4 "VDD CORE output current" + label curr5 "VDD CORE output current" + label curr6 "VDD CORE output current" + label curr7 "VDD CORE output current" + label curr8 "VDD CORE output current" + label curr9 "VDD CORE output current" + label curr10 "VDD CORE output current" + +# CPLD FAN +bus "i2c-105" "i2c-pci-5" + chip "fan_cpld-i2c-105-16" + label fan1 "FAN1 Front Fan" + label fan2 "FAN1 Rear Fan" + label fan3 "FAN2 Front Fan" + label fan4 "FAN2 Rear Fan" + label fan5 "FAN3 Front Fan" + label fan6 "FAN3 Rear Fan" + label fan7 "FAN4 Front Fan" + label fan8 "FAN4 Rear Fan" diff --git a/device/celestica/x86_64-cel_ds3000-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_ds3000-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..5661a0d21396 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/system_health_monitoring_config.json @@ -0,0 +1,16 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu.temperature", + "PSU 1 Fan 1", + "PSU 2 Fan 1" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "alternate_blink_4hz" + } +} diff --git a/device/celestica/x86_64-cel_ds3000-r0/thermal_policy.json b/device/celestica/x86_64-cel_ds3000-r0/thermal_policy.json new file mode 100644 index 000000000000..515348ec6ab0 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/thermal_policy.json @@ -0,0 +1,136 @@ +{ + "interval": 4, + "thermal_control_algorithm": { + "run_at_boot_up": "True", + "fan_speed_when_suspend": "50" + }, + "info_types": [ + { + "type": "fan_info" + }, + { + "type": "psu_info" + }, + { + "type": "thermal_info" + }, + { + "type": "chassis_info" + } + ], + "policies": [ + { + "name": "temp over high critical threshold", + "conditions": [ + { + "type": "thermal.over.high_critical_threshold" + } + ], + "actions": [ + { + "type": "switch.shutdown" + } + ] + }, + { + "name": "any fantray absence", + "conditions": [ + { + "type": "fantray.any.absence" + } + ], + "actions": [ + { + "type": "fan.all.set_speed", + "speed": "100" + } + ] + }, + { + "name": "more than one fan rotor failed", + "conditions": [ + { + "type": "fan.rotor.more_than_one.failed" + } + ], + "actions": [ + { + "type": "fan.all.set_speed", + "speed": "100" + } + ] + }, + { + "name": "any psu absence", + "conditions": [ + { + "type": "psu.any.absence" + } + ], + "actions": [ + { + "type": "fan.all.set_speed", + "speed": "100" + } + ] + }, + { + "name": "any thermal over high threshold", + "conditions": [ + { + "type": "thermal.any.over.high_threshold" + } + ], + "actions": [ + { + "type": "fan.all.set_speed", + "speed": "100" + } + ] + }, + { + "name": "any thermal below high threshold", + "conditions": [ + { + "type": "thermal.any.below.low_threshold" + } + ], + "actions": [ + { + "type": "fan.all.set_speed", + "speed": "10" + } + ] + }, + { + "name": "thermal control algorithm", + "conditions": [ + { + "type": "fantray.all.presence" + }, + { + "type": "fan.rotor.less_than_two.failed" + }, + { + "type": "psu.all.presence" + }, + { + "type": "thermal.all.below.high_threshold" + }, + { + "type": "thermal.all.over.low_threshold" + } + ], + "actions": [ + { + "thermal_log_level": 5, + "type": "thermal.temp_check_and_fsc_algo_control", + "cpu_pid_params": [78, 3, 0.5, 0.2], + "bcm_pid_params": [88, 4, 0.3, 0.4], + "f2b_linear_params": [34, 54, 3, 35, 100], + "b2f_linear_params": [27, 48, 3, 35, 100] + } + ] + } + ] +} diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/custom_led.bin b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/custom_led.bin new file mode 100644 index 000000000000..b2ed8cb8d090 Binary files /dev/null and b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/custom_led.bin differ diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/hwsku.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/hwsku.json new file mode 100644 index 000000000000..a559890f3a18 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/hwsku.json @@ -0,0 +1,284 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet1": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet2": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet3": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet4": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet5": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet6": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet7": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet9": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet10": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet11": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet12": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet13": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet14": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet15": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet17": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet18": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet19": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet20": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet21": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet22": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet23": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet25": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet26": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet27": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet28": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet29": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet30": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet31": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet33": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet34": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet35": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet36": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet37": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet38": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet39": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet41": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet42": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet43": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet44": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet45": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet46": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet47": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet52": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet60": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet68": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet76": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + } + } +} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform.json new file mode 100644 index 000000000000..0805efbc7ba4 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform.json @@ -0,0 +1,396 @@ +{ + "interfaces": { + "Ethernet0": { + "index": "1", + "lanes": "49", + "breakout_modes": { + "1x25G": ["Eth1/1"] + } + }, + "Ethernet1": { + "index": "2", + "lanes": "50", + "breakout_modes": { + "1x25G": ["Eth2/1"] + } + }, + "Ethernet2": { + "index": "3", + "lanes": "51", + "breakout_modes": { + "1x25G": ["Eth3/1"] + } + }, + "Ethernet3": { + "index": "4", + "lanes": "52", + "breakout_modes": { + "1x25G": ["Eth4/1"] + } + }, + "Ethernet4": { + "index": "5", + "lanes": "57", + "breakout_modes": { + "1x25G": ["Eth5/1"] + } + }, + "Ethernet5": { + "index": "6", + "lanes": "58", + "breakout_modes": { + "1x25G": ["Eth6/1"] + } + }, + "Ethernet6": { + "index": "7", + "lanes": "59", + "breakout_modes": { + "1x25G": ["Eth7/1"] + } + }, + "Ethernet7": { + "index": "8", + "lanes": "60", + "breakout_modes": { + "1x25G": ["Eth8/1"] + } + }, + "Ethernet8": { + "index": "9", + "lanes": "61", + "breakout_modes": { + "1x25G": ["Eth9/1"] + } + }, + "Ethernet9": { + "index": "10", + "lanes": "62", + "breakout_modes": { + "1x25G": ["Eth10/1"] + } + }, + "Ethernet10": { + "index": "11", + "lanes": "63", + "breakout_modes": { + "1x25G": ["Eth11/1"] + } + }, + "Ethernet11": { + "index": "12", + "lanes": "64", + "breakout_modes": { + "1x25G": ["Eth12/1"] + } + }, + "Ethernet12": { + "index": "13", + "lanes": "77", + "breakout_modes": { + "1x25G": ["Eth13/1"] + } + }, + "Ethernet13": { + "index": "14", + "lanes": "78", + "breakout_modes": { + "1x25G": ["Eth14/1"] + } + }, + "Ethernet14": { + "index": "15", + "lanes": "79", + "breakout_modes": { + "1x25G": ["Eth15/1"] + } + }, + "Ethernet15": { + "index": "16", + "lanes": "80", + "breakout_modes": { + "1x25G": ["Eth16/1"] + } + }, + "Ethernet16": { + "index": "17", + "lanes": "85", + "breakout_modes": { + "1x25G": ["Eth17/1"] + } + }, + "Ethernet17": { + "index": "18", + "lanes": "86", + "breakout_modes": { + "1x25G": ["Eth18/1"] + } + }, + "Ethernet18": { + "index": "19", + "lanes": "87", + "breakout_modes": { + "1x25G": ["Eth19/1"] + } + }, + "Ethernet19": { + "index": "20", + "lanes": "88", + "breakout_modes": { + "1x25G": ["Eth20/1"] + } + }, + "Ethernet20": { + "index": "21", + "lanes": "93", + "breakout_modes": { + "1x25G": ["Eth21/1"] + } + }, + "Ethernet21": { + "index": "22", + "lanes": "94", + "breakout_modes": { + "1x25G": ["Eth22/1"] + } + }, + "Ethernet22": { + "index": "23", + "lanes": "95", + "breakout_modes": { + "1x25G": ["Eth23/1"] + } + }, + "Ethernet23": { + "index": "24", + "lanes": "96", + "breakout_modes": { + "1x25G": ["Eth24/1"] + } + }, + "Ethernet24": { + "index": "25", + "lanes": "13", + "breakout_modes": { + "1x25G": ["Eth25/1"] + } + }, + "Ethernet25": { + "index": "26", + "lanes": "14", + "breakout_modes": { + "1x25G": ["Eth26/1"] + } + }, + "Ethernet26": { + "index": "27", + "lanes": "15", + "breakout_modes": { + "1x25G": ["Eth27/1"] + } + }, + "Ethernet27": { + "index": "28", + "lanes": "16", + "breakout_modes": { + "1x25G": ["Eth28/1"] + } + }, + "Ethernet28": { + "index": "29", + "lanes": "21", + "breakout_modes": { + "1x25G": ["Eth29/1"] + } + }, + "Ethernet29": { + "index": "30", + "lanes": "22", + "breakout_modes": { + "1x25G": ["Eth30/1"] + } + }, + "Ethernet30": { + "index": "31", + "lanes": "23", + "breakout_modes": { + "1x25G": ["Eth31/1"] + } + }, + "Ethernet31": { + "index": "32", + "lanes": "24", + "breakout_modes": { + "1x25G": ["Eth32/1"] + } + }, + "Ethernet32": { + "index": "33", + "lanes": "29", + "breakout_modes": { + "1x25G": ["Eth33/1"] + } + }, + "Ethernet33": { + "index": "34", + "lanes": "30", + "breakout_modes": { + "1x25G": ["Eth34/1"] + } + }, + "Ethernet34": { + "index": "35", + "lanes": "31", + "breakout_modes": { + "1x25G": ["Eth35/1"] + } + }, + "Ethernet35": { + "index": "36", + "lanes": "32", + "breakout_modes": { + "1x25G": ["Eth36/1"] + } + }, + "Ethernet36": { + "index": "37", + "lanes": "97", + "breakout_modes": { + "1x25G": ["Eth37/1"] + } + }, + "Ethernet37": { + "index": "38", + "lanes": "98", + "breakout_modes": { + "1x25G": ["Eth38/1"] + } + }, + "Ethernet38": { + "index": "39", + "lanes": "99", + "breakout_modes": { + "1x25G": ["Eth39/1"] + } + }, + "Ethernet39": { + "index": "40", + "lanes": "100", + "breakout_modes": { + "1x25G": ["Eth40/1"] + } + }, + "Ethernet40": { + "index": "41", + "lanes": "105", + "breakout_modes": { + "1x25G": ["Eth41/1"] + } + }, + "Ethernet41": { + "index": "42", + "lanes": "106", + "breakout_modes": { + "1x25G": ["Eth42/1"] + } + }, + "Ethernet42": { + "index": "43", + "lanes": "107", + "breakout_modes": { + "1x25G": ["Eth43/1"] + } + }, + "Ethernet43": { + "index": "44", + "lanes": "108", + "breakout_modes": { + "1x25G": ["Eth44/1"] + } + }, + "Ethernet44": { + "index": "45", + "lanes": "113", + "breakout_modes": { + "1x25G": ["Eth45/1"] + } + }, + "Ethernet45": { + "index": "46", + "lanes": "114", + "breakout_modes": { + "1x25G": ["Eth46/1"] + } + }, + "Ethernet46": { + "index": "47", + "lanes": "115", + "breakout_modes": { + "1x25G": ["Eth47/1"] + } + }, + "Ethernet47": { + "index": "48", + "lanes": "116", + "breakout_modes": { + "1x25G": ["Eth48/1"] + } + }, + "Ethernet48": { + "index": "49,49,49,49", + "lanes": "65,66,67,68", + "breakout_modes": { + "1x100G": ["Eth49/1"] + } + }, + "Ethernet52": { + "index": "50,50,50,50", + "lanes": "69,70,71,72", + "breakout_modes": { + "1x100G": ["Eth50/1"] + } + }, + "Ethernet56": { + "index": "51,51,51,51", + "lanes": "121,122,123,124", + "breakout_modes": { + "1x100G": ["Eth51/1"] + } + }, + "Ethernet60": { + "index": "52,52,52,52", + "lanes": "125,126,127,128", + "breakout_modes": { + "1x100G": ["Eth52/1"] + } + }, + "Ethernet64": { + "index": "53,53,53,53", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x100G": ["Eth53/1"] + } + }, + "Ethernet68": { + "index": "54,54,54,54", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G": ["Eth54/1"] + } + }, + "Ethernet72": { + "index": "55,55,55,55", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x100G": ["Eth55/1"] + } + }, + "Ethernet76": { + "index": "56,56,56,56", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G": ["Eth56/1"] + } + } + } +} diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform_components.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform_components.json new file mode 100644 index 000000000000..b86899e311ab --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform_components.json @@ -0,0 +1,17 @@ +{ + "chassis": { + "Questone_2": { + "component": { + "BIOS": {}, + "ONIE": {}, + "BMC": {}, + "FPGA": {}, + "CPLD COMe": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/port_config.ini b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/port_config.ini new file mode 100644 index 000000000000..37c4f0cfd042 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed mtu admin_status fec +Ethernet0 49 Eth1/1 1 25000 9216 up rs +Ethernet1 50 Eth2/1 2 25000 9216 up rs +Ethernet2 51 Eth3/1 3 25000 9216 up rs +Ethernet3 52 Eth4/1 4 25000 9216 up rs +Ethernet4 57 Eth5/1 5 25000 9216 up rs +Ethernet5 58 Eth6/1 6 25000 9216 up rs +Ethernet6 59 Eth7/1 7 25000 9216 up rs +Ethernet7 60 Eth8/1 8 25000 9216 up rs +Ethernet8 61 Eth9/1 9 25000 9216 up rs +Ethernet9 62 Eth10/1 10 25000 9216 up rs +Ethernet10 63 Eth11/1 11 25000 9216 up rs +Ethernet11 64 Eth12/1 12 25000 9216 up rs +Ethernet12 77 Eth13/1 13 25000 9216 up rs +Ethernet13 78 Eth14/1 14 25000 9216 up rs +Ethernet14 79 Eth15/1 15 25000 9216 up rs +Ethernet15 80 Eth16/1 16 25000 9216 up rs +Ethernet16 85 Eth17/1 17 25000 9216 up rs +Ethernet17 86 Eth18/1 18 25000 9216 up rs +Ethernet18 87 Eth19/1 19 25000 9216 up rs +Ethernet19 88 Eth20/1 20 25000 9216 up rs +Ethernet20 93 Eth21/1 21 25000 9216 up rs +Ethernet21 94 Eth22/1 22 25000 9216 up rs +Ethernet22 95 Eth23/1 23 25000 9216 up rs +Ethernet23 96 Eth24/1 24 25000 9216 up rs +Ethernet24 13 Eth25/1 25 25000 9216 up rs +Ethernet25 14 Eth26/1 26 25000 9216 up rs +Ethernet26 15 Eth27/1 27 25000 9216 up rs +Ethernet27 16 Eth28/1 28 25000 9216 up rs +Ethernet28 21 Eth29/1 29 25000 9216 up rs +Ethernet29 22 Eth30/1 30 25000 9216 up rs +Ethernet30 23 Eth31/1 31 25000 9216 up rs +Ethernet31 24 Eth32/1 32 25000 9216 up rs +Ethernet32 29 Eth33/1 33 25000 9216 up rs +Ethernet33 30 Eth34/1 34 25000 9216 up rs +Ethernet34 31 Eth35/1 35 25000 9216 up rs +Ethernet35 32 Eth36/1 36 25000 9216 up rs +Ethernet36 97 Eth37/1 37 25000 9216 up rs +Ethernet37 98 Eth38/1 38 25000 9216 up rs +Ethernet38 99 Eth39/1 39 25000 9216 up rs +Ethernet39 100 Eth40/1 40 25000 9216 up rs +Ethernet40 105 Eth41/1 41 25000 9216 up rs +Ethernet41 106 Eth42/1 42 25000 9216 up rs +Ethernet42 107 Eth43/1 43 25000 9216 up rs +Ethernet43 108 Eth44/1 44 25000 9216 up rs +Ethernet44 113 Eth45/1 45 25000 9216 up rs +Ethernet45 114 Eth46/1 46 25000 9216 up rs +Ethernet46 115 Eth47/1 47 25000 9216 up rs +Ethernet47 116 Eth48/1 48 25000 9216 up rs +Ethernet48 65,66,67,68 Eth49/1 49 100000 9216 up rs +Ethernet52 69,70,71,72 Eth50/1 50 100000 9216 up rs +Ethernet56 121,122,123,124 Eth51/1 51 100000 9216 up rs +Ethernet60 125,126,127,128 Eth52/1 52 100000 9216 up rs +Ethernet64 1,2,3,4 Eth53/1 53 100000 9216 up rs +Ethernet68 33,34,35,36 Eth54/1 54 100000 9216 up rs +Ethernet72 5,6,7,8 Eth55/1 55 100000 9216 up rs +Ethernet76 41,42,43,44 Eth56/1 56 100000 9216 up rs diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai.profile b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai.profile new file mode 100644 index 000000000000..636d9d72fc17 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h.config.bcm diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai_postinit_cmd.soc new file mode 100644 index 000000000000..731625308a5e --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai_postinit_cmd.soc @@ -0,0 +1,2 @@ +modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1 +modreg ING_MISC_CONFIG INPUT_PRI_UNTAGGED=1 diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/td3-as13-48f8h.config.bcm b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/td3-as13-48f8h.config.bcm new file mode 100644 index 000000000000..f9f3308d30cb --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/td3-as13-48f8h.config.bcm @@ -0,0 +1,359 @@ +help_cli_enable=1 +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=0x1 +l2_mem_entries=32768 +l2xmsg_mode=1 +l3_max_ecmp_mode=1 +l3_mem_entries=49152 +l3_alpm_enable=2 +bcm_stat_interval=1000000 +host_as_route_disable=1 +lpm_scaling_enable=1 +max_vp_lags=0 +mem_cache_enable=0 +memlist_enable=1 +miim_intr_enable=0 +module_64ports=1 +oversubscribe_mode=1 +parity_enable=1 +serdes_lane_config_dfe=on +#serdes_fec_enable=1 +serdes_if_type_xe=13 +serdes_if_type_ce=14 +pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000 +#pbmp_xport_xe=0x48878787f8787808dfe1e0203e1e1e022 +pbmp_xport_xe=0x8808787f87808088221e1e1fe1e1e1fe + + +portmap_1.0=1:100 +portmap_5.0=5:100 +portmap_13.0=13:25 +portmap_14.0=14:25 +portmap_15.0=15:25 +portmap_16.0=16:25 +portmap_21.0=21:25 +portmap_22.0=22:25 +portmap_23.0=23:25 +portmap_24.0=24:25 +portmap_29.0=29:25 +portmap_30.0=30:25 +portmap_31.0=31:25 +portmap_32.0=32:25 +portmap_33.0=33:100 +portmap_41.0=41:100 +portmap_49.0=49:25 +portmap_50.0=50:25 +portmap_51.0=51:25 +portmap_52.0=52:25 +portmap_57.0=57:25 +portmap_58.0=58:25 +portmap_59.0=59:25 +portmap_60.0=60:25 +portmap_61.0=61:25 +portmap_62.0=62:25 +portmap_63.0=63:25 +portmap_64.0=64:25 +portmap_67.0=65:100 +portmap_71.0=69:100 +portmap_79.0=77:25 +portmap_80.0=78:25 +portmap_81.0=79:25 +portmap_82.0=80:25 +portmap_87.0=85:25 +portmap_88.0=86:25 +portmap_89.0=87:25 +portmap_90.0=88:25 +portmap_95.0=93:25 +portmap_96.0=94:25 +portmap_97.0=95:25 +portmap_98.0=96:25 +portmap_99.0=97:25 +portmap_100.0=98:25 +portmap_101.0=99:25 +portmap_102.0=100:25 +portmap_107.0=105:25 +portmap_108.0=106:25 +portmap_109.0=107:25 +portmap_110.0=108:25 +portmap_115.0=113:25 +portmap_116.0=114:25 +portmap_117.0=115:25 +portmap_118.0=116:25 +portmap_123.0=121:100 +portmap_127.0=125:100 + +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{1.0}=0x1302 +phy_chain_tx_lane_map_physical{5.0}=0x1032 +phy_chain_rx_lane_map_physical{5.0}=0x1302 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x1032 +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_tx_lane_map_physical{29.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x1032 +phy_chain_tx_lane_map_physical{33.0}=0x1302 +phy_chain_rx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{41.0}=0x3120 +phy_chain_rx_lane_map_physical{41.0}=0x1032 +phy_chain_tx_lane_map_physical{49.0}=0x0123 +phy_chain_rx_lane_map_physical{49.0}=0x1032 +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x1032 +phy_chain_tx_lane_map_physical{61.0}=0x0123 +phy_chain_rx_lane_map_physical{61.0}=0x1032 +phy_chain_tx_lane_map_physical{65.0}=0x1302 +phy_chain_rx_lane_map_physical{65.0}=0x1023 +phy_chain_tx_lane_map_physical{69.0}=0x1032 +phy_chain_rx_lane_map_physical{69.0}=0x0213 +phy_chain_tx_lane_map_physical{77.0}=0x3210 +phy_chain_rx_lane_map_physical{77.0}=0x2301 +phy_chain_tx_lane_map_physical{85.0}=0x3210 +phy_chain_rx_lane_map_physical{85.0}=0x2301 +phy_chain_tx_lane_map_physical{93.0}=0x3210 +phy_chain_rx_lane_map_physical{93.0}=0x2301 +phy_chain_tx_lane_map_physical{97.0}=0x3210 +phy_chain_rx_lane_map_physical{97.0}=0x2301 +phy_chain_tx_lane_map_physical{105.0}=0x3210 +phy_chain_rx_lane_map_physical{105.0}=0x2301 +phy_chain_tx_lane_map_physical{113.0}=0x3210 +phy_chain_rx_lane_map_physical{113.0}=0x2301 +phy_chain_tx_lane_map_physical{121.0}=0x2301 +phy_chain_rx_lane_map_physical{121.0}=0x2031 +phy_chain_tx_lane_map_physical{125.0}=0x0132 +phy_chain_rx_lane_map_physical{125.0}=0x3012 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x1 +phy_chain_tx_polarity_flip_physical{32.0}=0x1 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x1 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_tx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x0 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x1 +phy_chain_tx_polarity_flip_physical{121.0}=0x0 +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x0 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x1 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x0 +phy_chain_rx_polarity_flip_physical{127.0}=0x0 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +#MC P/N flip +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{129.0}=0x1 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x1 + +dport_map_port_49=1 +dport_map_port_50=2 +dport_map_port_51=3 +dport_map_port_52=4 +dport_map_port_57=5 +dport_map_port_58=6 +dport_map_port_59=7 +dport_map_port_60=8 +dport_map_port_61=9 +dport_map_port_62=10 +dport_map_port_63=11 +dport_map_port_64=12 +dport_map_port_79=13 +dport_map_port_80=14 +dport_map_port_81=15 +dport_map_port_82=16 +dport_map_port_87=17 +dport_map_port_88=18 +dport_map_port_89=19 +dport_map_port_90=20 +dport_map_port_95=21 +dport_map_port_96=22 +dport_map_port_97=23 +dport_map_port_98=24 +dport_map_port_13=25 +dport_map_port_14=26 +dport_map_port_15=27 +dport_map_port_16=28 +dport_map_port_21=29 +dport_map_port_22=30 +dport_map_port_23=31 +dport_map_port_24=32 +dport_map_port_29=33 +dport_map_port_30=34 +dport_map_port_31=35 +dport_map_port_32=36 +dport_map_port_99=37 +dport_map_port_100=38 +dport_map_port_101=39 +dport_map_port_102=40 +dport_map_port_107=41 +dport_map_port_108=42 +dport_map_port_109=43 +dport_map_port_110=44 +dport_map_port_115=45 +dport_map_port_116=46 +dport_map_port_117=47 +dport_map_port_118=48 +dport_map_port_67=49 +dport_map_port_71=50 +dport_map_port_123=51 +dport_map_port_127=52 +dport_map_port_1=53 +dport_map_port_33=54 +dport_map_port_5=55 +dport_map_port_41=56 + +reglist_enable=1 +scache_filename=/tmp/scache +schan_intr_enable=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 + +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/custom_led.bin b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/custom_led.bin new file mode 100755 index 000000000000..fb33257fbbe9 Binary files /dev/null and b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/custom_led.bin differ diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/hwsku.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/hwsku.json new file mode 100644 index 000000000000..a559890f3a18 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/hwsku.json @@ -0,0 +1,284 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet1": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet2": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet3": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet4": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet5": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet6": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet7": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet9": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet10": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet11": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet12": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet13": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet14": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet15": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet17": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet18": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet19": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet20": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet21": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet22": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet23": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet25": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet26": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet27": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet28": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet29": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet30": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet31": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet33": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet34": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet35": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet36": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet37": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet38": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet39": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet41": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet42": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet43": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet44": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet45": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet46": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet47": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet52": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet60": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet68": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet76": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + } + } +} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform.json new file mode 100644 index 000000000000..b303755d5910 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform.json @@ -0,0 +1,396 @@ +{ + "interfaces": { + "Ethernet0": { + "index": "1", + "lanes": "29", + "breakout_modes": { + "1x25G": ["Eth1/1"] + } + }, + "Ethernet1": { + "index": "2", + "lanes": "30", + "breakout_modes": { + "1x25G": ["Eth2/1"] + } + }, + "Ethernet2": { + "index": "3", + "lanes": "31", + "breakout_modes": { + "1x25G": ["Eth3/1"] + } + }, + "Ethernet3": { + "index": "4", + "lanes": "32", + "breakout_modes": { + "1x25G": ["Eth4/1"] + } + }, + "Ethernet4": { + "index": "5", + "lanes": "33", + "breakout_modes": { + "1x25G": ["Eth5/1"] + } + }, + "Ethernet5": { + "index": "6", + "lanes": "34", + "breakout_modes": { + "1x25G": ["Eth6/1"] + } + }, + "Ethernet6": { + "index": "7", + "lanes": "35", + "breakout_modes": { + "1x25G": ["Eth7/1"] + } + }, + "Ethernet7": { + "index": "8", + "lanes": "36", + "breakout_modes": { + "1x25G": ["Eth8/1"] + } + }, + "Ethernet8": { + "index": "9", + "lanes": "37", + "breakout_modes": { + "1x25G": ["Eth9/1"] + } + }, + "Ethernet9": { + "index": "10", + "lanes": "38", + "breakout_modes": { + "1x25G": ["Eth10/1"] + } + }, + "Ethernet10": { + "index": "11", + "lanes": "39", + "breakout_modes": { + "1x25G": ["Eth11/1"] + } + }, + "Ethernet11": { + "index": "12", + "lanes": "40", + "breakout_modes": { + "1x25G": ["Eth12/1"] + } + }, + "Ethernet12": { + "index": "13", + "lanes": "49", + "breakout_modes": { + "1x25G": ["Eth13/1"] + } + }, + "Ethernet13": { + "index": "14", + "lanes": "50", + "breakout_modes": { + "1x25G": ["Eth14/1"] + } + }, + "Ethernet14": { + "index": "15", + "lanes": "51", + "breakout_modes": { + "1x25G": ["Eth15/1"] + } + }, + "Ethernet15": { + "index": "16", + "lanes": "52", + "breakout_modes": { + "1x25G": ["Eth16/1"] + } + }, + "Ethernet16": { + "index": "17", + "lanes": "53", + "breakout_modes": { + "1x25G": ["Eth17/1"] + } + }, + "Ethernet17": { + "index": "18", + "lanes": "54", + "breakout_modes": { + "1x25G": ["Eth18/1"] + } + }, + "Ethernet18": { + "index": "19", + "lanes": "55", + "breakout_modes": { + "1x25G": ["Eth19/1"] + } + }, + "Ethernet19": { + "index": "20", + "lanes": "56", + "breakout_modes": { + "1x25G": ["Eth20/1"] + } + }, + "Ethernet20": { + "index": "21", + "lanes": "57", + "breakout_modes": { + "1x25G": ["Eth21/1"] + } + }, + "Ethernet21": { + "index": "22", + "lanes": "58", + "breakout_modes": { + "1x25G": ["Eth22/1"] + } + }, + "Ethernet22": { + "index": "23", + "lanes": "59", + "breakout_modes": { + "1x25G": ["Eth23/1"] + } + }, + "Ethernet23": { + "index": "24", + "lanes": "60", + "breakout_modes": { + "1x25G": ["Eth24/1"] + } + }, + "Ethernet24": { + "index": "25", + "lanes": "9", + "breakout_modes": { + "1x25G": ["Eth25/1"] + } + }, + "Ethernet25": { + "index": "26", + "lanes": "10", + "breakout_modes": { + "1x25G": ["Eth26/1"] + } + }, + "Ethernet26": { + "index": "27", + "lanes": "11", + "breakout_modes": { + "1x25G": ["Eth27/1"] + } + }, + "Ethernet27": { + "index": "28", + "lanes": "12", + "breakout_modes": { + "1x25G": ["Eth28/1"] + } + }, + "Ethernet28": { + "index": "29", + "lanes": "13", + "breakout_modes": { + "1x25G": ["Eth29/1"] + } + }, + "Ethernet29": { + "index": "30", + "lanes": "14", + "breakout_modes": { + "1x25G": ["Eth30/1"] + } + }, + "Ethernet30": { + "index": "31", + "lanes": "15", + "breakout_modes": { + "1x25G": ["Eth31/1"] + } + }, + "Ethernet31": { + "index": "32", + "lanes": "16", + "breakout_modes": { + "1x25G": ["Eth32/1"] + } + }, + "Ethernet32": { + "index": "33", + "lanes": "17", + "breakout_modes": { + "1x25G": ["Eth33/1"] + } + }, + "Ethernet33": { + "index": "34", + "lanes": "18", + "breakout_modes": { + "1x25G": ["Eth34/1"] + } + }, + "Ethernet34": { + "index": "35", + "lanes": "19", + "breakout_modes": { + "1x25G": ["Eth35/1"] + } + }, + "Ethernet35": { + "index": "36", + "lanes": "20", + "breakout_modes": { + "1x25G": ["Eth36/1"] + } + }, + "Ethernet36": { + "index": "37", + "lanes": "61", + "breakout_modes": { + "1x25G": ["Eth37/1"] + } + }, + "Ethernet37": { + "index": "38", + "lanes": "62", + "breakout_modes": { + "1x25G": ["Eth38/1"] + } + }, + "Ethernet38": { + "index": "39", + "lanes": "63", + "breakout_modes": { + "1x25G": ["Eth39/1"] + } + }, + "Ethernet39": { + "index": "40", + "lanes": "64", + "breakout_modes": { + "1x25G": ["Eth40/1"] + } + }, + "Ethernet40": { + "index": "41", + "lanes": "65", + "breakout_modes": { + "1x25G": ["Eth41/1"] + } + }, + "Ethernet41": { + "index": "42", + "lanes": "66", + "breakout_modes": { + "1x25G": ["Eth42/1"] + } + }, + "Ethernet42": { + "index": "43", + "lanes": "67", + "breakout_modes": { + "1x25G": ["Eth43/1"] + } + }, + "Ethernet43": { + "index": "44", + "lanes": "68", + "breakout_modes": { + "1x25G": ["Eth44/1"] + } + }, + "Ethernet44": { + "index": "45", + "lanes": "69", + "breakout_modes": { + "1x25G": ["Eth45/1"] + } + }, + "Ethernet45": { + "index": "46", + "lanes": "70", + "breakout_modes": { + "1x25G": ["Eth46/1"] + } + }, + "Ethernet46": { + "index": "47", + "lanes": "71", + "breakout_modes": { + "1x25G": ["Eth47/1"] + } + }, + "Ethernet47": { + "index": "48", + "lanes": "72", + "breakout_modes": { + "1x25G": ["Eth48/1"] + } + }, + "Ethernet48": { + "index": "49,49,49,49", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G": ["Eth49/1"] + } + }, + "Ethernet52": { + "index": "50,50,50,50", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G": ["Eth50/1"] + } + }, + "Ethernet56": { + "index": "51,51,51,51", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x100G": ["Eth51/1"] + } + }, + "Ethernet60": { + "index": "52,52,52,52", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x100G": ["Eth52/1"] + } + }, + "Ethernet64": { + "index": "53,53,53,53", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x100G": ["Eth53/1"] + } + }, + "Ethernet68": { + "index": "54,54,54,54", + "lanes": "21,22,23,24", + "breakout_modes": { + "1x100G": ["Eth54/1"] + } + }, + "Ethernet72": { + "index": "55,55,55,55", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x100G": ["Eth55/1"] + } + }, + "Ethernet76": { + "index": "56,56,56,56", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x100G": ["Eth56/1"] + } + } + } +} diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform_components.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform_components.json new file mode 100644 index 000000000000..165eacad2dd3 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform_components.json @@ -0,0 +1,17 @@ +{ + "chassis": { + "Questone_2A": { + "component": { + "BIOS": {}, + "ONIE": {}, + "BMC": {}, + "FPGA": {}, + "CPLD COMe": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/port_config.ini b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/port_config.ini new file mode 100644 index 000000000000..37d2d92652ed --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed mtu admin_status fec +Ethernet0 29 Eth1/1 1 25000 9216 up rs +Ethernet1 30 Eth2/1 2 25000 9216 up rs +Ethernet2 31 Eth3/1 3 25000 9216 up rs +Ethernet3 32 Eth4/1 4 25000 9216 up rs +Ethernet4 33 Eth5/1 5 25000 9216 up rs +Ethernet5 34 Eth6/1 6 25000 9216 up rs +Ethernet6 35 Eth7/1 7 25000 9216 up rs +Ethernet7 36 Eth8/1 8 25000 9216 up rs +Ethernet8 37 Eth9/1 9 25000 9216 up rs +Ethernet9 38 Eth10/1 10 25000 9216 up rs +Ethernet10 39 Eth11/1 11 25000 9216 up rs +Ethernet11 40 Eth12/1 12 25000 9216 up rs +Ethernet12 49 Eth13/1 13 25000 9216 up rs +Ethernet13 50 Eth14/1 14 25000 9216 up rs +Ethernet14 51 Eth15/1 15 25000 9216 up rs +Ethernet15 52 Eth16/1 16 25000 9216 up rs +Ethernet16 53 Eth17/1 17 25000 9216 up rs +Ethernet17 54 Eth18/1 18 25000 9216 up rs +Ethernet18 55 Eth19/1 19 25000 9216 up rs +Ethernet19 56 Eth20/1 20 25000 9216 up rs +Ethernet20 57 Eth21/1 21 25000 9216 up rs +Ethernet21 58 Eth22/1 22 25000 9216 up rs +Ethernet22 59 Eth23/1 23 25000 9216 up rs +Ethernet23 60 Eth24/1 24 25000 9216 up rs +Ethernet24 9 Eth25/1 25 25000 9216 up rs +Ethernet25 10 Eth26/1 26 25000 9216 up rs +Ethernet26 11 Eth27/1 27 25000 9216 up rs +Ethernet27 12 Eth28/1 28 25000 9216 up rs +Ethernet28 13 Eth29/1 29 25000 9216 up rs +Ethernet29 14 Eth30/1 30 25000 9216 up rs +Ethernet30 15 Eth31/1 31 25000 9216 up rs +Ethernet31 16 Eth32/1 32 25000 9216 up rs +Ethernet32 17 Eth33/1 33 25000 9216 up rs +Ethernet33 18 Eth34/1 34 25000 9216 up rs +Ethernet34 19 Eth35/1 35 25000 9216 up rs +Ethernet35 20 Eth36/1 36 25000 9216 up rs +Ethernet36 61 Eth37/1 37 25000 9216 up rs +Ethernet37 62 Eth38/1 38 25000 9216 up rs +Ethernet38 63 Eth39/1 39 25000 9216 up rs +Ethernet39 64 Eth40/1 40 25000 9216 up rs +Ethernet40 65 Eth41/1 41 25000 9216 up rs +Ethernet41 66 Eth42/1 42 25000 9216 up rs +Ethernet42 67 Eth43/1 43 25000 9216 up rs +Ethernet43 68 Eth44/1 44 25000 9216 up rs +Ethernet44 69 Eth45/1 45 25000 9216 up rs +Ethernet45 70 Eth46/1 46 25000 9216 up rs +Ethernet46 71 Eth47/1 47 25000 9216 up rs +Ethernet47 72 Eth48/1 48 25000 9216 up rs +Ethernet48 41,42,43,44 Eth49/1 49 100000 9216 up rs +Ethernet52 45,46,47,48 Eth50/1 50 100000 9216 up rs +Ethernet56 73,74,75,76 Eth51/1 51 100000 9216 up rs +Ethernet60 77,78,79,80 Eth52/1 52 100000 9216 up rs +Ethernet64 1,2,3,4 Eth53/1 53 100000 9216 up rs +Ethernet68 21,22,23,24 Eth54/1 54 100000 9216 up rs +Ethernet72 5,6,7,8 Eth55/1 55 100000 9216 up rs +Ethernet76 25,26,27,28 Eth56/1 56 100000 9216 up rs diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai.profile.j2 b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai.profile.j2 new file mode 100644 index 000000000000..62a1db9e0960 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai.profile.j2 @@ -0,0 +1,16 @@ +{# Get sai.profile based on vxlan_profile. Vxlan's config.bcm file is the default one #} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h-vxlan.config.bcm' -%} +{%- if DEVICE_METADATA is defined and DEVICE_METADATA['localhost'] is defined -%} +{%- if DEVICE_METADATA['localhost']['vxlan_profile'] is defined -%} +{%- set vxlan_profile = DEVICE_METADATA['localhost']['vxlan_profile'] -%} +{%- if 'enable' in vxlan_profile.lower() %} +{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h-vxlan.config.bcm' -%} +{%- else %} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h.config.bcm' -%} +{%- endif %} +{%- else %} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h-vxlan.config.bcm' -%} +{%- endif %} +{%- endif %} +{# Write the contents of sai_profile_filename to sai.profile file #} +{{ sai_profile_contents }} diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai_postinit_cmd.soc new file mode 100644 index 000000000000..731625308a5e --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai_postinit_cmd.soc @@ -0,0 +1,2 @@ +modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1 +modreg ING_MISC_CONFIG INPUT_PRI_UNTAGGED=1 diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h-vxlan.config.bcm b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h-vxlan.config.bcm new file mode 100755 index 000000000000..7d444dfb53f6 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h-vxlan.config.bcm @@ -0,0 +1,423 @@ +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 +oversubscribe_mode=1 +pbmp_xport_xe=0x11ffffffe1ffffffe +stable_size=0x5500000 +ifp_inports_support_enable=1 + +#FC0 +portmap_1.0=1:100 + +#FC1 +portmap_2.0=5:100 + +#FC2 +portmap_3.0=9:25 +portmap_4.0=10:25 +portmap_5.0=11:25 +portmap_6.0=12:25 + +#FC3 +portmap_7.0=13:25 +portmap_8.0=14:25 +portmap_9.0=15:25 +portmap_10.0=16:25 + +#FC4 +portmap_11.0=17:25 +portmap_12.0=18:25 +portmap_13.0=19:25 +portmap_14.0=20:25 + +#FC5 +portmap_15.0=21:100 + +#FC6 +portmap_16.0=25:100 + +#FC7 +portmap_17.0=29:25 +portmap_18.0=30:25 +portmap_19.0=31:25 +portmap_20.0=32:25 + +#FC8 +portmap_21.0=33:25 +portmap_22.0=34:25 +portmap_23.0=35:25 +portmap_24.0=36:25 + +#FC9 +portmap_25.0=37:25 +portmap_26.0=38:25 +portmap_27.0=39:25 +portmap_28.0=40:25 + +#FC10 +portmap_33.0=41:100 + +#FC11 +portmap_34.0=45:100 + +#FC12 +portmap_35.0=49:25 +portmap_36.0=50:25 +portmap_37.0=51:25 +portmap_38.0=52:25 + +#FC13 +portmap_39.0=53:25 +portmap_40.0=54:25 +portmap_41.0=55:25 +portmap_42.0=56:25 + +#FC14 +portmap_43.0=57:25 +portmap_44.0=58:25 +portmap_45.0=59:25 +portmap_46.0=60:25 + +#FC15 +portmap_47.0=61:25 +portmap_48.0=62:25 +portmap_49.0=63:25 +portmap_50.0=64:25 + +#FC16 +portmap_51.0=65:25 +portmap_52.0=66:25 +portmap_53.0=67:25 +portmap_54.0=68:25 + +#FC17 +portmap_55.0=69:25 +portmap_56.0=70:25 +portmap_57.0=71:25 +portmap_58.0=72:25 + +#FC18 +portmap_59.0=73:100 + +#FC19 +portmap_60.0=77:100 + + +#portmap_64.0=81:10 + +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{1.0}=0x1302 +phy_chain_tx_lane_map_physical{5.0}=0x1032 +phy_chain_rx_lane_map_physical{5.0}=0x1302 +phy_chain_tx_lane_map_physical{9.0}=0x0123 +phy_chain_rx_lane_map_physical{9.0}=0x1032 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x1032 +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x1032 +phy_chain_tx_lane_map_physical{21.0}=0x1302 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_tx_lane_map_physical{25.0}=0x3120 +phy_chain_rx_lane_map_physical{25.0}=0x1032 +phy_chain_tx_lane_map_physical{29.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x1032 +phy_chain_tx_lane_map_physical{33.0}=0x0123 +phy_chain_rx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{37.0}=0x0123 +phy_chain_rx_lane_map_physical{37.0}=0x1032 +phy_chain_tx_lane_map_physical{41.0}=0x1302 +phy_chain_rx_lane_map_physical{41.0}=0x1023 +phy_chain_tx_lane_map_physical{45.0}=0x1032 +phy_chain_rx_lane_map_physical{45.0}=0x0213 +phy_chain_tx_lane_map_physical{49.0}=0x3210 +phy_chain_rx_lane_map_physical{49.0}=0x2301 +phy_chain_tx_lane_map_physical{53.0}=0x3210 +phy_chain_rx_lane_map_physical{53.0}=0x2301 +phy_chain_tx_lane_map_physical{57.0}=0x3210 +phy_chain_rx_lane_map_physical{57.0}=0x2301 +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x2301 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x2301 +phy_chain_tx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x2301 +phy_chain_tx_lane_map_physical{73.0}=0x2301 +phy_chain_rx_lane_map_physical{73.0}=0x2031 +phy_chain_tx_lane_map_physical{77.0}=0x0132 +phy_chain_rx_lane_map_physical{77.0}=0x3012 +phy_chain_tx_lane_map_physical{81.0}=0x3210 +phy_chain_rx_lane_map_physical{81.0}=0x3201 + +#FC0 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 + +#FC1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 + +#FC2 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x1 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 + +#FC3 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 + +#FC4 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x1 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 + +#FC5 +phy_chain_tx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 + +#FC6 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x1 +phy_chain_tx_polarity_flip_physical{27.0}=0x1 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 + +#FC7 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x1 + +#FC8 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +#FC9 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 + +#FC10 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 + +#FC11 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 + +#FC12 +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 + +#FC13 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x1 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 + +#FC14 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x0 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 + +#FC15 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 + +#FC16 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 + +#FC17 +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 + +#FC18 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 + +#FC19 +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 + + +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x1 + + +dport_map_port_17=1 +dport_map_port_18=2 +dport_map_port_19=3 +dport_map_port_20=4 +dport_map_port_21=5 +dport_map_port_22=6 +dport_map_port_23=7 +dport_map_port_24=8 +dport_map_port_25=9 +dport_map_port_26=10 +dport_map_port_27=11 +dport_map_port_28=12 +dport_map_port_35=13 +dport_map_port_36=14 +dport_map_port_37=15 +dport_map_port_38=16 +dport_map_port_39=17 +dport_map_port_40=18 +dport_map_port_41=19 +dport_map_port_42=20 +dport_map_port_43=21 +dport_map_port_44=22 +dport_map_port_45=23 +dport_map_port_46=24 +dport_map_port_3=25 +dport_map_port_4=26 +dport_map_port_5=27 +dport_map_port_6=28 +dport_map_port_7=29 +dport_map_port_8=30 +dport_map_port_9=31 +dport_map_port_10=32 +dport_map_port_11=33 +dport_map_port_12=34 +dport_map_port_13=35 +dport_map_port_14=36 +dport_map_port_47=37 +dport_map_port_48=38 +dport_map_port_49=39 +dport_map_port_50=40 +dport_map_port_51=41 +dport_map_port_52=42 +dport_map_port_53=43 +dport_map_port_54=44 +dport_map_port_55=45 +dport_map_port_56=46 +dport_map_port_57=47 +dport_map_port_58=48 +dport_map_port_33=49 +dport_map_port_34=50 +dport_map_port_59=51 +dport_map_port_60=52 +dport_map_port_1=53 +dport_map_port_15=54 +dport_map_port_2=55 +dport_map_port_16=56 +#dport_map_port_64=57 + +#VxLAN +sai_tunnel_support=1 +use_all_splithorizon_groups=1 +bcm_tunnel_term_compatible_mode=1 +flow_init_mode=1 +l3_ecmp_levels=2 +riot_enable=1 +riot_overlay_l3_intf_mem_size=8192 +riot_overlay_l3_egress_mem_size=32768 +riot_overlay_ecmp_resilient_hash_size=16384 diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h.config.bcm b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h.config.bcm new file mode 100755 index 000000000000..e76aa8eb34e9 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h.config.bcm @@ -0,0 +1,414 @@ +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 +oversubscribe_mode=1 +pbmp_xport_xe=0x11ffffffe1ffffffe +stable_size=0x5500000 +ifp_inports_support_enable=1 + +#FC0 +portmap_1.0=1:100 + +#FC1 +portmap_2.0=5:100 + +#FC2 +portmap_3.0=9:25 +portmap_4.0=10:25 +portmap_5.0=11:25 +portmap_6.0=12:25 + +#FC3 +portmap_7.0=13:25 +portmap_8.0=14:25 +portmap_9.0=15:25 +portmap_10.0=16:25 + +#FC4 +portmap_11.0=17:25 +portmap_12.0=18:25 +portmap_13.0=19:25 +portmap_14.0=20:25 + +#FC5 +portmap_15.0=21:100 + +#FC6 +portmap_16.0=25:100 + +#FC7 +portmap_17.0=29:25 +portmap_18.0=30:25 +portmap_19.0=31:25 +portmap_20.0=32:25 + +#FC8 +portmap_21.0=33:25 +portmap_22.0=34:25 +portmap_23.0=35:25 +portmap_24.0=36:25 + +#FC9 +portmap_25.0=37:25 +portmap_26.0=38:25 +portmap_27.0=39:25 +portmap_28.0=40:25 + +#FC10 +portmap_33.0=41:100 + +#FC11 +portmap_34.0=45:100 + +#FC12 +portmap_35.0=49:25 +portmap_36.0=50:25 +portmap_37.0=51:25 +portmap_38.0=52:25 + +#FC13 +portmap_39.0=53:25 +portmap_40.0=54:25 +portmap_41.0=55:25 +portmap_42.0=56:25 + +#FC14 +portmap_43.0=57:25 +portmap_44.0=58:25 +portmap_45.0=59:25 +portmap_46.0=60:25 + +#FC15 +portmap_47.0=61:25 +portmap_48.0=62:25 +portmap_49.0=63:25 +portmap_50.0=64:25 + +#FC16 +portmap_51.0=65:25 +portmap_52.0=66:25 +portmap_53.0=67:25 +portmap_54.0=68:25 + +#FC17 +portmap_55.0=69:25 +portmap_56.0=70:25 +portmap_57.0=71:25 +portmap_58.0=72:25 + +#FC18 +portmap_59.0=73:100 + +#FC19 +portmap_60.0=77:100 + + +#portmap_64.0=81:10 + +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{1.0}=0x1302 +phy_chain_tx_lane_map_physical{5.0}=0x1032 +phy_chain_rx_lane_map_physical{5.0}=0x1302 +phy_chain_tx_lane_map_physical{9.0}=0x0123 +phy_chain_rx_lane_map_physical{9.0}=0x1032 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x1032 +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x1032 +phy_chain_tx_lane_map_physical{21.0}=0x1302 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_tx_lane_map_physical{25.0}=0x3120 +phy_chain_rx_lane_map_physical{25.0}=0x1032 +phy_chain_tx_lane_map_physical{29.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x1032 +phy_chain_tx_lane_map_physical{33.0}=0x0123 +phy_chain_rx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{37.0}=0x0123 +phy_chain_rx_lane_map_physical{37.0}=0x1032 +phy_chain_tx_lane_map_physical{41.0}=0x1302 +phy_chain_rx_lane_map_physical{41.0}=0x1023 +phy_chain_tx_lane_map_physical{45.0}=0x1032 +phy_chain_rx_lane_map_physical{45.0}=0x0213 +phy_chain_tx_lane_map_physical{49.0}=0x3210 +phy_chain_rx_lane_map_physical{49.0}=0x2301 +phy_chain_tx_lane_map_physical{53.0}=0x3210 +phy_chain_rx_lane_map_physical{53.0}=0x2301 +phy_chain_tx_lane_map_physical{57.0}=0x3210 +phy_chain_rx_lane_map_physical{57.0}=0x2301 +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x2301 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x2301 +phy_chain_tx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x2301 +phy_chain_tx_lane_map_physical{73.0}=0x2301 +phy_chain_rx_lane_map_physical{73.0}=0x2031 +phy_chain_tx_lane_map_physical{77.0}=0x0132 +phy_chain_rx_lane_map_physical{77.0}=0x3012 +phy_chain_tx_lane_map_physical{81.0}=0x3210 +phy_chain_rx_lane_map_physical{81.0}=0x3201 + +#FC0 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 + +#FC1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 + +#FC2 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x1 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 + +#FC3 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 + +#FC4 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x1 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 + +#FC5 +phy_chain_tx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 + +#FC6 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x1 +phy_chain_tx_polarity_flip_physical{27.0}=0x1 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 + +#FC7 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x1 + +#FC8 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +#FC9 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 + +#FC10 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 + +#FC11 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 + +#FC12 +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 + +#FC13 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x1 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 + +#FC14 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x0 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 + +#FC15 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 + +#FC16 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 + +#FC17 +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 + +#FC18 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 + +#FC19 +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 + + +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x1 + + +dport_map_port_17=1 +dport_map_port_18=2 +dport_map_port_19=3 +dport_map_port_20=4 +dport_map_port_21=5 +dport_map_port_22=6 +dport_map_port_23=7 +dport_map_port_24=8 +dport_map_port_25=9 +dport_map_port_26=10 +dport_map_port_27=11 +dport_map_port_28=12 +dport_map_port_35=13 +dport_map_port_36=14 +dport_map_port_37=15 +dport_map_port_38=16 +dport_map_port_39=17 +dport_map_port_40=18 +dport_map_port_41=19 +dport_map_port_42=20 +dport_map_port_43=21 +dport_map_port_44=22 +dport_map_port_45=23 +dport_map_port_46=24 +dport_map_port_3=25 +dport_map_port_4=26 +dport_map_port_5=27 +dport_map_port_6=28 +dport_map_port_7=29 +dport_map_port_8=30 +dport_map_port_9=31 +dport_map_port_10=32 +dport_map_port_11=33 +dport_map_port_12=34 +dport_map_port_13=35 +dport_map_port_14=36 +dport_map_port_47=37 +dport_map_port_48=38 +dport_map_port_49=39 +dport_map_port_50=40 +dport_map_port_51=41 +dport_map_port_52=42 +dport_map_port_53=43 +dport_map_port_54=44 +dport_map_port_55=45 +dport_map_port_56=46 +dport_map_port_57=47 +dport_map_port_58=48 +dport_map_port_33=49 +dport_map_port_34=50 +dport_map_port_59=51 +dport_map_port_60=52 +dport_map_port_1=53 +dport_map_port_15=54 +dport_map_port_2=55 +dport_map_port_16=56 +#dport_map_port_64=57 + +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc diff --git a/device/celestica/x86_64-cel_questone_2-r0/installer.conf b/device/celestica/x86_64-cel_questone_2-r0/installer.conf new file mode 100644 index 000000000000..48126f43549a --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0xe060 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="processor.max_cstate=1 intel_idle.max_cstate=0 intel_iommu=off thermal.off=1 noirqdebug" diff --git a/device/celestica/x86_64-cel_questone_2-r0/led_proc_init.soc b/device/celestica/x86_64-cel_questone_2-r0/led_proc_init.soc new file mode 100644 index 000000000000..6f242fa07d89 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/led_proc_init.soc @@ -0,0 +1,8 @@ +#Enable all ports +#port all en=1 +#sleep 6 +#linkscan 250000; port xe,ce linkscan=on + +#Load LED +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +led auto on; led start diff --git a/device/celestica/x86_64-cel_questone_2-r0/opennsl-postinit.cfg b/device/celestica/x86_64-cel_questone_2-r0/opennsl-postinit.cfg new file mode 100644 index 000000000000..7008c14c0ffc --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/opennsl-postinit.cfg @@ -0,0 +1,3 @@ +linkscan 250000; port xe,ce linkscan=on +sleep 1 +led auto on; led start diff --git a/device/celestica/x86_64-cel_questone_2-r0/pcie.yaml b/device/celestica/x86_64-cel_questone_2-r0/pcie.yaml new file mode 100644 index 000000000000..bafe4a0d6d2a --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/pcie.yaml @@ -0,0 +1,153 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '1980' + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev + 11)' +- bus: '00' + dev: '04' + fn: '0' + id: 19a1 + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers + (rev 11)' +- bus: '00' + dev: '05' + fn: '0' + id: 19a2 + name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 + Series Root Complex Event Collector (rev 11)' +- bus: '00' + dev: '06' + fn: '0' + id: 19a3 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT + Root Port (rev 11)' +- bus: '00' + dev: 09 + fn: '0' + id: 19a4 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #0 (rev 11)' +- bus: '00' + dev: '10' + fn: '0' + id: 19aa + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #6 (rev 11)' +- bus: '00' + dev: '11' + fn: '0' + id: 19ab + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #7 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 19ac + name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller + - Host (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 19c2 + name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller + 1 (rev 11)' +- bus: '00' + dev: '15' + fn: '0' + id: 19d0 + name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI + Controller (rev 11)' +- bus: '00' + dev: '16' + fn: '0' + id: 19d1 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #0 (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 19d3 + name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME + HECI 1 (rev 11)' +- bus: '00' + dev: 1a + fn: '0' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1a + fn: '1' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1a + fn: '2' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1c + fn: '0' + id: 19db + name: 'SD Host controller: Intel Corporation Device 19db (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 19dc + name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev + 11)' +- bus: '00' + dev: 1f + fn: '2' + id: 19de + name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management + Controller (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 19df + name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev + 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 19e0 + name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series + SPI Controller (rev 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 19e2 + name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology + (rev 11)' +- bus: '02' + dev: '00' + fn: '0' + id: b770 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b770 (rev 01)' +- bus: '03' + dev: '00' + fn: '0' + id: '7021' + name: 'Memory controller: Xilinx Corporation Device 7021' +- bus: '04' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '05' + dev: '00' + fn: '0' + id: 15c2 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: '05' + dev: '00' + fn: '1' + id: 15c2 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' diff --git a/device/celestica/x86_64-cel_questone_2-r0/platform_asic b/device/celestica/x86_64-cel_questone_2-r0/platform_asic new file mode 100644 index 000000000000..960467652765 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/celestica/x86_64-cel_questone_2-r0/platform_reboot b/device/celestica/x86_64-cel_questone_2-r0/platform_reboot new file mode 100755 index 000000000000..12a18efe1d0b --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/platform_reboot @@ -0,0 +1,6 @@ +#!/bin/bash + +# Set all LEDs to BMC's control +ipmitool raw 0x3a 0x0f 0x02 0x01 &> /dev/null + +/usr/local/bin/questone2_platform_shutdown.sh system diff --git a/device/celestica/x86_64-cel_questone_2-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_questone_2-r0/plugins/eeprom.py new file mode 100644 index 000000000000..22895539823f --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/plugins/eeprom.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica DX010 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) + diff --git a/device/celestica/x86_64-cel_questone_2-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_questone_2-r0/plugins/sfputil.py new file mode 100755 index 000000000000..03882c65ac00 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/plugins/sfputil.py @@ -0,0 +1,312 @@ +#!/usr/bin/env python +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase + import struct +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 55 + QSFP_PORT_START = 48 + QSFP_PORT_END = 55 + __xcvr_presence = {} + + EEPROM_OFFSET = 9 + PORT_INFO_PATH = '/sys/class/questone2_fpga' + + _port_name = "" + _port_to_eeprom_mapping = {} + _port_to_i2cbus_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.QSFP_PORT_END + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + @property + def port_to_i2cbus_mapping(self): + return self._port_to_i2cbus_mapping + + def get_port_name(self, port_num): + if port_num in self.qsfp_ports: + self._port_name = "QSFP" + str(port_num - self.QSFP_PORT_START + 1) + else: + self._port_name = "SFP" + str(port_num + 1) + return self._port_name + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.DOM_EEPROM_ADDR, 256) + + def __init__(self): + # Override port_to_eeprom_mapping for class initialization + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' + + for x in range(self.PORT_START, self.PORT_END+1): + # port_index = 0 , it's path = /sys/bus/i2c/devices/i2c-10/10-0050/eeprom + # port_index = 55, it's path = /sys/bus/i2c/devices/i2c-65/65-0050/eeprom + # so the real offset is 10 + self.port_to_i2cbus_mapping[x] = (x + 1 + self.EEPROM_OFFSET) + self.port_to_eeprom_mapping[x] = eeprom_path.format( + x + 1 + self.EEPROM_OFFSET) + SfpUtilBase.__init__(self) + for x in range(self.PORT_START, self.PORT_END+1): + self.__xcvr_presence[x] = self.get_presence(x) + + def _do_write_file(self, file_handle, offset, value): + file_handle.seek(offset) + file_handle.write(hex(value)) + file_handle.close() + + def get_presence(self, port_num): + + # Check for invalid port_num + if port_num not in range(self.port_start, self.port_end + 1): + return False + + # Get path for access port presence status + port_name = self.get_port_name(port_num) + sysfs_filename = "qsfp_modprs" if port_num in self.qsfp_ports else "sfp_modabs" + reg_path = "/".join([self.PORT_INFO_PATH, port_name, sysfs_filename]) + + # Read status + try: + reg_file = open(reg_path) + content = reg_file.readline().rstrip() + reg_value = int(content) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # Module present is active low + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + if not self.get_presence(port_num): + return None + + eeprom_raw = [] + eeprom_raw.append("0x00") + + lpmode = False + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(port_num + 1 + self.EEPROM_OFFSET) + if port_num >= 49: + try: + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + eeprom.seek(93) + raw = eeprom.read(1) + eeprom.close() + except Exception as err: + return None + + if len(raw) == 0: + return None + eeprom_raw[0] = hex(ord(raw[0]))[2:].zfill(2) + + power_data = int(eeprom_raw[0], 16) + # if lpmod, power-override bit and power-set bit are both setted + # bit0 bit1 + lpmode = power_data & 0x03 != 0 + else: + return None + + return lpmode + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + if not self.get_presence(port_num): + return False + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(port_num + 1 + self.EEPROM_OFFSET) + try: + reg_file = open(eeprom_path, mode="wb+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_file.seek(93) + power_raw = reg_file.read(1) + if power_raw is None: + return False + power_data = int(hex(ord(power_raw))[2:].zfill(2), 16) + + if lpmode: + power_data |= 0x03 + else: + power_data &= ~(0x03) + + reg_file.seek(93) + reg_file.write(struct.pack('B', int(power_data))) + reg_file.close() + + return True + + def reset(self, port_num): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + try: + port_name = self.get_port_name(port_num) + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(0)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_file.seek(0) + reg_file.write(hex(1)) + reg_file.close() + + return True + + def get_transceiver_change_event(self, timeout=0): + """ + To detect if any transceiver change event happens. + """ + start_ms = time.time() * 1000 + xcvr_change_event_dict = {} + event = False + + while True: + time.sleep(0.5) + for port in range(self.port_start, self.port_end+1): + curr_presence = self.get_presence(port) + if curr_presence != self.__xcvr_presence[port]: + if curr_presence is True: + xcvr_change_event_dict[str(port)] = '1' + self.__xcvr_presence[port] = True + elif curr_presence is False: + xcvr_change_event_dict[str(port)] = '0' + self.__xcvr_presence[port] = False + event = True + + if event is True: + return True, xcvr_change_event_dict + + if timeout: + now_ms = time.time() * 1000 + if (now_ms - start_ms >= timeout): + return True, xcvr_change_event_dict + + def tx_disable(self, port_num, disable): + """ + @param port_num index of physical port + @param disable, True -- disable port tx signal + False -- enable port tx signal + @return True when operation success, False on failure. + """ + TX_DISABLE_BYTE_OFFSET = 86 + if port_num not in range(self.port_start, self.port_end + 1) or type(disable) != bool: + return False + + # QSFP, set eeprom to disable tx + if port_num in self.qsfp_ports: + presence = self.get_presence(port_num) + if not presence: + return True + + disable = b'\x0f' if disable else b'\x00' + # open eeprom + try: + with open(self.port_to_eeprom_mapping[port_num], mode="wb", buffering=0) as sysfsfile: + sysfsfile.seek(TX_DISABLE_BYTE_OFFSET) + sysfsfile.write(bytearray(disable)) + except IOError: + return False + + # SFP, set tx_disable pin + else: + try: + disable = hex(1) if disable else hex(0) + port_name = self.get_port_name(port_num) + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "sfp_txdisable"]), "w") + reg_file.write(disable) + reg_file.close() + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + return True + + def reset_all(self): + result = True + port_sysfs_path = [] + for port in range(self.port_start, self.port_end+1): + if port not in self.qsfp_ports: + continue + + presence = self.get_presence(port) + if not presence: + continue + + try: + port_name = self.get_port_name(port) + sysfs_path = "/".join([self.PORT_INFO_PATH, + port_name, "qsfp_reset"]) + reg_file = open(sysfs_path, "w") + port_sysfs_path.append(sysfs_path) + except IOError as e: + result = False + continue + + self._do_write_file(reg_file, 0, 0) + + time.sleep(1) + + for sysfs_path in port_sysfs_path: + try: + reg_file = open(sysfs_path, "w") + except IOError as e: + result = False + continue + + self._do_write_file(reg_file, 0, 1) + + return result diff --git a/device/celestica/x86_64-cel_questone_2-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_questone_2-r0/pmon_daemon_control.json new file mode 100644 index 000000000000..f5b2736b13e0 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/pmon_daemon_control.json @@ -0,0 +1,5 @@ +{ + "skip_ledd": true, + "skip_fancontrol": true, + "skip_xcvrd_cmis_mgr": true +} diff --git a/device/celestica/x86_64-cel_questone_2-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_questone_2-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..56fda7de4f5d --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/system_health_monitoring_config.json @@ -0,0 +1,13 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "psu.temperature" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "green_blink_1hz" + } +} diff --git a/device/celestica/x86_64-cel_questone_2-r0/warm-reboot_plugin b/device/celestica/x86_64-cel_questone_2-r0/warm-reboot_plugin new file mode 100755 index 000000000000..d0fb8b29e191 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/warm-reboot_plugin @@ -0,0 +1,4 @@ +#!/bin/bash + +# Set all LEDs to BMC's control +ipmitool raw 0x3a 0x0f 0x02 0x01 &> /dev/null diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers.json.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers.json.j2 new file mode 100644 index 000000000000..0b1cb2c541b6 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_def.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_def.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_def.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..44fcf21887a6 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t0.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t1.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t1.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/hwsku.json b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/hwsku.json new file mode 100644 index 000000000000..28e50b8c0385 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/hwsku.json @@ -0,0 +1,169 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet4": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet12": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet20": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet28": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet36": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet44": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet52": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet60": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet68": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet76": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet80": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet84": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet88": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet92": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet96": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet100": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet104": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet108": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet112": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet116": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet120": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet124": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet128": { + "default_brkout_mode": "1x10G", + "autoneg": "off", + "fec": "none" + } + } +} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l2/config b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l2/config new file mode 100644 index 000000000000..45a7b84d5032 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l2/config @@ -0,0 +1,3 @@ +l2_mem_entries=139264 +l3_mem_entries=8192 +l3_alpm_enable=0 diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l3/config b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l3/config new file mode 100644 index 000000000000..3467c1b39716 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l3/config @@ -0,0 +1,3 @@ +l2_mem_entries=40000 +l3_mem_entries=40000 +l3_alpm_enable=2 diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/pg_profile_lookup.ini b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/pg_profile_lookup.ini new file mode 100644 index 000000000000..9f2eacb6fc42 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 56368 18432 55120 -3 2496 + 25000 5m 56368 18432 55120 -3 2496 + 40000 5m 56368 18432 55120 -3 2496 + 50000 5m 56368 18432 55120 -3 2496 + 100000 5m 56368 18432 55120 -3 2496 + 10000 40m 56368 18432 55120 -3 2496 + 25000 40m 56368 18432 55120 -3 2496 + 40000 40m 56368 18432 55120 -3 2496 + 50000 40m 56368 18432 55120 -3 2496 + 100000 40m 56368 18432 55120 -3 2496 + 10000 300m 56368 18432 55120 -3 2496 + 25000 300m 56368 18432 55120 -3 2496 + 40000 300m 56368 18432 55120 -3 2496 + 50000 300m 56368 18432 55120 -3 2496 + 100000 300m 56368 18432 55120 -3 2496 diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/port_config.ini b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/port_config.ini index 1596faa8af96..8cd1c833a929 100644 --- a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/port_config.ini +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/port_config.ini @@ -1,34 +1,34 @@ -# name lanes alias fec index speed -Ethernet0 1,2,3,4 QSFP1 rs 1 100000 -Ethernet4 5,6,7,8 QSFP2 rs 2 100000 -Ethernet8 9,10,11,12 QSFP3 rs 3 100000 -Ethernet12 13,14,15,16 QSFP4 rs 4 100000 -Ethernet16 17,18,19,20 QSFP5 rs 5 100000 -Ethernet20 21,22,23,24 QSFP6 rs 6 100000 -Ethernet24 25,26,27,28 QSFP7 rs 7 100000 -Ethernet28 29,30,31,32 QSFP8 rs 8 100000 -Ethernet32 33,34,35,36 QSFP9 rs 9 100000 -Ethernet36 37,38,39,40 QSFP10 rs 10 100000 -Ethernet40 41,42,43,44 QSFP11 rs 11 100000 -Ethernet44 45,46,47,48 QSFP12 rs 12 100000 -Ethernet48 49,50,51,52 QSFP13 rs 13 100000 -Ethernet52 53,54,55,56 QSFP14 rs 14 100000 -Ethernet56 57,58,59,60 QSFP15 rs 15 100000 -Ethernet60 61,62,63,64 QSFP16 rs 16 100000 -Ethernet64 65,66,67,68 QSFP17 rs 17 100000 -Ethernet68 69,70,71,72 QSFP18 rs 18 100000 -Ethernet72 73,74,75,76 QSFP19 rs 19 100000 -Ethernet76 77,78,79,80 QSFP20 rs 20 100000 -Ethernet80 81,82,83,84 QSFP21 rs 21 100000 -Ethernet84 85,86,87,88 QSFP22 rs 22 100000 -Ethernet88 89,90,91,92 QSFP23 rs 23 100000 -Ethernet92 93,94,95,96 QSFP24 rs 24 100000 -Ethernet96 97,98,99,100 QSFP25 rs 25 100000 -Ethernet100 101,102,103,104 QSFP26 rs 26 100000 -Ethernet104 105,106,107,108 QSFP27 rs 27 100000 -Ethernet108 109,110,111,112 QSFP28 rs 28 100000 -Ethernet112 113,114,115,116 QSFP29 rs 29 100000 -Ethernet116 117,118,119,120 QSFP30 rs 30 100000 -Ethernet120 121,122,123,124 QSFP31 rs 31 100000 -Ethernet124 125,126,127,128 QSFP32 rs 32 100000 -Ethernet128 129 SFP1 none 33 10000 +# name lanes alias index speed valid_speeds +Ethernet0 1,2,3,4 Eth1/1 1 100000 100000,40000 +Ethernet4 5,6,7,8 Eth2/1 2 100000 100000,40000 +Ethernet8 9,10,11,12 Eth3/1 3 100000 100000,40000 +Ethernet12 13,14,15,16 Eth4/1 4 100000 100000,40000 +Ethernet16 17,18,19,20 Eth5/1 5 100000 100000,40000 +Ethernet20 21,22,23,24 Eth6/1 6 100000 100000,40000 +Ethernet24 25,26,27,28 Eth7/1 7 100000 100000,40000 +Ethernet28 29,30,31,32 Eth8/1 8 100000 100000,40000 +Ethernet32 33,34,35,36 Eth9/1 9 100000 100000,40000 +Ethernet36 37,38,39,40 Eth10/1 10 100000 100000,40000 +Ethernet40 41,42,43,44 Eth11/1 11 100000 100000,40000 +Ethernet44 45,46,47,48 Eth12/1 12 100000 100000,40000 +Ethernet48 49,50,51,52 Eth13/1 13 100000 100000,40000 +Ethernet52 53,54,55,56 Eth14/1 14 100000 100000,40000 +Ethernet56 57,58,59,60 Eth15/1 15 100000 100000,40000 +Ethernet60 61,62,63,64 Eth16/1 16 100000 100000,40000 +Ethernet64 65,66,67,68 Eth17/1 17 100000 100000,40000 +Ethernet68 69,70,71,72 Eth18/1 18 100000 100000,40000 +Ethernet72 73,74,75,76 Eth19/1 19 100000 100000,40000 +Ethernet76 77,78,79,80 Eth20/1 20 100000 100000,40000 +Ethernet80 81,82,83,84 Eth21/1 21 100000 100000,40000 +Ethernet84 85,86,87,88 Eth22/1 22 100000 100000,40000 +Ethernet88 89,90,91,92 Eth23/1 23 100000 100000,40000 +Ethernet92 93,94,95,96 Eth24/1 24 100000 100000,40000 +Ethernet96 97,98,99,100 Eth25/1 25 100000 100000,40000 +Ethernet100 101,102,103,104 Eth26/1 26 100000 100000,40000 +Ethernet104 105,106,107,108 Eth27/1 27 100000 100000,40000 +Ethernet108 109,110,111,112 Eth28/1 28 100000 100000,40000 +Ethernet112 113,114,115,116 Eth29/1 29 100000 100000,40000 +Ethernet116 117,118,119,120 Eth30/1 30 100000 100000,40000 +Ethernet120 121,122,123,124 Eth31/1 31 100000 100000,40000 +Ethernet124 125,126,127,128 Eth32/1 32 100000 100000,40000 +Ethernet128 129 Eth33/1 33 10000 10000,1000 diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/qos.json.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/qos.json.j2 new file mode 100644 index 000000000000..3e548325ea30 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile deleted file mode 100644 index b57101d114f0..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile +++ /dev/null @@ -1,2 +0,0 @@ -SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G.config.bcm -SAI_NUM_ECMP_MEMBERS=64 diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile.j2 new file mode 100644 index 000000000000..0c9245de7cd2 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile.j2 @@ -0,0 +1,17 @@ +{# Get sai.profile based on vxlan_profile. Vxlan's config.bcm file is the default one #} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G-vxlan.config.bcm' -%} +{%- if DEVICE_METADATA is defined and DEVICE_METADATA['localhost'] is defined -%} +{%- if DEVICE_METADATA['localhost']['vxlan_profile'] is defined -%} +{%- set vxlan_profile = DEVICE_METADATA['localhost']['vxlan_profile'] -%} +{%- if 'enable' in vxlan_profile.lower() %} +{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G-vxlan.config.bcm' -%} +{%- else %} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G.config.bcm' -%} +{%- endif %} +{%- else %} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G-vxlan.config.bcm' -%} +{%- endif %} +{%- endif %} +{# Write the contents of sai_profile_filename to sai.profile file #} +{{ sai_profile_contents }} +SAI_NUM_ECMP_MEMBERS=64 diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G-vxlan.config.bcm b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G-vxlan.config.bcm new file mode 100644 index 000000000000..83c535a24b35 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G-vxlan.config.bcm @@ -0,0 +1,576 @@ +help_cli_enable=1 +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=0x1 +l2_mem_entries=32768 +l2xmsg_mode=1 +l3_max_ecmp_mode=1 +l3_mem_entries=16384 +lpm_scaling_enable=1 +max_vp_lags=0 +#mem_cache_enable=0 +memlist_enable=1 +reglist_enable=1 +#scache_filename=/tmp/scache +schan_intr_enable=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 +miim_intr_enable=0 +module_64ports=1 +oversubscribe_mode=1 +parity_enable=0 +serdes_lane_config_dfe=on +#serdes_fec_enable=1 +serdes_if_type_ce=14 +pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000 +pbmp_xport_xe=0x3ffffffffffffffffffffffffffffffffe +port_flex_enable=1 + +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 +bcm_tunnel_term_compatible_mode=1 +phy_an_c73=1 + +portmap_1=1:100 +portmap_5=5:100 +portmap_9=9:100 +portmap_13=13:100 +portmap_17=17:100 +portmap_21=21:100 +portmap_25=25:100 +portmap_29=29:100 +portmap_33=33:100 +portmap_37=37:100 +portmap_41=41:100 +portmap_45=45:100 +portmap_49=49:100 +portmap_53=53:100 +portmap_57=57:100 +portmap_61=61:100 +portmap_67=65:100 +portmap_71=69:100 +portmap_75=73:100 +portmap_79=77:100 +portmap_83=81:100 +portmap_87=85:100 +portmap_91=89:100 +portmap_95=93:100 +portmap_99=97:100 +portmap_103=101:100 +portmap_107=105:100 +portmap_111=109:100 +portmap_115=113:100 +portmap_119=117:100 +portmap_123=121:100 +portmap_127=125:100 +portmap_66=129:10:m +#portmap_130=128:10:m + +#wc0 lane swap +phy_chain_tx_lane_map_physical{1.0}=0x0132 +phy_chain_rx_lane_map_physical{1.0}=0x3210 + +#wc1 lane swap +phy_chain_tx_lane_map_physical{5.0}=0x2301 +phy_chain_rx_lane_map_physical{5.0}=0x2031 + +#wc2 lane swap +phy_chain_tx_lane_map_physical{9.0}=0x0132 +phy_chain_rx_lane_map_physical{9.0}=0x3210 + +#wc3 lane swap +phy_chain_tx_lane_map_physical{13.0}=0x3201 +phy_chain_rx_lane_map_physical{13.0}=0x2031 + +#wc4 lane swap +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x3210 + +#wc5 lane swap +phy_chain_tx_lane_map_physical{21.0}=0x2301 +phy_chain_rx_lane_map_physical{21.0}=0x2031 + +#wc6 lane swap +phy_chain_tx_lane_map_physical{25.0}=0x0123 +phy_chain_rx_lane_map_physical{25.0}=0x3210 + +#wc7 lane swap +phy_chain_tx_lane_map_physical{29.0}=0x3201 +phy_chain_rx_lane_map_physical{29.0}=0x2031 + +#wc8 lane swap +phy_chain_tx_lane_map_physical{33.0}=0x0213 +phy_chain_rx_lane_map_physical{33.0}=0x1302 + +#wc9 lane swap +phy_chain_tx_lane_map_physical{37.0}=0x1302 +phy_chain_rx_lane_map_physical{37.0}=0x2031 + +#wc10 lane swap +phy_chain_tx_lane_map_physical{41.0}=0x0231 +phy_chain_rx_lane_map_physical{41.0}=0x3120 + +#wc11 lane swap +phy_chain_tx_lane_map_physical{45.0}=0x1302 +phy_chain_rx_lane_map_physical{45.0}=0x2031 + +#wc12 lane swap +phy_chain_tx_lane_map_physical{49.0}=0x2103 +phy_chain_rx_lane_map_physical{49.0}=0x3120 + +#wc13 lane swap +phy_chain_tx_lane_map_physical{53.0}=0x2301 +phy_chain_rx_lane_map_physical{53.0}=0x2031 + +#wc14 lane swap +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x2301 + +#wc15 lane swap +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x1032 + +#wc16 lane swap +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x1023 + +#wc17 lane swap +phy_chain_tx_lane_map_physical{69.0}=0x0123 +phy_chain_rx_lane_map_physical{69.0}=0x1302 + +#wc18 lane swap +phy_chain_tx_lane_map_physical{73.0}=0x2301 +phy_chain_rx_lane_map_physical{73.0}=0x1032 + +#wc19 lane swap +phy_chain_tx_lane_map_physical{77.0}=0x2013 +phy_chain_rx_lane_map_physical{77.0}=0x3120 + +#wc20 lane swap +phy_chain_tx_lane_map_physical{81.0}=0x1302 +phy_chain_rx_lane_map_physical{81.0}=0x2031 + +#wc21 lane swap +phy_chain_tx_lane_map_physical{85.0}=0x0123 +phy_chain_rx_lane_map_physical{85.0}=0x2130 + +#wc22 lane swap +phy_chain_tx_lane_map_physical{89.0}=0x2301 +phy_chain_rx_lane_map_physical{89.0}=0x2031 + +#wc23 lane swap +phy_chain_tx_lane_map_physical{93.0}=0x0312 +phy_chain_rx_lane_map_physical{93.0}=0x2310 + +#wc24 lane swap +phy_chain_tx_lane_map_physical{97.0}=0x2301 +phy_chain_rx_lane_map_physical{97.0}=0x1032 + +#wc25 lane swap +phy_chain_tx_lane_map_physical{101.0}=0x0123 +phy_chain_rx_lane_map_physical{101.0}=0x3210 + +#wc26 lane swap +phy_chain_tx_lane_map_physical{105.0}=0x2301 +phy_chain_rx_lane_map_physical{105.0}=0x1032 + +#wc27 lane swap +phy_chain_tx_lane_map_physical{109.0}=0x0123 +phy_chain_rx_lane_map_physical{109.0}=0x3210 + +#wc28 lane swap +phy_chain_tx_lane_map_physical{113.0}=0x2301 +phy_chain_rx_lane_map_physical{113.0}=0x2031 + +#wc29 lane swap +phy_chain_tx_lane_map_physical{117.0}=0x0123 +phy_chain_rx_lane_map_physical{117.0}=0x3210 + +#wc30 lane swap +phy_chain_tx_lane_map_physical{121.0}=0x2301 +phy_chain_rx_lane_map_physical{121.0}=0x1032 + +#wc31 lane swap +phy_chain_tx_lane_map_physical{125.0}=0x0123 +phy_chain_rx_lane_map_physical{125.0}=0x3210 + +#MC lane swap +phy_chain_tx_lane_map_physical{129.0}=0x3210 +phy_chain_rx_lane_map_physical{129.0}=0x0231 + + +#wc0 P/N flip +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 + +#wc1 P/N flip +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 + +#wc2 P/N flip +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x1 + +#wc3 P/N flip +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 + +#wc4 P/N flip +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 + +#wc5 P/N flip +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 + +#wc6 P/N flip +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x1 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 + +#wc7 P/N flip +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 + +#wc8 P/N flip +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 + +#wc9 P/N flip +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x1 + +#wc10 P/N flip +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 + +#wc11 P/N flip +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 + +#wc12 P/N flip +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 + +#wc13 P/N flip +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x1 + +#wc14 P/N flip +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 + +#wc15 P/N flip +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 + +#wc16 P/N flip +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 + +#wc17 P/N flip +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 + +#wc18 P/N flip +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 + +#wc19 P/N flip +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 + +#wc20 P/N flip +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_tx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_tx_polarity_flip_physical{83.0}=0x1 +phy_chain_rx_polarity_flip_physical{83.0}=0x1 +phy_chain_tx_polarity_flip_physical{84.0}=0x1 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 + +#wc21 P/N flip +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 + +#wc22 P/N flip +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x1 + +#wc23 P/N flip +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x1 + +#wc24 P/N flip +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 + +#wc25 P/N flip +phy_chain_tx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 + +#wc26 P/N flip +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 + +#wc27 P/N flip +phy_chain_tx_polarity_flip_physical{109.0}=0x1 +phy_chain_rx_polarity_flip_physical{109.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 + +#wc28 P/N flip +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 + +#wc29 P/N flip +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 + +#wc30 P/N flip +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x1 + +#wc31 P/N flip +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_rx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x0 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +#MC P/N flip +phy_chain_tx_polarity_flip_physical{129.0}=0x1 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x1 + + +# configuration for 100G optical module +serdes_preemphasis_1=0x164608 +serdes_preemphasis_5=0x164608 +serdes_preemphasis_9=0x164608 +serdes_preemphasis_13=0x134908 +serdes_preemphasis_17=0x134908 +serdes_preemphasis_21=0x134908 +serdes_preemphasis_25=0x124a08 +serdes_preemphasis_29=0x124a08 +serdes_preemphasis_33=0x114b08 +serdes_preemphasis_37=0x114b08 +serdes_preemphasis_41=0x0f4d08 +serdes_preemphasis_45=0x0f4d08 +serdes_preemphasis_49=0x0d4f08 +serdes_preemphasis_53=0x0d4f08 +serdes_preemphasis_57=0x0d4f08 +serdes_preemphasis_61=0x0d4f08 +serdes_preemphasis_67=0x0d4f08 +serdes_preemphasis_71=0x0d4f08 +serdes_preemphasis_75=0x0d4f08 +serdes_preemphasis_79=0x0d4f08 +serdes_preemphasis_83=0x0d4f08 +serdes_preemphasis_87=0x0f4d08 +serdes_preemphasis_91=0x0f4d08 +serdes_preemphasis_95=0x0f4d08 +serdes_preemphasis_99=0x114b08 +serdes_preemphasis_103=0x114b08 +serdes_preemphasis_107=0x114b08 +serdes_preemphasis_111=0x124a08 +serdes_preemphasis_115=0x134908 +serdes_preemphasis_119=0x134908 +serdes_preemphasis_123=0x134908 +serdes_preemphasis_127=0x164608 + +#VxLAN +sai_tunnel_support=1 +use_all_splithorizon_groups=1 +bcm_tunnel_term_compatible_mode=1 +flow_init_mode=1 +l3_ecmp_levels=2 +riot_enable=1 +riot_overlay_l3_intf_mem_size=8192 +riot_overlay_l3_egress_mem_size=32768 +riot_overlay_ecmp_resilient_hash_size=16384 diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G.config.bcm b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G.config.bcm index d9d2f47750d9..7803fa422f1a 100644 --- a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G.config.bcm +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G.config.bcm @@ -1,4 +1,3 @@ -sai_load_hw_config=/etc/bcm/flex/bcm56870_a0_premium_issu/b870.6.4.1/ help_cli_enable=1 ifp_inports_support_enable=1 ipv6_lpm_128b_enable=0x1 @@ -8,8 +7,13 @@ l3_max_ecmp_mode=1 l3_mem_entries=16384 lpm_scaling_enable=1 max_vp_lags=0 -mem_cache_enable=0 +#mem_cache_enable=0 memlist_enable=1 +reglist_enable=1 +#scache_filename=/tmp/scache +schan_intr_enable=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 miim_intr_enable=0 module_64ports=1 oversubscribe_mode=1 @@ -18,47 +22,49 @@ serdes_lane_config_dfe=on #serdes_fec_enable=1 serdes_if_type_ce=14 pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000 -pbmp_xport_xe=0x888888888888888c2222222222222222 +pbmp_xport_xe=0x3ffffffffffffffffffffffffffffffffe +port_flex_enable=1 ptp_ts_pll_fref=50000000 ptp_bs_fref_0=50000000 ptp_bs_fref_1=50000000 - -portmap_1.0=1:100 -portmap_5.0=5:100 -portmap_9.0=9:100 -portmap_13.0=13:100 -portmap_17.0=17:100 -portmap_21.0=21:100 -portmap_25.0=25:100 -portmap_29.0=29:100 -portmap_33.0=33:100 -portmap_37.0=37:100 -portmap_41.0=41:100 -portmap_45.0=45:100 -portmap_49.0=49:100 -portmap_53.0=53:100 -portmap_57.0=57:100 -portmap_61.0=61:100 - -portmap_67.0=65:100 -portmap_71.0=69:100 -portmap_75.0=73:100 -portmap_79.0=77:100 -portmap_83.0=81:100 -portmap_87.0=85:100 -portmap_91.0=89:100 -portmap_95.0=93:100 -portmap_99.0=97:100 -portmap_103.0=101:100 -portmap_107.0=105:100 -portmap_111.0=109:100 -portmap_115.0=113:100 -portmap_119.0=117:100 -portmap_123.0=121:100 -portmap_127.0=125:100 -portmap_66.0=129:10:m -#portmap_130.0=128:10:m +bcm_tunnel_term_compatible_mode=1 +phy_an_c73=1 + +portmap_1=1:100 +portmap_5=5:100 +portmap_9=9:100 +portmap_13=13:100 +portmap_17=17:100 +portmap_21=21:100 +portmap_25=25:100 +portmap_29=29:100 +portmap_33=33:100 +portmap_37=37:100 +portmap_41=41:100 +portmap_45=45:100 +portmap_49=49:100 +portmap_53=53:100 +portmap_57=57:100 +portmap_61=61:100 +portmap_67=65:100 +portmap_71=69:100 +portmap_75=73:100 +portmap_79=77:100 +portmap_83=81:100 +portmap_87=85:100 +portmap_91=89:100 +portmap_95=93:100 +portmap_99=97:100 +portmap_103=101:100 +portmap_107=105:100 +portmap_111=109:100 +portmap_115=113:100 +portmap_119=117:100 +portmap_123=121:100 +portmap_127=125:100 +portmap_66=129:10:m +#portmap_130=128:10:m #wc0 lane swap phy_chain_tx_lane_map_physical{1.0}=0x0132 @@ -518,45 +524,11 @@ phy_chain_tx_polarity_flip_physical{129.0}=0x1 phy_chain_rx_polarity_flip_physical{129.0}=0x0 phy_chain_tx_polarity_flip_physical{130.0}=0x0 phy_chain_rx_polarity_flip_physical{130.0}=0x0 -phy_chain_tx_polarity_flip_physical{131.0}=0x0 -phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 phy_chain_tx_polarity_flip_physical{132.0}=0x0 -phy_chain_rx_polarity_flip_physical{132.0}=0x0 - -dport_map_port_1=1 -dport_map_port_5=2 -dport_map_port_9=3 -dport_map_port_13=4 -dport_map_port_17=5 -dport_map_port_21=6 -dport_map_port_25=7 -dport_map_port_29=8 -dport_map_port_33=9 -dport_map_port_37=10 -dport_map_port_41=11 -dport_map_port_45=12 -dport_map_port_49=13 -dport_map_port_53=14 -dport_map_port_57=15 -dport_map_port_61=16 -dport_map_port_67=17 -dport_map_port_71=18 -dport_map_port_75=19 -dport_map_port_79=20 -dport_map_port_83=21 -dport_map_port_87=22 -dport_map_port_91=23 -dport_map_port_95=24 -dport_map_port_99=25 -dport_map_port_103=26 -dport_map_port_107=27 -dport_map_port_111=28 -dport_map_port_115=29 -dport_map_port_119=30 -dport_map_port_123=31 -dport_map_port_127=32 -dport_map_port_66=33 -#dport_map_port_130=34 +phy_chain_rx_polarity_flip_physical{132.0}=0x1 + # configuration for 100G optical module serdes_preemphasis_1=0x164608 @@ -592,8 +564,3 @@ serdes_preemphasis_119=0x134908 serdes_preemphasis_123=0x134908 serdes_preemphasis_127=0x164608 -reglist_enable=1 -scache_filename=/tmp/scache -schan_intr_enable=0 -stable_size=0x5500000 -tdma_timeout_usec=3000000 diff --git a/device/celestica/x86_64-cel_seastone_2-r0/custom.bin b/device/celestica/x86_64-cel_seastone_2-r0/custom_led.bin similarity index 100% rename from device/celestica/x86_64-cel_seastone_2-r0/custom.bin rename to device/celestica/x86_64-cel_seastone_2-r0/custom_led.bin diff --git a/device/celestica/x86_64-cel_seastone_2-r0/installer.conf b/device/celestica/x86_64-cel_seastone_2-r0/installer.conf index 3222a45fe1d4..1d21376ff555 100644 --- a/device/celestica/x86_64-cel_seastone_2-r0/installer.conf +++ b/device/celestica/x86_64-cel_seastone_2-r0/installer.conf @@ -1,3 +1,4 @@ +CONSOLE_PORT=0xe060 CONSOLE_DEV=0 CONSOLE_SPEED=115200 -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="earlycon=uart8250,mmio,0xdf37b000" \ No newline at end of file +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off thermal.off=1 noirqdebug acpi_no_watchdog earlycon=uart8250,mmio,0xdf37b000" diff --git a/device/celestica/x86_64-cel_seastone_2-r0/led_proc_init.soc b/device/celestica/x86_64-cel_seastone_2-r0/led_proc_init.soc index b6b474bd53d6..90aa9ba607ac 100644 --- a/device/celestica/x86_64-cel_seastone_2-r0/led_proc_init.soc +++ b/device/celestica/x86_64-cel_seastone_2-r0/led_proc_init.soc @@ -1,5 +1,2 @@ -linkscan off -m0 load 0 0x3800 /usr/share/sonic/platform/custom.bin -sleep 10 +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin led auto on; led start -linkscan on diff --git a/device/celestica/x86_64-cel_seastone_2-r0/pcie.yaml b/device/celestica/x86_64-cel_seastone_2-r0/pcie.yaml new file mode 100644 index 000000000000..95e9b6954714 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/pcie.yaml @@ -0,0 +1,153 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '1980' + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev + 11)' +- bus: '00' + dev: '04' + fn: '0' + id: 19a1 + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers + (rev 11)' +- bus: '00' + dev: '05' + fn: '0' + id: 19a2 + name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 + Series Root Complex Event Collector (rev 11)' +- bus: '00' + dev: '06' + fn: '0' + id: 19a3 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT + Root Port (rev 11)' +- bus: '00' + dev: 09 + fn: '0' + id: 19a4 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #0 (rev 11)' +- bus: '00' + dev: '10' + fn: '0' + id: 19aa + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #6 (rev 11)' +- bus: '00' + dev: '11' + fn: '0' + id: 19ab + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #7 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 19ac + name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller + - Host (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 19c2 + name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller + 1 (rev 11)' +- bus: '00' + dev: '15' + fn: '0' + id: 19d0 + name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI + Controller (rev 11)' +- bus: '00' + dev: '16' + fn: '0' + id: 19d1 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #0 (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 19d3 + name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME + HECI 1 (rev 11)' +- bus: '00' + dev: 1a + fn: '0' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1a + fn: '1' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1a + fn: '2' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1c + fn: '0' + id: 19db + name: 'SD Host controller: Intel Corporation Device 19db (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 19dc + name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev + 11)' +- bus: '00' + dev: 1f + fn: '2' + id: 19de + name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management + Controller (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 19df + name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev + 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 19e0 + name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series + SPI Controller (rev 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 19e2 + name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology + (rev 11)' +- bus: '02' + dev: '00' + fn: '0' + id: b870 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b870 (rev 01)' +- bus: '03' + dev: '00' + fn: '0' + id: '7021' + name: 'Memory controller: Xilinx Corporation Device 7021' +- bus: '04' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '05' + dev: '00' + fn: '0' + id: 15c2 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: '05' + dev: '00' + fn: '1' + id: 15c2 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' diff --git a/device/celestica/x86_64-cel_seastone_2-r0/platform.json b/device/celestica/x86_64-cel_seastone_2-r0/platform.json new file mode 100644 index 000000000000..9d2b5841f179 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/platform.json @@ -0,0 +1,235 @@ +{ + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x100G": ["Eth1/1"] + } + }, + "Ethernet4": { + "index": "2,2,2,2", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x100G": ["Eth2/1"] + } + }, + "Ethernet8": { + "index": "3,3,3,3", + "lanes": "9,10,11,12", + "breakout_modes": { + "1x100G": ["Eth3/1"] + } + }, + "Ethernet12": { + "index": "4,4,4,4", + "lanes": "13,14,15,16", + "breakout_modes": { + "1x100G": ["Eth4/1"] + } + }, + "Ethernet16": { + "index": "5,5,5,5", + "lanes": "17,18,19,20", + "breakout_modes": { + "1x100G": ["Eth5/1"] + } + }, + "Ethernet20": { + "index": "6,6,6,6", + "lanes": "21,22,23,24", + "breakout_modes": { + "1x100G": ["Eth6/1"] + } + }, + "Ethernet24": { + "index": "7,7,7,7", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x100G": ["Eth7/1"] + } + }, + "Ethernet28": { + "index": "8,8,8,8", + "lanes": "29,30,31,32", + "breakout_modes": { + "1x100G": ["Eth8/1"] + } + }, + "Ethernet32": { + "index": "9,9,9,9", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G": ["Eth9/1"] + } + }, + "Ethernet36": { + "index": "10,10,10,10", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x100G": ["Eth10/1"] + } + }, + "Ethernet40": { + "index": "11,11,11,11", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G": ["Eth11/1"] + } + }, + "Ethernet44": { + "index": "12,12,12,12", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G": ["Eth12/1"] + } + }, + "Ethernet48": { + "index": "13,13,13,13", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x100G": ["Eth13/1"] + } + }, + "Ethernet52": { + "index": "14,14,14,14", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x100G": ["Eth14/1"] + } + }, + "Ethernet56": { + "index": "15,15,15,15", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x100G": ["Eth15/1"] + } + }, + "Ethernet60": { + "index": "16,16,16,16", + "lanes": "61,62,63,64", + "breakout_modes": { + "1x100G": ["Eth16/1"] + } + }, + "Ethernet64": { + "index": "17,17,17,17", + "lanes": "65,66,67,68", + "breakout_modes": { + "1x100G": ["Eth17/1"] + } + }, + "Ethernet68": { + "index": "18,18,18,18", + "lanes": "69,70,71,72", + "breakout_modes": { + "1x100G": ["Eth18/1"] + } + }, + "Ethernet72": { + "index": "19,19,19,19", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x100G": ["Eth19/1"] + } + }, + "Ethernet76": { + "index": "20,20,20,20", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x100G": ["Eth20/1"] + } + }, + "Ethernet80": { + "index": "21,21,21,21", + "lanes": "81,82,83,84", + "breakout_modes": { + "1x100G": ["Eth21/1"] + } + }, + "Ethernet84": { + "index": "22,22,22,22", + "lanes": "85,86,87,88", + "breakout_modes": { + "1x100G": ["Eth22/1"] + } + }, + "Ethernet88": { + "index": "23,23,23,23", + "lanes": "89,90,91,92", + "breakout_modes": { + "1x100G": ["Eth23/1"] + } + }, + "Ethernet92": { + "index": "24,24,24,24", + "lanes": "93,94,95,96", + "breakout_modes": { + "1x100G": ["Eth24/1"] + } + }, + "Ethernet96": { + "index": "25,25,25,25", + "lanes": "97,98,99,100", + "breakout_modes": { + "1x100G": ["Eth25/1"] + } + }, + "Ethernet100": { + "index": "26,26,26,26", + "lanes": "101,102,103,104", + "breakout_modes": { + "1x100G": ["Eth26/1"] + } + }, + "Ethernet104": { + "index": "27,27,27,27", + "lanes": "105,106,107,108", + "breakout_modes": { + "1x100G": ["Eth27/1"] + } + }, + "Ethernet108": { + "index": "28,28,28,28", + "lanes": "109,110,111,112", + "breakout_modes": { + "1x100G": ["Eth28/1"] + } + }, + "Ethernet112": { + "index": "29,29,29,29", + "lanes": "113,114,115,116", + "breakout_modes": { + "1x100G": ["Eth29/1"] + } + }, + "Ethernet116": { + "index": "30,30,30,30", + "lanes": "117,118,119,120", + "breakout_modes": { + "1x100G": ["Eth30/1"] + } + }, + "Ethernet120": { + "index": "31,31,31,31", + "lanes": "121,122,123,124", + "breakout_modes": { + "1x100G": ["Eth31/1"] + } + }, + "Ethernet124": { + "index": "32,32,32,32", + "lanes": "125,126,127,128", + "breakout_modes": { + "1x100G": ["Eth32/1"] + } + }, + "Ethernet128": { + "index": "33", + "lanes": "129", + "breakout_modes": { + "1x10G": ["Eth33/1"] + } + } + } +} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/platform_components.json b/device/celestica/x86_64-cel_seastone_2-r0/platform_components.json new file mode 100644 index 000000000000..7daf37202c76 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/platform_components.json @@ -0,0 +1,17 @@ +{ + "chassis": { + "Seastone_2": { + "component": { + "BIOS": {}, + "ONIE": {}, + "BMC": {}, + "FPGA": {}, + "CPLD COMe": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/platform_reboot b/device/celestica/x86_64-cel_seastone_2-r0/platform_reboot new file mode 100755 index 000000000000..be80ddbdd1a2 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/platform_reboot @@ -0,0 +1,6 @@ +#!/bin/bash + +# Set all LEDs to BMC's control +ipmitool raw 0x3a 0x0f 0x02 0x01 &> /dev/null + +/usr/local/bin/seastone2_platform_shutdown.sh system diff --git a/device/celestica/x86_64-cel_seastone_2-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_seastone_2-r0/pmon_daemon_control.json index 5e59513ef696..f5b2736b13e0 100644 --- a/device/celestica/x86_64-cel_seastone_2-r0/pmon_daemon_control.json +++ b/device/celestica/x86_64-cel_seastone_2-r0/pmon_daemon_control.json @@ -1,7 +1,5 @@ { "skip_ledd": true, - "skip_xcvrd": false, - "skip_psud": false, - "skip_syseepromd": false, - "skip_fancontrol": true -} \ No newline at end of file + "skip_fancontrol": true, + "skip_xcvrd_cmis_mgr": true +} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/chassis.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/chassis.json deleted file mode 100644 index dfa1a1bddff8..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/chassis.json +++ /dev/null @@ -1,45 +0,0 @@ -{ - "eeprom": "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom", - "get_reboot_cause": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x3a 0x0c 0x0 0x2 0x06", - "output_translator": { - "00": "Hardware - Other", - "11": "Hardware - Other", - "22": "Non-Hardware", - "33": "Hardware - Other", - "44": "Non-Hardware", - "55": "Non-Hardware", - "77": "Watchdog", - "88": "Thermal Overload: CPU", - "99": "Thermal Overload: ASIC" - } - }, - "get_reboot_description": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x3a 0x0c 0x0 0x2 0x06", - "output_translator": { - "00": "The last reset is power cycle reset (set register 0xA164)", - "11": "The last reset is Power on reset", - "22": "The last reset is soft-set CPU warm reset", - "33": "The last reset is soft-set CPU cold reset", - "44": "The last reset is CPU warm reset", - "55": "The last reset is CPU cold reset", - "77": "The last reset is watchdog reset", - "88": "The last reset is CPU thermal overload", - "99": "The last reset is ASIC thermal overload" - } - }, - "get_watchdog": { - "output_source": "class", - "host_path": "/usr/share/sonic/device/x86_64-cel_seastone_2-r0/sonic_platform_config/watchdog.py", - "pmon_path": "/usr/share/sonic/platform/sonic_platform_config/watchdog.py", - "class": "Watchdog" - }, - "get_change_event": { - "output_source": "class", - "host_path": "/usr/share/sonic/device/x86_64-cel_seastone_2-r0/sonic_platform_config/event.py", - "pmon_path": "/usr/share/sonic/platform/sonic_platform_config/event.py", - "class": "SfpEvent" - } -} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/component.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/component.json deleted file mode 100644 index 96f646206f97..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/component.json +++ /dev/null @@ -1,62 +0,0 @@ -{ - "component_num": 5, - "get_name": { - "output_source": "value_list", - "value_list": [ - "BIOS", - "CPLD_BASEBOARD", - "CPLD_SWITCHBOARD", - "FPGA", - "BMC" - ] - }, - "get_description": { - "output_source": "value_list", - "value_list": [ - "Used to perform hardware initialization during the booting process", - "Used to control the system power & reset, Control FAN, UART Mux etc", - "Used for managing QSFP ports", - "Used for managing I2C, SPI, PCIe etc", - "Used for monitoring and managing whole system" - ] - }, - "get_firmware_version": { - "output_source": "function", - "function": [ - "_get_bios_ver", - "_get_base_cpld_ver", - "_get_sw_cpld_ver", - "_get_fpga_ver", - "_get_bmc_ver" - ] - }, - "_get_bmc_ver": { - "output_source": "ipmitool", - "command": "ipmitool mc info | grep 'Firmware Revision'", - "output_translator": "'{}'.split(':')[-1].strip()" - }, - "_get_bios_ver": { - "output_source": "txt_file", - "path": "/sys/class/dmi/id/bios_version" - }, - "_get_base_cpld_ver": { - "output_source": "hex_version_file", - "num_of_points": 1, - "num_of_bits": 8, - "path": "/sys/devices/platform/baseboard/version" - }, - "_get_sw_cpld_ver": { - "output_source": "hex_version_getreg", - "num_of_points": 1, - "num_of_bits": 8, - "reg_addr": "0x00", - "path": "/sys/devices/platform/switchboard/CPLD1/getreg" - }, - "_get_fpga_ver": { - "output_source": "hex_version_getreg", - "num_of_points": 1, - "num_of_bits": 32, - "reg_addr": "0x00", - "path": "/sys/devices/platform/switchboard/FPGA/getreg" - } -} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/event.py b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/event.py deleted file mode 100644 index 32073479a1e6..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/event.py +++ /dev/null @@ -1,117 +0,0 @@ -############################################################################# -# Celestica Seastone2 -# -# SfpEvent contains an implementation of SONiC Platform Base API -# -############################################################################# -try: - import time - import os - from sonic_platform.common import Common -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - - -PLATFORM_PATH = "/sys/devices/platform/" -SWITCH_BRD_PLATFORM = "switchboard" -POLL_INTERVAL = 1 - - -class SfpEvent: - ''' Listen to insert/remove sfp events ''' - - PORT_INFO_DIR = 'SFF' - PATH_INT_SYSFS = "{0}/{port_name}/{type_prefix}_isr_flags" - PATH_INTMASK_SYSFS = "{0}/{port_name}/{type_prefix}_isr_mask" - PATH_PRS_SYSFS = "{0}/{port_name}/{prs_file_name}" - PRESENT_EN = 0x01 - - def __init__(self, sfp_list): - self.num_sfp = len(sfp_list) - self._api_common = Common() - self._initialize_interrupts() - - def _initialize_interrupts(self): - sfp_info_obj = {} - port_info_path = os.path.join( - PLATFORM_PATH, SWITCH_BRD_PLATFORM, self.PORT_INFO_DIR) - - for index in range(self.num_sfp): - port_num = index + 1 - if port_num <= 32: - port_name = "QSFP{}".format(port_num) - port_type = "qsfp" - sysfs_prs_file = "{}_modprs".format(port_type) - else: - port_name = "SFP{}".format(port_num - 32) - port_type = "sfp" - sysfs_prs_file = "{}_modabs".format(port_type) - - sfp_info_obj[index] = {} - sfp_info_obj[index]['intmask_sysfs'] = self.PATH_INTMASK_SYSFS.format( - port_info_path, - port_name=port_name, - type_prefix=port_type) - - sfp_info_obj[index]['int_sysfs'] = self.PATH_INT_SYSFS.format( - port_info_path, - port_name=port_name, - type_prefix=port_type) - - sfp_info_obj[index]['prs_sysfs'] = self.PATH_PRS_SYSFS.format( - port_info_path, - port_name=port_name, - prs_file_name=sysfs_prs_file) - - self._api_common.write_txt_file( - sfp_info_obj[index]["intmask_sysfs"], hex(self.PRESENT_EN)) - - self.sfp_info_obj = sfp_info_obj - - def _is_port_device_present(self, port_idx): - prs_path = self.sfp_info_obj[port_idx]["prs_sysfs"] - is_present = 1 - int(self._api_common.read_txt_file(prs_path)) - return is_present - - def _update_port_event_object(self, interrup_devices, port_dict): - for port_idx in interrup_devices: - device_id = str(port_idx + 1) - port_dict[device_id] = str(self._is_port_device_present(port_idx)) - return port_dict - - def _clear_event_flag(self, path): - self._api_common.write_txt_file(path, hex(0xff)) - time.sleep(0.1) - self._api_common.write_txt_file(path, hex(0x0)) - - def _check_all_port_interrupt_event(self): - interrupt_devices = {} - for i in range(self.num_sfp): - int_sysfs = self.sfp_info_obj[i]["int_sysfs"] - interrupt_flags = self._api_common.read_txt_file(int_sysfs) - if interrupt_flags != '0x00': - interrupt_devices[i] = 1 - self._clear_event_flag(int_sysfs) - return interrupt_devices - - def get_event(self, timeout): - sleep_time = min( - timeout, POLL_INTERVAL) if timeout != 0 else POLL_INTERVAL - start_milli_time = int(round(time.time() * 1000)) - int_sfp = {} - - while True: - chk_sfp = self._check_all_port_interrupt_event() - int_sfp = self._update_port_event_object( - chk_sfp, int_sfp) if chk_sfp else int_sfp - current_milli_time = int(round(time.time() * 1000)) - if (int_sfp) or \ - (timeout != 0 and current_milli_time - start_milli_time > timeout): - break - - time.sleep(sleep_time) - - change_dict = dict() - change_dict['sfp'] = int_sfp - - return True, change_dict diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/fan.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/fan.json deleted file mode 100644 index 724f6edf53c1..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/fan.json +++ /dev/null @@ -1,200 +0,0 @@ -{ - "fan_num_per_drawer": 2, - "drawer_num": 4, - "get_name": { - "output_source": "value_list", - "value_list": [ - "Fan1-F", - "Fan1-R", - "Fan2-F", - "Fan2-R", - "Fan3-F", - "Fan3-R", - "Fan4-F", - "Fan4-R" - ] - }, - "get_presence": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x3a 0x03 0x03 {}", - "argument": [ - "0x00", - "0x00", - "0x01", - "0x01", - "0x02", - "0x02", - "0x03", - "0x03" - ], - "output_translator": "True if '00' in '{}' else False" - }, - "get_model": { - "output_source": "ipmitool", - "command": "ipmitool fru list {} | grep 'Board Part Number'", - "argument": [ - "5", - "5", - "6", - "6", - "7", - "7", - "8", - "8" - ], - "output_translator": "'{}'.split()[-1]" - }, - "get_serial": { - "output_source": "ipmitool", - "command": "ipmitool fru list {} | grep 'Board Serial'", - "argument": [ - "5", - "5", - "6", - "6", - "7", - "7", - "8", - "8" - ], - "output_translator": "'{}'.split()[-1]" - }, - "get_direction": { - "output_source": "ipmitool", - "command": "ipmitool fru list {} | grep 'F2B\\|B2F'", - "argument": [ - "5", - "5", - "6", - "6", - "7", - "7", - "8", - "8" - ], - "output_translator": "'intake' if 'B2F' in '{}' else 'exhaust'" - }, - "get_speed": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x04 0x2d {}", - "argument": [ - "0x81", - "0x80", - "0x83", - "0x82", - "0x85", - "0x84", - "0x87", - "0x86" - ], - "output_translator": "int('{}'.split()[0],16)*150", - "max_front": 23000, - "max_rear": 20500 - }, - "get_target_speed": { - "output_source": "value", - "value": "N/A" - }, - "get_speed_tolerance": { - "output_source": "value", - "value": 10 - }, - "set_speed": { - "set_method": "ipmitool", - "input_translator": "hex(int({} * 255 / 100.0))", - "command": "ipmitool raw 0x3a 0x0c 0x00 0x03 {}", - "argument": [ - "0x40 {}", - "0x40 {}", - "0x44 {}", - "0x44 {}", - "0x4c {}", - "0x4c {}", - "0x50 {}", - "0x50 {}" - ] - }, - "set_status_led": { - "set_method": "ipmitool", - "avaliable_input": [ - "off", - "amber", - "green" - ], - "input_translator": { - "off": "0x0", - "amber": "0x1", - "green": "0x2" - }, - "command": "ipmitool raw 0x3a 0x0a {}", - "argument": [ - "0x4 {}", - "0x4 {}", - "0x5 {}", - "0x5 {}", - "0x6 {}", - "0x6 {}", - "0x7 {}", - "0x7 {}" - ] - }, - "get_status_led": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x3a 0x0b {}", - "argument": [ - "0x4", - "0x4", - "0x5", - "0x5", - "0x6", - "0x6", - "0x7", - "0x7" - ], - "output_translator": { - "00": "off", - "01": "amber", - "02": "green" - } - }, - "psu_fan": [ - { - "num_of_fan": 1, - "get_name": { - "output_source": "value_list", - "value_list": [ - "PSU-R-Fan" - ] - }, - "get_speed": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x04 0x2d {}", - "argument": [ - "0x8b" - ], - "output_translator": "int('{}'.split()[0],16)*100", - "max_front": 22600, - "max_rear": 22600 - } - }, - { - "num_of_fan": 1, - "get_name": { - "output_source": "value_list", - "value_list": [ - "PSU-L-Fan" - ] - }, - "get_speed": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x04 0x2d {}", - "argument": [ - "0x8a" - ], - "output_translator": "int('{}'.split()[0],16)*100", - "max_front": 22600, - "max_rear": 22600 - } - } - ] -} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/psu.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/psu.json deleted file mode 100644 index c3e953c082a7..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/psu.json +++ /dev/null @@ -1,135 +0,0 @@ -{ - "psu_num": 2, - "fan_per_psu_num": 1, - "get_name": { - "output_source": "value_list", - "value_list": [ - "PSU-R", - "PSU-L" - ] - }, - "get_power": { - "output_source": "ipmitool", - "command": "ipmitool sdr | grep {}", - "argument": [ - "PSUR_POut", - "PSUL_POut" - ], - "output_translator": "float('{}'.split()[2])" - }, - "get_current": { - "output_source": "ipmitool", - "command": "ipmitool sdr | grep {}", - "argument": [ - "PSUR_COut", - "PSUL_COut" - ], - "output_translator": "float('{}'.split()[2])" - }, - "get_voltage": { - "output_source": "ipmitool", - "command": "ipmitool sdr | grep {}", - "argument": [ - "PSUR_VOut", - "PSUL_VOut" - ], - "output_translator": "float('{}'.split()[2])" - }, - "get_voltage_high_threshold": { - "output_source": "ipmitool", - "command": "ipmitool sensor list | grep {}", - "argument": [ - "PSUR_Temp2", - "PSUL_Temp2" - ], - "output_translator": "float(0 if '{0}'.split()[-3]=='na' else '{0}'.split()[-3])" - }, - "get_voltage_low_threshold": { - "output_source": "ipmitool", - "command": "ipmitool sensor list | grep {}", - "argument": [ - "PSUR_Temp2", - "PSUL_Temp2" - ], - "output_translator": "float(0 if '{0}'.split()[-9]=='na' else '{0}'.split()[-9])" - }, - "get_presence": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x3a 0x0c 0x00 0x2 0x60", - "output_translator": [ - "True if (int('{}', 16) >> 4 & 1) == 0 else False", - "True if (int('{}', 16) >> 5 & 1) == 0 else False" - ] - }, - "get_model": { - "output_source": "ipmitool", - "command": "ipmitool fru list {} | grep 'Product Part Number'", - "argument": [ - "4", - "3" - ], - "output_translator": "'{}'.split()[-1]" - }, - "get_serial": { - "output_source": "ipmitool", - "command": "ipmitool fru list {} | grep 'Product Serial'", - "argument": [ - "4", - "3" - ], - "output_translator": "'{}'.split()[-1]" - }, - "get_powergood_status": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x3a 0x0c 0x0 0x2 0x60", - "output_translator": [ - "True if (int('{}', 16) >> 2 & 1) == 1 else False", - "True if (int('{}', 16) >> 3 & 1) == 1 else False" - ] - }, - "set_status_led": { - "set_method": "ipmitool", - "avaliable_input": [ - "amber" - ], - "input_translator": { - "amber": "0x1" - }, - "command": "ipmitool raw 0x3a 0x0a {}", - "argument": [ - "0x3 {}", - "0x2 {}" - ] - }, - "get_status_led": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x3a 0x0b {}", - "argument": [ - "0x3", - "0x2" - ], - "output_translator": { - "00": "green", - "01": "amber" - }, - "default_output": "off" - }, - "get_temperature": { - "output_source": "ipmitool", - "command": "ipmitool sdr | grep {}", - "argument": [ - "PSUR_Temp2", - "PSUL_Temp2" - ], - "output_translator": "float('{}'.split()[2])" - }, - "get_temperature_high_threshold": { - "output_source": "ipmitool", - "command": "ipmitool sensor list | grep {}", - "argument": [ - "PSUR_Temp2", - "PSUL_Temp2" - ], - "output_translator": "float(0 if '{0}'.split()[-3]=='na' else '{0}'.split()[-3])" - } -} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/sfp.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/sfp.json deleted file mode 100644 index d12f0c3ffc1b..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/sfp.json +++ /dev/null @@ -1,143 +0,0 @@ -{ - "port_num": 33, - "eeprom_path": "/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom", - "port_i2c_mapping": [ - 2, - 3, - 4, - 5, - 6, - 7, - 8, - 9, - 10, - 11, - 12, - 13, - 14, - 15, - 16, - 17, - 18, - 19, - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27, - 28, - 29, - 30, - 31, - 32, - 33, - 34 - ], - "get_presence": { - "output_source": "sysfs_value", - "sysfs_path": "/sys/devices/platform/switchboard/SFF/{}", - "argument": "$ref:_presence_file", - "output_translator": "False if '{}' == '1' else True" - }, - "get_lpmode": { - "output_source": "sysfs_value", - "sysfs_path": "/sys/devices/platform/switchboard/SFF/{}/qsfp_lpmode", - "argument": "$ref:_port_name", - "output_translator": "True if '{}' == '1' else False" - }, - "get_reset_status": { - "output_source": "sysfs_value", - "sysfs_path": "/sys/devices/platform/switchboard/SFF/{}/qsfp_reset", - "argument": "$ref:_port_name", - "output_translator": "False if '{}' == '1' else True" - }, - "reset": { - "set_method": "sysfs_value", - "write_offset": 0, - "sysfs_path": "/sys/devices/platform/switchboard/SFF/{}/qsfp_reset", - "argument": "$ref:_port_name" - }, - "set_lpmode": { - "set_method": "sysfs_value", - "input_translator": { - "True": "0x1", - "False": "0x0" - }, - "write_offset": 0, - "sysfs_path": "/sys/devices/platform/switchboard/SFF/{}/qsfp_lpmode", - "argument": "$ref:_port_name" - }, - "_port_name": [ - "QSFP1", - "QSFP2", - "QSFP3", - "QSFP4", - "QSFP5", - "QSFP6", - "QSFP7", - "QSFP8", - "QSFP9", - "QSFP10", - "QSFP11", - "QSFP12", - "QSFP13", - "QSFP14", - "QSFP15", - "QSFP16", - "QSFP17", - "QSFP18", - "QSFP19", - "QSFP20", - "QSFP21", - "QSFP22", - "QSFP23", - "QSFP24", - "QSFP25", - "QSFP26", - "QSFP27", - "QSFP28", - "QSFP29", - "QSFP30", - "QSFP31", - "QSFP32", - "SFP1" - ], - "_presence_file": [ - "QSFP1/qsfp_modprs", - "QSFP2/qsfp_modprs", - "QSFP3/qsfp_modprs", - "QSFP4/qsfp_modprs", - "QSFP5/qsfp_modprs", - "QSFP6/qsfp_modprs", - "QSFP7/qsfp_modprs", - "QSFP8/qsfp_modprs", - "QSFP9/qsfp_modprs", - "QSFP10/qsfp_modprs", - "QSFP11/qsfp_modprs", - "QSFP12/qsfp_modprs", - "QSFP13/qsfp_modprs", - "QSFP14/qsfp_modprs", - "QSFP15/qsfp_modprs", - "QSFP16/qsfp_modprs", - "QSFP17/qsfp_modprs", - "QSFP18/qsfp_modprs", - "QSFP19/qsfp_modprs", - "QSFP20/qsfp_modprs", - "QSFP21/qsfp_modprs", - "QSFP22/qsfp_modprs", - "QSFP23/qsfp_modprs", - "QSFP24/qsfp_modprs", - "QSFP25/qsfp_modprs", - "QSFP26/qsfp_modprs", - "QSFP27/qsfp_modprs", - "QSFP28/qsfp_modprs", - "QSFP29/qsfp_modprs", - "QSFP30/qsfp_modprs", - "QSFP31/qsfp_modprs", - "QSFP32/qsfp_modprs", - "SFP1/sfp_modabs" - ] -} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/thermal.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/thermal.json deleted file mode 100644 index e3dcb7fb9271..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/thermal.json +++ /dev/null @@ -1,105 +0,0 @@ -{ - "thermal_num": 9, - "get_name": { - "output_source": "value_list", - "value_list": [ - "Base_Temp_U5", - "Base_Temp_U7", - "CPU_Temp", - "Switch_Temp_U1", - "Switch_Temp_U18", - "Switch_Temp_U28", - "Switch_Temp_U29", - "Switch_U21_Temp", - "Switch_U33_Temp" - ] - }, - "get_temperature": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x04 0x2D {}", - "argument": [ - "0x1", - "0x2", - "0x7", - "0x3", - "0x4", - "0x5", - "0x6", - "0x56", - "0x4C" - ], - "output_translator": "int('{}'.split()[0],16)" - }, - "get_high_threshold": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x04 0x27 {}", - "argument": [ - "0x1", - "0x2", - "0x7", - "0x3", - "0x4", - "0x5", - "0x6", - "0x56", - "0x4c" - ], - "output_translator": "int('{}'.split()[4], 16)" - }, - "get_low_threshold": { - "output_source": "value", - "value": "N/A" - }, - "set_high_threshold": { - "set_method": "ipmitool", - "command": "ipmitool sensor thresh {}", - "input_translator": "{}", - "argument": [ - "Base_Temp_U5 unc {}", - "Base_Temp_U7 unc {}", - "CPU_Temp unc {}", - "Switch_Temp_U1 unc {}", - "Switch_Temp_U18 unc {}", - "Switch_Temp_U28 unc {}", - "Switch_Temp_U29 unc {}", - "Switch_U21_Temp unc {}", - "Switch_U33_Temp unc {}" - ] - }, - "set_low_threshold": { - "output_source": "ipmitool", - "command": "ipmitool sensor thresh {}", - "input_translator": "{}", - "argument": [ - "Base_Temp_U5 lnc {}", - "Base_Temp_U7 lnc {}", - "CPU_Temp lnc {}", - "Switch_Temp_U1 lnc {}", - "Switch_Temp_U18 lnc {}", - "Switch_Temp_U28 lnc {}", - "Switch_Temp_U29 lnc {}", - "Switch_U21_Temp lnc {}", - "Switch_U33_Temp lnc {}" - ] - }, - "get_high_critical_threshold": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x04 0x27 {}", - "argument": [ - "0x1", - "0x2", - "0x7", - "0x3", - "0x4", - "0x5", - "0x6", - "0x56", - "0x4c" - ], - "output_translator": "int('{}'.split()[5], 16)" - }, - "get_low_critical_threshold": { - "output_source": "value", - "value": "N/A" - } -} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/watchdog.py b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/watchdog.py deleted file mode 100644 index fac5c40e134f..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/watchdog.py +++ /dev/null @@ -1,191 +0,0 @@ -############################################################################# -# Celestica Seastone2 -# -# Watchdog contains an implementation of SONiC Platform Base API -# -############################################################################# -import os -import time - -try: - from sonic_platform_base.watchdog_base import WatchdogBase - from sonic_platform.common import Common -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - -PLATFORM_CPLD_PATH = '/sys/devices/platform/baseboard/' -GETREG_FILE = 'getreg' -SETREG_FILE = 'setreg' -WDT_ENABLE_REG = '0xA181' -WDT_TIMER_L_BIT_REG = '0xA182' -WDT_TIMER_M_BIT_REG = '0xA183' -WDT_TIMER_H_BIT_REG = '0xA184' -WDT_KEEP_ALVIVE_REG = '0xA185' -ENABLE_CMD = '0x1' -DISABLE_CMD = '0x0' -WDT_COMMON_ERROR = -1 - - -class Watchdog(WatchdogBase): - - def __init__(self): - WatchdogBase.__init__(self) - - self._api_common = Common() - - # Init cpld reg path - self.setreg_path = os.path.join(PLATFORM_CPLD_PATH, SETREG_FILE) - self.getreg_path = os.path.join(PLATFORM_CPLD_PATH, GETREG_FILE) - - # Set default value - self._disable() - self.armed = False - self.timeout = self._gettimeout() - - def _enable(self): - """ - Turn on the watchdog timer - """ - # echo 0xA181 0x1 > /sys/devices/platform/baseboard/setreg - enable_val = '{} {}'.format(WDT_ENABLE_REG, ENABLE_CMD) - return self._api_common.write_txt_file(self.setreg_path, enable_val) - - def _disable(self): - """ - Turn off the watchdog timer - """ - # echo 0xA181 0x0 > /sys/devices/platform/baseboard/setreg - disable_val = '{} {}'.format(WDT_ENABLE_REG, DISABLE_CMD) - return self._api_common.write_txt_file(self.setreg_path, disable_val) - - def _keepalive(self): - """ - Keep alive watchdog timer - """ - # echo 0xA185 0x1 > /sys/devices/platform/baseboard/setreg - enable_val = '{} {}'.format(WDT_KEEP_ALVIVE_REG, ENABLE_CMD) - return self._api_common.write_txt_file(self.setreg_path, enable_val) - - def _get_level_hex(self, sub_hex): - sub_hex_str = sub_hex.replace("x", "0") - return hex(int(sub_hex_str, 16)) - - def _seconds_to_lmh_hex(self, seconds): - ms = seconds*1000 # calculate timeout in ms format - hex_str = hex(ms) - l = self._get_level_hex(hex_str[-2:]) - m = self._get_level_hex(hex_str[-4:-2]) - h = self._get_level_hex(hex_str[-6:-4]) - return (l, m, h) - - def _settimeout(self, seconds): - """ - Set watchdog timer timeout - @param seconds - timeout in seconds - @return is the actual set timeout - """ - # max = 0xffffff = 16777.215 seconds - - (l, m, h) = self._seconds_to_lmh_hex(seconds) - set_h_val = '{} {}'.format(WDT_TIMER_H_BIT_REG, h) - set_m_val = '{} {}'.format(WDT_TIMER_M_BIT_REG, m) - set_l_val = '{} {}'.format(WDT_TIMER_L_BIT_REG, l) - - self._api_common.write_txt_file( - self.setreg_path, set_h_val) # set high bit - self._api_common.write_txt_file( - self.setreg_path, set_m_val) # set med bit - self._api_common.write_txt_file( - self.setreg_path, set_l_val) # set low bit - - return seconds - - def _gettimeout(self): - """ - Get watchdog timeout - @return watchdog timeout - """ - - h_bit = self._api_common.get_reg( - self.getreg_path, WDT_TIMER_H_BIT_REG) - m_bit = self._api_common.get_reg( - self.getreg_path, WDT_TIMER_M_BIT_REG) - l_bit = self._api_common.get_reg( - self.getreg_path, WDT_TIMER_L_BIT_REG) - - hex_time = '0x{}{}{}'.format(h_bit[2:], m_bit[2:], l_bit[2:]) - ms = int(hex_time, 16) - return int(float(ms)/1000) - - ################################################################# - - def arm(self, seconds): - """ - Arm the hardware watchdog with a timeout of seconds. - If the watchdog is currently armed, calling this function will - simply reset the timer to the provided value. If the underlying - hardware does not support the value provided in , this - method should arm the watchdog with the *next greater* available - value. - Returns: - An integer specifying the *actual* number of seconds the watchdog - was armed with. On failure returns -1. - """ - - ret = WDT_COMMON_ERROR - if seconds < 0: - return ret - - try: - if self.timeout != seconds: - self.timeout = self._settimeout(seconds) - - if self.armed: - self._keepalive() - else: - self._enable() - self.armed = True - - ret = self.timeout - self.arm_timestamp = time.time() - except IOError as e: - pass - - return ret - - def disarm(self): - """ - Disarm the hardware watchdog - Returns: - A boolean, True if watchdog is disarmed successfully, False if not - """ - disarmed = False - if self.is_armed(): - try: - self._disable() - self.armed = False - disarmed = True - except IOError: - pass - - return disarmed - - def is_armed(self): - """ - Retrieves the armed state of the hardware watchdog. - Returns: - A boolean, True if watchdog is armed, False if not - """ - - return self.armed - - def get_remaining_time(self): - """ - If the watchdog is armed, retrieve the number of seconds remaining on - the watchdog timer - Returns: - An integer specifying the number of seconds remaining on thei - watchdog timer. If the watchdog is not armed, returns -1. - """ - - return int(self.timeout - (time.time() - self.arm_timestamp)) if self.armed else WDT_COMMON_ERROR diff --git a/device/celestica/x86_64-cel_seastone_2-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_seastone_2-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..56fda7de4f5d --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/system_health_monitoring_config.json @@ -0,0 +1,13 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "psu.temperature" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "green_blink_1hz" + } +} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/warm-reboot_plugin b/device/celestica/x86_64-cel_seastone_2-r0/warm-reboot_plugin new file mode 100755 index 000000000000..d0fb8b29e191 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/warm-reboot_plugin @@ -0,0 +1,4 @@ +#!/bin/bash + +# Set all LEDs to BMC's control +ipmitool raw 0x3a 0x0f 0x02 0x01 &> /dev/null diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/th3-128x100G.config.bcm b/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/th3-128x100G.config.bcm index 447de2e85b5a..baddedd9c61b 100644 --- a/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/th3-128x100G.config.bcm +++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/th3-128x100G.config.bcm @@ -9,8 +9,6 @@ phy_enable=0 phy_null=1 pll_bypass=1 -init_all_modules=0 - sai_tunnel_global_sip_mask_enable=1 portmap_20=33:100:2 diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/hwsku.json b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/hwsku.json new file mode 100644 index 000000000000..b97d516509ec --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/hwsku.json @@ -0,0 +1,164 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet80": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet88": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet96": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet104": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet112": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet120": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet128": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet136": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet144": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet152": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet160": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet168": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet176": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet184": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet192": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet200": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet208": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet216": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet224": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet232": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet240": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet248": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/port_config.ini b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/port_config.ini index 9cd85ee34798..1d2b56d9fed9 100644 --- a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/port_config.ini +++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/port_config.ini @@ -1,33 +1,33 @@ # name lanes alias index speed -Ethernet0 33,34,35,36,37,38,39,40 QSFPDD1 1 400000 -Ethernet4 41,42,43,44,45,46,47,48 QSFPDD2 2 400000 -Ethernet8 49,50,51,52,53,54,55,56 QSFPDD3 3 400000 -Ethernet12 57,58,59,60,61,62,63,64 QSFPDD4 4 400000 -Ethernet16 65,66,67,68,69,70,71,72 QSFPDD5 5 400000 -Ethernet20 73,74,75,76,77,78,79,80 QSFPDD6 6 400000 -Ethernet24 81,82,83,84,85,86,87,88 QSFPDD7 7 400000 -Ethernet28 89,90,91,92,93,94,95,96 QSFPDD8 8 400000 -Ethernet32 1,2,3,4,5,6,7,8 QSFPDD9 9 400000 -Ethernet36 9,10,11,12,13,14,15,16 QSFPDD10 10 400000 -Ethernet40 17,18,19,20,21,22,23,24 QSFPDD11 11 400000 -Ethernet44 25,26,27,28,29,30,31,32 QSFPDD12 12 400000 -Ethernet48 97,98,99,100,101,102,103,104 QSFPDD13 13 400000 -Ethernet52 105,106,107,108,109,110,111,112 QSFPDD14 14 400000 -Ethernet56 113,114,115,116,117,118,119,120 QSFPDD15 15 400000 -Ethernet60 121,122,123,124,125,126,127,128 QSFPDD16 16 400000 -Ethernet64 129,130,131,132,133,134,135,136 QSFPDD17 17 400000 -Ethernet68 137,138,139,140,141,142,143,144 QSFPDD18 18 400000 -Ethernet72 145,146,147,148,149,150,151,152 QSFPDD19 19 400000 -Ethernet76 153,154,155,156,157,158,159,160 QSFPDD20 20 400000 -Ethernet80 225,226,227,228,229,230,231,232 QSFPDD21 21 400000 -Ethernet84 233,234,235,236,237,238,239,240 QSFPDD22 22 400000 -Ethernet88 241,242,243,244,245,246,247,248 QSFPDD23 23 400000 -Ethernet92 249,250,251,252,253,254,255,256 QSFPDD24 24 400000 -Ethernet96 161,162,163,164,165,166,167,168 QSFPDD25 25 400000 -Ethernet100 169,170,171,172,173,174,175,176 QSFPDD26 26 400000 -Ethernet104 177,178,179,180,181,182,183,184 QSFPDD27 27 400000 -Ethernet108 185,186,187,188,189,190,191,192 QSFPDD28 28 400000 -Ethernet112 193,194,195,196,197,198,199,200 QSFPDD29 29 400000 -Ethernet116 201,202,203,204,205,206,207,208 QSFPDD30 30 400000 -Ethernet120 209,210,211,212,213,214,215,216 QSFPDD31 31 400000 -Ethernet124 217,218,219,220,221,222,223,224 QSFPDD32 32 400000 \ No newline at end of file +Ethernet0 33,34,35,36,37,38,39,40 Eth1/1 1 400000 +Ethernet8 41,42,43,44,45,46,47,48 Eth2/1 2 400000 +Ethernet16 49,50,51,52,53,54,55,56 Eth3/1 3 400000 +Ethernet24 57,58,59,60,61,62,63,64 Eth4/1 4 400000 +Ethernet32 65,66,67,68,69,70,71,72 Eth5/1 5 400000 +Ethernet40 73,74,75,76,77,78,79,80 Eth6/1 6 400000 +Ethernet48 81,82,83,84,85,86,87,88 Eth7/1 7 400000 +Ethernet56 89,90,91,92,93,94,95,96 Eth8/1 8 400000 +Ethernet64 1,2,3,4,5,6,7,8 Eth9/1 9 400000 +Ethernet72 9,10,11,12,13,14,15,16 Eth10/1 10 400000 +Ethernet80 17,18,19,20,21,22,23,24 Eth11/1 11 400000 +Ethernet88 25,26,27,28,29,30,31,32 Eth12/1 12 400000 +Ethernet96 97,98,99,100,101,102,103,104 Eth13/1 13 400000 +Ethernet104 105,106,107,108,109,110,111,112 Eth14/1 14 400000 +Ethernet112 113,114,115,116,117,118,119,120 Eth15/1 15 400000 +Ethernet120 121,122,123,124,125,126,127,128 Eth16/1 16 400000 +Ethernet128 129,130,131,132,133,134,135,136 Eth17/1 17 400000 +Ethernet136 137,138,139,140,141,142,143,144 Eth18/1 18 400000 +Ethernet144 145,146,147,148,149,150,151,152 Eth19/1 19 400000 +Ethernet152 153,154,155,156,157,158,159,160 Eth20/1 20 400000 +Ethernet160 225,226,227,228,229,230,231,232 Eth21/1 21 400000 +Ethernet168 233,234,235,236,237,238,239,240 Eth22/1 22 400000 +Ethernet176 241,242,243,244,245,246,247,248 Eth23/1 23 400000 +Ethernet184 249,250,251,252,253,254,255,256 Eth24/1 24 400000 +Ethernet192 161,162,163,164,165,166,167,168 Eth25/1 25 400000 +Ethernet200 169,170,171,172,173,174,175,176 Eth26/1 26 400000 +Ethernet208 177,178,179,180,181,182,183,184 Eth27/1 27 400000 +Ethernet216 185,186,187,188,189,190,191,192 Eth28/1 28 400000 +Ethernet224 193,194,195,196,197,198,199,200 Eth29/1 29 400000 +Ethernet232 201,202,203,204,205,206,207,208 Eth30/1 30 400000 +Ethernet240 209,210,211,212,213,214,215,216 Eth31/1 31 400000 +Ethernet248 217,218,219,220,221,222,223,224 Eth32/1 32 400000 diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/sai_postinit_cmd.soc new file mode 100644 index 000000000000..731625308a5e --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/sai_postinit_cmd.soc @@ -0,0 +1,2 @@ +modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1 +modreg ING_MISC_CONFIG INPUT_PRI_UNTAGGED=1 diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/th3-32x400G.config.bcm b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/th3-32x400G.config.bcm index 400fbdcf7573..3d4cebc5269f 100644 --- a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/th3-32x400G.config.bcm +++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/th3-32x400G.config.bcm @@ -1,5 +1,5 @@ -pbmp_xport_xe.0=0x8111181111c1111811118111181111c111182222 +pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff8ffff ccm_dma_enable=0 ccmdma_intr_enable=0 ctr_evict_enable=0 @@ -10,8 +10,6 @@ phy_enable=0 phy_null=1 pll_bypass=1 -init_all_modules=0 - sai_tunnel_global_sip_mask_enable=1 @@ -183,38 +181,38 @@ serdes_core_tx_polarity_flip_physical{209}=0xe9 serdes_core_rx_polarity_flip_physical{217}=0xec serdes_core_tx_polarity_flip_physical{217}=0x68 -dport_map_port_20=1 -dport_map_port_24=2 -dport_map_port_28=3 -dport_map_port_32=4 -dport_map_port_40=5 -dport_map_port_44=6 -dport_map_port_48=7 -dport_map_port_52=8 -dport_map_port_1=9 -dport_map_port_5=10 -dport_map_port_9=11 -dport_map_port_13=12 -dport_map_port_60=13 -dport_map_port_64=14 -dport_map_port_68=15 -dport_map_port_72=16 -dport_map_port_80=17 -dport_map_port_84=18 -dport_map_port_88=19 -dport_map_port_92=20 -dport_map_port_140=21 -dport_map_port_144=22 -dport_map_port_148=23 -dport_map_port_152=24 -dport_map_port_100=25 -dport_map_port_104=26 -dport_map_port_108=27 -dport_map_port_112=28 -dport_map_port_120=29 -dport_map_port_124=30 -dport_map_port_128=31 -dport_map_port_132=32 +#dport_map_port_20=1 +#dport_map_port_24=2 +#dport_map_port_28=3 +#dport_map_port_32=4 +#dport_map_port_40=5 +#dport_map_port_44=6 +#dport_map_port_48=7 +#dport_map_port_52=8 +#dport_map_port_1=9 +#dport_map_port_5=10 +#dport_map_port_9=11 +#dport_map_port_13=12 +#dport_map_port_60=13 +#dport_map_port_64=14 +#dport_map_port_68=15 +#dport_map_port_72=16 +#dport_map_port_80=17 +#dport_map_port_84=18 +#dport_map_port_88=19 +#dport_map_port_92=20 +#dport_map_port_140=21 +#dport_map_port_144=22 +#dport_map_port_148=23 +#dport_map_port_152=24 +#dport_map_port_100=25 +#dport_map_port_104=26 +#dport_map_port_108=27 +#dport_map_port_112=28 +#dport_map_port_120=29 +#dport_map_port_124=30 +#dport_map_port_128=31 +#dport_map_port_132=32 #dport_map_port_38=33 #dport_map_port_118=34 @@ -229,4 +227,4 @@ port_flex_enable=1 #firmware load method, use fast load load_firmware=0x2 - +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc diff --git a/device/celestica/x86_64-cel_silverstone-r0/pcie.yaml b/device/celestica/x86_64-cel_silverstone-r0/pcie.yaml new file mode 100644 index 000000000000..2249ead1a849 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/pcie.yaml @@ -0,0 +1,434 @@ +- bus: '00' + dev: '00' + fn: '0' + id: 6f00 + name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2 + (rev 03)' +- bus: '00' + dev: '01' + fn: '0' + id: 6f02 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 1 (rev 03)' +- bus: '00' + dev: '02' + fn: '0' + id: 6f04 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 2 (rev 03)' +- bus: '00' + dev: '02' + fn: '2' + id: 6f06 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 2 (rev 03)' +- bus: '00' + dev: '03' + fn: '0' + id: 6f08 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '03' + fn: '1' + id: 6f09 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '03' + fn: '2' + id: 6f0a + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '03' + fn: '3' + id: 6f0b + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '05' + fn: '0' + id: 6f28 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Map/VTd_Misc/System Management (rev 03)' +- bus: '00' + dev: '05' + fn: '1' + id: 6f29 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Hot Plug (rev 03)' +- bus: '00' + dev: '05' + fn: '2' + id: 6f2a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO RAS/Control Status/Global Errors (rev 03)' +- bus: '00' + dev: '05' + fn: '4' + id: 6f2c + name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev + 03)' +- bus: '00' + dev: 1c + fn: '0' + id: 8c10 + name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express + Root Port #1 (rev d5)' +- bus: '00' + dev: 1c + fn: '1' + id: 8c12 + name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express + Root Port #2 (rev d5)' +- bus: '00' + dev: 1c + fn: '2' + id: 8c14 + name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express + Root Port #3 (rev d5)' +- bus: '00' + dev: 1d + fn: '0' + id: 8c26 + name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB + EHCI #1 (rev 05)' +- bus: '00' + dev: 1f + fn: '0' + id: 8c54 + name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard + SKU LPC Controller (rev 05)' +- bus: '00' + dev: 1f + fn: '2' + id: 8c02 + name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port + SATA Controller 1 [AHCI mode] (rev 05)' +- bus: '00' + dev: 1f + fn: '3' + id: 8c22 + name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller + (rev 05)' +- bus: '02' + dev: '00' + fn: '0' + id: 6f50 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 0' +- bus: '02' + dev: '00' + fn: '1' + id: 6f51 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 1' +- bus: '02' + dev: '00' + fn: '2' + id: 6f52 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 2' +- bus: '02' + dev: '00' + fn: '3' + id: 6f53 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 3' +- bus: '03' + dev: '00' + fn: '0' + id: 15ab + name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane' +- bus: '03' + dev: '00' + fn: '1' + id: 15ab + name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane' +- bus: '05' + dev: '00' + fn: '0' + id: b980 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b980 (rev 11)' +- bus: 09 + dev: '00' + fn: '0' + id: '7021' + name: 'Memory controller: Xilinx Corporation Device 7021' +- bus: 0a + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: 0b + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: ff + dev: 0b + fn: '0' + id: 6f81 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 03)' +- bus: ff + dev: 0b + fn: '1' + id: 6f36 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 03)' +- bus: ff + dev: 0b + fn: '2' + id: 6f37 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 03)' +- bus: ff + dev: 0b + fn: '3' + id: 6f76 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link Debug (rev 03)' +- bus: ff + dev: 0c + fn: '0' + id: 6fe0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0c + fn: '1' + id: 6fe1 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '0' + id: 6ff8 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '4' + id: 6ffc + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '5' + id: 6ffd + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '6' + id: 6ffe + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: '10' + fn: '0' + id: 6f1d + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R2PCIe Agent (rev 03)' +- bus: ff + dev: '10' + fn: '1' + id: 6f34 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R2PCIe Agent (rev 03)' +- bus: ff + dev: '10' + fn: '5' + id: 6f1e + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 03)' +- bus: ff + dev: '10' + fn: '6' + id: 6f7d + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 03)' +- bus: ff + dev: '10' + fn: '7' + id: 6f1f + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 03)' +- bus: ff + dev: '12' + fn: '0' + id: 6fa0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Home Agent 0 (rev 03)' +- bus: ff + dev: '12' + fn: '1' + id: 6f30 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Home Agent 0 (rev 03)' +- bus: ff + dev: '13' + fn: '0' + id: 6fa8 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)' +- bus: ff + dev: '13' + fn: '1' + id: 6f71 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)' +- bus: ff + dev: '13' + fn: '2' + id: 6faa + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '3' + id: 6fab + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '4' + id: 6fac + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '5' + id: 6fad + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '6' + id: 6fae + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Broadcast (rev 03)' +- bus: ff + dev: '13' + fn: '7' + id: 6faf + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Global Broadcast (rev 03)' +- bus: ff + dev: '14' + fn: '0' + id: 6fb0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 0 Thermal Control (rev 03)' +- bus: ff + dev: '14' + fn: '1' + id: 6fb1 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 1 Thermal Control (rev 03)' +- bus: ff + dev: '14' + fn: '2' + id: 6fb2 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 0 Error (rev 03)' +- bus: ff + dev: '14' + fn: '3' + id: 6fb3 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 1 Error (rev 03)' +- bus: ff + dev: '14' + fn: '4' + id: 6fbc + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '14' + fn: '5' + id: 6fbd + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '14' + fn: '6' + id: 6fbe + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '14' + fn: '7' + id: 6fbf + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '15' + fn: '0' + id: 6fb4 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 2 Thermal Control (rev 03)' +- bus: ff + dev: '15' + fn: '1' + id: 6fb5 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 3 Thermal Control (rev 03)' +- bus: ff + dev: '15' + fn: '2' + id: 6fb6 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 2 Error (rev 03)' +- bus: ff + dev: '15' + fn: '3' + id: 6fb7 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 3 Error (rev 03)' +- bus: ff + dev: 1e + fn: '0' + id: 6f98 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '1' + id: 6f99 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '2' + id: 6f9a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '3' + id: 6fc0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '4' + id: 6f9c + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1f + fn: '0' + id: 6f88 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1f + fn: '2' + id: 6f8a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' diff --git a/device/celestica/x86_64-cel_silverstone-r0/platform.json b/device/celestica/x86_64-cel_silverstone-r0/platform.json new file mode 100644 index 000000000000..6dc768bd4622 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/platform.json @@ -0,0 +1,484 @@ +{ + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "33,34,35,36,37,38,39,40", + "breakout_modes": { + "1x400G": ["Eth1/1"], + "2x100G": ["Eth1/1", "Eth1/5"], + "2x40G": ["Eth1/1", "Eth1/5"], + "4x100G": ["Eth1/1", "Eth1/3", "Eth1/5", "Eth1/7"], + "1x100G(2)": ["Eth1/1"], + "1x100G(4)": ["Eth1/1"], + "1x40G(4)": ["Eth1/1"], + "4x25G(4)": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"], + "4x10G(4)": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"] + } + }, + "Ethernet8": { + "index": "2,2,2,2,2,2,2,2", + "lanes": "41,42,43,44,45,46,47,48", + "breakout_modes": { + "1x400G": ["Eth2/1"], + "2x100G": ["Eth2/1", "Eth2/5"], + "2x40G": ["Eth2/1", "Eth2/5"], + "4x100G": ["Eth2/1", "Eth2/3", "Eth2/5", "Eth2/7"], + "1x100G(2)": ["Eth2/1"], + "1x100G(4)": ["Eth2/1"], + "1x40G(4)": ["Eth2/1"], + "4x25G(4)": ["Eth2/1", "Eth2/2", "Eth2/3", "Eth2/4"], + "4x10G(4)": ["Eth2/1", "Eth2/2", "Eth2/3", "Eth2/4"] + } + }, + "Ethernet16": { + "index": "3,3,3,3,3,3,3,3", + "lanes": "49,50,51,52,53,54,55,56", + "breakout_modes": { + "1x400G": ["Eth3/1"], + "2x100G": ["Eth3/1", "Eth3/5"], + "2x40G": ["Eth3/1", "Eth3/5"], + "4x100G": ["Eth3/1", "Eth3/3", "Eth3/5", "Eth3/7"], + "1x100G(2)": ["Eth3/1"], + "1x100G(4)": ["Eth3/1"], + "1x40G(4)": ["Eth3/1"], + "4x25G(4)": ["Eth3/1", "Eth3/2", "Eth3/3", "Eth3/4"], + "4x10G(4)": ["Eth3/1", "Eth3/2", "Eth3/3", "Eth3/4"] + } + }, + "Ethernet24": { + "index": "4,4,4,4,4,4,4,4", + "lanes": "57,58,59,60,61,62,63,64", + "breakout_modes": { + "1x400G": ["Eth4/1"], + "2x100G": ["Eth4/1", "Eth4/5"], + "2x40G": ["Eth4/1", "Eth4/5"], + "4x100G": ["Eth4/1", "Eth4/3", "Eth4/5", "Eth4/7"], + "1x100G(2)": ["Eth4/1"], + "1x100G(4)": ["Eth4/1"], + "1x40G(4)": ["Eth4/1"], + "4x25G(4)": ["Eth4/1", "Eth4/2", "Eth4/3", "Eth4/4"], + "4x10G(4)": ["Eth4/1", "Eth4/2", "Eth4/3", "Eth4/4"] + } + }, + "Ethernet32": { + "index": "5,5,5,5,5,5,5,5", + "lanes": "65,66,67,68,69,70,71,72", + "breakout_modes": { + "1x400G": ["Eth5/1"], + "2x100G": ["Eth5/1", "Eth5/5"], + "2x40G": ["Eth5/1", "Eth5/5"], + "4x100G": ["Eth5/1", "Eth5/3", "Eth5/5", "Eth5/7"], + "1x100G(2)": ["Eth5/1"], + "1x100G(4)": ["Eth5/1"], + "1x40G(4)": ["Eth5/1"], + "4x25G(4)": ["Eth5/1", "Eth5/2", "Eth5/3", "Eth5/4"], + "4x10G(4)": ["Eth5/1", "Eth5/2", "Eth5/3", "Eth5/4"] + } + }, + "Ethernet40": { + "index": "6,6,6,6,6,6,6,6", + "lanes": "73,74,75,76,77,78,79,80", + "breakout_modes": { + "1x400G": ["Eth6/1"], + "2x100G": ["Eth6/1", "Eth6/5"], + "2x40G": ["Eth6/1", "Eth6/5"], + "4x100G": ["Eth6/1", "Eth6/3", "Eth6/5", "Eth6/7"], + "1x100G(2)": ["Eth6/1"], + "1x100G(4)": ["Eth6/1"], + "1x40G(4)": ["Eth6/1"], + "4x25G(4)": ["Eth6/1", "Eth6/2", "Eth6/3", "Eth6/4"], + "4x10G(4)": ["Eth6/1", "Eth6/2", "Eth6/3", "Eth6/4"] + } + }, + "Ethernet48": { + "index": "7,7,7,7,7,7,7,7", + "lanes": "81,82,83,84,85,86,87,88", + "breakout_modes": { + "1x400G": ["Eth7/1"], + "2x100G": ["Eth7/1", "Eth7/5"], + "2x40G": ["Eth7/1", "Eth7/5"], + "4x100G": ["Eth7/1", "Eth7/3", "Eth7/5", "Eth7/7"], + "1x100G(2)": ["Eth7/1"], + "1x100G(4)": ["Eth7/1"], + "1x40G(4)": ["Eth7/1"], + "4x25G(4)": ["Eth7/1", "Eth7/2", "Eth7/3", "Eth7/4"], + "4x10G(4)": ["Eth7/1", "Eth7/2", "Eth7/3", "Eth7/4"] + } + }, + "Ethernet56": { + "index": "8,8,8,8,8,8,8,8", + "lanes": "89,90,91,92,93,94,95,96", + "breakout_modes": { + "1x400G": ["Eth8/1"], + "2x100G": ["Eth8/1", "Eth8/5"], + "2x40G": ["Eth8/1", "Eth8/5"], + "4x100G": ["Eth8/1", "Eth8/3", "Eth8/5", "Eth8/7"], + "1x100G(2)": ["Eth8/1"], + "1x100G(4)": ["Eth8/1"], + "1x40G(4)": ["Eth8/1"], + "4x25G(4)": ["Eth8/1", "Eth8/2", "Eth8/3", "Eth8/4"], + "4x10G(4)": ["Eth8/1", "Eth8/2", "Eth8/3", "Eth8/4"] + } + }, + "Ethernet64": { + "index": "9,9,9,9,9,9,9,9", + "lanes": "1,2,3,4,5,6,7,8", + "breakout_modes": { + "1x400G": ["Eth9/1"], + "2x100G": ["Eth9/1", "Eth9/5"], + "2x40G": ["Eth9/1", "Eth9/5"], + "4x100G": ["Eth9/1", "Eth9/3", "Eth9/5", "Eth9/7"], + "1x100G(2)": ["Eth9/1"], + "1x100G(4)": ["Eth9/1"], + "1x40G(4)": ["Eth9/1"], + "4x25G(4)": ["Eth9/1", "Eth9/2", "Eth9/3", "Eth9/4"], + "4x10G(4)": ["Eth9/1", "Eth9/2", "Eth9/3", "Eth9/4"] + } + }, + "Ethernet72": { + "index": "10,10,10,10,10,10,10,10", + "lanes": "9,10,11,12,13,14,15,16", + "breakout_modes": { + "1x400G": ["Eth10/1"], + "2x100G": ["Eth10/1", "Eth10/5"], + "2x40G": ["Eth10/1", "Eth10/5"], + "4x100G": ["Eth10/1", "Eth10/3", "Eth10/5", "Eth10/7"], + "1x100G(2)": ["Eth10/1"], + "1x100G(4)": ["Eth10/1"], + "1x40G(4)": ["Eth10/1"], + "4x25G(4)": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4"], + "4x10G(4)": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4"] + } + }, + "Ethernet80": { + "index": "11,11,11,11,11,11,11,11", + "lanes": "17,18,19,20,21,22,23,24", + "breakout_modes": { + "1x400G": ["Eth11/1"], + "2x100G": ["Eth11/1", "Eth11/5"], + "2x40G": ["Eth11/1", "Eth11/5"], + "4x100G": ["Eth11/1", "Eth11/3", "Eth11/5", "Eth11/7"], + "1x100G(2)": ["Eth11/1"], + "1x100G(4)": ["Eth11/1"], + "1x40G(4)": ["Eth11/1"], + "4x25G(4)": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4"], + "4x10G(4)": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4"] + } + }, + "Ethernet88": { + "index": "12,12,12,12,12,12,12,12", + "lanes": "25,26,27,28,29,30,31,32", + "breakout_modes": { + "1x400G": ["Eth12/1"], + "2x100G": ["Eth12/1", "Eth12/5"], + "2x40G": ["Eth12/1", "Eth12/5"], + "4x100G": ["Eth12/1", "Eth12/3", "Eth12/5", "Eth12/7"], + "1x100G(2)": ["Eth12/1"], + "1x100G(4)": ["Eth12/1"], + "1x40G(4)": ["Eth12/1"], + "4x25G(4)": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4"], + "4x10G(4)": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4"] + } + }, + "Ethernet96": { + "index": "13,13,13,13,13,13,13,13", + "lanes": "97,98,99,100,101,102,103,104", + "breakout_modes": { + "1x400G": ["Eth13/1"], + "2x100G": ["Eth13/1", "Eth13/5"], + "2x40G": ["Eth13/1", "Eth13/5"], + "4x100G": ["Eth13/1", "Eth13/3", "Eth13/5", "Eth13/7"], + "1x100G(2)": ["Eth13/1"], + "1x100G(4)": ["Eth13/1"], + "1x40G(4)": ["Eth13/1"], + "4x25G(4)": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4"], + "4x10G(4)": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4"] + } + }, + "Ethernet104": { + "index": "14,14,14,14,14,14,14,14", + "lanes": "105,106,107,108,109,110,111,112", + "breakout_modes": { + "1x400G": ["Eth14/1"], + "2x100G": ["Eth14/1", "Eth14/5"], + "2x40G": ["Eth14/1", "Eth14/5"], + "4x100G": ["Eth14/1", "Eth14/3", "Eth14/5", "Eth14/7"], + "1x100G(2)": ["Eth14/1"], + "1x100G(4)": ["Eth14/1"], + "1x40G(4)": ["Eth14/1"], + "4x25G(4)": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4"], + "4x10G(4)": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4"] + } + }, + "Ethernet112": { + "index": "15,15,15,15,15,15,15,15", + "lanes": "113,114,115,116,117,118,119,120", + "breakout_modes": { + "1x400G": ["Eth15/1"], + "2x100G": ["Eth15/1", "Eth15/5"], + "2x40G": ["Eth15/1", "Eth15/5"], + "4x100G": ["Eth15/1", "Eth15/3", "Eth15/5", "Eth15/7"], + "1x100G(2)": ["Eth15/1"], + "1x100G(4)": ["Eth15/1"], + "1x40G(4)": ["Eth15/1"], + "4x25G(4)": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4"], + "4x10G(4)": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4"] + } + }, + "Ethernet120": { + "index": "16,16,16,16,16,16,16,16", + "lanes": "121,122,123,124,125,126,127,128", + "breakout_modes": { + "1x400G": ["Eth16/1"], + "2x100G": ["Eth16/1", "Eth16/5"], + "2x40G": ["Eth16/1", "Eth16/5"], + "4x100G": ["Eth16/1", "Eth16/3", "Eth16/5", "Eth16/7"], + "1x100G(2)": ["Eth16/1"], + "1x100G(4)": ["Eth16/1"], + "1x40G(4)": ["Eth16/1"], + "4x25G(4)": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4"], + "4x10G(4)": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4"] + } + }, + "Ethernet128": { + "index": "17,17,17,17,17,17,17,17", + "lanes": "129,130,131,132,133,134,135,136", + "breakout_modes": { + "1x400G": ["Eth17/1"], + "2x100G": ["Eth17/1", "Eth17/5"], + "2x40G": ["Eth17/1", "Eth17/5"], + "4x100G": ["Eth17/1", "Eth17/3", "Eth17/5", "Eth17/7"], + "1x100G(2)": ["Eth17/1"], + "1x100G(4)": ["Eth17/1"], + "1x40G(4)": ["Eth17/1"], + "4x25G(4)": ["Eth17/1", "Eth17/2", "Eth17/3", "Eth17/4"], + "4x10G(4)": ["Eth17/1", "Eth17/2", "Eth17/3", "Eth17/4"] + } + }, + "Ethernet136": { + "index": "18,18,18,18,18,18,18,18", + "lanes": "137,138,139,140,141,142,143,144", + "breakout_modes": { + "1x400G": ["Eth18/1"], + "2x100G": ["Eth18/1", "Eth18/5"], + "2x40G": ["Eth18/1", "Eth18/5"], + "4x100G": ["Eth18/1", "Eth18/3", "Eth18/5", "Eth18/7"], + "1x100G(2)": ["Eth18/1"], + "1x100G(4)": ["Eth18/1"], + "1x40G(4)": ["Eth18/1"], + "4x25G(4)": ["Eth18/1", "Eth18/2", "Eth18/3", "Eth18/4"], + "4x10G(4)": ["Eth18/1", "Eth18/2", "Eth18/3", "Eth18/4"] + } + }, + "Ethernet144": { + "index": "19,19,19,19,19,19,19,19", + "lanes": "145,146,147,148,149,150,151,152", + "breakout_modes": { + "1x400G": ["Eth19/1"], + "2x100G": ["Eth19/1", "Eth19/5"], + "2x40G": ["Eth19/1", "Eth19/5"], + "4x100G": ["Eth19/1", "Eth19/3", "Eth19/5", "Eth19/7"], + "1x100G(2)": ["Eth19/1"], + "1x100G(4)": ["Eth19/1"], + "1x40G(4)": ["Eth19/1"], + "4x25G(4)": ["Eth19/1", "Eth19/2", "Eth19/3", "Eth19/4"], + "4x10G(4)": ["Eth19/1", "Eth19/2", "Eth19/3", "Eth19/4"] + } + }, + "Ethernet152": { + "index": "20,20,20,20,20,20,20,20", + "lanes": "153,154,155,156,157,158,159,160", + "breakout_modes": { + "1x400G": ["Eth20/1"], + "2x100G": ["Eth20/1", "Eth20/5"], + "2x40G": ["Eth20/1", "Eth20/5"], + "4x100G": ["Eth20/1", "Eth20/3", "Eth20/5", "Eth20/7"], + "1x100G(2)": ["Eth20/1"], + "1x100G(4)": ["Eth20/1"], + "1x40G(4)": ["Eth20/1"], + "4x25G(4)": ["Eth20/1", "Eth20/2", "Eth20/3", "Eth20/4"], + "4x10G(4)": ["Eth20/1", "Eth20/2", "Eth20/3", "Eth20/4"] + } + }, + "Ethernet160": { + "index": "21,21,21,21,21,21,21,21", + "lanes": "225,226,227,228,229,230,231,232", + "breakout_modes": { + "1x400G": ["Eth21/1"], + "2x100G": ["Eth21/1", "Eth21/5"], + "2x40G": ["Eth21/1", "Eth21/5"], + "4x100G": ["Eth21/1", "Eth21/3", "Eth21/5", "Eth21/7"], + "1x100G(2)": ["Eth21/1"], + "1x100G(4)": ["Eth21/1"], + "1x40G(4)": ["Eth21/1"], + "4x25G(4)": ["Eth21/1", "Eth21/2", "Eth21/3", "Eth21/4"], + "4x10G(4)": ["Eth21/1", "Eth21/2", "Eth21/3", "Eth21/4"] + } + }, + "Ethernet168": { + "index": "22,22,22,22,22,22,22,22", + "lanes": "233,234,235,236,237,238,239,240", + "breakout_modes": { + "1x400G": ["Eth22/1"], + "2x100G": ["Eth22/1", "Eth22/5"], + "2x40G": ["Eth22/1", "Eth22/5"], + "4x100G": ["Eth22/1", "Eth22/3", "Eth22/5", "Eth22/7"], + "1x100G(2)": ["Eth22/1"], + "1x100G(4)": ["Eth22/1"], + "1x40G(4)": ["Eth22/1"], + "4x25G(4)": ["Eth22/1", "Eth22/2", "Eth22/3", "Eth22/4"], + "4x10G(4)": ["Eth22/1", "Eth22/2", "Eth22/3", "Eth22/4"] + } + }, + "Ethernet176": { + "index": "23,23,23,23,23,23,23,23", + "lanes": "241,242,243,244,245,246,247,248", + "breakout_modes": { + "1x400G": ["Eth23/1"], + "2x100G": ["Eth23/1", "Eth23/5"], + "2x40G": ["Eth23/1", "Eth23/5"], + "4x100G": ["Eth23/1", "Eth23/3", "Eth23/5", "Eth23/7"], + "1x100G(2)": ["Eth23/1"], + "1x100G(4)": ["Eth23/1"], + "1x40G(4)": ["Eth23/1"], + "4x25G(4)": ["Eth23/1", "Eth23/2", "Eth23/3", "Eth23/4"], + "4x10G(4)": ["Eth23/1", "Eth23/2", "Eth23/3", "Eth23/4"] + } + }, + "Ethernet184": { + "index": "24,24,24,24,24,24,24,24", + "lanes": "249,250,251,252,253,254,255,256", + "breakout_modes": { + "1x400G": ["Eth24/1"], + "2x100G": ["Eth24/1", "Eth24/5"], + "2x40G": ["Eth24/1", "Eth24/5"], + "4x100G": ["Eth24/1", "Eth24/3", "Eth24/5", "Eth24/7"], + "1x100G(2)": ["Eth24/1"], + "1x100G(4)": ["Eth24/1"], + "1x40G(4)": ["Eth24/1"], + "4x25G(4)": ["Eth24/1", "Eth24/2", "Eth24/3", "Eth24/4"], + "4x10G(4)": ["Eth24/1", "Eth24/2", "Eth24/3", "Eth24/4"] + } + }, + "Ethernet192": { + "index": "25,25,25,25,25,25,25,25", + "lanes": "161,162,163,164,165,166,167,168", + "breakout_modes": { + "1x400G": ["Eth25/1"], + "2x100G": ["Eth25/1", "Eth25/5"], + "2x40G": ["Eth25/1", "Eth25/5"], + "4x100G": ["Eth25/1", "Eth25/3", "Eth25/5", "Eth25/7"], + "1x100G(2)": ["Eth25/1"], + "1x100G(4)": ["Eth25/1"], + "1x40G(4)": ["Eth25/1"], + "4x25G(4)": ["Eth25/1", "Eth25/2", "Eth25/3", "Eth25/4"], + "4x10G(4)": ["Eth25/1", "Eth25/2", "Eth25/3", "Eth25/4"] + } + }, + "Ethernet200": { + "index": "26,26,26,26,26,26,26,26", + "lanes": "169,170,171,172,173,174,175,176", + "breakout_modes": { + "1x400G": ["Eth26/1"], + "2x100G": ["Eth26/1", "Eth26/5"], + "2x40G": ["Eth26/1", "Eth26/5"], + "4x100G": ["Eth26/1", "Eth26/3", "Eth26/5", "Eth26/7"], + "1x100G(2)": ["Eth26/1"], + "1x100G(4)": ["Eth26/1"], + "1x40G(4)": ["Eth26/1"], + "4x25G(4)": ["Eth26/1", "Eth26/2", "Eth26/3", "Eth26/4"], + "4x10G(4)": ["Eth26/1", "Eth26/2", "Eth26/3", "Eth26/4"] + } + }, + "Ethernet208": { + "index": "27,27,27,27,27,27,27,27", + "lanes": "177,178,179,180,181,182,183,184", + "breakout_modes": { + "1x400G": ["Eth27/1"], + "2x100G": ["Eth27/1", "Eth27/5"], + "2x40G": ["Eth27/1", "Eth27/5"], + "4x100G": ["Eth27/1", "Eth27/3", "Eth27/5", "Eth27/7"], + "1x100G(2)": ["Eth27/1"], + "1x100G(4)": ["Eth27/1"], + "1x40G(4)": ["Eth27/1"], + "4x25G(4)": ["Eth27/1", "Eth27/2", "Eth27/3", "Eth27/4"], + "4x10G(4)": ["Eth27/1", "Eth27/2", "Eth27/3", "Eth27/4"] + } + }, + "Ethernet216": { + "index": "28,28,28,28,28,28,28,28", + "lanes": "185,186,187,188,189,190,191,192", + "breakout_modes": { + "1x400G": ["Eth28/1"], + "2x100G": ["Eth28/1", "Eth28/5"], + "2x40G": ["Eth28/1", "Eth28/5"], + "4x100G": ["Eth28/1", "Eth28/3", "Eth28/5", "Eth28/7"], + "1x100G(2)": ["Eth28/1"], + "1x100G(4)": ["Eth28/1"], + "1x40G(4)": ["Eth28/1"], + "4x25G(4)": ["Eth28/1", "Eth28/2", "Eth28/3", "Eth28/4"], + "4x10G(4)": ["Eth28/1", "Eth28/2", "Eth28/3", "Eth28/4"] + } + }, + "Ethernet224": { + "index": "29,29,29,29,29,29,29,29", + "lanes": "193,194,195,196,197,198,199,200", + "breakout_modes": { + "1x400G": ["Eth29/1"], + "2x100G": ["Eth29/1", "Eth29/5"], + "2x40G": ["Eth29/1", "Eth29/5"], + "4x100G": ["Eth29/1", "Eth29/3", "Eth29/5", "Eth29/7"], + "1x100G(2)": ["Eth29/1"], + "1x100G(4)": ["Eth29/1"], + "1x40G(4)": ["Eth29/1"], + "4x25G(4)": ["Eth29/1", "Eth29/2", "Eth29/3", "Eth29/4"], + "4x10G(4)": ["Eth29/1", "Eth29/2", "Eth29/3", "Eth29/4"] + } + }, + "Ethernet232": { + "index": "30,30,30,30,30,30,30,30", + "lanes": "201,202,203,204,205,206,207,208", + "breakout_modes": { + "1x400G": ["Eth30/1"], + "2x100G": ["Eth30/1", "Eth30/5"], + "2x40G": ["Eth30/1", "Eth30/5"], + "4x100G": ["Eth30/1", "Eth30/3", "Eth30/5", "Eth30/7"], + "1x100G(2)": ["Eth30/1"], + "1x100G(4)": ["Eth30/1"], + "1x40G(4)": ["Eth30/1"], + "4x25G(4)": ["Eth30/1", "Eth30/2", "Eth30/3", "Eth30/4"], + "4x10G(4)": ["Eth30/1", "Eth30/2", "Eth30/3", "Eth30/4"] + } + }, + "Ethernet240": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "209,210,211,212,213,214,215,216", + "breakout_modes": { + "1x400G": ["Eth31/1"], + "2x100G": ["Eth31/1", "Eth31/5"], + "2x40G": ["Eth31/1", "Eth31/5"], + "4x100G": ["Eth31/1", "Eth31/3", "Eth31/5", "Eth31/7"], + "1x100G(2)": ["Eth31/1"], + "1x100G(4)": ["Eth31/1"], + "1x40G(4)": ["Eth31/1"], + "4x25G(4)": ["Eth31/1", "Eth31/2", "Eth31/3", "Eth31/4"], + "4x10G(4)": ["Eth31/1", "Eth31/2", "Eth31/3", "Eth31/4"] + } + }, + "Ethernet248": { + "index": "32,32,32,32,32,32,32,32", + "lanes": "217,218,219,220,221,222,223,224", + "breakout_modes": { + "1x400G": ["Eth32/1"], + "2x100G": ["Eth32/1", "Eth32/5"], + "2x40G": ["Eth32/1", "Eth32/5"], + "4x100G": ["Eth32/1", "Eth32/3", "Eth32/5", "Eth32/7"], + "1x100G(2)": ["Eth32/1"], + "1x100G(4)": ["Eth32/1"], + "1x40G(4)": ["Eth32/1"], + "4x25G(4)": ["Eth32/1", "Eth32/2", "Eth32/3", "Eth32/4"], + "4x10G(4)": ["Eth32/1", "Eth32/2", "Eth32/3", "Eth32/4"] + } + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone-r0/platform_components.json b/device/celestica/x86_64-cel_silverstone-r0/platform_components.json new file mode 100644 index 000000000000..9713fd620c27 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/platform_components.json @@ -0,0 +1,18 @@ +{ + "chassis": { + "Silverstone": { + "component": { + "BIOS": {}, + "ONIE": {}, + "BMC": {}, + "FPGA": {}, + "CPLD COMe": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {}, + "CPLD FAN": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone-r0/platform_reboot b/device/celestica/x86_64-cel_silverstone-r0/platform_reboot new file mode 100755 index 000000000000..0c84c4d7f536 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/platform_reboot @@ -0,0 +1,6 @@ +#!/bin/bash + +# Set all LEDs to BMC's control +ipmitool raw 0x3a 0x09 0x02 0x01 &> /dev/null + +/usr/local/bin/silverstone_platform_shutdown.sh system diff --git a/device/celestica/x86_64-cel_silverstone-r0/plugins/psuutil.py b/device/celestica/x86_64-cel_silverstone-r0/plugins/psuutil.py index 46684aae0f22..ea2f8cfca969 100644 --- a/device/celestica/x86_64-cel_silverstone-r0/plugins/psuutil.py +++ b/device/celestica/x86_64-cel_silverstone-r0/plugins/psuutil.py @@ -1,6 +1,7 @@ import subprocess import sys import re +import os try: from sonic_psu.psu_base import PsuBase @@ -11,8 +12,19 @@ class PsuUtil(PsuBase): """Platform-specific PSUutil class""" + __IPMI_BASE_COMMAND = ["ipmitool", "raw", "0x04", "0x2d"] + __IPMI_CONTAINER_PREFIX = ["docker", "exec", "-ti", "pmon"] + + def __container_prefix(self, cmdlist): + # If running inside container, nothing to prefix. Else, prefix container + # invocation. + if os.environ.get("CONTAINER_NAME") != None: + return cmdlist + + return self.__IPMI_CONTAINER_PREFIX + cmdlist + def __init__(self): - self.ipmi_raw = ["docker", "exec", "-ti", "pmon", "ipmitool", "raw", "0x4", "0x2d", ""] + self.ipmi_raw = self.__container_prefix(self.__IPMI_BASE_COMMAND) self.psu1_id = "0x2f" self.psu2_id = "0x39" PsuBase.__init__(self) @@ -51,8 +63,7 @@ def get_psu_status(self, index): return False psu_id = self.psu1_id if index == 1 else self.psu2_id - self.ipmi_raw[8] = psu_id - res_string = self.run_command(self.ipmi_raw) + res_string = self.run_command(self.ipmi_raw + [psu_id]) status_byte = self.find_value(res_string) if status_byte is None: @@ -76,8 +87,7 @@ def get_psu_presence(self, index): return False psu_id = self.psu1_id if index == 1 else self.psu2_id - self.ipmi_raw[8] = psu_id - res_string = self.run_command(self.ipmi_raw) + res_string = self.run_command(self.ipmi_raw + [psu_id]) status_byte = self.find_value(res_string) if status_byte is None: diff --git a/device/celestica/x86_64-cel_silverstone-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_silverstone-r0/pmon_daemon_control.json index 94592fa8cebc..f5b2736b13e0 100644 --- a/device/celestica/x86_64-cel_silverstone-r0/pmon_daemon_control.json +++ b/device/celestica/x86_64-cel_silverstone-r0/pmon_daemon_control.json @@ -1,3 +1,5 @@ { - "skip_ledd": true + "skip_ledd": true, + "skip_fancontrol": true, + "skip_xcvrd_cmis_mgr": true } diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/__init__.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/__init__.py deleted file mode 100644 index d82f3749319c..000000000000 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/__init__.py +++ /dev/null @@ -1,2 +0,0 @@ -__all__ = ["platform", "chassis"] -from sonic_platform import * diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/chassis.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/chassis.py deleted file mode 100644 index b6f77cbd3dc9..000000000000 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/chassis.py +++ /dev/null @@ -1,131 +0,0 @@ -############################################################################# -# Celestica -# -# Module contains an implementation of SONiC Platform Base API and -# provides the Chassis information which are available in the platform -# -############################################################################# - -import sys -import re -import os -import subprocess -import json - -try: - from sonic_platform_base.chassis_base import ChassisBase - from sonic_platform.component import Component - from sonic_platform.eeprom import Tlv - from sonic_platform.fan import Fan - from sonic_platform.sfp import Sfp - from sonic_platform.psu import Psu - from sonic_platform.thermal import Thermal - from .helper import APIHelper -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - -NUM_FAN_TRAY = 7 -NUM_FAN = 2 -NUM_PSU = 2 -NUM_THERMAL = 10 -NUM_SFP = 32 -NUM_COMPONENT = 5 - -IPMI_OEM_NETFN = "0x3A" -IPMI_GET_REBOOT_CAUSE = "0x03 0x00 0x01 0x06" - - -class Chassis(ChassisBase): - """Platform-specific Chassis class""" - - def __init__(self): - self.config_data = {} - ChassisBase.__init__(self) - self._eeprom = Tlv() - self._api_helper = APIHelper() - - for fant_index in range(0, NUM_FAN_TRAY): - for fan_index in range(0, NUM_FAN): - fan = Fan(fant_index, fan_index) - self._fan_list.append(fan) - - for index in range(0, NUM_SFP): - sfp = Sfp(index) - self._sfp_list.append(sfp) - - for index in range(0, NUM_PSU): - psu = Psu(index) - self._psu_list.append(psu) - for index in range(0, NUM_COMPONENT): - component = Component(index) - self._component_list.append(component) - for index in range(0, NUM_THERMAL): - thermal = Thermal(index) - self._thermal_list.append(thermal) - - def get_base_mac(self): - """ - Retrieves the base MAC address for the chassis - Returns: - A string containing the MAC address in the format - 'XX:XX:XX:XX:XX:XX' - """ - return self._eeprom.get_mac() - - def get_serial(self): - """ - Retrieves the hardware serial number for the chassis - Returns: - A string containing the hardware serial number for this chassis. - """ - return self._eeprom.get_serial() - - def get_system_eeprom_info(self): - """ - Retrieves the full content of system EEPROM information for the chassis - Returns: - A dictionary where keys are the type code defined in - OCP ONIE TlvInfo EEPROM format and values are their corresponding - values. - """ - return self._eeprom.get_eeprom() - - def get_reboot_cause(self): - """ - Retrieves the cause of the previous reboot - - Returns: - A tuple (string, string) where the first element is a string - containing the cause of the previous reboot. This string must be - one of the predefined strings in this class. If the first string - is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used - to pass a description of the reboot cause. - """ - - status, raw_cause = self._api_helper.ipmi_raw( - IPMI_OEM_NETFN, IPMI_GET_REBOOT_CAUSE) - hx_cause = raw_cause.split()[0] if status and len( - raw_cause.split()) > 0 else 00 - reboot_cause = { - "00": self.REBOOT_CAUSE_HARDWARE_OTHER, - "11": self.REBOOT_CAUSE_POWER_LOSS, - "22": self.REBOOT_CAUSE_NON_HARDWARE, - "33": self.REBOOT_CAUSE_HARDWARE_OTHER, - "44": self.REBOOT_CAUSE_NON_HARDWARE, - "55": self.REBOOT_CAUSE_NON_HARDWARE, - "66": self.REBOOT_CAUSE_WATCHDOG, - "77": self.REBOOT_CAUSE_NON_HARDWARE - }.get(hx_cause, self.REBOOT_CAUSE_HARDWARE_OTHER) - - description = { - "00": "Unknown reason", - "11": "The last reset is Power on reset", - "22": "The last reset is soft-set CPU warm reset", - "33": "The last reset is soft-set CPU cold reset", - "44": "The last reset is CPU warm reset", - "55": "The last reset is CPU cold reset", - "66": "The last reset is watchdog reset", - "77": "The last reset is power cycle reset" - }.get(hx_cause, "Unknown reason") - - return (reboot_cause, description) diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/component.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/component.py deleted file mode 100644 index ba7742c66b60..000000000000 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/component.py +++ /dev/null @@ -1,118 +0,0 @@ -############################################################################# -# Celestica -# -# Component contains an implementation of SONiC Platform Base API and -# provides the components firmware management function -# -############################################################################# - -import os.path - -try: - from sonic_platform_base.component_base import ComponentBase - from .helper import APIHelper -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - -COMPONENT_LIST = [ - ("BIOS", "Basic Input/Output System"), - ("BMC", "Baseboard Management Controller"), - ("SWITCH_CPLD", "Switch board CPLD"), - ("BASE_CPLD", "Base board CPLD"), - ("FPGA", "Field-programmable gate array") -] -SW_CPLD_VER_PATH = "/sys/module/switch_cpld/version" -BASE_CPLD_VER_PATH = "/sys/module/baseboard_lpc/version" -BIOS_VER_PATH = "/sys/class/dmi/id/bios_version" -BMC_VER_CMD1 = ["ipmitool", "mc", "info"] -BMC_VER_CMD2 = ["grep", "Firmware Revision"] -CFUFLASH_FW_UPGRADE_CMD = ["CFUFLASH", "-cd", "-d", "", "-mse", "3", ""] -MEM_PCI_RESOURCE = "/sys/bus/pci/devices/0000:09:00.0/resource0" -FPGA_VER_MEM_OFFSET = 0 -UPGRADE_OPT = { - 'BMC': '1', - 'BIOS': '2', - 'SWITCH_CPLD': '4', - 'BASE_CPLD': '4' -} - - -class Component(ComponentBase): - """Platform-specific Component class""" - - DEVICE_TYPE = "component" - - def __init__(self, component_index): - ComponentBase.__init__(self) - self.index = component_index - self.name = self.get_name() - self._api_helper = APIHelper() - - def __get_bmc_ver(self): - bmc_ver = "Unknown" - status, raw_bmc_data = self._api_helper.run_command(BMC_VER_CMD1, BMC_VER_CMD2) - if status: - bmc_ver_data = raw_bmc_data.split(":") - bmc_ver = bmc_ver_data[-1].strip() if len( - bmc_ver_data) > 1 else bmc_ver - return bmc_ver - - def __get_fpga_ver(self): - fpga_ver = "Unknown" - status, reg_val = self._api_helper.pci_get_value( - MEM_PCI_RESOURCE, FPGA_VER_MEM_OFFSET) - if status: - major = reg_val[0] >> 16 - minor = int(bin(reg_val[0])[16:32], 2) - fpga_ver = '{}.{}'.format(major, minor) - return fpga_ver - - def get_name(self): - """ - Retrieves the name of the component - Returns: - A string containing the name of the component - """ - return COMPONENT_LIST[self.index][0] - - def get_description(self): - """ - Retrieves the description of the component - Returns: - A string containing the description of the component - """ - return COMPONENT_LIST[self.index][1] - - def get_firmware_version(self): - """ - Retrieves the firmware version of module - Returns: - string: The firmware versions of the module - """ - fw_version = { - "BIOS": self._api_helper.read_txt_file(BIOS_VER_PATH), - "BMC": self.__get_bmc_ver(), - "FPGA": self.__get_fpga_ver(), - "SWITCH_CPLD": self._api_helper.read_txt_file(SW_CPLD_VER_PATH), - "BASE_CPLD": self._api_helper.read_txt_file(BASE_CPLD_VER_PATH), - }.get(self.name, "Unknown") - - return fw_version - - def install_firmware(self, image_path): - """ - Install firmware to module - Args: - image_path: A string, path to firmware image - Returns: - A boolean, True if install successfully, False if not - """ - CFUFLASH_FW_UPGRADE_CMD[3] = UPGRADE_OPT.get(self.name) - CFUFLASH_FW_UPGRADE_CMD[6] = image_path - - if not os.path.isfile(image_path): - return False - - # print(install_command) - status = self._api_helper.run_interactive_command(CFUFLASH_FW_UPGRADE_CMD) - return status diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/eeprom.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/eeprom.py deleted file mode 100644 index cf3f1a98de20..000000000000 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/eeprom.py +++ /dev/null @@ -1,117 +0,0 @@ -############################################################################# -# Celestica Silverstone -# -# Platform and model specific eeprom subclass, inherits from the base class, -# and provides the followings: -# - the eeprom format definition -# - specific encoder/decoder if there is special need -############################################################################# - -try: - import glob - import os - import sys - import re - from array import array - - if sys.version_info.major == 3: - from io import StringIO - else: - from cStringIO import StringIO - - from sonic_platform_base.sonic_eeprom import eeprom_dts - from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - -CACHE_ROOT = '/var/cache/sonic/decode-syseeprom' -CACHE_FILE = 'syseeprom_cache' -TLV_EEPROM_I2C_BUS = 0 -TLV_EEPROM_I2C_ADDR = 56 - - -class Tlv(eeprom_tlvinfo.TlvInfoDecoder): - - EEPROM_DECODE_HEADLINES = 6 - - def __init__(self): - self._eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-00{1}/eeprom".format( - TLV_EEPROM_I2C_BUS, TLV_EEPROM_I2C_ADDR) - super(Tlv, self).__init__(self._eeprom_path, 0, '', True) - self._eeprom = self._load_eeprom() - - def __parse_output(self, decode_output): - decode_output.replace('\0', '') - lines = decode_output.split('\n') - lines = lines[self.EEPROM_DECODE_HEADLINES:] - _eeprom_info_dict = dict() - - for line in lines: - try: - match = re.search( - '(0x[0-9a-fA-F]{2})([\s]+[\S]+[\s]+)([\S]+)', line) - if match is not None: - idx = match.group(1) - value = match.group(3).rstrip('\0') - - _eeprom_info_dict[idx] = value - except: - pass - return _eeprom_info_dict - - def _load_eeprom(self): - original_stdout = sys.stdout - sys.stdout = StringIO() - try: - self.read_eeprom_db() - except: - decode_output = sys.stdout.getvalue() - sys.stdout = original_stdout - return self.__parse_output(decode_output) - - status = self.check_status() - if 'ok' not in status: - return False - - if not os.path.exists(CACHE_ROOT): - try: - os.makedirs(CACHE_ROOT) - except: - pass - - # - # only the eeprom classes that inherit from eeprom_base - # support caching. Others will work normally - # - try: - self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE)) - except: - pass - - e = self.read_eeprom() - if e is None: - return 0 - - try: - self.update_cache(e) - except: - pass - - self.decode_eeprom(e) - decode_output = sys.stdout.getvalue() - sys.stdout = original_stdout - - (is_valid, valid_crc) = self.is_checksum_valid(e) - if not is_valid: - return False - - return self.__parse_output(decode_output) - - def get_eeprom(self): - return self._eeprom - - def get_serial(self): - return self._eeprom.get('0x23', "Undefined.") - - def get_mac(self): - return self._eeprom.get('0x24', "Undefined.") diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/helper.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/helper.py deleted file mode 100644 index d53de841eeee..000000000000 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/helper.py +++ /dev/null @@ -1,111 +0,0 @@ -import os -import struct -import subprocess -from mmap import * -from sonic_py_common.general import check_output_pipe - -HOST_CHK_CMD = ["docker"] -EMPTY_STRING = "" - - -class APIHelper(): - - def __init__(self): - pass - - def is_host(self): - try: - subprocess.call(HOST_CHK_CMD, stdout=subprocess.DEVNULL, stderr=subprocess.DEVNULL) - except FileNotFoundError: - return False - return True - - def pci_get_value(self, resource, offset): - status = True - result = "" - try: - fd = os.open(resource, os.O_RDWR) - mm = mmap(fd, 0) - mm.seek(int(offset)) - read_data_stream = mm.read(4) - result = struct.unpack('I', read_data_stream) - except: - status = False - return status, result - - def run_command(self, cmd1_args, cmd2_args): - status = True - result = "" - try: - result = check_output_pipe(cmd1_args, cmd2_args) - except subprocess.CalledProcessError: - status = False - return status, result - - def run_interactive_command(self, cmd): - try: - subprocess.call(cmd) - except: - return False - return True - - def read_txt_file(self, file_path): - try: - with open(file_path, 'r') as fd: - data = fd.read() - return data.strip() - except IOError: - pass - return None - - def ipmi_raw(self, netfn, cmd): - status = True - result = "" - try: - cmd = ["ipmitool", "raw", str(netfn), str(cmd)] - p = subprocess.Popen( - cmd, universal_newlines=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE) - raw_data, err = p.communicate() - if err == '': - result = raw_data.strip() - else: - status = False - except: - status = False - return status, result - - def ipmi_fru_id(self, id, key=None): - status = True - result = "" - cmd1_args = ["ipmitool", "fru", "print", str(id)] - if not key: - try: - p = subprocess.Popen( - cmd1_args, universal_newlines=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE) - raw_data, err = p.communicate() - if err == '': - result = raw_data.strip() - else: - status = False - except: - status = False - else: - cmd2_args = ["grep", str(key)] - status, result = self.run_command(cmd1_args, cmd2_args) - return status, result - - def ipmi_set_ss_thres(self, id, threshold_key, value): - status = True - result = "" - try: - cmd = ["ipmitool", "sensor", "thresh", str(id), str(threshold_key), str(value)] - p = subprocess.Popen( - cmd, universal_newlines=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE) - raw_data, err = p.communicate() - if err == '': - result = raw_data.strip() - else: - status = False - except: - status = False - return status, result diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/psu.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/psu.py deleted file mode 100644 index a6c805d3ca4f..000000000000 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/psu.py +++ /dev/null @@ -1,236 +0,0 @@ -############################################################################# -# Celestica -# -# Module contains an implementation of SONiC Platform Base API and -# provides the PSUs status which are available in the platform -# -############################################################################# - -import os -import re -import math -import sonic_platform - -try: - from sonic_platform_base.psu_base import PsuBase - from .helper import APIHelper - from sonic_platform.fan import Fan -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - -PSU_NAME_LIST = ["PSU-1", "PSU-2"] -PSU_NUM_FAN = [1, 1] - -IPMI_SENSOR_NETFN = "0x04" -IPMI_OEM_NETFN = "0x3A" -IPMI_SS_READ_CMD = "0x2D {}" -IPMI_SET_PSU_LED_CMD = "0x07 0x02 {}" -IPMI_GET_PSU_LED_CMD = "0x08 0x02" -IPMI_FRU_MODEL_KEY = "Board Part Number" -IPMI_FRU_SERIAL_KEY = "Board Serial" - -PSU_LED_OFF_CMD = "0x00" -PSU_LED_GREEN_CMD = "0x01" -PSU_LED_AMBER_CMD = "0x02" - -PSU1_FRU_ID = 3 - -SS_READ_OFFSET = 0 - -PSU_VOUT_SS_ID = ["0x36", "0x40"] -PSU_COUT_SS_ID = ["0x37", "0x41"] -PSU_POUT_SS_ID = ["0x38", "0x42"] -PSU_STATUS_REG = ["0x39", "0x2f"] - - -class Psu(PsuBase): - """Platform-specific Psu class""" - - def __init__(self, psu_index): - PsuBase.__init__(self) - self.index = psu_index - for fan_index in range(0, PSU_NUM_FAN[self.index]): - fan = Fan(fan_index, 0, is_psu_fan=True, psu_index=self.index) - self._fan_list.append(fan) - self._api_helper = APIHelper() - - def find_value(self, in_string): - result = re.search("^.+ ([0-9a-f]{2}) .+$", in_string) - return result.group(1) if result else result - - def get_voltage(self): - """ - Retrieves current PSU voltage output - Returns: - A float number, the output voltage in volts, - e.g. 12.1 - """ - psu_voltage = 0.0 - psu_vout_key = PSU_VOUT_SS_ID[self.index] - status, raw_ss_read = self._api_helper.ipmi_raw( - IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_vout_key)) - ss_read = raw_ss_read.split()[SS_READ_OFFSET] - # Formula: Rx1x10^-1 - psu_voltage = int(ss_read, 16) * math.pow(10, -1) - - return psu_voltage - - def get_current(self): - """ - Retrieves present electric current supplied by PSU - Returns: - A float number, the electric current in amperes, e.g 15.4 - """ - psu_current = 0.0 - psu_cout_key = PSU_COUT_SS_ID[self.index] - status, raw_ss_read = self._api_helper.ipmi_raw( - IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_cout_key)) - ss_read = raw_ss_read.split()[SS_READ_OFFSET] - # Formula: Rx5x10^-1 - psu_current = int(ss_read, 16) * 5 * math.pow(10, -1) - - return psu_current - - def get_power(self): - """ - Retrieves current energy supplied by PSU - Returns: - A float number, the power in watts, e.g. 302.6 - """ - psu_power = 0.0 - psu_pout_key = PSU_POUT_SS_ID[self.index] - status, raw_ss_read = self._api_helper.ipmi_raw( - IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_pout_key)) - ss_read = raw_ss_read.split()[SS_READ_OFFSET] - # Formula: Rx6x10^0 - psu_power = int(ss_read, 16) * 6 - return psu_power - - def get_powergood_status(self): - """ - Retrieves the powergood status of PSU - Returns: - A boolean, True if PSU has stablized its output voltages and passed all - its internal self-tests, False if not. - """ - return self.get_status() - - def set_status_led(self, color): - """ - Sets the state of the PSU status LED - Args: - color: A string representing the color with which to set the PSU status LED - Note: Only support green and off - Returns: - bool: True if status LED state is set successfully, False if not - Note - Set manual - ipmitool raw 0x3a 0x09 0x2 0x0 - """ - led_cmd = { - self.STATUS_LED_COLOR_GREEN: PSU_LED_GREEN_CMD, - self.STATUS_LED_COLOR_AMBER: PSU_LED_AMBER_CMD, - self.STATUS_LED_COLOR_OFF: PSU_LED_OFF_CMD - }.get(color) - - status, set_led = self._api_helper.ipmi_raw( - IPMI_OEM_NETFN, IPMI_SET_PSU_LED_CMD.format(led_cmd)) - set_status_led = False if not status else True - - return set_status_led - - def get_status_led(self): - """ - Gets the state of the PSU status LED - Returns: - A string, one of the predefined STATUS_LED_COLOR_* strings above - """ - status, hx_color = self._api_helper.ipmi_raw( - IPMI_OEM_NETFN, IPMI_GET_PSU_LED_CMD) - - status_led = { - "00": self.STATUS_LED_COLOR_OFF, - "01": self.STATUS_LED_COLOR_GREEN, - "02": self.STATUS_LED_COLOR_AMBER, - }.get(hx_color, self.STATUS_LED_COLOR_OFF) - - return status_led - - def get_name(self): - """ - Retrieves the name of the device - Returns: - string: The name of the device - """ - return PSU_NAME_LIST[self.index] - - def get_presence(self): - """ - Retrieves the presence of the PSU - Returns: - bool: True if PSU is present, False if not - """ - psu_presence = False - psu_pstatus_key = PSU_STATUS_REG[self.index] - status, raw_status_read = self._api_helper.ipmi_raw( - IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_pstatus_key)) - status_byte = self.find_value(raw_status_read) - - if status: - presence_int = (int(status_byte, 16) >> 0) & 1 - psu_presence = True if presence_int else False - - return psu_presence - - def get_model(self): - """ - Retrieves the model number (or part number) of the device - Returns: - string: Model/part number of device - """ - model = "Unknown" - ipmi_fru_idx = self.index + PSU1_FRU_ID - status, raw_model = self._api_helper.ipmi_fru_id( - ipmi_fru_idx, IPMI_FRU_MODEL_KEY) - - fru_pn_list = raw_model.split() - if len(fru_pn_list) > 4: - model = fru_pn_list[4] - - return model - - def get_serial(self): - """ - Retrieves the serial number of the device - Returns: - string: Serial number of device - """ - serial = "Unknown" - ipmi_fru_idx = self.index + PSU1_FRU_ID - status, raw_model = self._api_helper.ipmi_fru_id( - ipmi_fru_idx, IPMI_FRU_SERIAL_KEY) - - fru_sr_list = raw_model.split() - if len(fru_sr_list) > 3: - serial = fru_sr_list[3] - - return serial - - def get_status(self): - """ - Retrieves the operational status of the device - Returns: - A boolean value, True if device is operating properly, False if not - """ - psu_status = False - psu_pstatus_key = PSU_STATUS_REG[self.index] - status, raw_status_read = self._api_helper.ipmi_raw( - IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_pstatus_key)) - status_byte = self.find_value(raw_status_read) - - if status: - failure_detected = (int(status_byte, 16) >> 1) & 1 - input_lost = (int(status_byte, 16) >> 3) & 1 - psu_status = False if (input_lost or failure_detected) else True - - return psu_status diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/sfp.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/sfp.py deleted file mode 100644 index 4ad97b42fff3..000000000000 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/sfp.py +++ /dev/null @@ -1,1467 +0,0 @@ -############################################################################# -# Celestica -# -# Sfp contains an implementation of SONiC Platform Base API and -# provides the sfp device status which are available in the platform -# -############################################################################# - -import time -import subprocess -from ctypes import create_string_buffer - -try: - from sonic_platform_base.sfp_base import SfpBase - from sonic_platform_base.sonic_eeprom import eeprom_dts - from sonic_platform_base.sonic_sfp.sff8472 import sff8472InterfaceId - from sonic_platform_base.sonic_sfp.sff8472 import sff8472Dom - from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId - from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom - from sonic_platform_base.sonic_sfp.inf8628 import inf8628InterfaceId - from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - -INFO_OFFSET = 128 -DOM_OFFSET = 0 - -# definitions of the offset and width for values in XCVR info eeprom -XCVR_INTFACE_BULK_OFFSET = 0 -XCVR_INTFACE_BULK_WIDTH_QSFP = 20 -XCVR_INTFACE_BULK_WIDTH_SFP = 21 -XCVR_TYPE_OFFSET = 0 -XCVR_TYPE_WIDTH = 1 -XCVR_EXT_TYPE_OFFSET = 1 -XCVR_EXT_TYPE_WIDTH = 1 -XCVR_CONNECTOR_OFFSET = 2 -XCVR_CONNECTOR_WIDTH = 1 -XCVR_COMPLIANCE_CODE_OFFSET = 3 -XCVR_COMPLIANCE_CODE_WIDTH = 8 -XCVR_ENCODING_OFFSET = 11 -XCVR_ENCODING_WIDTH = 1 -XCVR_NBR_OFFSET = 12 -XCVR_NBR_WIDTH = 1 -XCVR_EXT_RATE_SEL_OFFSET = 13 -XCVR_EXT_RATE_SEL_WIDTH = 1 -XCVR_CABLE_LENGTH_OFFSET = 14 -XCVR_CABLE_LENGTH_WIDTH_QSFP = 5 -XCVR_CABLE_LENGTH_WIDTH_SFP = 6 -XCVR_VENDOR_NAME_OFFSET = 20 -XCVR_VENDOR_NAME_WIDTH = 16 -XCVR_VENDOR_OUI_OFFSET = 37 -XCVR_VENDOR_OUI_WIDTH = 3 -XCVR_VENDOR_PN_OFFSET = 40 -XCVR_VENDOR_PN_WIDTH = 16 -XCVR_HW_REV_OFFSET = 56 -XCVR_HW_REV_WIDTH_OSFP = 2 -XCVR_HW_REV_WIDTH_QSFP = 2 -XCVR_HW_REV_WIDTH_SFP = 4 -XCVR_VENDOR_SN_OFFSET = 68 -XCVR_VENDOR_SN_WIDTH = 16 -XCVR_VENDOR_DATE_OFFSET = 84 -XCVR_VENDOR_DATE_WIDTH = 8 -XCVR_DOM_CAPABILITY_OFFSET = 92 -XCVR_DOM_CAPABILITY_WIDTH = 2 - -XCVR_INTERFACE_DATA_START = 0 -XCVR_INTERFACE_DATA_SIZE = 92 - -QSFP_DOM_BULK_DATA_START = 22 -QSFP_DOM_BULK_DATA_SIZE = 36 -SFP_DOM_BULK_DATA_START = 96 -SFP_DOM_BULK_DATA_SIZE = 10 - -# definitions of the offset for values in OSFP info eeprom -OSFP_TYPE_OFFSET = 0 -OSFP_VENDOR_NAME_OFFSET = 129 -OSFP_VENDOR_PN_OFFSET = 148 -OSFP_HW_REV_OFFSET = 164 -OSFP_VENDOR_SN_OFFSET = 166 - -# Offset for values in QSFP eeprom -QSFP_DOM_REV_OFFSET = 1 -QSFP_DOM_REV_WIDTH = 1 -QSFP_TEMPE_OFFSET = 22 -QSFP_TEMPE_WIDTH = 2 -QSFP_VOLT_OFFSET = 26 -QSFP_VOLT_WIDTH = 2 -QSFP_VERSION_COMPLIANCE_OFFSET = 1 -QSFP_VERSION_COMPLIANCE_WIDTH = 2 -QSFP_CHANNL_MON_OFFSET = 34 -QSFP_CHANNL_MON_WIDTH = 16 -QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH = 24 -QSFP_CHANNL_DISABLE_STATUS_OFFSET = 86 -QSFP_CHANNL_DISABLE_STATUS_WIDTH = 1 -QSFP_CHANNL_RX_LOS_STATUS_OFFSET = 3 -QSFP_CHANNL_RX_LOS_STATUS_WIDTH = 1 -QSFP_CHANNL_TX_FAULT_STATUS_OFFSET = 4 -QSFP_CHANNL_TX_FAULT_STATUS_WIDTH = 1 -QSFP_CONTROL_OFFSET = 86 -QSFP_CONTROL_WIDTH = 8 -QSFP_MODULE_MONITOR_OFFSET = 0 -QSFP_MODULE_MONITOR_WIDTH = 9 -QSFP_POWEROVERRIDE_OFFSET = 93 -QSFP_POWEROVERRIDE_WIDTH = 1 -QSFP_POWEROVERRIDE_BIT = 0 -QSFP_POWERSET_BIT = 1 -QSFP_OPTION_VALUE_OFFSET = 192 -QSFP_OPTION_VALUE_WIDTH = 4 -QSFP_MODULE_UPPER_PAGE3_START = 384 -QSFP_MODULE_THRESHOLD_OFFSET = 128 -QSFP_MODULE_THRESHOLD_WIDTH = 24 -QSFP_CHANNL_THRESHOLD_OFFSET = 176 -QSFP_CHANNL_THRESHOLD_WIDTH = 24 - -SFP_MODULE_ADDRA2_OFFSET = 256 -SFP_MODULE_THRESHOLD_OFFSET = 0 -SFP_MODULE_THRESHOLD_WIDTH = 56 -SFP_CHANNL_THRESHOLD_OFFSET = 112 -SFP_CHANNL_THRESHOLD_WIDTH = 2 - -SFP_TEMPE_OFFSET = 96 -SFP_TEMPE_WIDTH = 2 -SFP_VOLT_OFFSET = 98 -SFP_VOLT_WIDTH = 2 -SFP_CHANNL_MON_OFFSET = 100 -SFP_CHANNL_MON_WIDTH = 6 -SFP_CHANNL_STATUS_OFFSET = 110 -SFP_CHANNL_STATUS_WIDTH = 1 - - -qsfp_cable_length_tup = ('Length(km)', 'Length OM3(2m)', - 'Length OM2(m)', 'Length OM1(m)', - 'Length Cable Assembly(m)') - -sfp_cable_length_tup = ('LengthSMFkm-UnitsOfKm', 'LengthSMF(UnitsOf100m)', - 'Length50um(UnitsOf10m)', 'Length62.5um(UnitsOfm)', - 'LengthCable(UnitsOfm)', 'LengthOM3(UnitsOf10m)') - -sfp_compliance_code_tup = ('10GEthernetComplianceCode', 'InfinibandComplianceCode', - 'ESCONComplianceCodes', 'SONETComplianceCodes', - 'EthernetComplianceCodes', 'FibreChannelLinkLength', - 'FibreChannelTechnology', 'SFP+CableTechnology', - 'FibreChannelTransmissionMedia', 'FibreChannelSpeed') - -qsfp_compliance_code_tup = ('10/40G Ethernet Compliance Code', 'SONET Compliance codes', - 'SAS/SATA compliance codes', 'Gigabit Ethernet Compliant codes', - 'Fibre Channel link length/Transmitter Technology', - 'Fibre Channel transmission media', 'Fibre Channel Speed') - -SFP_TYPE = "SFP" -QSFP_TYPE = "QSFP" -OSFP_TYPE = "OSFP" - -PORT_START = 1 -PORT_END = 34 -OSFP_PORT_START = 1 -OSFP_PORT_END = 32 -SFP_PORT_START = 33 -SFP_PORT_END = 34 - -PORT_INFO_PATH = '/sys/devices/platform/cls-xcvr' - - -class Sfp(SfpBase): - """Platform-specific Sfp class""" - - # Path to QSFP sysfs - PLATFORM_ROOT_PATH = "/usr/share/sonic/device" - PMON_HWSKU_PATH = "/usr/share/sonic/hwsku" - HOST_CHK_CMD = ["docker"] - - PLATFORM = "x86_64-cel_silverstone-r0" - HWSKU = "Silverstone" - - def __init__(self, sfp_index): - SfpBase.__init__(self) - # Init index - self.index = sfp_index - self.port_num = self.index + 1 - self.dom_supported = False - self.sfp_type, self.port_name = self.__get_sfp_info() - - # Init eeprom path - eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' - self.port_to_eeprom_mapping = {} - self.port_to_i2c_mapping = { - 1: 10, - 2: 11, - 3: 12, - 4: 13, - 5: 14, - 6: 15, - 7: 16, - 8: 17, - 9: 18, - 10: 19, - 11: 20, - 12: 21, - 13: 22, - 14: 23, - 15: 24, - 16: 25, - 17: 26, - 18: 27, - 19: 28, - 20: 29, - 21: 30, - 22: 31, - 23: 32, - 24: 33, - 25: 34, - 26: 35, - 27: 36, - 28: 37, - 29: 38, - 30: 39, - 31: 40, - 32: 41, - 33: 1, - 34: 2 - } - - for x in range(PORT_START, PORT_END + 1): - port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) - self.port_to_eeprom_mapping[x] = port_eeprom_path - - self.info_dict_keys = ['type', 'vendor_rev', 'serial', 'manufacturer', 'model', 'connector', 'encoding', 'ext_identifier', - 'ext_rateselect_compliance', 'cable_type', 'cable_length', 'nominal_bit_rate', 'specification_compliance', 'vendor_date', 'vendor_oui'] - - self.dom_dict_keys = ['rx_los', 'tx_fault', 'reset_status', 'power_lpmode', 'tx_disable', 'tx_disable_channel', 'temperature', 'voltage', - 'rx1power', 'rx2power', 'rx3power', 'rx4power', 'tx1bias', 'tx2bias', 'tx3bias', 'tx4bias', 'tx1power', 'tx2power', 'tx3power', 'tx4power'] - - self.threshold_dict_keys = ['temphighalarm', 'temphighwarning', 'templowalarm', 'templowwarning', 'vcchighalarm', 'vcchighwarning', 'vcclowalarm', 'vcclowwarning', 'rxpowerhighalarm', 'rxpowerhighwarning', - 'rxpowerlowalarm', 'rxpowerlowwarning', 'txpowerhighalarm', 'txpowerhighwarning', 'txpowerlowalarm', 'txpowerlowwarning', 'txbiashighalarm', 'txbiashighwarning', 'txbiaslowalarm', 'txbiaslowwarning'] - - self._dom_capability_detect() - - def __get_sfp_info(self): - port_num = self.index + PORT_START - sfp_type = OSFP_PORT_START - port_name = "Unknown" - - if port_num >= OSFP_PORT_START and port_num <= OSFP_PORT_END: - sfp_type = OSFP_TYPE - port_name = "QSFP" + str(port_num - OSFP_PORT_START + 1) - elif port_num >= SFP_PORT_START and port_num <= SFP_PORT_END: - sfp_type = SFP_TYPE - port_name = "SFP" + str(port_num - SFP_PORT_START + 1) - return sfp_type, port_name - - def __convert_string_to_num(self, value_str): - if "-inf" in value_str: - return 'N/A' - elif "Unknown" in value_str: - return 'N/A' - elif 'dBm' in value_str: - t_str = value_str.rstrip('dBm') - return float(t_str) - elif 'mA' in value_str: - t_str = value_str.rstrip('mA') - return float(t_str) - elif 'C' in value_str: - t_str = value_str.rstrip('C') - return float(t_str) - elif 'Volts' in value_str: - t_str = value_str.rstrip('Volts') - return float(t_str) - else: - return 'N/A' - - def __is_host(self): - try: - subprocess.call(self.HOST_CHK_CMD, stdout=subprocess.DEVNULL, stderr=subprocess.DEVNULL) - except FileNotFoundError: - return False - return True - - def __get_path_to_port_config_file(self): - platform_path = "/".join([self.PLATFORM_ROOT_PATH, self.PLATFORM]) - hwsku_path = "/".join([platform_path, self.HWSKU] - ) if self.__is_host() else self.PMON_HWSKU_PATH - return "/".join([hwsku_path, "port_config.ini"]) - - def __read_eeprom_specific_bytes(self, offset, num_bytes): - sysfsfile_eeprom = None - eeprom_raw = [] - for i in range(0, num_bytes): - eeprom_raw.append("0x00") - - sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[self.port_num] - try: - sysfsfile_eeprom = open( - sysfs_sfp_i2c_client_eeprom_path, mode="rb", buffering=0) - sysfsfile_eeprom.seek(offset) - raw = sysfsfile_eeprom.read(num_bytes) - for n in range(0, num_bytes): - eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) - except: - pass - finally: - if sysfsfile_eeprom: - sysfsfile_eeprom.close() - - return eeprom_raw - - def _dom_capability_detect(self): - if not self.get_presence(): - self.dom_supported = False - self.dom_temp_supported = False - self.dom_volt_supported = False - self.dom_rx_power_supported = False - self.dom_tx_power_supported = False - self.calibration = 0 - return - - if self.sfp_type == "QSFP": - self.calibration = 1 - sfpi_obj = sff8436InterfaceId() - if sfpi_obj is None: - self.dom_supported = False - offset = 128 - - # QSFP capability byte parse, through this byte can know whether it support tx_power or not. - # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436, - # need to add more code for determining the capability and version compliance - # in SFF-8636 dom capability definitions evolving with the versions. - qsfp_dom_capability_raw = self.__read_eeprom_specific_bytes( - (offset + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH) - if qsfp_dom_capability_raw is not None: - qsfp_version_compliance_raw = self.__read_eeprom_specific_bytes( - QSFP_VERSION_COMPLIANCE_OFFSET, QSFP_VERSION_COMPLIANCE_WIDTH) - qsfp_version_compliance = int( - qsfp_version_compliance_raw[0], 16) - dom_capability = sfpi_obj.parse_dom_capability( - qsfp_dom_capability_raw, 0) - if qsfp_version_compliance >= 0x08: - self.dom_temp_supported = dom_capability['data']['Temp_support']['value'] == 'On' - self.dom_volt_supported = dom_capability['data']['Voltage_support']['value'] == 'On' - self.dom_rx_power_supported = dom_capability['data']['Rx_power_support']['value'] == 'On' - self.dom_tx_power_supported = dom_capability['data']['Tx_power_support']['value'] == 'On' - else: - self.dom_temp_supported = True - self.dom_volt_supported = True - self.dom_rx_power_supported = dom_capability['data']['Rx_power_support']['value'] == 'On' - self.dom_tx_power_supported = True - - self.dom_supported = True - self.calibration = 1 - sfpd_obj = sff8436Dom() - if sfpd_obj is None: - return None - qsfp_option_value_raw = self.__read_eeprom_specific_bytes( - QSFP_OPTION_VALUE_OFFSET, QSFP_OPTION_VALUE_WIDTH) - if qsfp_option_value_raw is not None: - optional_capability = sfpd_obj.parse_option_params( - qsfp_option_value_raw, 0) - self.dom_tx_disable_supported = optional_capability[ - 'data']['TxDisable']['value'] == 'On' - dom_status_indicator = sfpd_obj.parse_dom_status_indicator( - qsfp_version_compliance_raw, 1) - self.qsfp_page3_available = dom_status_indicator['data']['FlatMem']['value'] == 'Off' - else: - self.dom_supported = False - self.dom_temp_supported = False - self.dom_volt_supported = False - self.dom_rx_power_supported = False - self.dom_tx_power_supported = False - self.calibration = 0 - self.qsfp_page3_available = False - - elif self.sfp_type == "SFP": - sfpi_obj = sff8472InterfaceId() - if sfpi_obj is None: - return None - sfp_dom_capability_raw = self.__read_eeprom_specific_bytes( - XCVR_DOM_CAPABILITY_OFFSET, XCVR_DOM_CAPABILITY_WIDTH) - if sfp_dom_capability_raw is not None: - sfp_dom_capability = int(sfp_dom_capability_raw[0], 16) - self.dom_supported = (sfp_dom_capability & 0x40 != 0) - if self.dom_supported: - self.dom_temp_supported = True - self.dom_volt_supported = True - self.dom_rx_power_supported = True - self.dom_tx_power_supported = True - if sfp_dom_capability & 0x20 != 0: - self.calibration = 1 - elif sfp_dom_capability & 0x10 != 0: - self.calibration = 2 - else: - self.calibration = 0 - else: - self.dom_temp_supported = False - self.dom_volt_supported = False - self.dom_rx_power_supported = False - self.dom_tx_power_supported = False - self.calibration = 0 - self.dom_tx_disable_supported = ( - int(sfp_dom_capability_raw[1], 16) & 0x40 != 0) - else: - self.dom_supported = False - self.dom_temp_supported = False - self.dom_volt_supported = False - self.dom_rx_power_supported = False - self.dom_tx_power_supported = False - - def get_transceiver_info(self): - """ - Retrieves transceiver info of this SFP - Returns: - A dict which contains following keys/values : - ======================================================================== - keys |Value Format |Information - ---------------------------|---------------|---------------------------- - type |1*255VCHAR |type of SFP - vendor_rev |1*255VCHAR |vendor revision of SFP - serial |1*255VCHAR |serial number of the SFP - manufacturer |1*255VCHAR |SFP vendor name - model |1*255VCHAR |SFP model name - connector |1*255VCHAR |connector information - encoding |1*255VCHAR |encoding information - ext_identifier |1*255VCHAR |extend identifier - ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance - cable_length |INT |cable length in m - nominal_bit_rate |INT |nominal bit rate by 100Mbs - specification_compliance |1*255VCHAR |specification compliance - vendor_date |1*255VCHAR |vendor date - vendor_oui |1*255VCHAR |vendor OUI - ======================================================================== - """ - compliance_code_dict = {} - transceiver_info_dict = dict.fromkeys(self.info_dict_keys, 'N/A') - if not self.get_presence(): - return transceiver_info_dict - - # ToDo: OSFP tranceiver info parsing not fully supported. - # in inf8628.py lack of some memory map definition - # will be implemented when the inf8628 memory map ready - if self.sfp_type == OSFP_TYPE: - offset = 0 - vendor_rev_width = XCVR_HW_REV_WIDTH_OSFP - - sfpi_obj = inf8628InterfaceId() - if sfpi_obj is None: - return None - - sfp_type_raw = self.__read_eeprom_specific_bytes( - (offset + OSFP_TYPE_OFFSET), XCVR_TYPE_WIDTH) - if sfp_type_raw is not None: - sfp_type_data = sfpi_obj.parse_sfp_type(sfp_type_raw, 0) - else: - return None - - sfp_vendor_name_raw = self.__read_eeprom_specific_bytes( - (offset + OSFP_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) - if sfp_vendor_name_raw is not None: - sfp_vendor_name_data = sfpi_obj.parse_vendor_name( - sfp_vendor_name_raw, 0) - else: - return None - - sfp_vendor_pn_raw = self.__read_eeprom_specific_bytes( - (offset + OSFP_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) - if sfp_vendor_pn_raw is not None: - sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn( - sfp_vendor_pn_raw, 0) - else: - return None - - sfp_vendor_rev_raw = self.__read_eeprom_specific_bytes( - (offset + OSFP_HW_REV_OFFSET), vendor_rev_width) - if sfp_vendor_rev_raw is not None: - sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev( - sfp_vendor_rev_raw, 0) - else: - return None - - sfp_vendor_sn_raw = self.__read_eeprom_specific_bytes( - (offset + OSFP_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) - if sfp_vendor_sn_raw is not None: - sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn( - sfp_vendor_sn_raw, 0) - else: - return None - - transceiver_info_dict['type'] = sfp_type_data['data']['type']['value'] - transceiver_info_dict['manufacturer'] = sfp_vendor_name_data['data']['Vendor Name']['value'] - transceiver_info_dict['model'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] - transceiver_info_dict['vendor_rev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] - transceiver_info_dict['serial'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] - transceiver_info_dict['vendor_oui'] = 'N/A' - transceiver_info_dict['vendor_date'] = 'N/A' - transceiver_info_dict['connector'] = 'N/A' - transceiver_info_dict['encoding'] = 'N/A' - transceiver_info_dict['ext_identifier'] = 'N/A' - transceiver_info_dict['ext_rateselect_compliance'] = 'N/A' - transceiver_info_dict['cable_type'] = 'N/A' - transceiver_info_dict['cable_length'] = 'N/A' - transceiver_info_dict['specification_compliance'] = 'N/A' - transceiver_info_dict['nominal_bit_rate'] = 'N/A' - - else: - if self.sfp_type == QSFP_TYPE: - offset = 128 - vendor_rev_width = XCVR_HW_REV_WIDTH_QSFP - cable_length_width = XCVR_CABLE_LENGTH_WIDTH_QSFP - interface_info_bulk_width = XCVR_INTFACE_BULK_WIDTH_QSFP - sfp_type = 'QSFP' - - sfpi_obj = sff8436InterfaceId() - if sfpi_obj is None: - print("Error: sfp_object open failed") - return None - - else: - offset = 0 - vendor_rev_width = XCVR_HW_REV_WIDTH_SFP - cable_length_width = XCVR_CABLE_LENGTH_WIDTH_SFP - interface_info_bulk_width = XCVR_INTFACE_BULK_WIDTH_SFP - sfp_type = 'SFP' - - sfpi_obj = sff8472InterfaceId() - if sfpi_obj is None: - print("Error: sfp_object open failed") - return None - sfp_interface_bulk_raw = self.__read_eeprom_specific_bytes( - offset + XCVR_INTERFACE_DATA_START, XCVR_INTERFACE_DATA_SIZE) - if sfp_interface_bulk_raw is None: - return None - - start = XCVR_INTFACE_BULK_OFFSET - XCVR_INTERFACE_DATA_START - end = start + interface_info_bulk_width - sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk( - sfp_interface_bulk_raw[start: end], 0) - - start = XCVR_VENDOR_NAME_OFFSET - XCVR_INTERFACE_DATA_START - end = start + XCVR_VENDOR_NAME_WIDTH - sfp_vendor_name_data = sfpi_obj.parse_vendor_name( - sfp_interface_bulk_raw[start: end], 0) - - start = XCVR_VENDOR_PN_OFFSET - XCVR_INTERFACE_DATA_START - end = start + XCVR_VENDOR_PN_WIDTH - sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn( - sfp_interface_bulk_raw[start: end], 0) - - start = XCVR_HW_REV_OFFSET - XCVR_INTERFACE_DATA_START - end = start + vendor_rev_width - sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev( - sfp_interface_bulk_raw[start: end], 0) - - start = XCVR_VENDOR_SN_OFFSET - XCVR_INTERFACE_DATA_START - end = start + XCVR_VENDOR_SN_WIDTH - sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn( - sfp_interface_bulk_raw[start: end], 0) - - start = XCVR_VENDOR_OUI_OFFSET - XCVR_INTERFACE_DATA_START - end = start + XCVR_VENDOR_OUI_WIDTH - sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui( - sfp_interface_bulk_raw[start: end], 0) - - start = XCVR_VENDOR_DATE_OFFSET - XCVR_INTERFACE_DATA_START - end = start + XCVR_VENDOR_DATE_WIDTH - sfp_vendor_date_data = sfpi_obj.parse_vendor_date( - sfp_interface_bulk_raw[start: end], 0) - transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] - transceiver_info_dict['manufacturer'] = sfp_vendor_name_data['data']['Vendor Name']['value'] - transceiver_info_dict['model'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] - transceiver_info_dict['vendor_rev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] - transceiver_info_dict['serial'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] - transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] - transceiver_info_dict['vendor_date'] = sfp_vendor_date_data[ - 'data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] - transceiver_info_dict['connector'] = sfp_interface_bulk_data['data']['Connector']['value'] - transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] - transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] - transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] - if self.sfp_type == QSFP_TYPE: - for key in qsfp_cable_length_tup: - if key in sfp_interface_bulk_data['data']: - transceiver_info_dict['cable_type'] = key - transceiver_info_dict['cable_length'] = str( - sfp_interface_bulk_data['data'][key]['value']) - - for key in qsfp_compliance_code_tup: - if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: - compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] - transceiver_info_dict['specification_compliance'] = str( - compliance_code_dict) - - transceiver_info_dict['nominal_bit_rate'] = str( - sfp_interface_bulk_data['data']['Nominal Bit Rate(100Mbs)']['value']) - else: - for key in sfp_cable_length_tup: - if key in sfp_interface_bulk_data['data']: - transceiver_info_dict['cable_type'] = key - transceiver_info_dict['cable_length'] = str( - sfp_interface_bulk_data['data'][key]['value']) - - for key in sfp_compliance_code_tup: - if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: - compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] - transceiver_info_dict['specification_compliance'] = str( - compliance_code_dict) - - transceiver_info_dict['nominal_bit_rate'] = str( - sfp_interface_bulk_data['data']['NominalSignallingRate(UnitsOf100Mbd)']['value']) - - return transceiver_info_dict - - def get_transceiver_bulk_status(self): - """ - Retrieves transceiver bulk status of this SFP - Returns: - A dict which contains following keys/values : - ======================================================================== - keys |Value Format |Information - ---------------------------|---------------|---------------------------- - rx_los |BOOLEAN |RX loss-of-signal status, True if has RX los, False if not. - tx_fault |BOOLEAN |TX fault status, True if has TX fault, False if not. - reset_status |BOOLEAN |reset status, True if SFP in reset, False if not. - lp_mode |BOOLEAN |low power mode status, True in lp mode, False if not. - tx_disable |BOOLEAN |TX disable status, True TX disabled, False if not. - tx_disabled_channel |HEX |disabled TX channels in hex, bits 0 to 3 represent channel 0 - | |to channel 3. - temperature |INT |module temperature in Celsius - voltage |INT |supply voltage in mV - txbias |INT |TX Bias Current in mA, n is the channel number, - | |for example, tx2bias stands for tx bias of channel 2. - rxpower |INT |received optical power in mW, n is the channel number, - | |for example, rx2power stands for rx power of channel 2. - txpower |INT |TX output power in mW, n is the channel number, - | |for example, tx2power stands for tx power of channel 2. - ======================================================================== - """ - transceiver_dom_info_dict = dict.fromkeys(self.dom_dict_keys, 'N/A') - - if self.sfp_type == OSFP_TYPE: - pass - - elif self.sfp_type == QSFP_TYPE: - if not self.dom_supported: - return transceiver_dom_info_dict - - offset = 0 - sfpd_obj = sff8436Dom() - if sfpd_obj is None: - return transceiver_dom_info_dict - - dom_data_raw = self.__read_eeprom_specific_bytes( - (offset + QSFP_DOM_BULK_DATA_START), QSFP_DOM_BULK_DATA_SIZE) - if dom_data_raw is None: - return transceiver_dom_info_dict - - if self.dom_temp_supported: - start = QSFP_TEMPE_OFFSET - QSFP_DOM_BULK_DATA_START - end = start + QSFP_TEMPE_WIDTH - dom_temperature_data = sfpd_obj.parse_temperature( - dom_data_raw[start: end], 0) - temp = self.__convert_string_to_num( - dom_temperature_data['data']['Temperature']['value']) - if temp is not None: - transceiver_dom_info_dict['temperature'] = temp - - if self.dom_volt_supported: - start = QSFP_VOLT_OFFSET - QSFP_DOM_BULK_DATA_START - end = start + QSFP_VOLT_WIDTH - dom_voltage_data = sfpd_obj.parse_voltage( - dom_data_raw[start: end], 0) - volt = self.__convert_string_to_num( - dom_voltage_data['data']['Vcc']['value']) - if volt is not None: - transceiver_dom_info_dict['voltage'] = volt - - start = QSFP_CHANNL_MON_OFFSET - QSFP_DOM_BULK_DATA_START - end = start + QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH - dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power( - dom_data_raw[start: end], 0) - - if self.dom_tx_power_supported: - transceiver_dom_info_dict['tx1power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['TX1Power']['value']) - transceiver_dom_info_dict['tx2power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['TX2Power']['value']) - transceiver_dom_info_dict['tx3power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['TX3Power']['value']) - transceiver_dom_info_dict['tx4power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['TX4Power']['value']) - - if self.dom_rx_power_supported: - transceiver_dom_info_dict['rx1power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['RX1Power']['value']) - transceiver_dom_info_dict['rx2power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['RX2Power']['value']) - transceiver_dom_info_dict['rx3power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['RX3Power']['value']) - transceiver_dom_info_dict['rx4power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['RX4Power']['value']) - - transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value'] - transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value'] - transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value'] - transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value'] - - else: - if not self.dom_supported: - return transceiver_dom_info_dict - - offset = 256 - sfpd_obj = sff8472Dom() - if sfpd_obj is None: - return transceiver_dom_info_dict - sfpd_obj._calibration_type = self.calibration - - dom_data_raw = self.__read_eeprom_specific_bytes( - (offset + SFP_DOM_BULK_DATA_START), SFP_DOM_BULK_DATA_SIZE) - - start = SFP_TEMPE_OFFSET - SFP_DOM_BULK_DATA_START - end = start + SFP_TEMPE_WIDTH - dom_temperature_data = sfpd_obj.parse_temperature( - dom_data_raw[start: end], 0) - - start = SFP_VOLT_OFFSET - SFP_DOM_BULK_DATA_START - end = start + SFP_VOLT_WIDTH - dom_voltage_data = sfpd_obj.parse_voltage( - dom_data_raw[start: end], 0) - - start = SFP_CHANNL_MON_OFFSET - SFP_DOM_BULK_DATA_START - end = start + SFP_CHANNL_MON_WIDTH - dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params( - dom_data_raw[start: end], 0) - - transceiver_dom_info_dict['temperature'] = self.__convert_string_to_num( - dom_temperature_data['data']['Temperature']['value']) - transceiver_dom_info_dict['voltage'] = self.__convert_string_to_num( - dom_voltage_data['data']['Vcc']['value']) - transceiver_dom_info_dict['rx1power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['RXPower']['value']) - transceiver_dom_info_dict['tx1bias'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['TXBias']['value']) - transceiver_dom_info_dict['tx1power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['TXPower']['value']) - - transceiver_dom_info_dict['rx_los'] = self.get_rx_los() - transceiver_dom_info_dict['tx_fault'] = self.get_tx_fault() - transceiver_dom_info_dict['reset_status'] = self.get_reset_status() - transceiver_dom_info_dict['lp_mode'] = self.get_lpmode() - - return transceiver_dom_info_dict - - def get_transceiver_threshold_info(self): - """ - Retrieves transceiver threshold info of this SFP - Returns: - A dict which contains following keys/values : - ======================================================================== - keys |Value Format |Information - ---------------------------|---------------|---------------------------- - temphighalarm |FLOAT |High Alarm Threshold value of temperature in Celsius. - templowalarm |FLOAT |Low Alarm Threshold value of temperature in Celsius. - temphighwarning |FLOAT |High Warning Threshold value of temperature in Celsius. - templowwarning |FLOAT |Low Warning Threshold value of temperature in Celsius. - vcchighalarm |FLOAT |High Alarm Threshold value of supply voltage in mV. - vcclowalarm |FLOAT |Low Alarm Threshold value of supply voltage in mV. - vcchighwarning |FLOAT |High Warning Threshold value of supply voltage in mV. - vcclowwarning |FLOAT |Low Warning Threshold value of supply voltage in mV. - rxpowerhighalarm |FLOAT |High Alarm Threshold value of received power in dBm. - rxpowerlowalarm |FLOAT |Low Alarm Threshold value of received power in dBm. - rxpowerhighwarning |FLOAT |High Warning Threshold value of received power in dBm. - rxpowerlowwarning |FLOAT |Low Warning Threshold value of received power in dBm. - txpowerhighalarm |FLOAT |High Alarm Threshold value of transmit power in dBm. - txpowerlowalarm |FLOAT |Low Alarm Threshold value of transmit power in dBm. - txpowerhighwarning |FLOAT |High Warning Threshold value of transmit power in dBm. - txpowerlowwarning |FLOAT |Low Warning Threshold value of transmit power in dBm. - txbiashighalarm |FLOAT |High Alarm Threshold value of tx Bias Current in mA. - txbiaslowalarm |FLOAT |Low Alarm Threshold value of tx Bias Current in mA. - txbiashighwarning |FLOAT |High Warning Threshold value of tx Bias Current in mA. - txbiaslowwarning |FLOAT |Low Warning Threshold value of tx Bias Current in mA. - ======================================================================== - """ - transceiver_dom_threshold_info_dict = dict.fromkeys( - self.threshold_dict_keys, 'N/A') - - if self.sfp_type == OSFP_TYPE: - pass - - elif self.sfp_type == QSFP_TYPE: - if not self.dom_supported or not self.qsfp_page3_available: - return transceiver_dom_threshold_info_dict - - # Dom Threshold data starts from offset 384 - # Revert offset back to 0 once data is retrieved - offset = QSFP_MODULE_UPPER_PAGE3_START - sfpd_obj = sff8436Dom() - if sfpd_obj is None: - return transceiver_dom_threshold_info_dict - - dom_module_threshold_raw = self.__read_eeprom_specific_bytes( - (offset + QSFP_MODULE_THRESHOLD_OFFSET), QSFP_MODULE_THRESHOLD_WIDTH) - if dom_module_threshold_raw is None: - return transceiver_dom_threshold_info_dict - - dom_module_threshold_data = sfpd_obj.parse_module_threshold_values( - dom_module_threshold_raw, 0) - - dom_channel_threshold_raw = self.__read_eeprom_specific_bytes((offset + QSFP_CHANNL_THRESHOLD_OFFSET), - QSFP_CHANNL_THRESHOLD_WIDTH) - if dom_channel_threshold_raw is None: - return transceiver_dom_threshold_info_dict - dom_channel_threshold_data = sfpd_obj.parse_channel_threshold_values( - dom_channel_threshold_raw, 0) - - # Threshold Data - transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value'] - transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value'] - transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value'] - transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value'] - transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VccHighAlarm']['value'] - transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data['data']['VccHighWarning']['value'] - transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VccLowAlarm']['value'] - transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VccLowWarning']['value'] - transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_channel_threshold_data['data']['RxPowerHighAlarm']['value'] - transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_channel_threshold_data['data']['RxPowerHighWarning']['value'] - transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_channel_threshold_data['data']['RxPowerLowAlarm']['value'] - transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_channel_threshold_data['data']['RxPowerLowWarning']['value'] - transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_channel_threshold_data['data']['TxBiasHighAlarm']['value'] - transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_channel_threshold_data['data']['TxBiasHighWarning']['value'] - transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_channel_threshold_data['data']['TxBiasLowAlarm']['value'] - transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_channel_threshold_data['data']['TxBiasLowWarning']['value'] - transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_channel_threshold_data['data']['TxPowerHighAlarm']['value'] - transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_channel_threshold_data['data']['TxPowerHighWarning']['value'] - transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_channel_threshold_data['data']['TxPowerLowAlarm']['value'] - transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_channel_threshold_data['data']['TxPowerLowWarning']['value'] - - else: - offset = SFP_MODULE_ADDRA2_OFFSET - - if not self.dom_supported: - return transceiver_dom_threshold_info_dict - - sfpd_obj = sff8472Dom(None, self.calibration) - if sfpd_obj is None: - return transceiver_dom_threshold_info_dict - - dom_module_threshold_raw = self.__read_eeprom_specific_bytes((offset + SFP_MODULE_THRESHOLD_OFFSET), - SFP_MODULE_THRESHOLD_WIDTH) - if dom_module_threshold_raw is not None: - dom_module_threshold_data = sfpd_obj.parse_alarm_warning_threshold( - dom_module_threshold_raw, 0) - else: - return transceiver_dom_threshold_info_dict - - # Threshold Data - transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value'] - transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value'] - transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value'] - transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value'] - transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VoltageHighAlarm']['value'] - transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VoltageLowAlarm']['value'] - transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data[ - 'data']['VoltageHighWarning']['value'] - transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VoltageLowWarning']['value'] - transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_module_threshold_data['data']['BiasHighAlarm']['value'] - transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_module_threshold_data['data']['BiasLowAlarm']['value'] - transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_module_threshold_data['data']['BiasHighWarning']['value'] - transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_module_threshold_data['data']['BiasLowWarning']['value'] - transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_module_threshold_data['data']['TXPowerHighAlarm']['value'] - transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_module_threshold_data['data']['TXPowerLowAlarm']['value'] - transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_module_threshold_data['data']['TXPowerHighWarning']['value'] - transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_module_threshold_data['data']['TXPowerLowWarning']['value'] - transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_module_threshold_data['data']['RXPowerHighAlarm']['value'] - transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_module_threshold_data['data']['RXPowerLowAlarm']['value'] - transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_module_threshold_data['data']['RXPowerHighWarning']['value'] - transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_module_threshold_data['data']['RXPowerLowWarning']['value'] - - return transceiver_dom_threshold_info_dict - - def get_reset_status(self): - """ - Retrieves the reset status of SFP - Returns: - A Boolean, True if reset enabled, False if disabled - """ - if not self.dom_supported: - return False - - if self.sfp_type == OSFP_TYPE: - return False - elif self.sfp_type == QSFP_TYPE: - offset = 0 - sfpd_obj = sff8436Dom() - dom_module_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + QSFP_MODULE_MONITOR_OFFSET), QSFP_MODULE_MONITOR_WIDTH) - - if dom_module_monitor_raw is not None: - return True - else: - return False - elif self.sfp_type == SFP_TYPE: - offset = 0 - sfpd_obj = sff8472Dom() - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH) - - if dom_channel_monitor_raw is not None: - return True - else: - return False - - def get_rx_los(self): - """ - Retrieves the RX LOS (lost-of-signal) status of SFP - Returns: - A Boolean, True if SFP has RX LOS, False if not. - Note : RX LOS status is latched until a call to get_rx_los or a reset. - """ - if not self.dom_supported: - return None - - rx_los_list = [] - if self.sfp_type == OSFP_TYPE: - return None - elif self.sfp_type == QSFP_TYPE: - offset = 0 - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + QSFP_CHANNL_RX_LOS_STATUS_OFFSET), QSFP_CHANNL_RX_LOS_STATUS_WIDTH) - if dom_channel_monitor_raw is not None: - rx_los_data = int(dom_channel_monitor_raw[0], 16) - rx_los_list.append(rx_los_data & 0x01 != 0) - rx_los_list.append(rx_los_data & 0x02 != 0) - rx_los_list.append(rx_los_data & 0x04 != 0) - rx_los_list.append(rx_los_data & 0x08 != 0) - else: - offset = 256 - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH) - if dom_channel_monitor_raw is not None: - rx_los_data = int(dom_channel_monitor_raw[0], 16) - rx_los_list.append(rx_los_data & 0x02 != 0) - else: - return None - return rx_los_list - - def get_tx_fault(self): - """ - Retrieves the TX fault status of SFP - Returns: - A Boolean, True if SFP has TX fault, False if not - Note : TX fault status is lached until a call to get_tx_fault or a reset. - """ - if not self.dom_supported: - return None - - tx_fault_list = [] - if self.sfp_type == OSFP_TYPE: - return None - elif self.sfp_type == QSFP_TYPE: - offset = 0 - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + QSFP_CHANNL_TX_FAULT_STATUS_OFFSET), QSFP_CHANNL_TX_FAULT_STATUS_WIDTH) - if dom_channel_monitor_raw is not None: - tx_fault_data = int(dom_channel_monitor_raw[0], 16) - tx_fault_list.append(tx_fault_data & 0x01 != 0) - tx_fault_list.append(tx_fault_data & 0x02 != 0) - tx_fault_list.append(tx_fault_data & 0x04 != 0) - tx_fault_list.append(tx_fault_data & 0x08 != 0) - else: - offset = 256 - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH) - if dom_channel_monitor_raw is not None: - tx_fault_data = int(dom_channel_monitor_raw[0], 16) - tx_fault_list.append(tx_fault_data & 0x04 != 0) - else: - return None - return tx_fault_list - - def get_tx_disable(self): - """ - Retrieves the tx_disable status of this SFP - Returns: - A Boolean, True if tx_disable is enabled, False if disabled - """ - if not self.dom_supported: - return None - - tx_disable_list = [] - if self.sfp_type == OSFP_TYPE: - return None - elif self.sfp_type == QSFP_TYPE: - offset = 0 - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + QSFP_CHANNL_DISABLE_STATUS_OFFSET), QSFP_CHANNL_DISABLE_STATUS_WIDTH) - if dom_channel_monitor_raw is not None: - tx_disable_data = int(dom_channel_monitor_raw[0], 16) - tx_disable_list.append(tx_disable_data & 0x01 != 0) - tx_disable_list.append(tx_disable_data & 0x02 != 0) - tx_disable_list.append(tx_disable_data & 0x04 != 0) - tx_disable_list.append(tx_disable_data & 0x08 != 0) - else: - offset = 256 - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH) - if dom_channel_monitor_raw is not None: - tx_disable_data = int(dom_channel_monitor_raw[0], 16) - tx_disable_list.append(tx_disable_data & 0xC0 != 0) - else: - return None - return tx_disable_list - - def get_tx_disable_channel(self): - """ - Retrieves the TX disabled channels in this SFP - Returns: - A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent - TX channels which have been disabled in this SFP. - As an example, a returned value of 0x5 indicates that channel 0 - and channel 2 have been disabled. - """ - tx_disable_list = self.get_tx_disable() - if tx_disable_list is None: - return 0 - tx_disabled = 0 - for i in range(len(tx_disable_list)): - if tx_disable_list[i]: - tx_disabled |= 1 << i - return tx_disabled - - def get_lpmode(self): - """ - Retrieves the lpmode (low power mode) status of this SFP - Returns: - A Boolean, True if lpmode is enabled, False if disabled - """ - if self.sfp_type != OSFP_TYPE: - return False - - try: - reg_file = open( - "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"])) - except IOError as e: - print("Error: unable to open file: %s" % str(e)) - return False - - # Read status - content = reg_file.readline().rstrip() - reg_value = int(content) - # low power mode is active high - if reg_value == 0: - return False - - return True - - def get_power_override(self): - """ - Retrieves the power-override status of this SFP - Returns: - A Boolean, True if power-override is enabled, False if disabled - """ - if self.sfp_type == QSFP_TYPE: - offset = 0 - sfpd_obj = sff8436Dom() - if sfpd_obj is None: - return False - - dom_control_raw = self.__read_eeprom_specific_bytes( - QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) if self.get_presence() else None - if dom_control_raw is not None: - dom_control_data = sfpd_obj.parse_control_bytes( - dom_control_raw, 0) - power_override = ( - 'On' == dom_control_data['data']['PowerOverride']['value']) - else: - return False - - def get_temperature(self): - """ - Retrieves the temperature of this SFP - Returns: - An integer number of current temperature in Celsius - """ - transceiver_bulk_status = self.get_transceiver_bulk_status() - return transceiver_bulk_status.get("temperature", "N/A") - - def get_voltage(self): - """ - Retrieves the supply voltage of this SFP - Returns: - An integer number of supply voltage in mV - """ - transceiver_bulk_status = self.get_transceiver_bulk_status() - return transceiver_bulk_status.get("voltage", "N/A") - - def get_tx_bias(self): - """ - Retrieves the TX bias current of this SFP - Returns: - A list of four integer numbers, representing TX bias in mA - for channel 0 to channel 4. - Ex. ['110.09', '111.12', '108.21', '112.09'] - """ - transceiver_bulk_status = self.get_transceiver_bulk_status() - tx1_bs = transceiver_bulk_status.get("tx1bias", "N/A") - tx2_bs = transceiver_bulk_status.get("tx2bias", "N/A") - tx3_bs = transceiver_bulk_status.get("tx3bias", "N/A") - tx4_bs = transceiver_bulk_status.get("tx4bias", "N/A") - tx_bias_list = [tx1_bs, tx2_bs, tx3_bs, tx4_bs] - return tx_bias_list - - def get_rx_power(self): - """ - Retrieves the received optical power for this SFP - Returns: - A list of four integer numbers, representing received optical - power in mW for channel 0 to channel 4. - Ex. ['1.77', '1.71', '1.68', '1.70'] - """ - rx_power_list = [] - if self.sfp_type == OSFP_TYPE: - # OSFP not supported on our platform yet. - return None - - elif self.sfp_type == QSFP_TYPE: - offset = 0 - offset_xcvr = 128 - - sfpd_obj = sff8436Dom() - if sfpd_obj is None: - return None - - if self.dom_rx_power_supported: - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) - if dom_channel_monitor_raw is not None: - dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power( - dom_channel_monitor_raw, 0) - rx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['RX1Power']['value'])) - rx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['RX2Power']['value'])) - rx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['RX3Power']['value'])) - rx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['RX4Power']['value'])) - else: - return None - else: - return None - else: - offset = 256 - - sfpd_obj = sff8472Dom() - if sfpd_obj is None: - return None - - if self.dom_supported: - sfpd_obj._calibration_type = self.calibration - - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) - if dom_channel_monitor_raw is not None: - dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params( - dom_channel_monitor_raw, 0) - rx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['RXPower']['value'])) - else: - return None - else: - return None - - return rx_power_list - - def get_tx_power(self): - """ - Retrieves the TX power of this SFP - Returns: - A list of four integer numbers, representing TX power in mW - for channel 0 to channel 4. - Ex. ['1.86', '1.86', '1.86', '1.86'] - """ - tx_power_list = [] - if self.sfp_type == OSFP_TYPE: - # OSFP not supported on our platform yet. - return None - - elif self.sfp_type == QSFP_TYPE: - offset = 0 - offset_xcvr = 128 - - sfpd_obj = sff8436Dom() - if sfpd_obj is None: - return None - - if self.dom_tx_power_supported: - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) - if dom_channel_monitor_raw is not None: - dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power( - dom_channel_monitor_raw, 0) - tx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['TX1Power']['value'])) - tx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['TX2Power']['value'])) - tx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['TX3Power']['value'])) - tx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['TX4Power']['value'])) - else: - return None - else: - return None - else: - offset = 256 - sfpd_obj = sff8472Dom() - if sfpd_obj is None: - return None - - if self.dom_supported: - sfpd_obj._calibration_type = self.calibration - - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) - if dom_channel_monitor_raw is not None: - dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params( - dom_channel_monitor_raw, 0) - tx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['TXPower']['value'])) - else: - return None - else: - return None - return tx_power_list - - def reset(self): - """ - Reset SFP and return all user module settings to their default srate. - Returns: - A boolean, True if successful, False if not - """ - if self.sfp_type != OSFP_TYPE: - return False - - try: - reg_file = open( - "/".join([PORT_INFO_PATH, self.port_name, "qsfp_resetL"]), "w") - except IOError as e: - print("Error: unable to open file: %s" % str(e)) - return False - - # Convert our register value back to a hex string and write back - reg_file.seek(0) - reg_file.write(hex(0)) - reg_file.close() - - # Sleep 1 second to allow it to settle - time.sleep(1) - - # Flip the bit back high and write back to the register to take port out of reset - try: - reg_file = open( - "/".join([PORT_INFO_PATH, self.port_name, "qsfp_resetL"]), "w") - except IOError as e: - print("Error: unable to open file: %s" % str(e)) - return False - - reg_file.seek(0) - reg_file.write(hex(1)) - reg_file.close() - - return True - - def tx_disable(self, tx_disable): - """ - Disable SFP TX for all channels - Args: - tx_disable : A Boolean, True to enable tx_disable mode, False to disable - tx_disable mode. - Returns: - A boolean, True if tx_disable is set successfully, False if not - """ - if self.sfp_type == QSFP_TYPE: - sysfsfile_eeprom = None - try: - tx_disable_ctl = 0xf if tx_disable else 0x0 - buffer = create_string_buffer(1) - buffer[0] = chr(tx_disable_ctl) - # Write to eeprom - sysfsfile_eeprom = open( - self.port_to_eeprom_mapping[self.port_num], "r+b") - sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET) - sysfsfile_eeprom.write(buffer[0]) - except IOError as e: - print("Error: unable to open file: %s" % str(e)) - return False - finally: - if sysfsfile_eeprom is not None: - sysfsfile_eeprom.close() - time.sleep(0.01) - return True - return False - - def tx_disable_channel(self, channel, disable): - """ - Sets the tx_disable for specified SFP channels - Args: - channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, - e.g. 0x5 for channel 0 and channel 2. - disable : A boolean, True to disable TX channels specified in channel, - False to enable - Returns: - A boolean, True if successful, False if not - """ - if self.sfp_type == QSFP_TYPE: - sysfsfile_eeprom = None - try: - channel_state = self.get_tx_disable_channel() - tx_enable_mask = [0xe, 0xd, 0xb, 0x7] - tx_disable_mask = [0x1, 0x3, 0x7, 0xf] - tx_disable_ctl = channel_state | tx_disable_mask[ - channel] if disable else channel_state & tx_enable_mask[channel] - buffer = create_string_buffer(1) - buffer[0] = chr(tx_disable_ctl) - # Write to eeprom - sysfsfile_eeprom = open( - self.port_to_eeprom_mapping[self.port_num], "r+b") - sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET) - sysfsfile_eeprom.write(buffer[0]) - except IOError as e: - print("Error: unable to open file: %s" % str(e)) - return False - finally: - if sysfsfile_eeprom is not None: - sysfsfile_eeprom.close() - time.sleep(0.01) - return True - return False - - def set_lpmode(self, lpmode): - """ - Sets the lpmode (low power mode) of SFP - Args: - lpmode: A Boolean, True to enable lpmode, False to disable it - Note : lpmode can be overridden by set_power_override - Returns: - A boolean, True if lpmode is set successfully, False if not - """ - if self.sfp_type != OSFP_TYPE: - return False - - try: - reg_file = open( - "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"]), "r+") - except IOError as e: - print("Error: unable to open file: %s" % str(e)) - return False - - content = hex(lpmode) - - reg_file.seek(0) - reg_file.write(content) - reg_file.close() - - return True - - def set_power_override(self, power_override, power_set): - """ - Sets SFP power level using power_override and power_set - Args: - power_override : - A Boolean, True to override set_lpmode and use power_set - to control SFP power, False to disable SFP power control - through power_override/power_set and use set_lpmode - to control SFP power. - power_set : - Only valid when power_override is True. - A Boolean, True to set SFP to low power mode, False to set - SFP to high power mode. - Returns: - A boolean, True if power-override and power_set are set successfully, - False if not - """ - if self.sfp_type == QSFP_TYPE: - try: - power_override_bit = 0 - if power_override: - power_override_bit |= 1 << 0 - - power_set_bit = 0 - if power_set: - power_set_bit |= 1 << 1 - - buffer = create_string_buffer(1) - buffer[0] = chr(power_override_bit | power_set_bit) - # Write to eeprom - sysfsfile_eeprom = open( - self.port_to_eeprom_mapping[self.port_num], "r+b") - sysfsfile_eeprom.seek(QSFP_POWEROVERRIDE_OFFSET) - sysfsfile_eeprom.write(buffer[0]) - except IOError as e: - print("Error: unable to open file: %s" % str(e)) - return False - finally: - if sysfsfile_eeprom is not None: - sysfsfile_eeprom.close() - time.sleep(0.01) - return True - return False - - def get_name(self): - """ - Retrieves the name of the device - Returns: - string: The name of the device - """ - sfputil_helper = SfpUtilHelper() - sfputil_helper.read_porttab_mappings( - self.__get_path_to_port_config_file()) - name = sfputil_helper.logical[self.index] or "Unknown" - return name - - def get_presence(self): - """ - Retrieves the presence of the PSU - Returns: - bool: True if PSU is present, False if not - """ - sysfs_filename = "sfp_modabs" if self.sfp_type == SFP_TYPE else "qsfp_modprsL" - reg_path = "/".join([PORT_INFO_PATH, self.port_name, sysfs_filename]) - - # Read status - try: - reg_file = open(reg_path) - content = reg_file.readline().rstrip() - reg_value = int(content) - except IOError as e: - print("Error: unable to open file: %s" % str(e)) - return False - - # Module present is active low - if reg_value == 0: - return True - - return False - - def get_model(self): - """ - Retrieves the model number (or part number) of the device - Returns: - string: Model/part number of device - """ - transceiver_dom_info_dict = self.get_transceiver_info() - return transceiver_dom_info_dict.get("model", "N/A") - - def get_serial(self): - """ - Retrieves the serial number of the device - Returns: - string: Serial number of device - """ - transceiver_dom_info_dict = self.get_transceiver_info() - return transceiver_dom_info_dict.get("serial", "N/A") - - def get_status(self): - """ - Retrieves the operational status of the device - Returns: - A boolean value, True if device is operating properly, False if not - """ - return self.get_presence() diff --git a/device/celestica/x86_64-cel_silverstone-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_silverstone-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..56fda7de4f5d --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/system_health_monitoring_config.json @@ -0,0 +1,13 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "psu.temperature" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "green_blink_1hz" + } +} diff --git a/device/celestica/x86_64-cel_silverstone-r0/warm-reboot_plugin b/device/celestica/x86_64-cel_silverstone-r0/warm-reboot_plugin new file mode 100755 index 000000000000..22212b5afe13 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/warm-reboot_plugin @@ -0,0 +1,4 @@ +#!/bin/bash + +# Set all LEDs to BMC's control +ipmitool raw 0x3a 0x09 0x02 0x01 &> /dev/null diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers.json.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers.json.j2 new file mode 100644 index 000000000000..b67cf577ab75 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} + diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_def.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_def.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_def.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..44fcf21887a6 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t0.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t1.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t1.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/hwsku.json b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/hwsku.json new file mode 100644 index 000000000000..b97d516509ec --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/hwsku.json @@ -0,0 +1,164 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet80": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet88": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet96": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet104": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet112": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet120": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet128": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet136": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet144": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet152": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet160": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet168": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet176": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet184": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet192": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet200": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet208": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet216": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet224": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet232": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet240": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet248": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l2/config b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l2/config new file mode 100644 index 000000000000..45a7b84d5032 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l2/config @@ -0,0 +1,3 @@ +l2_mem_entries=139264 +l3_mem_entries=8192 +l3_alpm_enable=0 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l3/config b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l3/config new file mode 100644 index 000000000000..3467c1b39716 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l3/config @@ -0,0 +1,3 @@ +l2_mem_entries=40000 +l3_mem_entries=40000 +l3_alpm_enable=2 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/pg_profile_lookup.ini b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/pg_profile_lookup.ini new file mode 100644 index 000000000000..9f2eacb6fc42 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 56368 18432 55120 -3 2496 + 25000 5m 56368 18432 55120 -3 2496 + 40000 5m 56368 18432 55120 -3 2496 + 50000 5m 56368 18432 55120 -3 2496 + 100000 5m 56368 18432 55120 -3 2496 + 10000 40m 56368 18432 55120 -3 2496 + 25000 40m 56368 18432 55120 -3 2496 + 40000 40m 56368 18432 55120 -3 2496 + 50000 40m 56368 18432 55120 -3 2496 + 100000 40m 56368 18432 55120 -3 2496 + 10000 300m 56368 18432 55120 -3 2496 + 25000 300m 56368 18432 55120 -3 2496 + 40000 300m 56368 18432 55120 -3 2496 + 50000 300m 56368 18432 55120 -3 2496 + 100000 300m 56368 18432 55120 -3 2496 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/platform-def.json b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/platform-def.json new file mode 100644 index 000000000000..4644f6e4549d --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/platform-def.json @@ -0,0 +1,23 @@ +{ + "fec-mode": { + "Ethernet0-127": { + "1": { + "10000": [ "none", "fc" ], + "25000": [ "none", "fc" ] + }, + "2": { + "20000": [ "none", "fc" ], + "50000": [ "none", "rs" ] + }, + "4": { + "40000": [ "none", "fc" ], + "100000": [ "none", "rs" ] + } + } + }, + "native-port-supported-speeds": { + "Ethernet0-127": { + "4": ["100000","40000"] + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/port_config.ini b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/port_config.ini new file mode 100644 index 000000000000..f7929e6f5c17 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 33,34,35,36,37,38,39,40 Eth1/1 1 400000 +Ethernet8 41,42,43,44,45,46,47,48 Eth1/2 2 400000 +Ethernet16 49,50,51,52,53,54,55,56 Eth1/3 3 400000 +Ethernet24 57,58,59,60,61,62,63,64 Eth1/4 4 400000 +Ethernet32 65,66,67,68,69,70,71,72 Eth1/5 5 400000 +Ethernet40 73,74,75,76,77,78,79,80 Eth1/6 6 400000 +Ethernet48 81,82,83,84,85,86,87,88 Eth1/7 7 400000 +Ethernet56 89,90,91,92,93,94,95,96 Eth1/8 8 400000 +Ethernet64 1,2,3,4,5,6,7,8 Eth1/9 9 400000 +Ethernet72 9,10,11,12,13,14,15,16 Eth1/10 10 400000 +Ethernet80 17,18,19,20,21,22,23,24 Eth1/11 11 400000 +Ethernet88 25,26,27,28,29,30,31,32 Eth1/12 12 400000 +Ethernet96 97,98,99,100,101,102,103,104 Eth1/13 13 400000 +Ethernet104 105,106,107,108,109,110,111,112 Eth1/14 14 400000 +Ethernet112 113,114,115,116,117,118,119,120 Eth1/15 15 400000 +Ethernet120 121,122,123,124,125,126,127,128 Eth1/16 16 400000 +Ethernet128 129,130,131,132,133,134,135,136 Eth1/17 17 400000 +Ethernet136 137,138,139,140,141,142,143,144 Eth1/18 18 400000 +Ethernet144 145,146,147,148,149,150,151,152 Eth1/19 19 400000 +Ethernet152 153,154,155,156,157,158,159,160 Eth1/20 20 400000 +Ethernet160 225,226,227,228,229,230,231,232 Eth1/21 21 400000 +Ethernet168 233,234,235,236,237,238,239,240 Eth1/22 22 400000 +Ethernet176 241,242,243,244,245,246,247,248 Eth1/23 23 400000 +Ethernet184 249,250,251,252,253,254,255,256 Eth1/24 24 400000 +Ethernet192 161,162,163,164,165,166,167,168 Eth1/25 25 400000 +Ethernet200 169,170,171,172,173,174,175,176 Eth1/26 26 400000 +Ethernet208 177,178,179,180,181,182,183,184 Eth1/27 27 400000 +Ethernet216 185,186,187,188,189,190,191,192 Eth1/28 28 400000 +Ethernet224 193,194,195,196,197,198,199,200 Eth1/29 29 400000 +Ethernet232 201,202,203,204,205,206,207,208 Eth1/30 30 400000 +Ethernet240 209,210,211,212,213,214,215,216 Eth1/31 31 400000 +Ethernet248 217,218,219,220,221,222,223,224 Eth1/32 32 400000 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/qos.json.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/qos.json.j2 new file mode 100644 index 000000000000..3e548325ea30 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai.profile b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai.profile new file mode 100644 index 000000000000..550bfe181df4 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-32x400G.config.bcm +SAI_NUM_ECMP_MEMBERS=64 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai_postinit_cmd.soc new file mode 100644 index 000000000000..731625308a5e --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai_postinit_cmd.soc @@ -0,0 +1,2 @@ +modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1 +modreg ING_MISC_CONFIG INPUT_PRI_UNTAGGED=1 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/th3-32x400G.config.bcm b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/th3-32x400G.config.bcm new file mode 100644 index 000000000000..f478e2ea85eb --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/th3-32x400G.config.bcm @@ -0,0 +1,231 @@ +pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff9fffe +#pbmp_xport_xe.0=0x8111181111c1111811118111181111c111182222 +ccm_dma_enable=0 +ccmdma_intr_enable=0 +ctr_evict_enable=0 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +phy_enable=0 +phy_null=1 +pll_bypass=1 + +sai_tunnel_global_sip_mask_enable=1 + +port_fec=9 + +#portmap_38=257:10 +#portmap_118=258:10 + + +portmap_20=33:400 +portmap_24=41:400 +portmap_28=49:400 +portmap_32=57:400 +portmap_40=65:400 +portmap_44=73:400 +portmap_48=81:400 +portmap_52=89:400 +portmap_1=1:400 +portmap_5=9:400 +portmap_9=17:400 +portmap_13=25:400 +portmap_60=97:400 +portmap_64=105:400 +portmap_68=113:400 +portmap_72=121:400 +portmap_80=129:400 +portmap_84=137:400 +portmap_88=145:400 +portmap_92=153:400 +portmap_140=225:400 +portmap_144=233:400 +portmap_148=241:400 +portmap_152=249:400 +portmap_100=161:400 +portmap_104=169:400 +portmap_108=177:400 +portmap_112=185:400 +portmap_120=193:400 +portmap_124=201:400 +portmap_128=209:400 +portmap_132=217:400 + +phy_chain_rx_lane_map_physical{33.0}=0x65732041 +phy_chain_tx_lane_map_physical{33.0}=0x47206531 +phy_chain_rx_lane_map_physical{41.0}=0x07561243 +phy_chain_tx_lane_map_physical{41.0}=0x36207514 +phy_chain_rx_lane_map_physical{49.0}=0x54632071 +phy_chain_tx_lane_map_physical{49.0}=0x06241735 +phy_chain_rx_lane_map_physical{57.0}=0x07561243 +phy_chain_tx_lane_map_physical{57.0}=0x35207614 +phy_chain_rx_lane_map_physical{65.0}=0x45623170 +phy_chain_tx_lane_map_physical{65.0}=0x51260734 +phy_chain_rx_lane_map_physical{73.0}=0x07561243 +phy_chain_tx_lane_map_physical{73.0}=0x37245610 +phy_chain_rx_lane_map_physical{81.0}=0x45632071 +phy_chain_tx_lane_map_physical{81.0}=0x51260734 +phy_chain_rx_lane_map_physical{89.0}=0x07561243 +phy_chain_tx_lane_map_physical{89.0}=0x26437510 +phy_chain_rx_lane_map_physical{1.0}=0x30176524 +phy_chain_tx_lane_map_physical{1.0}=0x20615374 +phy_chain_rx_lane_map_physical{9.0}=0x37562041 +phy_chain_tx_lane_map_physical{9.0}=0x05176432 +phy_chain_rx_lane_map_physical{17.0}=0x43607251 +phy_chain_tx_lane_map_physical{17.0}=0x70261435 +phy_chain_rx_lane_map_physical{25.0}=0x60347125 +phy_chain_tx_lane_map_physical{25.0}=0x46357120 +phy_chain_rx_lane_map_physical{97.0}=0x47601352 +phy_chain_tx_lane_map_physical{97.0}=0x04265137 +phy_chain_rx_lane_map_physical{105.0}=0x73206415 +phy_chain_tx_lane_map_physical{105.0}=0x26374150 +phy_chain_rx_lane_map_physical{113.0}=0x47632051 +phy_chain_tx_lane_map_physical{113.0}=0x03254617 +phy_chain_rx_lane_map_physical{121.0}=0x63027415 +phy_chain_tx_lane_map_physical{121.0}=0x63721045 +phy_chain_rx_lane_map_physical{129.0}=0x30154627 +phy_chain_tx_lane_map_physical{129.0}=0x04735261 +phy_chain_rx_lane_map_physical{137.0}=0x24753061 +phy_chain_tx_lane_map_physical{137.0}=0x37614520 +phy_chain_rx_lane_map_physical{145.0}=0x47601352 +phy_chain_tx_lane_map_physical{145.0}=0x63274510 +phy_chain_rx_lane_map_physical{153.0}=0x07361524 +phy_chain_tx_lane_map_physical{153.0}=0x36527104 +phy_chain_rx_lane_map_physical{225.0}=0x56410273 +phy_chain_tx_lane_map_physical{225.0}=0x10274635 +phy_chain_rx_lane_map_physical{233.0}=0x15740263 +phy_chain_tx_lane_map_physical{233.0}=0x24351607 +phy_chain_rx_lane_map_physical{241.0}=0x74015263 +phy_chain_tx_lane_map_physical{241.0}=0x04152637 +phy_chain_rx_lane_map_physical{249.0}=0x62037514 +phy_chain_tx_lane_map_physical{249.0}=0x72453160 +phy_chain_rx_lane_map_physical{161.0}=0x46510273 +phy_chain_tx_lane_map_physical{161.0}=0x01653724 +phy_chain_rx_lane_map_physical{169.0}=0x25743160 +phy_chain_tx_lane_map_physical{169.0}=0x07216435 +phy_chain_rx_lane_map_physical{177.0}=0x46510273 +phy_chain_tx_lane_map_physical{177.0}=0x01652734 +phy_chain_rx_lane_map_physical{185.0}=0x25743160 +phy_chain_tx_lane_map_physical{185.0}=0x37016425 +phy_chain_rx_lane_map_physical{193.0}=0x46510372 +phy_chain_tx_lane_map_physical{193.0}=0x06153724 +phy_chain_rx_lane_map_physical{201.0}=0x25743160 +phy_chain_tx_lane_map_physical{201.0}=0x36017524 +phy_chain_rx_lane_map_physical{209.0}=0x47601352 +phy_chain_tx_lane_map_physical{209.0}=0x04152736 +phy_chain_rx_lane_map_physical{217.0}=0x26453170 +phy_chain_tx_lane_map_physical{217.0}=0x36027415 + +serdes_core_rx_polarity_flip_physical{33}=0x29 +serdes_core_tx_polarity_flip_physical{33}=0xfe +serdes_core_rx_polarity_flip_physical{41}=0xb1 +serdes_core_tx_polarity_flip_physical{41}=0xe8 +serdes_core_rx_polarity_flip_physical{49}=0xca +serdes_core_tx_polarity_flip_physical{49}=0xb6 +serdes_core_rx_polarity_flip_physical{57}=0x9b +serdes_core_tx_polarity_flip_physical{57}=0xdc +serdes_core_rx_polarity_flip_physical{65}=0x17 +serdes_core_tx_polarity_flip_physical{65}=0x86 +serdes_core_rx_polarity_flip_physical{73}=0x9b +serdes_core_tx_polarity_flip_physical{73}=0x55 +serdes_core_rx_polarity_flip_physical{81}=0xa +serdes_core_tx_polarity_flip_physical{81}=0x6 +serdes_core_rx_polarity_flip_physical{89}=0x9b +serdes_core_tx_polarity_flip_physical{89}=0x48 +serdes_core_rx_polarity_flip_physical{1}=0xec +serdes_core_tx_polarity_flip_physical{1}=0x56 +serdes_core_rx_polarity_flip_physical{9}=0x13 +serdes_core_tx_polarity_flip_physical{9}=0xa6 +serdes_core_rx_polarity_flip_physical{17}=0x5a +serdes_core_tx_polarity_flip_physical{17}=0xc6 +serdes_core_rx_polarity_flip_physical{25}=0xf +serdes_core_tx_polarity_flip_physical{25}=0x4e +serdes_core_rx_polarity_flip_physical{97}=0x17 +serdes_core_tx_polarity_flip_physical{97}=0x2e +serdes_core_rx_polarity_flip_physical{105}=0xce +serdes_core_tx_polarity_flip_physical{105}=0x7c +serdes_core_rx_polarity_flip_physical{113}=0xa +serdes_core_tx_polarity_flip_physical{113}=0x35 + +serdes_core_rx_polarity_flip_physical{121}=0xb9 +serdes_core_tx_polarity_flip_physical{121}=0xef +serdes_core_rx_polarity_flip_physical{129}=0xe8 +serdes_core_tx_polarity_flip_physical{129}=0xac +serdes_core_rx_polarity_flip_physical{137}=0xcb +serdes_core_tx_polarity_flip_physical{137}=0x9c +serdes_core_rx_polarity_flip_physical{145}=0x17 +serdes_core_tx_polarity_flip_physical{145}=0x32 +serdes_core_rx_polarity_flip_physical{153}=0xb9 +serdes_core_tx_polarity_flip_physical{153}=0xaf +serdes_core_rx_polarity_flip_physical{225}=0xaa +serdes_core_tx_polarity_flip_physical{225}=0x7 +serdes_core_rx_polarity_flip_physical{233}=0x31 +serdes_core_tx_polarity_flip_physical{233}=0x47 +serdes_core_rx_polarity_flip_physical{241}=0xe8 +serdes_core_tx_polarity_flip_physical{241}=0x9e +serdes_core_rx_polarity_flip_physical{249}=0xec +serdes_core_tx_polarity_flip_physical{249}=0x1f +serdes_core_rx_polarity_flip_physical{161}=0x6a +serdes_core_tx_polarity_flip_physical{161}=0xd4 +serdes_core_rx_polarity_flip_physical{169}=0x9e +serdes_core_tx_polarity_flip_physical{169}=0x7b +serdes_core_rx_polarity_flip_physical{177}=0x6a +serdes_core_tx_polarity_flip_physical{177}=0xcc +serdes_core_rx_polarity_flip_physical{185}=0x9e +serdes_core_tx_polarity_flip_physical{185}=0x58 +serdes_core_rx_polarity_flip_physical{193}=0x6f +serdes_core_tx_polarity_flip_physical{193}=0x24 +serdes_core_rx_polarity_flip_physical{201}=0x9e +serdes_core_tx_polarity_flip_physical{201}=0xdf +serdes_core_rx_polarity_flip_physical{209}=0x17 +serdes_core_tx_polarity_flip_physical{209}=0xe9 +serdes_core_rx_polarity_flip_physical{217}=0xec +serdes_core_tx_polarity_flip_physical{217}=0x68 + +#dport_map_port_20=1 +#dport_map_port_24=2 +#dport_map_port_28=3 +#dport_map_port_32=4 +#dport_map_port_40=5 +#dport_map_port_44=6 +#dport_map_port_48=7 +#dport_map_port_52=8 +#dport_map_port_1=9 +#dport_map_port_5=10 +#dport_map_port_9=11 +#dport_map_port_13=12 +#dport_map_port_60=13 +#dport_map_port_64=14 +#dport_map_port_68=15 +#dport_map_port_72=16 +#dport_map_port_80=17 +#dport_map_port_84=18 +#dport_map_port_88=19 +#dport_map_port_92=20 +#dport_map_port_140=21 +#dport_map_port_144=22 +#dport_map_port_148=23 +#dport_map_port_152=24 +#dport_map_port_100=25 +#dport_map_port_104=26 +#dport_map_port_108=27 +#dport_map_port_112=28 +#dport_map_port_120=29 +#dport_map_port_124=30 +#dport_map_port_128=31 +#dport_map_port_132=32 +# +#dport_map_port_38=33 +#dport_map_port_118=34 + + + +core_clock_frequency=1325 +dpr_clock_frequency=1000 +device_clock_frequency=1325 +port_flex_enable=1 + +#firmware load method, use fast load +load_firmware=0x2 + +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers.json.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers.json.j2 new file mode 100644 index 000000000000..b67cf577ab75 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} + diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_def.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_def.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_def.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..44fcf21887a6 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t0.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t1.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t1.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/hwsku.json b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/hwsku.json new file mode 100644 index 000000000000..1a6031b4b543 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/hwsku.json @@ -0,0 +1,100 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "4x100G" + }, + "Ethernet8": { + "default_brkout_mode": "4x100G" + }, + "Ethernet16": { + "default_brkout_mode": "4x100G" + }, + "Ethernet24": { + "default_brkout_mode": "4x100G" + }, + "Ethernet32": { + "default_brkout_mode": "4x100G" + }, + "Ethernet40": { + "default_brkout_mode": "4x100G" + }, + "Ethernet48": { + "default_brkout_mode": "4x100G" + }, + "Ethernet56": { + "default_brkout_mode": "4x100G" + }, + "Ethernet64": { + "default_brkout_mode": "4x100G" + }, + "Ethernet72": { + "default_brkout_mode": "4x100G" + }, + "Ethernet80": { + "default_brkout_mode": "4x100G" + }, + "Ethernet88": { + "default_brkout_mode": "4x100G" + }, + "Ethernet96": { + "default_brkout_mode": "4x100G" + }, + "Ethernet104": { + "default_brkout_mode": "4x100G" + }, + "Ethernet112": { + "default_brkout_mode": "4x100G" + }, + "Ethernet120": { + "default_brkout_mode": "4x100G" + }, + "Ethernet128": { + "default_brkout_mode": "4x100G" + }, + "Ethernet136": { + "default_brkout_mode": "4x100G" + }, + "Ethernet144": { + "default_brkout_mode": "4x100G" + }, + "Ethernet152": { + "default_brkout_mode": "4x100G" + }, + "Ethernet160": { + "default_brkout_mode": "4x100G" + }, + "Ethernet168": { + "default_brkout_mode": "4x100G" + }, + "Ethernet176": { + "default_brkout_mode": "4x100G" + }, + "Ethernet184": { + "default_brkout_mode": "4x100G" + }, + "Ethernet192": { + "default_brkout_mode": "4x100G" + }, + "Ethernet200": { + "default_brkout_mode": "4x100G" + }, + "Ethernet208": { + "default_brkout_mode": "4x100G" + }, + "Ethernet216": { + "default_brkout_mode": "4x100G" + }, + "Ethernet224": { + "default_brkout_mode": "4x100G" + }, + "Ethernet232": { + "default_brkout_mode": "4x100G" + }, + "Ethernet240": { + "default_brkout_mode": "4x100G" + }, + "Ethernet248": { + "default_brkout_mode": "4x100G" + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l2/config b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l2/config new file mode 100644 index 000000000000..45a7b84d5032 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l2/config @@ -0,0 +1,3 @@ +l2_mem_entries=139264 +l3_mem_entries=8192 +l3_alpm_enable=0 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l3/config b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l3/config new file mode 100644 index 000000000000..3467c1b39716 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l3/config @@ -0,0 +1,3 @@ +l2_mem_entries=40000 +l3_mem_entries=40000 +l3_alpm_enable=2 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/pg_profile_lookup.ini b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/pg_profile_lookup.ini new file mode 100644 index 000000000000..9f2eacb6fc42 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 56368 18432 55120 -3 2496 + 25000 5m 56368 18432 55120 -3 2496 + 40000 5m 56368 18432 55120 -3 2496 + 50000 5m 56368 18432 55120 -3 2496 + 100000 5m 56368 18432 55120 -3 2496 + 10000 40m 56368 18432 55120 -3 2496 + 25000 40m 56368 18432 55120 -3 2496 + 40000 40m 56368 18432 55120 -3 2496 + 50000 40m 56368 18432 55120 -3 2496 + 100000 40m 56368 18432 55120 -3 2496 + 10000 300m 56368 18432 55120 -3 2496 + 25000 300m 56368 18432 55120 -3 2496 + 40000 300m 56368 18432 55120 -3 2496 + 50000 300m 56368 18432 55120 -3 2496 + 100000 300m 56368 18432 55120 -3 2496 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/platform-def.json b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/platform-def.json new file mode 100644 index 000000000000..4644f6e4549d --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/platform-def.json @@ -0,0 +1,23 @@ +{ + "fec-mode": { + "Ethernet0-127": { + "1": { + "10000": [ "none", "fc" ], + "25000": [ "none", "fc" ] + }, + "2": { + "20000": [ "none", "fc" ], + "50000": [ "none", "rs" ] + }, + "4": { + "40000": [ "none", "fc" ], + "100000": [ "none", "rs" ] + } + } + }, + "native-port-supported-speeds": { + "Ethernet0-127": { + "4": ["100000","40000"] + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/port_config.ini b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/port_config.ini new file mode 100644 index 000000000000..77deb1931856 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/port_config.ini @@ -0,0 +1,129 @@ +# name lanes alias index speed +Ethernet0 33,34 QSFP1/1 1 100000 +Ethernet2 35,36 QSFP1/2 1 100000 +Ethernet4 37,38 QSFP1/3 1 100000 +Ethernet6 39,40 QSFP1/4 1 100000 +Ethernet8 41,42 QSFP2/1 2 100000 +Ethernet10 43,44 QSFP2/2 2 100000 +Ethernet12 45,46 QSFP2/3 2 100000 +Ethernet14 47,48 QSFP2/4 2 100000 +Ethernet16 49,50 QSFP3/1 3 100000 +Ethernet18 51,52 QSFP3/2 3 100000 +Ethernet20 53,54 QSFP3/3 3 100000 +Ethernet22 55,56 QSFP3/4 3 100000 +Ethernet24 57,58 QSFP4/1 4 100000 +Ethernet26 59,60 QSFP4/2 4 100000 +Ethernet28 61,62 QSFP4/3 4 100000 +Ethernet30 63,64 QSFP4/4 4 100000 +Ethernet32 65,66 QSFP5/1 5 100000 +Ethernet34 67,68 QSFP5/2 5 100000 +Ethernet36 69,70 QSFP5/3 5 100000 +Ethernet38 71,72 QSFP5/4 5 100000 +Ethernet40 73,74 QSFP6/1 6 100000 +Ethernet42 75,76 QSFP6/2 6 100000 +Ethernet44 77,78 QSFP6/3 6 100000 +Ethernet46 79,80 QSFP6/4 6 100000 +Ethernet48 81,82 QSFP7/1 7 100000 +Ethernet50 83,84 QSFP7/2 7 100000 +Ethernet52 85,86 QSFP7/3 7 100000 +Ethernet54 87,88 QSFP7/4 7 100000 +Ethernet56 89,90 QSFP8/1 8 100000 +Ethernet58 91,92 QSFP8/2 8 100000 +Ethernet60 93,94 QSFP8/3 8 100000 +Ethernet62 95,96 QSFP8/4 8 100000 +Ethernet64 1,2 QSFP9/1 9 100000 +Ethernet66 3,4 QSFP9/2 9 100000 +Ethernet68 5,6 QSFP9/3 9 100000 +Ethernet70 7,8 QSFP9/4 9 100000 +Ethernet72 9,10 QSFP10/1 10 100000 +Ethernet74 11,12 QSFP10/2 10 100000 +Ethernet76 13,14 QSFP10/3 10 100000 +Ethernet78 15,16 QSFP10/4 10 100000 +Ethernet80 17,18 QSFP11/1 11 100000 +Ethernet82 19,20 QSFP11/2 11 100000 +Ethernet84 21,22 QSFP11/3 11 100000 +Ethernet86 23,24 QSFP11/4 11 100000 +Ethernet88 25,26 QSFP12/1 12 100000 +Ethernet90 27,28 QSFP12/2 12 100000 +Ethernet92 29,30 QSFP12/3 12 100000 +Ethernet94 31,32 QSFP12/4 12 100000 +Ethernet96 97,98 QSFP13/1 13 100000 +Ethernet98 99,100 QSFP13/2 13 100000 +Ethernet100 101,102 QSFP13/3 13 100000 +Ethernet102 103,104 QSFP13/4 13 100000 +Ethernet104 105,106 QSFP14/1 14 100000 +Ethernet106 107,108 QSFP14/2 14 100000 +Ethernet108 109,110 QSFP14/3 14 100000 +Ethernet110 111,112 QSFP14/4 14 100000 +Ethernet112 113,114 QSFP15/1 15 100000 +Ethernet114 115,116 QSFP15/2 15 100000 +Ethernet116 117,118 QSFP15/3 15 100000 +Ethernet118 119,120 QSFP15/4 15 100000 +Ethernet120 121,122 QSFP16/1 16 100000 +Ethernet122 123,124 QSFP16/2 16 100000 +Ethernet124 125,126 QSFP16/3 16 100000 +Ethernet126 127,128 QSFP16/4 16 100000 +Ethernet128 129,130 QSFP17/1 17 100000 +Ethernet130 131,132 QSFP17/2 17 100000 +Ethernet132 133,134 QSFP17/3 17 100000 +Ethernet134 135,136 QSFP17/4 17 100000 +Ethernet136 137,138 QSFP18/1 18 100000 +Ethernet138 139,140 QSFP18/2 18 100000 +Ethernet140 141,142 QSFP18/3 18 100000 +Ethernet142 143,144 QSFP18/4 18 100000 +Ethernet144 145,146 QSFP19/1 19 100000 +Ethernet146 147,148 QSFP19/2 19 100000 +Ethernet148 149,150 QSFP19/3 19 100000 +Ethernet150 151,152 QSFP19/4 19 100000 +Ethernet152 153,154 QSFP20/1 20 100000 +Ethernet154 155,156 QSFP20/2 20 100000 +Ethernet156 157,158 QSFP20/3 20 100000 +Ethernet158 159,160 QSFP20/4 20 100000 +Ethernet160 225,226 QSFP21/1 21 100000 +Ethernet162 227,228 QSFP21/2 21 100000 +Ethernet164 229,230 QSFP21/3 21 100000 +Ethernet166 231,232 QSFP21/4 21 100000 +Ethernet168 233,234 QSFP22/1 22 100000 +Ethernet170 235,236 QSFP22/2 22 100000 +Ethernet172 237,238 QSFP22/3 22 100000 +Ethernet174 239,240 QSFP22/4 22 100000 +Ethernet176 241,242 QSFP23/1 23 100000 +Ethernet178 243,244 QSFP23/2 23 100000 +Ethernet180 245,246 QSFP23/3 23 100000 +Ethernet182 247,248 QSFP23/4 23 100000 +Ethernet184 249,250 QSFP24/1 24 100000 +Ethernet186 251,252 QSFP24/2 24 100000 +Ethernet188 253,254 QSFP24/3 24 100000 +Ethernet190 255,256 QSFP24/4 24 100000 +Ethernet192 161,162 QSFP25/1 25 100000 +Ethernet194 163,164 QSFP25/2 25 100000 +Ethernet196 165,166 QSFP25/3 25 100000 +Ethernet198 167,168 QSFP25/4 25 100000 +Ethernet200 169,170 QSFP26/1 26 100000 +Ethernet202 171,172 QSFP26/2 26 100000 +Ethernet204 173,174 QSFP26/3 26 100000 +Ethernet206 175,176 QSFP26/4 26 100000 +Ethernet208 177,178 QSFP27/1 27 100000 +Ethernet210 179,180 QSFP27/2 27 100000 +Ethernet212 181,182 QSFP27/3 27 100000 +Ethernet214 183,184 QSFP27/4 27 100000 +Ethernet216 185,186 QSFP28/1 28 100000 +Ethernet218 187,188 QSFP28/2 28 100000 +Ethernet220 189,190 QSFP28/3 28 100000 +Ethernet222 191,192 QSFP28/4 28 100000 +Ethernet224 193,194 QSFP29/1 29 100000 +Ethernet226 195,196 QSFP29/2 29 100000 +Ethernet228 197,198 QSFP29/3 29 100000 +Ethernet230 199,200 QSFP29/4 29 100000 +Ethernet232 201,202 QSFP30/1 30 100000 +Ethernet234 203,204 QSFP30/2 30 100000 +Ethernet236 205,206 QSFP30/3 30 100000 +Ethernet238 207,208 QSFP30/4 30 100000 +Ethernet240 209,210 QSFP31/1 31 100000 +Ethernet242 211,212 QSFP31/2 31 100000 +Ethernet244 213,214 QSFP31/3 31 100000 +Ethernet246 215,216 QSFP31/4 31 100000 +Ethernet248 217,218 QSFP32/1 32 100000 +Ethernet250 219,220 QSFP32/2 32 100000 +Ethernet252 221,222 QSFP32/3 32 100000 +Ethernet254 223,224 QSFP32/4 32 100000 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/qos.json.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/qos.json.j2 new file mode 100644 index 000000000000..3e548325ea30 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/sai.profile b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/sai.profile new file mode 100644 index 000000000000..483e85c0c1fa --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-128x100G.config.bcm +SAI_NUM_ECMP_MEMBERS=64 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/th3-128x100G.config.bcm b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/th3-128x100G.config.bcm new file mode 100644 index 000000000000..2aa1955c10bc --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/th3-128x100G.config.bcm @@ -0,0 +1,445 @@ +pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff9fffe +ccm_dma_enable=0 +ccmdma_intr_enable=0 +ctr_evict_enable=0 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +phy_enable=0 +phy_null=1 +pll_bypass=1 + +port_fec=3 + +init_all_modules=0 + +sai_tunnel_global_sip_mask_enable=1 + +portmap_20=33:100:2 +portmap_21=35:100:2 +portmap_22=37:100:2 +portmap_23=39:100:2 + +portmap_24=41:100:2 +portmap_25=43:100:2 +portmap_26=45:100:2 +portmap_27=47:100:2 + +portmap_28=49:100:2 +portmap_29=51:100:2 +portmap_30=53:100:2 +portmap_31=55:100:2 + +portmap_32=57:100:2 +portmap_33=59:100:2 +portmap_34=61:100:2 +portmap_35=63:100:2 + +portmap_40=65:100:2 +portmap_41=67:100:2 +portmap_42=69:100:2 +portmap_43=71:100:2 + +portmap_44=73:100:2 +portmap_45=75:100:2 +portmap_46=77:100:2 +portmap_47=79:100:2 + +portmap_48=81:100:2 +portmap_49=83:100:2 +portmap_50=85:100:2 +portmap_51=87:100:2 + +portmap_52=89:100:2 +portmap_53=91:100:2 +portmap_54=93:100:2 +portmap_55=95:100:2 + +portmap_1=1:100:2 +portmap_2=3:100:2 +portmap_3=5:100:2 +portmap_4=7:100:2 + +portmap_5=9:100:2 +portmap_6=11:100:2 +portmap_7=13:100:2 +portmap_8=15:100:2 + +portmap_9=17:100:2 +portmap_10=19:100:2 +portmap_11=21:100:2 +portmap_12=23:100:2 + +portmap_13=25:100:2 +portmap_14=27:100:2 +portmap_15=29:100:2 +portmap_16=31:100:2 + +portmap_60=97:100:2 +portmap_61=99:100:2 +portmap_62=101:100:2 +portmap_63=103:100:2 + +portmap_64=105:100:2 +portmap_65=107:100:2 +portmap_66=109:100:2 +portmap_67=111:100:2 + +portmap_68=113:100:2 +portmap_69=115:100:2 +portmap_70=117:100:2 +portmap_71=119:100:2 + +portmap_72=121:100:2 +portmap_73=123:100:2 +portmap_74=125:100:2 +portmap_75=127:100:2 + +portmap_80=129:100:2 +portmap_81=131:100:2 +portmap_82=133:100:2 +portmap_83=135:100:2 + +portmap_84=137:100:2 +portmap_85=139:100:2 +portmap_86=141:100:2 +portmap_87=143:100:2 + +portmap_88=145:100:2 +portmap_89=147:100:2 +portmap_90=149:100:2 +portmap_91=151:100:2 + +portmap_92=153:100:2 +portmap_93=155:100:2 +portmap_94=157:100:2 +portmap_95=159:100:2 + +portmap_140=225:100:2 +portmap_141=227:100:2 +portmap_142=229:100:2 +portmap_143=231:100:2 + +portmap_144=233:100:2 +portmap_145=235:100:2 +portmap_146=237:100:2 +portmap_147=239:100:2 + +portmap_148=241:100:2 +portmap_149=243:100:2 +portmap_150=245:100:2 +portmap_151=247:100:2 + +portmap_152=249:100:2 +portmap_153=251:100:2 +portmap_154=253:100:2 +portmap_155=255:100:2 + +portmap_100=161:100:2 +portmap_101=163:100:2 +portmap_102=165:100:2 +portmap_103=167:100:2 + +portmap_104=169:100:2 +portmap_105=171:100:2 +portmap_106=173:100:2 +portmap_107=175:100:2 + +portmap_108=177:100:2 +portmap_109=179:100:2 +portmap_110=181:100:2 +portmap_111=183:100:2 + +portmap_112=185:100:2 +portmap_113=187:100:2 +portmap_114=189:100:2 +portmap_115=191:100:2 + +portmap_120=193:100:2 +portmap_121=195:100:2 +portmap_122=197:100:2 +portmap_123=199:100:2 + +portmap_124=201:100:2 +portmap_125=203:100:2 +portmap_126=205:100:2 +portmap_127=207:100:2 + +portmap_128=209:100:2 +portmap_129=211:100:2 +portmap_130=213:100:2 +portmap_131=215:100:2 + +portmap_132=217:100:2 +portmap_133=219:100:2 +portmap_134=221:100:2 +portmap_135=223:100:2 + +phy_chain_rx_lane_map_physical{33.0}=0x65732041 +phy_chain_tx_lane_map_physical{33.0}=0x47206531 +phy_chain_rx_lane_map_physical{41.0}=0x07561243 +phy_chain_tx_lane_map_physical{41.0}=0x36207514 +phy_chain_rx_lane_map_physical{49.0}=0x54632071 +phy_chain_tx_lane_map_physical{49.0}=0x06241735 +phy_chain_rx_lane_map_physical{57.0}=0x07561243 +phy_chain_tx_lane_map_physical{57.0}=0x35207614 +phy_chain_rx_lane_map_physical{65.0}=0x45623170 +phy_chain_tx_lane_map_physical{65.0}=0x51260734 +phy_chain_rx_lane_map_physical{73.0}=0x07561243 +phy_chain_tx_lane_map_physical{73.0}=0x37245610 +phy_chain_rx_lane_map_physical{81.0}=0x45632071 +phy_chain_tx_lane_map_physical{81.0}=0x51260734 +phy_chain_rx_lane_map_physical{89.0}=0x07561243 +phy_chain_tx_lane_map_physical{89.0}=0x26437510 +phy_chain_rx_lane_map_physical{1.0}=0x30176524 +phy_chain_tx_lane_map_physical{1.0}=0x20615374 +phy_chain_rx_lane_map_physical{9.0}=0x37562041 +phy_chain_tx_lane_map_physical{9.0}=0x05176432 +phy_chain_rx_lane_map_physical{17.0}=0x43607251 +phy_chain_tx_lane_map_physical{17.0}=0x70261435 +phy_chain_rx_lane_map_physical{25.0}=0x60347125 +phy_chain_tx_lane_map_physical{25.0}=0x46357120 +phy_chain_rx_lane_map_physical{97.0}=0x47601352 +phy_chain_tx_lane_map_physical{97.0}=0x04265137 +phy_chain_rx_lane_map_physical{105.0}=0x73206415 +phy_chain_tx_lane_map_physical{105.0}=0x26374150 +phy_chain_rx_lane_map_physical{113.0}=0x47632051 +phy_chain_tx_lane_map_physical{113.0}=0x03254617 +phy_chain_rx_lane_map_physical{121.0}=0x63027415 +phy_chain_tx_lane_map_physical{121.0}=0x63721045 +phy_chain_rx_lane_map_physical{129.0}=0x30154627 +phy_chain_tx_lane_map_physical{129.0}=0x04735261 +phy_chain_rx_lane_map_physical{137.0}=0x24753061 +phy_chain_tx_lane_map_physical{137.0}=0x37614520 +phy_chain_rx_lane_map_physical{145.0}=0x47601352 +phy_chain_tx_lane_map_physical{145.0}=0x63274510 +phy_chain_rx_lane_map_physical{153.0}=0x07361524 +phy_chain_tx_lane_map_physical{153.0}=0x36527104 +phy_chain_rx_lane_map_physical{225.0}=0x56410273 +phy_chain_tx_lane_map_physical{225.0}=0x10274635 +phy_chain_rx_lane_map_physical{233.0}=0x15740263 +phy_chain_tx_lane_map_physical{233.0}=0x24351607 +phy_chain_rx_lane_map_physical{241.0}=0x74015263 +phy_chain_tx_lane_map_physical{241.0}=0x04152637 +phy_chain_rx_lane_map_physical{249.0}=0x62037514 +phy_chain_tx_lane_map_physical{249.0}=0x72453160 +phy_chain_rx_lane_map_physical{161.0}=0x46510273 +phy_chain_tx_lane_map_physical{161.0}=0x01653724 +phy_chain_rx_lane_map_physical{169.0}=0x25743160 +phy_chain_tx_lane_map_physical{169.0}=0x07216435 +phy_chain_rx_lane_map_physical{177.0}=0x46510273 +phy_chain_tx_lane_map_physical{177.0}=0x01652734 +phy_chain_rx_lane_map_physical{185.0}=0x25743160 +phy_chain_tx_lane_map_physical{185.0}=0x37016425 +phy_chain_rx_lane_map_physical{193.0}=0x46510372 +phy_chain_tx_lane_map_physical{193.0}=0x06153724 +phy_chain_rx_lane_map_physical{201.0}=0x25743160 +phy_chain_tx_lane_map_physical{201.0}=0x36017524 +phy_chain_rx_lane_map_physical{209.0}=0x47601352 +phy_chain_tx_lane_map_physical{209.0}=0x04152736 +phy_chain_rx_lane_map_physical{217.0}=0x26453170 +phy_chain_tx_lane_map_physical{217.0}=0x36027415 + +serdes_core_rx_polarity_flip_physical{33}=0x29 +serdes_core_tx_polarity_flip_physical{33}=0xfe +serdes_core_rx_polarity_flip_physical{41}=0xb1 +serdes_core_tx_polarity_flip_physical{41}=0xe8 +serdes_core_rx_polarity_flip_physical{49}=0xca +serdes_core_tx_polarity_flip_physical{49}=0xb6 +serdes_core_rx_polarity_flip_physical{57}=0x9b +serdes_core_tx_polarity_flip_physical{57}=0xdc +serdes_core_rx_polarity_flip_physical{65}=0x17 +serdes_core_tx_polarity_flip_physical{65}=0x86 +serdes_core_rx_polarity_flip_physical{73}=0x9b +serdes_core_tx_polarity_flip_physical{73}=0x55 +serdes_core_rx_polarity_flip_physical{81}=0xa +serdes_core_tx_polarity_flip_physical{81}=0x6 +serdes_core_rx_polarity_flip_physical{89}=0x9b +serdes_core_tx_polarity_flip_physical{89}=0x48 +serdes_core_rx_polarity_flip_physical{1}=0xec +serdes_core_tx_polarity_flip_physical{1}=0x56 +serdes_core_rx_polarity_flip_physical{9}=0x13 +serdes_core_tx_polarity_flip_physical{9}=0xa6 +serdes_core_rx_polarity_flip_physical{17}=0x5a +serdes_core_tx_polarity_flip_physical{17}=0xc6 +serdes_core_rx_polarity_flip_physical{25}=0xf +serdes_core_tx_polarity_flip_physical{25}=0x4e +serdes_core_rx_polarity_flip_physical{97}=0x17 +serdes_core_tx_polarity_flip_physical{97}=0x2e +serdes_core_rx_polarity_flip_physical{105}=0xce +serdes_core_tx_polarity_flip_physical{105}=0x7c +serdes_core_rx_polarity_flip_physical{113}=0xa +serdes_core_tx_polarity_flip_physical{113}=0x35 + +serdes_core_rx_polarity_flip_physical{121}=0xb9 +serdes_core_tx_polarity_flip_physical{121}=0xef +serdes_core_rx_polarity_flip_physical{129}=0xe8 +serdes_core_tx_polarity_flip_physical{129}=0xac +serdes_core_rx_polarity_flip_physical{137}=0xcb +serdes_core_tx_polarity_flip_physical{137}=0x9c +serdes_core_rx_polarity_flip_physical{145}=0x17 +serdes_core_tx_polarity_flip_physical{145}=0x32 +serdes_core_rx_polarity_flip_physical{153}=0xb9 +serdes_core_tx_polarity_flip_physical{153}=0xaf +serdes_core_rx_polarity_flip_physical{225}=0xaa +serdes_core_tx_polarity_flip_physical{225}=0x7 +serdes_core_rx_polarity_flip_physical{233}=0x31 +serdes_core_tx_polarity_flip_physical{233}=0x47 +serdes_core_rx_polarity_flip_physical{241}=0xe8 +serdes_core_tx_polarity_flip_physical{241}=0x9e +serdes_core_rx_polarity_flip_physical{249}=0xec +serdes_core_tx_polarity_flip_physical{249}=0x1f +serdes_core_rx_polarity_flip_physical{161}=0x6a +serdes_core_tx_polarity_flip_physical{161}=0xd4 +serdes_core_rx_polarity_flip_physical{169}=0x9e +serdes_core_tx_polarity_flip_physical{169}=0x7b +serdes_core_rx_polarity_flip_physical{177}=0x6a +serdes_core_tx_polarity_flip_physical{177}=0xcc +serdes_core_rx_polarity_flip_physical{185}=0x9e +serdes_core_tx_polarity_flip_physical{185}=0x58 +serdes_core_rx_polarity_flip_physical{193}=0x6f +serdes_core_tx_polarity_flip_physical{193}=0x24 +serdes_core_rx_polarity_flip_physical{201}=0x9e +serdes_core_tx_polarity_flip_physical{201}=0xdf +serdes_core_rx_polarity_flip_physical{209}=0x17 +serdes_core_tx_polarity_flip_physical{209}=0xe9 +serdes_core_rx_polarity_flip_physical{217}=0xec +serdes_core_tx_polarity_flip_physical{217}=0x68 + + +#dport_map_port_20=1 +#dport_map_port_21=2 +#dport_map_port_22=3 +#dport_map_port_23=4 +#dport_map_port_24=5 +#dport_map_port_25=6 +#dport_map_port_26=7 +#dport_map_port_27=8 +#dport_map_port_28=9 +#dport_map_port_29=10 +#dport_map_port_30=11 +#dport_map_port_31=12 +#dport_map_port_32=13 +#dport_map_port_33=14 +#dport_map_port_34=15 +#dport_map_port_35=16 +#dport_map_port_40=17 +#dport_map_port_41=18 +#dport_map_port_42=19 +#dport_map_port_43=20 +#dport_map_port_44=21 +#dport_map_port_45=22 +#dport_map_port_46=23 +#dport_map_port_47=24 +#dport_map_port_48=25 +#dport_map_port_49=26 +#dport_map_port_50=27 +#dport_map_port_51=28 +#dport_map_port_52=29 +#dport_map_port_53=30 +#dport_map_port_54=31 +#dport_map_port_55=32 +#dport_map_port_1=33 +#dport_map_port_2=34 +#dport_map_port_3=35 +#dport_map_port_4=36 +#dport_map_port_5=37 +#dport_map_port_6=38 +#dport_map_port_7=39 +#dport_map_port_8=40 +#dport_map_port_9=41 +#dport_map_port_10=42 +#dport_map_port_11=43 +#dport_map_port_12=44 +#dport_map_port_13=45 +#dport_map_port_14=46 +#dport_map_port_15=47 +#dport_map_port_16=48 +#dport_map_port_60=49 +#dport_map_port_61=50 +#dport_map_port_62=51 +#dport_map_port_63=52 +#dport_map_port_64=53 +#dport_map_port_65=54 +#dport_map_port_66=55 +#dport_map_port_67=56 +#dport_map_port_68=57 +#dport_map_port_69=58 +#dport_map_port_70=59 +#dport_map_port_71=60 +#dport_map_port_72=61 +#dport_map_port_73=62 +#dport_map_port_74=63 +#dport_map_port_75=64 +#dport_map_port_80=65 +#dport_map_port_81=66 +#dport_map_port_82=67 +#dport_map_port_83=68 +#dport_map_port_84=69 +#dport_map_port_85=70 +#dport_map_port_86=71 +#dport_map_port_87=72 +#dport_map_port_88=73 +#dport_map_port_89=74 +#dport_map_port_90=75 +#dport_map_port_91=76 +#dport_map_port_92=77 +#dport_map_port_93=78 +#dport_map_port_94=79 +#dport_map_port_95=80 +#dport_map_port_140=81 +#dport_map_port_141=82 +#dport_map_port_142=83 +#dport_map_port_143=84 +#dport_map_port_144=85 +#dport_map_port_145=86 +#dport_map_port_146=87 +#dport_map_port_147=88 +#dport_map_port_148=89 +#dport_map_port_149=90 +#dport_map_port_150=91 +#dport_map_port_151=92 +#dport_map_port_152=93 +#dport_map_port_153=94 +#dport_map_port_154=95 +#dport_map_port_155=96 +#dport_map_port_100=97 +#dport_map_port_101=98 +#dport_map_port_102=99 +#dport_map_port_103=100 +#dport_map_port_104=101 +#dport_map_port_105=102 +#dport_map_port_106=103 +#dport_map_port_107=104 +#dport_map_port_108=105 +#dport_map_port_109=106 +#dport_map_port_110=107 +#dport_map_port_111=108 +#dport_map_port_112=109 +#dport_map_port_113=110 +#dport_map_port_114=111 +#dport_map_port_115=112 +#dport_map_port_120=113 +#dport_map_port_121=114 +#dport_map_port_122=115 +#dport_map_port_123=116 +#dport_map_port_124=117 +#dport_map_port_125=118 +#dport_map_port_126=119 +#dport_map_port_127=120 +#dport_map_port_128=121 +#dport_map_port_129=122 +#dport_map_port_130=123 +#dport_map_port_131=124 +#dport_map_port_132=125 +#dport_map_port_133=126 +#dport_map_port_134=127 +#dport_map_port_135=128 + +core_clock_frequency=1325 +dpr_clock_frequency=1000 +device_clock_frequency=1325 +port_flex_enable=1 + +#firmware load method, use fast load +load_firmware=0x2 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/custom_led.bin b/device/celestica/x86_64-cel_silverstone_v2-r0/custom_led.bin new file mode 100644 index 000000000000..2424dd07f103 Binary files /dev/null and b/device/celestica/x86_64-cel_silverstone_v2-r0/custom_led.bin differ diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/default_sku b/device/celestica/x86_64-cel_silverstone_v2-r0/default_sku new file mode 100644 index 000000000000..c7ac2af486d5 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/default_sku @@ -0,0 +1 @@ +Silverstone_v2 t1 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/installer.conf b/device/celestica/x86_64-cel_silverstone_v2-r0/installer.conf new file mode 100644 index 000000000000..2205961520ea --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_no_watchdog earlycon=uart8250,mmio,0xdf37b000" diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/led_proc_init.soc b/device/celestica/x86_64-cel_silverstone_v2-r0/led_proc_init.soc new file mode 100644 index 000000000000..cd637098744c --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/led_proc_init.soc @@ -0,0 +1,3 @@ +##led auto on; led start +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +led auto on; led start diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/linkscan_led_fw.bin b/device/celestica/x86_64-cel_silverstone_v2-r0/linkscan_led_fw.bin new file mode 100644 index 000000000000..10acc6ad4b64 Binary files /dev/null and b/device/celestica/x86_64-cel_silverstone_v2-r0/linkscan_led_fw.bin differ diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/media_settings.json b/device/celestica/x86_64-cel_silverstone_v2-r0/media_settings.json new file mode 100644 index 000000000000..b14bbc45819d --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/media_settings.json @@ -0,0 +1,18024 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-32": { + "Default": { + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": 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{ + "lane0": "0x00000057", + "lane4": "0x00000057", + "lane1": "0x00000057", + "lane5": "0x00000057", + "lane2": "0x00000057", + "lane6": "0x00000057", + "lane3": "0x00000057", + "lane7": "0x00000057" + }, + "post1": { + "lane0": "0xfffffffe", + "lane4": "0xfffffffe", + "lane1": "0xfffffffe", + "lane5": "0xfffffffe", + "lane2": "0xfffffffe", + "lane6": "0xfffffffe", + "lane3": "0xfffffffe", + "lane7": "0xfffffffe" + } + }, + "10000-optical": { + "pre1": { + "lane0": "0xfffffffe", + "lane4": "0xfffffffe", + "lane1": "0xfffffffe", + "lane5": "0xfffffffe", + "lane2": "0xfffffffe", + "lane6": "0xfffffffe", + "lane3": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "main": { + "lane0": "0x0000004a", + "lane4": "0x0000004a", + "lane1": "0x0000004a", + "lane5": "0x0000004a", + "lane2": "0x0000004a", + "lane6": "0x0000004a", + "lane3": "0x0000004a", + "lane7": "0x0000004a" + }, + "post1": { + "lane0": "0xfffffff2", + "lane4": "0xfffffff2", + "lane1": "0xfffffff2", + "lane5": "0xfffffff2", + "lane2": "0xfffffff2", + "lane6": "0xfffffff2", + "lane3": "0xfffffff2", + "lane7": "0xfffffff2" + } + } + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pcie.yaml b/device/celestica/x86_64-cel_silverstone_v2-r0/pcie.yaml new file mode 100644 index 000000000000..0a4fcfbb29da --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/pcie.yaml @@ -0,0 +1,35 @@ +- bus: '00' + dev: '1f' + fn: '3' + id: 8c22 + name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller (rev 05)' + +- bus: '04' + dev: '00' + fn: '0' + id: 15ab + name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane' + +- bus: '04' + dev: '00' + fn: '1' + id: 15ab + name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane' + +- bus: '06' + dev: '00' + fn: '0' + id: b980 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b980 (rev 11)' + +- bus: '0f' + dev: '00' + fn: '0' + id: 1533 + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev 03)' + +- bus: '10' + dev: '00' + fn: '0' + id: 7021 + name: 'Memory controller: Xilinx Corporation Device 7021' diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pd-plugin.json b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pd-plugin.json new file mode 100644 index 000000000000..e17bdf2aee33 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pd-plugin.json @@ -0,0 +1,188 @@ +{ + "XCVR": + { + "xcvr_present": { + "i2c": + { + "valmap-QSFP-DD": {"0": true,"1": false}, + "valmap-SFP+": { "0": true, "1": false} + } + } + }, + + "PSU": + { + "name": + { + "1": "PSU 1", + "2": "PSU 2" + }, + "fan_name": + { + "1": + { + "1": "PSU 1 Fan 1" + }, + "2": + { + "1": "PSU 2 Fan 1" + } + + }, + "thermal_name": + { + "1": "PSU 1 Temp1", + "2": "PSU 2 Temp1" + }, + "psu_present": + { + "bmc": + { + "valmap": {"1":true, "0":false} + }, + "i2c": + { + "valmap": {"1":true, "0": false} + } + }, + "psu_fan_dir": + { + "bmc": + { + "valmap": {"1":"INTAKE", "0":"EXHAUST"} + }, + "i2c": + { + "valmap": + { + "TDPS-1500AB-A 6":"EXHAUST", + "SAC1500D12AA":"EXHAUST", + "TDPS-1500AB-6 B":"EXHAUST", + "TDPS-1500AB-6 D":"EXHAUST", + "TDPS-1500AB-6 E":"EXHAUST", + "SAC1500D12RA":"INTAKE", + "TDPS-1500AB-6 C":"INTAKE", + "TDPS-1500AB-7 C":"INTAKE" + } + } + }, + "psu_led_color": + { + "colmap": {"green":"green", "red":"red"} + }, + "psu_power_good": + { + "bmc": + { + "valmap": {"1":true} + }, + "i2c": + { + "valmap": {"1":true, "0": false} + } + }, + "PSU_FAN_MAX_SPEED":"29000" + }, + + "FAN": + { + "drawer_name": + { + "1": "Drawer 1", + "2": "Drawer 2", + "3": "Drawer 3", + "4": "Drawer 4", + "5": "Drawer 5", + "6": "Drawer 6", + "7": "Drawer 7" + }, + "name": + { + "1": + { + "1": "Fan 1 Front", + "2": "Fan 1 Rear" + }, + "2": + { + "1": "Fan 2 Front", + "2": "Fan 2 Rear" + }, + "3": + { + "1": "Fan 3 Front", + "2": "Fan 3 Rear" + }, + "4": + { + "1": "Fan 4 Front", + "2": "Fan 4 Rear" + }, + "5": + { + "1": "Fan 5 Front", + "2": "Fan 5 Rear" + }, + "6": + { + "1": "Fan 6 Front", + "2": "Fan 6 Rear" + }, + "7": + { + "1": "Fan 7 Front", + "2": "Fan 7 Rear" + } + }, + "direction": + { + "bmc": + { + "valmap": {"1":"INTAKE", "0":"EXHAUST"} + }, + "i2c": + { + "valmap": {"0":"INTAKE", "1":"EXHAUST"} + } + + }, + + "present": + { + "i2c": + { + "valmap": {"0":true, "1":false} + }, + "bmc": + { + "valmap": {"0":true, "1":false} + } + }, + + "FAN_MAX_RPM_SPEED": + { + "INTAKE": {"0": "32000", "1": "28000"}, + "EXHAUST": {"0": "32000", "1": "30200"} + }, + "pwm_to_duty_cycle": "lambda pwm: ((pwm*100)/255)", + "duty_cycle_to_pwm": "lambda dc: ((dc*255)/100)" + }, + + "THERMAL": + { + "NONE_BMC": + { + "temp1_high_threshold": + { + "PSU1_TEMP1": {"B2F": "116", "F2B": "116"}, + "PSU2_TEMP1": {"B2F": "116", "F2B": "116"}, + "TEMP_FB_U17": {"B2F": "56", "F2B": "N/A"}, + "TEMP_SW_U16": {"B2F": "N/A", "F2B": "59"}, + "XP0R8V_Temp": {"B2F": "125", "F2B": "125"}, + "VDD_CORE_Temp": {"B2F": "125", "F2B": "125"}, + "XP3R3V_L_Temp": {"B2F": "125", "F2B": "125"}, + "XP3R3V_R_Temp": {"B2F": "125", "F2B": "125"} + } + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-bmc b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-bmc new file mode 100644 index 000000000000..87647bff54f9 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-bmc @@ -0,0 +1,2114 @@ +{ +"PLATFORM": +{ + "num_psus": 2, + "num_fantrays": 7, + "num_fans_pertray": 2, + "num_ports": 34, + "num_temps": 14, + "num_component": 11, + "bmc_present": "True", + "pddf_dev_types": + { + "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", + "CPLD": + [ + "i2c_cpld" + ], + "PSU": + [ + "psu_eeprom", + "psu_pmbus" + ], + "FAN": + [ + "fan_ctrl", + "fan_eeprom" + ], + "PORT_MODULE": + [ + "pddf_xcvr" + ], + "FPGAPCIE": + [ + "fpgapci" + ] + }, + "std_kos": + [ + "lpc_ich", + "i2c-dev", + "ipmi_devintf", + "ipmi_si", + "i2c_mux_pca954x", + "optoe", + "at24", + "i2c-i801" + ], + "pddf_kos": + [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_led_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", + "pddf_fpgapci_driver", + "pddf_fpgapci_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module" + ], + "custom_kos": + [ + "pddf_custom_fpga_algo", + "pddf_custom_wdt" + ] + }, + + "SYSTEM": + { + "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, + "i2c": + { + "CONTROLLERS": + [ + {"dev_name":"i2c-0", "dev":"SMBUS0"}, + {"dev_name":"pcie-0", "dev":"PCIE0"} + ] + } + }, + + "SMBUS0": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x0"}, + "DEVICES": + [ + {"dev": "EEPROM1"} + ] + } + }, + + "EEPROM1": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56", "dev_type": "24c64"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "PCIE0": + { + "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"}, + "i2c": + { + "DEVICES": + [ + {"dev": "FPGAPCIE0"} + ] + } + }, + + "FPGAPCIE0": + { + "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x0"}, + "dev_attr": {"vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0", + "data_size":"0x25000", "i2c_ch_base_offset":"0x00010000", "i2c_ch_size":"0x1000", "virt_i2c_ch":"0xf"}, + "channel": + [ + {"chn":"9", "dev":"CPLD_S1"}, + {"chn":"9", "dev":"CPLD_S2"}, + {"chn":"10", "dev":"MUX1"}, + {"chn":"10", "dev":"MUX2"}, + {"chn":"10", "dev":"MUX3"}, + {"chn":"10", "dev":"MUX4"}, + {"chn":"11", "dev":"PORT33"}, + {"chn":"12", "dev":"PORT34"} + ] + } + }, + + "CPLD_S1": + { + "dev_info": {"device_type":"CPLD", "device_name":"CPLD_S1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6C", "dev_addr":"0x30", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_S2": + { + "dev_info": {"device_type":"CPLD", "device_name":"CPLD_S2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6C", "dev_addr":"0x31", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "MUX1": + { + "dev_info": {"device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x2", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PORT16"}, + {"chn":"1", "dev":"PORT13"}, + {"chn":"2", "dev":"PORT12"}, + {"chn":"3", "dev":"PORT10"}, + {"chn":"4", "dev":"PORT9"}, + {"chn":"5", "dev":"PORT14"}, + {"chn":"6", "dev":"PORT11"}, + {"chn":"7", "dev":"PORT7"} + ] + } + }, + + "MUX2": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0xa", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PORT20"}, + {"chn":"1", "dev":"PORT17"}, + {"chn":"2", "dev":"PORT22"}, + {"chn":"3", "dev":"PORT25"}, + {"chn":"4", "dev":"PORT19"}, + {"chn":"5", "dev":"PORT21"}, + {"chn":"6", "dev":"PORT24"}, + {"chn":"7", "dev":"PORT18"} + ] + } + }, + + "MUX3": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x71", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x12", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PORT3"}, + {"chn":"1", "dev":"PORT4"}, + {"chn":"2", "dev":"PORT1"}, + {"chn":"3", "dev":"PORT2"}, + {"chn":"4", "dev":"PORT8"}, + {"chn":"5", "dev":"PORT6"}, + {"chn":"6", "dev":"PORT5"}, + {"chn":"7", "dev":"PORT15"} + ] + } + }, + + "MUX4": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x1a", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PORT27"}, + {"chn":"1", "dev":"PORT32"}, + {"chn":"2", "dev":"PORT29"}, + {"chn":"3", "dev":"PORT31"}, + {"chn":"4", "dev":"PORT30"}, + {"chn":"5", "dev":"PORT23"}, + {"chn":"6", "dev":"PORT26"}, + {"chn":"7", "dev":"PORT28"} + ] + } + }, + + "PORT1": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT1", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"1"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT1-EEPROM" }, + {"itf":"control", "dev":"PORT1-CTRL" } + ] + } + }, + "PORT1-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": {"parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT1-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX3", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": {"parent_bus":"0x13", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT2": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT2", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"2"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT2-EEPROM" }, + {"itf":"control", "dev":"PORT2-CTRL" } + ] + } + }, + "PORT2-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": {"parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT2-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX3", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": {"parent_bus":"0x14", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + + "PORT3": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT3", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"3"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT3-EEPROM" }, + {"itf":"control", "dev":"PORT3-CTRL" } + ] + } + }, + "PORT3-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": {"parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT3-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX3", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": {"parent_bus":"0x11", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT4": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT4", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"4"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT4-EEPROM" }, + {"itf":"control", "dev":"PORT4-CTRL" } + ] + } + }, + "PORT4-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": {"parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT4-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX3", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": {"parent_bus":"0x12", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT5": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT5", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"5"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT5-EEPROM" }, + {"itf":"control", "dev":"PORT5-CTRL" } + ] + } + }, + "PORT5-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": {"parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT5-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX3", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": {"parent_bus":"0x17", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT6": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT6", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"6"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT6-EEPROM" }, + {"itf":"control", "dev":"PORT6-CTRL" } + ] + } + }, + "PORT6-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": {"parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT6-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX3", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": {"parent_bus":"0x16", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT7": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT7", "device_parent":"MUX1"}, + "dev_attr": {"dev_idx":"7"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT7-EEPROM" }, + {"itf":"control", "dev":"PORT7-CTRL" } + ] + } + }, + "PORT7-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": {"parent_bus":"0x8", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT7-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": {"parent_bus":"0x8", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT8": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT8", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"8"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT8-EEPROM" }, + {"itf":"control", "dev":"PORT8-CTRL" } + ] + } + }, + "PORT8-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": {"parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT8-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX3", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": {"parent_bus":"0x15", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT9": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT9", "device_parent":"MUX1"}, + "dev_attr": {"dev_idx":"9"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT9-EEPROM" }, + {"itf":"control", "dev":"PORT9-CTRL" } + ] + } + }, + "PORT9-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": {"parent_bus":"0x5", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT9-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX1", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": {"parent_bus":"0x5", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT10": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT10", "device_parent":"MUX1"}, + "dev_attr": {"dev_idx":"10"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT10-EEPROM" }, + {"itf":"control", "dev":"PORT10-CTRL" } + ] + } + }, + "PORT10-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": {"parent_bus":"0x4", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT10-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX1", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": {"parent_bus":"0x4", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT11": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT11", "device_parent":"MUX1"}, + "dev_attr": {"dev_idx":"11"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT11-EEPROM" }, + {"itf":"control", "dev":"PORT11-CTRL" } + ] + } + }, + "PORT11-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": {"parent_bus":"0x7", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT11-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX1", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": {"parent_bus":"0x7", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT12": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT12", "device_parent":"MUX1"}, + "dev_attr": {"dev_idx":"12"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT12-EEPROM" }, + {"itf":"control", "dev":"PORT12-CTRL" } + ] + } + }, + "PORT12-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": {"parent_bus":"0x3", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT12-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX1", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": {"parent_bus":"0x3", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT13": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT13", "device_parent":"MUX1"}, + "dev_attr": {"dev_idx":"13"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT13-EEPROM" }, + {"itf":"control", "dev":"PORT13-CTRL" } + ] + } + }, + "PORT13-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT13-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX1", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT14": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT14", "device_parent":"MUX1"}, + "dev_attr": {"dev_idx":"14"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT14-EEPROM" }, + {"itf":"control", "dev":"PORT14-CTRL" } + ] + } + }, + "PORT14-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT14-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX1", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT15": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT15", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"15"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT15-EEPROM" }, + {"itf":"control", "dev":"PORT15-CTRL" } + ] + } + }, + "PORT15-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": {"parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT15-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX3", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": {"parent_bus":"0x18", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT16": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT16", "device_parent":"MUX1"}, + "dev_attr": {"dev_idx":"16"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT16-EEPROM" }, + {"itf":"control", "dev":"PORT16-CTRL" } + ] + } + }, + "PORT16-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT16-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX1", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT17": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT17", "device_parent":"MUX2"}, + "dev_attr": {"dev_idx":"17"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT17-EEPROM" }, + {"itf":"control", "dev":"PORT17-CTRL" } + ] + } + }, + "PORT17-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": {"parent_bus":"0xa", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT17-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX2", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": {"parent_bus":"0xa", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT18": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT18", "device_parent":"MUX2"}, + "dev_attr": {"dev_idx":"18"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT18-EEPROM" }, + {"itf":"control", "dev":"PORT18-CTRL" } + ] + } + }, + "PORT18-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": {"parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT18-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX2", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": {"parent_bus":"0x10", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT19": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT19", "device_parent":"MUX2"}, + "dev_attr": {"dev_idx":"19"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT19-EEPROM" }, + {"itf":"control", "dev":"PORT19-CTRL" } + ] + } + }, + "PORT19-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": {"parent_bus":"0xd", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT19-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX2", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": {"parent_bus":"0xd", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT20": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT20", "device_parent":"MUX2"}, + "dev_attr": {"dev_idx":"20"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT20-EEPROM" }, + {"itf":"control", "dev":"PORT20-CTRL" } + ] + } + }, + "PORT20-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": {"parent_bus":"0x9", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT20-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX2", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": {"parent_bus":"0x9", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT21": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT21", "device_parent":"MUX2"}, + "dev_attr": {"dev_idx":"21"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT21-EEPROM" }, + {"itf":"control", "dev":"PORT21-CTRL" } + ] + } + }, + "PORT21-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": {"parent_bus":"0xe", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT21-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX2", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": {"parent_bus":"0xe", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT22": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT22", "device_parent":"MUX2"}, + "dev_attr": {"dev_idx":"22"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT22-EEPROM" }, + {"itf":"control", "dev":"PORT22-CTRL" } + ] + } + }, + "PORT22-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": {"parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT22-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX2", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": {"parent_bus":"0xb", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT23": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT23", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"23"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT23-EEPROM" }, + {"itf":"control", "dev":"PORT23-CTRL" } + ] + } + }, + "PORT23-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT23-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX4", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1e", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT24": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT24", "device_parent":"MUX2"}, + "dev_attr": {"dev_idx":"24"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT24-EEPROM" }, + {"itf":"control", "dev":"PORT24-CTRL" } + ] + } + }, + "PORT24-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": {"parent_bus":"0xf", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT24-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX2", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": {"parent_bus":"0xf", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT25": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT25", "device_parent":"MUX2"}, + "dev_attr": {"dev_idx":"25"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT25-EEPROM" }, + {"itf":"control", "dev":"PORT25-CTRL" } + ] + } + }, + "PORT25-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": {"parent_bus":"0xc", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT25-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX2", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": {"parent_bus":"0xc", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT26": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT26", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"26"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT26-EEPROM" }, + {"itf":"control", "dev":"PORT26-CTRL" } + ] + } + }, + "PORT26-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT26-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1f", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT27": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT27", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"27"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT27-EEPROM" }, + {"itf":"control", "dev":"PORT27-CTRL" } + ] + } + }, + "PORT27-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": {"parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT27-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": {"parent_bus":"0x19", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT28": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT28", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"28"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT28-EEPROM" }, + {"itf":"control", "dev":"PORT28-CTRL" } + ] + } + }, + "PORT28-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": {"parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT28-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": {"parent_bus":"0x20", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT29": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT29", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"29"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT29-EEPROM" }, + {"itf":"control", "dev":"PORT29-CTRL" } + ] + } + }, + "PORT29-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT29-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1b", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT30": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT30", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"30"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT30-EEPROM" }, + {"itf":"control", "dev":"PORT30-CTRL" } + ] + } + }, + "PORT30-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + + "PORT30-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1d", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT31": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT31", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"31"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT31-EEPROM" }, + {"itf":"control", "dev":"PORT31-CTRL" } + ] + } + }, + "PORT31-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT31-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1c", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT32": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT32", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"32"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT32-EEPROM" }, + {"itf":"control", "dev":"PORT32-CTRL" } + ] + } + }, + "PORT32-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT32-CTRL": + { + "dev_info": {"device_type":"pci", "device_name":"PORT32-CTRL", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1a", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT33": + { + "dev_info": {"device_type":"SFP+", "device_name":"PORT33", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"dev_idx":"33"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT33-EEPROM"}, + {"itf":"control", "dev":"PORT33-CTRL"} + ] + } + }, + "PORT33-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"FPGAPCIE0", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6E", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT33-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT33-CTRL", "device_parent":"FPGAPCIE0", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6E", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}, + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x00", "attr_cmpval":"0x00", "attr_len":"1"} + ] + } + }, + + "PORT34": + { + "dev_info": {"device_type":"SFP+", "device_name":"PORT34", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"dev_idx":"34"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT34-EEPROM" }, + {"itf":"control", "dev":"PORT34-CTRL" } + ] + } + }, + "PORT34-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT34-EEPROM", "device_parent":"FPGAPCIE0", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6F", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT34-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT34-CTRL", "device_parent":"FPGAPCIE0", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6F", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}, + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x00", "attr_cmpval":"0x00", "attr_len":"1"} + ] + } + }, + + "PSU1": + { + "dev_info": {"device_type":"PSU"}, + "dev_attr": {"dev_idx":"0", "num_psu_fans": "1"}, + "bmc": { + "ipmitool": { + "attr_list": + [ + {"attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3A", "raw": "1", "type":"raw", "offset":"2", "mask":"0x01"}, + {"attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3A", "type":"raw", "raw": "1", "offset":"2", "mask":"0x0F"}, + {"attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Board Part Number", "separator":": ","field_pos":"2"}, + {"attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Board Serial", "separator":": ","field_pos":"2"}, + {"attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Board Mfg", "separator":": ", "field_pos":"2"}, + {"attr_name":"psu_fan_dir", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x07", "type": "raw","raw": "1"}, + {"attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x30", "type": "raw", "raw": "1", "offset":"0", "multiplier":"6000000"}, + {"attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2E", "type": "raw", "raw":"1", "offset":"0", "multiplier":"100"}, + {"attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2F", "type": "raw", "raw":"1", "offset":"0", "multiplier":"500"}, + {"attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2A", "type": "raw", "raw": "1", "offset":"0", "multiplier":"6000000"}, + {"attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x28", "type": "raw", "raw":"1", "offset":"0", "multiplier":"100"}, + {"attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x29", "type": "raw", "raw":"1", "offset":"0", "multiplier":"500"}, + {"attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2B", "type": "raw", "raw":"1", "offset":"0", "multiplier": "200"}, + {"attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2C", "type": "raw", "raw":"1", "offset":"0", "multiplier":"1000"}, + {"attr_name":"psu_temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x2C", "type": "raw", "raw":"1", "offset":"5", "multiplier":"1"}, + {"attr_name":"psu_v_out_max", "bmc_cmd":"ipmitool raw 0x04 0x27 0x2E", "type": "raw", "raw":"1", "offset":"5", "multiplier":"100"}, + {"attr_name":"psu_v_out_min", "bmc_cmd":"ipmitool raw 0x04 0x27 0x2E", "type": "raw", "raw":"1", "offset":"2", "multiplier":"100"}, + {"attr_name":"psu_p_out_max", "bmc_cmd":"ipmitool raw 0x04 0x27 0x30", "type": "raw", "raw":"1", "offset":"1", "multiplier":"6000"} + ] + } + } + }, + + "PSU2": + { + "dev_info": {"device_type":"PSU"}, + "dev_attr": {"dev_idx":"1", "num_psu_fans": "1"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3B", "raw": "1", "type":"raw", "offset":"2", "mask":"0x01"}, + {"attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3B", "type":"raw", "raw": "1", "offset":"2", "mask":"0x0F"}, + {"attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Board Part Number", "separator":": ","field_pos":"2"}, + {"attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Board Serial", "separator":": ","field_pos":"2"}, + {"attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Board Mfg", "separator":": ", "field_pos":"2"}, + {"attr_name":"psu_fan_dir", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x07", "type": "raw", "raw": "1"}, + {"attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x39", "type": "raw", "raw": "1", "offset":"0", "multiplier":"6000000"}, + {"attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x37", "type": "raw", "raw":"1", "offset":"0", "multiplier":"100"}, + {"attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x38", "type": "raw", "raw":"1", "offset":"0", "multiplier":"500"}, + {"attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x33", "type": "raw", "raw": "1", "offset":"0", "multiplier":"6000000"}, + {"attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x31", "type": "raw", "raw":"1", "offset":"0", "multiplier":"100"}, + {"attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x32", "type": "raw", "raw":"1", "offset":"0", "multiplier":"500"}, + {"attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x34", "type": "raw", "raw":"1", "offset":"0", "multiplier": "200"}, + {"attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x35", "type": "raw", "raw":"1", "offset":"0", "multiplier":"1000"}, + {"attr_name":"psu_temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x35", "type": "raw", "raw":"1", "offset":"5", "multiplier":"1"}, + {"attr_name":"psu_v_out_max", "bmc_cmd":"ipmitool raw 0x04 0x27 0x37", "type": "raw", "raw":"1", "offset":"5", "multiplier":"100"}, + {"attr_name":"psu_v_out_min", "bmc_cmd":"ipmitool raw 0x04 0x27 0x37", "type": "raw", "raw":"1", "offset":"2", "multiplier":"100"}, + {"attr_name":"psu_p_out_max", "bmc_cmd":"ipmitool raw 0x04 0x27 0x39", "type": "raw", "raw":"1", "offset":"1", "multiplier":"6000"} + ] + } + } + }, + + "FAN-CTRL": + { + "dev_info": {"device_type":"FAN"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"fan1_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type":"raw", "raw":"1"}, + {"attr_name":"fan2_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type":"raw", "raw":"1"}, + {"attr_name":"fan3_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type":"raw", "raw":"1"}, + {"attr_name":"fan4_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type":"raw", "raw":"1"}, + {"attr_name":"fan5_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type":"raw", "raw":"1"}, + {"attr_name":"fan6_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type":"raw", "raw":"1"}, + {"attr_name":"fan7_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type":"raw", "raw":"1"}, + {"attr_name":"fan8_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type":"raw", "raw":"1"}, + {"attr_name":"fan9_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x04", "type":"raw", "raw":"1"}, + {"attr_name":"fan10_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x04", "type":"raw", "raw":"1"}, + {"attr_name":"fan11_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x05", "type":"raw", "raw":"1"}, + {"attr_name":"fan12_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x05", "type":"raw", "raw":"1"}, + {"attr_name":"fan13_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x06", "type":"raw", "raw":"1"}, + {"attr_name":"fan14_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x06", "type":"raw", "raw":"1"}, + {"attr_name":"fan1_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type":"raw", "raw": "1"}, + {"attr_name":"fan2_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type":"raw", "raw": "1"}, + {"attr_name":"fan3_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type":"raw", "raw": "1"}, + {"attr_name":"fan4_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type":"raw", "raw": "1"}, + {"attr_name":"fan5_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type":"raw", "raw": "1"}, + {"attr_name":"fan6_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type":"raw", "raw": "1"}, + {"attr_name":"fan7_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type":"raw", "raw": "1"}, + {"attr_name":"fan8_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type":"raw", "raw": "1"}, + {"attr_name":"fan9_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x04", "type":"raw", "raw": "1"}, + {"attr_name":"fan10_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x04", "type":"raw", "raw": "1"}, + {"attr_name":"fan11_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x05", "type":"raw", "raw": "1"}, + {"attr_name":"fan12_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x05", "type":"raw", "raw": "1"}, + {"attr_name":"fan13_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x06", "type":"raw", "raw": "1"}, + {"attr_name":"fan14_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x06", "type":"raw", "raw": "1"}, + {"attr_name":"fan1_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 00", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan2_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 00", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan3_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 01", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan4_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 01", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan5_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 02", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan6_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 02", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan7_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 03", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan8_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 03", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan9_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 04", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan10_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 04", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan11_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 05", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan12_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 05", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan13_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 06", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan14_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 06", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan1_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x22", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan2_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x22", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan3_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x32", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan4_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x32", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan5_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x42", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan6_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x42", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan7_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x52", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan8_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x52", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan9_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x62", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan10_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x62", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan11_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x72", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan12_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x72", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan13_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x82", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan14_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x82", "raw":"1", "type":"mask", "mask":"0xff"} + ] + } + } + }, + + "TEMP1": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"PSU 1 Temp2"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2D", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x2D", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP2": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"PSU 1 Temp3"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x6A", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x6A", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP3": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"PSU 2 Temp2"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x36", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x36", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP4": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"PSU 2 Temp3"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x6B", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x6B", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP5": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"CPU Internal Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x5", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x5", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP6": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"ASIC Internal Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x6", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x6", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP7": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"Fanboard Right Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2", "type": "raw", "raw":"1", "offset":"0"} + ] + } + } + }, + "TEMP8": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"Switchboard Right Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x4", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x4", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP9": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"MP2975 3.3v Chip Right Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x68", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x68", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP10": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"MP2975 3.3v Chip Left Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x69", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x69", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP11": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"TPS536C7 Chip Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x66", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x66", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP12": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"MP2975 0.8v Chip Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x67", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x67", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP13": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"Fanboard Center Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x67", "type": "raw", "raw":"1", "offset":"0"} + ] + } + } + }, + "TEMP14": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"Switchboard Left Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3", "type": "raw", "raw":"1", "offset":"0"} + ] + } + } + }, + + "SYS_LED": + { + "dev_info": {"device_type":"LED", "device_name":"SYS_LED"}, + "dev_attr": {"index":"0", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "0"}, + {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "1"}, + {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "2"}, + {"attr_name":"amber_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "3"}, + {"attr_name":"green_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": 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raw 0x3a 0x39 0x01 0x04", "raw": "1", "type":"raw", "value": "0"}, + {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x04", "raw": "1", "type":"raw", "value": "1"}, + {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x04", "raw": "1", "type":"raw", "value": "2"} + ] + } + } + }, + "FANTRAY2_LED": + { + "dev_info": {"device_type":"LED", "device_name":"FANTRAY2_LED"}, + "dev_attr": {"index":"1", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x05", "raw": "1", "type":"raw", "value": "0"}, + {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x05", "raw": "1", "type":"raw", "value": "1"}, + {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x05", "raw": "1", "type":"raw", "value": "2"} + ] + } + } + }, + "FANTRAY3_LED": + { + "dev_info": {"device_type":"LED", "device_name":"FANTRAY3_LED"}, + "dev_attr": {"index":"2", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x06", "raw": "1", "type":"raw", "value": "0"}, + {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x06", "raw": "1", "type":"raw", "value": "1"}, + {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x06", "raw": "1", "type":"raw", "value": "2"} + ] + } + } + }, + "FANTRAY4_LED": + { + "dev_info": {"device_type":"LED", "device_name":"FANTRAY4_LED"}, + "dev_attr": {"index":"3", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x07", "raw": "1", "type":"raw", "value": "0"}, + {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x07", "raw": "1", "type":"raw", "value": "1"}, + {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x07", "raw": "1", "type":"raw", "value": "2"} + ] + } + } + }, + "FANTRAY5_LED": + { + "dev_info": {"device_type":"LED", "device_name":"FANTRAY5_LED"}, + "dev_attr": {"index":"4", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x08", "raw": "1", "type":"raw", "value": "0"}, + {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x08", "raw": "1", "type":"raw", "value": "1"}, + {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x08", "raw": "1", "type":"raw", "value": "2"} + ] + } + } + }, + "FANTRAY6_LED": + { + "dev_info": {"device_type":"LED", "device_name":"FANTRAY6_LED"}, + "dev_attr": {"index":"5", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x09", "raw": "1", "type":"raw", "value": "0"}, + {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x09", "raw": "1", "type":"raw", "value": "1"}, + {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x09", "raw": "1", "type":"raw", "value": "2"} + ] + } + } + }, + "FANTRAY7_LED": + { + "dev_info": {"device_type":"LED", "device_name":"FANTRAY7_LED"}, + "dev_attr": {"index":"6", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x0a", "raw": "1", "type":"raw", "value": "0"}, + {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x0a", "raw": "1", "type":"raw", "value": "1"}, + {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x0a", "raw": "1", "type":"raw", "value": "2"} + ] + } + } + } +} + diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-nonebmc b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-nonebmc new file mode 100644 index 000000000000..f58c32095338 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-nonebmc @@ -0,0 +1,2058 @@ +{ +"PLATFORM": +{ + "num_psus": 2, + "num_fantrays": 7, + "num_fans_pertray": 2, + "num_ports": 34, + "num_temps": 6, + "num_component": 8, + "bmc_present": "False", + "pddf_dev_types": + { + "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", + "CPLD": + [ + "i2c_cpld", + "cpld_eeprom" + ], + "PSU": + [ + "psu_pmbus" + ], + "FAN": + [ + "fan_ctrl", + "fan_eeprom", + "fan_cpld" + ], + "PORT_MODULE": + [ + "pddf_xcvr" + ], + "FPGAPCIE": + [ + "fpgapci" + ] + }, + "std_kos": + [ + "lpc_ich", + "i2c-dev", + "ipmi_devintf", + "i2c_mux_pca954x", + "optoe", + "at24", + "i2c-i801" + ], + "pddf_kos": + [ + "pddf_client_module", + "pddf_psu_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", + "pddf_fpgapci_driver", + "pddf_fpgapci_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_fan_module" + ], + "custom_kos": + [ + "pddf_custom_led_module", + "pddf_custom_wdt", + "pddf_custom_fpga_algo", + "pddf_custom_fan_driver_module", + "pddf_custom_psu_driver_module", + "tps536c7" + ] + }, + + "SYSTEM": + { + "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, + "i2c": + { + "CONTROLLERS": + [ + {"dev_name":"i2c-0", "dev":"SMBUS0"}, + {"dev_name":"pcie-0", "dev":"PCIE0"} + ] + } + }, + + "SMBUS0": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x0"}, + "DEVICES": + [ + {"dev": "EEPROM1"} + ] + } + }, + + "EEPROM1": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56", "dev_type": "24c64"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "PCIE0": + { + "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"}, + "i2c": + { + "DEVICES": + [ + {"dev": "FPGAPCIE0"} + ] + } + }, + + "FPGAPCIE0": + { + "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x0"}, + "dev_attr": {"vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0", + "data_size":"0x25000", "i2c_ch_base_offset":"0x00010000", "i2c_ch_size":"0x1000", "virt_i2c_ch":"0xf"}, + "channel": + [ + {"chn":"1", "dev":"CPLD_B"}, + {"chn":"3", "dev":"TEMP1"}, + {"chn":"4", "dev":"TEMP2"}, + {"chn":"4", "dev":"TEMP3"}, + {"chn":"4", "dev":"TEMP4"}, + {"chn":"5", "dev":"CPLD_COME"}, + {"chn":"6", "dev":"MUX1"}, + {"chn":"7", "dev":"TEMP5"}, + {"chn":"8", "dev":"MUX2"}, + {"chn":"8", "dev":"FAN_CPLD"}, + {"chn":"8", "dev":"FAN-CTRL"}, + {"chn":"9", "dev":"CPLD_S1"}, + {"chn":"9", "dev":"CPLD_S2"}, + {"chn":"10", "dev":"MUX3"}, + {"chn":"10", "dev":"MUX4"}, + {"chn":"10", "dev":"MUX5"}, + {"chn":"10", "dev":"MUX6"}, + {"chn":"11", "dev":"PORT33"}, + {"chn":"12", "dev":"PORT34"} + ] + } + }, + + "CPLD_B": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD_B", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x0d", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_COME": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD_COME", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x68", "dev_addr":"0x0d", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "FAN_CPLD": + { + "dev_info": { "device_type":"CPLD", "device_name":"FAN_CPLD", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6B", "dev_addr":"0x0d", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_S1": + { + "dev_info": {"device_type":"CPLD", "device_name":"CPLD_S1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6C", "dev_addr":"0x30", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_S2": + { + "dev_info": {"device_type":"CPLD", "device_name":"CPLD_S2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6C", "dev_addr":"0x31", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "MUX1": + { + "dev_info": {"device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x69", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x01", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PSU1"}, + {"chn":"1", "dev":"PSU2"} + ] + } + }, + "MUX2": + { + "dev_info": {"device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6B", "dev_addr":"0x77", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x09", "idle_state": "-2"}, + "channel": + [ + {"chn":"7", "dev":"TEMP6"} + ] + } + }, + "MUX3": + { + "dev_info": {"device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x11", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PORT16"}, + {"chn":"1", "dev":"PORT13"}, + {"chn":"2", "dev":"PORT12"}, + {"chn":"3", "dev":"PORT10"}, + {"chn":"4", "dev":"PORT9"}, + {"chn":"5", "dev":"PORT14"}, + {"chn":"6", "dev":"PORT11"}, + {"chn":"7", "dev":"PORT7"} + ] + } + }, + "MUX4": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x19", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PORT20"}, + {"chn":"1", "dev":"PORT17"}, + {"chn":"2", "dev":"PORT22"}, + {"chn":"3", "dev":"PORT25"}, + {"chn":"4", "dev":"PORT19"}, + {"chn":"5", "dev":"PORT21"}, + {"chn":"6", "dev":"PORT24"}, + {"chn":"7", "dev":"PORT18"} + ] + } + }, + "MUX5": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX5", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x71", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x21", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PORT3"}, + {"chn":"1", "dev":"PORT4"}, + {"chn":"2", "dev":"PORT1"}, + {"chn":"3", "dev":"PORT2"}, + {"chn":"4", "dev":"PORT8"}, + {"chn":"5", "dev":"PORT6"}, + {"chn":"6", "dev":"PORT5"}, + {"chn":"7", "dev":"PORT15"} + ] + } + }, + "MUX6": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX6", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x29", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PORT27"}, + {"chn":"1", "dev":"PORT32"}, + {"chn":"2", "dev":"PORT29"}, + {"chn":"3", "dev":"PORT31"}, + {"chn":"4", "dev":"PORT30"}, + {"chn":"5", "dev":"PORT23"}, + {"chn":"6", "dev":"PORT26"}, + {"chn":"7", "dev":"PORT28"} + ] + } + }, + + "PORT1": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT1", "device_parent":"MUX5"}, + "dev_attr": {"dev_idx":"1"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT1-EEPROM" }, + {"itf":"control", "dev":"PORT1-CTRL" } + ] + } + }, + "PORT1-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": {"parent_bus":"0x23", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT1-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX5", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": {"parent_bus":"0x23", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT2": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT2", "device_parent":"MUX5"}, + "dev_attr": {"dev_idx":"2"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT2-EEPROM" }, + {"itf":"control", "dev":"PORT2-CTRL" } + ] + } + }, + "PORT2-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": {"parent_bus":"0x24", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT2-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX5", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": {"parent_bus":"0x24", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT3": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT3", "device_parent":"MUX5"}, + "dev_attr": {"dev_idx":"3"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT3-EEPROM" }, + {"itf":"control", "dev":"PORT3-CTRL" } + ] + } + }, + "PORT3-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": {"parent_bus":"0x21", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT3-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX5", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": {"parent_bus":"0x21", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT4": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT4", "device_parent":"MUX5"}, + "dev_attr": {"dev_idx":"4"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT4-EEPROM" }, + {"itf":"control", "dev":"PORT4-CTRL" } + ] + } + }, + "PORT4-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": {"parent_bus":"0x22", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT4-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX5", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": {"parent_bus":"0x22", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT5": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT5", "device_parent":"MUX5"}, + "dev_attr": {"dev_idx":"5"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT5-EEPROM" }, + {"itf":"control", "dev":"PORT5-CTRL" } + ] + } + }, + "PORT5-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": {"parent_bus":"0x27", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT5-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX5", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": {"parent_bus":"0x27", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT6": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT6", "device_parent":"MUX5"}, + "dev_attr": {"dev_idx":"6"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT6-EEPROM" }, + {"itf":"control", "dev":"PORT6-CTRL" } + ] + } + }, + "PORT6-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": {"parent_bus":"0x26", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT6-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX5", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": {"parent_bus":"0x26", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT7": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT7", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"7"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT7-EEPROM" }, + {"itf":"control", "dev":"PORT7-CTRL" } + ] + } + }, + "PORT7-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": {"parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT7-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX3", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": {"parent_bus":"0x18", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT8": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT8", "device_parent":"MUX5"}, + "dev_attr": {"dev_idx":"8"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT8-EEPROM" }, + {"itf":"control", "dev":"PORT8-CTRL" } + ] + } + }, + "PORT8-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": {"parent_bus":"0x25", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT8-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX5", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": {"parent_bus":"0x25", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT9": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT9", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"9"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT9-EEPROM" }, + {"itf":"control", "dev":"PORT9-CTRL" } + ] + } + }, + "PORT9-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": {"parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT9-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX3", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": {"parent_bus":"0x15", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT10": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT10", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"10"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT10-EEPROM" }, + {"itf":"control", "dev":"PORT10-CTRL" } + ] + } + }, + "PORT10-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": {"parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT10-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX3", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": {"parent_bus":"0x14", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT11": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT11", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"11"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT11-EEPROM" }, + {"itf":"control", "dev":"PORT11-CTRL" } + ] + } + }, + "PORT11-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": {"parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT11-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX3", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": {"parent_bus":"0x17", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT12": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT12", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"12"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT12-EEPROM" }, + {"itf":"control", "dev":"PORT12-CTRL" } + ] + } + }, + "PORT12-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": {"parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT12-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX3", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": {"parent_bus":"0x13", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT13": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT13", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"13"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT13-EEPROM" }, + {"itf":"control", "dev":"PORT13-CTRL" } + ] + } + }, + "PORT13-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": {"parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT13-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX3", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": {"parent_bus":"0x12", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT14": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT14", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"14"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT14-EEPROM" }, + {"itf":"control", "dev":"PORT14-CTRL" } + ] + } + }, + "PORT14-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": {"parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT14-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX3", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": {"parent_bus":"0x16", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT15": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT15", "device_parent":"MUX5"}, + "dev_attr": {"dev_idx":"15"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT15-EEPROM" }, + {"itf":"control", "dev":"PORT15-CTRL" } + ] + } + }, + "PORT15-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": {"parent_bus":"0x28", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT15-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX5", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": {"parent_bus":"0x28", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT16": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT16", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"16"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT16-EEPROM" }, + {"itf":"control", "dev":"PORT16-CTRL" } + ] + } + }, + "PORT16-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": {"parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT16-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX3", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": {"parent_bus":"0x11", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT17": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT17", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"17"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT17-EEPROM" }, + {"itf":"control", "dev":"PORT17-CTRL" } + ] + } + }, + "PORT17-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT17-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX4", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1a", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT18": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT18", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"18"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT18-EEPROM" }, + {"itf":"control", "dev":"PORT18-CTRL" } + ] + } + }, + "PORT18-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": {"parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT18-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX4", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": {"parent_bus":"0x20", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT19": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT19", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"19"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT19-EEPROM" }, + {"itf":"control", "dev":"PORT19-CTRL" } + ] + } + }, + "PORT19-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT19-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX4", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1d", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT20": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT20", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"20"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT20-EEPROM" }, + {"itf":"control", "dev":"PORT20-CTRL" } + ] + } + }, + "PORT20-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": {"parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT20-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX4", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": {"parent_bus":"0x19", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT21": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT21", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"21"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT21-EEPROM" }, + {"itf":"control", "dev":"PORT21-CTRL" } + ] + } + }, + "PORT21-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT21-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX4", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1e", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT22": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT22", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"22"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT22-EEPROM" }, + {"itf":"control", "dev":"PORT22-CTRL" } + ] + } + }, + "PORT22-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT22-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX4", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1b", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT23": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT23", "device_parent":"MUX6"}, + "dev_attr": {"dev_idx":"23"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT23-EEPROM" }, + {"itf":"control", "dev":"PORT23-CTRL" } + ] + } + }, + "PORT23-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2e", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT23-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX6", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2e", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT24": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT24", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"24"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT24-EEPROM" }, + {"itf":"control", "dev":"PORT24-CTRL" } + ] + } + }, + "PORT24-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT24-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX4", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1f", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT25": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT25", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"25"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT25-EEPROM" }, + {"itf":"control", "dev":"PORT25-CTRL" } + ] + } + }, + "PORT25-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT25-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1c", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT26": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT26", "device_parent":"MUX6"}, + "dev_attr": {"dev_idx":"26"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT26-EEPROM" }, + {"itf":"control", "dev":"PORT26-CTRL" } + ] + } + }, + "PORT26-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2f", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT26-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX6", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2f", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT27": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT27", "device_parent":"MUX6"}, + "dev_attr": {"dev_idx":"27"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT27-EEPROM" }, + {"itf":"control", "dev":"PORT27-CTRL" } + ] + } + }, + "PORT27-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": {"parent_bus":"0x29", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT27-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX6", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": {"parent_bus":"0x29", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT28": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT28", "device_parent":"MUX6"}, + "dev_attr": {"dev_idx":"28"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT28-EEPROM" }, + {"itf":"control", "dev":"PORT28-CTRL" } + ] + } + }, + "PORT28-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": {"parent_bus":"0x30", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT28-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX6", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": {"parent_bus":"0x30", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT29": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT29", "device_parent":"MUX6"}, + "dev_attr": {"dev_idx":"29"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT29-EEPROM" }, + {"itf":"control", "dev":"PORT29-CTRL" } + ] + } + }, + "PORT29-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2b", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT29-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX6", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2b", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT30": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT30", "device_parent":"MUX6"}, + "dev_attr": {"dev_idx":"30"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT30-EEPROM" }, + {"itf":"control", "dev":"PORT30-CTRL" } + ] + } + }, + "PORT30-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2d", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + + "PORT30-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX6", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2d", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT31": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT31", "device_parent":"MUX6"}, + "dev_attr": {"dev_idx":"31"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT31-EEPROM" }, + {"itf":"control", "dev":"PORT31-CTRL" } + ] + } + }, + "PORT31-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2c", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT31-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX6", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2c", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT32": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT32", "device_parent":"MUX6"}, + "dev_attr": {"dev_idx":"32"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT32-EEPROM" }, + {"itf":"control", "dev":"PORT32-CTRL" } + ] + } + }, + "PORT32-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2a", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT32-CTRL": + { + "dev_info": {"device_type":"pci", "device_name":"PORT32-CTRL", "device_parent":"MUX6", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2a", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT33": + { + "dev_info": {"device_type":"SFP+", "device_name":"PORT33", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"dev_idx":"33"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT33-EEPROM"}, + {"itf":"control", "dev":"PORT33-CTRL"} + ] + } + }, + "PORT33-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"FPGAPCIE0", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6E", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT33-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT33-CTRL", "device_parent":"FPGAPCIE0", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6E", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}, + {"attr_name":"xcvr_txfault", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_txdisable", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_rxlos", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x00", "attr_cmpval":"0x00", "attr_len":"1"} + ] + } + }, + "PORT34": + { + "dev_info": {"device_type":"SFP+", "device_name":"PORT34", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"dev_idx":"34"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT34-EEPROM" }, + {"itf":"control", "dev":"PORT34-CTRL" } + ] + } + }, + "PORT34-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT34-EEPROM", "device_parent":"FPGAPCIE0", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6F", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT34-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT34-CTRL", "device_parent":"FPGAPCIE0", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6F", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}, + {"attr_name":"xcvr_txfault", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_txdisable", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_rxlos", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x00", "attr_cmpval":"0x00", "attr_len":"1"} + ] + } + }, + + "PSU1": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU1", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, + "i2c": + { + "interface": + [ + {"itf":"pmbus", "dev":"PSU1-PMBUS"} + + ] + } + }, + + "PSU1-PMBUS": + { + "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU1"}, + "i2c": + { + "topo_info":{ "parent_bus":"0x1", "dev_addr":"0x58", "dev_type":"psu_pmbus"}, + "attr_list": + [ + {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x08", "attr_cmpval":"0x00", "attr_len":"1"}, + {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x02", "attr_cmpval":"0x02", "attr_len":"1"}, + {"attr_name":"psu_model_name", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_serial_num", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"13"}, + {"attr_name":"psu_mfr_id", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"7"}, + {"attr_name":"psu_fan_dir", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_max", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_min", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_out_max", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} + ] + } + }, + + "PSU2": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU2", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"2", "num_psu_fans": "1"}, + "i2c": + { + "interface": + [ + {"itf":"pmbus", "dev":"PSU2-PMBUS"} + + ] + } + }, + + "PSU2-PMBUS": + { + "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU2"}, + "i2c": + { + "topo_info":{ "parent_bus":"0x2", "dev_addr":"0x59", "dev_type":"psu_pmbus"}, + "attr_list": + [ + {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x04", "attr_cmpval":"0x00", "attr_len":"1"}, + {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x01", "attr_cmpval":"0x01", "attr_len":"1"}, + {"attr_name":"psu_model_name", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_serial_num", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13"}, + {"attr_name":"psu_mfr_id", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7"}, + {"attr_name":"psu_fan_dir", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_p_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_input", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_max", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_min", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_out_max", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} + ] + } + }, + + "FAN-CTRL": + { + "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6B", "dev_addr":"0x66", "dev_type":"fan_cpld"}, + "dev_attr": { "num_fantrays":"7"}, + "attr_list": + [ + {"attr_name":"fan1_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x20", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan2_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x21", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan3_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x30", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan4_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x31", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan5_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x40", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan6_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x41", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan7_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x50", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan8_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x51", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan9_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x60", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan10_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x61", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan11_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x70", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan12_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x71", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan13_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x80", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan14_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x81", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan1_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x22", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan2_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x22", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan3_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x32", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan4_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x32", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan5_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x42", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan6_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x42", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan7_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x52", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan8_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x52", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan9_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x62", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan10_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x62", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan11_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x72", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan12_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x72", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan13_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x82", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan14_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x82", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan1_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x26", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan2_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x26", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan3_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x36", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan4_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x36", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan5_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x46", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan6_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x46", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan7_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x56", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan8_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x56", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan9_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x66", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan10_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x66", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan11_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x76", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan12_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x76", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan13_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x86", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan14_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x86", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan1_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x26", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan2_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x26", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan3_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x36", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan4_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x36", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan5_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x46", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan6_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x46", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan7_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x56", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan8_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x56", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan9_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x66", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan10_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x66", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan11_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x76", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan12_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x76", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan13_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x86", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan14_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x86", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"} + ] + } + }, + + "TEMP1": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP1", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"VDD_CORE_Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x6c", "dev_type":"tps536c7"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP2": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP2", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"XP3R3V_L_Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x67", "dev_addr":"0x76", "dev_type":"mp2975"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP3": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP3", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"XP3R3V_R_Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x67", "dev_addr":"0x7b", "dev_type":"mp2975"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP4": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP4", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"XP0R8V_Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x67", "dev_addr":"0x70", "dev_type":"mp2975"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP5": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP5", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"TEMP_SW_U16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6A", "dev_addr":"0x49", "dev_type":"lm75"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP6": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP6", "device_parent":"MUX2"}, + "dev_attr": { "display_name":"TEMP_FB_U17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x49", "dev_type":"lm75"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + + + "SYS_LED": + { + "dev_info": {"device_type":"LED", "device_name":"SYS_LED"}, + "dev_attr": {"index":"0"}, + "i2c": { + "attr_list": + [ + {"attr_name":"green", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"green", "value":"0x10", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"}, + {"attr_name":"amber", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"amber", "value":"0x20", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"}, + {"attr_name":"green_blink", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"green_blink", "value":"0x02", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"}, + {"attr_name":"off", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"off", "value":"0x33", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"} + ] + } + }, + "FANTRAY1_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"0"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x24"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x24"} + ] + } + }, + "FANTRAY2_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"1"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x34"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x34"} + ] + } + }, + "FANTRAY3_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"2"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x44"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x44"} + ] + } + }, + "FANTRAY4_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"3"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x54"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x54"} + ] + } + }, + "FANTRAY5_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"4"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x64"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x64"} + ] + } + }, + "FANTRAY6_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"5"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x74"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x74"} + ] + } + }, + "FANTRAY7_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"6"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x84"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x84"} + ] + } + } +} + diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pddf_support b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf_support new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform.json b/device/celestica/x86_64-cel_silverstone_v2-r0/platform.json new file mode 100644 index 000000000000..da5f089819ab --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/platform.json @@ -0,0 +1,914 @@ +{ + "chassis": { + "name": "Silverstone_v2", + "status_led": { + "controllable": true, + "colors": [ + "green", + "amber", + "off" + ] + }, + "components": [ + { + "name": "BIOS" + }, + { + "name": "ONIE" + }, + { + "name": "BMC" + }, + { + "name": "FPGA" + }, + { + "name": "CPLD COMe" + }, + { + "name": "CPLD BASE" + }, + { + "name": "CPLD SW1" + }, + { + "name": "CPLD SW2" + }, + { + "name": "CPLD FAN" + }, + { + "name": "ASIC PCIe" + }, + { + "name": "SSD" + } + ], + "fans": [ + { + "name": "Fantray1_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray1_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray2_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray2_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray3_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray3_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray4_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray4_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray5_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray5_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray6_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray6_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray7_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray7_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ], + "fan_drawers": [ + { + "name": "Fantray1", + "status_led": { + "controllable": true, + "colors": [ + "green", + "amber", + "off" + ] + }, + "fans": [ + { + "name": "Fantray1_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray1_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + }, + { + "name": "Fantray2", + "status_led": { + "controllable": true, + "colors": [ + "green", + "amber", + "off" + ] + }, + "fans": [ + { + "name": "Fantray2_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray2_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + }, + { + "name": "Fantray3", + "status_led": { + "controllable": true, + "colors": [ + "green", + "amber", + "off" + ] + }, + "fans": [ + { + "name": "Fantray3_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray3_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + }, + { + "name": "Fantray4", + "status_led": { + "controllable": true, + "colors": [ + "green", + "amber", + "off" + ] + }, + "fans": [ + { + "name": "Fantray4_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray4_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + }, + { + "name": "Fantray5", + "status_led": { + "controllable": true, + "colors": [ + "green", + "amber", + "off" + ] + }, + "fans": [ + { + "name": "Fantray5_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray5_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + }, + { + "name": "Fantray6", + "status_led": { + "controllable": true, + "colors": [ + "green", + "amber", + "off" + ] + }, + "fans": [ + { + "name": "Fantray6_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray6_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + }, + { + "name": "Fantray7", + "status_led": { + "controllable": true, + "colors": [ + "green", + "amber", + "off" + ] + }, + "fans": [ + { + "name": "Fantray7_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray7_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + } + ], + "psus": [ + { + "name": "PSU 1", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU1_FAN1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "PSU 2", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU2_FAN1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "33,34,35,36,37,38,39,40", + "breakout_modes": { + "1x400G": ["Eth1/1"], + "2x100G": ["Eth1/1", "Eth1/5"], + "2x40G": ["Eth1/1", "Eth1/5"], + "4x100G": ["Eth1/1", "Eth1/3", "Eth1/5", "Eth1/7"], + "1x100G(2)": ["Eth1/1"], + "1x100G(4)": ["Eth1/1"], + "1x40G(4)": ["Eth1/1"], + "4x25G(4)": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"], + "4x10G(4)": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"] + } + }, + "Ethernet8": { + "index": "2,2,2,2,2,2,2,2", + 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"4x10G(4)": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4"] + } + }, + "Ethernet80": { + "index": "11,11,11,11,11,11,11,11", + "lanes": "17,18,19,20,21,22,23,24", + "breakout_modes": { + "1x400G": ["Eth11/1"], + "2x100G": ["Eth11/1", "Eth11/5"], + "2x40G": ["Eth11/1", "Eth11/5"], + "4x100G": ["Eth11/1", "Eth11/3", "Eth11/5", "Eth11/7"], + "1x100G(2)": ["Eth11/1"], + "1x100G(4)": ["Eth11/1"], + "1x40G(4)": ["Eth11/1"], + "4x25G(4)": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4"], + "4x10G(4)": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4"] + } + }, + "Ethernet88": { + "index": "12,12,12,12,12,12,12,12", + "lanes": "25,26,27,28,29,30,31,32", + "breakout_modes": { + "1x400G": ["Eth12/1"], + "2x100G": ["Eth12/1", "Eth12/5"], + "2x40G": ["Eth12/1", "Eth12/5"], + "4x100G": ["Eth12/1", "Eth12/3", "Eth12/5", "Eth12/7"], + "1x100G(2)": ["Eth12/1"], + "1x100G(4)": ["Eth12/1"], + "1x40G(4)": ["Eth12/1"], + "4x25G(4)": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4"], + "4x10G(4)": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4"] + } + }, + "Ethernet96": { + "index": "13,13,13,13,13,13,13,13", + "lanes": "97,98,99,100,101,102,103,104", + "breakout_modes": { + "1x400G": ["Eth13/1"], + "2x100G": ["Eth13/1", "Eth13/5"], + "2x40G": ["Eth13/1", "Eth13/5"], + "4x100G": ["Eth13/1", "Eth13/3", "Eth13/5", "Eth13/7"], + "1x100G(2)": ["Eth13/1"], + "1x100G(4)": ["Eth13/1"], + "1x40G(4)": ["Eth13/1"], + "4x25G(4)": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4"], + "4x10G(4)": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4"] + } + }, + "Ethernet104": { + "index": "14,14,14,14,14,14,14,14", + "lanes": "105,106,107,108,109,110,111,112", + "breakout_modes": { + "1x400G": ["Eth14/1"], + "2x100G": ["Eth14/1", "Eth14/5"], + "2x40G": ["Eth14/1", "Eth14/5"], + "4x100G": ["Eth14/1", "Eth14/3", "Eth14/5", "Eth14/7"], + "1x100G(2)": ["Eth14/1"], + "1x100G(4)": ["Eth14/1"], + "1x40G(4)": ["Eth14/1"], + "4x25G(4)": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4"], + "4x10G(4)": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4"] + } + }, + "Ethernet112": { + "index": "15,15,15,15,15,15,15,15", + "lanes": "113,114,115,116,117,118,119,120", + "breakout_modes": { + "1x400G": ["Eth15/1"], + "2x100G": ["Eth15/1", "Eth15/5"], + "2x40G": ["Eth15/1", "Eth15/5"], + "4x100G": ["Eth15/1", "Eth15/3", "Eth15/5", "Eth15/7"], + "1x100G(2)": ["Eth15/1"], + "1x100G(4)": ["Eth15/1"], + "1x40G(4)": ["Eth15/1"], + "4x25G(4)": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4"], + "4x10G(4)": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4"] + } + }, + "Ethernet120": { + "index": "16,16,16,16,16,16,16,16", + "lanes": "121,122,123,124,125,126,127,128", + "breakout_modes": { + "1x400G": ["Eth16/1"], + "2x100G": ["Eth16/1", "Eth16/5"], + "2x40G": ["Eth16/1", "Eth16/5"], + "4x100G": ["Eth16/1", "Eth16/3", "Eth16/5", "Eth16/7"], + "1x100G(2)": ["Eth16/1"], + "1x100G(4)": ["Eth16/1"], + "1x40G(4)": ["Eth16/1"], + "4x25G(4)": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4"], + "4x10G(4)": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4"] + } + }, + "Ethernet128": { + "index": "17,17,17,17,17,17,17,17", + "lanes": "129,130,131,132,133,134,135,136", + "breakout_modes": { + "1x400G": ["Eth17/1"], + "2x100G": ["Eth17/1", "Eth17/5"], + "2x40G": ["Eth17/1", "Eth17/5"], + "4x100G": ["Eth17/1", "Eth17/3", "Eth17/5", "Eth17/7"], + "1x100G(2)": ["Eth17/1"], + "1x100G(4)": ["Eth17/1"], + "1x40G(4)": ["Eth17/1"], + "4x25G(4)": ["Eth17/1", "Eth17/2", "Eth17/3", "Eth17/4"], + "4x10G(4)": ["Eth17/1", "Eth17/2", "Eth17/3", "Eth17/4"] + } + }, + "Ethernet136": { + "index": "18,18,18,18,18,18,18,18", + "lanes": "137,138,139,140,141,142,143,144", + "breakout_modes": { + "1x400G": ["Eth18/1"], + "2x100G": ["Eth18/1", "Eth18/5"], + "2x40G": ["Eth18/1", "Eth18/5"], + "4x100G": ["Eth18/1", "Eth18/3", "Eth18/5", "Eth18/7"], + "1x100G(2)": ["Eth18/1"], + "1x100G(4)": ["Eth18/1"], + "1x40G(4)": ["Eth18/1"], + "4x25G(4)": ["Eth18/1", "Eth18/2", "Eth18/3", "Eth18/4"], + "4x10G(4)": ["Eth18/1", "Eth18/2", "Eth18/3", "Eth18/4"] + } + }, + "Ethernet144": { + "index": "19,19,19,19,19,19,19,19", + "lanes": "145,146,147,148,149,150,151,152", + "breakout_modes": { + "1x400G": ["Eth19/1"], + "2x100G": ["Eth19/1", "Eth19/5"], + "2x40G": ["Eth19/1", "Eth19/5"], + "4x100G": ["Eth19/1", "Eth19/3", "Eth19/5", "Eth19/7"], + "1x100G(2)": ["Eth19/1"], + "1x100G(4)": ["Eth19/1"], + "1x40G(4)": ["Eth19/1"], + "4x25G(4)": ["Eth19/1", "Eth19/2", "Eth19/3", "Eth19/4"], + "4x10G(4)": ["Eth19/1", "Eth19/2", "Eth19/3", "Eth19/4"] + } + }, + "Ethernet152": { + "index": "20,20,20,20,20,20,20,20", + "lanes": "153,154,155,156,157,158,159,160", + "breakout_modes": { + "1x400G": ["Eth20/1"], + "2x100G": ["Eth20/1", "Eth20/5"], + "2x40G": ["Eth20/1", "Eth20/5"], + "4x100G": ["Eth20/1", "Eth20/3", "Eth20/5", "Eth20/7"], + "1x100G(2)": ["Eth20/1"], + "1x100G(4)": ["Eth20/1"], + "1x40G(4)": ["Eth20/1"], + "4x25G(4)": ["Eth20/1", "Eth20/2", "Eth20/3", "Eth20/4"], + "4x10G(4)": ["Eth20/1", "Eth20/2", "Eth20/3", "Eth20/4"] + } + }, + "Ethernet160": { + "index": "21,21,21,21,21,21,21,21", + "lanes": "225,226,227,228,229,230,231,232", + "breakout_modes": { + "1x400G": ["Eth21/1"], + "2x100G": ["Eth21/1", "Eth21/5"], + "2x40G": ["Eth21/1", "Eth21/5"], + "4x100G": ["Eth21/1", "Eth21/3", "Eth21/5", "Eth21/7"], + "1x100G(2)": ["Eth21/1"], + "1x100G(4)": ["Eth21/1"], + "1x40G(4)": ["Eth21/1"], + "4x25G(4)": ["Eth21/1", "Eth21/2", "Eth21/3", "Eth21/4"], + "4x10G(4)": ["Eth21/1", "Eth21/2", "Eth21/3", "Eth21/4"] + } + }, + "Ethernet168": { + "index": "22,22,22,22,22,22,22,22", + "lanes": "233,234,235,236,237,238,239,240", + "breakout_modes": { + "1x400G": ["Eth22/1"], + "2x100G": ["Eth22/1", "Eth22/5"], + "2x40G": ["Eth22/1", "Eth22/5"], + "4x100G": ["Eth22/1", "Eth22/3", "Eth22/5", "Eth22/7"], + "1x100G(2)": ["Eth22/1"], + "1x100G(4)": ["Eth22/1"], + "1x40G(4)": ["Eth22/1"], + "4x25G(4)": ["Eth22/1", "Eth22/2", "Eth22/3", "Eth22/4"], + "4x10G(4)": ["Eth22/1", "Eth22/2", "Eth22/3", "Eth22/4"] + } + }, + "Ethernet176": { + "index": "23,23,23,23,23,23,23,23", + "lanes": "241,242,243,244,245,246,247,248", + "breakout_modes": { + "1x400G": ["Eth23/1"], + "2x100G": ["Eth23/1", "Eth23/5"], + "2x40G": ["Eth23/1", "Eth23/5"], + "4x100G": ["Eth23/1", "Eth23/3", "Eth23/5", "Eth23/7"], + "1x100G(2)": ["Eth23/1"], + "1x100G(4)": ["Eth23/1"], + "1x40G(4)": ["Eth23/1"], + "4x25G(4)": ["Eth23/1", "Eth23/2", "Eth23/3", "Eth23/4"], + "4x10G(4)": ["Eth23/1", "Eth23/2", "Eth23/3", "Eth23/4"] + } + }, + "Ethernet184": { + "index": "24,24,24,24,24,24,24,24", + "lanes": "249,250,251,252,253,254,255,256", + "breakout_modes": { + "1x400G": ["Eth24/1"], + "2x100G": ["Eth24/1", "Eth24/5"], + "2x40G": ["Eth24/1", "Eth24/5"], + "4x100G": ["Eth24/1", "Eth24/3", "Eth24/5", "Eth24/7"], + "1x100G(2)": ["Eth24/1"], + "1x100G(4)": ["Eth24/1"], + "1x40G(4)": ["Eth24/1"], + "4x25G(4)": ["Eth24/1", "Eth24/2", "Eth24/3", "Eth24/4"], + "4x10G(4)": ["Eth24/1", "Eth24/2", "Eth24/3", "Eth24/4"] + } + }, + "Ethernet192": { + "index": "25,25,25,25,25,25,25,25", + "lanes": "161,162,163,164,165,166,167,168", + "breakout_modes": { + "1x400G": ["Eth25/1"], + "2x100G": ["Eth25/1", "Eth25/5"], + "2x40G": ["Eth25/1", "Eth25/5"], + "4x100G": ["Eth25/1", "Eth25/3", "Eth25/5", "Eth25/7"], + "1x100G(2)": ["Eth25/1"], + "1x100G(4)": ["Eth25/1"], + "1x40G(4)": ["Eth25/1"], + "4x25G(4)": ["Eth25/1", "Eth25/2", "Eth25/3", "Eth25/4"], + "4x10G(4)": ["Eth25/1", "Eth25/2", "Eth25/3", "Eth25/4"] + } + }, + "Ethernet200": { + "index": "26,26,26,26,26,26,26,26", + "lanes": "169,170,171,172,173,174,175,176", + "breakout_modes": { + "1x400G": ["Eth26/1"], + "2x100G": ["Eth26/1", "Eth26/5"], + "2x40G": ["Eth26/1", "Eth26/5"], + "4x100G": ["Eth26/1", "Eth26/3", "Eth26/5", "Eth26/7"], + "1x100G(2)": ["Eth26/1"], + "1x100G(4)": ["Eth26/1"], + "1x40G(4)": ["Eth26/1"], + "4x25G(4)": ["Eth26/1", "Eth26/2", "Eth26/3", "Eth26/4"], + "4x10G(4)": ["Eth26/1", "Eth26/2", "Eth26/3", "Eth26/4"] + } + }, + "Ethernet208": { + "index": "27,27,27,27,27,27,27,27", + "lanes": "177,178,179,180,181,182,183,184", + "breakout_modes": { + "1x400G": ["Eth27/1"], + "2x100G": ["Eth27/1", "Eth27/5"], + "2x40G": ["Eth27/1", "Eth27/5"], + "4x100G": ["Eth27/1", "Eth27/3", "Eth27/5", "Eth27/7"], + "1x100G(2)": ["Eth27/1"], + "1x100G(4)": ["Eth27/1"], + "1x40G(4)": ["Eth27/1"], + "4x25G(4)": ["Eth27/1", "Eth27/2", "Eth27/3", "Eth27/4"], + "4x10G(4)": ["Eth27/1", "Eth27/2", "Eth27/3", "Eth27/4"] + } + }, + "Ethernet216": { + "index": "28,28,28,28,28,28,28,28", + "lanes": "185,186,187,188,189,190,191,192", + "breakout_modes": { + "1x400G": ["Eth28/1"], + "2x100G": ["Eth28/1", "Eth28/5"], + "2x40G": ["Eth28/1", "Eth28/5"], + "4x100G": ["Eth28/1", "Eth28/3", "Eth28/5", "Eth28/7"], + "1x100G(2)": ["Eth28/1"], + "1x100G(4)": ["Eth28/1"], + "1x40G(4)": ["Eth28/1"], + "4x25G(4)": ["Eth28/1", "Eth28/2", "Eth28/3", "Eth28/4"], + "4x10G(4)": ["Eth28/1", "Eth28/2", "Eth28/3", "Eth28/4"] + } + }, + "Ethernet224": { + "index": "29,29,29,29,29,29,29,29", + "lanes": "193,194,195,196,197,198,199,200", + "breakout_modes": { + "1x400G": ["Eth29/1"], + "2x100G": ["Eth29/1", "Eth29/5"], + "2x40G": ["Eth29/1", "Eth29/5"], + "4x100G": ["Eth29/1", "Eth29/3", "Eth29/5", "Eth29/7"], + "1x100G(2)": ["Eth29/1"], + "1x100G(4)": ["Eth29/1"], + "1x40G(4)": ["Eth29/1"], + "4x25G(4)": ["Eth29/1", "Eth29/2", "Eth29/3", "Eth29/4"], + "4x10G(4)": ["Eth29/1", "Eth29/2", "Eth29/3", "Eth29/4"] + } + }, + "Ethernet232": { + "index": "30,30,30,30,30,30,30,30", + "lanes": "201,202,203,204,205,206,207,208", + "breakout_modes": { + "1x400G": ["Eth30/1"], + "2x100G": ["Eth30/1", "Eth30/5"], + "2x40G": ["Eth30/1", "Eth30/5"], + "4x100G": ["Eth30/1", "Eth30/3", "Eth30/5", "Eth30/7"], + "1x100G(2)": ["Eth30/1"], + "1x100G(4)": ["Eth30/1"], + "1x40G(4)": ["Eth30/1"], + "4x25G(4)": ["Eth30/1", "Eth30/2", "Eth30/3", "Eth30/4"], + "4x10G(4)": ["Eth30/1", "Eth30/2", "Eth30/3", "Eth30/4"] + } + }, + "Ethernet240": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "209,210,211,212,213,214,215,216", + "breakout_modes": { + "1x400G": ["Eth31/1"], + "2x100G": ["Eth31/1", "Eth31/5"], + "2x40G": ["Eth31/1", "Eth31/5"], + "4x100G": ["Eth31/1", "Eth31/3", "Eth31/5", "Eth31/7"], + "1x100G(2)": ["Eth31/1"], + "1x100G(4)": ["Eth31/1"], + "1x40G(4)": ["Eth31/1"], + "4x25G(4)": ["Eth31/1", "Eth31/2", "Eth31/3", "Eth31/4"], + "4x10G(4)": ["Eth31/1", "Eth31/2", "Eth31/3", "Eth31/4"] + } + }, + "Ethernet248": { + "index": "32,32,32,32,32,32,32,32", + "lanes": "217,218,219,220,221,222,223,224", + "breakout_modes": { + "1x400G": ["Eth32/1"], + "2x100G": ["Eth32/1", "Eth32/5"], + "2x40G": ["Eth32/1", "Eth32/5"], + "4x100G": ["Eth32/1", "Eth32/3", "Eth32/5", "Eth32/7"], + "1x100G(2)": ["Eth32/1"], + "1x100G(4)": ["Eth32/1"], + "1x40G(4)": ["Eth32/1"], + "4x25G(4)": ["Eth32/1", "Eth32/2", "Eth32/3", "Eth32/4"], + "4x10G(4)": ["Eth32/1", "Eth32/2", "Eth32/3", "Eth32/4"] + } + } + } + +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform_asic b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_asic new file mode 100644 index 000000000000..960467652765 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-bmc b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-bmc new file mode 100644 index 000000000000..8a187b11ffe0 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-bmc @@ -0,0 +1,19 @@ +{ + "chassis": { + "DS4000-R 02": { + "component": { + "BIOS": {}, + "ONIE": {}, + "BMC": {}, + "FPGA": {}, + "CPLD COMe": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {}, + "CPLD FAN": {}, + "ASIC PCIe": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-nonebmc b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-nonebmc new file mode 100644 index 000000000000..528b0c4dcbfb --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-nonebmc @@ -0,0 +1,18 @@ +{ + "chassis": { + "DS4000": { + "component": { + "BIOS": {}, + "ONIE": {}, + "BMC": {}, + "FPGA": {}, + "CPLD COMe": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {}, + "CPLD FAN": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform_env.conf b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_env.conf new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform_reboot b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_reboot new file mode 100755 index 000000000000..a3eef1d10ee2 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_reboot @@ -0,0 +1,3 @@ +#!/bin/bash + +/usr/local/bin/silverstone_v2_platform_shutdown.sh system diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/eeprom.py new file mode 100644 index 000000000000..03bdb5262f2c --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/eeprom.py @@ -0,0 +1,20 @@ +############################################################################# +# Celestica Silverstone-v2 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/psuutil.py b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/psuutil.py new file mode 100644 index 000000000000..1b91409e82d7 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/psuutil.py @@ -0,0 +1,85 @@ +import os.path +import subprocess +import sys +import re + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + self.ipmi_sensor = "ipmitool sensor" + PsuBase.__init__(self) + + def run_command(self, command): + ret, data = subprocess.getstatusoutput(command) + if ret != 0: + sys.exit(ret) + else: + return data + + def find_value(self, grep_string): + result = re.search(".+\| (0x\d{2})\d{2}\|.+", grep_string) + if result: + return result.group(1) + else: + return result + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + grep_key = "PSUL_Status" if index == 1 else "PSUR_Status" + grep_string = self.run_command(self.ipmi_sensor + ' | grep ' + grep_key) + status_byte = self.find_value(grep_string) + + if status_byte is None: + return False + + failure_detected = (int(status_byte, 16) >> 1) & 1 + input_lost = (int(status_byte, 16) >> 3) & 1 + if failure_detected or input_lost: + return False + else: + return True + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + + grep_key = "PSUL_Status" if index == 1 else "PSUR_Status" + grep_string = self.run_command(self.ipmi_sensor + ' | grep ' + grep_key) + status_byte = self.find_value(grep_string) + + if status_byte is None: + return False + + presence = (int(status_byte, 16) >> 0) & 1 + if presence: + return True + else: + return False diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/sfputil.py new file mode 100755 index 000000000000..7dd0ab18ae28 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/sfputil.py @@ -0,0 +1,179 @@ +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 33 + QSFP_PORT_START = 1 + QSFP_PORT_END = 32 + + EEPROM_OFFSET = 1 + PORT_INFO_PATH = '/sys/class/silverstonev2_fpga' + + _port_name = "" + _port_to_eeprom_mapping = {} + _port_to_i2cbus_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return list(range(self.QSFP_PORT_START, self.QSFP_PORT_END + 1)) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + @property + def port_to_i2cbus_mapping(self): + return self._port_to_i2cbus_mapping + + def get_port_name(self, port_num): + if port_num in self.qsfp_ports: + self._port_name = "QSFP" + str(port_num - self.QSFP_PORT_START + 1) + else: + self._port_name = "SFP" + str(port_num) + return self._port_name + + # def get_eeprom_dom_raw(self, port_num): + # if port_num in self.qsfp_ports: + # # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + # return None + # else: + # # Read dom eeprom at addr 0x51 + # return self._read_eeprom_devid(port_num, self.DOM_EEPROM_ADDR, 256) + + def __init__(self): + # Override port_to_eeprom_mapping for class initialization + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' + + for x in range(self.PORT_START, self.PORT_END+1): + self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET) + self.port_to_eeprom_mapping[x] = eeprom_path.format( + x + self.EEPROM_OFFSET) + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + + # Check for invalid port_num + if port_num not in list(range(self.port_start, self.port_end + 1)): + return False + + # Get path for access port presence status + port_name = self.get_port_name(port_num) + sysfs_filename = "qsfp_modprs" if port_num in self.qsfp_ports else "sfp_modabs" + reg_path = "/".join([self.PORT_INFO_PATH, port_name, sysfs_filename]) + + # Read status + try: + reg_file = open(reg_path) + content = reg_file.readline().rstrip() + reg_value = int(content) + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + # Module present is active low + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + try: + port_name = self.get_port_name(port_num) + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_lpmode"]), "r+") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + # Read status + content = reg_file.readline().rstrip() + reg_value = int(content, 16) + # ModPrsL is active low + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + try: + port_name = self.get_port_name(port_num) + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_lpmode"]), "r+") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + content = hex(lpmode) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + try: + port_name = self.get_port_name(port_num) + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(0)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + reg_file.seek(0) + reg_file.write(hex(1)) + reg_file.close() + + return True + + def get_transceiver_change_event(self, timeout=0): + """ + TBD: When the feature request. + """ + raise NotImplementedError diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/ssd_util.py b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/ssd_util.py new file mode 100644 index 000000000000..374f13a684cd --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/ssd_util.py @@ -0,0 +1,105 @@ +# -*- coding: utf-8 -*-# + +# @Time : 2023/3/17 16:42 +# @Mail : J_Talong@163.com yajiang@celestica.com +# @Author : jiang tao + +from sonic_platform_base.sonic_ssd.ssd_base import SsdBase +from subprocess import Popen, PIPE +from re import findall +from os.path import exists + +NOT_AVAILABLE = "N/A" + + +class SsdUtil(SsdBase): + + def __init__(self, disk_dev): + """ + Constructor + Args: + disk_dev: Linux device name to get parameters for + """ + + super().__init__(disk_dev) + if not isinstance(disk_dev, str): + raise TypeError("disk dev type wrong {}".format(type(disk_dev))) + + if not exists(disk_dev): + raise RuntimeError("disk dev {} not found".format(disk_dev)) + + self.model = NOT_AVAILABLE + self.serial = NOT_AVAILABLE + self.firmware = NOT_AVAILABLE + self.temperature = NOT_AVAILABLE + self.health = NOT_AVAILABLE + + inno_disk = ["iSmart", "-d", disk_dev] + self.ssd_info = self._execute_shell(inno_disk) + + self.model = self._parse_re(r'Model Name:\s*(.+?)\n', self.ssd_info) + self.serial = self._parse_re(r'Serial Number:\s*(.+?)\n', self.ssd_info) + self.firmware = self._parse_re(r'FW Version:\s*(.+?)\n', self.ssd_info) + self.temperature = self._parse_re(r'Temperature\s*\[\s*(.+?)\]', self.ssd_info) + self.health = self._parse_re(r'Health:\s*(.+?)', self.ssd_info) + + @staticmethod + def _execute_shell(cmd): + process = Popen(cmd, universal_newlines=True, stdout=PIPE) + output, _ = process.communicate() + return output + + @staticmethod + def _parse_re(pattern, buffer): + res_list = findall(pattern, buffer) + return res_list[0] if res_list else NOT_AVAILABLE + + def get_health(self): + """ + Retrieves current disk health in percentages + Returns: + A float number of current ssd health + e.g. 83.5 + """ + return self.health + + def get_temperature(self): + """ + Retrieves current disk temperature in Celsius + Returns: + A float number of current temperature in Celsius + e.g. 40.1 + """ + return self.temperature + + def get_model(self): + """ + Retrieves model for the given disk device + Returns: + A string holding disk model as provided by the manufacturer + """ + return self.model + + def get_firmware(self): + """ + Retrieves firmware version for the given disk device + Returns: + A string holding disk firmware version as provided by the manufacturer + """ + return self.firmware + + def get_serial(self): + """ + Retrieves serial number for the given disk device + Returns: + A string holding disk serial number as provided by the manufacturer + """ + return self.serial + + def get_vendor_output(self): + """ + Retrieves vendor specific data for the given disk device + Returns: + A string holding some vendor specific disk information + """ + return self.ssd_info diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_silverstone_v2-r0/pmon_daemon_control.json new file mode 100644 index 000000000000..9a1f92753051 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true, + "skip_fancontrol": true +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_silverstone_v2-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..5661a0d21396 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/system_health_monitoring_config.json @@ -0,0 +1,16 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu.temperature", + "PSU 1 Fan 1", + "PSU 2 Fan 1" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "alternate_blink_4hz" + } +} diff --git a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2 b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2 index bc3aadd26f7f..daaba0539382 100644 --- a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2 +++ b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2 @@ -2,40 +2,18 @@ {%- include 'buffer_ports.j2' %} +{# Skip BUFFER_POOL, BUFFER_PROFILE #} {%- macro generate_buffer_pool_and_profiles() %} - "BUFFER_POOL": { - "ingress_lossless_pool": { - "size": "60000000", - "type": "ingress", - "mode": "dynamic", - "xoff": "22600000" - }, - "egress_lossy_pool": { - "size": "41300000", - "type": "egress", - "mode": "dynamic" - }, - "egress_lossless_pool": { - "size": "41300000", - "type": "egress", - "mode": "static" - } - }, - "BUFFER_PROFILE": { - "ingress_lossy_profile": { - "pool":"ingress_lossless_pool", - "size":"0", - "dynamic_th":"3" - }, - "egress_lossy_profile": { - "pool":"egress_lossy_pool", - "size":"4096", - "dynamic_th":"3" - }, - "egress_lossless_profile": { - "pool":"egress_lossless_pool", - "size":"4096", - "static_th":"41300000" - } +{%- endmacro %} + +{# Skip BUFFER_QUEUE #} +{%- macro generate_queue_buffers(ports) %} + "BUFFER_QUEUE": { + } +{%- endmacro %} + +{# Skip BUFFER_PG #} +{%- macro generate_pg_profils(ports) %} + "BUFFER_PG": { }, {%- endmacro %} diff --git a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2 b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2 index bc3aadd26f7f..daaba0539382 100644 --- a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2 +++ b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2 @@ -2,40 +2,18 @@ {%- include 'buffer_ports.j2' %} +{# Skip BUFFER_POOL, BUFFER_PROFILE #} {%- macro generate_buffer_pool_and_profiles() %} - "BUFFER_POOL": { - "ingress_lossless_pool": { - "size": "60000000", - "type": "ingress", - "mode": "dynamic", - "xoff": "22600000" - }, - "egress_lossy_pool": { - "size": "41300000", - "type": "egress", - "mode": "dynamic" - }, - "egress_lossless_pool": { - "size": "41300000", - "type": "egress", - "mode": "static" - } - }, - "BUFFER_PROFILE": { - "ingress_lossy_profile": { - "pool":"ingress_lossless_pool", - "size":"0", - "dynamic_th":"3" - }, - "egress_lossy_profile": { - "pool":"egress_lossy_pool", - "size":"4096", - "dynamic_th":"3" - }, - "egress_lossless_profile": { - "pool":"egress_lossless_pool", - "size":"4096", - "static_th":"41300000" - } +{%- endmacro %} + +{# Skip BUFFER_QUEUE #} +{%- macro generate_queue_buffers(ports) %} + "BUFFER_QUEUE": { + } +{%- endmacro %} + +{# Skip BUFFER_PG #} +{%- macro generate_pg_profils(ports) %} + "BUFFER_PG": { }, {%- endmacro %} diff --git a/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini b/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini index 090370bc52ca..2e2b7e88e75e 100644 --- a/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini +++ b/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini @@ -1,23 +1,2 @@ # PG lossless profiles. # speed cable size xon xoff threshold xon_offset - 10000 5m 1248 2288 35776 0 2288 - 25000 5m 1248 2288 53248 0 2288 - 40000 5m 1248 2288 66560 0 2288 - 50000 5m 1248 2288 90272 0 2288 - 100000 5m 1248 2288 165568 0 2288 - 200000 5m 1248 2288 165568 0 2288 - 400000 5m 1248 2288 165568 0 2288 - 10000 40m 1248 2288 37024 0 2288 - 25000 40m 1248 2288 53248 0 2288 - 40000 40m 1248 2288 71552 0 2288 - 50000 40m 1248 2288 96096 0 2288 - 100000 40m 1248 2288 177632 0 2288 - 200000 40m 1248 2288 177632 0 2288 - 400000 40m 1248 2288 177632 0 2288 - 10000 300m 1248 2288 46176 0 2288 - 25000 300m 1248 2288 79040 0 2288 - 40000 300m 1248 2288 108160 0 2288 - 50000 300m 1248 2288 141856 0 2288 - 100000 300m 1248 2288 268736 0 2288 - 200000 300m 1248 2288 268736 0 2288 - 400000 300m 1248 2288 268736 0 2288 diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/hwsku.json b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/hwsku.json new file mode 100644 index 000000000000..777b426a0656 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/hwsku.json @@ -0,0 +1,172 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet1": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet2": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet3": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet4": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet5": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet6": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet7": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet8": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet9": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet10": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet11": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet12": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet13": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet14": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet15": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet16": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet17": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet18": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet19": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet20": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet21": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet22": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet23": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet24": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet25": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet26": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet27": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet28": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet29": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet30": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet31": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet32": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet33": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet34": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet35": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet36": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet37": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet38": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet39": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet40": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet41": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet42": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet43": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet44": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet45": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet46": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet47": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet48": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet52": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet60": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet64": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet68": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet72": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet76": { + "default_brkout_mode": "1x100G[40G]" + } + } +} diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/port_config.ini b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/port_config.ini index 3dc16e2eb9b9..1570a8ff26ea 100644 --- a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/port_config.ini +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/port_config.ini @@ -48,10 +48,10 @@ Ethernet45 114 twentyfiveGigE1/12/2 46 25000 Ethernet46 115 twentyfiveGigE1/12/3 47 25000 Ethernet47 116 twentyfiveGigE1/12/4 48 25000 Ethernet48 121,122,123,124 hundredGigE1/49 49 100000 -Ethernet49 125,126,127,128 hundredGigE1/50 50 100000 -Ethernet50 69,70,71,72 hundredGigE1/51 51 100000 -Ethernet51 65,66,67,68 hundredGigE1/52 52 100000 -Ethernet52 1,2,3,4 hundredGigE1/53 53 100000 -Ethernet53 33,34,35,36 hundredGigE1/54 54 100000 -Ethernet54 5,6,7,8 hundredGigE1/55 55 100000 -Ethernet55 41,42,43,44 hundredGigE1/56 56 100000 +Ethernet52 125,126,127,128 hundredGigE1/50 50 100000 +Ethernet56 69,70,71,72 hundredGigE1/51 51 100000 +Ethernet60 65,66,67,68 hundredGigE1/52 52 100000 +Ethernet64 1,2,3,4 hundredGigE1/53 53 100000 +Ethernet68 33,34,35,36 hundredGigE1/54 54 100000 +Ethernet72 5,6,7,8 hundredGigE1/55 55 100000 +Ethernet76 41,42,43,44 hundredGigE1/56 56 100000 diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/td3-s5248f-25g.config.bcm b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/td3-s5248f-25g.config.bcm index 028a04484a88..249e3789bf2b 100644 --- a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/td3-s5248f-25g.config.bcm +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/td3-s5248f-25g.config.bcm @@ -1,41 +1,56 @@ -sai_load_hw_config=/etc/bcm/flex/bcm56870_a0_premium_issu/b870.6.4.1/ os=unix - dpp_clock_ratio=2:3 oversubscribe_mode=1 core_clock_frequency=1525 + l2xmsg_mode=1 -pbmp_oversubscribe=0x7f878787f878787f9fe1e1e1fe1e1e1fe -pbmp_xport_xe=0x7f878787f878787f9fe1e1e1fe1e1e1fe -ifp_inports_support_enable=1 -port_flex_enable=1 -phy_an_c73=3 -l2xmsg_hostbuf_size=8192 +# need for mac learn scale +l2xmsg_hostbuf_size=16384 module_64ports=0 -tdma_intr_enable=1 -ipv6_lpm_128b_enable=1 -stat_if_parity_enable=1 -bcm_tunnel_term_compatible_mode=1 -table_dma_enable=1 -schan_intr_enable=0 -parity_enable=1 -parity_correction=1 -miim_intr_enable=1 + +#Interrupts and Parity max_vp_lags=0 -tdma_intr_enable=1 + +schan_intr_enable=0 tdma_timeout_usec=5000000 -mmu_lossless=0 -pdma_descriptor_prefetch_enable=1 -pktdma_poll_mode_channel_bitmap=1 +#Default L3 profile l3_alpm_enable=2 l3_alpm_ipv6_128b_bkt_rsvd=1 l2_mem_entries=40960 l3_mem_entries=40960 -l3_max_ecmp_mode=1 +#Tunnels +bcm_tunnel_term_compatible_mode=1 +use_all_splithorizon_groups=1 +sai_tunnel_support=1 + +sai_interface_type_auto_detect=0 + +#RIOT Enable +riot_enable=1 +riot_overlay_l3_intf_mem_size=8192 +riot_overlay_l3_egress_mem_size=32768 +l3_ecmp_levels=2 +riot_overlay_ecmp_resilient_hash_size=16384 + + +stable_size=0x6400000 + + +#New Additions +pfc_deadlock_seq_control=1 + +#Common configs from broadcom/x86_64-broadcom_common/x86_64-broadcom_b87/broadcom-sonic-td3.config.bcm -stable_size=0x5500000 +#Port and Phy Configs + +pbmp_oversubscribe=0x7f878787f878787f9fe1e1e1fe1e1e1fe +pbmp_xport_xe=0x7f878787f878787f9fe1e1e1fe1e1e1fe +oversubscribe_mixed_sister_25_50_enable=1 +ifp_inports_support_enable=1 +port_flex_enable=1 +phy_an_c73=3 portmap_1.0=1:100 portmap_5.0=5:100 @@ -342,15 +357,40 @@ dport_map_port_115=45 dport_map_port_116=46 dport_map_port_117=47 dport_map_port_118=48 +#100G dport_map_port_123=49 -dport_map_port_127=50 -dport_map_port_71=51 -dport_map_port_67=52 -dport_map_port_1=53 -dport_map_port_33=54 -dport_map_port_5=55 -dport_map_port_41=56 +dport_map_port_124=50 +dport_map_port_125=51 +dport_map_port_126=52 +dport_map_port_127=53 +dport_map_port_128=54 +dport_map_port_129=55 +dport_map_port_130=56 +dport_map_port_71=57 +dport_map_port_72=58 +dport_map_port_73=59 +dport_map_port_74=60 +dport_map_port_67=61 +dport_map_port_68=62 +dport_map_port_69=63 +dport_map_port_70=64 +dport_map_port_1=65 +dport_map_port_2=66 +dport_map_port_3=67 +dport_map_port_4=68 +dport_map_port_33=69 +dport_map_port_34=70 +dport_map_port_35=71 +dport_map_port_36=72 +dport_map_port_5=73 +dport_map_port_6=74 +dport_map_port_7=75 +dport_map_port_8=76 +dport_map_port_41=77 +dport_map_port_42=78 +dport_map_port_43=79 +dport_map_port_44=80 -mmu_init_config="TD3-DELL-lossless" sai_preinit_cmd_file=/usr/share/sonic/hwsku/sai_preinit_cmd.soc +fpem_mem_entries=32768 diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/default_sku b/device/dell/x86_64-dellemc_s5248f_c3538-r0/default_sku index 618471d5629d..f5ca196ea4e2 100644 --- a/device/dell/x86_64-dellemc_s5248f_c3538-r0/default_sku +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/default_sku @@ -1 +1,2 @@ -DellEMC-S5248f-P-25G t1 \ No newline at end of file +DellEMC-S5248f-P-25G t1 + diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/platform.json b/device/dell/x86_64-dellemc_s5248f_c3538-r0/platform.json new file mode 100644 index 000000000000..64002194a2d3 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/platform.json @@ -0,0 +1,912 @@ +{ + "chassis": { + "name": "S5248F-ON", + "status_led": { + "controllable": true, + "colors": ["green", "flashing green", "yellow", "flashing yellow"] + }, + "thermal_manager" : false, + "components": [ + { + "name": "BIOS" + }, + { + "name": "FPGA" + }, + { + "name": "BMC" + }, + { + "name": "System CPLD" + }, + { + "name": "Slave CPLD 1" + }, + { + "name": "Slave CPLD 2" + } + ], + "fans": [ + { + "name": "FanTray1-Fan1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray1-Fan2", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray2-Fan1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray2-Fan2", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray3-Fan1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray3-Fan2", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray4-Fan1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray4-Fan2", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ], + "fan_drawers":[ + { + "name": "FanTray1", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "FanTray1-Fan1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray1-Fan2", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "FanTray2", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "FanTray2-Fan1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray2-Fan2", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "FanTray3", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "FanTray3-Fan1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray3-Fan2", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "FanTray4", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "FanTray4-Fan1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray4-Fan2", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU1 Fan", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "PSU2", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU2 Fan", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + } + ], + "thermals": [ + { + "name": "ASIC On-board", + "controllable": false, + "low-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "CPU On-board", + "controllable": false, + "low-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "Inlet Airflow Sensor", + "controllable": false, + "low-crit-threshold": false, + "high-threshold": false, + "high-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "PSU1 Airflow Sensor", + "controllable": false, + "low-crit-threshold": false, + "high-threshold": false, + "high-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "PSU2 Airflow Sensor", + "controllable": false, + "low-crit-threshold": false, + "high-threshold": false, + "high-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "System Front Left", + "controllable": false, + "low-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "System Front Middler", + "controllable": false, + "low-crit-threshold": false, + "high-threshold": false, + "high-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "System Front Right", + "controllable": false, + "low-crit-threshold": false, + "high-threshold": false, + "high-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + } + ], + "modules": [], + "sfps": [ + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "SFP/SFP+/SFP28" + }, + { + "name": "QSFP28" + }, + { + "name": "QSFP28" + }, + { + "name": "QSFP28" + }, + { + "name": "QSFP28" + }, + { + "name": "QSFP28" + }, + { + "name": "QSFP28" + }, + { + "name": "QSFP28" + }, + { + "name": "QSFP28" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index":"1", + "lanes":"49", + "breakout_modes": { + "1x25G[10G]": "Eth1" + } + }, + "Ethernet1": { + "index":"2", + "lanes":"50", + "breakout_modes": { + "1x25G[10G]": "Eth2" + } + }, + "Ethernet2": { + "index":"3", + "lanes":"51", + "breakout_modes": { + "1x25G[10G]": "Eth3" + } + }, + "Ethernet3": { + "index":"4", + "lanes":"52", + "breakout_modes": { + "1x25G[10G]": "Eth4" + } + }, + "Ethernet4": { + "index":"5", + "lanes":"57", + "breakout_modes": { + "1x25G[10G]": "Eth5" + } + }, + "Ethernet5": { + "index":"6", + "lanes":"58", + "breakout_modes": { + "1x25G[10G]": "Eth6" + } + }, + "Ethernet6": { + "index":"7", + "lanes":"59", + "breakout_modes": { + "1x25G[10G]": "Eth7" + } + }, + "Ethernet7": { + "index":"8", + "lanes":"60", + "breakout_modes": { + "1x25G[10G]": "Eth8" + } + }, + "Ethernet8": { + "index":"9", + "lanes":"61", + "breakout_modes": { + "1x25G[10G]": "Eth9" + } + }, + "Ethernet9": { + "index":"10", + "lanes":"62", + "breakout_modes": { + "1x25G[10G]": "Eth10" + } + }, + "Ethernet10": { + "index":"11", + "lanes":"63", + "breakout_modes": { + "1x25G[10G]": "Eth11" + } + }, + "Ethernet11": { + "index":"12", + "lanes":"64", + "breakout_modes": { + "1x25G[10G]": "Eth12" + } + }, + "Ethernet12": { + "index":"13", + "lanes":"77", + "breakout_modes": { + "1x25G[10G]": "Eth13" + } + }, + "Ethernet13": { + "index":"14", + "lanes":"78", + "breakout_modes": { + "1x25G[10G]": "Eth14" + } + }, + "Ethernet14": { + "index":"15", + "lanes":"79", + "breakout_modes": { + "1x25G[10G]": "Eth15" + } + }, + "Ethernet15": { + "index":"16", + "lanes":"80", + "breakout_modes": { + "1x25G[10G]": "Eth16" + } + }, + "Ethernet16": { + "index":"17", + "lanes":"85", + "breakout_modes": { + "1x25G[10G]": "Eth17" + } + }, + "Ethernet17": { + "index":"18", + "lanes":"86", + "breakout_modes": { + "1x25G[10G]": "Eth18" + } + }, + "Ethernet18": { + "index":"19", + "lanes":"87", + "breakout_modes": { + "1x25G[10G]": "Eth19" + } + }, + "Ethernet19": { + "index":"20", + "lanes":"88", + "breakout_modes": { + "1x25G[10G]": "Eth20" + } + }, + "Ethernet20": { + "index":"21", + "lanes":"93", + "breakout_modes": { + "1x25G[10G]": "Eth21" + } + }, + "Ethernet21": { + "index":"22", + "lanes":"94", + "breakout_modes": { + "1x25G[10G]": "Eth22" + } + }, + "Ethernet22": { + "index":"23", + "lanes":"95", + "breakout_modes": { + "1x25G[10G]": "Eth23" + } + }, + "Ethernet23": { + "index":"24", + "lanes":"96", + "breakout_modes": { + "1x25G[10G]": "Eth24" + } + }, + "Ethernet24": { + "index":"25", + "lanes":"13", + "breakout_modes": { + "1x25G[10G]": "Eth25" + } + }, + "Ethernet25": { + "index":"26", + "lanes":"14", + "breakout_modes": { + "1x25G[10G]": "Eth26" + } + }, + "Ethernet26": { + "index":"27", + "lanes":"15", + "breakout_modes": { + "1x25G[10G]": "Eth27" + } + }, + "Ethernet27": { + "index":"28", + "lanes":"16", + "breakout_modes": { + "1x25G[10G]": "Eth28" + } + }, + "Ethernet28": { + "index":"29", + "lanes":"21", + "breakout_modes": { + "1x25G[10G]": "Eth29" + } + }, + "Ethernet29": { + "index":"30", + "lanes":"22", + "breakout_modes": { + "1x25G[10G]": "Eth30" + } + }, + "Ethernet30": { + "index":"31", + "lanes":"23", + "breakout_modes": { + "1x25G[10G]": "Eth31" + } + }, + "Ethernet31": { + "index":"32", + "lanes":"24", + "breakout_modes": { + "1x25G[10G]": "Eth32" + } + }, + "Ethernet32": { + "index":"33", + "lanes":"29", + "breakout_modes": { + "1x25G[10G]": "Eth33" + } + }, + "Ethernet33": { + "index":"34", + "lanes":"30", + "breakout_modes": { + "1x25G[10G]": "Eth34" + } + }, + "Ethernet34": { + "index":"35", + "lanes":"31", + "breakout_modes": { + "1x25G[10G]": "Eth35" + } + }, + "Ethernet35": { + "index":"36", + "lanes":"32", + "breakout_modes": { + "1x25G[10G]": "Eth36" + } + }, + "Ethernet36": { + "index":"37", + "lanes":"97", + "breakout_modes": { + "1x25G[10G]": "Eth37" + } + }, + "Ethernet37": { + "index":"38", + "lanes":"98", + "breakout_modes": { + "1x25G[10G]": "Eth38" + } + }, + "Ethernet38": { + "index":"39", + "lanes":"99", + "breakout_modes": { + "1x25G[10G]": "Eth39" + } + }, + "Ethernet39": { + "index":"40", + "lanes":"100", + "breakout_modes": { + "1x25G[10G]": "Eth40" + } + }, + "Ethernet40": { + "index":"41", + "lanes":"105", + "breakout_modes": { + "1x25G[10G]": "Eth41" + } + }, + "Ethernet41": { + "index":"42", + "lanes":"106", + "breakout_modes": { + "1x25G[10G]": "Eth42" + } + }, + "Ethernet42": { + "index":"43", + "lanes":"107", + "breakout_modes": { + "1x25G[10G]": "Eth43" + } + }, + "Ethernet43": { + "index":"44", + "lanes":"108", + "breakout_modes": { + "1x25G[10G]": "Eth44" + } + }, + "Ethernet44": { + "index":"45", + "lanes":"113", + "breakout_modes": { + "1x25G[10G]": "Eth45" + } + }, + "Ethernet45": { + "index":"46", + "lanes":"114", + "breakout_modes": { + "1x25G[10G]": "Eth46" + } + }, + "Ethernet46": { + "index":"47", + "lanes":"115", + "breakout_modes": { + "1x25G[10G]": "Eth47" + } + }, + "Ethernet47": { + "index":"48", + "lanes":"116", + "breakout_modes": { + "1x25G[10G]": "Eth48" + } + }, + "Ethernet48": { + "index":"49,49,49,49", + "lanes":"121,122,123,124", + "breakout_modes": { + "1x100G[40G]": ["Eth49"], + "2x50G": ["Eth49/1", "Eth49/2"], + "1x50G": ["Eth49/1"], + "4x25G[10G]": ["Eth49/1", "Eth49/2", "Eth49/3", "Eth49/4"], + "1x25G[10G]": ["Eth49/1"] + } + }, + "Ethernet52": { + "index":"50,50,50,50", + "lanes":"125,126,127,128", + "breakout_modes": { + "1x100G[40G]": ["Eth50"], + "2x50G": ["Eth50/1", "Eth50/2"], + "1x50G": ["Eth50/1"], + "4x25G[10G]": ["Eth50/1", "Eth50/2", "Eth50/3", "Eth50/4"], + "1x25G[10G]": ["Eth50/1"] + } + }, + "Ethernet56": { + "index":"51,51,51,51", + "lanes":"69,70,71,72", + "breakout_modes": { + "1x100G[40G]": ["Eth51"], + "2x50G": ["Eth51/1", "Eth51/2"], + "1x50G": ["Eth51/1"], + "4x25G[10G]": ["Eth51/1", "Eth51/2", "Eth51/3", "Eth51/4"], + "1x25G[10G]": ["Eth51/1"] + } + }, + "Ethernet60": { + "index":"52,52,52,52", + "lanes":"65,66,67,68", + "breakout_modes": { + "1x100G[40G]": ["Eth52"], + "2x50G": ["Eth52/1", "Eth52/2"], + "1x50G": ["Eth52/1"], + "4x25G[10G]": ["Eth52/1", "Eth52/2", "Eth52/3", "Eth52/4"], + "1x25G[10G]": ["Eth52/1"] + } + }, + "Ethernet64": { + "index":"53,53,53,53", + "lanes":"1,2,3,4", + "breakout_modes": { + "1x100G[40G]": ["Eth53"], + "2x50G": ["Eth53/1", "Eth53/2"], + "1x50G": ["Eth53/1"], + "4x25G[10G]": ["Eth53/1", "Eth53/2", "Eth53/3", "Eth53/4"], + "1x25G[10G]": ["Eth53/1"] + } + }, + "Ethernet68": { + "index":"54,54,54,54", + "lanes":"33,34,35,36", + "breakout_modes": { + "1x100G[40G]": ["Eth54"], + "2x50G": ["Eth54/1", "Eth54/2"], + "1x50G": ["Eth54/1"], + "4x25G[10G]": ["Eth54/1", "Eth54/2", "Eth54/3", "Eth54/4"], + "1x25G[10G]": ["Eth54/1"] + } + }, + "Ethernet72": { + "index":"55,55,55,55", + "lanes":"5,6,7,8", + "breakout_modes": { + "1x100G[40G]": ["Eth55"], + "2x50G": ["Eth55/1", "Eth55/2"], + "1x50G": ["Eth55/1"], + "4x25G[10G]": ["Eth55/1", "Eth55/2", "Eth55/3", "Eth55/4"], + "1x25G[10G]": ["Eth55/1"] + } + }, + "Ethernet76": { + "index":"56,56,56,56", + "lanes":"41,42,43,44", + "breakout_modes": { + "1x100G[40G]": ["Eth56"], + "2x50G": ["Eth56/1", "Eth56/2"], + "1x50G": ["Eth56/1"], + "4x25G[10G]": ["Eth56/1", "Eth56/2", "Eth56/3", "Eth56/4"], + "1x25G[10G]": ["Eth56/1"] + } + } + + } +} diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 index 0e8ad2bf7e9d..a8dd0dadcaec 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 +++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 @@ -1 +1 @@ -266aa59b7e63faf97657313fe65cdf86 \ No newline at end of file +8b28fac0d174b9f0e9120f8ee8c52fd2 \ No newline at end of file diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml index fc26d290eedd..ecda116a6ef1 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml +++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml @@ -1,5 +1,5 @@ - + @@ -727,7 +727,6 @@ lowercase characters. 1 1 - 63 false @@ -746,7 +745,6 @@ lowercase characters. 0 1 - 63 false @@ -765,7 +763,6 @@ lowercase characters. 3 1 - 63 false @@ -784,7 +781,6 @@ lowercase characters. 2 1 - 63 false @@ -803,7 +799,6 @@ lowercase characters. 5 1 - 63 false @@ -822,7 +817,6 @@ lowercase characters. 4 1 - 63 false @@ -841,7 +835,6 @@ lowercase characters. 7 1 - 63 false @@ -860,7 +853,6 @@ lowercase characters. 6 1 - 63 false @@ -879,7 +871,6 @@ lowercase characters. 9 1 - 63 false @@ -898,7 +889,6 @@ lowercase characters. 8 1 - 63 false @@ -917,7 +907,6 @@ lowercase characters. 11 1 - 63 false @@ -936,7 +925,6 @@ lowercase characters. 10 1 - 63 false @@ -955,7 +943,6 @@ lowercase characters. 13 1 - 63 false @@ -974,7 +961,6 @@ lowercase characters. 12 1 - 63 false @@ -993,7 +979,6 @@ lowercase characters. 15 1 - 63 false @@ -1012,7 +997,6 @@ lowercase characters. 14 1 - 63 false @@ -1031,7 +1015,6 @@ lowercase characters. 17 1 - 63 false @@ -1050,7 +1033,6 @@ lowercase characters. 16 1 - 63 false @@ -1069,7 +1051,6 @@ lowercase characters. 19 1 - 63 false @@ -1088,7 +1069,6 @@ lowercase characters. 18 1 - 63 false @@ -1107,7 +1087,6 @@ lowercase characters. 21 1 - 63 false @@ -1126,7 +1105,6 @@ lowercase characters. 20 1 - 63 false @@ -1145,7 +1123,6 @@ lowercase characters. 23 1 - 63 false @@ -1164,7 +1141,6 @@ lowercase characters. 22 1 - 63 false @@ -1183,7 +1159,6 @@ lowercase characters. 25 1 - 63 false @@ -1202,7 +1177,6 @@ lowercase characters. 24 1 - 63 false @@ -1221,7 +1195,6 @@ lowercase characters. 27 1 - 63 false @@ -1240,7 +1213,6 @@ lowercase characters. 26 1 - 63 false @@ -1259,7 +1231,6 @@ lowercase characters. 29 1 - 63 false @@ -1278,7 +1249,6 @@ lowercase characters. 28 1 - 63 false @@ -1297,7 +1267,6 @@ lowercase characters. 31 1 - 63 false @@ -1316,7 +1285,6 @@ lowercase characters. 30 1 - 63 false @@ -1335,7 +1303,6 @@ lowercase characters. 1 0 - 63 false @@ -1354,7 +1321,6 @@ lowercase characters. 14 0 - 63 false @@ -1373,7 +1339,6 @@ lowercase characters. 15 0 - 63 false @@ -1392,7 +1357,6 @@ lowercase characters. 12 0 - 63 false @@ -1411,7 +1375,6 @@ lowercase characters. 13 0 - 63 false @@ -1430,7 +1393,6 @@ lowercase characters. 10 0 - 63 false @@ -1449,7 +1411,6 @@ lowercase characters. 11 0 - 63 false @@ -1468,7 +1429,6 @@ lowercase characters. 8 0 - 63 false @@ -1487,7 +1447,6 @@ lowercase characters. 9 0 - 63 false @@ -1506,7 +1465,6 @@ lowercase characters. 6 0 - 63 false @@ -1525,7 +1483,6 @@ lowercase characters. 7 0 - 63 false @@ -1544,7 +1501,6 @@ lowercase characters. 4 0 - 63 false @@ -1563,7 +1519,6 @@ lowercase characters. 5 0 - 63 false @@ -1582,7 +1537,6 @@ lowercase characters. 2 0 - 63 false @@ -1601,7 +1555,6 @@ lowercase characters. 3 0 - 63 false @@ -1620,7 +1573,6 @@ lowercase characters. 0 0 - 63 false @@ -1636,7 +1588,6 @@ lowercase characters. NA - 0 @@ -1656,7 +1607,6 @@ lowercase characters. NA - 1 @@ -1676,7 +1626,6 @@ lowercase characters. NA - 0 @@ -1696,7 +1645,6 @@ lowercase characters. NA - 1 @@ -1716,7 +1664,6 @@ lowercase characters. NA - 2 @@ -1736,7 +1683,6 @@ lowercase characters. NA - 3 @@ -1810,6 +1756,53 @@ lowercase characters. + + + alaska-88E1780 + + 16 + 3 + 23 + 65280 + + + 1 + 28 + 1024 + 64511 + + + + alaska-88E2580 + + 61472 + 31 + 168 + 57351 + + + 61473 + 31 + 296 + 57351 + + + + alaska-88E2540 + + 61472 + 31 + 168 + 57351 + + + 61473 + 31 + 296 + 57351 + + + . 1 diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 index f2cf3d5b688e..e4baf309b51c 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 +++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 @@ -1 +1 @@ -85b49bcb9d399bcd1b8128a42caba2d2 \ No newline at end of file +fcd5642435f602883aab5c9672e96aa5 \ No newline at end of file diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml index 980d4267b1bb..78460a4e0a9e 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml +++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml @@ -1,5 +1,5 @@ - + @@ -239,8 +239,8 @@ enumeration Tx parameter type - atten - atten + pre + pre 0 @@ -248,75 +248,10 @@ post 1 - - pre - pre - 2 - - - pre2 - pre2 - 3 - - - pre3 - pre3 - 4 - peak peak - 5 - - - main - main - 6 - - - txAmpAdjEn - txAmpAdjEn - 7 - - - emph0 - emph0 - 8 - - - emph1 - emph1 - 9 - - - txAmpShft - txAmpShft - 10 - - - txEmphEn - txEmphEn - 11 - - - txEmphEn1 - txEmphEn1 - 12 - - - txAmpAdj - txAmpAdj - 13 - - - slewCtrlEn - slewCtrlEn - 14 - - - slewRate - slewRate - 15 + 2 @@ -324,400 +259,180 @@ enumeration Rx parameter type - sqlch - sqlch + dataRate + dataRate 0 - DC - DC + res1Sel + res1Sel 1 - LF - LF + res2Sel + res2Sel 2 - HF - HF + cap1Sel + cap1Sel 3 - gainShape1 - gainShape1 + cap2Sel + cap2Sel 4 - gainShape2 - gainShape2 + minCap + minCap 5 - shortChannelEn - shortChannelEn + minCapN + minCapN + 6 + + + sumfBoostTargetC0 + sumfBoostTargetC0 7 - bfLf - bfLf + sumfBoostTargetC1 + sumfBoostTargetC1 8 - bfHf - bfHf + sumfBoostTargetC2 + sumfBoostTargetC2 9 - minLf - minLf + midpointPhaseOs0 + midpointPhaseOs0 10 - maxLf - maxLf + midpointPhaseOs1 + midpointPhaseOs1 11 - minHf - minHf + midpointPhaseOs2 + midpointPhaseOs2 12 - - maxHf - maxHf - 13 - - - minPre1 - minPre1 - 14 - - - maxPre1 - maxPre1 - 15 - - - minPre2 - minPre2 - 16 - - - maxPre2 - - 17 - - - minPost - minPost - 18 - - - maxPost - maxPost - 19 - - - squelch - squelch - 20 - - - termination - termination - 27 - - - coldEnvelope - coldEnvelope - 35 - - - hotEnvelope - hotEnvelope - 36 - - - dcGain - dcGain - 37 - - - bandWidth - bandWidth - 38 - - - dfe - dfe - 39 - - - ffeR - ffeR - 40 - - - ffeC - ffeC - 41 - - - sampler - sampler - 42 - - - align90 - align90 - 43 - - - ffeS - ffeS - 44 - - - resSel - resSel - 45 - - - resShift - resShift - 46 - - - capSel - capSel - 47 - - - ffeSettingForce - ffeSettingForce - 48 - - - adaptedResSel - adaptedResSel - 49 - - - adaptedCapSel - adaptedCapSel - 50 - selmufi selmufi - 51 + 13 selmuff selmuff - 52 + 14 selmupi selmupi - 53 + 15 selmupf selmupf - 54 - - - slewRateCtrl0 - slewRateCtrl0 - 55 - - - slewRateCtrl1 - slewRateCtrl1 - 56 - - - EO - EO - 57 - - - dataRate - dataRate - 58 - - - res1Sel - res1Sel - 59 - - - res2Sel - res2Sel - 60 - - - cap1Sel - cap1Sel - 61 - - - cap2Sel - cap2Sel - 62 + 16 midpointLargeThresKLane midpointLargeThresKLane - 63 + 17 midpointSmallThresKLane midpointSmallThresKLane - 64 + 18 midpointLargeThresCLane midpointLargeThresCLane - 65 + 19 midpointSmallThresCLane midpointSmallThresCLane - 66 + 20 + + + inxSumfMidpointAdatptiveEnLane + inxSumfMidpointAdatptiveEnLane + 21 dfeResF0aHighThresInitLane dfeResF0aHighThresInitLane - 67 + 22 dfeResF0aHighThresEndLane dfeResF0aHighThresEndLane - 68 - - - current1Sel - current1Sel - 69 - - - rl1Sel - rl1Sel - 70 + 23 - rl1Extra - rl1Extra - 71 - - - cl1Ctrl - cl1Ctrl - 72 - - - enMidFreq - enMidFreq - 73 - - - cs1Mid - cs1Mid - 74 - - - rs1Mid - rs1Mid - 75 - - - rfCtrl - rfCtrl - 76 - - - rl1TiaSel - rl1TiaSel - 77 - - - rl1TiaExtra - rl1TiaExtra - 78 - - - hpfRSel1st - hpfRSel1st - 79 - - - current1TiaSel - current1TiaSel - 80 - - - rl2Tune - rl2Tune - 81 - - - rl2Sel - rl2Sel - 82 + squelch + squelch + 24 - rs2Sel - rs2Sel - 83 + align90 + align90 + 25 - current2Sel - current2Sel - 84 + sampler + sampler + 26 - hpfRsel2nd - hpfRsel2nd - 85 + slewRateCtrl0 + slewRateCtrl0 + 27 - BW - BW - 86 + slewRateCtrl1 + slewRateCtrl1 + 28 - dfeGAIN - dfeGAIN - 87 + EO + EO + 29 - dfeGAIN2 - dfeGAIN2 - 88 + minCap1 + minCap1 + 30 - pre1 - pre1 - 89 + maxCap1 + maxCap1 + 31 - pre2 - pre2 - 90 + minRes1 + minRes1 + 32 - post1 - post1 - 91 + maxRes1 + maxRes1 + 33 boolean-type enumeration - Boolean 32 bits , due to bing endian + Boolean 32 bits , due to big endian false False @@ -764,33 +479,6 @@ 5 - - uint8-type - uint32 - Uint8 32 bits , due to bing endian - 0 - 255 - - - serdes-termination-type - enumeration - RX termination mode - - GND - Enabled - 0 - - - VDD - Disabled - 1 - - - FLOATING - RS FEC enabled - 2 - - port-interconnect-profile-type enumeration @@ -912,327 +600,381 @@ 0 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 1 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 2 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 3 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 4 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 5 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 6 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 7 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 8 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 9 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 10 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 11 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 12 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 13 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 14 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 15 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 16 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 17 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 18 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 19 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 20 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 21 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 22 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 23 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 24 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 25 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 26 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 27 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 28 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 29 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 30 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 31 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 32 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 33 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 34 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 35 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 36 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 37 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 38 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 39 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 40 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 41 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 42 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 43 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 44 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 45 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 46 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 47 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 48 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 49 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 50 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 51 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 52 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 53 - AVAGO + COMPHY_C28G profile_default 25GR1 + false diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.md5 b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.md5 index c043a0d7231f..a8cacfdd9823 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.md5 +++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.md5 @@ -1 +1 @@ -209426f8b550ddf85db19925f9f202a1 \ No newline at end of file +7e0317c4f0c86cc16929b1a143d90c32 \ No newline at end of file diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.xml b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.xml index 9e40492cfe8f..8ed10be62722 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.xml +++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.xml @@ -1,5 +1,5 @@ - + diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 index 41cd1629560b..cee8e830a24f 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 +++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 @@ -1 +1 @@ -fec8b7884a940c38451ef84be6fdbb24 \ No newline at end of file +feb884bbff293ba58dc7b1cae36aa1d1 \ No newline at end of file diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml index bbedd396d2b7..58298363c3e4 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml +++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml @@ -1,5 +1,5 @@ - + @@ -50,10 +50,20 @@ Router In Drop Counters track Route Black Hole Packets 1 + + + Feature-enable + enumeration + Feature Enabled/Disabled - IN_DROP_ANY - Router In Drop Counters track either TTL & Hop Limit Exceeded or Route Black Hole Packets - 2 + Disabled + Disabled + 0 + + + Enabled + Enabled + 1 @@ -442,14 +452,15 @@ 1024 - - 0 - - IN_DROP_ANY + 0 + ROUTE_BLACKHOLE SAI_LOG_SYSLOG + + Disabled + control-acl 3 diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 index 7b8c7b490de9..42941a1d23be 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 +++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 @@ -1 +1 @@ -69af36a9007f8c9e4d33ea6465cc6b89 \ No newline at end of file +1e32906bd09b43df35ce12534b2599c8 \ No newline at end of file diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml index 7fd11122c546..253c46780aaa 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml +++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml @@ -1,5 +1,5 @@ - + @@ -727,7 +727,6 @@ lowercase characters. 1 1 - 63 false @@ -746,7 +745,6 @@ lowercase characters. 0 1 - 63 false @@ -765,7 +763,6 @@ lowercase characters. 3 1 - 63 false @@ -784,7 +781,6 @@ lowercase characters. 2 1 - 63 false @@ -803,7 +799,6 @@ lowercase characters. 5 1 - 63 false @@ -822,7 +817,6 @@ lowercase characters. 4 1 - 63 false @@ -841,7 +835,6 @@ lowercase characters. 7 1 - 63 false @@ -860,7 +853,6 @@ lowercase characters. 6 1 - 63 false @@ -879,7 +871,6 @@ lowercase characters. 9 1 - 63 false @@ -898,7 +889,6 @@ lowercase characters. 8 1 - 63 false @@ -917,7 +907,6 @@ lowercase characters. 11 1 - 63 false @@ -936,7 +925,6 @@ lowercase characters. 10 1 - 63 false @@ -955,7 +943,6 @@ lowercase characters. 13 1 - 63 false @@ -974,7 +961,6 @@ lowercase characters. 12 1 - 63 false @@ -993,7 +979,6 @@ lowercase characters. 15 1 - 63 false @@ -1012,7 +997,6 @@ lowercase characters. 14 1 - 63 false @@ -1031,7 +1015,6 @@ lowercase characters. 17 1 - 63 false @@ -1050,7 +1033,6 @@ lowercase characters. 16 1 - 63 false @@ -1069,7 +1051,6 @@ lowercase characters. 19 1 - 63 false @@ -1088,7 +1069,6 @@ lowercase characters. 18 1 - 63 false @@ -1107,7 +1087,6 @@ lowercase characters. 21 1 - 63 false @@ -1126,7 +1105,6 @@ lowercase characters. 20 1 - 63 false @@ -1145,7 +1123,6 @@ lowercase characters. 23 1 - 63 false @@ -1164,7 +1141,6 @@ lowercase characters. 22 1 - 63 false @@ -1183,7 +1159,6 @@ lowercase characters. 25 1 - 63 false @@ -1202,7 +1177,6 @@ lowercase characters. 24 1 - 63 false @@ -1221,7 +1195,6 @@ lowercase characters. 27 1 - 63 false @@ -1240,7 +1213,6 @@ lowercase characters. 26 1 - 63 false @@ -1259,7 +1231,6 @@ lowercase characters. 29 1 - 63 false @@ -1278,7 +1249,6 @@ lowercase characters. 28 1 - 63 false @@ -1297,7 +1267,6 @@ lowercase characters. 31 1 - 63 false @@ -1316,7 +1285,6 @@ lowercase characters. 30 1 - 63 false @@ -1335,7 +1303,6 @@ lowercase characters. 1 0 - 63 false @@ -1354,7 +1321,6 @@ lowercase characters. 14 0 - 63 false @@ -1373,7 +1339,6 @@ lowercase characters. 15 0 - 63 false @@ -1392,7 +1357,6 @@ lowercase characters. 12 0 - 63 false @@ -1411,7 +1375,6 @@ lowercase characters. 13 0 - 63 false @@ -1430,7 +1393,6 @@ lowercase characters. 10 0 - 63 false @@ -1449,7 +1411,6 @@ lowercase characters. 11 0 - 63 false @@ -1468,7 +1429,6 @@ lowercase characters. 8 0 - 63 false @@ -1487,7 +1447,6 @@ lowercase characters. 9 0 - 63 false @@ -1506,7 +1465,6 @@ lowercase characters. 6 0 - 63 false @@ -1525,7 +1483,6 @@ lowercase characters. 7 0 - 63 false @@ -1544,7 +1501,6 @@ lowercase characters. 4 0 - 63 false @@ -1563,7 +1519,6 @@ lowercase characters. 5 0 - 63 false @@ -1582,7 +1537,6 @@ lowercase characters. 2 0 - 63 false @@ -1601,7 +1555,6 @@ lowercase characters. 3 0 - 63 false @@ -1620,7 +1573,6 @@ lowercase characters. 0 0 - 63 false @@ -1636,7 +1588,6 @@ lowercase characters. NA - 0 @@ -1656,7 +1607,6 @@ lowercase characters. NA - 1 @@ -1676,7 +1626,6 @@ lowercase characters. NA - 0 @@ -1696,7 +1645,6 @@ lowercase characters. NA - 1 @@ -1716,7 +1664,6 @@ lowercase characters. NA - 2 @@ -1736,7 +1683,6 @@ lowercase characters. NA - 3 @@ -1810,6 +1756,53 @@ lowercase characters. + + + alaska-88E1780 + + 16 + 3 + 23 + 65280 + + + 1 + 28 + 1024 + 64511 + + + + alaska-88E2580 + + 61472 + 31 + 168 + 57351 + + + 61473 + 31 + 296 + 57351 + + + + alaska-88E2540 + + 61472 + 31 + 168 + 57351 + + + 61473 + 31 + 296 + 57351 + + + . 1 diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 index f2cf3d5b688e..e4baf309b51c 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 +++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 @@ -1 +1 @@ -85b49bcb9d399bcd1b8128a42caba2d2 \ No newline at end of file +fcd5642435f602883aab5c9672e96aa5 \ No newline at end of file diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml index 980d4267b1bb..78460a4e0a9e 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml +++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml @@ -1,5 +1,5 @@ - + @@ -239,8 +239,8 @@ enumeration Tx parameter type - atten - atten + pre + pre 0 @@ -248,75 +248,10 @@ post 1 - - pre - pre - 2 - - - pre2 - pre2 - 3 - - - pre3 - pre3 - 4 - peak peak - 5 - - - main - main - 6 - - - txAmpAdjEn - txAmpAdjEn - 7 - - - emph0 - emph0 - 8 - - - emph1 - emph1 - 9 - - - txAmpShft - txAmpShft - 10 - - - txEmphEn - txEmphEn - 11 - - - txEmphEn1 - txEmphEn1 - 12 - - - txAmpAdj - txAmpAdj - 13 - - - slewCtrlEn - slewCtrlEn - 14 - - - slewRate - slewRate - 15 + 2 @@ -324,400 +259,180 @@ enumeration Rx parameter type - sqlch - sqlch + dataRate + dataRate 0 - DC - DC + res1Sel + res1Sel 1 - LF - LF + res2Sel + res2Sel 2 - HF - HF + cap1Sel + cap1Sel 3 - gainShape1 - gainShape1 + cap2Sel + cap2Sel 4 - gainShape2 - gainShape2 + minCap + minCap 5 - shortChannelEn - shortChannelEn + minCapN + minCapN + 6 + + + sumfBoostTargetC0 + sumfBoostTargetC0 7 - bfLf - bfLf + sumfBoostTargetC1 + sumfBoostTargetC1 8 - bfHf - bfHf + sumfBoostTargetC2 + sumfBoostTargetC2 9 - minLf - minLf + midpointPhaseOs0 + midpointPhaseOs0 10 - maxLf - maxLf + midpointPhaseOs1 + midpointPhaseOs1 11 - minHf - minHf + midpointPhaseOs2 + midpointPhaseOs2 12 - - maxHf - maxHf - 13 - - - minPre1 - minPre1 - 14 - - - maxPre1 - maxPre1 - 15 - - - minPre2 - minPre2 - 16 - - - maxPre2 - - 17 - - - minPost - minPost - 18 - - - maxPost - maxPost - 19 - - - squelch - squelch - 20 - - - termination - termination - 27 - - - coldEnvelope - coldEnvelope - 35 - - - hotEnvelope - hotEnvelope - 36 - - - dcGain - dcGain - 37 - - - bandWidth - bandWidth - 38 - - - dfe - dfe - 39 - - - ffeR - ffeR - 40 - - - ffeC - ffeC - 41 - - - sampler - sampler - 42 - - - align90 - align90 - 43 - - - ffeS - ffeS - 44 - - - resSel - resSel - 45 - - - resShift - resShift - 46 - - - capSel - capSel - 47 - - - ffeSettingForce - ffeSettingForce - 48 - - - adaptedResSel - adaptedResSel - 49 - - - adaptedCapSel - adaptedCapSel - 50 - selmufi selmufi - 51 + 13 selmuff selmuff - 52 + 14 selmupi selmupi - 53 + 15 selmupf selmupf - 54 - - - slewRateCtrl0 - slewRateCtrl0 - 55 - - - slewRateCtrl1 - slewRateCtrl1 - 56 - - - EO - EO - 57 - - - dataRate - dataRate - 58 - - - res1Sel - res1Sel - 59 - - - res2Sel - res2Sel - 60 - - - cap1Sel - cap1Sel - 61 - - - cap2Sel - cap2Sel - 62 + 16 midpointLargeThresKLane midpointLargeThresKLane - 63 + 17 midpointSmallThresKLane midpointSmallThresKLane - 64 + 18 midpointLargeThresCLane midpointLargeThresCLane - 65 + 19 midpointSmallThresCLane midpointSmallThresCLane - 66 + 20 + + + inxSumfMidpointAdatptiveEnLane + inxSumfMidpointAdatptiveEnLane + 21 dfeResF0aHighThresInitLane dfeResF0aHighThresInitLane - 67 + 22 dfeResF0aHighThresEndLane dfeResF0aHighThresEndLane - 68 - - - current1Sel - current1Sel - 69 - - - rl1Sel - rl1Sel - 70 + 23 - rl1Extra - rl1Extra - 71 - - - cl1Ctrl - cl1Ctrl - 72 - - - enMidFreq - enMidFreq - 73 - - - cs1Mid - cs1Mid - 74 - - - rs1Mid - rs1Mid - 75 - - - rfCtrl - rfCtrl - 76 - - - rl1TiaSel - rl1TiaSel - 77 - - - rl1TiaExtra - rl1TiaExtra - 78 - - - hpfRSel1st - hpfRSel1st - 79 - - - current1TiaSel - current1TiaSel - 80 - - - rl2Tune - rl2Tune - 81 - - - rl2Sel - rl2Sel - 82 + squelch + squelch + 24 - rs2Sel - rs2Sel - 83 + align90 + align90 + 25 - current2Sel - current2Sel - 84 + sampler + sampler + 26 - hpfRsel2nd - hpfRsel2nd - 85 + slewRateCtrl0 + slewRateCtrl0 + 27 - BW - BW - 86 + slewRateCtrl1 + slewRateCtrl1 + 28 - dfeGAIN - dfeGAIN - 87 + EO + EO + 29 - dfeGAIN2 - dfeGAIN2 - 88 + minCap1 + minCap1 + 30 - pre1 - pre1 - 89 + maxCap1 + maxCap1 + 31 - pre2 - pre2 - 90 + minRes1 + minRes1 + 32 - post1 - post1 - 91 + maxRes1 + maxRes1 + 33 boolean-type enumeration - Boolean 32 bits , due to bing endian + Boolean 32 bits , due to big endian false False @@ -764,33 +479,6 @@ 5 - - uint8-type - uint32 - Uint8 32 bits , due to bing endian - 0 - 255 - - - serdes-termination-type - enumeration - RX termination mode - - GND - Enabled - 0 - - - VDD - Disabled - 1 - - - FLOATING - RS FEC enabled - 2 - - port-interconnect-profile-type enumeration @@ -912,327 +600,381 @@ 0 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 1 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 2 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 3 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 4 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 5 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 6 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 7 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 8 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 9 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 10 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 11 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 12 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 13 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 14 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 15 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 16 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 17 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 18 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 19 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 20 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 21 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 22 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 23 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 24 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 25 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 26 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 27 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 28 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 29 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 30 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 31 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 32 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 33 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 34 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 35 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 36 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 37 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 38 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 39 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 40 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 41 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 42 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 43 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 44 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 45 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 46 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 47 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 48 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 49 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 50 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 51 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 52 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 53 - AVAGO + COMPHY_C28G profile_default 25GR1 + false diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5 b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5 index c043a0d7231f..a8cacfdd9823 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5 +++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5 @@ -1 +1 @@ -209426f8b550ddf85db19925f9f202a1 \ No newline at end of file +7e0317c4f0c86cc16929b1a143d90c32 \ No newline at end of file diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml index 9e40492cfe8f..8ed10be62722 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml +++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml @@ -1,5 +1,5 @@ - + diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 index 41cd1629560b..cee8e830a24f 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 +++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 @@ -1 +1 @@ -fec8b7884a940c38451ef84be6fdbb24 \ No newline at end of file +feb884bbff293ba58dc7b1cae36aa1d1 \ No newline at end of file diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml index bbedd396d2b7..58298363c3e4 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml +++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml @@ -1,5 +1,5 @@ - + @@ -50,10 +50,20 @@ Router In Drop Counters track Route Black Hole Packets 1 + + + Feature-enable + enumeration + Feature Enabled/Disabled - IN_DROP_ANY - Router In Drop Counters track either TTL & Hop Limit Exceeded or Route Black Hole Packets - 2 + Disabled + Disabled + 0 + + + Enabled + Enabled + 1 @@ -442,14 +452,15 @@ 1024 - - 0 - - IN_DROP_ANY + 0 + ROUTE_BLACKHOLE SAI_LOG_SYSLOG + + Disabled + control-acl 3 diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json index 983325f1e733..73f011e29d71 100644 --- a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json @@ -26,7 +26,10 @@ }, "MSN2700-A1": { "default": { - "bus": [], + "bus": [ + "i2c-10", + "i2c-1-mux (chan_id 10)" + ], "chip": { "dps460-i2c-*-58": ["2", "R"], "dps460-i2c-*-59": ["1", "L"] @@ -363,7 +366,7 @@ "MTEF-AC-G-ACBEL": { "label": [ "in1 PSU 220V Rail (in)", - "in3 PSU 12V Rail (out)", + "in2 PSU 12V Rail (out)", "fan1 PSU Fan 1", "temp1 PSU Temp 1", "temp2 PSU Temp 2", diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater index a548d7f985d8..1c60a574085c 100644 --- a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater @@ -55,11 +55,11 @@ function update_psu_sensors_configuration() { # keep looking for the rest psus continue else - if [ "$psu" == "MTEF-PSF-AC-G" ]; then + psu=$(echo "$psu" | sed -r 's/-PSR|-PSF//g') + if [ "$psu" == "MTEF-AC-G" ]; then vendor=$(cat /var/run/hw-management/eeprom/psu${number}_vpd | grep "MFR_NAME:" | cut -d ' ' -f 2 2>&1) psu="${psu}-${vendor}" fi - psu=$(echo "$psu" | sed -r 's/-PSR|-PSF//g') echo " chip \""$chip"\"" >> $SENSORS_CONFIG_FILE mapfile -t opers < <(jq -r --arg psu "$psu" '.psu[$psu] | keys[]' $PSU_SENSORS_CONFIG) diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf deleted file mode 120000 index 955db12ff425..000000000000 --- a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf +++ /dev/null @@ -1 +0,0 @@ -../x86_64-mlnx_msn2700-r0/installer.conf \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf new file mode 100644 index 000000000000..c46f0eb7a459 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf @@ -0,0 +1 @@ +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq" diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf index 495627c1b389..286685a46c47 100644 --- a/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf +++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf @@ -174,27 +174,27 @@ chip "xdpe15284-i2c-*-61" ignore curr3 # Power supplies -chip "dps460-i2c-*-58" - label in1 "PSU-2(R) 220V Rail (in)" - label in2 "PSU-2(R) 12V Rail (out)" - label fan1 "PSU-2(R) Fan 1" - label temp1 "PSU-2(R) Temp 1" - label temp2 "PSU-2(R) Temp 2" - label power1 "PSU-2(R) 220V Rail Pwr (in)" - label power2 "PSU-2(R) 12V Rail Pwr (out)" - label curr1 "PSU-2(R) 220V Rail Curr (in)" - label curr2 "PSU-2(R) 12V Rail Curr (out)" - -chip "dps460-i2c-*-59" - label in1 "PSU-1(L) 220V Rail (in)" - label in2 "PSU-1(L) 12V Rail (out)" - label fan1 "PSU-1(L) Fan 1" - label temp1 "PSU-1(L) Temp 1" - label temp2 "PSU-1(L) Temp 2" - label power1 "PSU-1(L) 220V Rail Pwr (in)" - label power2 "PSU-1(L) 12V Rail Pwr (out)" - label curr1 "PSU-1(L) 220V Rail Curr (in)" - label curr2 "PSU-1(L) 12V Rail Curr (out)" +bus "i2c-10" "i2c-1-mux (chan_id 1)" + chip "dps460-i2c-*-58" + label in1 "PSU-2(R) 220V Rail (in)" + label in2 "PSU-2(R) 12V Rail (out)" + label fan1 "PSU-2(R) Fan 1" + label temp1 "PSU-2(R) Temp 1" + label temp2 "PSU-2(R) Temp 2" + label power1 "PSU-2(R) 220V Rail Pwr (in)" + label power2 "PSU-2(R) 12V Rail Pwr (out)" + label curr1 "PSU-2(R) 220V Rail Curr (in)" + label curr2 "PSU-2(R) 12V Rail Curr (out)" + chip "dps460-i2c-*-59" + label in1 "PSU-1(L) 220V Rail (in)" + label in2 "PSU-1(L) 12V Rail (out)" + label fan1 "PSU-1(L) Fan 1" + label temp1 "PSU-1(L) Temp 1" + label temp2 "PSU-1(L) Temp 2" + label power1 "PSU-1(L) 220V Rail Pwr (in)" + label power2 "PSU-1(L) 12V Rail Pwr (out)" + label curr1 "PSU-1(L) 220V Rail Curr (in)" + label curr2 "PSU-1(L) 12V Rail Curr (out)" # Chassis fans chip "mlxreg_fan-isa-*" diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2 index b3bc96fb83c3..8e736843dcfe 100644 --- a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2 +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2 @@ -277,4 +277,24 @@ {% endif %} +{%- macro generate_wred_profiles() %} + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable" : "true", + "wred_yellow_enable" : "true", + "wred_red_enable" : "true", + "ecn" : "ecn_all", + "green_max_threshold" : "10000000", + "green_min_threshold" : "2000000", + "yellow_max_threshold" : "10000000", + "yellow_min_threshold" : "2000000", + "red_max_threshold" : "10000000", + "red_min_threshold" : "2000000", + "green_drop_probability" : "5", + "yellow_drop_probability": "5", + "red_drop_probability" : "5" + } + }, +{%- endmacro %} + {%- include 'qos_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers.json.j2 new file mode 120000 index 000000000000..117d740b0f5b --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers.json.j2 @@ -0,0 +1 @@ +../ACS-MSN4600C/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_objects.j2 new file mode 120000 index 000000000000..c01aebb7ae12 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..c9f4597a6727 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t0.j2 @@ -0,0 +1,39 @@ +{# + Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '2m' %} +{% set ingress_lossless_pool_size = '57176064' %} +{% set ingress_lossless_pool_xoff = '1099776' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '57176064' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..1b3b9c50d354 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t1.j2 @@ -0,0 +1,39 @@ +{# + Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '40m' %} +{% set ingress_lossless_pool_size = '57099264' %} +{% set ingress_lossless_pool_xoff = '1176576' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '57099264' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_dynamic.json.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_dynamic.json.j2 new file mode 120000 index 000000000000..8c4117c66214 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_dynamic.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/hwsku.json b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/hwsku.json new file mode 100644 index 000000000000..839ad08f5257 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/hwsku.json @@ -0,0 +1,308 @@ +{ + "interfaces": { + "Ethernet0":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet4":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet8":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet12":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet16":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet20":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet24":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet28":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet32":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "1" + }, + "Ethernet34":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "2" + }, + "Ethernet36":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "1" + }, + "Ethernet38":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "2" + }, + "Ethernet40":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "1" + }, + "Ethernet42":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "2" + }, + "Ethernet44":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "1" + }, + "Ethernet46":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "2" + }, + "Ethernet48":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet52":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet56":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet60":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet64":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet68":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet72":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet76":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet80":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet84":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet88":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet92":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet96":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet100":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet104":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "1" + }, + "Ethernet106":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "2" + }, + "Ethernet108":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "1" + }, + "Ethernet110":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "2" + }, + "Ethernet112":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet116":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet120":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet124":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet128":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet132":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet136":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet140":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet144":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet148":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet152":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet156":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet160":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet164":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet168":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet172":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet176":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "1" + }, + "Ethernet178":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "2" + }, + "Ethernet180":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "1" + }, + "Ethernet182":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "2" + }, + "Ethernet184":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "1" + }, + "Ethernet186":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "2" + }, + "Ethernet188":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "1" + }, + "Ethernet190":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "2" + }, + "Ethernet192":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet196":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet200":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet204":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet208":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet212":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet216":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet220":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet224":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet228":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet232":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet236":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet240":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "1" + }, + "Ethernet242":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "2" + }, + "Ethernet244":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "1" + }, + "Ethernet246":{ + "default_brkout_mode": "2x50G[25G,10G,1G]", + "subport": "2" + }, + "Ethernet248":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + }, + "Ethernet252":{ + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", + "subport": "0" + } + } +} diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/pg_profile_lookup.ini new file mode 100644 index 000000000000..7523a8d4dea0 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/pg_profile_lookup.ini @@ -0,0 +1,44 @@ +## +## Copyright (c) 2019-2021 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + +# PG lossless profiles +# speed cable size xon xoff threshold + 10000 2m 19456 19456 18432 0 + 25000 2m 19456 19456 19456 0 + 40000 2m 19456 19456 21504 0 + 50000 2m 19456 19456 23552 0 + 100000 2m 19456 19456 41984 0 + 10000 5m 19456 19456 18432 0 + 25000 5m 19456 19456 19456 0 + 40000 5m 19456 19456 21504 0 + 50000 5m 19456 19456 24576 0 + 100000 5m 19456 19456 43008 0 + 10000 40m 19456 19456 18432 0 + 25000 40m 19456 19456 20480 0 + 40000 40m 19456 19456 23552 0 + 50000 40m 19456 19456 26624 0 + 100000 40m 19456 19456 48128 0 + 10000 300m 19456 19456 22528 0 + 25000 300m 19456 19456 29696 0 + 40000 300m 19456 19456 38912 0 + 50000 300m 19456 19456 45056 0 + 100000 300m 19456 19456 84992 0 + 10000 2000m 19456 19456 47104 0 + 25000 2000m 19456 19456 91136 0 + 40000 2000m 19456 19456 137216 0 + 50000 2000m 19456 19456 168960 0 + 100000 2000m 19456 19456 331776 0 diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/port_config.ini b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/port_config.ini new file mode 100644 index 000000000000..cd067d6da16f --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/port_config.ini @@ -0,0 +1,94 @@ +## +## Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + +# name lanes alias index speed +Ethernet0 0,1,2,3 etp1 1 100000 +Ethernet4 8,9,10,11 etp2 2 100000 +Ethernet8 16,17,18,19 etp3 3 100000 +Ethernet12 24,25,26,27 etp4 4 100000 +Ethernet16 32,33,34,35 etp5 5 100000 +Ethernet20 40,41,42,43 etp6 6 100000 +Ethernet24 48,49,50,51 etp7 7 100000 +Ethernet28 56,57,58,59 etp8 8 100000 +Ethernet32 64,65 etp9a 9 50000 +Ethernet34 66,67 etp9b 9 50000 +Ethernet36 72,73 etp10a 10 50000 +Ethernet38 74,75 etp10b 10 50000 +Ethernet40 80,81 etp11a 11 50000 +Ethernet42 82,83 etp11b 11 50000 +Ethernet44 88,89 etp12a 12 50000 +Ethernet46 90,91 etp12b 12 50000 +Ethernet48 96,97,98,99 etp13 13 100000 +Ethernet52 104,105,106,107 etp14 14 100000 +Ethernet56 112,113,114,115 etp15 15 100000 +Ethernet60 120,121,122,123 etp16 16 100000 +Ethernet64 128,129,130,131 etp17 17 100000 +Ethernet68 136,137,138,139 etp18 18 100000 +Ethernet72 144,145,146,147 etp19 19 100000 +Ethernet76 152,153,154,155 etp20 20 100000 +Ethernet80 160,161,162,163 etp21 21 100000 +Ethernet84 168,169,170,171 etp22 22 100000 +Ethernet88 176,177,178,179 etp23 23 100000 +Ethernet92 184,185,186,187 etp24 24 100000 +Ethernet96 192,193,194,195 etp25 25 100000 +Ethernet100 200,201,202,203 etp26 26 100000 +Ethernet104 208,209 etp27a 27 50000 +Ethernet106 210,211 etp27b 27 50000 +Ethernet108 216,217 etp28a 28 50000 +Ethernet110 218,219 etp28b 28 50000 +Ethernet112 224,225,226,227 etp29 29 100000 +Ethernet116 232,233,234,235 etp30 30 100000 +Ethernet120 240,241,242,243 etp31 31 100000 +Ethernet124 248,249,250,251 etp32 32 100000 +Ethernet128 256,257,258,259 etp33 33 100000 +Ethernet132 264,265,266,267 etp34 34 100000 +Ethernet136 272,273,274,275 etp35 35 100000 +Ethernet140 280,281,282,283 etp36 36 100000 +Ethernet144 288,289,290,291 etp37 37 100000 +Ethernet148 296,297,298,299 etp38 38 100000 +Ethernet152 304,305,306,307 etp39 39 100000 +Ethernet156 312,313,314,315 etp40 40 100000 +Ethernet160 320,321,322,323 etp41 41 100000 +Ethernet164 328,329,330,331 etp42 42 100000 +Ethernet168 336,337,338,339 etp43 43 100000 +Ethernet172 344,345,346,347 etp44 44 100000 +Ethernet176 352,353 etp45a 45 50000 +Ethernet178 354,355 etp45b 45 50000 +Ethernet180 360,361 etp46a 46 50000 +Ethernet182 362,363 etp46b 46 50000 +Ethernet184 368,369 etp47a 47 50000 +Ethernet186 370,371 etp47b 47 50000 +Ethernet188 376,377 etp48a 48 50000 +Ethernet190 378,379 etp48b 48 50000 +Ethernet192 384,385,386,387 etp49 49 100000 +Ethernet196 392,393,394,395 etp50 50 100000 +Ethernet200 400,401,402,403 etp51 51 100000 +Ethernet204 408,409,410,411 etp52 52 100000 +Ethernet208 416,417,418,419 etp53 53 100000 +Ethernet212 424,425,426,427 etp54 54 100000 +Ethernet216 432,433,434,435 etp55 55 100000 +Ethernet220 440,441,442,443 etp56 56 100000 +Ethernet224 448,449,450,451 etp57 57 100000 +Ethernet228 456,457,458,459 etp58 58 100000 +Ethernet232 464,465,466,467 etp59 59 100000 +Ethernet236 472,473,474,475 etp60 60 100000 +Ethernet240 480,481 etp61a 61 50000 +Ethernet242 482,483 etp61b 61 50000 +Ethernet244 488,489 etp62a 62 50000 +Ethernet246 490,491 etp62b 62 50000 +Ethernet248 496,497,498,499 etp63 63 100000 +Ethernet252 504,505,506,507 etp64 64 100000 diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/qos.json.j2 new file mode 120000 index 000000000000..05394016a129 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/qos.json.j2 @@ -0,0 +1 @@ +../ACS-MSN4600C/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai.profile b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai.profile new file mode 100644 index 000000000000..2bde3a0748a6 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4600c_24x50g_52x100g.xml diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai_4600c_24x50g_52x100g.xml b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai_4600c_24x50g_52x100g.xml new file mode 100644 index 000000000000..b069da68bc82 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai_4600c_24x50g_52x100g.xml @@ -0,0 +1,501 @@ + + + + + + + 00:02:03:04:05:80 + + + 1 + + + 64 + + + 1 + + + + + 105 + 4 + 0 + + + 3 + + + 1536 + + + 107 + 4 + 1 + 3 + 1536 + + + 109 + 4 + 2 + 3 + 1536 + + + 111 + 4 + 3 + 3 + 1536 + + + 97 + 4 + 4 + 3 + 1536 + + + 99 + 4 + 5 + 3 + 1536 + + + 101 + 4 + 6 + 3 + 1536 + + + 103 + 4 + 7 + 3 + 1536 + + + 121 + 2 + 4 + 8 + 3 + 384 + + + 123 + 2 + 4 + 9 + 3 + 384 + + + 125 + 2 + 4 + 10 + 3 + 384 + + + 127 + 2 + 4 + 11 + 3 + 384 + + + 113 + 4 + 12 + 3 + 1536 + + + 115 + 4 + 13 + 3 + 1536 + + + 117 + 4 + 14 + 3 + 1536 + + + 119 + 4 + 15 + 3 + 1536 + + + 89 + 4 + 16 + 3 + 1536 + + + 91 + 4 + 17 + 3 + 1536 + + + 93 + 4 + 18 + 3 + 1536 + + + 95 + 4 + 19 + 3 + 1536 + + + 81 + 4 + 20 + 3 + 1536 + + + 83 + 4 + 21 + 3 + 1536 + + + 85 + 4 + 22 + 3 + 1536 + + + 87 + 4 + 23 + 3 + 1536 + + + 73 + 4 + 24 + 3 + 1536 + + + 75 + 4 + 25 + 3 + 1536 + + + 77 + 2 + 4 + 26 + 3 + 384 + + + 79 + 2 + 4 + 27 + 3 + 384 + + + 65 + 4 + 28 + 3 + 1536 + + + 67 + 4 + 29 + 3 + 1536 + + + 69 + 4 + 30 + 3 + 1536 + + + 71 + 4 + 31 + 3 + 1536 + + + 5 + 4 + 32 + 3 + 1536 + + + 7 + 4 + 33 + 3 + 1536 + + + 1 + 4 + 34 + 3 + 1536 + + + 3 + 4 + 35 + 3 + 1536 + + + 13 + 4 + 36 + 3 + 1536 + + + 15 + 4 + 37 + 3 + 1536 + + + 9 + 4 + 38 + 3 + 1536 + + + 11 + 4 + 39 + 3 + 1536 + + + 21 + 4 + 40 + 3 + 1536 + + + 23 + 4 + 41 + 3 + 1536 + + + 17 + 4 + 42 + 3 + 1536 + + + 19 + 4 + 43 + 3 + 1536 + + + 29 + 2 + 4 + 44 + 3 + 384 + + + 31 + 2 + 4 + 45 + 3 + 384 + + + 25 + 2 + 4 + 46 + 3 + 384 + + + 27 + 2 + 4 + 47 + 3 + 384 + + + 53 + 4 + 48 + 3 + 1536 + + + 55 + 4 + 49 + 3 + 1536 + + + 49 + 4 + 50 + 3 + 1536 + + + 51 + 4 + 51 + 3 + 1536 + + + 61 + 4 + 52 + 3 + 1536 + + + 63 + 4 + 53 + 3 + 1536 + + + 57 + 4 + 54 + 3 + 1536 + + + 59 + 4 + 55 + 3 + 1536 + + + 37 + 4 + 56 + 3 + 1536 + + + 39 + 4 + 57 + 3 + 1536 + + + 33 + 4 + 58 + 3 + 1536 + + + 35 + 4 + 59 + 3 + 1536 + + + 45 + 2 + 4 + 60 + 3 + 384 + + + 47 + 2 + 4 + 61 + 3 + 384 + + + 41 + 4 + 62 + 3 + 1536 + + + 43 + 4 + 63 + 3 + 1536 + + + + diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2 index ebce770ec0a0..7ab8d157343f 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2 +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2 @@ -12,10 +12,17 @@ limitations under the License. #} {% set default_cable = '5m' %} +{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%} +{% set ingress_lossless_pool_size = '49381376' %} +{% set ingress_lossless_pool_xoff = '5210112' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '49381376' %} +{%- else -%} {% set ingress_lossless_pool_size = '51806208' %} {% set ingress_lossless_pool_xoff = '3407872' %} {% set egress_lossless_pool_size = '60817392' %} {% set egress_lossy_pool_size = '51806208' %} +{%- endif -%} {% import 'buffers_defaults_objects.j2' as defs with context %} @@ -27,10 +34,18 @@ {{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} {%- endmacro %} +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + {%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} {{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} {%- endmacro %} +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + {%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} {{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} {%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2 index 9d6fe3da03d1..d30bedeace97 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2 +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2 @@ -12,11 +12,17 @@ limitations under the License. #} {% set default_cable = '40m' %} +{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%} +{% set ingress_lossless_pool_size = '38256640' %} +{% set ingress_lossless_pool_xoff = '15089664' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '38256640' %} +{%- else -%} {% set ingress_lossless_pool_size = '45531136' %} {% set ingress_lossless_pool_xoff = '9682944' %} {% set egress_lossless_pool_size = '60817392' %} {% set egress_lossy_pool_size = '45531136' %} - +{%- endif -%} {% import 'buffers_defaults_objects.j2' as defs with context %} @@ -28,10 +34,18 @@ {{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} {%- endmacro %} +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + {%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} {{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} {%- endmacro %} +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + {%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} {{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} {%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2 index eccf286dc879..48221aa2b3de 120000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2 +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2 @@ -1 +1 @@ -../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file +../../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t0.j2 index a4aa03be88a1..4caa1ca8f699 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t0.j2 +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t0.j2 @@ -1,5 +1,5 @@ {# - Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. + Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. Apache-2.0 Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -12,10 +12,17 @@ limitations under the License. #} {% set default_cable = '5m' %} -{% set ingress_lossless_pool_size = '44433408' %} -{% set ingress_lossless_pool_xoff = '9576448' %} +{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%} +{% set ingress_lossless_pool_size = '50397184' %} +{% set ingress_lossless_pool_xoff = '2990080' %} {% set egress_lossless_pool_size = '60817392' %} -{% set egress_lossy_pool_size = '44433408' %} +{% set egress_lossy_pool_size = '50397184' %} +{%- else -%} +{% set ingress_lossless_pool_size = '51748864' %} +{% set ingress_lossless_pool_xoff = '2260992' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '51748864' %} +{%- endif -%} {% import 'buffers_defaults_objects.j2' as defs with context %} @@ -23,10 +30,18 @@ {{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} {%- endmacro %} +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + {%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} {{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} {%- endmacro %} +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + {%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} {{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} {%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t1.j2 index 40048d03eaa8..0cb2d6fc6b6b 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t1.j2 +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t1.j2 @@ -1,5 +1,5 @@ {# - Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. + Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. Apache-2.0 Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -12,10 +12,17 @@ limitations under the License. #} {% set default_cable = '300m' %} -{% set ingress_lossless_pool_size = '44089344' %} -{% set ingress_lossless_pool_xoff = '9920512' %} +{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%} +{% set ingress_lossless_pool_size = '43859968' %} +{% set ingress_lossless_pool_xoff = '8282112' %} {% set egress_lossless_pool_size = '60817392' %} -{% set egress_lossy_pool_size = '44089344' %} +{% set egress_lossy_pool_size = '43859968' %} +{%- else -%} +{% set ingress_lossless_pool_size = '47792128' %} +{% set ingress_lossless_pool_xoff = '6217728 ' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '47792128 ' %} +{%- endif -%} {% import 'buffers_defaults_objects.j2' as defs with context %} @@ -27,10 +34,18 @@ {{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} {%- endmacro %} +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + {%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} {{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} {%- endmacro %} +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + {%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} {{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} {%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini deleted file mode 120000 index 66cab04d2c42..000000000000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini +++ /dev/null @@ -1 +0,0 @@ -../Mellanox-SN4700-C128/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini new file mode 100644 index 000000000000..9fbb8eacf9ca --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini @@ -0,0 +1,53 @@ +## +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 19456 19456 16384 0 + 25000 5m 19456 19456 17408 0 + 40000 5m 19456 19456 19456 0 + 50000 5m 19456 19456 21504 0 + 100000 5m 19456 19456 37888 0 + 200000 5m 19456 19456 43008 0 + 400000 5m 38912 38912 73728 0 + 10000 40m 19456 19456 16384 0 + 25000 40m 19456 19456 18432 0 + 40000 40m 19456 19456 21504 0 + 50000 40m 19456 19456 23552 0 + 100000 40m 19456 19456 43008 0 + 200000 40m 19456 19456 51200 0 + 400000 40m 38912 38912 91136 0 + 10000 300m 19456 19456 19456 0 + 25000 300m 19456 19456 26624 0 + 40000 300m 19456 19456 34816 0 + 50000 300m 19456 19456 40960 0 + 100000 300m 19456 19456 75776 0 + 200000 300m 19456 19456 118784 0 + 400000 300m 38912 38912 225280 0 + 10000 1500m 19456 19456 35840 0 + 25000 1500m 19456 19456 65536 0 + 40000 1500m 19456 19456 96256 0 + 50000 1500m 19456 19456 117760 0 + 100000 1500m 19456 19456 230400 0 + 200000 1500m 19456 19456 427008 0 + 400000 1500m 38912 38912 427008 0 + 10000 2000m 19456 19456 41984 0 + 25000 2000m 19456 19456 80896 0 + 40000 2000m 19456 19456 121856 0 + 50000 2000m 19456 19456 149504 0 + 100000 2000m 19456 19456 293888 0 + 200000 2000m 19456 19456 555008 0 + 400000 2000m 38912 38912 555008 0 diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/qos.json.j2 index eccf286dc879..48221aa2b3de 120000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/qos.json.j2 +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/qos.json.j2 @@ -1 +1 @@ -../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file +../../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json deleted file mode 100644 index 372b1cb2861c..000000000000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json +++ /dev/null @@ -1,506 +0,0 @@ -{ - "GLOBAL_MEDIA_SETTINGS": { - "1-32": { - "QSFP-DD-sm_media_interface": { - "speed:400GAUI-8": { - "idriver": { - "lane0": "0x0000003c", - "lane1": "0x0000003c", - "lane2": "0x0000003c", - "lane3": "0x0000003c", - "lane4": "0x0000003c", - "lane5": "0x0000003c", - "lane6": "0x0000003c", - "lane7": "0x0000003c" - }, - "pre1": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "main": { - "lane0": "0x00000020", - "lane1": "0x00000020", - "lane2": "0x00000020", - "lane3": "0x00000020", - "lane4": "0x00000020", - "lane5": "0x00000020", - "lane6": "0x00000020", - "lane7": "0x00000020" - }, - "post1": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "ob_m2lp": { - "lane0": "0x00000004", - "lane1": "0x00000004", - "lane2": "0x00000004", - "lane3": "0x00000004", - "lane4": "0x00000004", - "lane5": "0x00000004", - "lane6": "0x00000004", - "lane7": "0x00000004" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f", - "lane2": "0x0000000f", - "lane3": "0x0000000f", - "lane4": "0x0000000f", - "lane5": "0x0000000f", - "lane6": "0x0000000f", - "lane7": "0x0000000f" - }, - "obplev": { - "lane0": "0x00000069", - "lane1": "0x00000069", - "lane2": "0x00000069", - "lane3": "0x00000069", - "lane4": "0x00000069", - "lane5": "0x00000069", - "lane6": "0x00000069", - "lane7": "0x00000069" - }, - "obnlev": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "regn_bfm1p": { - "lane0": "0x0000001e", - "lane1": "0x0000001e", - "lane2": "0x0000001e", - "lane3": "0x0000001e", - "lane4": "0x0000001e", - "lane5": "0x0000001e", - "lane6": "0x0000001e", - "lane7": "0x0000001e" - }, - "regn_bfm1n": { - "lane0": "0x000000aa", - "lane1": "0x000000aa", - "lane2": "0x000000aa", - "lane3": "0x000000aa", - "lane4": "0x000000aa", - "lane5": "0x000000aa", - "lane6": "0x000000aa", - "lane7": "0x000000aa" - } - }, - "speed:100GAUI-2": { - "idriver": { - "lane0": "0x0000003c", - "lane1": "0x0000003c" - }, - "pre1": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000" - }, - "main": { - "lane0": "0x00000020", - "lane1": "0x00000020" - }, - "post1": { - "lane0": "0x00000006", - "lane1": "0x00000006" - }, - "ob_m2lp": { - "lane0": "0x00000004", - "lane1": "0x00000004" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f" - }, - "obplev": { - "lane0": "0x00000069", - "lane1": "0x00000069" - }, - "obnlev": { - "lane0": "0x0000005f", - "lane1": "0x0000005f" - }, - "regn_bfm1p": { - "lane0": "0x0000001e", - "lane1": "0x0000001e" - }, - "regn_bfm1n": { - "lane0": "0x000000aa", - "lane1": "0x000000aa" - } - } - }, - "QSFP-DD-active_cable_media_interface": { - "speed:400GAUI-8": { - "idriver": { - "lane0": "0x0000003c", - "lane1": "0x0000003c", - "lane2": "0x0000003c", - "lane3": "0x0000003c", - "lane4": "0x0000003c", - "lane5": "0x0000003c", - "lane6": "0x0000003c", - "lane7": "0x0000003c" - }, - "pre1": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "main": { - "lane0": "0x00000020", - "lane1": "0x00000020", - "lane2": "0x00000020", - "lane3": "0x00000020", - "lane4": "0x00000020", - "lane5": "0x00000020", - "lane6": "0x00000020", - "lane7": "0x00000020" - }, - "post1": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "ob_m2lp": { - "lane0": "0x00000004", - "lane1": "0x00000004", - "lane2": "0x00000004", - "lane3": "0x00000004", - "lane4": "0x00000004", - "lane5": "0x00000004", - "lane6": "0x00000004", - "lane7": "0x00000004" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f", - "lane2": "0x0000000f", - "lane3": "0x0000000f", - "lane4": "0x0000000f", - "lane5": "0x0000000f", - "lane6": "0x0000000f", - "lane7": "0x0000000f" - }, - "obplev": { - "lane0": "0x00000069", - "lane1": "0x00000069", - "lane2": "0x00000069", - "lane3": "0x00000069", - "lane4": "0x00000069", - "lane5": "0x00000069", - "lane6": "0x00000069", - "lane7": "0x00000069" - }, - "obnlev": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "regn_bfm1p": { - "lane0": "0x0000001e", - "lane1": "0x0000001e", - "lane2": "0x0000001e", - "lane3": "0x0000001e", - "lane4": "0x0000001e", - "lane5": "0x0000001e", - "lane6": "0x0000001e", - "lane7": "0x0000001e" - }, - "regn_bfm1n": { - "lane0": "0x000000aa", - "lane1": "0x000000aa", - "lane2": "0x000000aa", - "lane3": "0x000000aa", - "lane4": "0x000000aa", - "lane5": "0x000000aa", - "lane6": "0x000000aa", - "lane7": "0x000000aa" - } - }, - "speed:CAUI-4": { - "idriver": { - "lane0": "0x00000028", - "lane1": "0x00000028", - "lane2": "0x00000028", - "lane3": "0x00000028", - "lane4": "0x00000028", - "lane5": "0x00000028", - "lane6": "0x00000028", - "lane7": "0x00000028" - }, - "pre1": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": "0xfffffff3" - }, - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "main": { - "lane0": "0x00000033", - "lane1": "0x00000033", - "lane2": "0x00000033", - "lane3": "0x00000033", - "lane4": "0x00000033", - "lane5": "0x00000033", - "lane6": "0x00000033", - "lane7": "0x00000033" - }, - "post1": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "ob_m2lp": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f", - "lane2": "0x0000000f", - "lane3": "0x0000000f", - "lane4": "0x0000000f", - "lane5": "0x0000000f", - "lane6": "0x0000000f", - "lane7": "0x0000000f" - }, - "obplev": { - "lane0": "0x00000050", - "lane1": "0x00000050", - "lane2": "0x00000050", - "lane3": "0x00000050", - "lane4": "0x00000050", - "lane5": "0x00000050", - "lane6": "0x00000050", - "lane7": "0x00000050" - }, - "obnlev": { - "lane0": "0x00000078", - "lane1": "0x00000078", - "lane2": "0x00000078", - "lane3": "0x00000078", - "lane4": "0x00000078", - "lane5": "0x00000078", - "lane6": "0x00000078", - "lane7": "0x00000078" - }, - "regn_bfm1p": { - "lane0": "0x0000003c", - "lane1": "0x0000003c", - "lane2": "0x0000003c", - "lane3": "0x0000003c", - "lane4": "0x0000003c", - "lane5": "0x0000003c", - "lane6": "0x0000003c", - "lane7": "0x0000003c" - }, - "regn_bfm1n": { - "lane0": "0x0000008c", - "lane1": "0x0000008c", - "lane2": "0x0000008c", - "lane3": "0x0000008c", - "lane4": "0x0000008c", - "lane5": "0x0000008c", - "lane6": "0x0000008c", - "lane7": "0x0000008c" - } - } - }, - "QSFP+-active_cable_media_interface": { - "speed:CAUI-4": { - "idriver": { - "lane0": "0x00000028", - "lane1": "0x00000028", - "lane2": "0x00000028", - "lane3": "0x00000028", - "lane4": "0x00000028", - "lane5": "0x00000028", - "lane6": "0x00000028", - "lane7": "0x00000028" - }, - "pre1": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": "0xfffffff3" - }, - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "main": { - "lane0": "0x00000033", - "lane1": "0x00000033", - "lane2": "0x00000033", - "lane3": "0x00000033", - "lane4": "0x00000033", - "lane5": "0x00000033", - "lane6": "0x00000033", - "lane7": "0x00000033" - }, - "post1": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "ob_m2lp": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f", - "lane2": "0x0000000f", - "lane3": "0x0000000f", - "lane4": "0x0000000f", - "lane5": "0x0000000f", - "lane6": "0x0000000f", - "lane7": "0x0000000f" - }, - "obplev": { - "lane0": "0x00000050", - "lane1": "0x00000050", - "lane2": "0x00000050", - "lane3": "0x00000050", - "lane4": "0x00000050", - "lane5": "0x00000050", - "lane6": "0x00000050", - "lane7": "0x00000050" - }, - "obnlev": { - "lane0": "0x00000078", - "lane1": "0x00000078", - "lane2": "0x00000078", - "lane3": "0x00000078", - "lane4": "0x00000078", - "lane5": "0x00000078", - "lane6": "0x00000078", - "lane7": "0x00000078" - }, - "regn_bfm1p": { - "lane0": "0x0000003c", - "lane1": "0x0000003c", - "lane2": "0x0000003c", - "lane3": "0x0000003c", - "lane4": "0x0000003c", - "lane5": "0x0000003c", - "lane6": "0x0000003c", - "lane7": "0x0000003c" - }, - "regn_bfm1n": { - "lane0": "0x0000008c", - "lane1": "0x0000008c", - "lane2": "0x0000008c", - "lane3": "0x0000008c", - "lane4": "0x0000008c", - "lane5": "0x0000008c", - "lane6": "0x0000008c", - "lane7": "0x0000008c" - } - } - } - } - } -} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json new file mode 120000 index 000000000000..79e88a14f519 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json @@ -0,0 +1 @@ +../Mellanox-SN4700-O8C48/media_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json deleted file mode 100644 index bf71e818a869..000000000000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json +++ /dev/null @@ -1,108 +0,0 @@ -{ - "GLOBAL_MEDIA_SETTINGS": { - "1-32": { - "50G_SPEED": { - "Default": { - "OutputAmplitudeTargetRx": { - "OutputAmplitudeTargetRx1": 0, - "OutputAmplitudeTargetRx2": 0, - "OutputAmplitudeTargetRx3": 0, - "OutputAmplitudeTargetRx4": 0, - "OutputAmplitudeTargetRx5": 0, - "OutputAmplitudeTargetRx6": 0, - "OutputAmplitudeTargetRx7": 0, - "OutputAmplitudeTargetRx8": 0 - }, - "OutputEqPreCursorTargetRx": { - "OutputEqPreCursorTargetRx1": 0, - "OutputEqPreCursorTargetRx2": 0, - "OutputEqPreCursorTargetRx3": 0, - "OutputEqPreCursorTargetRx4": 0, - "OutputEqPreCursorTargetRx5": 0, - "OutputEqPreCursorTargetRx6": 0, - "OutputEqPreCursorTargetRx7": 0, - "OutputEqPreCursorTargetRx8": 0 - }, - "OutputEqPostCursorTargetRx": { - "OutputEqPostCursorTargetRx1": 0, - "OutputEqPostCursorTargetRx2": 0, - "OutputEqPostCursorTargetRx3": 0, - "OutputEqPostCursorTargetRx4": 0, - "OutputEqPostCursorTargetRx5": 0, - "OutputEqPostCursorTargetRx6": 0, - "OutputEqPostCursorTargetRx7": 0, - "OutputEqPostCursorTargetRx8": 0 - } - } - }, - "25G_SPEED": { - "Default": { - "OutputAmplitudeTargetRx": { - "OutputAmplitudeTargetRx1": 0, - "OutputAmplitudeTargetRx2": 0, - "OutputAmplitudeTargetRx3": 0, - "OutputAmplitudeTargetRx4": 0, - "OutputAmplitudeTargetRx5": 0, - "OutputAmplitudeTargetRx6": 0, - "OutputAmplitudeTargetRx7": 0, - "OutputAmplitudeTargetRx8": 0 - }, - "OutputEqPreCursorTargetRx": { - "OutputEqPreCursorTargetRx1": 0, - "OutputEqPreCursorTargetRx2": 0, - "OutputEqPreCursorTargetRx3": 0, - "OutputEqPreCursorTargetRx4": 0, - "OutputEqPreCursorTargetRx5": 0, - "OutputEqPreCursorTargetRx6": 0, - "OutputEqPreCursorTargetRx7": 0, - "OutputEqPreCursorTargetRx8": 0 - }, - "OutputEqPostCursorTargetRx": { - "OutputEqPostCursorTargetRx1": 0, - "OutputEqPostCursorTargetRx2": 0, - "OutputEqPostCursorTargetRx3": 0, - "OutputEqPostCursorTargetRx4": 0, - "OutputEqPostCursorTargetRx5": 0, - "OutputEqPostCursorTargetRx6": 0, - "OutputEqPostCursorTargetRx7": 0, - "OutputEqPostCursorTargetRx8": 0 - } - } - }, - "10G_SPEED": { - "Default": { - "OutputAmplitudeTargetRx": { - "OutputAmplitudeTargetRx1": 0, - "OutputAmplitudeTargetRx2": 0, - "OutputAmplitudeTargetRx3": 0, - "OutputAmplitudeTargetRx4": 0, - "OutputAmplitudeTargetRx5": 0, - "OutputAmplitudeTargetRx6": 0, - "OutputAmplitudeTargetRx7": 0, - "OutputAmplitudeTargetRx8": 0 - }, - "OutputEqPreCursorTargetRx": { - "OutputEqPreCursorTargetRx1": 0, - "OutputEqPreCursorTargetRx2": 0, - "OutputEqPreCursorTargetRx3": 0, - "OutputEqPreCursorTargetRx4": 0, - "OutputEqPreCursorTargetRx5": 0, - "OutputEqPreCursorTargetRx6": 0, - "OutputEqPreCursorTargetRx7": 0, - "OutputEqPreCursorTargetRx8": 0 - }, - "OutputEqPostCursorTargetRx": { - "OutputEqPostCursorTargetRx1": 0, - "OutputEqPostCursorTargetRx2": 0, - "OutputEqPostCursorTargetRx3": 0, - "OutputEqPostCursorTargetRx4": 0, - "OutputEqPostCursorTargetRx5": 0, - "OutputEqPostCursorTargetRx6": 0, - "OutputEqPostCursorTargetRx7": 0, - "OutputEqPostCursorTargetRx8": 0 - } - } - } - } - } -} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json new file mode 120000 index 000000000000..f2f54cb0b7b6 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json @@ -0,0 +1 @@ +../Mellanox-SN4700-O8C48/optics_si_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile index 413fdb8b4235..d37fe070a833 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile @@ -1,4 +1,4 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_8x400g_48x200g.xml SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1 SAI_INDEPENDENT_MODULE_MODE=1 -SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 \ No newline at end of file +SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json deleted file mode 120000 index 0499271989cf..000000000000 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json +++ /dev/null @@ -1 +0,0 @@ -../ACS-SN4280/hwsku.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json new file mode 100644 index 000000000000..41e245c85e1c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json @@ -0,0 +1,168 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet8": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet16": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet24": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet32": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet40": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet48": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet56": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet64": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet72": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet80": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet88": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet96": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet104": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet112": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet120": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet128": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet136": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet144": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet152": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet160": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet168": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet176": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet184": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet192": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet200": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet208": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet216": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet224": { + "default_brkout_mode": "1x400G", + "subport": "1", + "autoneg": "on", + "role": "Dpc" + }, + "Ethernet232": { + "default_brkout_mode": "1x400G", + "subport": "1", + "autoneg": "on", + "role": "Dpc" + }, + "Ethernet240": { + "default_brkout_mode": "1x400G", + "subport": "1", + "autoneg": "on", + "role": "Dpc" + }, + "Ethernet248": { + "default_brkout_mode": "1x400G", + "subport": "1", + "autoneg": "on", + "role": "Dpc" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/media_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/media_settings.json new file mode 100644 index 000000000000..3bd288caa9cc --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/media_settings.json @@ -0,0 +1,506 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-28": { + "QSFP-DD-sm_media_interface": { + "speed:400GAUI-8": { + "idriver": { + "lane0": "0x0000003c", + "lane1": "0x0000003c", + "lane2": "0x0000003c", + "lane3": "0x0000003c", + "lane4": "0x0000003c", + "lane5": "0x0000003c", + "lane6": "0x0000003c", + "lane7": "0x0000003c" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x00000020", + "lane1": "0x00000020", + "lane2": "0x00000020", + "lane3": "0x00000020", + "lane4": "0x00000020", + "lane5": "0x00000020", + "lane6": "0x00000020", + "lane7": "0x00000020" + }, + "post1": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "ob_m2lp": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "ob_alev_out": { + "lane0": "0x0000000f", + "lane1": "0x0000000f", + "lane2": "0x0000000f", + "lane3": "0x0000000f", + "lane4": "0x0000000f", + "lane5": "0x0000000f", + "lane6": "0x0000000f", + "lane7": "0x0000000f" + }, + "obplev": { + "lane0": "0x00000069", + "lane1": "0x00000069", + "lane2": "0x00000069", + "lane3": "0x00000069", + "lane4": "0x00000069", + "lane5": "0x00000069", + "lane6": "0x00000069", + "lane7": "0x00000069" + }, + "obnlev": { + "lane0": "0x0000005f", + "lane1": "0x0000005f", + "lane2": "0x0000005f", + "lane3": "0x0000005f", + "lane4": "0x0000005f", + "lane5": "0x0000005f", + "lane6": "0x0000005f", + "lane7": "0x0000005f" + }, + "regn_bfm1p": { + "lane0": "0x0000001e", + "lane1": "0x0000001e", + "lane2": "0x0000001e", + "lane3": "0x0000001e", + "lane4": "0x0000001e", + "lane5": "0x0000001e", + "lane6": "0x0000001e", + "lane7": "0x0000001e" + }, + "regn_bfm1n": { + "lane0": "0x000000aa", + "lane1": "0x000000aa", + "lane2": "0x000000aa", + "lane3": "0x000000aa", + "lane4": "0x000000aa", + "lane5": "0x000000aa", + "lane6": "0x000000aa", + "lane7": "0x000000aa" + } + }, + "speed:100GAUI-2": { + "idriver": { + "lane0": "0x0000003c", + "lane1": "0x0000003c" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000" + }, + "main": { + "lane0": "0x00000020", + "lane1": "0x00000020" + }, + "post1": { + "lane0": "0x00000006", + "lane1": "0x00000006" + }, + "ob_m2lp": { + "lane0": "0x00000004", + "lane1": "0x00000004" + }, + "ob_alev_out": { + "lane0": "0x0000000f", + "lane1": "0x0000000f" + }, + "obplev": { + "lane0": "0x00000069", + "lane1": "0x00000069" + }, + "obnlev": { + "lane0": "0x0000005f", + "lane1": "0x0000005f" + }, + "regn_bfm1p": { + "lane0": "0x0000001e", + "lane1": "0x0000001e" + }, + "regn_bfm1n": { + "lane0": "0x000000aa", + "lane1": "0x000000aa" + } + } + }, + "QSFP-DD-active_cable_media_interface": { + "speed:400GAUI-8": { + "idriver": { + "lane0": "0x0000003c", + "lane1": "0x0000003c", + "lane2": "0x0000003c", + "lane3": "0x0000003c", + "lane4": "0x0000003c", + "lane5": "0x0000003c", + "lane6": "0x0000003c", + "lane7": "0x0000003c" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x00000020", + "lane1": "0x00000020", + "lane2": "0x00000020", + "lane3": "0x00000020", + "lane4": "0x00000020", + "lane5": "0x00000020", + "lane6": "0x00000020", + "lane7": "0x00000020" + }, + "post1": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "ob_m2lp": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "ob_alev_out": { + "lane0": "0x0000000f", + "lane1": "0x0000000f", + "lane2": "0x0000000f", + "lane3": "0x0000000f", + "lane4": "0x0000000f", + "lane5": "0x0000000f", + "lane6": "0x0000000f", + "lane7": "0x0000000f" + }, + "obplev": { + "lane0": "0x00000069", + "lane1": "0x00000069", + "lane2": "0x00000069", + "lane3": "0x00000069", + "lane4": "0x00000069", + "lane5": "0x00000069", + "lane6": "0x00000069", + "lane7": "0x00000069" + }, + "obnlev": { + "lane0": "0x0000005f", + "lane1": "0x0000005f", + "lane2": "0x0000005f", + "lane3": "0x0000005f", + "lane4": "0x0000005f", + "lane5": "0x0000005f", + "lane6": "0x0000005f", + "lane7": "0x0000005f" + }, + "regn_bfm1p": { + "lane0": "0x0000001e", + "lane1": "0x0000001e", + "lane2": "0x0000001e", + "lane3": "0x0000001e", + "lane4": "0x0000001e", + "lane5": "0x0000001e", + "lane6": "0x0000001e", + "lane7": "0x0000001e" + }, + "regn_bfm1n": { + "lane0": "0x000000aa", + "lane1": "0x000000aa", + "lane2": "0x000000aa", + "lane3": "0x000000aa", + "lane4": "0x000000aa", + "lane5": "0x000000aa", + "lane6": "0x000000aa", + "lane7": "0x000000aa" + } + }, + "speed:CAUI-4": { + "idriver": { + "lane0": "0x00000028", + "lane1": "0x00000028", + "lane2": "0x00000028", + "lane3": "0x00000028", + "lane4": "0x00000028", + "lane5": "0x00000028", + "lane6": "0x00000028", + "lane7": "0x00000028" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x00000033", + "lane1": "0x00000033", + "lane2": "0x00000033", + "lane3": "0x00000033", + "lane4": "0x00000033", + "lane5": "0x00000033", + "lane6": "0x00000033", + "lane7": "0x00000033" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "ob_m2lp": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "ob_alev_out": { + "lane0": "0x0000000f", + "lane1": "0x0000000f", + "lane2": "0x0000000f", + "lane3": "0x0000000f", + "lane4": "0x0000000f", + "lane5": "0x0000000f", + "lane6": "0x0000000f", + "lane7": "0x0000000f" + }, + "obplev": { + "lane0": "0x00000050", + "lane1": "0x00000050", + "lane2": "0x00000050", + "lane3": "0x00000050", + "lane4": "0x00000050", + "lane5": "0x00000050", + "lane6": "0x00000050", + "lane7": "0x00000050" + }, + "obnlev": { + "lane0": "0x00000078", + "lane1": "0x00000078", + "lane2": "0x00000078", + "lane3": "0x00000078", + "lane4": "0x00000078", + "lane5": "0x00000078", + "lane6": "0x00000078", + "lane7": "0x00000078" + }, + "regn_bfm1p": { + "lane0": "0x0000003c", + "lane1": "0x0000003c", + "lane2": "0x0000003c", + "lane3": "0x0000003c", + "lane4": "0x0000003c", + "lane5": "0x0000003c", + "lane6": "0x0000003c", + "lane7": "0x0000003c" + }, + "regn_bfm1n": { + "lane0": "0x0000008c", + "lane1": "0x0000008c", + "lane2": "0x0000008c", + "lane3": "0x0000008c", + "lane4": "0x0000008c", + "lane5": "0x0000008c", + "lane6": "0x0000008c", + "lane7": "0x0000008c" + } + } + }, + "QSFP+-active_cable_media_interface": { + "speed:CAUI-4": { + "idriver": { + "lane0": "0x00000028", + "lane1": "0x00000028", + "lane2": "0x00000028", + "lane3": "0x00000028", + "lane4": "0x00000028", + "lane5": "0x00000028", + "lane6": "0x00000028", + "lane7": "0x00000028" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x00000033", + "lane1": "0x00000033", + "lane2": "0x00000033", + "lane3": "0x00000033", + "lane4": "0x00000033", + "lane5": "0x00000033", + "lane6": "0x00000033", + "lane7": "0x00000033" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "ob_m2lp": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "ob_alev_out": { + "lane0": "0x0000000f", + "lane1": "0x0000000f", + "lane2": "0x0000000f", + "lane3": "0x0000000f", + "lane4": "0x0000000f", + "lane5": "0x0000000f", + "lane6": "0x0000000f", + "lane7": "0x0000000f" + }, + "obplev": { + "lane0": "0x00000050", + "lane1": "0x00000050", + "lane2": "0x00000050", + "lane3": "0x00000050", + "lane4": "0x00000050", + "lane5": "0x00000050", + "lane6": "0x00000050", + "lane7": "0x00000050" + }, + "obnlev": { + "lane0": "0x00000078", + "lane1": "0x00000078", + "lane2": "0x00000078", + "lane3": "0x00000078", + "lane4": "0x00000078", + "lane5": "0x00000078", + "lane6": "0x00000078", + "lane7": "0x00000078" + }, + "regn_bfm1p": { + "lane0": "0x0000003c", + "lane1": "0x0000003c", + "lane2": "0x0000003c", + "lane3": "0x0000003c", + "lane4": "0x0000003c", + "lane5": "0x0000003c", + "lane6": "0x0000003c", + "lane7": "0x0000003c" + }, + "regn_bfm1n": { + "lane0": "0x0000008c", + "lane1": "0x0000008c", + "lane2": "0x0000008c", + "lane3": "0x0000008c", + "lane4": "0x0000008c", + "lane5": "0x0000008c", + "lane6": "0x0000008c", + "lane7": "0x0000008c" + } + } + } + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/optics_si_settings.json new file mode 100644 index 000000000000..6e427a5b03e2 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/optics_si_settings.json @@ -0,0 +1,108 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-28": { + "50G_SPEED": { + "Default": { + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 0, + "OutputAmplitudeTargetRx2": 0, + "OutputAmplitudeTargetRx3": 0, + "OutputAmplitudeTargetRx4": 0, + "OutputAmplitudeTargetRx5": 0, + "OutputAmplitudeTargetRx6": 0, + "OutputAmplitudeTargetRx7": 0, + "OutputAmplitudeTargetRx8": 0 + }, + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + } + } + }, + "25G_SPEED": { + "Default": { + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 0, + "OutputAmplitudeTargetRx2": 0, + "OutputAmplitudeTargetRx3": 0, + "OutputAmplitudeTargetRx4": 0, + "OutputAmplitudeTargetRx5": 0, + "OutputAmplitudeTargetRx6": 0, + "OutputAmplitudeTargetRx7": 0, + "OutputAmplitudeTargetRx8": 0 + }, + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + } + } + }, + "10G_SPEED": { + "Default": { + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 0, + "OutputAmplitudeTargetRx2": 0, + "OutputAmplitudeTargetRx3": 0, + "OutputAmplitudeTargetRx4": 0, + "OutputAmplitudeTargetRx5": 0, + "OutputAmplitudeTargetRx6": 0, + "OutputAmplitudeTargetRx7": 0, + "OutputAmplitudeTargetRx8": 0 + }, + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + } + } + } + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pmon_daemon_control.json new file mode 120000 index 000000000000..5f26f0b03a99 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pmon_daemon_control.json @@ -0,0 +1 @@ +../../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai.profile b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai.profile index 18fd34bcfbe6..84e9021d0c8d 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai.profile +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai.profile @@ -1,3 +1,4 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4280.xml SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1 +SAI_INDEPENDENT_MODULE_MODE=1 SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf index b5ee161d1eaa..531efb3e9143 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf @@ -1 +1 @@ -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq module_blacklist=mlx5_ib,mlx5_core" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq module_blacklist=mlx5_ib,mlx5_core ima_hash=sha384 amd_iommu=off" diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml index c9ef7ee705d3..99ebce459458 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml @@ -51,6 +51,18 @@ id: '1453' name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) PCIe GPP Bridge' +- bus: '00' + dev: '01' + fn: '5' + id: '1453' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + PCIe GPP Bridge' +- bus: '00' + dev: '01' + fn: '6' + id: '1453' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + PCIe GPP Bridge' - bus: '00' dev: '02' fn: '0' @@ -217,75 +229,57 @@ id: '1467' name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 7' -- bus: '01' - dev: '00' - fn: '0' - id: c2d5 - name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management - Interface (rev 01)' -- bus: '02' - dev: '00' - fn: '0' - id: c2d5 - name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management - Interface (rev 01)' - bus: '03' dev: '00' fn: '0' id: '5765' - name: 'Non-Volatile memory controller: Device 1f9f:5765 (rev 01)' -- bus: '04' + name: 'Non-Volatile memory controller: Realtek Semiconductor Co., Ltd. RTS5765DL + NVMe SSD Controller (DRAM-less) (rev 01)' +- bus: '06' dev: '00' fn: '0' id: cf70 name: 'Ethernet controller: Mellanox Technologies Spectrum-3' -- bus: '05' - dev: '00' - fn: '0' - id: c2d5 - name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management - Interface (rev 01)' -- bus: '06' - dev: '00' - fn: '0' - id: c2d5 - name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management - Interface (rev 01)' -- bus: '07' +- bus: 09 dev: '00' fn: '0' id: 145a name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Zeppelin/Raven/Raven2 PCIe Dummy Function' -- bus: '07' +- bus: 09 dev: '00' fn: '2' id: '1456' name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Platform Security Processor (PSP) 3.0 Device' -- bus: '07' +- bus: 09 dev: '00' fn: '3' id: 145f name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Zeppelin USB 3.0 xHCI Compliant Host Controller' -- bus: 08 +- bus: 0a dev: '00' fn: '0' id: '1455' name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Zeppelin/Renoir PCIe Dummy Function' -- bus: 08 +- bus: 0a dev: '00' fn: '1' id: '1468' name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Zeppelin Cryptographic Coprocessor NTBCCP' -- bus: 08 +- bus: 0a dev: '00' fn: '4' id: '1458' name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller' +- bus: 0a + dev: '00' + fn: '5' + id: '1458' + name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller' - bus: '40' dev: '00' fn: '0' diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/pmon_immediate_start b/device/mellanox/x86_64-nvidia_sn4280-r0/pmon_immediate_start new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf index 111e469675d3..4e607aaa0fbf 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf @@ -561,5 +561,5 @@ chip "nvme-pci-*" ignore temp2 ignore temp3 -chip "00000400400-mdio-*" +chip "00000a00400-mdio-*" label temp1 "PHY TEMP" \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf index 529f66cdfb47..a9030b0901f0 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf @@ -1 +1 @@ -rshim.service +dpuctl.service diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf index d43a240ee0ad..01fe2397ccd8 100644 --- a/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf +++ b/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf @@ -1 +1 @@ -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=tpm_tis,tpm_crb,tpm" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tpm_tis.interrupts=0 nosgx" diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers.json.j2 new file mode 120000 index 000000000000..add8bf8bb7c2 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_objects.j2 new file mode 120000 index 000000000000..c01aebb7ae12 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..664f3a7a61d4 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t0.j2 @@ -0,0 +1,47 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '40m' %} +{% set ingress_lossless_pool_size = '118249472' %} +{% set ingress_lossless_pool_xoff = '15728640' %} +{% set egress_lossless_pool_size = '158229504' %} +{% set egress_lossy_pool_size = '118249472' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..6a576b70d2f0 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t1.j2 @@ -0,0 +1,47 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '300m' %} +{% set ingress_lossless_pool_size = '137779200' %} +{% set ingress_lossless_pool_xoff = '10092544' %} +{% set egress_lossless_pool_size = '158229504' %} +{% set egress_lossy_pool_size = '137779200' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_dynamic.json.j2 new file mode 100644 index 000000000000..b2cc958b7c45 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_dynamic.json.j2 @@ -0,0 +1,16 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't0' %} +{%- set dynamic_mode = 'true' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/create_only_config_db_buffers.json new file mode 100644 index 000000000000..6feb156714fe --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/create_only_config_db_buffers.json @@ -0,0 +1,7 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "create_only_config_db_buffers": "true" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/media_settings.json new file mode 120000 index 000000000000..2f4f358b3ba1 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/media_settings.json @@ -0,0 +1 @@ +../Mellanox-SN5600-V256/media_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/optics_si_settings.json new file mode 120000 index 000000000000..f0e582a4d772 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/optics_si_settings.json @@ -0,0 +1 @@ +../Mellanox-SN5600-V256/optics_si_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pg_profile_lookup.ini new file mode 100644 index 000000000000..54a46fff3bf7 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pg_profile_lookup.ini @@ -0,0 +1,42 @@ +## +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 39936 19456 20480 0 + 25000 5m 40960 19456 21504 0 + 40000 5m 44032 19456 24576 0 + 50000 5m 46080 19456 26624 0 + 100000 5m 63488 19456 44032 0 + 200000 5m 69632 19456 50176 0 + 400000 5m 105472 19456 86016 0 + 800000 5m 134144 38912 95232 0 + 10000 40m 39936 19456 20480 0 + 25000 40m 41984 19456 22528 0 + 40000 40m 45056 19456 25600 0 + 50000 40m 48128 19456 28672 0 + 100000 40m 68608 19456 49152 0 + 200000 40m 79872 19456 60416 0 + 400000 40m 123904 19456 104448 0 + 800000 40m 171008 38912 132096 0 + 10000 300m 43008 19456 23552 0 + 25000 300m 50176 19456 30720 0 + 40000 300m 59392 19456 39936 0 + 50000 300m 65536 19456 46080 0 + 100000 300m 103424 19456 83968 0 + 200000 300m 149504 19456 130048 0 + 400000 300m 263168 19456 243712 0 + 800000 300m 450560 38912 411648 0 diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pmon_daemon_control.json new file mode 100644 index 000000000000..281b96b71cc6 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pmon_daemon_control.json @@ -0,0 +1,5 @@ +{ + "skip_ledd": true, + "skip_fancontrol": true, + "skip_xcvrd_cmis_mgr": false +} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/port_config.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/port_config.ini new file mode 100644 index 000000000000..ab734780f602 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/port_config.ini @@ -0,0 +1,275 @@ +## +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + +# name lanes alias index speed fec autoneg subport +Ethernet0 0 etp1a 1 100000 rs off 1 +Ethernet1 1 etp1b 1 100000 rs off 2 +Ethernet2 2 etp1c 1 100000 rs off 3 +Ethernet3 3 etp1d 1 100000 rs off 4 +Ethernet4 4 etp1e 1 100000 rs off 5 +Ethernet5 5 etp1f 1 100000 rs off 6 +Ethernet6 6 etp1g 1 100000 rs off 7 +Ethernet7 7 etp1h 1 100000 rs off 8 +Ethernet16 16 etp3a 3 100000 rs off 1 +Ethernet17 17 etp3b 3 100000 rs off 2 +Ethernet18 18 etp3c 3 100000 rs off 3 +Ethernet19 19 etp3d 3 100000 rs off 4 +Ethernet20 20 etp3e 3 100000 rs off 5 +Ethernet21 21 etp3f 3 100000 rs off 6 +Ethernet22 22 etp3g 3 100000 rs off 7 +Ethernet23 23 etp3h 3 100000 rs off 8 +Ethernet32 32 etp5a 5 100000 rs off 1 +Ethernet33 33 etp5b 5 100000 rs off 2 +Ethernet34 34 etp5c 5 100000 rs off 3 +Ethernet35 35 etp5d 5 100000 rs off 4 +Ethernet36 36 etp5e 5 100000 rs off 5 +Ethernet37 37 etp5f 5 100000 rs off 6 +Ethernet38 38 etp5g 5 100000 rs off 7 +Ethernet39 39 etp5h 5 100000 rs off 8 +Ethernet48 48 etp7a 7 100000 rs off 1 +Ethernet49 49 etp7b 7 100000 rs off 2 +Ethernet50 50 etp7c 7 100000 rs off 3 +Ethernet51 51 etp7d 7 100000 rs off 4 +Ethernet52 52 etp7e 7 100000 rs off 5 +Ethernet53 53 etp7f 7 100000 rs off 6 +Ethernet54 54 etp7g 7 100000 rs off 7 +Ethernet55 55 etp7h 7 100000 rs off 8 +Ethernet64 64 etp9a 9 100000 rs off 1 +Ethernet65 65 etp9b 9 100000 rs off 2 +Ethernet66 66 etp9c 9 100000 rs off 3 +Ethernet67 67 etp9d 9 100000 rs off 4 +Ethernet68 68 etp9e 9 100000 rs off 5 +Ethernet69 69 etp9f 9 100000 rs off 6 +Ethernet70 70 etp9g 9 100000 rs off 7 +Ethernet71 71 etp9h 9 100000 rs off 8 +Ethernet80 80 etp11a 11 100000 rs off 1 +Ethernet81 81 etp11b 11 100000 rs off 2 +Ethernet82 82 etp11c 11 100000 rs off 3 +Ethernet83 83 etp11d 11 100000 rs off 4 +Ethernet84 84 etp11e 11 100000 rs off 5 +Ethernet85 85 etp11f 11 100000 rs off 6 +Ethernet86 86 etp11g 11 100000 rs off 7 +Ethernet87 87 etp11h 11 100000 rs off 8 +Ethernet96 96 etp13a 13 100000 rs off 1 +Ethernet97 97 etp13b 13 100000 rs off 2 +Ethernet98 98 etp13c 13 100000 rs off 3 +Ethernet99 99 etp13d 13 100000 rs off 4 +Ethernet100 100 etp13e 13 100000 rs off 5 +Ethernet101 101 etp13f 13 100000 rs off 6 +Ethernet102 102 etp13g 13 100000 rs off 7 +Ethernet103 103 etp13h 13 100000 rs off 8 +Ethernet112 112 etp15a 15 100000 rs off 1 +Ethernet113 113 etp15b 15 100000 rs off 2 +Ethernet114 114 etp15c 15 100000 rs off 3 +Ethernet115 115 etp15d 15 100000 rs off 4 +Ethernet116 116 etp15e 15 100000 rs off 5 +Ethernet117 117 etp15f 15 100000 rs off 6 +Ethernet118 118 etp15g 15 100000 rs off 7 +Ethernet119 119 etp15h 15 100000 rs off 8 +Ethernet128 128 etp17a 17 100000 rs off 1 +Ethernet129 129 etp17b 17 100000 rs off 2 +Ethernet130 130 etp17c 17 100000 rs off 3 +Ethernet131 131 etp17d 17 100000 rs off 4 +Ethernet132 132 etp17e 17 100000 rs off 5 +Ethernet133 133 etp17f 17 100000 rs off 6 +Ethernet134 134 etp17g 17 100000 rs off 7 +Ethernet135 135 etp17h 17 100000 rs off 8 +Ethernet144 144 etp19a 19 100000 rs off 1 +Ethernet145 145 etp19b 19 100000 rs off 2 +Ethernet146 146 etp19c 19 100000 rs off 3 +Ethernet147 147 etp19d 19 100000 rs off 4 +Ethernet148 148 etp19e 19 100000 rs off 5 +Ethernet149 149 etp19f 19 100000 rs off 6 +Ethernet150 150 etp19g 19 100000 rs off 7 +Ethernet151 151 etp19h 19 100000 rs off 8 +Ethernet160 160 etp21a 21 100000 rs off 1 +Ethernet161 161 etp21b 21 100000 rs off 2 +Ethernet162 162 etp21c 21 100000 rs off 3 +Ethernet163 163 etp21d 21 100000 rs off 4 +Ethernet164 164 etp21e 21 100000 rs off 5 +Ethernet165 165 etp21f 21 100000 rs off 6 +Ethernet166 166 etp21g 21 100000 rs off 7 +Ethernet167 167 etp21h 21 100000 rs off 8 +Ethernet176 176 etp23a 23 100000 rs off 1 +Ethernet177 177 etp23b 23 100000 rs off 2 +Ethernet178 178 etp23c 23 100000 rs off 3 +Ethernet179 179 etp23d 23 100000 rs off 4 +Ethernet180 180 etp23e 23 100000 rs off 5 +Ethernet181 181 etp23f 23 100000 rs off 6 +Ethernet182 182 etp23g 23 100000 rs off 7 +Ethernet183 183 etp23h 23 100000 rs off 8 +Ethernet192 192 etp25a 25 100000 rs off 1 +Ethernet193 193 etp25b 25 100000 rs off 2 +Ethernet194 194 etp25c 25 100000 rs off 3 +Ethernet195 195 etp25d 25 100000 rs off 4 +Ethernet196 196 etp25e 25 100000 rs off 5 +Ethernet197 197 etp25f 25 100000 rs off 6 +Ethernet198 198 etp25g 25 100000 rs off 7 +Ethernet199 199 etp25h 25 100000 rs off 8 +Ethernet208 208 etp27a 27 100000 rs off 1 +Ethernet209 209 etp27b 27 100000 rs off 2 +Ethernet210 210 etp27c 27 100000 rs off 3 +Ethernet211 211 etp27d 27 100000 rs off 4 +Ethernet212 212 etp27e 27 100000 rs off 5 +Ethernet213 213 etp27f 27 100000 rs off 6 +Ethernet214 214 etp27g 27 100000 rs off 7 +Ethernet215 215 etp27h 27 100000 rs off 8 +Ethernet224 224 etp29a 29 100000 rs off 1 +Ethernet225 225 etp29b 29 100000 rs off 2 +Ethernet226 226 etp29c 29 100000 rs off 3 +Ethernet227 227 etp29d 29 100000 rs off 4 +Ethernet228 228 etp29e 29 100000 rs off 5 +Ethernet229 229 etp29f 29 100000 rs off 6 +Ethernet230 230 etp29g 29 100000 rs off 7 +Ethernet231 231 etp29h 29 100000 rs off 8 +Ethernet240 240 etp31a 31 100000 rs off 1 +Ethernet241 241 etp31b 31 100000 rs off 2 +Ethernet242 242 etp31c 31 100000 rs off 3 +Ethernet243 243 etp31d 31 100000 rs off 4 +Ethernet244 244 etp31e 31 100000 rs off 5 +Ethernet245 245 etp31f 31 100000 rs off 6 +Ethernet246 246 etp31g 31 100000 rs off 7 +Ethernet247 247 etp31h 31 100000 rs off 8 +Ethernet256 256 etp33a 33 100000 rs off 1 +Ethernet257 257 etp33b 33 100000 rs off 2 +Ethernet258 258 etp33c 33 100000 rs off 3 +Ethernet259 259 etp33d 33 100000 rs off 4 +Ethernet260 260 etp33e 33 100000 rs off 5 +Ethernet261 261 etp33f 33 100000 rs off 6 +Ethernet262 262 etp33g 33 100000 rs off 7 +Ethernet263 263 etp33h 33 100000 rs off 8 +Ethernet272 272 etp35a 35 100000 rs off 1 +Ethernet273 273 etp35b 35 100000 rs off 2 +Ethernet274 274 etp35c 35 100000 rs off 3 +Ethernet275 275 etp35d 35 100000 rs off 4 +Ethernet276 276 etp35e 35 100000 rs off 5 +Ethernet277 277 etp35f 35 100000 rs off 6 +Ethernet278 278 etp35g 35 100000 rs off 7 +Ethernet279 279 etp35h 35 100000 rs off 8 +Ethernet288 288 etp37a 37 100000 rs off 1 +Ethernet289 289 etp37b 37 100000 rs off 2 +Ethernet290 290 etp37c 37 100000 rs off 3 +Ethernet291 291 etp37d 37 100000 rs off 4 +Ethernet292 292 etp37e 37 100000 rs off 5 +Ethernet293 293 etp37f 37 100000 rs off 6 +Ethernet294 294 etp37g 37 100000 rs off 7 +Ethernet295 295 etp37h 37 100000 rs off 8 +Ethernet304 304 etp39a 39 100000 rs off 1 +Ethernet305 305 etp39b 39 100000 rs off 2 +Ethernet306 306 etp39c 39 100000 rs off 3 +Ethernet307 307 etp39d 39 100000 rs off 4 +Ethernet308 308 etp39e 39 100000 rs off 5 +Ethernet309 309 etp39f 39 100000 rs off 6 +Ethernet310 310 etp39g 39 100000 rs off 7 +Ethernet311 311 etp39h 39 100000 rs off 8 +Ethernet320 320 etp41a 41 100000 rs off 1 +Ethernet321 321 etp41b 41 100000 rs off 2 +Ethernet322 322 etp41c 41 100000 rs off 3 +Ethernet323 323 etp41d 41 100000 rs off 4 +Ethernet324 324 etp41e 41 100000 rs off 5 +Ethernet325 325 etp41f 41 100000 rs off 6 +Ethernet326 326 etp41g 41 100000 rs off 7 +Ethernet327 327 etp41h 41 100000 rs off 8 +Ethernet336 336 etp43a 43 100000 rs off 1 +Ethernet337 337 etp43b 43 100000 rs off 2 +Ethernet338 338 etp43c 43 100000 rs off 3 +Ethernet339 339 etp43d 43 100000 rs off 4 +Ethernet340 340 etp43e 43 100000 rs off 5 +Ethernet341 341 etp43f 43 100000 rs off 6 +Ethernet342 342 etp43g 43 100000 rs off 7 +Ethernet343 343 etp43h 43 100000 rs off 8 +Ethernet352 352 etp45a 45 100000 rs off 1 +Ethernet353 353 etp45b 45 100000 rs off 2 +Ethernet354 354 etp45c 45 100000 rs off 3 +Ethernet355 355 etp45d 45 100000 rs off 4 +Ethernet356 356 etp45e 45 100000 rs off 5 +Ethernet357 357 etp45f 45 100000 rs off 6 +Ethernet358 358 etp45g 45 100000 rs off 7 +Ethernet359 359 etp45h 45 100000 rs off 8 +Ethernet368 368 etp47a 47 100000 rs off 1 +Ethernet369 369 etp47b 47 100000 rs off 2 +Ethernet370 370 etp47c 47 100000 rs off 3 +Ethernet371 371 etp47d 47 100000 rs off 4 +Ethernet372 372 etp47e 47 100000 rs off 5 +Ethernet373 373 etp47f 47 100000 rs off 6 +Ethernet374 374 etp47g 47 100000 rs off 7 +Ethernet375 375 etp47h 47 100000 rs off 8 +Ethernet384 384 etp49a 49 100000 rs off 1 +Ethernet385 385 etp49b 49 100000 rs off 2 +Ethernet386 386 etp49c 49 100000 rs off 3 +Ethernet387 387 etp49d 49 100000 rs off 4 +Ethernet388 388 etp49e 49 100000 rs off 5 +Ethernet389 389 etp49f 49 100000 rs off 6 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+Ethernet484 484 etp61e 61 100000 rs off 5 +Ethernet485 485 etp61f 61 100000 rs off 6 +Ethernet486 486 etp61g 61 100000 rs off 7 +Ethernet487 487 etp61h 61 100000 rs off 8 +Ethernet496 496 etp63a 63 100000 rs off 1 +Ethernet497 497 etp63b 63 100000 rs off 2 +Ethernet498 498 etp63c 63 100000 rs off 3 +Ethernet499 499 etp63d 63 100000 rs off 4 +Ethernet500 500 etp63e 63 100000 rs off 5 +Ethernet501 501 etp63f 63 100000 rs off 6 +Ethernet502 502 etp63g 63 100000 rs off 7 +Ethernet503 503 etp63h 63 100000 rs off 8 +Ethernet512 512 etp65 65 25000 rs diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/qos.json.j2 new file mode 120000 index 000000000000..eccf286dc879 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai.profile new file mode 100644 index 000000000000..271c8cf70fd8 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai.profile @@ -0,0 +1,4 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5600_256x100g.xml +SAI_INDEPENDENT_MODULE_MODE=1 +SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1 +SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai_5600_256x100g.xml b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai_5600_256x100g.xml new file mode 100644 index 000000000000..f45f28da357b --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai_5600_256x100g.xml @@ -0,0 +1,560 @@ + + + + + + + 00:02:03:04:05:00 + + + 0 + + + 65 + + + 1 + + + + + 1 + 8 + 34 + + + 3 + + + 262144 + 8 + + + 5 + 8 + 35 + 3 + 262144 + 8 + + + 9 + 8 + 33 + 3 + 262144 + 8 + + + 13 + 8 + 32 + 3 + 262144 + 8 + + + 17 + 8 + 38 + 3 + 262144 + 8 + + + 21 + 8 + 39 + 3 + 262144 + 8 + + + 25 + 8 + 37 + 3 + 262144 + 8 + + + 29 + 8 + 36 + 3 + 262144 + 8 + + + 33 + 8 + 42 + 3 + 262144 + 8 + + + 37 + 8 + 43 + 3 + 262144 + 8 + + + 41 + 8 + 41 + 3 + 262144 + 8 + + + 45 + 8 + 40 + 3 + 262144 + 8 + + + 49 + 8 + 46 + 3 + 262144 + 8 + + + 53 + 8 + 47 + 3 + 262144 + 8 + + + 57 + 8 + 45 + 3 + 262144 + 8 + + + 61 + 8 + 44 + 3 + 262144 + 8 + + + 65 + 8 + 51 + 3 + 262144 + 8 + + + 69 + 8 + 50 + 3 + 262144 + 8 + + + 73 + 8 + 48 + 3 + 262144 + 8 + + + 77 + 8 + 49 + 3 + 262144 + 8 + + + 81 + 8 + 55 + 3 + 262144 + 8 + + + 85 + 8 + 54 + 3 + 262144 + 8 + + + 89 + 8 + 52 + 3 + 262144 + 8 + + + 93 + 8 + 53 + 3 + 262144 + 8 + + + 97 + 8 + 59 + 3 + 262144 + 8 + + + 101 + 8 + 58 + 3 + 262144 + 8 + + + 105 + 8 + 56 + 3 + 262144 + 8 + + + 109 + 8 + 57 + 3 + 262144 + 8 + + + 113 + 8 + 63 + 3 + 262144 + 8 + + + 117 + 8 + 62 + 3 + 262144 + 8 + + + 121 + 8 + 60 + 3 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3 + 262144 + 8 + + + 237 + 8 + 6 + 3 + 262144 + 8 + + + 241 + 8 + 0 + 3 + 262144 + 8 + + + 245 + 8 + 1 + 3 + 262144 + 8 + + + 249 + 8 + 3 + 3 + 262144 + 8 + + + 253 + 8 + 2 + 3 + 262144 + 8 + + + 257 + 1 + 64 + 0 + 64 + + + + diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json index d5884a727c18..6b48c7b70adc 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json @@ -190,6 +190,316 @@ } }, "OSFP-8X-nm_850_media_interface": { + "speed:800G": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xfffffff1", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff1", + "lane4": "0xfffffff1", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "main": { + "lane0": "0x0000002b", + "lane1": "0x0000002b", + "lane2": "0x0000002b", + "lane3": "0x0000002b", + "lane4": "0x0000002b", + "lane5": "0x0000002b", + "lane6": "0x0000002b", + "lane7": "0x0000002b" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "idriver": { + "lane0": "0x00000032", + "lane1": "0x00000032", + "lane2": "0x00000032", + "lane3": "0x00000032", + "lane4": "0x00000032", + "lane5": "0x00000032", + "lane6": "0x00000032", + "lane7": "0x00000032" + } + }, + "speed:400GAUI-4-S": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xfffffff1", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff1", + "lane4": "0xfffffff1", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "main": { + "lane0": "0x0000002b", + "lane1": "0x0000002b", + "lane2": "0x0000002b", + "lane3": "0x0000002b", + "lane4": "0x0000002b", + "lane5": "0x0000002b", + "lane6": "0x0000002b", + "lane7": "0x0000002b" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "idriver": { + "lane0": "0x00000032", + "lane1": "0x00000032", + "lane2": "0x00000032", + "lane3": "0x00000032", + "lane4": "0x00000032", + "lane5": "0x00000032", + "lane6": "0x00000032", + "lane7": "0x00000032" + } + }, + "speed:400GAUI-8": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x0000003f", + "lane1": "0x0000003f", + "lane2": "0x0000003f", + "lane3": "0x0000003f", + "lane4": "0x0000003f", + "lane5": "0x0000003f", + "lane6": "0x0000003f", + "lane7": "0x0000003f" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "idriver": { + "lane0": "0x0000003f", + "lane1": "0x0000003f", + "lane2": "0x0000003f", + "lane3": "0x0000003f", + "lane4": "0x0000003f", + "lane5": "0x0000003f", + "lane6": "0x0000003f", + "lane7": "0x0000003f" + } + }, + "speed:400GAUI-4-L": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xfffffff1", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff1", + "lane4": "0xfffffff1", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "main": { + "lane0": "0x0000002b", + "lane1": "0x0000002b", + "lane2": "0x0000002b", + "lane3": "0x0000002b", + "lane4": "0x0000002b", + "lane5": "0x0000002b", + "lane6": "0x0000002b", + "lane7": "0x0000002b" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "idriver": { + "lane0": "0x00000032", + "lane1": "0x00000032", + "lane2": "0x00000032", + "lane3": "0x00000032", + "lane4": "0x00000032", + "lane5": "0x00000032", + "lane6": "0x00000032", + "lane7": "0x00000032" + } + }, + "speed:200GAUI-2-L": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xfffffff1", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff1", + "lane4": "0xfffffff1", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "main": { + "lane0": "0x0000002b", + "lane1": "0x0000002b", + "lane2": "0x0000002b", + "lane3": "0x0000002b", + "lane4": "0x0000002b", + "lane5": "0x0000002b", + "lane6": "0x0000002b", + "lane7": "0x0000002b" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "idriver": { + "lane0": "0x00000032", + "lane1": "0x00000032", + "lane2": "0x00000032", + "lane3": "0x00000032", + "lane4": "0x00000032", + "lane5": "0x00000032", + "lane6": "0x00000032", + "lane7": "0x00000032" + } + }, "speed:200GAUI-4": { "post1": { "lane0": "0x00000000", diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai_5600_256x200g.xml b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai_5600_256x200g.xml index 89518aa8cfca..c03466d84476 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai_5600_256x200g.xml +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai_5600_256x200g.xml @@ -27,6 +27,9 @@ 65 + + 1 + diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf index 306cde03b174..7be170196ce0 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf @@ -1 +1 @@ -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq modprobe.blacklist=tpm_tis,tpm_crb,tpm" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq tpm_tis.interrupts=0 nosgx" diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers.json.j2 new file mode 120000 index 000000000000..784bd5c08d14 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_objects.j2 new file mode 120000 index 000000000000..c01aebb7ae12 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..517e37b6e05a --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t0.j2 @@ -0,0 +1,47 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '40m' %} +{% set ingress_lossless_pool_size = '57828352' %} +{% set ingress_lossless_pool_xoff = '22544384' %} +{% set egress_lossless_pool_size = '136209408' %} +{% set egress_lossy_pool_size = '57828352' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..59dd8cf55649 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t1.j2 @@ -0,0 +1,47 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '300m' %} +{% set ingress_lossless_pool_size = '40002560' %} +{% set ingress_lossless_pool_xoff = '40370176' %} +{% set egress_lossless_pool_size = '136209408' %} +{% set egress_lossy_pool_size = '40002560' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_dynamic.json.j2 new file mode 100644 index 000000000000..b2cc958b7c45 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_dynamic.json.j2 @@ -0,0 +1,16 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't0' %} +{%- set dynamic_mode = 'true' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/create_only_config_db_buffers.json new file mode 100644 index 000000000000..6feb156714fe --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/create_only_config_db_buffers.json @@ -0,0 +1,7 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "create_only_config_db_buffers": "true" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/hwsku.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/hwsku.json new file mode 100644 index 000000000000..43d2fc1d25af --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/hwsku.json @@ -0,0 +1,202 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet8": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet16": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet24": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet32": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet40": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet48": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet56": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet64": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet72": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet80": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet88": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet96": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet104": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet112": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet120": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet128": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet136": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet144": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet152": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet160": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet168": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet176": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet184": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet192": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet200": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet208": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet216": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet224": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet232": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet240": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet248": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet256": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet264": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet272": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet280": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet288": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet296": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet304": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet312": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet320": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet328": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet336": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet344": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet352": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet360": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet368": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet376": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet384": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet392": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet400": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet408": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet416": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet424": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet432": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet440": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet448": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet456": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet464": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet472": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet480": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet488": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet496": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet504": { + "default_brkout_mode": "8x100G[50G]" + }, + "Ethernet512": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet520": { + "default_brkout_mode": "1x25G[10G]" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/pg_profile_lookup.ini new file mode 100644 index 000000000000..33878b38c6c2 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/pg_profile_lookup.ini @@ -0,0 +1,42 @@ +## +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# PG lossless profiles. +# speed cable size xon xoff threshold +10000 5m 19456 19456 20480 0 +25000 5m 19456 19456 21504 0 +50000 5m 19456 19456 26624 0 +100000 5m 19456 19456 44032 0 +200000 5m 19456 19456 50176 0 +400000 5m 19456 19456 86016 0 +10000 30m 19456 19456 20480 0 +25000 30m 19456 19456 22528 0 +50000 30m 19456 19456 27648 0 +100000 30m 19456 19456 48128 0 +200000 30m 19456 19456 57344 0 +400000 30m 19456 19456 99328 0 +10000 40m 19456 19456 20480 0 +25000 40m 19456 19456 22528 0 +50000 40m 19456 19456 28672 0 +100000 40m 19456 19456 49152 0 +200000 40m 19456 19456 60416 0 +400000 40m 19456 19456 104448 0 +10000 300m 19456 19456 23552 0 +25000 300m 19456 19456 30720 0 +50000 300m 19456 19456 46080 0 +100000 300m 19456 19456 83968 0 +200000 300m 19456 19456 130048 0 +400000 300m 19456 19456 243712 0 diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/port_config.ini b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/port_config.ini new file mode 100644 index 000000000000..640299159fff --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/port_config.ini @@ -0,0 +1,532 @@ +## +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + +# name lanes alias index +Ethernet0 0 etp1a 1 +Ethernet1 1 etp1b 1 +Ethernet2 2 etp1c 1 +Ethernet3 3 etp1d 1 +Ethernet4 4 etp1e 1 +Ethernet5 5 etp1f 1 +Ethernet6 6 etp1g 1 +Ethernet7 7 etp1h 1 +Ethernet8 8 etp2a 2 +Ethernet9 9 etp2b 2 +Ethernet10 10 etp2c 2 +Ethernet11 11 etp2d 2 +Ethernet12 12 etp2e 2 +Ethernet13 13 etp2f 2 +Ethernet14 14 etp2g 2 +Ethernet15 15 etp2h 2 +Ethernet16 16 etp3a 3 +Ethernet17 17 etp3b 3 +Ethernet18 18 etp3c 3 +Ethernet19 19 etp3d 3 +Ethernet20 20 etp3e 3 +Ethernet21 21 etp3f 3 +Ethernet22 22 etp3g 3 +Ethernet23 23 etp3h 3 +Ethernet24 24 etp4a 4 +Ethernet25 25 etp4b 4 +Ethernet26 26 etp4c 4 +Ethernet27 27 etp4d 4 +Ethernet28 28 etp4e 4 +Ethernet29 29 etp4f 4 +Ethernet30 30 etp4g 4 +Ethernet31 31 etp4h 4 +Ethernet32 32 etp5a 5 +Ethernet33 33 etp5b 5 +Ethernet34 34 etp5c 5 +Ethernet35 35 etp5d 5 +Ethernet36 36 etp5e 5 +Ethernet37 37 etp5f 5 +Ethernet38 38 etp5g 5 +Ethernet39 39 etp5h 5 +Ethernet40 40 etp6a 6 +Ethernet41 41 etp6b 6 +Ethernet42 42 etp6c 6 +Ethernet43 43 etp6d 6 +Ethernet44 44 etp6e 6 +Ethernet45 45 etp6f 6 +Ethernet46 46 etp6g 6 +Ethernet47 47 etp6h 6 +Ethernet48 48 etp7a 7 +Ethernet49 49 etp7b 7 +Ethernet50 50 etp7c 7 +Ethernet51 51 etp7d 7 +Ethernet52 52 etp7e 7 +Ethernet53 53 etp7f 7 +Ethernet54 54 etp7g 7 +Ethernet55 55 etp7h 7 +Ethernet56 56 etp8a 8 +Ethernet57 57 etp8b 8 +Ethernet58 58 etp8c 8 +Ethernet59 59 etp8d 8 +Ethernet60 60 etp8e 8 +Ethernet61 61 etp8f 8 +Ethernet62 62 etp8g 8 +Ethernet63 63 etp8h 8 +Ethernet64 64 etp9a 9 +Ethernet65 65 etp9b 9 +Ethernet66 66 etp9c 9 +Ethernet67 67 etp9d 9 +Ethernet68 68 etp9e 9 +Ethernet69 69 etp9f 9 +Ethernet70 70 etp9g 9 +Ethernet71 71 etp9h 9 +Ethernet72 72 etp10a 10 +Ethernet73 73 etp10b 10 +Ethernet74 74 etp10c 10 +Ethernet75 75 etp10d 10 +Ethernet76 76 etp10e 10 +Ethernet77 77 etp10f 10 +Ethernet78 78 etp10g 10 +Ethernet79 79 etp10h 10 +Ethernet80 80 etp11a 11 +Ethernet81 81 etp11b 11 +Ethernet82 82 etp11c 11 +Ethernet83 83 etp11d 11 +Ethernet84 84 etp11e 11 +Ethernet85 85 etp11f 11 +Ethernet86 86 etp11g 11 +Ethernet87 87 etp11h 11 +Ethernet88 88 etp12a 12 +Ethernet89 89 etp12b 12 +Ethernet90 90 etp12c 12 +Ethernet91 91 etp12d 12 +Ethernet92 92 etp12e 12 +Ethernet93 93 etp12f 12 +Ethernet94 94 etp12g 12 +Ethernet95 95 etp12h 12 +Ethernet96 96 etp13a 13 +Ethernet97 97 etp13b 13 +Ethernet98 98 etp13c 13 +Ethernet99 99 etp13d 13 +Ethernet100 100 etp13e 13 +Ethernet101 101 etp13f 13 +Ethernet102 102 etp13g 13 +Ethernet103 103 etp13h 13 +Ethernet104 104 etp14a 14 +Ethernet105 105 etp14b 14 +Ethernet106 106 etp14c 14 +Ethernet107 107 etp14d 14 +Ethernet108 108 etp14e 14 +Ethernet109 109 etp14f 14 +Ethernet110 110 etp14g 14 +Ethernet111 111 etp14h 14 +Ethernet112 112 etp15a 15 +Ethernet113 113 etp15b 15 +Ethernet114 114 etp15c 15 +Ethernet115 115 etp15d 15 +Ethernet116 116 etp15e 15 +Ethernet117 117 etp15f 15 +Ethernet118 118 etp15g 15 +Ethernet119 119 etp15h 15 +Ethernet120 120 etp16a 16 +Ethernet121 121 etp16b 16 +Ethernet122 122 etp16c 16 +Ethernet123 123 etp16d 16 +Ethernet124 124 etp16e 16 +Ethernet125 125 etp16f 16 +Ethernet126 126 etp16g 16 +Ethernet127 127 etp16h 16 +Ethernet128 128 etp17a 17 +Ethernet129 129 etp17b 17 +Ethernet130 130 etp17c 17 +Ethernet131 131 etp17d 17 +Ethernet132 132 etp17e 17 +Ethernet133 133 etp17f 17 +Ethernet134 134 etp17g 17 +Ethernet135 135 etp17h 17 +Ethernet136 136 etp18a 18 +Ethernet137 137 etp18b 18 +Ethernet138 138 etp18c 18 +Ethernet139 139 etp18d 18 +Ethernet140 140 etp18e 18 +Ethernet141 141 etp18f 18 +Ethernet142 142 etp18g 18 +Ethernet143 143 etp18h 18 +Ethernet144 144 etp19a 19 +Ethernet145 145 etp19b 19 +Ethernet146 146 etp19c 19 +Ethernet147 147 etp19d 19 +Ethernet148 148 etp19e 19 +Ethernet149 149 etp19f 19 +Ethernet150 150 etp19g 19 +Ethernet151 151 etp19h 19 +Ethernet152 152 etp20a 20 +Ethernet153 153 etp20b 20 +Ethernet154 154 etp20c 20 +Ethernet155 155 etp20d 20 +Ethernet156 156 etp20e 20 +Ethernet157 157 etp20f 20 +Ethernet158 158 etp20g 20 +Ethernet159 159 etp20h 20 +Ethernet160 160 etp21a 21 +Ethernet161 161 etp21b 21 +Ethernet162 162 etp21c 21 +Ethernet163 163 etp21d 21 +Ethernet164 164 etp21e 21 +Ethernet165 165 etp21f 21 +Ethernet166 166 etp21g 21 +Ethernet167 167 etp21h 21 +Ethernet168 168 etp22a 22 +Ethernet169 169 etp22b 22 +Ethernet170 170 etp22c 22 +Ethernet171 171 etp22d 22 +Ethernet172 172 etp22e 22 +Ethernet173 173 etp22f 22 +Ethernet174 174 etp22g 22 +Ethernet175 175 etp22h 22 +Ethernet176 176 etp23a 23 +Ethernet177 177 etp23b 23 +Ethernet178 178 etp23c 23 +Ethernet179 179 etp23d 23 +Ethernet180 180 etp23e 23 +Ethernet181 181 etp23f 23 +Ethernet182 182 etp23g 23 +Ethernet183 183 etp23h 23 +Ethernet184 184 etp24a 24 +Ethernet185 185 etp24b 24 +Ethernet186 186 etp24c 24 +Ethernet187 187 etp24d 24 +Ethernet188 188 etp24e 24 +Ethernet189 189 etp24f 24 +Ethernet190 190 etp24g 24 +Ethernet191 191 etp24h 24 +Ethernet192 192 etp25a 25 +Ethernet193 193 etp25b 25 +Ethernet194 194 etp25c 25 +Ethernet195 195 etp25d 25 +Ethernet196 196 etp25e 25 +Ethernet197 197 etp25f 25 +Ethernet198 198 etp25g 25 +Ethernet199 199 etp25h 25 +Ethernet200 200 etp26a 26 +Ethernet201 201 etp26b 26 +Ethernet202 202 etp26c 26 +Ethernet203 203 etp26d 26 +Ethernet204 204 etp26e 26 +Ethernet205 205 etp26f 26 +Ethernet206 206 etp26g 26 +Ethernet207 207 etp26h 26 +Ethernet208 208 etp27a 27 +Ethernet209 209 etp27b 27 +Ethernet210 210 etp27c 27 +Ethernet211 211 etp27d 27 +Ethernet212 212 etp27e 27 +Ethernet213 213 etp27f 27 +Ethernet214 214 etp27g 27 +Ethernet215 215 etp27h 27 +Ethernet216 216 etp28a 28 +Ethernet217 217 etp28b 28 +Ethernet218 218 etp28c 28 +Ethernet219 219 etp28d 28 +Ethernet220 220 etp28e 28 +Ethernet221 221 etp28f 28 +Ethernet222 222 etp28g 28 +Ethernet223 223 etp28h 28 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120000 index 000000000000..a49c7427d324 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile new file mode 100644 index 000000000000..a1d251ac1ad4 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5640.xml diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai_5640.xml b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai_5640.xml new file mode 100644 index 000000000000..d111ce9849a6 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai_5640.xml @@ -0,0 +1,3637 @@ + + + + + + + + + 00:02:03:04:05:00 + + + 0 + + + 512 + + + + + 481 + 1 + 0 + + 3 + + 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"32,33,34,35,36,37,38,39,", + "breakout_modes": { + "1x400G": ["etp5"], + "2x400G[200G]": ["etp5a", "etp5b"], + "4x200G[100G]": ["etp5a", "etp5b", "etp5c", "etp5d"], + "8x100G[50G]": ["etp5a", "etp5b", "etp5c", "etp5d", "etp5e", "etp5f", "etp5g", "etp5h"] + } + }, + "Ethernet40": { + "index": "6,6,6,6,6,6,6,6", + "lanes": "40,41,42,43,44,45,46,47,", + "breakout_modes": { + "1x400G": ["etp6"], + "2x400G[200G]": ["etp6a", "etp6b"], + "4x200G[100G]": ["etp6a", "etp6b", "etp6c", "etp6d"], + "8x100G[50G]": ["etp6a", "etp6b", "etp6c", "etp6d", "etp6e", "etp6f", "etp6g", "etp6h"] + } + }, + "Ethernet48": { + "index": "7,7,7,7,7,7,7,7", + "lanes": "48,49,50,51,52,53,54,55,", + "breakout_modes": { + "1x400G": ["etp7"], + "2x400G[200G]": ["etp7a", "etp7b"], + "4x200G[100G]": ["etp7a", "etp7b", "etp7c", "etp7d"], + "8x100G[50G]": ["etp7a", "etp7b", "etp7c", "etp7d", "etp7e", "etp7f", "etp7g", "etp7h"] + } + }, + "Ethernet56": { + "index": "8,8,8,8,8,8,8,8", + "lanes": "56,57,58,59,60,61,62,63,", + "breakout_modes": { + "1x400G": ["etp8"], + "2x400G[200G]": ["etp8a", "etp8b"], + "4x200G[100G]": ["etp8a", "etp8b", "etp8c", "etp8d"], + "8x100G[50G]": ["etp8a", "etp8b", "etp8c", "etp8d", "etp8e", "etp8f", "etp8g", "etp8h"] + } + }, + "Ethernet64": { + "index": "9,9,9,9,9,9,9,9", + "lanes": "64,65,66,67,68,69,70,71,", + "breakout_modes": { + "1x400G": ["etp9"], + "2x400G[200G]": ["etp9a", "etp9b"], + "4x200G[100G]": ["etp9a", "etp9b", "etp9c", "etp9d"], + "8x100G[50G]": ["etp9a", "etp9b", "etp9c", "etp9d", "etp9e", "etp9f", "etp9g", "etp9h"] + } + }, + "Ethernet72": { + "index": "10,10,10,10,10,10,10,10", + "lanes": "72,73,74,75,76,77,78,79,", + "breakout_modes": { + "1x400G": ["etp10"], + "2x400G[200G]": ["etp10a", "etp10b"], + "4x200G[100G]": ["etp10a", "etp10b", "etp10c", "etp10d"], + "8x100G[50G]": ["etp10a", "etp10b", "etp10c", "etp10d", "etp10e", "etp10f", "etp10g", "etp10h"] + } + }, + "Ethernet80": { + "index": "11,11,11,11,11,11,11,11", + "lanes": "80,81,82,83,84,85,86,87,", + "breakout_modes": { + "1x400G": ["etp11"], + "2x400G[200G]": ["etp11a", "etp11b"], + "4x200G[100G]": ["etp11a", "etp11b", "etp11c", "etp11d"], + "8x100G[50G]": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e", "etp11f", "etp11g", "etp11h"] + } + }, + "Ethernet88": { + "index": "12,12,12,12,12,12,12,12", + "lanes": "88,89,90,91,92,93,94,95,", + "breakout_modes": { + "1x400G": ["etp12"], + "2x400G[200G]": ["etp12a", "etp12b"], + "4x200G[100G]": ["etp12a", "etp12b", "etp12c", "etp12d"], + "8x100G[50G]": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e", "etp12f", "etp12g", "etp12h"] + } + }, + "Ethernet96": { + "index": "13,13,13,13,13,13,13,13", + "lanes": "96,97,98,99,100,101,102,103,", + "breakout_modes": { + "1x400G": ["etp13"], + "2x400G[200G]": ["etp13a", "etp13b"], + "4x200G[100G]": ["etp13a", "etp13b", "etp13c", "etp13d"], + "8x100G[50G]": ["etp13a", "etp13b", "etp13c", "etp13d", "etp13e", "etp13f", "etp13g", "etp13h"] + } + }, + "Ethernet104": { + "index": "14,14,14,14,14,14,14,14", + "lanes": "104,105,106,107,108,109,110,111,", + "breakout_modes": { + "1x400G": ["etp14"], + "2x400G[200G]": ["etp14a", "etp14b"], + "4x200G[100G]": ["etp14a", "etp14b", "etp14c", "etp14d"], + "8x100G[50G]": ["etp14a", "etp14b", "etp14c", "etp14d", "etp14e", "etp14f", "etp14g", "etp14h"] + } + }, + "Ethernet112": { + "index": "15,15,15,15,15,15,15,15", + "lanes": "112,113,114,115,116,117,118,119,", + "breakout_modes": { + "1x400G": ["etp15"], + "2x400G[200G]": ["etp15a", "etp15b"], + "4x200G[100G]": ["etp15a", "etp15b", "etp15c", "etp15d"], + "8x100G[50G]": ["etp15a", "etp15b", "etp15c", "etp15d", "etp15e", "etp15f", "etp15g", "etp15h"] + } + }, + "Ethernet120": { + "index": "16,16,16,16,16,16,16,16", + "lanes": "120,121,122,123,124,125,126,127,", + "breakout_modes": { + "1x400G": ["etp16"], + "2x400G[200G]": ["etp16a", "etp16b"], + "4x200G[100G]": ["etp16a", "etp16b", "etp16c", "etp16d"], + "8x100G[50G]": ["etp16a", "etp16b", "etp16c", "etp16d", "etp16e", "etp16f", "etp16g", "etp16h"] + } + }, + "Ethernet128": { + "index": "17,17,17,17,17,17,17,17", + "lanes": "128,129,130,131,132,133,134,135,", + "breakout_modes": { + "1x400G": ["etp17"], + "2x400G[200G]": ["etp17a", "etp17b"], + "4x200G[100G]": ["etp17a", "etp17b", "etp17c", "etp17d"], + "8x100G[50G]": ["etp17a", "etp17b", "etp17c", "etp17d", "etp17e", "etp17f", "etp17g", "etp17h"] + } + }, + "Ethernet136": { + "index": "18,18,18,18,18,18,18,18", + "lanes": "136,137,138,139,140,141,142,143,", + "breakout_modes": { + "1x400G": ["etp18"], + "2x400G[200G]": ["etp18a", "etp18b"], + "4x200G[100G]": ["etp18a", "etp18b", "etp18c", "etp18d"], + "8x100G[50G]": ["etp18a", "etp18b", "etp18c", "etp18d", "etp18e", "etp18f", "etp18g", "etp18h"] + } + }, + "Ethernet144": { + "index": "19,19,19,19,19,19,19,19", + "lanes": "144,145,146,147,148,149,150,151,", + "breakout_modes": { + "1x400G": ["etp19"], + "2x400G[200G]": ["etp19a", "etp19b"], + "4x200G[100G]": ["etp19a", "etp19b", "etp19c", "etp19d"], + "8x100G[50G]": ["etp19a", "etp19b", "etp19c", "etp19d", "etp19e", "etp19f", "etp19g", "etp19h"] + } + }, + "Ethernet152": { + "index": "20,20,20,20,20,20,20,20", + "lanes": "152,153,154,155,156,157,158,159,", + "breakout_modes": { + "1x400G": ["etp20"], + "2x400G[200G]": ["etp20a", "etp20b"], + "4x200G[100G]": ["etp20a", "etp20b", "etp20c", "etp20d"], + "8x100G[50G]": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e", "etp20f", "etp20g", "etp20h"] + } + }, + "Ethernet160": { + "index": "21,21,21,21,21,21,21,21", + "lanes": "160,161,162,163,164,165,166,167,", + "breakout_modes": { + "1x400G": ["etp21"], + "2x400G[200G]": ["etp21a", "etp21b"], + "4x200G[100G]": ["etp21a", "etp21b", "etp21c", "etp21d"], + "8x100G[50G]": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e", "etp21f", "etp21g", "etp21h"] + } + }, + "Ethernet168": { + "index": "22,22,22,22,22,22,22,22", + "lanes": "168,169,170,171,172,173,174,175,", + "breakout_modes": { + "1x400G": ["etp22"], + "2x400G[200G]": ["etp22a", "etp22b"], + "4x200G[100G]": ["etp22a", "etp22b", "etp22c", "etp22d"], + "8x100G[50G]": ["etp22a", "etp22b", "etp22c", "etp22d", "etp22e", "etp22f", "etp22g", "etp22h"] + } + }, + "Ethernet176": { + "index": "23,23,23,23,23,23,23,23", + "lanes": "176,177,178,179,180,181,182,183,", + "breakout_modes": { + "1x400G": ["etp23"], + "2x400G[200G]": ["etp23a", "etp23b"], + "4x200G[100G]": ["etp23a", "etp23b", "etp23c", "etp23d"], + "8x100G[50G]": ["etp23a", "etp23b", "etp23c", "etp23d", "etp23e", "etp23f", "etp23g", "etp23h"] + } + }, + "Ethernet184": { + "index": "24,24,24,24,24,24,24,24", + "lanes": "184,185,186,187,188,189,190,191,", + "breakout_modes": { + "1x400G": ["etp24"], + "2x400G[200G]": ["etp24a", "etp24b"], + "4x200G[100G]": ["etp24a", "etp24b", "etp24c", "etp24d"], + "8x100G[50G]": ["etp24a", "etp24b", "etp24c", "etp24d", "etp24e", "etp24f", "etp24g", "etp24h"] + } + }, + "Ethernet192": { + "index": "25,25,25,25,25,25,25,25", + "lanes": "192,193,194,195,196,197,198,199,", + "breakout_modes": { + "1x400G": ["etp25"], + "2x400G[200G]": ["etp25a", "etp25b"], + "4x200G[100G]": ["etp25a", "etp25b", "etp25c", "etp25d"], + "8x100G[50G]": ["etp25a", "etp25b", "etp25c", "etp25d", "etp25e", "etp25f", "etp25g", "etp25h"] + } + }, + "Ethernet200": { + "index": "26,26,26,26,26,26,26,26", + "lanes": "200,201,202,203,204,205,206,207,", + "breakout_modes": { + "1x400G": ["etp26"], + "2x400G[200G]": ["etp26a", "etp26b"], + "4x200G[100G]": ["etp26a", "etp26b", "etp26c", "etp26d"], + "8x100G[50G]": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e", "etp26f", "etp26g", "etp26h"] + } + }, + "Ethernet208": { + "index": "27,27,27,27,27,27,27,27", + "lanes": "208,209,210,211,212,213,214,215,", + "breakout_modes": { + "1x400G": ["etp27"], + "2x400G[200G]": ["etp27a", "etp27b"], + "4x200G[100G]": ["etp27a", "etp27b", "etp27c", "etp27d"], + "8x100G[50G]": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e", "etp27f", "etp27g", "etp27h"] + } + }, + "Ethernet216": { + "index": "28,28,28,28,28,28,28,28", + "lanes": "216,217,218,219,220,221,222,223,", + "breakout_modes": { + "1x400G": ["etp28"], + "2x400G[200G]": ["etp28a", "etp28b"], + "4x200G[100G]": ["etp28a", "etp28b", "etp28c", "etp28d"], + "8x100G[50G]": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e", "etp28f", "etp28g", "etp28h"] + } + }, + "Ethernet224": { + "index": "29,29,29,29,29,29,29,29", + "lanes": "224,225,226,227,228,229,230,231,", + "breakout_modes": { + "1x400G": ["etp29"], + "2x400G[200G]": ["etp29a", "etp29b"], + "4x200G[100G]": ["etp29a", "etp29b", "etp29c", "etp29d"], + "8x100G[50G]": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e", "etp29f", "etp29g", "etp29h"] + } + }, + "Ethernet232": { + "index": "30,30,30,30,30,30,30,30", + "lanes": "232,233,234,235,236,237,238,239,", + "breakout_modes": { + "1x400G": ["etp30"], + "2x400G[200G]": ["etp30a", "etp30b"], + "4x200G[100G]": ["etp30a", "etp30b", "etp30c", "etp30d"], + "8x100G[50G]": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e", "etp30f", "etp30g", "etp30h"] + } + }, + "Ethernet240": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "240,241,242,243,244,245,246,247,", + "breakout_modes": { + "1x400G": ["etp31"], + "2x400G[200G]": ["etp31a", "etp31b"], + "4x200G[100G]": ["etp31a", "etp31b", "etp31c", "etp31d"], + "8x100G[50G]": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e", "etp31f", "etp31g", "etp31h"] + } + }, + "Ethernet248": { + "index": "32,32,32,32,32,32,32,32", + "lanes": "248,249,250,251,252,253,254,255,", + "breakout_modes": { + "1x400G": ["etp32"], + "2x400G[200G]": ["etp32a", "etp32b"], + "4x200G[100G]": ["etp32a", "etp32b", "etp32c", "etp32d"], + "8x100G[50G]": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e", "etp32f", "etp32g", "etp32h"] + } + }, + "Ethernet256": { + "index": "33,33,33,33,33,33,33,33", + "lanes": "256,257,258,259,260,261,262,263,", + "breakout_modes": { + "1x400G": ["etp33"], + "2x400G[200G]": ["etp33a", "etp33b"], + "4x200G[100G]": ["etp33a", "etp33b", "etp33c", "etp33d"], + "8x100G[50G]": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e", "etp33f", "etp33g", "etp33h"] + } + }, + "Ethernet264": { + "index": "34,34,34,34,34,34,34,34", + "lanes": "264,265,266,267,268,269,270,271,", + "breakout_modes": { + "1x400G": ["etp34"], + "2x400G[200G]": ["etp34a", "etp34b"], + "4x200G[100G]": ["etp34a", "etp34b", "etp34c", "etp34d"], + "8x100G[50G]": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e", "etp34f", "etp34g", "etp34h"] + } + }, + "Ethernet272": { + "index": "35,35,35,35,35,35,35,35", + "lanes": "272,273,274,275,276,277,278,279,", + "breakout_modes": { + "1x400G": ["etp35"], + "2x400G[200G]": ["etp35a", "etp35b"], + "4x200G[100G]": ["etp35a", "etp35b", "etp35c", "etp35d"], + "8x100G[50G]": ["etp35a", "etp35b", "etp35c", "etp35d", "etp35e", "etp35f", "etp35g", "etp35h"] + } + }, + "Ethernet280": { + "index": "36,36,36,36,36,36,36,36", + "lanes": "280,281,282,283,284,285,286,287,", + "breakout_modes": { + "1x400G": ["etp36"], + "2x400G[200G]": ["etp36a", "etp36b"], + "4x200G[100G]": ["etp36a", "etp36b", "etp36c", "etp36d"], + "8x100G[50G]": ["etp36a", "etp36b", "etp36c", "etp36d", "etp36e", "etp36f", "etp36g", "etp36h"] + } + }, + "Ethernet288": { + "index": "37,37,37,37,37,37,37,37", + "lanes": "288,289,290,291,292,293,294,295,", + "breakout_modes": { + "1x400G": ["etp37"], + "2x400G[200G]": ["etp37a", "etp37b"], + "4x200G[100G]": ["etp37a", "etp37b", "etp37c", "etp37d"], + "8x100G[50G]": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e", "etp37f", "etp37g", "etp37h"] + } + }, + "Ethernet296": { + "index": "38,38,38,38,38,38,38,38", + "lanes": "296,297,298,299,300,301,302,303,", + "breakout_modes": { + "1x400G": ["etp38"], + "2x400G[200G]": ["etp38a", "etp38b"], + "4x200G[100G]": ["etp38a", "etp38b", "etp38c", "etp38d"], + "8x100G[50G]": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e", "etp38f", "etp38g", "etp38h"] + } + }, + "Ethernet304": { + "index": "39,39,39,39,39,39,39,39", + "lanes": "304,305,306,307,308,309,310,311,", + "breakout_modes": { + "1x400G": ["etp39"], + "2x400G[200G]": ["etp39a", "etp39b"], + "4x200G[100G]": ["etp39a", "etp39b", "etp39c", "etp39d" ], + "8x100G[50G]": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e", "etp39f", "etp39g", "etp39h"] + } + }, + "Ethernet312": { + "index": "40,40,40,40,40,40,40,40", + "lanes": "312,313,314,315,316,317,318,319,", + "breakout_modes": { + "1x400G": ["etp40"], + "2x400G[200G]": ["etp40a", "etp40b"], + "4x200G[100G]": ["etp40a", "etp40b", "etp40c", "etp40d"], + "8x100G[50G]": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e", "etp40f", "etp40g", "etp40h"] + } + }, + "Ethernet320": { + "index": "41,41,41,41,41,41,41,41", + "lanes": "320,321,322,323,324,325,326,327,", + "breakout_modes": { + "1x400G": ["etp41"], + "2x400G[200G]": ["etp41a", "etp41b"], + "4x200G[100G]": ["etp41a", "etp41b", "etp41c", "etp41d"], + "8x100G[50G]": ["etp41a", "etp41b", "etp41c", "etp41d", "etp41e", "etp41f", "etp41g", "etp41h"] + } + }, + "Ethernet328": { + "index": "42,42,42,42,42,42,42,42", + "lanes": "328,329,330,331,332,333,334,335,", + "breakout_modes": { + "1x400G": ["etp42"], + "2x400G[200G]": ["etp42a", "etp42b"], + "4x200G[100G]": ["etp42a", "etp42b", "etp42c", "etp42d"], + "8x100G[50G]": ["etp42a", "etp42b", "etp42c", "etp42d", "etp42e", "etp42f", "etp42g", "etp42h"] + } + }, + "Ethernet336": { + "index": "43,43,43,43,43,43,43,43", + "lanes": "336,337,338,339,340,341,342,343,", + "breakout_modes": { + "1x400G": ["etp43"], + "2x400G[200G]": ["etp43a", "etp43b"], + "4x200G[100G]": ["etp43a", "etp43b", "etp43c", "etp43d"], + "8x100G[50G]": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e", "etp43f", "etp43g", "etp43h"] + } + }, + "Ethernet344": { + "index": "44,44,44,44,44,44,44,44", + "lanes": "344,345,346,347,348,349,350,351,", + "breakout_modes": { + "1x400G": ["etp44"], + "2x400G[200G]": ["etp44a", "etp44b"], + "4x200G[100G]": ["etp44a", "etp44b", "etp44c", "etp44d"], + "8x100G[50G]": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e", "etp44f", "etp44g", "etp44h"] + } + }, + "Ethernet352": { + "index": "45,45,45,45,45,45,45,45", + "lanes": "352,353,354,355,356,357,358,359,", + "breakout_modes": { + "1x400G": ["etp45"], + "2x400G[200G]": ["etp45a", "etp45b"], + "4x200G[100G]": ["etp45a", "etp45b", "etp45c", "etp45d"], + "8x100G[50G]": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e", "etp45f", "etp45g", "etp45h"] + } + }, + "Ethernet360": { + "index": "46,46,46,46,46,46,46,46", + "lanes": "360,361,362,363,364,365,366,367,", + "breakout_modes": { + "1x400G": ["etp46"], + "2x400G[200G]": ["etp46a", "etp46b"], + "4x200G[100G]": ["etp46a", "etp46b", "etp46c", "etp46d"], + "8x100G[50G]": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e", "etp46f", "etp46g", "etp46h"] + } + }, + "Ethernet368": { + "index": "47,47,47,47,47,47,47,47", + "lanes": "368,369,370,371,372,373,374,375,", + "breakout_modes": { + "1x400G": ["etp47"], + "2x400G[200G]": ["etp47a", "etp47b"], + "4x200G[100G]": ["etp47a", "etp47b", "etp47c", "etp47d"], + "8x100G[50G]": ["etp47a", "etp47b","etp47c", "etp47d", "etp47e", "etp47f", "etp47g", "etp47h"] + } + }, + "Ethernet376": { + "index": "48,48,48,48,48,48,48,48", + "lanes": "376,377,378,379,380,381,382,383,", + "breakout_modes": { + "1x400G": ["etp48"], + "2x400G[200G]": ["etp48a", "etp48b"], + "4x200G[100G]": ["etp48a", "etp48b", "etp48c", "etp48d"], + "8x100G[50G]": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e", "etp48f", "etp48g", "etp48h"] + } + }, + "Ethernet384": { + "index": "49,49,49,49,49,49,49,49", + "lanes": "384,385,386,387,388,389,390,391,", + "breakout_modes": { + "1x400G": ["etp49"], + "2x400G[200G]": ["etp49a", "etp49b"], + "4x200G[100G]": ["etp49a", "etp49b", "etp49c", "etp49d"], + "8x100G[50G]": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e", "etp49f", "etp49g", "etp49h"] + } + }, + "Ethernet392": { + "index": "50,50,50,50,50,50,50,50", + "lanes": "392,393,394,395,396,397,398,399,", + "breakout_modes": { + "1x400G": ["etp50"], + "2x400G[200G]": ["etp50a", "etp50b"], + "4x200G[100G]": ["etp50a", "etp50b", "etp50c", "etp50d"], + "8x100G[50G]": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e", "etp50f", "etp50g", "etp50h"] + } + }, + "Ethernet400": { + "index": "51,51,51,51,51,51,51,51", + "lanes": "400,401,402,403,404,405,406,407,", + "breakout_modes": { + "1x400G": ["etp51"], + "2x400G[200G]": ["etp51a", "etp51b"], + "4x200G[100G]": ["etp51a", "etp51b", "etp51c", "etp51d"], + "8x100G[50G]": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e", "etp51f", "etp51g", "etp51h"] + } + }, + "Ethernet408": { + "index": "52,52,52,52,52,52,52,52", + "lanes": "408,409,410,411,412,413,414,415,", + "breakout_modes": { + "1x400G": ["etp52"], + "2x400G[200G]": ["etp52a", "etp52b"], + "4x200G[100G]": ["etp52a", "etp52b", "etp52c", "etp52d"], + "8x100G[50G]": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e", "etp52f", "etp52g", "etp52h"] + } + }, + "Ethernet416": { + "index": "53,53,53,53,53,53,53,53", + "lanes": "416,417,418,419,420,421,422,423,", + "breakout_modes": { + "1x400G": ["etp53"], + "2x400G[200G]": ["etp53a", "etp53b"], + "4x200G[100G]": ["etp53a", "etp53b", "etp53c", "etp53d"], + "8x100G[50G]": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e", "etp53f", "etp53g", "etp53h"] + } + }, + "Ethernet424": { + "index": "54,54,54,54,54,54,54,54", + "lanes": "424,425,426,427,428,429,430,431,", + "breakout_modes": { + "1x400G": ["etp54"], + "2x400G[200G]": ["etp54a", "etp54b"], + "4x200G[100G]": ["etp54a", "etp54b", "etp54c", "etp54d"], + "8x100G[50G]": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e", "etp54f", "etp54g", "etp54h"] + } + }, + "Ethernet432": { + "index": "55,55,55,55,55,55,55,55", + "lanes": "432,433,434,435,436,437,438,439,", + "breakout_modes": { + "1x400G": ["etp55"], + "2x400G[200G]": ["etp55a", "etp55b"], + "4x200G[100G]": ["etp55a", "etp55b", "etp55c", "etp55d"], + "8x100G[50G]": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e", "etp55f", "etp55g", "etp55h"] + } + }, + "Ethernet440": { + "index": "56,56,56,56,56,56,56,56", + "lanes": "440,441,442,443,444,445,446,447,", + "breakout_modes": { + "1x400G": ["etp56"], + "2x400G[200G]": ["etp56a", "etp56b"], + "4x200G[100G]": ["etp56a", "etp56b", "etp56c", "etp56d"], + "8x100G[50G]": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e", "etp56f", "etp56g", "etp56h"] + } + }, + "Ethernet448": { + "index": "57,57,57,57,57,57,57,57", + "lanes": "448,449,450,451,452,453,454,455,", + "breakout_modes": { + "1x400G": ["etp57"], + "2x400G[200G]": ["etp57a", "etp57b"], + "4x200G[100G]": ["etp57a", "etp57b", "etp57c", "etp57d"], + "8x100G[50G]": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e", "etp57f", "etp57g", "etp57h"] + } + }, + "Ethernet456": { + "index": "58,58,58,58,58,58,58,58", + "lanes": "456,457,458,459,460,461,462,463,", + "breakout_modes": { + "1x400G": ["etp58"], + "2x400G[200G]": ["etp58a", "etp58b"], + "4x200G[100G]": ["etp58a", "etp58b", "etp58c", "etp58d"], + "8x100G[50G]": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e", "etp58f", "etp58g", "etp58h"] + } + }, + "Ethernet464": { + "index": "59,59,59,59,59,59,59,59", + "lanes": "464,465,466,467,468,469,470,471,", + "breakout_modes": { + "1x400G": ["etp59"], + "2x400G[200G]": ["etp59a", "etp59b"], + "4x200G[100G]": ["etp59a", "etp59b", "etp59c", "etp59d"], + "8x100G[50G]": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e", "etp59f", "etp59g", "etp59h"] + } + }, + "Ethernet472": { + "index": "60,60,60,60,60,60,60,60", + "lanes": "472,473,474,475,476,477,478,479,", + "breakout_modes": { + "1x400G": ["etp60"], + "2x400G[200G]": ["etp60a", "etp60b"], + "4x200G[100G]": ["etp60a", "etp60b", "etp60c", "etp60d"], + "8x100G[50G]": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e", "etp60f", "etp60g", "etp60h"] + } + }, + "Ethernet480": { + "index": "61,61,61,61,61,61,61,61", + "lanes": "480,481,482,483,484,485,486,487,", + "breakout_modes": { + "1x400G": ["etp61"], + "2x400G[200G]": ["etp61a", "etp61b"], + "4x200G[100G]": ["etp61a", "etp61b", "etp61c", "etp61d"], + "8x100G[50G]": ["etp61a", "etp61b", "etp61c", "etp61d", "etp61e", "etp61f", "etp61g", "etp61h"] + } + }, + "Ethernet488": { + "index": "62,62,62,62,62,62,62,62", + "lanes": "488,489,490,491,492,493,494,495,", + "breakout_modes": { + "1x400G": ["etp62"], + "2x400G[200G]": ["etp62a", "etp62b"], + "4x200G[100G]": ["etp62a", "etp62b", "etp62c", "etp62d"], + "8x100G[50G]": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e", "etp62f", "etp62g", "etp62h"] + } + }, + "Ethernet496": { + "index": "63,63,63,63,63,63,63,63", + "lanes": "496,497,498,499,500,501,502,503,", + "breakout_modes": { + "1x400G": ["etp63"], + "2x400G[200G]": ["etp63a", "etp63b"], + "4x200G[100G]": ["etp63a", "etp63b", "etp63c", "etp63d"], + "8x100G[50G]": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e", "etp63f", "etp63g", "etp63h"] + } + }, + "Ethernet504": { + "index": "64,64,64,64,64,64,64,64", + "lanes": "504,505,506,507,508,509,510,511,", + "breakout_modes": { + "1x400G": ["etp64"], + "2x400G[200G]": ["etp64a", "etp64b"], + "4x200G[100G]": ["etp64a", "etp64b", "etp64c", "etp64d"], + "8x100G[50G]": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e", "etp64f", "etp64g", "etp64h"] + } + }, + "Ethernet512": { + "index": "65", + "lanes": "512", + "breakout_modes": { + "1x25G[10G]": ["etp65"] + } + }, + "Ethernet520": { + "index": "66", + "lanes": "520", + "breakout_modes": { + "1x25G[10G]": ["etp66"] + } + } + } +} + diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform_asic b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform_asic new file mode 100644 index 000000000000..70c074885557 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform_asic @@ -0,0 +1 @@ +mellanox diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/eeprom.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/eeprom.py new file mode 120000 index 000000000000..b4e2a6a61671 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/eeprom.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/eeprom.py \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/psuutil.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/psuutil.py new file mode 120000 index 000000000000..9f724238a8d5 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/psuutil.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/psuutil.py \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmget.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmget.py new file mode 120000 index 000000000000..2e84f435abd9 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmget.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmset.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmset.py new file mode 120000 index 000000000000..6a88bac30467 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfpreset.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfpreset.py new file mode 120000 index 000000000000..fef2063e3496 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfpreset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfpreset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfputil.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfputil.py new file mode 120000 index 000000000000..45909b880fc9 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfputil.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfputil.py \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pmon_daemon_control.json new file mode 100644 index 000000000000..dd83c2db12c5 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pmon_daemon_control.json @@ -0,0 +1,7 @@ +{ + "skip_ledd": true, + "skip_xcvrd": true, + "skip_psud": true, + "skip_pcied": true, + "skip_thermalctld": true +} diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json new file mode 120000 index 000000000000..98df66c27ca5 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/port_config.ini b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/port_config.ini new file mode 100755 index 000000000000..46414e44002e --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/port_config.ini @@ -0,0 +1,53 @@ +# name lanes alias index speed +Ethernet1 26 gigabitE0/1 0 1000 +Ethernet2 25 gigabitE0/2 1 1000 +Ethernet3 28 gigabitE0/3 2 1000 +Ethernet4 27 gigabitE0/4 3 1000 +Ethernet5 30 gigabitE0/5 4 1000 +Ethernet6 29 gigabitE0/6 5 1000 +Ethernet7 32 gigabitE0/7 6 1000 +Ethernet8 31 gigabitE0/8 7 1000 +Ethernet9 34 gigabitE0/9 8 1000 +Ethernet10 33 gigabitE0/10 9 1000 +Ethernet11 36 gigabitE0/11 10 1000 +Ethernet12 35 gigabitE0/12 11 1000 +Ethernet13 38 gigabitE0/13 12 1000 +Ethernet14 37 gigabitE0/14 13 1000 +Ethernet15 40 gigabitE0/15 14 1000 +Ethernet16 39 gigabitE0/16 15 1000 +Ethernet17 42 gigabitE0/17 16 1000 +Ethernet18 41 gigabitE0/18 17 1000 +Ethernet19 44 gigabitE0/19 18 1000 +Ethernet20 43 gigabitE0/20 19 1000 +Ethernet21 50 gigabitE0/21 20 1000 +Ethernet22 49 gigabitE0/22 21 1000 +Ethernet23 52 gigabitE0/23 22 1000 +Ethernet24 51 gigabitE0/24 23 1000 +Ethernet25 1 gigabitE0/25 24 1000 +Ethernet26 2 gigabitE0/26 25 1000 +Ethernet27 3 gigabitE0/27 26 1000 +Ethernet28 4 gigabitE0/28 27 1000 +Ethernet29 5 gigabitE0/29 28 1000 +Ethernet30 6 gigabitE0/30 29 1000 +Ethernet31 7 gigabitE0/31 30 1000 +Ethernet32 8 gigabitE0/32 31 1000 +Ethernet33 9 gigabitE0/33 32 1000 +Ethernet34 10 gigabitE0/34 33 1000 +Ethernet35 11 gigabitE0/35 34 1000 +Ethernet36 12 gigabitE0/36 35 1000 +Ethernet37 13 gigabitE0/37 36 1000 +Ethernet38 14 gigabitE0/38 37 1000 +Ethernet39 15 gigabitE0/39 38 1000 +Ethernet40 16 gigabitE0/40 39 1000 +Ethernet41 17 gigabitE0/41 40 1000 +Ethernet42 18 gigabitE0/42 41 1000 +Ethernet43 19 gigabitE0/43 42 1000 +Ethernet44 20 gigabitE0/44 43 1000 +Ethernet45 21 gigabitE0/45 44 1000 +Ethernet46 22 gigabitE0/46 45 1000 +Ethernet47 23 gigabitE0/47 46 1000 +Ethernet48 24 gigabitE0/48 47 1000 +Ethernet49 58 twentyfiveGigE0/1 48 25000 +Ethernet50 57 twentyfiveGigE0/2 49 25000 +Ethernet51 60 twentyfiveGigE0/3 50 25000 +Ethernet52 59 twentyfiveGigE0/4 51 25000 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/sai.profile b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/sai.profile new file mode 100755 index 000000000000..158552500fc6 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-m2-w6510-48gt4v-48x1G+4x25G.config.bcm diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/td3-m2-w6510-48gt4v-48x1G+4x25G.config.bcm b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/td3-m2-w6510-48gt4v-48x1G+4x25G.config.bcm new file mode 100644 index 000000000000..9423645cf1e6 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/td3-m2-w6510-48gt4v-48x1G+4x25G.config.bcm @@ -0,0 +1,251 @@ +sai_load_hw_config=/usr/share/sonic/platform/cancun/sdk6.5.24/ +sai_postinit_cmd_file=/usr/share/sonic/platform/postinit_cmd_file.soc +sai_preinit_cmd_file=/usr/share/sonic/platform/preinit_cmd_file.soc + +#Basic configuration +cache_coherency_check=0 +core_clock_to_pm_clock_factor=1 +#core_clock_frequency=495 +core_clock_frequency=445 +flowtracker_ipfix_observation_domain_id=1 +flowtracker_num_unique_user_entry_keys=10 +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=0x1 +l2delete_chunks=4096 +l2_mem_entries=32768 +#L2MODE_POLL for L2X thread +l2xmsg_mode=0 +l3_alpm_enable=2 +l3_max_ecmp_mode=1 +l3_mem_entries=16384 +os=unix +port_flex_enable=1 + +#fix No resources for operation +stable_size=200000000 +scache_filename=/var/warmboot/wbscache +stable_location=3 +warmboot_knet_shutdown_mode=1 + +#RDMA +sai_pfc_defaults_disable=1 +sai_optimized_mmu=1 + +#ACL wb count +ctr_evict_enable=0 + +#tcam optimization for svi +sai_nbr_bcast_ifp_optimized=2 +svi_my_station_optimization=1 + +#support rif stats +sai_stats_support_mask=0x1 + +pbmp_xport_xe=0x001FFFFFFFFFFFFE + +#GPORT0 +portmap_1.0=1:1 +phy_port_primary_and_offset_1=0x0100 +portmap_2.0=2:1 +phy_port_primary_and_offset_2=0x0101 +portmap_3.0=3:1 +phy_port_primary_and_offset_3=0x0102 +portmap_4.0=4:1 +phy_port_primary_and_offset_4=0x0103 + +portmap_5.0=5:1 +phy_port_primary_and_offset_5=0x0500 +portmap_6.0=6:1 +phy_port_primary_and_offset_6=0x0501 +portmap_7.0=7:1 +phy_port_primary_and_offset_7=0x0502 +portmap_8.0=8:1 +phy_port_primary_and_offset_8=0x0503 + +#GPORT1 +portmap_9.0=9:1 +phy_port_primary_and_offset_9=0x0900 +portmap_10.0=10:1 +phy_port_primary_and_offset_10=0x0901 +portmap_11.0=11:1 +phy_port_primary_and_offset_11=0x0902 +portmap_12.0=12:1 +phy_port_primary_and_offset_12=0x0903 +portmap_13.0=13:1 +phy_port_primary_and_offset_13=0x0d00 +portmap_14.0=14:1 +phy_port_primary_and_offset_14=0x0d01 +portmap_15.0=15:1 +phy_port_primary_and_offset_15=0x0d02 +portmap_16.0=16:1 +phy_port_primary_and_offset_16=0x0d03 + +#GPORT2 +portmap_17.0=17:1 +phy_port_primary_and_offset_17=0x1100 +portmap_18.0=18:1 +phy_port_primary_and_offset_18=0x1101 +portmap_19.0=19:1 +phy_port_primary_and_offset_19=0x1102 +portmap_20.0=20:1 +phy_port_primary_and_offset_20=0x1103 +portmap_21.0=21:1 +phy_port_primary_and_offset_21=0x1500 +portmap_22.0=22:1 +phy_port_primary_and_offset_22=0x1501 +portmap_23.0=23:1 +phy_port_primary_and_offset_23=0x1502 +portmap_24.0=24:1 +phy_port_primary_and_offset_24=0x1503 + +#PM4x10Q0 + +port_phy_addr_25=0x21 +port_phy_addr_26=0x22 +port_phy_addr_27=0x23 +port_phy_addr_28=0x24 +port_phy_addr_29=0x25 +port_phy_addr_30=0x26 +port_phy_addr_31=0x27 +port_phy_addr_32=0x28 + +port_phy_addr_33=0x2a +port_phy_addr_34=0x2b +port_phy_addr_35=0x2c +port_phy_addr_36=0x2d +port_phy_addr_37=0x2e +port_phy_addr_38=0x2f +port_phy_addr_39=0x30 +port_phy_addr_40=0x31 + +port_phy_addr_41=0x33 +port_phy_addr_42=0x34 +port_phy_addr_43=0x35 +port_phy_addr_44=0x36 +port_phy_addr_45=0x37 +port_phy_addr_46=0x38 +port_phy_addr_47=0x39 +port_phy_addr_48=0x3a + +phy_port_primary_and_offset_25=0x0100 +phy_port_primary_and_offset_26=0x0101 +phy_port_primary_and_offset_27=0x0102 +phy_port_primary_and_offset_28=0x0103 +phy_port_primary_and_offset_29=0x0104 +phy_port_primary_and_offset_30=0x0105 +phy_port_primary_and_offset_31=0x0106 +phy_port_primary_and_offset_32=0x0107 + +phy_port_primary_and_offset_33=0x0a00 +phy_port_primary_and_offset_34=0x0a01 +phy_port_primary_and_offset_35=0x0a02 +phy_port_primary_and_offset_36=0x0a03 +phy_port_primary_and_offset_37=0x0a04 +phy_port_primary_and_offset_38=0x0a05 +phy_port_primary_and_offset_39=0x0a06 +phy_port_primary_and_offset_40=0x0a07 + +phy_port_primary_and_offset_41=0x1300 +phy_port_primary_and_offset_42=0x1301 +phy_port_primary_and_offset_43=0x1302 +phy_port_primary_and_offset_44=0x1303 +phy_port_primary_and_offset_45=0x1304 +phy_port_primary_and_offset_46=0x1305 +phy_port_primary_and_offset_47=0x1306 +phy_port_primary_and_offset_48=0x1307 + + +port_gmii_mode{25}=1 +portmap_25.0=25:1 +portmap_26.0=26:1 +portmap_27.0=27:1 +portmap_28.0=28:1 +portmap_29.0=29:1 +portmap_30.0=30:1 +portmap_31.0=31:1 +portmap_32.0=32:1 +portmap_33.0=33:1 +portmap_34.0=34:1 +portmap_35.0=35:1 +portmap_36.0=36:1 +portmap_37.0=37:1 +portmap_38.0=38:1 +portmap_39.0=39:1 +portmap_40.0=40:1 + +#PM4x10Q1 +port_gmii_mode{41}=1 +portmap_41.0=41:1 +portmap_42.0=42:1 +portmap_43.0=43:1 +portmap_44.0=44:1 +portmap_45.0=49:1 +portmap_46.0=50:1 +portmap_47.0=51:1 +portmap_48.0=52:1 + +#PM4x25 +portmap_49.0=57:25 +portmap_50.0=58:25 +portmap_51.0=59:25 +portmap_52.0=60:25 + +#Gport0-5 gt +dport_map_port_1=25 +dport_map_port_2=26 +dport_map_port_3=27 +dport_map_port_4=28 +dport_map_port_5=29 +dport_map_port_6=30 +dport_map_port_7=31 +dport_map_port_8=32 +dport_map_port_9=33 +dport_map_port_10=34 +dport_map_port_11=35 +dport_map_port_12=36 +dport_map_port_13=37 +dport_map_port_14=38 +dport_map_port_15=39 +dport_map_port_16=40 +dport_map_port_17=41 +dport_map_port_18=42 +dport_map_port_19=43 +dport_map_port_20=44 +dport_map_port_21=45 +dport_map_port_22=46 +dport_map_port_23=47 +dport_map_port_24=48 + +#PM4x10Q0 gt +dport_map_port_25=2 +dport_map_port_26=1 +dport_map_port_27=4 +dport_map_port_28=3 +dport_map_port_29=6 +dport_map_port_30=5 +dport_map_port_31=8 +dport_map_port_32=7 +dport_map_port_33=10 +dport_map_port_34=9 +dport_map_port_35=12 +dport_map_port_36=11 +dport_map_port_37=14 +dport_map_port_38=13 +dport_map_port_39=16 +dport_map_port_40=15 + +#PM4x10Q1 gt +dport_map_port_41=18 +dport_map_port_42=17 +dport_map_port_43=20 +dport_map_port_44=19 +dport_map_port_45=22 +dport_map_port_46=21 +dport_map_port_47=24 +dport_map_port_48=23 + +#PM4x25 fiber +dport_map_port_49=50 +dport_map_port_50=49 +dport_map_port_51=52 +dport_map_port_52=51 diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/cust_fru.py b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/cust_fru.py new file mode 100644 index 000000000000..940c722ce467 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/cust_fru.py @@ -0,0 +1,135 @@ +#!/usr/bin/python +# -*- coding: utf-8 -*- +import sys +import os + + +class CustFruException(Exception): + def __init__(self, message='custfrueerror', code=-100): + err = 'errcode: {0} message:{1}'.format(code, message) + Exception.__init__(self, err) + self.code = code + self.message = message + + +class CustFru(): + MAGIC_HEAD_INFO = 0x7a + + _CUST_MAGIC_OFFSET = 0 + _CUST_MAGIC_LEN = 1 + _CUST_VERSION_OFFSET = 1 + _CUST_VERSION_LEN = 6 + _CUST_CRC_OFFSET = 7 + _CUST_CRC_LEN = 1 + _CUST_PRODUCT_NAME_OFFSET = 10 + _CUST_PRODUCT_NAME_LEN = 17 + _CUST_MANUFACTURER_OFFSET = 27 + _CUST_MANUFACTURER_LEN = 7 + _CUST_SERIAL_NUMBER_OFFSET = 34 + _CUST_SERIAL_NUMBER_LEN = 25 + _CUST_INPUT_TYPE_OFFSET = 78 + _CUST_INPUT_TYPE_LEN = 2 + _CUST_INPUT_OFFSET = 86 + _CUST_INPUT_LEN = 15 + _CUST_OUTPUT_OFFSET = 108 + _CUST_OUTPUT_LEN = 11 + _CUST_POWER_OFFSET = 200 + _CUST_POWER_LEN = 10 + _CUST_MANUFACTURER_DATE_OFFSET = 210 + _CUST_MANUFACTURER_DATE_LEN = 3 + + def __init__(self): + self.magic = "" + self.version = "" + self.crc = "" + self.product_name = "" + self.manufacturer = "" + self.serial_number = "" + self.input_type = "" + self.input = "" + self.output = "" + self.power = "" + self.manufacturer_date = "" + + def checksum(self, v): + result = 0 + for item in v: + result += ord(item) + return (result & 0xff) + + def decode(self, e2): + # header + e2_index = 0 + head = ord(e2[0]) + if head != self.MAGIC_HEAD_INFO: + raise CustFruException("Customization fru eeprom head info error, head:0x%x" % head, -10) + self.magic = "0x%02x" % self.MAGIC_HEAD_INFO + + # version + version = "%s" % (e2[self._CUST_VERSION_OFFSET:self._CUST_VERSION_OFFSET + self._CUST_VERSION_LEN]) + self.version = version.replace("\xff", "").strip() + + # crc + crc_calc = self.checksum(e2[0:self._CUST_CRC_OFFSET]) + if crc_calc != ord(e2[self._CUST_CRC_OFFSET]): + raise CustFruException("Customization fru eeprom crc check error, calc: 0x%x, read: 0x%x" % (crc_calc, ord(e2[self._CUST_CRC_OFFSET])), -10) + self.crc = crc_calc + + # Product Name + product_name = "%s" % (e2[self._CUST_PRODUCT_NAME_OFFSET:self._CUST_PRODUCT_NAME_OFFSET + self._CUST_PRODUCT_NAME_LEN]) + self.product_name = product_name.replace("\xff", "").strip() + + # manufacturer + manufacturer = "%s" % (e2[self._CUST_MANUFACTURER_OFFSET:self._CUST_MANUFACTURER_OFFSET + self._CUST_MANUFACTURER_LEN]) + self.manufacturer = manufacturer.strip() + + # serial_number + serial_number = "%s" % (e2[self._CUST_SERIAL_NUMBER_OFFSET:self._CUST_SERIAL_NUMBER_OFFSET + self._CUST_SERIAL_NUMBER_LEN]) + self.serial_number = serial_number.strip() + + # input_type + input_type = "%s" % (e2[self._CUST_INPUT_TYPE_OFFSET:self._CUST_INPUT_TYPE_OFFSET + self._CUST_INPUT_TYPE_LEN]) + self.input_type = input_type.strip() + + # input + input = "%s" % (e2[self._CUST_INPUT_OFFSET:self._CUST_INPUT_OFFSET + self._CUST_INPUT_LEN]) + self.input = input.strip() + + # output + output = "%s" % (e2[self._CUST_OUTPUT_OFFSET:self._CUST_OUTPUT_OFFSET + self._CUST_OUTPUT_LEN]) + self.output = output.strip() + + # power + power = "%s" % (e2[self._CUST_POWER_OFFSET:self._CUST_POWER_OFFSET + self._CUST_POWER_LEN]) + self.power = power.replace("\xff", "").strip() + + # manufacturer_date + manufacturer_year = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET]) + 2000 + manufacturer_month = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET + 1]) + manufacturer_day = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET + 2]) + self.manufacturer_date = "%04d-%02d-%02d" % (manufacturer_year, manufacturer_month, manufacturer_day) + + return + + + def __str__(self): + formatstr = "Version : %s \n" \ + "Product Name : %s \n" \ + "Manufacturer : %s \n" \ + "Serial Number : %s \n" \ + "AC/DC Power Module : %s \n" \ + "INPUT : %s \n" \ + "OUTPUT : %s \n" \ + "POWER : %s \n" \ + "Manufacturer Date : %s \n" + str_tmp = formatstr % (self.version, + self.product_name, + self.manufacturer, + self.serial_number, + self.input_type, + self.input, + self.output, + self.power, + self.manufacturer_date) + return str_tmp.replace("\x00","") + diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/custom_led.bin new file mode 100755 index 000000000000..5cdcccbfdd88 Binary files /dev/null and b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/custom_led.bin differ diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/default_sku b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/default_sku new file mode 100755 index 000000000000..3987b26027f6 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/default_sku @@ -0,0 +1 @@ +M2-W6510-48GT4V l2 diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/dev.xml b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/dev.xml new file mode 100644 index 000000000000..20e53bc1fc28 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/dev.xml @@ -0,0 +1,190 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/dev_exhaust.xml b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/dev_exhaust.xml new file mode 100644 index 000000000000..a0939f5ba077 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/dev_exhaust.xml @@ -0,0 +1,190 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/fru.py b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/fru.py new file mode 100755 index 000000000000..f95164e03601 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/fru.py @@ -0,0 +1,961 @@ +#!/usr/bin/python3 +import collections +from datetime import datetime, timedelta +from bitarray import bitarray + + +__DEBUG__ = "N" + + +class FruException(Exception): + def __init__(self, message='fruerror', code=-100): + err = 'errcode: {0} message:{1}'.format(code, message) + Exception.__init__(self, err) + self.code = code + self.message = message + + +def e_print(err): + print("ERROR: " + err) + + +def d_print(debug_info): + if __DEBUG__ == "Y": + print(debug_info) + + +class FruUtil(): + @staticmethod + def decodeLength(value): + a = bitarray(8) + a.setall(True) + a[0:1] = 0 + a[1:2] = 0 + x = ord(a.tobytes()) + return x & ord(value) + + @staticmethod + def minToData(): + starttime = datetime(1996, 1, 1, 0, 0, 0) + endtime = datetime.now() + seconds = (endtime - starttime).total_seconds() + mins = seconds // 60 + m = int(round(mins)) + return m + + @staticmethod + def getTimeFormat(): + return datetime.now().strftime('%Y-%m-%d') + + @staticmethod + def getTypeLength(value): + if value is None or len(value) == 0: + return 0 + a = bitarray(8) + a.setall(False) + a[0:1] = 1 + a[1:2] = 1 + x = ord(a.tobytes()) + return x | len(value) + + @staticmethod + def checksum(b): + result = 0 + for item in b: + result += ord(item) + return (0x100 - (result & 0xff)) & 0xff + + +class BaseArea(object): + SUGGESTED_SIZE_COMMON_HEADER = 8 + SUGGESTED_SIZE_INTERNAL_USE_AREA = 72 + SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32 + SUGGESTED_SIZE_BOARD_INFO_AREA = 80 + SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80 + + INITVALUE = b'\x00' + resultvalue = INITVALUE * 256 + COMMON_HEAD_VERSION = b'\x01' + __childList = None + + def __init__(self, name="", size=0, offset=0): + self.__childList = [] + self._offset = offset + self.name = name + self._size = size + self._isPresent = False + self._data = b'\x00' * size + + @property + def childList(self): + return self.__childList + + @childList.setter + def childList(self, value): + self.__childList = value + + @property + def offset(self): + return self._offset + + @offset.setter + def offset(self, value): + self._offset = value + + @property + def size(self): + return self._size + + @size.setter + def size(self, value): + self._size = value + + @property + def data(self): + return self._data + + @data.setter + def data(self, value): + self._data = value + + @property + def isPresent(self): + return self._isPresent + + @isPresent.setter + def isPresent(self, value): + self._isPresent = value + + +class InternalUseArea(BaseArea): + pass + + +class ChassisInfoArea(BaseArea): + pass + + +class BoardInfoArea(BaseArea): + _boardTime = None + _fields = None + _mfg_date = None + areaversion = None + _boardversion = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "mfg_date : %s \n" \ + "boardManufacturer : %s \n" \ + "boardProductName : %s \n" \ + "boardSerialNumber : %s \n" \ + "boardPartNumber : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.boardversion), self.size, + self.language, self.getMfgRealData(), + self.boardManufacturer, self.boardProductName, + self.boardSerialNumber, self.boardPartNumber, + self.fruFileId) + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "boardextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["boardversion"] = ord(self.boardversion) + dic["boardlength"] = self.size + dic["boardlanguage"] = self.language + dic["boardmfg_date"] = self.getMfgRealData() + dic["boardManufacturer"] = self.boardManufacturer + dic["boardProductName"] = self.boardProductName + dic["boardSerialNumber"] = self.boardSerialNumber + dic["boardPartNumber"] = self.boardPartNumber + dic["boardfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] + index += 1 + d_print("decode length :%d class size:%d" % + ((ord(self.data[index]) * 8), self.size)) + index += 2 + + timetmp = self.data[index: index + 3] + self.mfg_date = ord(timetmp[0]) | ( + ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16) + d_print("decode getMfgRealData :%s" % self.getMfgRealData()) + index += 3 + + templen = FruUtil.decodeLength(self.data[index]) + self.boardManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardManufacturer:%s" % self.boardManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardProductName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardProductName:%s" % self.boardProductName) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardSerialNumber:%s" % self.boardSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardPartNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardPartNumber:%s" % self.boardPartNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if self.data[index] != chr(0xc1): + templen = FruUtil.decodeLength(self.data[index]) + tmpval = self.data[index + 1: index + templen + 1] + setattr(self, valtmp, tmpval) + index += templen + 1 + d_print("decode boardextra%d:%s" % (i, tmpval)) + else: + break + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("boardInfoArea version:%x" % ord(self.boardversion)) + d_print("boardInfoArea length:%d" % self.size) + d_print("boardInfoArea language:%x" % self.language) + self.mfg_date = FruUtil.minToData() + d_print("boardInfoArea mfg_date:%x" % self.mfg_date) + + self.data = chr(ord(self.boardversion)) + \ + chr(self.size // 8) + chr(self.language) + + self.data += chr(self.mfg_date & 0xFF) + self.data += chr((self.mfg_date >> 8) & 0xFF) + self.data += chr((self.mfg_date >> 16) & 0xFF) + + d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer) + typelength = FruUtil.getTypeLength(self.boardManufacturer) + self.data += chr(typelength) + self.data += self.boardManufacturer + + d_print("boardInfoArea boardProductName:%s" % self.boardProductName) + self.data += chr(FruUtil.getTypeLength(self.boardProductName)) + self.data += self.boardProductName + + d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber) + self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber)) + self.data += self.boardSerialNumber + + d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber) + self.data += chr(FruUtil.getTypeLength(self.boardPartNumber)) + self.data += self.boardPartNumber + + d_print("boardInfoArea fruFileId:%s" % self.fruFileId) + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + d_print("self data:%d" % len(self.data)) + d_print("self size:%d" % self.size) + d_print("adjust size:%d" % (self.size - len(self.data) - 1)) + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + + # checksum + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + def getMfgRealData(self): + starttime = datetime(1996, 1, 1, 0, 0, 0) + mactime = starttime + timedelta(minutes=self.mfg_date) + return mactime + + @property + def language(self): + self._language = 25 + return self._language + + @property + def mfg_date(self): + return self._mfg_date + + @mfg_date.setter + def mfg_date(self, val): + self._mfg_date = val + + @property + def boardversion(self): + self._boardversion = self.COMMON_HEAD_VERSION + return self._boardversion + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, val): + self._FRUFileID = val + + @property + def boardPartNumber(self): + return self._boardPartNumber + + @boardPartNumber.setter + def boardPartNumber(self, val): + self._boardPartNumber = val + + @property + def boardSerialNumber(self): + return self._boardSerialNumber + + @boardSerialNumber.setter + def boardSerialNumber(self, val): + self._boardSerialNumber = val + + @property + def boardProductName(self): + return self._boradProductName + + @boardProductName.setter + def boardProductName(self, val): + self._boradProductName = val + + @property + def boardManufacturer(self): + return self._boardManufacturer + + @boardManufacturer.setter + def boardManufacturer(self, val): + self._boardManufacturer = val + + @property + def boardTime(self): + return self._boardTime + + @boardTime.setter + def boardTime(self, val): + self._boardTime = val + + @property + def fields(self): + return self._fields + + @fields.setter + def fields(self, val): + self._fields = val + + +class ProductInfoArea(BaseArea): + _productManufacturer = None + _productAssetTag = None + _FRUFileID = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "productManufacturer : %s \n" \ + "productName : %s \n" \ + "productPartModelName: %s \n" \ + "productVersion : %s \n" \ + "productSerialNumber : %s \n" \ + "productAssetTag : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.areaversion), self.size, + self.language, self.productManufacturer, + self.productName, self.productPartModelName, + self.productVersion, self.productSerialNumber, + self.productAssetTag, self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "productextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["productversion"] = ord(self.areaversion) + dic["productlength"] = self.size + dic["productlanguage"] = self.language + dic["productManufacturer"] = self.productManufacturer + dic["productName"] = self.productName + dic["productPartModelName"] = self.productPartModelName + dic["productVersion"] = int(self.productVersion, 16) + dic["productSerialNumber"] = self.productSerialNumber + dic["productAssetTag"] = self.productAssetTag + dic["productfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] # 0 + index += 1 + d_print("decode length %d" % (ord(self.data[index]) * 8)) + d_print("class size %d" % self.size) + index += 2 + + templen = FruUtil.decodeLength(self.data[index]) + self.productManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productManufacturer:%s" % self.productManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.productName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productName:%s" % self.productName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productPartModelName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productPartModelName:%s" % self.productPartModelName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productVersion = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productVersion:%s" % self.productVersion) + + templen = FruUtil.decodeLength(self.data[index]) + self.productSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productSerialNumber:%s" % self.productSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.productAssetTag = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productAssetTag:%s" % self.productAssetTag) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if self.data[index] != chr(0xc1) and index < self.size - 1: + templen = FruUtil.decodeLength(self.data[index]) + if templen == 0: + break + tmpval = self.data[index + 1: index + templen + 1] + d_print("decode boardextra%d:%s" % (i, tmpval)) + setattr(self, valtmp, tmpval) + index += templen + 1 + else: + break + + @property + def productVersion(self): + return self._productVersion + + @productVersion.setter + def productVersion(self, name): + self._productVersion = name + + @property + def areaversion(self): + self._areaversion = self.COMMON_HEAD_VERSION + return self._areaversion + + @areaversion.setter + def areaversion(self, name): + self._areaversion = name + + @property + def language(self): + self._language = 25 + return self._language + + @property + def productManufacturer(self): + return self._productManufacturer + + @productManufacturer.setter + def productManufacturer(self, name): + self._productManufacturer = name + + @property + def productName(self): + return self._productName + + @productName.setter + def productName(self, name): + self._productName = name + + @property + def productPartModelName(self): + return self._productPartModelName + + @productPartModelName.setter + def productPartModelName(self, name): + self._productPartModelName = name + + @property + def productSerialNumber(self): + return self._productSerialNumber + + @productSerialNumber.setter + def productSerialNumber(self, name): + self._productSerialNumber = name + + @property + def productAssetTag(self): + return self._productAssetTag + + @productAssetTag.setter + def productAssetTag(self, name): + self._productAssetTag = name + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, name): + self._FRUFileID = name + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("product version:%x" % ord(self.areaversion)) + d_print("product length:%d" % self.size) + d_print("product language:%x" % self.language) + self.data = chr(ord(self.areaversion)) + \ + chr(self.size // 8) + chr(self.language) + + typelength = FruUtil.getTypeLength(self.productManufacturer) + self.data += chr(typelength) + self.data += self.productManufacturer + + self.data += chr(FruUtil.getTypeLength(self.productName)) + self.data += self.productName + + self.data += chr(FruUtil.getTypeLength(self.productPartModelName)) + self.data += self.productPartModelName + + self.data += chr(FruUtil.getTypeLength(self.productVersion)) + self.data += self.productVersion + + self.data += chr(FruUtil.getTypeLength(self.productSerialNumber)) + self.data += self.productSerialNumber + + self.data += chr(FruUtil.getTypeLength(self.productAssetTag)) + if self.productAssetTag is not None: + self.data += self.productAssetTag + + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea productextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + d_print("self.data:%d" % len(self.data)) + d_print("self.size:%d" % self.size) + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + +class MultiRecordArea(BaseArea): + pass + + +class Field(object): + + def __init__(self, fieldType="ASCII", fieldData=""): + self.fieldData = fieldData + self.fieldType = fieldType + + @property + def fieldType(self): + return self.fieldType + + @property + def fieldData(self): + return self.fieldData + + +class ipmifru(BaseArea): + _BoardInfoArea = None + _ProductInfoArea = None + _InternalUseArea = None + _ChassisInfoArea = None + _multiRecordArea = None + _productinfoAreaOffset = BaseArea.INITVALUE + _boardInfoAreaOffset = BaseArea.INITVALUE + _internalUserAreaOffset = BaseArea.INITVALUE + _chassicInfoAreaOffset = BaseArea.INITVALUE + _multiRecordAreaOffset = BaseArea.INITVALUE + _bindata = None + _bodybin = None + _version = BaseArea.COMMON_HEAD_VERSION + _zeroCheckSum = None + _frusize = 256 + + def __str__(self): + tmpstr = "" + if self.boardInfoArea.isPresent: + tmpstr += "\nboardinfoarea: \n" + tmpstr += self.boardInfoArea.__str__() + if self.productInfoArea.isPresent: + tmpstr += "\nproductinfoarea: \n" + tmpstr += self.productInfoArea.__str__() + return tmpstr + + def decodeBin(self, eeprom): + commonHead = eeprom[0:8] + d_print("decode version %x" % ord(commonHead[0])) + if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]): + raise FruException("HEAD VERSION error,not Fru format!", -10) + if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]): + strtemp = "check header checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(commonHead[0:7]), ord(commonHead[7])) + raise FruException(strtemp, -3) + if ord(commonHead[1]) != ord(self.INITVALUE): + d_print("Internal Use Area is present") + self.internalUseArea = InternalUseArea( + name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA) + self.internalUseArea.isPresent = True + self.internalUserAreaOffset = ord(commonHead[1]) + self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: ( + self.internalUserAreaOffset * 8 + self.internalUseArea.size)] + if ord(commonHead[2]) != ord(self.INITVALUE): + d_print("Chassis Info Area is present") + self.chassisInfoArea = ChassisInfoArea( + name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA) + self.chassisInfoArea.isPresent = True + self.chassicInfoAreaOffset = ord(commonHead[2]) + self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: ( + self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)] + if ord(commonHead[3]) != ord(self.INITVALUE): + self.boardInfoArea = BoardInfoArea( + name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA) + self.boardInfoArea.isPresent = True + self.boardInfoAreaOffset = ord(commonHead[3]) + self.boardInfoArea.size = ord( + eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8 + d_print("Board Info Area is present size:%d" % + (self.boardInfoArea.size)) + self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: ( + self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)] + if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]): + strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" % \ + (FruUtil.checksum( + self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.boardInfoArea.decodedata() + if ord(commonHead[4]) != ord(self.INITVALUE): + d_print("Product Info Area is present") + self.productInfoArea = ProductInfoArea( + name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA) + self.productInfoArea.isPresent = True + self.productinfoAreaOffset = ord(commonHead[4]) + d_print("length offset value: %02x" % + ord(eeprom[self.productinfoAreaOffset * 8 + 1])) + self.productInfoArea.size = ord( + eeprom[self.productinfoAreaOffset * 8 + 1]) * 8 + d_print("Product Info Area is present size:%d" % + (self.productInfoArea.size)) + + self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: ( + self.productinfoAreaOffset * 8 + self.productInfoArea.size)] + if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]): + strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.productInfoArea.decodedata() + if ord(commonHead[5]) != ord(self.INITVALUE): + self.multiRecordArea = MultiRecordArea( + name="MultiRecord record Area ") + d_print("MultiRecord record present") + self.multiRecordArea.isPresent = True + self.multiRecordAreaOffset = ord(commonHead[5]) + self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: ( + self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)] + + def initDefault(self): + self.version = self.COMMON_HEAD_VERSION + self.internalUserAreaOffset = self.INITVALUE + self.chassicInfoAreaOffset = self.INITVALUE + self.boardInfoAreaOffset = self.INITVALUE + self.productinfoAreaOffset = self.INITVALUE + self.multiRecordAreaOffset = self.INITVALUE + self.zeroCheckSum = self.INITVALUE + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + self.productInfoArea = None + self.internalUseArea = None + self.boardInfoArea = None + self.chassisInfoArea = None + self.multiRecordArea = None + # self.recalcute() + + @property + def version(self): + return self._version + + @version.setter + def version(self, name): + self._version = name + + @property + def internalUserAreaOffset(self): + return self._internalUserAreaOffset + + @internalUserAreaOffset.setter + def internalUserAreaOffset(self, obj): + self._internalUserAreaOffset = obj + + @property + def chassicInfoAreaOffset(self): + return self._chassicInfoAreaOffset + + @chassicInfoAreaOffset.setter + def chassicInfoAreaOffset(self, obj): + self._chassicInfoAreaOffset = obj + + @property + def productinfoAreaOffset(self): + return self._productinfoAreaOffset + + @productinfoAreaOffset.setter + def productinfoAreaOffset(self, obj): + self._productinfoAreaOffset = obj + + @property + def boardInfoAreaOffset(self): + return self._boardInfoAreaOffset + + @boardInfoAreaOffset.setter + def boardInfoAreaOffset(self, obj): + self._boardInfoAreaOffset = obj + + @property + def multiRecordAreaOffset(self): + return self._multiRecordAreaOffset + + @multiRecordAreaOffset.setter + def multiRecordAreaOffset(self, obj): + self._multiRecordAreaOffset = obj + + @property + def zeroCheckSum(self): + return self._zeroCheckSum + + @zeroCheckSum.setter + def zeroCheckSum(self, obj): + self._zeroCheckSum = obj + + @property + def productInfoArea(self): + return self._ProductInfoArea + + @productInfoArea.setter + def productInfoArea(self, obj): + self._ProductInfoArea = obj + + @property + def internalUseArea(self): + return self._InternalUseArea + + @internalUseArea.setter + def internalUseArea(self, obj): + self.internalUseArea = obj + + @property + def boardInfoArea(self): + return self._BoardInfoArea + + @boardInfoArea.setter + def boardInfoArea(self, obj): + self._BoardInfoArea = obj + + @property + def chassisInfoArea(self): + return self._ChassisInfoArea + + @chassisInfoArea.setter + def chassisInfoArea(self, obj): + self._ChassisInfoArea = obj + + @property + def multiRecordArea(self): + return self._multiRecordArea + + @multiRecordArea.setter + def multiRecordArea(self, obj): + self._multiRecordArea = obj + + @property + def bindata(self): + return self._bindata + + @bindata.setter + def bindata(self, obj): + self._bindata = obj + + @property + def bodybin(self): + return self._bodybin + + @bodybin.setter + def bodybin(self, obj): + self._bodybin = obj + + def recalcuteCommonHead(self): + self.bindata = "" + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + d_print("common Header %d" % self.offset) + d_print("fru eeprom size %d" % self._frusize) + if self.internalUseArea is not None and self.internalUseArea.isPresent: + self.internalUserAreaOffset = self.offset // 8 + self.offset += self.internalUseArea.size + d_print("internalUseArea is present offset:%d" % self.offset) + + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + self.chassicInfoAreaOffset = self.offset // 8 + self.offset += self.chassisInfoArea.size + d_print("chassisInfoArea is present offset:%d" % self.offset) + + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + self.boardInfoAreaOffset = self.offset // 8 + self.offset += self.boardInfoArea.size + d_print("boardInfoArea is present offset:%d" % self.offset) + d_print("boardInfoArea is present size:%d" % + self.boardInfoArea.size) + + if self.productInfoArea is not None and self.productInfoArea.isPresent: + self.productinfoAreaOffset = self.offset // 8 + self.offset += self.productInfoArea.size + d_print("productInfoArea is present offset:%d" % self.offset) + + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + self.multiRecordAreaOffset = self.offset // 8 + d_print("multiRecordArea is present offset:%d" % self.offset) + + if self.internalUserAreaOffset == self.INITVALUE: + self.internalUserAreaOffset = 0 + if self.productinfoAreaOffset == self.INITVALUE: + self.productinfoAreaOffset = 0 + if self.chassicInfoAreaOffset == self.INITVALUE: + self.chassicInfoAreaOffset = 0 + if self.boardInfoAreaOffset == self.INITVALUE: + self.boardInfoAreaOffset = 0 + if self.multiRecordAreaOffset == self.INITVALUE: + self.multiRecordAreaOffset = 0 + + self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset + - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff + d_print("zerochecksum:%x" % self.zeroCheckSum) + self.data = "" + self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr( + self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum) + + self.bindata = self.data + self.bodybin + totallen = len(self.bindata) + d_print("totallen %d" % totallen) + if totallen < self._frusize: + self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0])) + else: + raise FruException('bin data more than %d' % self._frusize, -2) + + def recalcutebin(self): + self.bodybin = "" + if self.internalUseArea is not None and self.internalUseArea.isPresent: + d_print("internalUseArea present") + self.bodybin += self.internalUseArea.data + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + d_print("chassisInfoArea present") + self.bodybin += self.chassisInfoArea.data + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + d_print("boardInfoArea present") + self.boardInfoArea.recalcute() + self.bodybin += self.boardInfoArea.data + if self.productInfoArea is not None and self.productInfoArea.isPresent: + d_print("productInfoAreapresent") + self.productInfoArea.recalcute() + self.bodybin += self.productInfoArea.data + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + d_print("multiRecordArea present") + self.bodybin += self.productInfoArea.data + + def recalcute(self, fru_eeprom_size=256): + self._frusize = fru_eeprom_size + self.recalcutebin() + self.recalcuteCommonHead() + + def setValue(self, area, field, value): + tmp_area = getattr(self, area, None) + if tmp_area is not None: + tmp_area.fruSetValue(field, value) diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/installer.conf b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/installer.conf new file mode 100644 index 000000000000..7fd2c7a28d4e --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt sdhci.debug_quirks2=0x1cc modprobe.blacklist=i2c_ismt,i2c_i801,r8169,spi_intel,spi_intel_platform,spi_intel_pci,pnd2_edac" +CONSOLE_PORT=0xe060 +CONSOLE_DEV=0 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/led_proc_init.soc b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/led_proc_init.soc new file mode 100755 index 000000000000..139597f9cb07 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/led_proc_init.soc @@ -0,0 +1,2 @@ + + diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/media_settings.json new file mode 100644 index 000000000000..182cb3d69cb0 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/media_settings.json @@ -0,0 +1,56 @@ +{ + "PORT_MEDIA_SETTINGS": { + "48": { + "Default": { + "pre1": { + "lane0": "0x0000000A" + }, + "main": { + "lane0": "0x00000041" + }, + "post1": { + "lane0": "0x00000014" + } + } + }, + "49": { + "Default": { + "pre1": { + "lane0": "0x0000000A" + }, + "main": { + "lane0": "0x00000041" + }, + "post1": { + "lane0": "0x00000014" + } + } + }, + "50": { + "Default": { + "pre1": { + "lane0": "0x0000000A" + }, + "main": { + "lane0": "0x00000041" + }, + "post1": { + "lane0": "0x00000014" + } + } + }, + "51": { + "Default": { + "pre1": { + "lane0": "0x0000000A" + }, + "main": { + "lane0": "0x00000041" + }, + "post1": { + "lane0": "0x00000014" + } + } + } + } +} \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/monitor.py b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/monitor.py new file mode 100755 index 000000000000..37ed2168e611 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/monitor.py @@ -0,0 +1,457 @@ +#!/usr/bin/python3 +# * onboard temperature sensors +# * FAN trays +# * PSU +# +import os +import re +from lxml import etree as ET +import glob +import json +from decimal import Decimal +from fru import ipmifru +from cust_fru import CustFru + + +MAILBOX_DIR = "/sys/bus/i2c/devices/" +BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type" +BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow" + + +CONFIG_NAME = "dev.xml" + + +def byteTostr(val): + strtmp = '' + for value in val: + strtmp += chr(value) + return strtmp + + +def typeTostr(val): + if isinstance(val, bytes): + strtmp = byteTostr(val) + return strtmp + return val + + +def get_board_id(): + if not os.path.exists(BOARD_ID_PATH): + return "NA" + with open(BOARD_ID_PATH) as fd: + id_str = fd.read().strip() + return "0x%x" % (int(id_str, 10)) + + +def getboardairflow(): + if not os.path.exists(BOARD_AIRFLOW_PATH): + return "NA" + with open(BOARD_AIRFLOW_PATH) as fd: + airflow_str = fd.read().strip() + data = json.loads(airflow_str) + airflow = data.get("board", "NA") + return airflow + + +boardid = get_board_id() +boardairflow = getboardairflow() + + +DEV_XML_FILE_LIST = [ + "dev_" + boardid + "_" + boardairflow + ".xml", + "dev_" + boardid + ".xml", + "dev_" + boardairflow + ".xml", +] + + +def dev_file_read(path, offset, read_len): + retval = "ERR" + val_list = [] + msg = "" + ret = "" + fd = -1 + + if not os.path.exists(path): + return False, "%s %s not found" % (retval, path) + + try: + fd = os.open(path, os.O_RDONLY) + os.lseek(fd, offset, os.SEEK_SET) + ret = os.read(fd, read_len) + for item in ret: + val_list.append(item) + except Exception as e: + msg = str(e) + return False, "%s %s" % (retval, msg) + finally: + if fd > 0: + os.close(fd) + return True, val_list + + +def getPMCreg(location): + retval = 'ERR' + if not os.path.isfile(location): + return "%s %s notfound" % (retval, location) + try: + with open(location, 'r') as fd: + retval = fd.read() + except Exception as error: + return "ERR %s" % str(error) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +# Get a mailbox register +def get_pmc_register(reg_name): + retval = 'ERR' + mb_reg_file = reg_name + filepath = glob.glob(mb_reg_file) + if len(filepath) == 0: + return "%s %s notfound" % (retval, mb_reg_file) + mb_reg_file = filepath[0] + if not os.path.isfile(mb_reg_file): + # print mb_reg_file, 'not found !' + return "%s %s notfound" % (retval, mb_reg_file) + try: + with open(mb_reg_file, 'rb') as fd: + retval = fd.read() + retval = typeTostr(retval) + except Exception as error: + retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error)) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +class checktype(): + def __init__(self, test1): + self.test1 = test1 + + @staticmethod + def getValue(location, bit, data_type, coefficient=1, addend=0): + try: + value_t = get_pmc_register(location) + if value_t.startswith("ERR") or value_t.startswith("NA"): + return value_t + if data_type == 1: + return float('%.1f' % ((float(value_t) / 1000) + addend)) + if data_type == 2: + return float('%.1f' % (float(value_t) / 100)) + if data_type == 3: + psu_status = int(value_t, 16) + return (psu_status & (1 << bit)) >> bit + if data_type == 4: + return int(value_t, 10) + if data_type == 5: + return float('%.1f' % (float(value_t) / 1000 / 1000)) + if data_type == 6: + return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000')) + return value_t + except Exception as e: + value_t = "ERR %s" % str(e) + return value_t + + # fanFRU + @staticmethod + def decodeBinByValue(retval): + fru = ipmifru() + fru.decodeBin(retval) + return fru + + @staticmethod + def getfruValue(prob_t, root, val): + try: + ret, binval_bytes = dev_file_read(val, 0, 256) + if ret is False: + return binval_bytes + binval = byteTostr(binval_bytes) + fanpro = {} + ret = checktype.decodeBinByValue(binval) + fanpro['fan_type'] = ret.productInfoArea.productName + fanpro['hw_version'] = ret.productInfoArea.productVersion + fanpro['sn'] = ret.productInfoArea.productSerialNumber + fan_display_name_dict = status.getDecodValue(root, "fan_display_name") + fan_name = fanpro['fan_type'].strip() + if len(fan_display_name_dict) == 0: + return fanpro + if fan_name not in fan_display_name_dict: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name) + else: + fanpro['fan_type'] = fan_display_name_dict[fan_name] + return fanpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getslotfruValue(val): + try: + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + slotpro = {} + ret = checktype.decodeBinByValue(binval) + slotpro['slot_type'] = ret.boardInfoArea.boardProductName + slotpro['hw_version'] = ret.boardInfoArea.boardextra1 + slotpro['sn'] = ret.boardInfoArea.boardSerialNumber + return slotpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getpsufruValue(prob_t, root, val): + try: + psu_match = False + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + psupro = {} + ret = checktype.decodeBinByValue(binval) + psupro['type1'] = ret.productInfoArea.productPartModelName + psupro['sn'] = ret.productInfoArea.productSerialNumber + psupro['hw_version'] = ret.productInfoArea.productVersion + psu_dict = status.getDecodValue(root, "psutype") + psupro['type1'] = psupro['type1'].strip() + if len(psu_dict) == 0: + return psupro + for psu_name, display_name in psu_dict.items(): + if psu_name.strip() == psupro['type1']: + psupro['type1'] = display_name + psu_match = True + break + if psu_match is not True: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1']) + return psupro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getpsucustfruValue(prob_t, root, val): + try: + psu_match = False + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + psupro = {} + custfru = CustFru() + custfru.decode(binval) + psupro['type1'] = custfru.product_name.strip() + psupro['sn'] = custfru.serial_number.strip().replace(chr(0), "") + psupro['hw_version'] = custfru.version.strip() + psu_dict = status.getDecodValue(root, "psutype") + psupro['type1'] = psupro['type1'].strip() + if len(psu_dict) == 0: + return psupro + for psu_name, display_name in psu_dict.items(): + if psu_name.strip() == psupro['type1']: + psupro['type1'] = display_name + psu_match = True + break + if psu_match is not True: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1']) + return psupro + except Exception as error: + return "ERR " + str(error) + + +class status(): + def __init__(self, productname): + self.productname = productname + + @staticmethod + def getETroot(filename): + tree = ET.parse(filename) + root = tree.getroot() + return root + + @staticmethod + def getDecodValue(collection, decode): + decodes = collection.find('decode') + testdecode = decodes.find(decode) + test = {} + if testdecode is None: + return test + for neighbor in testdecode.iter('code'): + test[neighbor.attrib["key"]] = neighbor.attrib["value"] + return test + + @staticmethod + def getfileValue(location): + return checktype.getValue(location, " ", " ") + + @staticmethod + def getETValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + prob_t = {} + prob_t.update(neighbor.attrib) + prob_t['errcode'] = 0 + prob_t['errmsg'] = '' + for pros in neighbor.iter("property"): + ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items())) + if ret.get('e2type') == 'fru' and ret.get("name") == "fru": + fruval = checktype.getfruValue(prob_t, root, ret["location"]) + if isinstance(fruval, str) and fruval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = fruval + break + prob_t.update(fruval) + continue + + if ret.get("name") == "psu" and ret.get('e2type') == 'fru': + psuval = checktype.getpsufruValue(prob_t, root, ret["location"]) + if isinstance(psuval, str) and psuval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = psuval + break + prob_t.update(psuval) + continue + + if ret.get("name") == "psu" and ret.get('e2type') == 'custfru': + psuval = checktype.getpsucustfruValue(prob_t, root, ret["location"]) + if isinstance(psuval, str) and psuval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = psuval + break + prob_t.update(psuval) + continue + + if ret.get("gettype") == "config": + prob_t[ret["name"]] = ret["value"] + continue + + if 'type' not in ret.keys(): + val = "0" + else: + val = ret["type"] + if 'bit' not in ret.keys(): + bit = "0" + else: + bit = ret["bit"] + if 'coefficient' not in ret.keys(): + coefficient = 1 + else: + coefficient = float(ret["coefficient"]) + if 'addend' not in ret.keys(): + addend = 0 + else: + addend = float(ret["addend"]) + + s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend) + if isinstance(s, str) and s.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = s + break + if 'default' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + prob_t['errmsg'] = rt[str(s)] + if str(s) != ret["default"]: + prob_t['errcode'] = -1 + break + else: + if 'decode' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt): + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % + (s.replace("\x00", "").rstrip())) + else: + s = rt[str(s).replace("\x00", "").rstrip()] + name = ret["name"] + prob_t[name] = str(s) + a.append(prob_t) + + @staticmethod + def getCPUValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + location = neighbor.attrib["location"] + + filepath = glob.glob(location) + if len(filepath) == 0: + return + location = filepath[0] + L = [] + for dirpath, dirnames, filenames in os.walk(location): + for file in filenames: + if file.endswith("_input"): + b = re.findall(r'temp(\d+)_input', file) + idx = int(b[0]) + L.append(idx) + L = sorted(L) + for idx in L: + prob_t = {} + prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, idx)) + prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, idx))) / 1000 + prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, idx))) / 1000 + prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, idx))) / 1000 + prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, idx))) / 1000 + a.append(prob_t) + + @staticmethod + def getFileName(): + fpath = os.path.dirname(os.path.realpath(__file__)) + for file in DEV_XML_FILE_LIST: + xml = fpath + "/" + file + if os.path.exists(xml): + return xml + return fpath + "/" + CONFIG_NAME + + @staticmethod + def checkFan(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "fan" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getTemp(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "temp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getPsu(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "psu" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getCustPsu(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "custpsu" + status.getETValue(ret, _filename, _tagname) + + + @staticmethod + def getcputemp(ret): + _filename = status.getFileName() + _tagname = "cpus" + status.getCPUValue(ret, _filename, _tagname) + + @staticmethod + def getDcdc(ret): + _filename = status.getFileName() + _tagname = "dcdc" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmactemp(ret): + _filename = status.getFileName() + _tagname = "mactemp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmacpower(ret): + _filename = status.getFileName() + _tagname = "macpower" + status.getETValue(ret, _filename, _tagname) diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pcie.yaml new file mode 100644 index 000000000000..03062f6be938 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pcie.yaml @@ -0,0 +1,172 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '1980' + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev + 11)' +- bus: '00' + dev: '04' + fn: '0' + id: 19a1 + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers + (rev 11)' +- bus: '00' + dev: '05' + fn: '0' + id: 19a2 + name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 + Series Root Complex Event Collector (rev 11)' +- bus: '00' + dev: '06' + fn: '0' + id: 19a3 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT + Root Port (rev 11)' +- bus: '00' + dev: 09 + fn: '0' + id: 19a4 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #0 (rev 11)' +- bus: '00' + dev: 0a + fn: '0' + id: 19a5 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #1 (rev 11)' +- bus: '00' + dev: 0b + fn: '0' + id: 19a6 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #2 (rev 11)' +- bus: '00' + dev: 0e + fn: '0' + id: 19a8 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #4 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 19ac + name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller + - Host (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 19c2 + name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller + 1 (rev 11)' +- bus: '00' + dev: '15' + fn: '0' + id: 19d0 + name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI + Controller (rev 11)' +- bus: '00' + dev: '16' + fn: '0' + id: 19d1 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #0 (rev 11)' +- bus: '00' + dev: '17' + fn: '0' + id: 19d2 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #1 (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 19d3 + name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME + HECI 1 (rev 11)' +- bus: '00' + dev: 1a + fn: '0' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1a + fn: '1' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1a + fn: '2' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1c + fn: '0' + id: 19db + name: 'SD Host controller: Intel Corporation Device 19db (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 19dc + name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev + 11)' +- bus: '00' + dev: 1f + fn: '1' + id: 19dd + name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Primary + to Side Band (P2SB) Bridge (rev 11)' +- bus: '00' + dev: 1f + fn: '2' + id: 19de + name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management + Controller (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 19df + name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev + 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 19e0 + name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series + SPI Controller (rev 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 19e2 + name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology + (rev 11)' +- bus: '02' + dev: '00' + fn: '0' + id: b274 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b274 (rev 02)' +- bus: '06' + dev: '00' + fn: '0' + id: 15c6 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev + 11)' +- bus: '06' + dev: '00' + fn: '1' + id: 15c6 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev + 11)' +- bus: '07' + dev: '00' + fn: '0' + id: 15c7 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev + 11)' +- bus: '07' + dev: '00' + fn: '1' + id: 15c7 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev + 11)' diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform.json b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform.json new file mode 100644 index 000000000000..a7920cf1590f --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform.json @@ -0,0 +1,195 @@ +{ + "chassis": { + "name": "M2-W6510-48GT4V", + "thermal_manager": false, + "status_led": { + "controllable": false, + "colors": ["green", "blinking_green", "amber", "blinking_amber"] + }, + "components": [ + { + "name": "CPU_CPLD" + }, + { + "name": "CTRL_CPLD" + }, + { + "name": "PORT_CPLD" + }, + { + "name": "BIOS" + } + ], + "fans": [ + { + "name": "Fantray1_1", + "speed": { + "controllable": true, + "minimum": 40, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + }, + { + "name": "Fantray2_1", + "speed": { + "controllable": true, + "minimum": 40, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 1, + "status_led": { + "controllable": false, + "colors": ["amber", "green", "off"] + }, + "fans": [ + { + "name": "Fantray1_1", + "speed": { + "controllable": true, + "minimum": 40, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 1, + "status_led": { + "controllable": false, + "colors": ["amber", "green", "off"] + }, + "fans": [ + { + "name": "Fantray2_1", + "speed": { + "controllable": true, + "minimum": 40, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + } + ], + "psus": [ + { + "name": "Psu1", + "voltage": false, + "current": false, + "power": false, + "max_power": false, + "voltage_high_threshold": false, + "voltage_low_threshold": false, + "temperature": false, + "fans_target_speed": false, + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU1_FAN1", + "speed": { + "controllable": false, + "minimum": 40, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Psu2", + "voltage": false, + "current": false, + "power": false, + "max_power": false, + "voltage_high_threshold": false, + "voltage_low_threshold": false, + "temperature": false, + "fans_target_speed": false, + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU2_FAN1", + "speed": { + "controllable": false, + "minimum": 40, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + } + ], + "thermals": [ + { + "name": "ASIC_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "CPU_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "INLET_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "OUTLET_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + } + ], + "modules": [], + "sfps": [] + }, + "interfaces": {} +} diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_asic b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_asic new file mode 100644 index 000000000000..960467652765 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_components.json new file mode 100644 index 000000000000..1cb8ac1136f9 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_components.json @@ -0,0 +1,13 @@ +{ + "chassis": { + "M2-W6510-48GT4V": { + "component": { + "CPU_CPLD": { }, + "CTRL_CPLD": { }, + "PORT_CPLD": { }, + "BIOS": { } + } + } + } +} + diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_env.conf new file mode 100644 index 000000000000..283e1c0ce710 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_env.conf @@ -0,0 +1 @@ +usemsi=1 diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/plugins/sfputil.py new file mode 100755 index 000000000000..f7e00bb938e1 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/plugins/sfputil.py @@ -0,0 +1,249 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import os + import traceback + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 51 + PORTS_IN_BLOCK = 52 + + EEPROM_OFFSET = -36 + SFP_DEVICE_TYPE = "optoe2" + QSFP_DEVICE_TYPE = "optoe1" + I2C_MAX_ATTEMPT = 3 + + _port_to_eeprom_mapping = {} + port_to_i2cbus_mapping ={} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return [] + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + self.port_to_i2cbus_mapping[x] = x + self.EEPROM_OFFSET - 1 + self.port_to_i2cbus_mapping[48] = 12 + self.port_to_i2cbus_mapping[49] = 11 + self.port_to_i2cbus_mapping[50] = 14 + self.port_to_i2cbus_mapping[51] = 13 + SfpUtilBase.__init__(self) + + def _sfp_read_file_path(self, file_path, offset, num_bytes): + attempts = 0 + while attempts < self.I2C_MAX_ATTEMPT: + try: + file_path.seek(offset) + read_buf = file_path.read(num_bytes) + except Exception: + attempts += 1 + time.sleep(0.05) + return True, read_buf + return False, None + + def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset): + """Tries to read the eeprom file to determine if the + device/sfp is present or not. If sfp present, the read returns + valid bytes. If not, read returns error 'Connection timed out""" + + if not os.path.exists(sysfs_sfp_i2c_client_eeprompath): + return False + with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile: + rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1) + return rv + + def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype): + try: + sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path + + # Write device address to new_device file + nd_str = "%s %s" % (devtype, hex(devaddr)) + with open(sysfs_nd_path, "w") as nd_file: + nd_file.write(nd_str) + + except Exception as err: + print("Error writing to new device file: %s" % str(err)) + return 1 + else: + return 0 + + def _get_port_eeprom_path(self, port_num, devid): + sysfs_i2c_adapter_base_path = "" + + if port_num in self.port_to_eeprom_mapping: + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num] + else: + sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter" + + i2c_adapter_id = self._get_port_i2c_adapter_id(port_num) + if i2c_adapter_id is None: + print("Error getting i2c bus num") + return None + + # Get i2c virtual bus path for the sfp + sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path, + str(i2c_adapter_id)) + + # If i2c bus for port does not exist + if not os.path.exists(sysfs_sfp_i2c_adapter_path): + print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path) + return None + + sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path, + str(i2c_adapter_id), + hex(devid)[-2:]) + + # If sfp device is not present on bus, Add it + if not os.path.exists(sysfs_sfp_i2c_client_path): + if port_num in self.qsfp_ports: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE) + else: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE) + if ret != 0: + print("Error adding sfp device") + return None + + sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path + + return sysfs_sfp_i2c_client_eeprom_path + + def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes): + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes) + if rv is False: + return None + + try: + for n in range(0, num_bytes): + if isinstance(raw[n], str): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + elif isinstance(raw[n], int): + eeprom_raw[n] = hex(raw[n])[2:].zfill(2) + except Exception as e: + return None + + return eeprom_raw + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + presence_path = "/sys/wb_plat/sff/sff%d/present" % (port_num+1) + + try: + with open(presence_path, "rb") as data: + presence_data = data.read(2) + if presence_data == "": + return False + result = int(presence_data, 16) + except IOError: + return False + + if result == 1: + return True + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return True + + def get_transceiver_change_event(self, timeout=0): + return False, {} + + def get_highest_temperature(self): + offset = 0 + hightest_temperature = -9999 + + presence_flag = False + read_eeprom_flag = False + temperature_valid_flag = False + + for port in range(48, self.PORTS_IN_BLOCK): + if self.get_presence(port) is False: + continue + + presence_flag = True + if port in self.qsfp_ports: + offset = 22 + else: + offset = 96 + size = 2 + + eeprom_path = self._get_port_eeprom_path(port, 0x50) + try: + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + read_eeprom_flag = True + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0x100 + offset, size) + msb = int(eeprom_raw[0], 16) + lsb = int(eeprom_raw[1], 16) + result = (msb << 8) | (lsb & 0xff) + result = float(result / 256.0) + if -50 <= result <= 200: + temperature_valid_flag = True + hightest_temperature = max(hightest_temperature, result) + except Exception: + print(traceback.format_exc()) + + # all port not presence + if presence_flag is False: + hightest_temperature = -10000 + + # all port read eeprom fail + elif read_eeprom_flag is False: + hightest_temperature = -9999 + + # all port temperature invalid + elif read_eeprom_flag is True and temperature_valid_flag is False: + hightest_temperature = -10000 + + hightest_temperature = round(hightest_temperature, 2) + + return hightest_temperature diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/plugins/ssd_util.py new file mode 100755 index 000000000000..95ca23e8b351 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/plugins/ssd_util.py @@ -0,0 +1,112 @@ +# +# ssd_util.py +# +# Generic implementation of the SSD health API +# SSD models supported: +# - InnoDisk +# - StorFly +# - Virtium + +try: + import subprocess + from sonic_platform_base.sonic_ssd.ssd_base import SsdBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +HEALTH_CMD = "cat /sys/kernel/debug/mmc0/mmc0:0001/ext_csd | cut -c 537-538" +SERIAL_CMD = "cat /sys/bus/mmc/devices/mmc0\\:0001/serial" +FIRMWARE_CMD = "cat /sys/kernel/debug/mmc0/mmc0:0001/ext_csd | cut -c 509-522" +NOT_AVAILABLE = "N/A" + +class SsdUtil(SsdBase): + """ + Generic implementation of the SSD health API + """ + def __init__(self, diskdev): + self.model = "KLMCG4JETD-B041" + self.temperature = NOT_AVAILABLE + self.vendor_ssd_info = "====No vendor information====" + self.health_list = [100,90,80,70,60,50,40,30,20,10,0] + try: + life_time = self._execute_shell(HEALTH_CMD) + if int(life_time) in range(1,12): + self.health = self.health_list[int(life_time) - 1] + else: + self.health = NOT_AVAILABLE + except Exception as e: + self.health = NOT_AVAILABLE + + try: + self.firmware = self._execute_shell(FIRMWARE_CMD) + except Exception as e: + self.firmware = NOT_AVAILABLE + + try: + serial = self._execute_shell(SERIAL_CMD) + self.serial = serial.replace("0x",'') + except Exception as e: + self.serial = NOT_AVAILABLE + + def _execute_shell(self, cmd): + status, output = subprocess.getstatusoutput(cmd) + if status: + return None + + return output + + def get_health(self): + """ + Retrieves current disk health in percentages + + Returns: + A float number of current ssd health + e.g. 83.5 + """ + return self.health + + def get_temperature(self): + """ + Retrieves current disk temperature in Celsius + + Returns: + A float number of current temperature in Celsius + e.g. 40.1 + """ + return self.temperature + + def get_model(self): + """ + Retrieves model for the given disk device + + Returns: + A string holding disk model as provided by the manufacturer + """ + return self.model + + def get_firmware(self): + """ + Retrieves firmware version for the given disk device + + Returns: + A string holding disk firmware version as provided by the manufacturer + """ + return self.firmware + + def get_serial(self): + """ + Retrieves serial number for the given disk device + + Returns: + A string holding disk serial number as provided by the manufacturer + """ + return self.serial + + def get_vendor_output(self): + """ + Retrieves vendor specific data for the given disk device + + Returns: + A string holding some vendor specific disk information + """ + return self.vendor_ssd_info + diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pmon_daemon_control.json new file mode 100644 index 000000000000..94592fa8cebc --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/postinit_cmd_file.soc new file mode 100644 index 000000000000..371d9a71e387 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/postinit_cmd_file.soc @@ -0,0 +1,29 @@ +phy ge1 0x17 0x0D19 +phy ge1 0x15 0x4801 +phy ge1 0x17 0x0D18 +phy ge1 0x15 0x0D07 +phy ge1 0x17 0x0D19 +phy ge1 0x15 0xC801 +init port +sleep 0 200 + +phy ge9 0x17 0x0D19 +phy ge9 0x15 0x4801 +phy ge9 0x17 0x0D18 +phy ge9 0x15 0x0D07 +phy ge9 0x17 0x0D19 +phy ge9 0x15 0xC801 +init port +sleep 0 200 + +phy ge17 0x17 0x0D19 +phy ge17 0x15 0x4801 +phy ge17 0x17 0x0D18 +phy ge17 0x15 0x0D07 +phy ge17 0x17 0x0D19 +phy ge17 0x15 0xC801 +init port +sleep 0 200 + +led auto on +led start \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/preinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/preinit_cmd_file.soc new file mode 100644 index 000000000000..5566f9f882a2 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/preinit_cmd_file.soc @@ -0,0 +1,2 @@ +m0 load 0 0x0 /usr/share/sonic/platform/linkscan_led.bin +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/system_health_monitoring_config.json b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..a864df64aa4d --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/system_health_monitoring_config.json @@ -0,0 +1,11 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["PSU2_FAN1","PSU1_FAN1","psu.power_threshold","psu.temperature","psu.voltage"], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault" : "blink_yellow", + "normal" : "green", + "booting": "blink_green" + } +} \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 index b11b209e5598..d38f07fac66d 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 @@ -1 +1 @@ -c99947340cd205fa728bd418d1ca7a92 \ No newline at end of file +f3d3345bef9c6ac4eea19c6170e92970 \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml index f23c2e9badda..6f615816bf42 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml @@ -1,5 +1,5 @@ - + @@ -727,7 +727,6 @@ lowercase characters. 0 0 - 63 false @@ -746,7 +745,6 @@ lowercase characters. 1 0 - 63 false @@ -765,7 +763,6 @@ lowercase characters. 2 0 - 63 false @@ -784,7 +781,6 @@ lowercase characters. 3 0 - 63 false @@ -803,7 +799,6 @@ lowercase characters. 4 0 - 63 false @@ -822,7 +817,6 @@ lowercase characters. 5 0 - 63 false @@ -841,7 +835,6 @@ lowercase characters. 6 0 - 63 false @@ -860,7 +853,6 @@ lowercase characters. 7 0 - 63 false @@ -879,7 +871,6 @@ lowercase characters. 8 0 - 63 false @@ -898,7 +889,6 @@ lowercase characters. 9 0 - 63 false @@ -917,7 +907,6 @@ lowercase characters. 10 0 - 63 false @@ -936,7 +925,6 @@ lowercase characters. 11 0 - 63 false @@ -955,7 +943,6 @@ lowercase characters. 12 0 - 63 false @@ -974,7 +961,6 @@ lowercase characters. 13 0 - 63 false @@ -993,7 +979,6 @@ lowercase characters. 14 0 - 63 false @@ -1012,7 +997,6 @@ lowercase characters. 15 0 - 63 false @@ -1031,7 +1015,6 @@ lowercase characters. 16 0 - 63 false @@ -1050,7 +1033,6 @@ lowercase characters. 17 0 - 63 false @@ -1069,7 +1051,6 @@ lowercase characters. 18 0 - 63 false @@ -1088,7 +1069,6 @@ lowercase characters. 19 0 - 63 false @@ -1107,7 +1087,6 @@ lowercase characters. 20 0 - 63 false @@ -1126,7 +1105,6 @@ lowercase characters. 21 0 - 63 false @@ -1145,7 +1123,6 @@ lowercase characters. 22 0 - 63 false @@ -1164,7 +1141,6 @@ lowercase characters. 23 0 - 63 false @@ -1183,7 +1159,6 @@ lowercase characters. 0 1 - 63 false @@ -1202,7 +1177,6 @@ lowercase characters. 1 1 - 63 false @@ -1221,7 +1195,6 @@ lowercase characters. 2 1 - 63 false @@ -1240,7 +1213,6 @@ lowercase characters. 3 1 - 63 false @@ -1259,7 +1231,6 @@ lowercase characters. 4 1 - 63 false @@ -1278,7 +1249,6 @@ lowercase characters. 5 1 - 63 false @@ -1297,7 +1267,6 @@ lowercase characters. 6 1 - 63 false @@ -1316,7 +1285,6 @@ lowercase characters. 7 1 - 63 false @@ -1335,7 +1303,6 @@ lowercase characters. 8 1 - 63 false @@ -1354,7 +1321,6 @@ lowercase characters. 23 1 - 63 false @@ -1373,7 +1339,6 @@ lowercase characters. 22 1 - 63 false @@ -1392,7 +1357,6 @@ lowercase characters. 21 1 - 63 false @@ -1411,7 +1375,6 @@ lowercase characters. 20 1 - 63 false @@ -1430,7 +1393,6 @@ lowercase characters. 19 1 - 63 false @@ -1449,7 +1411,6 @@ lowercase characters. 18 1 - 63 false @@ -1468,7 +1429,6 @@ lowercase characters. 17 1 - 63 false @@ -1487,7 +1447,6 @@ lowercase characters. 16 1 - 63 false @@ -1506,7 +1465,6 @@ lowercase characters. 15 1 - 63 false @@ -1525,7 +1483,6 @@ lowercase characters. 14 1 - 63 false @@ -1544,7 +1501,6 @@ lowercase characters. 13 1 - 63 false @@ -1563,7 +1519,6 @@ lowercase characters. 12 1 - 63 false @@ -1582,7 +1537,6 @@ lowercase characters. 11 1 - 63 false @@ -1601,7 +1555,6 @@ lowercase characters. 10 1 - 63 false @@ -1620,7 +1573,6 @@ lowercase characters. 9 1 - 63 false @@ -1636,7 +1588,6 @@ lowercase characters. NA - 0 @@ -1656,7 +1607,6 @@ lowercase characters. NA - 1 @@ -1676,7 +1626,6 @@ lowercase characters. NA - 0 @@ -1696,7 +1645,6 @@ lowercase characters. NA - 1 @@ -1874,6 +1822,23 @@ lowercase characters. + + + alaska-88E1780 + + 16 + 3 + 64 + 65280 + + + 1 + 28 + 1024 + 64511 + + + . 1 diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 index 575bbf06a1b2..1d7a5566018a 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 @@ -1 +1 @@ -83b91095c99529e49619e31e3fd72101 \ No newline at end of file +4ad719e69b522db7ee969da2894cb04a \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml index eff23c06ff2b..7789d25115e7 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml @@ -1,5 +1,5 @@ - + @@ -239,8 +239,8 @@ enumeration Tx parameter type - atten - atten + pre + pre 0 @@ -248,75 +248,10 @@ post 1 - - pre - pre - 2 - - - pre2 - pre2 - 3 - - - pre3 - pre3 - 4 - peak peak - 5 - - - main - main - 6 - - - txAmpAdjEn - txAmpAdjEn - 7 - - - emph0 - emph0 - 8 - - - emph1 - emph1 - 9 - - - txAmpShft - txAmpShft - 10 - - - txEmphEn - txEmphEn - 11 - - - txEmphEn1 - txEmphEn1 - 12 - - - txAmpAdj - txAmpAdj - 13 - - - slewCtrlEn - slewCtrlEn - 14 - - - slewRate - slewRate - 15 + 2 @@ -324,400 +259,180 @@ enumeration Rx parameter type - sqlch - sqlch + dataRate + dataRate 0 - DC - DC + res1Sel + res1Sel 1 - LF - LF + res2Sel + res2Sel 2 - HF - HF + cap1Sel + cap1Sel 3 - gainShape1 - gainShape1 + cap2Sel + cap2Sel 4 - gainShape2 - gainShape2 + minCap + minCap 5 - shortChannelEn - shortChannelEn + minCapN + minCapN + 6 + + + sumfBoostTargetC0 + sumfBoostTargetC0 7 - bfLf - bfLf + sumfBoostTargetC1 + sumfBoostTargetC1 8 - bfHf - bfHf + sumfBoostTargetC2 + sumfBoostTargetC2 9 - minLf - minLf + midpointPhaseOs0 + midpointPhaseOs0 10 - maxLf - maxLf + midpointPhaseOs1 + midpointPhaseOs1 11 - minHf - minHf + midpointPhaseOs2 + midpointPhaseOs2 12 - - maxHf - maxHf - 13 - - - minPre1 - minPre1 - 14 - - - maxPre1 - maxPre1 - 15 - - - minPre2 - minPre2 - 16 - - - maxPre2 - - 17 - - - minPost - minPost - 18 - - - maxPost - maxPost - 19 - - - squelch - squelch - 20 - - - termination - termination - 27 - - - coldEnvelope - coldEnvelope - 35 - - - hotEnvelope - hotEnvelope - 36 - - - dcGain - dcGain - 37 - - - bandWidth - bandWidth - 38 - - - dfe - dfe - 39 - - - ffeR - ffeR - 40 - - - ffeC - ffeC - 41 - - - sampler - sampler - 42 - - - align90 - align90 - 43 - - - ffeS - ffeS - 44 - - - resSel - resSel - 45 - - - resShift - resShift - 46 - - - capSel - capSel - 47 - - - ffeSettingForce - ffeSettingForce - 48 - - - adaptedResSel - adaptedResSel - 49 - - - adaptedCapSel - adaptedCapSel - 50 - selmufi selmufi - 51 + 13 selmuff selmuff - 52 + 14 selmupi selmupi - 53 + 15 selmupf selmupf - 54 - - - slewRateCtrl0 - slewRateCtrl0 - 55 - - - slewRateCtrl1 - slewRateCtrl1 - 56 - - - EO - EO - 57 - - - dataRate - dataRate - 58 - - - res1Sel - res1Sel - 59 - - - res2Sel - res2Sel - 60 - - - cap1Sel - cap1Sel - 61 - - - cap2Sel - cap2Sel - 62 + 16 midpointLargeThresKLane midpointLargeThresKLane - 63 + 17 midpointSmallThresKLane midpointSmallThresKLane - 64 + 18 midpointLargeThresCLane midpointLargeThresCLane - 65 + 19 midpointSmallThresCLane midpointSmallThresCLane - 66 + 20 + + + inxSumfMidpointAdatptiveEnLane + inxSumfMidpointAdatptiveEnLane + 21 dfeResF0aHighThresInitLane dfeResF0aHighThresInitLane - 67 + 22 dfeResF0aHighThresEndLane dfeResF0aHighThresEndLane - 68 - - - current1Sel - current1Sel - 69 - - - rl1Sel - rl1Sel - 70 + 23 - rl1Extra - rl1Extra - 71 - - - cl1Ctrl - cl1Ctrl - 72 - - - enMidFreq - enMidFreq - 73 - - - cs1Mid - cs1Mid - 74 - - - rs1Mid - rs1Mid - 75 - - - rfCtrl - rfCtrl - 76 - - - rl1TiaSel - rl1TiaSel - 77 - - - rl1TiaExtra - rl1TiaExtra - 78 - - - hpfRSel1st - hpfRSel1st - 79 - - - current1TiaSel - current1TiaSel - 80 - - - rl2Tune - rl2Tune - 81 - - - rl2Sel - rl2Sel - 82 + squelch + squelch + 24 - rs2Sel - rs2Sel - 83 + align90 + align90 + 25 - current2Sel - current2Sel - 84 + sampler + sampler + 26 - hpfRsel2nd - hpfRsel2nd - 85 + slewRateCtrl0 + slewRateCtrl0 + 27 - BW - BW - 86 + slewRateCtrl1 + slewRateCtrl1 + 28 - dfeGAIN - dfeGAIN - 87 + EO + EO + 29 - dfeGAIN2 - dfeGAIN2 - 88 + minCap1 + minCap1 + 30 - pre1 - pre1 - 89 + maxCap1 + maxCap1 + 31 - pre2 - pre2 - 90 + minRes1 + minRes1 + 32 - post1 - post1 - 91 + maxRes1 + maxRes1 + 33 boolean-type enumeration - Boolean 32 bits , due to bing endian + Boolean 32 bits , due to big endian false False @@ -764,33 +479,6 @@ 5 - - uint8-type - uint32 - Uint8 32 bits , due to bing endian - 0 - 255 - - - serdes-termination-type - enumeration - RX termination mode - - GND - Enabled - 0 - - - VDD - Disabled - 1 - - - FLOATING - RS FEC enabled - 2 - - port-interconnect-profile-type enumeration @@ -860,315 +548,517 @@ 0 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false + + 0 + + pre + 0 + + + post + 0 + + + peak + 1 + + 1 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 2 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 3 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 4 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 5 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 6 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 7 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 8 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false + + 0 + + pre + 0 + + + post + 0 + + + peak + 5 + + 9 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 10 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 11 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 12 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 13 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 14 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 15 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 16 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false + + 0 + + pre + 0 + + + post + 0 + + + peak + 9 + + 17 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 18 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 19 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 20 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 21 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 22 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 23 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 24 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false + + 0 + + pre + 0 + + + post + 0 + + + peak + 10 + + 25 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 26 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 27 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 28 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 29 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 30 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 31 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 32 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false + + 0 + + pre + 0 + + + post + 0 + + + peak + 14 + + 33 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 34 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 35 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 36 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 37 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 38 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 39 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 40 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false + + 0 + + pre + 0 + + + post + 0 + + + peak + 11 + + 41 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 42 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 43 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 44 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 45 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 46 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 47 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 48 - AVAGO + COMPHY_C28G profile_default 10GR1 + false + + 0 + + pre + 0 + + + peak + 0 + + + post + 9 + + 49 - AVAGO + COMPHY_C28G profile_default 10GR1 + false + + 0 + + pre + 0 + + + peak + 0 + + + post + 10 + + 50 - AVAGO + COMPHY_C28G profile_default 10GR1 + false + + 0 + + pre + 0 + + + post + 9 + + + peak + 0 + + 51 - AVAGO + COMPHY_C28G profile_default 10GR1 + false + + 0 + + pre + 0 + + + post + 10 + + + peak + 0 + + diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 index c043a0d7231f..5c1c480ebb3e 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 @@ -1 +1 @@ -209426f8b550ddf85db19925f9f202a1 \ No newline at end of file +7ca6eaf67da8ee4c5b2a4f480db8919f \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml index 9e40492cfe8f..13b344d6b964 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml @@ -1,5 +1,5 @@ - + diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 index 04eaffc09efc..7d2cfc524b98 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 @@ -1 +1 @@ -8918d787a5ccaa80a481ddb8b169574a \ No newline at end of file +751d5fb74a0861240aa86afad8ad13ef \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml index 00c77001f56b..91246fc35848 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml @@ -1,5 +1,5 @@ - + @@ -50,10 +50,20 @@ Router In Drop Counters track Route Black Hole Packets 1 + + + Feature-enable + enumeration + Feature Enabled/Disabled - IN_DROP_ANY - Router In Drop Counters track either TTL & Hop Limit Exceeded or Route Black Hole Packets - 2 + Disabled + Disabled + 0 + + + Enabled + Enabled + 1 @@ -432,14 +442,15 @@ 1024 - - 0 - - IN_DROP_ANY + 0 + ROUTE_BLACKHOLE SAI_LOG_SYSLOG + + Disabled + control-acl 3 diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 index d381d2541957..5422b86a598d 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 @@ -1 +1 @@ -78ea2f9bc238a32b68823bc7b082198d \ No newline at end of file +d7069397e7466efe2bd6cf4a952b56db \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml index 63b6aeba3bd3..efb1432c65de 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + @@ -52,7 +52,7 @@ board-pp-interface-channel-type enumeration - Specifies interface tunnel. + Specifies channel interface type. pci PCI @@ -64,19 +64,29 @@ 1 - pex - PEX - 3 + twsi + TWSI + 2 + + + board-pp-as-type + enumeration + Specifies Address space type. - pex_eagle - PEX EAGLE - 5 + 4_regions + address-space 4 regions + 0 - pex_falcon_z - PEX FALCON Z - 6 + 8_regions + address-space 8 regions + 1 + + + atu + address translation unit + 2 @@ -683,6 +693,11 @@ lowercase characters. AC5X 1 + + ASIC_Falcon + FALCON + 2 + ASIC_AC3X @@ -691,7 +706,8 @@ lowercase characters. linux-static autoscan external - pex + pci + 8_regions 0 0 @@ -713,7 +729,6 @@ lowercase characters. 1 0 - 63 false @@ -734,7 +749,6 @@ lowercase characters. 0 0 - 63 false @@ -755,7 +769,6 @@ lowercase characters. 3 0 - 63 false @@ -776,7 +789,6 @@ lowercase characters. 2 0 - 63 false @@ -797,7 +809,6 @@ lowercase characters. 5 0 - 63 false @@ -818,7 +829,6 @@ lowercase characters. 4 0 - 63 false @@ -839,7 +849,6 @@ lowercase characters. 7 0 - 63 false @@ -860,7 +869,6 @@ lowercase characters. 6 0 - 63 false @@ -881,7 +889,6 @@ lowercase characters. 1 1 - 63 false @@ -902,7 +909,6 @@ lowercase characters. 0 1 - 63 false @@ -923,7 +929,6 @@ lowercase characters. 3 1 - 63 false @@ -944,7 +949,6 @@ lowercase characters. 2 1 - 63 false @@ -965,7 +969,6 @@ lowercase characters. 5 1 - 63 false @@ -986,7 +989,6 @@ lowercase characters. 4 1 - 63 false @@ -1007,7 +1009,6 @@ lowercase characters. 7 1 - 63 false @@ -1028,7 +1029,6 @@ lowercase characters. 6 1 - 63 false @@ -1049,7 +1049,6 @@ lowercase characters. 9 1 - 63 false @@ -1070,7 +1069,6 @@ lowercase characters. 8 1 - 63 false @@ -1091,7 +1089,6 @@ lowercase characters. 11 1 - 63 false @@ -1112,7 +1109,6 @@ lowercase characters. 10 1 - 63 false @@ -1133,7 +1129,6 @@ lowercase characters. 13 1 - 63 false @@ -1154,7 +1149,6 @@ lowercase characters. 12 1 - 63 false @@ -1175,7 +1169,6 @@ lowercase characters. 15 1 - 63 false @@ -1196,7 +1189,6 @@ lowercase characters. 14 1 - 63 false @@ -1214,7 +1206,6 @@ lowercase characters. NA - 0 @@ -1242,7 +1233,6 @@ lowercase characters. NA - 1 @@ -1274,7 +1264,6 @@ lowercase characters. NA - 63 false @@ -1296,7 +1285,6 @@ lowercase characters. NA - 63 false @@ -1318,7 +1306,6 @@ lowercase characters. NA - 63 false @@ -1444,7 +1431,6 @@ lowercase characters. 5 0 - 63 false @@ -1465,7 +1451,6 @@ lowercase characters. 4 0 - 63 false @@ -1486,7 +1471,6 @@ lowercase characters. 7 0 - 63 false @@ -1507,7 +1491,6 @@ lowercase characters. 6 0 - 63 false @@ -1528,7 +1511,6 @@ lowercase characters. 1 0 - 63 false @@ -1549,7 +1531,6 @@ lowercase characters. 0 0 - 63 false @@ -1570,7 +1551,6 @@ lowercase characters. 3 0 - 63 false @@ -1591,7 +1571,6 @@ lowercase characters. 2 0 - 63 false @@ -1612,7 +1591,6 @@ lowercase characters. 1 1 - 63 false @@ -1633,7 +1611,6 @@ lowercase characters. 0 1 - 63 false @@ -1654,7 +1631,6 @@ lowercase characters. 3 1 - 63 false @@ -1675,7 +1651,6 @@ lowercase characters. 2 1 - 63 false @@ -1696,7 +1671,6 @@ lowercase characters. 5 1 - 63 false @@ -1717,7 +1691,6 @@ lowercase characters. 4 1 - 63 false @@ -1738,7 +1711,6 @@ lowercase characters. 7 1 - 63 false @@ -1759,7 +1731,6 @@ lowercase characters. 6 1 - 63 false @@ -1780,7 +1751,6 @@ lowercase characters. 9 1 - 63 false @@ -1801,7 +1771,6 @@ lowercase characters. 8 1 - 63 false @@ -1822,7 +1791,6 @@ lowercase characters. 11 1 - 63 false @@ -1843,7 +1811,6 @@ lowercase characters. 10 1 - 63 false @@ -1864,7 +1831,6 @@ lowercase characters. 13 1 - 63 false @@ -1885,7 +1851,6 @@ lowercase characters. 12 1 - 63 false @@ -1906,7 +1871,6 @@ lowercase characters. 15 1 - 63 false @@ -1927,7 +1891,6 @@ lowercase characters. 14 1 - 63 false @@ -1945,7 +1908,6 @@ lowercase characters. NA - 0 @@ -1973,7 +1935,6 @@ lowercase characters. NA - 1 @@ -2005,7 +1966,6 @@ lowercase characters. NA - 63 false @@ -2027,7 +1987,6 @@ lowercase characters. NA - 63 false @@ -2049,7 +2008,6 @@ lowercase characters. NA - 63 false @@ -2154,6 +2112,23 @@ lowercase characters. + + + alaska-88E1680 + + 16 + 3 + 23 + 65280 + + + 27 + 4 + 32 + 65503 + + + . 1 diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 index 7ff2b96da2e7..a232c8381527 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 @@ -1 +1 @@ -a51445be255ef6afa324278ba9e191d9 \ No newline at end of file +bf932ba262c96acdfe677bd5078a21d7 \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml index a254fbaa5283..f1cc5989dddb 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + @@ -239,8 +239,8 @@ enumeration Tx parameter type - atten - atten + pre + pre 0 @@ -248,75 +248,10 @@ post 1 - - pre - pre - 2 - - - pre2 - pre2 - 3 - - - pre3 - pre3 - 4 - peak peak - 5 - - - main - main - 6 - - - txAmpAdjEn - txAmpAdjEn - 7 - - - emph0 - emph0 - 8 - - - emph1 - emph1 - 9 - - - txAmpShft - txAmpShft - 10 - - - txEmphEn - txEmphEn - 11 - - - txEmphEn1 - txEmphEn1 - 12 - - - txAmpAdj - txAmpAdj - 13 - - - slewCtrlEn - slewCtrlEn - 14 - - - slewRate - slewRate - 15 + 2 @@ -324,400 +259,180 @@ enumeration Rx parameter type - sqlch - sqlch + dataRate + dataRate 0 - DC - DC + res1Sel + res1Sel 1 - LF - LF + res2Sel + res2Sel 2 - HF - HF + cap1Sel + cap1Sel 3 - gainShape1 - gainShape1 + cap2Sel + cap2Sel 4 - gainShape2 - gainShape2 + minCap + minCap 5 - shortChannelEn - shortChannelEn + minCapN + minCapN + 6 + + + sumfBoostTargetC0 + sumfBoostTargetC0 7 - bfLf - bfLf + sumfBoostTargetC1 + sumfBoostTargetC1 8 - bfHf - bfHf + sumfBoostTargetC2 + sumfBoostTargetC2 9 - minLf - minLf + midpointPhaseOs0 + midpointPhaseOs0 10 - maxLf - maxLf + midpointPhaseOs1 + midpointPhaseOs1 11 - minHf - minHf + midpointPhaseOs2 + midpointPhaseOs2 12 - - maxHf - maxHf - 13 - - - minPre1 - minPre1 - 14 - - - maxPre1 - maxPre1 - 15 - - - minPre2 - minPre2 - 16 - - - maxPre2 - - 17 - - - minPost - minPost - 18 - - - maxPost - maxPost - 19 - - - squelch - squelch - 20 - - - termination - termination - 27 - - - coldEnvelope - coldEnvelope - 35 - - - hotEnvelope - hotEnvelope - 36 - - - dcGain - dcGain - 37 - - - bandWidth - bandWidth - 38 - - - dfe - dfe - 39 - - - ffeR - ffeR - 40 - - - ffeC - ffeC - 41 - - - sampler - sampler - 42 - - - align90 - align90 - 43 - - - ffeS - ffeS - 44 - - - resSel - resSel - 45 - - - resShift - resShift - 46 - - - capSel - capSel - 47 - - - ffeSettingForce - ffeSettingForce - 48 - - - adaptedResSel - adaptedResSel - 49 - - - adaptedCapSel - adaptedCapSel - 50 - selmufi selmufi - 51 + 13 selmuff selmuff - 52 + 14 selmupi selmupi - 53 + 15 selmupf selmupf - 54 - - - slewRateCtrl0 - slewRateCtrl0 - 55 - - - slewRateCtrl1 - slewRateCtrl1 - 56 - - - EO - EO - 57 - - - dataRate - dataRate - 58 - - - res1Sel - res1Sel - 59 - - - res2Sel - res2Sel - 60 - - - cap1Sel - cap1Sel - 61 - - - cap2Sel - cap2Sel - 62 + 16 midpointLargeThresKLane midpointLargeThresKLane - 63 + 17 midpointSmallThresKLane midpointSmallThresKLane - 64 + 18 midpointLargeThresCLane midpointLargeThresCLane - 65 + 19 midpointSmallThresCLane midpointSmallThresCLane - 66 + 20 + + + inxSumfMidpointAdatptiveEnLane + inxSumfMidpointAdatptiveEnLane + 21 dfeResF0aHighThresInitLane dfeResF0aHighThresInitLane - 67 + 22 dfeResF0aHighThresEndLane dfeResF0aHighThresEndLane - 68 - - - current1Sel - current1Sel - 69 - - - rl1Sel - rl1Sel - 70 + 23 - rl1Extra - rl1Extra - 71 - - - cl1Ctrl - cl1Ctrl - 72 - - - enMidFreq - enMidFreq - 73 - - - cs1Mid - cs1Mid - 74 - - - rs1Mid - rs1Mid - 75 - - - rfCtrl - rfCtrl - 76 - - - rl1TiaSel - rl1TiaSel - 77 - - - rl1TiaExtra - rl1TiaExtra - 78 - - - hpfRSel1st - hpfRSel1st - 79 - - - current1TiaSel - current1TiaSel - 80 - - - rl2Tune - rl2Tune - 81 - - - rl2Sel - rl2Sel - 82 + squelch + squelch + 24 - rs2Sel - rs2Sel - 83 + align90 + align90 + 25 - current2Sel - current2Sel - 84 + sampler + sampler + 26 - hpfRsel2nd - hpfRsel2nd - 85 + slewRateCtrl0 + slewRateCtrl0 + 27 - BW - BW - 86 + slewRateCtrl1 + slewRateCtrl1 + 28 - dfeGAIN - dfeGAIN - 87 + EO + EO + 29 - dfeGAIN2 - dfeGAIN2 - 88 + minCap1 + minCap1 + 30 - pre1 - pre1 - 89 + maxCap1 + maxCap1 + 31 - pre2 - pre2 - 90 + minRes1 + minRes1 + 32 - post1 - post1 - 91 + maxRes1 + maxRes1 + 33 boolean-type enumeration - Boolean 32 bits , due to bing endian + Boolean 32 bits , due to big endian false False @@ -764,33 +479,6 @@ 5 - - uint8-type - uint32 - Uint8 32 bits , due to bing endian - 0 - 255 - - - serdes-termination-type - enumeration - RX termination mode - - GND - Enabled - 0 - - - VDD - Disabled - 1 - - - FLOATING - RS FEC enabled - 2 - - port-interconnect-profile-type enumeration @@ -870,174 +558,203 @@ AVAGO profile_default 1000MR1 + false 18 AVAGO profile_default 1000MR1 + false 19 AVAGO profile_default 1000MR1 + false 20 AVAGO profile_default 1000MR1 + false 21 AVAGO profile_default 1000MR1 + false 22 AVAGO profile_default 1000MR1 + false 23 AVAGO profile_default 1000MR1 + false 24 AVAGO profile_default 1000MR1 + false 25 AVAGO profile_default 1000MR1 + false 26 AVAGO profile_default 1000MR1 + false 27 AVAGO profile_default 1000MR1 + false 28 AVAGO profile_default 1000MR1 + false 29 AVAGO profile_default 1000MR1 + false 30 AVAGO profile_default 1000MR1 + false 31 AVAGO profile_default 1000MR1 + false 32 AVAGO profile_default 1000MR1 + false 33 AVAGO profile_default 1000MR1 + false 34 AVAGO profile_default 1000MR1 + false 35 AVAGO profile_default 1000MR1 + false 36 AVAGO profile_default 1000MR1 + false 37 AVAGO profile_default 1000MR1 + false 38 AVAGO profile_default 1000MR1 + false 39 AVAGO profile_default 1000MR1 + false 40 AVAGO profile_default 1000MR1 + false 49 AVAGO profile_default 10GR1 + false 50 AVAGO profile_default 10GR1 + false 53 AVAGO profile_default 25GR2 + false 55 AVAGO profile_default 25GR2 + false 57 AVAGO profile_default 25GR2 + false diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 index 63460edb35f8..2e3f0e0342dd 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 @@ -1 +1 @@ -afe146bae79635a1513eba92343210b6 \ No newline at end of file +bb2f27ac93e33103554948dee6f3a1f1 \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml index d9ea4a9e233b..30c2712f2a37 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + @@ -239,8 +239,8 @@ enumeration Tx parameter type - atten - atten + pre + pre 0 @@ -248,75 +248,10 @@ post 1 - - pre - pre - 2 - - - pre2 - pre2 - 3 - - - pre3 - pre3 - 4 - peak peak - 5 - - - main - main - 6 - - - txAmpAdjEn - txAmpAdjEn - 7 - - - emph0 - emph0 - 8 - - - emph1 - emph1 - 9 - - - txAmpShft - txAmpShft - 10 - - - txEmphEn - txEmphEn - 11 - - - txEmphEn1 - txEmphEn1 - 12 - - - txAmpAdj - txAmpAdj - 13 - - - slewCtrlEn - slewCtrlEn - 14 - - - slewRate - slewRate - 15 + 2 @@ -324,400 +259,180 @@ enumeration Rx parameter type - sqlch - sqlch + dataRate + dataRate 0 - DC - DC + res1Sel + res1Sel 1 - LF - LF + res2Sel + res2Sel 2 - HF - HF + cap1Sel + cap1Sel 3 - gainShape1 - gainShape1 + cap2Sel + cap2Sel 4 - gainShape2 - gainShape2 + minCap + minCap 5 - shortChannelEn - shortChannelEn + minCapN + minCapN + 6 + + + sumfBoostTargetC0 + sumfBoostTargetC0 7 - bfLf - bfLf + sumfBoostTargetC1 + sumfBoostTargetC1 8 - bfHf - bfHf + sumfBoostTargetC2 + sumfBoostTargetC2 9 - minLf - minLf + midpointPhaseOs0 + midpointPhaseOs0 10 - maxLf - maxLf + midpointPhaseOs1 + midpointPhaseOs1 11 - minHf - minHf + midpointPhaseOs2 + midpointPhaseOs2 12 - - maxHf - maxHf - 13 - - - minPre1 - minPre1 - 14 - - - maxPre1 - maxPre1 - 15 - - - minPre2 - minPre2 - 16 - - - maxPre2 - - 17 - - - minPost - minPost - 18 - - - maxPost - maxPost - 19 - - - squelch - squelch - 20 - - - termination - termination - 27 - - - coldEnvelope - coldEnvelope - 35 - - - hotEnvelope - hotEnvelope - 36 - - - dcGain - dcGain - 37 - - - bandWidth - bandWidth - 38 - - - dfe - dfe - 39 - - - ffeR - ffeR - 40 - - - ffeC - ffeC - 41 - - - sampler - sampler - 42 - - - align90 - align90 - 43 - - - ffeS - ffeS - 44 - - - resSel - resSel - 45 - - - resShift - resShift - 46 - - - capSel - capSel - 47 - - - ffeSettingForce - ffeSettingForce - 48 - - - adaptedResSel - adaptedResSel - 49 - - - adaptedCapSel - adaptedCapSel - 50 - selmufi selmufi - 51 + 13 selmuff selmuff - 52 + 14 selmupi selmupi - 53 + 15 selmupf selmupf - 54 - - - slewRateCtrl0 - slewRateCtrl0 - 55 - - - slewRateCtrl1 - slewRateCtrl1 - 56 - - - EO - EO - 57 - - - dataRate - dataRate - 58 - - - res1Sel - res1Sel - 59 - - - res2Sel - res2Sel - 60 - - - cap1Sel - cap1Sel - 61 - - - cap2Sel - cap2Sel - 62 + 16 midpointLargeThresKLane midpointLargeThresKLane - 63 + 17 midpointSmallThresKLane midpointSmallThresKLane - 64 + 18 midpointLargeThresCLane midpointLargeThresCLane - 65 + 19 midpointSmallThresCLane midpointSmallThresCLane - 66 + 20 + + + inxSumfMidpointAdatptiveEnLane + inxSumfMidpointAdatptiveEnLane + 21 dfeResF0aHighThresInitLane dfeResF0aHighThresInitLane - 67 + 22 dfeResF0aHighThresEndLane dfeResF0aHighThresEndLane - 68 - - - current1Sel - current1Sel - 69 - - - rl1Sel - rl1Sel - 70 + 23 - rl1Extra - rl1Extra - 71 - - - cl1Ctrl - cl1Ctrl - 72 - - - enMidFreq - enMidFreq - 73 - - - cs1Mid - cs1Mid - 74 - - - rs1Mid - rs1Mid - 75 - - - rfCtrl - rfCtrl - 76 - - - rl1TiaSel - rl1TiaSel - 77 - - - rl1TiaExtra - rl1TiaExtra - 78 - - - hpfRSel1st - hpfRSel1st - 79 - - - current1TiaSel - current1TiaSel - 80 - - - rl2Tune - rl2Tune - 81 - - - rl2Sel - rl2Sel - 82 + squelch + squelch + 24 - rs2Sel - rs2Sel - 83 + align90 + align90 + 25 - current2Sel - current2Sel - 84 + sampler + sampler + 26 - hpfRsel2nd - hpfRsel2nd - 85 + slewRateCtrl0 + slewRateCtrl0 + 27 - BW - BW - 86 + slewRateCtrl1 + slewRateCtrl1 + 28 - dfeGAIN - dfeGAIN - 87 + EO + EO + 29 - dfeGAIN2 - dfeGAIN2 - 88 + minCap1 + minCap1 + 30 - pre1 - pre1 - 89 + maxCap1 + maxCap1 + 31 - pre2 - pre2 - 90 + minRes1 + minRes1 + 32 - post1 - post1 - 91 + maxRes1 + maxRes1 + 33 boolean-type enumeration - Boolean 32 bits , due to bing endian + Boolean 32 bits , due to big endian false False @@ -764,33 +479,6 @@ 5 - - uint8-type - uint32 - Uint8 32 bits , due to bing endian - 0 - 255 - - - serdes-termination-type - enumeration - RX termination mode - - GND - Enabled - 0 - - - VDD - Disabled - 1 - - - FLOATING - RS FEC enabled - 2 - - port-interconnect-profile-type enumeration @@ -870,174 +558,203 @@ AVAGO profile_default 1000MR1 + false 2 AVAGO profile_default 1000MR1 + false 3 AVAGO profile_default 1000MR1 + false 4 AVAGO profile_default 1000MR1 + false 5 AVAGO profile_default 1000MR1 + false 6 AVAGO profile_default 1000MR1 + false 7 AVAGO profile_default 1000MR1 + false 8 AVAGO profile_default 1000MR1 + false 9 AVAGO profile_default 1000MR1 + false 10 AVAGO profile_default 1000MR1 + false 11 AVAGO profile_default 1000MR1 + false 12 AVAGO profile_default 1000MR1 + false 13 AVAGO profile_default 1000MR1 + false 14 AVAGO profile_default 1000MR1 + false 15 AVAGO profile_default 1000MR1 + false 16 AVAGO profile_default 1000MR1 + false 41 AVAGO profile_default 1000MR1 + false 42 AVAGO profile_default 1000MR1 + false 43 AVAGO profile_default 1000MR1 + false 44 AVAGO profile_default 1000MR1 + false 45 AVAGO profile_default 1000MR1 + false 46 AVAGO profile_default 1000MR1 + false 47 AVAGO profile_default 1000MR1 + false 48 AVAGO profile_default 1000MR1 + false 51 AVAGO profile_default 10GR1 + false 52 AVAGO profile_default 10GR1 + false 53 AVAGO profile_default 25GR2 + false 55 AVAGO profile_default 25GR2 + false 57 AVAGO profile_default 25GR2 + false diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 index 6405ae29196c..410763693907 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 @@ -1 +1 @@ -e9257245632ec82a066bef433451b17f \ No newline at end of file +411f788b1a253e5ad2e0e9026d0bb1aa \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml index 4c89ace68533..fe782eb5ce97 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + @@ -519,7 +519,28 @@ 1 + + asic-type + enumeration + ASIC Type + + ASIC_AC3X + AC3X + 0 + + + ASIC_AC5X + AC5X + 1 + + + ASIC_Falcon + FALCON + 2 + + + ASIC_AC3X AC3X @@ -593,7 +614,6 @@ TCAM_ROUTER_BASED 0 - MID_L3_MID_L2_NO_EM false diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 index 3f32972fed77..97def7a90484 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 @@ -1 +1 @@ -999d0a26c697a35601fcef34127c216d \ No newline at end of file +e56672c96f9a00b3652bdbe8a4ec4a23 \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml index ca34f67ad124..43dde6b94705 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + @@ -36,6 +36,36 @@ 2 + + InDropCounter-type + enumeration + Router In Drop Reason Feature Options + + TTL_HOPLIMIT_EXCEEDED + Router In Drop Counters track TTL & Hop Limit Exceeded Packets + 0 + + + ROUTE_BLACKHOLE + Router In Drop Counters track Route Black Hole Packets + 1 + + + + Feature-enable + enumeration + Feature Enabled/Disabled + + Disabled + Disabled + 0 + + + Enabled + Enabled + 1 + + log-dest-file-path-type string @@ -62,6 +92,11 @@ ACLs for control packet handling 2 + + debug-counter-acl + ACLs for Debug Counters + 3 + ingress-acl-stage-type @@ -126,13 +161,15 @@ AC5X 1 + + ASIC_Falcon + FALCON + 2 + ASIC_AC3X ASK-Board-M0-48x1G-4x10G.xml - - false - 1 @@ -405,9 +442,7 @@ 1024 - - 4096 - + 4096 SAI_LOG_SYSLOG diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/sai.profile b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/sai.profile index a8c3f533b1cc..9cb29a8a47c0 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/sai.profile +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/sai.profile @@ -2,3 +2,4 @@ mode=1 hwId=et6448m SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini switchProfile=/usr/share/sonic/hwsku/SAI-M0-48x1G-4x10G.xml +createSwitchTimeout=90 diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers.json.j2 b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers.json.j2 new file mode 100644 index 000000000000..0b1cb2c541b6 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t0.j2 b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..31ae10e0c86c --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t0.j2 @@ -0,0 +1,42 @@ +{%- set default_cable = '5m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,256,4) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "57000140", + "type": "ingress", + "mode": "dynamic", + "xoff": "19247104" + }, + "egress_lossless_pool": { + "size": "57000140", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"58787284" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"58787284" + } + }, +{%- endmacro %} + diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t1.j2 b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..31ae10e0c86c --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t1.j2 @@ -0,0 +1,42 @@ +{%- set default_cable = '5m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,256,4) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "57000140", + "type": "ingress", + "mode": "dynamic", + "xoff": "19247104" + }, + "egress_lossless_pool": { + "size": "57000140", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"58787284" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"58787284" + } + }, +{%- endmacro %} + diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/ixr7220_h4_64d.bcm b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/ixr7220_h4_64d.bcm new file mode 100644 index 000000000000..c916ad785f9e --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/ixr7220_h4_64d.bcm @@ -0,0 +1,1139 @@ +# $Copyright: Broadcom Ltd.$ +# +# BCM5699 64x400g port configuration. +# +# configuration yaml file +# device: +# : +#
: +# ? +# : +# : +# ... +# : +# : +# : +# : +# ... +# : +# + +--- +bcm_device: + 0: + global: + pktio_mode: 1 + vlan_flooding_l2mc_num_reserved: 0 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + # LTSW uses value 1 for ALPM combined mode + l3_alpm_template: 1 + l3_alpm_hit_skip: 1 + sai_feat_tail_timestamp : 1 + sai_field_group_auto_prioritize: 1 + #l3_intf_vlan_split_egress for MTU at L3IF + l3_intf_vlan_split_egress: 1 + pfc_deadlock_seq_control: 1 + sai_tunnel_support: 2 + sai_port_phy_time_sync_en: 1 + bcm_tunnel_term_compatible_mode: 1 + l3_ecmp_member_first_lkup_mem_size: 12288 + fpem_mem_entries: 64000 + default_cpu_tx_queue: 7 +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26371504 + TX_LANE_MAP: 0x37260415 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26371504 + TX_LANE_MAP: 0x51406273 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62735140 + TX_LANE_MAP: 0x62735140 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x51406273 + TX_LANE_MAP: 0x40517362 + RX_POLARITY_FLIP: 0xf5 + TX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52437061 + TX_LANE_MAP: 0x42537160 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaf + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52437061 + TX_LANE_MAP: 0x41507362 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52437061 + TX_LANE_MAP: 0x40517362 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52437061 + TX_LANE_MAP: 0x41507362 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x42537160 + TX_LANE_MAP: 0x40516273 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54237061 + TX_LANE_MAP: 0x41507362 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23547160 + TX_LANE_MAP: 0x51406273 + RX_POLARITY_FLIP: 0x57 + TX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52437061 + TX_LANE_MAP: 0x41507362 + RX_POLARITY_FLIP: 0x57 + TX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x24350716 + TX_LANE_MAP: 0x15042637 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x41537062 + TX_LANE_MAP: 0x41507362 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x14350726 + TX_LANE_MAP: 0x15042637 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x51437062 + TX_LANE_MAP: 0x41507362 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52436071 + TX_LANE_MAP: 0x51406273 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x25340716 + TX_LANE_MAP: 0x04153726 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52437061 + TX_LANE_MAP: 0x51406273 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x25340716 + TX_LANE_MAP: 0x04153726 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52437061 + TX_LANE_MAP: 0x51406273 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15340726 + TX_LANE_MAP: 0x04153726 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52437061 + TX_LANE_MAP: 0x51406273 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x25340716 + TX_LANE_MAP: 0x04153726 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52437061 + TX_LANE_MAP: 0x51406273 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x25340716 + TX_LANE_MAP: 0x04153726 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34251607 + TX_LANE_MAP: 0x51406273 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43516270 + TX_LANE_MAP: 0x34250716 + RX_POLARITY_FLIP: 0x51 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15042637 + TX_LANE_MAP: 0x25041637 + RX_POLARITY_FLIP: 0xc5 + TX_POLARITY_FLIP: 0xc5 + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26371504 + TX_LANE_MAP: 0x37260415 + RX_POLARITY_FLIP: 0xca + TX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62735140 + TX_LANE_MAP: 0x04153726 + RX_POLARITY_FLIP: 0xcb + TX_POLARITY_FLIP: 0x05 + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62735140 + TX_LANE_MAP: 0x52736140 + RX_POLARITY_FLIP: 0x3a + TX_POLARITY_FLIP: 0x3a + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26371504 + TX_LANE_MAP: 0x25371604 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0xca + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x37260415 + TX_LANE_MAP: 0x40617352 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73624051 + TX_LANE_MAP: 0x73524061 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x51406273 + TX_LANE_MAP: 0x52406173 + RX_POLARITY_FLIP: 0xc5 + TX_POLARITY_FLIP: 0x35 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34152607 + TX_LANE_MAP: 0x43527061 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52437061 + TX_LANE_MAP: 0x04153726 + RX_POLARITY_FLIP: 0x51 + TX_POLARITY_FLIP: 0xab + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x25340716 + TX_LANE_MAP: 0x15042637 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34251607 + TX_LANE_MAP: 0x40517362 + RX_POLARITY_FLIP: 0xaa + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x25340716 + TX_LANE_MAP: 0x15072634 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xfb + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34521670 + TX_LANE_MAP: 0x40517362 + RX_POLARITY_FLIP: 0x99 + TX_POLARITY_FLIP: 0x8a + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15340726 + TX_LANE_MAP: 0x15042637 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43526170 + TX_LANE_MAP: 0x40517362 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x25340716 + TX_LANE_MAP: 0x15042637 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43526170 + TX_LANE_MAP: 0x40517362 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x25340716 + TX_LANE_MAP: 0x15042637 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34527160 + TX_LANE_MAP: 0x51406273 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43516270 + TX_LANE_MAP: 0x41507362 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x53416270 + TX_LANE_MAP: 0x51406273 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x14350726 + TX_LANE_MAP: 0x05142637 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35241607 + TX_LANE_MAP: 0x04153726 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x25340716 + TX_LANE_MAP: 0x14053726 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32451706 + TX_LANE_MAP: 0x15042637 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45320716 + TX_LANE_MAP: 0x14053726 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x24351706 + TX_LANE_MAP: 0x04152637 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34251607 + TX_LANE_MAP: 0x14053726 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34251607 + TX_LANE_MAP: 0x04153726 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34251607 + TX_LANE_MAP: 0x14053726 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34251607 + TX_LANE_MAP: 0x24351706 + RX_POLARITY_FLIP: 0x57 + TX_POLARITY_FLIP: 0xa0 + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x51406273 + TX_LANE_MAP: 0x51406273 + RX_POLARITY_FLIP: 0xf5 + TX_POLARITY_FLIP: 0x35 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62735140 + TX_LANE_MAP: 0x43627051 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26371504 + TX_LANE_MAP: 0x40517362 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26371504 + TX_LANE_MAP: 0x26371504 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0xca +... +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 5 + : + PC_PHYS_PORT_ID: 5 + ? + PORT_ID: 9 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 13 + : + PC_PHYS_PORT_ID: 13 + ? + PORT_ID: 17 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 21 + : + PC_PHYS_PORT_ID: 21 + ? + PORT_ID: 25 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 29 + : + PC_PHYS_PORT_ID: 29 + ? + PORT_ID: 34 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 38 + : + PC_PHYS_PORT_ID: 37 + ? + PORT_ID: 42 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 46 + : + PC_PHYS_PORT_ID: 45 + ? + PORT_ID: 51 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 53 + ? + PORT_ID: 59 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 63 + : + PC_PHYS_PORT_ID: 61 + ? + PORT_ID: 68 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 72 + : + PC_PHYS_PORT_ID: 69 + ? + PORT_ID: 76 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 80 + : + PC_PHYS_PORT_ID: 77 + ? + PORT_ID: 85 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 89 + : + PC_PHYS_PORT_ID: 85 + ? + PORT_ID: 93 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 97 + : + PC_PHYS_PORT_ID: 93 + ? + PORT_ID: 102 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 106 + : + PC_PHYS_PORT_ID: 101 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 114 + : + PC_PHYS_PORT_ID: 109 + ? + PORT_ID: 119 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 117 + ? + PORT_ID: 127 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 131 + : + PC_PHYS_PORT_ID: 125 + ? + PORT_ID: 136 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 140 + : + PC_PHYS_PORT_ID: 133 + ? + PORT_ID: 144 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 148 + : + PC_PHYS_PORT_ID: 141 + ? + PORT_ID: 153 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 157 + : + PC_PHYS_PORT_ID: 149 + ? + PORT_ID: 161 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 157 + ? + PORT_ID: 170 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 174 + : + PC_PHYS_PORT_ID: 165 + ? + PORT_ID: 178 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 182 + : + PC_PHYS_PORT_ID: 173 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 191 + : + PC_PHYS_PORT_ID: 181 + ? + PORT_ID: 195 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 199 + : + PC_PHYS_PORT_ID: 189 + ? + PORT_ID: 204 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 208 + : + PC_PHYS_PORT_ID: 197 + ? + PORT_ID: 212 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 216 + : + PC_PHYS_PORT_ID: 205 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 225 + : + PC_PHYS_PORT_ID: 213 + ? + PORT_ID: 229 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 233 + : + PC_PHYS_PORT_ID: 221 + ? + PORT_ID: 238 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 229 + ? + PORT_ID: 246 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 250 + : + PC_PHYS_PORT_ID: 237 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 259 + : + PC_PHYS_PORT_ID: 245 + ? + PORT_ID: 263 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 267 + : + PC_PHYS_PORT_ID: 253 + ? + PORT_ID: 50 + : + PC_PHYS_PORT_ID: 258 + ? + PORT_ID: 152 + : + PC_PHYS_PORT_ID: 257 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: [152, 50] + : + ENABLE: 0 + SPEED: 10000 + NUM_LANES: 1 + FEC_MODE: PC_FEC_NONE + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 0 + : + &port_mode_10g + ENABLE: 1 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [1, 5, 9, 13, 17, 21, 25, 29, 34, 38, 42, 46, 51, 55, 59, 63, 68, 72, 76, 80, 85, 89, 93, 97, 102, 106, 110, 114, 119, 123, 127, 131, 136, 140, 144, 148, 153, 157, 161, 165, 170, 174, 178, 182, 187, 191, 195, 199, 204, 208, 212, 216, 221, 225, 229, 233, 238, 242, 246, 250, 255, 259, 263, 267] + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0 + + # Per pipe flex state configuration + #FLEX_STATE_CONFIG: + # FLEX_STATE_ING_OPERMODE_PIPEUNIQUE: 0 + # FLEX_STATE_EGR_OPERMODE_PIPEUNIQUE: 1 + + # Lossy vs Lossless mode + TM_THD_CONFIG: + THRESHOLD_MODE: LOSSLESS + + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/pg_profile_lookup.ini new file mode 100644 index 000000000000..92d4f78ef3a8 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/pg_profile_lookup.ini @@ -0,0 +1,23 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 0 2288 + 25000 5m 1248 2288 53248 0 2288 + 40000 5m 1248 2288 66560 0 2288 + 50000 5m 1248 2288 90272 0 2288 + 100000 5m 18796 3556 150368 -2 3556 + 200000 5m 18796 3556 150368 -2 3556 + 400000 5m 18796 3556 150368 -2 3556 + 10000 40m 1248 2288 37024 0 2288 + 25000 40m 1248 2288 53248 0 2288 + 40000 40m 1248 2288 71552 0 2288 + 50000 40m 1248 2288 96096 0 2288 + 100000 40m 18796 3556 150368 -2 3556 + 200000 40m 18796 3556 150368 -2 3556 + 400000 40m 18796 3556 150368 -2 3556 + 10000 300m 1248 2288 46176 0 2288 + 25000 300m 1248 2288 79040 0 2288 + 40000 300m 1248 2288 108160 0 2288 + 50000 300m 1248 2288 141856 0 2288 + 100000 300m 18796 3556 150368 -2 3556 + 200000 300m 18796 3556 150368 -2 3556 + 400000 300m 18796 3556 150368 -2 3556 diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/port_config.ini b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/port_config.ini new file mode 100644 index 000000000000..07184ae23f78 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/port_config.ini @@ -0,0 +1,67 @@ +# name lanes alias index speed +Ethernet0 129,130,131,132,133,134,135,136 fourhundredGigE1/1 1 400000 +Ethernet4 137,138,139,140,141,142,143,144 fourhundredGigE1/2 2 400000 +Ethernet8 145,146,147,148,149,150,151,152 fourhundredGigE1/3 3 400000 +Ethernet12 153,154,155,156,157,158,159,160 fourhundredGigE1/4 4 400000 +Ethernet16 161,162,163,164,165,166,167,168 fourhundredGigE1/5 5 400000 +Ethernet20 169,170,171,172,173,174,175,176 fourhundredGigE1/6 6 400000 +Ethernet24 177,178,179,180,181,182,183,184 fourhundredGigE1/7 7 400000 +Ethernet28 185,186,187,188,189,190,191,192 fourhundredGigE1/8 8 400000 +Ethernet32 193,194,195,196,197,198,199,200 fourhundredGigE1/9 9 400000 +Ethernet36 201,202,203,204,205,206,207,208 fourhundredGigE1/10 10 400000 +Ethernet40 249,250,251,252,253,254,255,256 fourhundredGigE1/11 11 400000 +Ethernet44 241,242,243,244,245,246,247,248 fourhundredGigE1/12 12 400000 +Ethernet48 225,226,227,228,229,230,231,232 fourhundredGigE1/13 13 400000 +Ethernet52 233,234,235,236,237,238,239,240 fourhundredGigE1/14 14 400000 +Ethernet56 217,218,219,220,221,222,223,224 fourhundredGigE1/15 15 400000 +Ethernet60 209,210,211,212,213,214,215,216 fourhundredGigE1/16 16 400000 +Ethernet64 289,290,291,292,293,294,295,296 fourhundredGigE1/17 17 400000 +Ethernet68 297,298,299,300,301,302,303,304 fourhundredGigE1/18 18 400000 +Ethernet72 281,282,283,284,285,286,287,288 fourhundredGigE1/19 19 400000 +Ethernet76 273,274,275,276,277,278,279,280 fourhundredGigE1/20 20 400000 +Ethernet80 257,258,259,260,261,262,263,264 fourhundredGigE1/21 21 400000 +Ethernet84 265,266,267,268,269,270,271,272 fourhundredGigE1/22 22 400000 +Ethernet88 305,306,307,308,309,310,311,312 fourhundredGigE1/23 23 400000 +Ethernet92 313,314,315,316,317,318,319,320 fourhundredGigE1/24 24 400000 +Ethernet96 321,322,323,324,325,326,327,328 fourhundredGigE1/25 25 400000 +Ethernet100 329,330,331,332,333,334,335,336 fourhundredGigE1/26 26 400000 +Ethernet104 337,338,339,340,341,342,343,344 fourhundredGigE1/27 27 400000 +Ethernet108 345,346,347,348,349,350,351,352 fourhundredGigE1/28 28 400000 +Ethernet112 353,354,355,356,357,358,359,360 fourhundredGigE1/29 29 400000 +Ethernet116 361,362,363,364,365,366,367,368 fourhundredGigE1/30 30 400000 +Ethernet120 369,370,371,372,373,374,375,376 fourhundredGigE1/31 31 400000 +Ethernet124 377,378,379,380,381,382,383,384 fourhundredGigE1/32 32 400000 +Ethernet128 97,98,99,100,101,102,103,104 fourhundredGigE1/33 33 400000 +Ethernet132 105,106,107,108,109,110,111,112 fourhundredGigE1/34 34 400000 +Ethernet136 113,114,115,116,117,118,119,120 fourhundredGigE1/35 35 400000 +Ethernet140 121,122,123,124,125,126,127,128 fourhundredGigE1/36 36 400000 +Ethernet144 57,58,59,60,61,62,63,64 fourhundredGigE1/37 37 400000 +Ethernet148 65,66,67,68,69,70,71,72 fourhundredGigE1/38 38 400000 +Ethernet152 49,50,51,52,53,54,55,56 fourhundredGigE1/39 39 400000 +Ethernet156 81,82,83,84,85,86,87,88 fourhundredGigE1/40 40 400000 +Ethernet160 41,42,43,44,45,46,47,48 fourhundredGigE1/41 41 400000 +Ethernet164 73,74,75,76,77,78,79,80 fourhundredGigE1/42 42 400000 +Ethernet168 33,34,35,36,37,38,39,40 fourhundredGigE1/43 43 400000 +Ethernet172 89,90,91,92,93,94,95,96 fourhundredGigE1/44 44 400000 +Ethernet176 25,26,27,28,29,30,31,32 fourhundredGigE1/45 45 400000 +Ethernet180 17,18,19,20,21,22,23,24 fourhundredGigE1/46 46 400000 +Ethernet184 1,2,3,4,5,6,7,8 fourhundredGigE1/47 47 400000 +Ethernet188 9,10,11,12,13,14,15,16 fourhundredGigE1/48 48 400000 +Ethernet192 497,498,499,500,501,502,503,504 fourhundredGigE1/49 49 400000 +Ethernet196 505,506,507,508,509,510,511,512 fourhundredGigE1/50 50 400000 +Ethernet200 489,490,491,492,493,494,495,496 fourhundredGigE1/51 51 400000 +Ethernet204 481,482,483,484,485,486,487,488 fourhundredGigE1/52 52 400000 +Ethernet208 473,474,475,476,477,478,479,480 fourhundredGigE1/53 53 400000 +Ethernet212 417,418,419,420,421,422,423,424 fourhundredGigE1/54 54 400000 +Ethernet216 465,466,467,468,469,470,471,472 fourhundredGigE1/55 55 400000 +Ethernet220 433,434,435,436,437,438,439,440 fourhundredGigE1/56 56 400000 +Ethernet224 457,458,459,460,461,462,463,464 fourhundredGigE1/57 57 400000 +Ethernet228 425,426,427,428,429,430,431,432 fourhundredGigE1/58 58 400000 +Ethernet232 449,450,451,452,453,454,455,456 fourhundredGigE1/59 59 400000 +Ethernet236 441,442,443,444,445,446,447,448 fourhundredGigE1/60 60 400000 +Ethernet240 385,386,387,388,389,390,391,392 fourhundredGigE1/61 61 400000 +Ethernet244 401,402,403,404,405,406,407,408 fourhundredGigE1/62 62 400000 +Ethernet248 393,394,395,396,397,398,399,400 fourhundredGigE1/63 63 400000 +Ethernet252 409,410,411,412,413,414,415,416 fourhundredGigE1/64 64 400000 +Ethernet256 513 tenGigE1/65 65 10000 +Ethernet257 515 tenGigE1/66 66 10000 diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/profile.ini b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/profile.ini new file mode 100644 index 000000000000..4eda67c91a69 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/profile.ini @@ -0,0 +1 @@ +switchMacAddress=XX:XX:XX:XX:XX:XX diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/qos.json.j2 b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/qos.json.j2 new file mode 100644 index 000000000000..3e548325ea30 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/sai.profile b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/sai.profile new file mode 100644 index 000000000000..c03cbd55290a --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/ixr7220_h4_64d.bcm diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/custom_led_H4_V14.0.bin b/device/nokia/x86_64-nokia_ixr7220_h4-r0/custom_led_H4_V14.0.bin new file mode 100644 index 000000000000..06bc6d598b41 Binary files /dev/null and b/device/nokia/x86_64-nokia_ixr7220_h4-r0/custom_led_H4_V14.0.bin differ diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/default_sku b/device/nokia/x86_64-nokia_ixr7220_h4-r0/default_sku new file mode 100644 index 000000000000..fd40563624ac --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/default_sku @@ -0,0 +1 @@ +Nokia-IXR7220-H4-64D t1 diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/installer.conf b/device/nokia/x86_64-nokia_ixr7220_h4-r0/installer.conf new file mode 100644 index 000000000000..8b137891791f --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/installer.conf @@ -0,0 +1 @@ + diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/led_proc_init.soc b/device/nokia/x86_64-nokia_ixr7220_h4-r0/led_proc_init.soc new file mode 100644 index 000000000000..82c688080fd6 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/led_proc_init.soc @@ -0,0 +1,4 @@ +led stop +led load /usr/share/sonic/platform/custom_led_H4_V14.0.bin +led auto on +led start diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/pcie.yaml b/device/nokia/x86_64-nokia_ixr7220_h4-r0/pcie.yaml new file mode 100644 index 000000000000..ccfe27050883 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/pcie.yaml @@ -0,0 +1,507 @@ +- bus: '00' + dev: '00' + fn: '0' + id: 6f00 + name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2 + (rev 03)' +- bus: '00' + dev: '01' + fn: '0' + id: 6f02 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 1 (rev 03)' +- bus: '00' + dev: '02' + fn: '0' + id: 6f04 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 2 (rev 03)' +- bus: '00' + dev: '02' + fn: '2' + id: 6f06 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 2 (rev 03)' +- bus: '00' + dev: '03' + fn: '0' + id: 6f08 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '03' + fn: '1' + id: 6f09 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '03' + fn: '2' + id: 6f0a + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '03' + fn: '3' + id: 6f0b + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '05' + fn: '0' + id: 6f28 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Map/VTd_Misc/System Management (rev 03)' +- bus: '00' + dev: '05' + fn: '1' + id: 6f29 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Hot Plug (rev 03)' +- bus: '00' + dev: '05' + fn: '2' + id: 6f2a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO RAS/Control Status/Global Errors (rev 03)' +- bus: '00' + dev: '05' + fn: '4' + id: 6f2c + name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev + 03)' +- bus: '00' + dev: '14' + fn: '0' + id: 8c31 + name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB + xHCI (rev 05)' +- bus: '00' + dev: '16' + fn: '0' + id: 8c3a + name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset + Family MEI Controller #1 (rev 04)' +- bus: '00' + dev: '16' + fn: '1' + id: 8c3b + name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset + Family MEI Controller #2 (rev 04)' +- bus: '00' + dev: 1c + fn: '0' + id: 8c10 + name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express + Root Port #1 (rev d5)' +- bus: '00' + dev: 1c + fn: '7' + id: 8c1e + name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express + Root Port #8 (rev d5)' +- bus: '00' + dev: 1d + fn: '0' + id: 8c26 + name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB + EHCI #1 (rev 05)' +- bus: '00' + dev: 1f + fn: '0' + id: 8c54 + name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard + SKU LPC Controller (rev 05)' +- bus: '00' + dev: 1f + fn: '2' + id: 8c02 + name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port + SATA Controller 1 [AHCI mode] (rev 05)' +- bus: '00' + dev: 1f + fn: '3' + id: 8c22 + name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller + (rev 05)' +- bus: '02' + dev: '00' + fn: '0' + id: 6f50 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 0' +- bus: '02' + dev: '00' + fn: '1' + id: 6f51 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 1' +- bus: '02' + dev: '00' + fn: '2' + id: 6f52 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 2' +- bus: '02' + dev: '00' + fn: '3' + id: 6f53 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 3' +- bus: '03' + dev: '00' + fn: '0' + id: 15ab + name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane' +- bus: '03' + dev: '00' + fn: '1' + id: 15ab + name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane' +- bus: '05' + dev: '00' + fn: '0' + id: b404 + name: 'PCI bridge: Pericom Semiconductor Device b404 (rev 01)' +- bus: '06' + dev: '01' + fn: '0' + id: b404 + name: 'PCI bridge: Pericom Semiconductor Device b404 (rev 01)' +- bus: '06' + dev: '02' + fn: '0' + id: b404 + name: 'PCI bridge: Pericom Semiconductor Device b404 (rev 01)' +- bus: '06' + dev: '03' + fn: '0' + id: b404 + name: 'PCI bridge: Pericom Semiconductor Device b404 (rev 01)' +- bus: '07' + dev: '00' + fn: '0' + id: '8664' + name: 'Class 2080: Accton Technology Corporation Device 8664' +- bus: 08 + dev: '00' + fn: '0' + id: '8664' + name: 'Class 2080: Accton Technology Corporation Device 8664' +- bus: 09 + dev: '00' + fn: '0' + id: '8664' + name: 'Class 2080: Accton Technology Corporation Device 8664' +- bus: 0a + dev: '00' + fn: '0' + id: b990 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM56990 Switch ASIC + [Tomahawk4] (rev 11)' +- bus: 0e + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: ff + dev: 0b + fn: '0' + id: 6f81 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 03)' +- bus: ff + dev: 0b + fn: '1' + id: 6f36 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 03)' +- bus: ff + dev: 0b + fn: '2' + id: 6f37 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 03)' +- bus: ff + dev: 0b + fn: '3' + id: 6f76 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link Debug (rev 03)' +- bus: ff + dev: 0c + fn: '0' + id: 6fe0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0c + fn: '1' + id: 6fe1 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0c + fn: '2' + id: 6fe2 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0c + fn: '3' + id: 6fe3 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0c + fn: '4' + id: 6fe4 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0c + fn: '5' + id: 6fe5 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0c + fn: '6' + id: 6fe6 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0c + fn: '7' + id: 6fe7 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '0' + id: 6ff8 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '4' + id: 6ffc + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '5' + id: 6ffd + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '6' + id: 6ffe + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: '10' + fn: '0' + id: 6f1d + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R2PCIe Agent (rev 03)' +- bus: ff + dev: '10' + fn: '1' + id: 6f34 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R2PCIe Agent (rev 03)' +- bus: ff + dev: '10' + fn: '5' + id: 6f1e + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 03)' +- bus: ff + dev: '10' + fn: '6' + id: 6f7d + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 03)' +- bus: ff + dev: '10' + fn: '7' + id: 6f1f + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 03)' +- bus: ff + dev: '12' + fn: '0' + id: 6fa0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Home Agent 0 (rev 03)' +- bus: ff + dev: '12' + fn: '1' + id: 6f30 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Home Agent 0 (rev 03)' +- bus: ff + dev: '13' + fn: '0' + id: 6fa8 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)' +- bus: ff + dev: '13' + fn: '1' + id: 6f71 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)' +- bus: ff + dev: '13' + fn: '2' + id: 6faa + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '3' + id: 6fab + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '4' + id: 6fac + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '5' + id: 6fad + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '6' + id: 6fae + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Broadcast (rev 03)' +- bus: ff + dev: '13' + fn: '7' + id: 6faf + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Global Broadcast (rev 03)' +- bus: ff + dev: '14' + fn: '0' + id: 6fb0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 0 Thermal Control (rev 03)' +- bus: ff + dev: '14' + fn: '1' + id: 6fb1 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 1 Thermal Control (rev 03)' +- bus: ff + dev: '14' + fn: '2' + id: 6fb2 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 0 Error (rev 03)' +- bus: ff + dev: '14' + fn: '3' + id: 6fb3 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 1 Error (rev 03)' +- bus: ff + dev: '14' + fn: '4' + id: 6fbc + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '14' + fn: '5' + id: 6fbd + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '14' + fn: '6' + id: 6fbe + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '14' + fn: '7' + id: 6fbf + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '15' + fn: '0' + id: 6fb4 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 2 Thermal Control (rev 03)' +- bus: ff + dev: '15' + fn: '1' + id: 6fb5 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 3 Thermal Control (rev 03)' +- bus: ff + dev: '15' + fn: '2' + id: 6fb6 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 2 Error (rev 03)' +- bus: ff + dev: '15' + fn: '3' + id: 6fb7 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 3 Error (rev 03)' +- bus: ff + dev: 1e + fn: '0' + id: 6f98 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '1' + id: 6f99 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '2' + id: 6f9a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '3' + id: 6fc0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '4' + id: 6f9c + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1f + fn: '0' + id: 6f88 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1f + fn: '2' + id: 6f8a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json new file mode 100644 index 000000000000..29e11388382c --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json @@ -0,0 +1,499 @@ +{ + "chassis": { + "name": "7220 IXR-H4", + "components": [ + { + "name": "BIOS" + }, + { + "name": "SMB_FPGA" + }, + { + "name": "UDB_FPGA" + }, + { + "name": "LDB_FPGA" + }, + { + "name": "SMB_CPLD" + }, + { + "name": "UDB_CPLD1" + }, + { + "name": "UDB_CPLD2" + }, + { + "name": "LDB_CPLD1" + }, + { + "name": "LDB_CPLD2" + }, + { + "name": "FAN_CPLD" + }, + { + "name": "PDBL_CPLD" + }, + { + "name": "PDBR_CPLD" + }, + { + "name": "SCM_CPLD" + } + ], + "fans": [ + { + "name": "Fan1", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan2", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan3", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan4", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan5", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan6", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan7", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan8", + "status_led": { + "controllable": false + } + } + ], + "fan_drawers": [ + { + "name": "drawer1", + "status_led": { + "controllable": false + }, + "max_consumed_power": false, + "fans": [ + { + "name": "Fan1", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan2", + "status_led": { + "controllable": false + } + } + ] + }, + { + "name": "drawer2", + "status_led": { + "controllable": false + }, + "max_consumed_power": false, + "fans": [ + { + "name": "Fan3", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan4", + "status_led": { + "controllable": false + } + } + ] + }, + { + "name": "drawer3", + "status_led": { + "controllable": false + }, + "max_consumed_power": false, + "fans": [ + { + "name": "Fan5", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan6", + "status_led": { + "controllable": false + } + } + ] + }, + { + "name": "drawer4", + "status_led": { + "controllable": false + }, + "max_consumed_power": false, + "fans": [ + { + "name": "Fan7", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan8", + "status_led": { + "controllable": false + } + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "status_led": { + "controllable": false + }, + "current": true, + "power": true, + "max_power": false, + "voltage_high_threshold": false, + "voltage_low_threshold": false, + "temperature": false + }, + { + "name": "PSU2", + "status_led": { + "controllable": false + }, + "current": true, + "power": true, + "max_power": false, + "voltage_high_threshold": false, + "voltage_low_threshold": false, + "temperature": false + } + ], + "thermals": [ + { + "name": "MAC Rear", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "MAC Under", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "UDB Front", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "UDB Rear", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "LDB Front", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "LDB Rear", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "PSU Left", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "PSU Right", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "FAN Left", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "FAN Right", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "MAC TH4", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + } + ], + "sfps": [ + { + "name": "QSFPDD_1" + }, + { + "name": "QSFPDD_2" + }, + { + "name": "QSFPDD_3" + }, + { + "name": "QSFPDD_4" + }, + { + "name": "QSFPDD_5" + }, + { + "name": "QSFPDD_6" + }, + { + "name": "QSFPDD_7" + }, + { + "name": "QSFPDD_8" + }, + { + "name": "QSFPDD_9" + }, + { + "name": "QSFPDD_10" + }, + { + "name": "QSFPDD_11" + }, + { + "name": "QSFPDD_12" + }, + { + "name": "QSFPDD_13" + }, + { + "name": "QSFPDD_14" + }, + { + "name": "QSFPDD_15" + }, + { + "name": "QSFPDD_16" + }, + { + "name": "QSFPDD_17" + }, + { + "name": "QSFPDD_18" + }, + { + "name": "QSFPDD_19" + }, + { + "name": "QSFPDD_20" + }, + { + "name": "QSFPDD_21" + }, + { + "name": "QSFPDD_22" + }, + { + "name": "QSFPDD_23" + }, + { + "name": "QSFPDD_24" + }, + { + "name": "QSFPDD_25" + }, + { + "name": "QSFPDD_26" + }, + { + "name": "QSFPDD_27" + }, + { + "name": "QSFPDD_28" + }, + { + "name": "QSFPDD_29" + }, + { + "name": "QSFPDD_30" + }, + { + "name": "QSFPDD_31" + }, + { + "name": "QSFPDD_32" + }, + { + "name": "QSFPDD_33" + }, + { + "name": "QSFPDD_34" + }, + { + "name": "QSFPDD_35" + }, + { + "name": "QSFPDD_36" + }, + { + "name": "QSFPDD_37" + }, + { + "name": "QSFPDD_38" + }, + { + "name": "QSFPDD_39" + }, + { + "name": "QSFPDD_40" + }, + { + "name": "QSFPDD_41" + }, + { + "name": "QSFPDD_42" + }, + { + "name": "QSFPDD_43" + }, + { + "name": "QSFPDD_44" + }, + { + "name": "QSFPDD_45" + }, + { + "name": "QSFPDD_46" + }, + { + "name": "QSFPDD_47" + }, + { + "name": "QSFPDD_48" + }, + { + "name": "QSFPDD_49" + }, + { + "name": "QSFPDD_50" + }, + { + "name": "QSFPDD_51" + }, + { + "name": "QSFPDD_52" + }, + { + "name": "QSFPDD_53" + }, + { + "name": "QSFPDD_54" + }, + { + "name": "QSFPDD_55" + }, + { + "name": "QSFPDD_56" + }, + { + "name": "QSFPDD_57" + }, + { + "name": "QSFPDD_58" + }, + { + "name": "QSFPDD_59" + }, + { + "name": "QSFPDD_60" + }, + { + "name": "QSFPDD_61" + }, + { + "name": "QSFPDD_62" + }, + { + "name": "QSFPDD_63" + }, + { + "name": "QSFPDD_64" + }, + { + "name": "SFP+_0" + }, + { + "name": "SFP+_1" + } + ] + }, + "interfaces": {} +} diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform_asic b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform_asic new file mode 100644 index 000000000000..960467652765 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform_env.conf b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform_env.conf new file mode 100644 index 000000000000..b4f7155e6b1d --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform_env.conf @@ -0,0 +1,3 @@ +SYNCD_SHM_SIZE=512m +is_ltsw_chip=1 + diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/eeprom.py b/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/eeprom.py new file mode 100644 index 000000000000..6e2aad4f52d8 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/eeprom.py @@ -0,0 +1,16 @@ +try: + import os + from sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/20-0051/eeprom" + if not os.path.exists(self.eeprom_path): + file = "/sys/bus/i2c/devices/i2c-20/new_device" + with open(file, 'w') as f: + f.write('24c32 0x51\n') + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/led_control.py b/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/led_control.py new file mode 100644 index 000000000000..ee11694ab003 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/led_control.py @@ -0,0 +1,58 @@ +""" + led_control.py + + Platform-specific LED control functionality for SONiC +""" + +try: + from sonic_led.led_control_base import LedControlBase + import os + import time + import syslog + import struct + from mmap import * + import sonic_platform.platform + import sonic_platform.chassis +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + +SYS_LED_PATH = "/sys/devices/platform/sys_fpga/led_sys" + +def DBG_PRINT(str): + syslog.openlog("nokia-led") + syslog.syslog(syslog.LOG_INFO, str) + syslog.closelog() + +class LedControl(LedControlBase): + """Platform specific LED control class""" + + # Constructor + def __init__(self): + self.chassis = sonic_platform.platform.Platform().get_chassis() + self._initDefaultConfig() + + def _initDefaultConfig(self): + # The fan tray leds and system led managed by new chassis class API + # leaving only a couple other front panel leds to be done old style + DBG_PRINT("starting system leds") + self._initSystemLed() + DBG_PRINT(" led done") + + def _write_sysfs_file(self, sysfs_file, value): + # On successful write, the value read will be written on + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'w') as fd: + rv = fd.write(str(value)) + except Exception as e: + rv = 'ERR' + + return rv + + def _initSystemLed(self): + # Write sys led + status = self._write_sysfs_file(SYS_LED_PATH, "8") diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/system_health_monitoring_config.json b/device/nokia/x86_64-nokia_ixr7220_h4-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..d5f3a7b98304 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/system_health_monitoring_config.json @@ -0,0 +1,14 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu.temperature" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "blinking green" + } +} diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/thermal_policy.json b/device/nokia/x86_64-nokia_ixr7220_h4-r0/thermal_policy.json new file mode 100644 index 000000000000..7a55ce734861 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/thermal_policy.json @@ -0,0 +1,66 @@ +{ + "thermal_control_algorithm": { + "run_at_boot_up": "false", + "fan_speed_when_suspend": "70" + }, + "info_types": [ + { + "type": "fan_info" + }, + { + "type": "thermal_info" + }, + { + "type": "chassis_info" + } + ], + "policies": [ + { + "name": "any fan absence", + "conditions": [ + { + "type": "fan.any.absence" + } + ], + "actions": [ + { + "type": "thermal_control.control", + "status": "false" + }, + { + "type": "fan.all.set_speed", + "speed": "90" + } + ] + }, + { + "name": "all fan presence", + "conditions": [ + { + "type": "fan.all.presence" + } + ], + "actions": [ + { + "type": "thermal.temp_check_and_set_all_fan_speed", + "default_speed": "50", + "threshold1_speed": "70", + "hightemp_speed": "90" + } + ] + }, + { + "name": "temp over high critical threshold", + "conditions": [ + { + "type": "thermal.over.high_critical_threshold" + } + ], + "actions": [ + { + "type": "switch.shutdown" + } + ] + } + ] +} diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2 index 030060d45cf1..f911a0e58054 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2 +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2 @@ -40,7 +40,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm index bb75db8b984b..6f07539f976c 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm @@ -8,6 +8,8 @@ dma_desc_aggregator_chain_length_max.BCM8885X=1000 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1 dma_desc_aggregator_timeout_usec.BCM8885X=1000 dport_map_direct.BCM8885X=1 +programmability_image_name.BCM8885X=standard_1 +programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt dtm_flow_mapping_mode_region_64.BCM8885X=3 dtm_flow_mapping_mode_region_65.BCM8885X=3 dtm_flow_mapping_mode_region_66.BCM8885X=3 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2 index 030060d45cf1..f911a0e58054 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2 +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2 @@ -40,7 +40,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm index d97725a266f8..a1419db8fd64 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm @@ -8,6 +8,8 @@ dma_desc_aggregator_chain_length_max.BCM8885X=1000 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1 dma_desc_aggregator_timeout_usec.BCM8885X=1000 dport_map_direct.BCM8885X=1 +programmability_image_name.BCM8885X=standard_1 +programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt dtm_flow_mapping_mode_region_64.BCM8885X=3 dtm_flow_mapping_mode_region_65.BCM8885X=3 dtm_flow_mapping_mode_region_66.BCM8885X=3 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2 index 3fb88267afd3..cf0e02f6d7c8 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2 +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2 @@ -40,7 +40,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm index a14241358841..fa5849f4549f 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm @@ -8,6 +8,8 @@ dma_desc_aggregator_chain_length_max.BCM8885X=1000 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1 dma_desc_aggregator_timeout_usec.BCM8885X=1000 dport_map_direct.BCM8885X=1 +programmability_image_name.BCM8885X=standard_1 +programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc dtm_flow_mapping_mode_region_64.BCM8885X=3 dtm_flow_mapping_mode_region_65.BCM8885X=3 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2 index 3fb88267afd3..cf0e02f6d7c8 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2 +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2 @@ -40,7 +40,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm index dc8f73ae62d7..ccb87e9ad0e9 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm @@ -8,6 +8,8 @@ dma_desc_aggregator_chain_length_max.BCM8885X=1000 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1 dma_desc_aggregator_timeout_usec.BCM8885X=1000 dport_map_direct.BCM8885X=1 +programmability_image_name.BCM8885X=standard_1 +programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc dtm_flow_mapping_mode_region_64.BCM8885X=3 dtm_flow_mapping_mode_region_65.BCM8885X=3 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/pmon_daemon_control.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/pmon_daemon_control.json index 74ade4eb97a7..2c63c0851048 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/pmon_daemon_control.json +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/pmon_daemon_control.json @@ -1,3 +1,2 @@ { - "skip_psud": true } diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm index 3ebf67393531..12a0b532fd84 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm @@ -1396,3 +1396,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm index e4b15db2a021..59106ba59387 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm @@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm index 6bc3e88c91a3..a481d75a94bf 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm @@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm index 6fcec3b66c3e..2c315e84ac4c 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm @@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm index 2e0aedcc03ba..581b5d76a914 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm @@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm index faea7ed7189a..364690e7ae40 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm @@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm index 8a03f70e4064..d12d791c83e2 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm @@ -1394,3 +1394,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm index 94afa0bc139a..86d9af38e0b2 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm @@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm index 182fdc17615a..0c4b5403bf51 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm @@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm index 199a57b72b9f..1617c40e6ca2 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm @@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm index dac08d72acca..f905a66b2e97 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm @@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm index d60d6a4f7bee..f25c8b10d2a8 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm @@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm index 1b1932a99673..5a824fcde8aa 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm @@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm index 8f7adaaff115..d27ebd282729 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm @@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm index 96ceaa6cfec2..cb8307452b6a 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm @@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm index abc566225a23..184d1136033e 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm @@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json index 5f906161fe21..58aa6892210b 100644 --- a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json @@ -1603,7 +1603,7 @@ "i2c": { "topo_info": { "parent_bus": "0xA", - "dev_addr": "0x54", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -1702,7 +1702,7 @@ "i2c": { "topo_info": { "parent_bus": "0xB", - "dev_addr": "0x54", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -1801,7 +1801,7 @@ "i2c": { "topo_info": { "parent_bus": "0xC", - "dev_addr": "0x54", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -1900,7 +1900,7 @@ "i2c": { "topo_info": { "parent_bus": "0xD", - "dev_addr": "0x54", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -1999,7 +1999,7 @@ "i2c": { "topo_info": { "parent_bus": "0xE", - "dev_addr": "0x54", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2098,7 +2098,7 @@ "i2c": { "topo_info": { "parent_bus": "0xF", - "dev_addr": "0x54", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2197,7 +2197,7 @@ "i2c": { "topo_info": { "parent_bus": "0x10", - "dev_addr": "0x54", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2296,7 +2296,7 @@ "i2c": { "topo_info": { "parent_bus": "0x11", - "dev_addr": "0x54", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json index 640a61800ed4..02a174049b37 100644 --- a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json @@ -2594,7 +2594,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1a", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2693,7 +2693,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1b", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2792,7 +2792,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1c", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2891,7 +2891,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1d", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2990,7 +2990,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1e", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3089,7 +3089,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1f", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3188,7 +3188,7 @@ "i2c": { "topo_info": { "parent_bus": "0x20", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3287,7 +3287,7 @@ "i2c": { "topo_info": { "parent_bus": "0x21", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3386,7 +3386,7 @@ "i2c": { "topo_info": { "parent_bus": "0x22", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3485,7 +3485,7 @@ "i2c": { "topo_info": { "parent_bus": "0x23", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3584,7 +3584,7 @@ "i2c": { "topo_info": { "parent_bus": "0x24", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3683,7 +3683,7 @@ "i2c": { "topo_info": { "parent_bus": "0x25", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3782,7 +3782,7 @@ "i2c": { "topo_info": { "parent_bus": "0x26", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3881,7 +3881,7 @@ "i2c": { "topo_info": { "parent_bus": "0x27", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3980,7 +3980,7 @@ "i2c": { "topo_info": { "parent_bus": "0x28", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4079,7 +4079,7 @@ "i2c": { "topo_info": { "parent_bus": "0x29", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4178,7 +4178,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2a", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4277,7 +4277,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2b", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4376,7 +4376,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2c", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4475,7 +4475,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2d", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4574,7 +4574,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2e", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4673,7 +4673,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2f", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4772,7 +4772,7 @@ "i2c": { "topo_info": { "parent_bus": "0x30", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4871,7 +4871,7 @@ "i2c": { "topo_info": { "parent_bus": "0x31", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4970,7 +4970,7 @@ "i2c": { "topo_info": { "parent_bus": "0x32", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5069,7 +5069,7 @@ "i2c": { "topo_info": { "parent_bus": "0x33", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5168,7 +5168,7 @@ "i2c": { "topo_info": { "parent_bus": "0x34", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5267,7 +5267,7 @@ "i2c": { "topo_info": { "parent_bus": "0x35", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5366,7 +5366,7 @@ "i2c": { "topo_info": { "parent_bus": "0x36", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5465,7 +5465,7 @@ "i2c": { "topo_info": { "parent_bus": "0x37", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5564,7 +5564,7 @@ "i2c": { "topo_info": { "parent_bus": "0x38", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5663,7 +5663,7 @@ "i2c": { "topo_info": { "parent_bus": "0x39", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5762,7 +5762,7 @@ "i2c": { "topo_info": { "parent_bus": "0x3a", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5861,7 +5861,7 @@ "i2c": { "topo_info": { "parent_bus": "0x3b", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5960,7 +5960,7 @@ "i2c": { "topo_info": { "parent_bus": "0x3c", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6059,7 +6059,7 @@ "i2c": { "topo_info": { "parent_bus": "0x3d", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6158,7 +6158,7 @@ "i2c": { "topo_info": { "parent_bus": "0x3e", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6257,7 +6257,7 @@ "i2c": { "topo_info": { "parent_bus": "0x3f", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6356,7 +6356,7 @@ "i2c": { "topo_info": { "parent_bus": "0x40", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6455,7 +6455,7 @@ "i2c": { "topo_info": { "parent_bus": "0x41", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6554,7 +6554,7 @@ "i2c": { "topo_info": { "parent_bus": "0x42", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6653,7 +6653,7 @@ "i2c": { "topo_info": { "parent_bus": "0x43", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6752,7 +6752,7 @@ "i2c": { "topo_info": { "parent_bus": "0x44", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6851,7 +6851,7 @@ "i2c": { "topo_info": { "parent_bus": "0x45", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6950,7 +6950,7 @@ "i2c": { "topo_info": { "parent_bus": "0x46", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7049,7 +7049,7 @@ "i2c": { "topo_info": { "parent_bus": "0x47", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7148,7 +7148,7 @@ "i2c": { "topo_info": { "parent_bus": "0x48", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7247,7 +7247,7 @@ "i2c": { "topo_info": { "parent_bus": "0x49", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7346,7 +7346,7 @@ "i2c": { "topo_info": { "parent_bus": "0x4a", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7445,7 +7445,7 @@ "i2c": { "topo_info": { "parent_bus": "0x4b", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7544,7 +7544,7 @@ "i2c": { "topo_info": { "parent_bus": "0x4c", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7643,7 +7643,7 @@ "i2c": { "topo_info": { "parent_bus": "0x4d", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7742,7 +7742,7 @@ "i2c": { "topo_info": { "parent_bus": "0x4e", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7841,7 +7841,7 @@ "i2c": { "topo_info": { "parent_bus": "0x4f", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json index 2fb21d277e57..e896471151db 100644 --- a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json @@ -2594,7 +2594,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1a", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2693,7 +2693,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1b", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2792,7 +2792,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1c", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2891,7 +2891,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1d", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2990,7 +2990,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1e", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3089,7 +3089,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1f", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3188,7 +3188,7 @@ "i2c": { "topo_info": { "parent_bus": "0x20", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3287,7 +3287,7 @@ "i2c": { "topo_info": { "parent_bus": "0x21", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3386,7 +3386,7 @@ "i2c": { "topo_info": { "parent_bus": "0x22", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3485,7 +3485,7 @@ "i2c": { "topo_info": { "parent_bus": "0x23", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3584,7 +3584,7 @@ "i2c": { "topo_info": { "parent_bus": "0x24", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3683,7 +3683,7 @@ "i2c": { "topo_info": { "parent_bus": "0x25", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3782,7 +3782,7 @@ "i2c": { "topo_info": { "parent_bus": "0x26", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3881,7 +3881,7 @@ "i2c": { "topo_info": { "parent_bus": "0x27", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3980,7 +3980,7 @@ "i2c": { "topo_info": { "parent_bus": "0x28", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4079,7 +4079,7 @@ "i2c": { "topo_info": { "parent_bus": "0x29", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4178,7 +4178,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2a", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4277,7 +4277,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2b", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4376,7 +4376,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2c", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4475,7 +4475,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2d", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4574,7 +4574,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2e", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4673,7 +4673,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2f", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4772,7 +4772,7 @@ "i2c": { "topo_info": { "parent_bus": "0x30", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4871,7 +4871,7 @@ "i2c": { "topo_info": { "parent_bus": "0x31", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4970,7 +4970,7 @@ "i2c": { "topo_info": { "parent_bus": "0x32", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5069,7 +5069,7 @@ "i2c": { "topo_info": { "parent_bus": "0x33", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5168,7 +5168,7 @@ "i2c": { "topo_info": { "parent_bus": "0x34", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5267,7 +5267,7 @@ "i2c": { "topo_info": { "parent_bus": "0x35", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5366,7 +5366,7 @@ "i2c": { "topo_info": { "parent_bus": "0x36", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5465,7 +5465,7 @@ "i2c": { "topo_info": { "parent_bus": "0x37", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5564,7 +5564,7 @@ "i2c": { "topo_info": { "parent_bus": "0x38", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5663,7 +5663,7 @@ "i2c": { "topo_info": { "parent_bus": "0x39", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5762,7 +5762,7 @@ "i2c": { "topo_info": { "parent_bus": "0x3a", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5861,7 +5861,7 @@ "i2c": { "topo_info": { "parent_bus": "0x3b", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -5960,7 +5960,7 @@ "i2c": { "topo_info": { "parent_bus": "0x3c", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6059,7 +6059,7 @@ "i2c": { "topo_info": { "parent_bus": "0x3d", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6158,7 +6158,7 @@ "i2c": { "topo_info": { "parent_bus": "0x3e", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6257,7 +6257,7 @@ "i2c": { "topo_info": { "parent_bus": "0x3f", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6356,7 +6356,7 @@ "i2c": { "topo_info": { "parent_bus": "0x40", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6455,7 +6455,7 @@ "i2c": { "topo_info": { "parent_bus": "0x41", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6554,7 +6554,7 @@ "i2c": { "topo_info": { "parent_bus": "0x42", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6653,7 +6653,7 @@ "i2c": { "topo_info": { "parent_bus": "0x43", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6752,7 +6752,7 @@ "i2c": { "topo_info": { "parent_bus": "0x44", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6851,7 +6851,7 @@ "i2c": { "topo_info": { "parent_bus": "0x45", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -6950,7 +6950,7 @@ "i2c": { "topo_info": { "parent_bus": "0x46", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7049,7 +7049,7 @@ "i2c": { "topo_info": { "parent_bus": "0x47", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7148,7 +7148,7 @@ "i2c": { "topo_info": { "parent_bus": "0x48", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7247,7 +7247,7 @@ "i2c": { "topo_info": { "parent_bus": "0x49", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7346,7 +7346,7 @@ "i2c": { "topo_info": { "parent_bus": "0x4a", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7445,7 +7445,7 @@ "i2c": { "topo_info": { "parent_bus": "0x4b", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7544,7 +7544,7 @@ "i2c": { "topo_info": { "parent_bus": "0x4c", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7643,7 +7643,7 @@ "i2c": { "topo_info": { "parent_bus": "0x4d", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7742,7 +7742,7 @@ "i2c": { "topo_info": { "parent_bus": "0x4e", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -7841,7 +7841,7 @@ "i2c": { "topo_info": { "parent_bus": "0x4f", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json index aafa6cc81447..9b785d47a81f 100644 --- a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json @@ -1451,7 +1451,7 @@ "i2c": { "topo_info": { "parent_bus": "0x12", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -1550,7 +1550,7 @@ "i2c": { "topo_info": { "parent_bus": "0x13", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -1649,7 +1649,7 @@ "i2c": { "topo_info": { "parent_bus": "0x14", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -1748,7 +1748,7 @@ "i2c": { "topo_info": { "parent_bus": "0x15", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -1847,7 +1847,7 @@ "i2c": { "topo_info": { "parent_bus": "0x16", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -1946,7 +1946,7 @@ "i2c": { "topo_info": { "parent_bus": "0x17", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2045,7 +2045,7 @@ "i2c": { "topo_info": { "parent_bus": "0x18", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2144,7 +2144,7 @@ "i2c": { "topo_info": { "parent_bus": "0x19", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2243,7 +2243,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1A", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2342,7 +2342,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1B", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2441,7 +2441,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1C", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2540,7 +2540,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1D", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2639,7 +2639,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1E", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2738,7 +2738,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1F", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2837,7 +2837,7 @@ "i2c": { "topo_info": { "parent_bus": "0x20", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2936,7 +2936,7 @@ "i2c": { "topo_info": { "parent_bus": "0x21", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3035,7 +3035,7 @@ "i2c": { "topo_info": { "parent_bus": "0x22", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3134,7 +3134,7 @@ "i2c": { "topo_info": { "parent_bus": "0x23", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3233,7 +3233,7 @@ "i2c": { "topo_info": { "parent_bus": "0x24", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3332,7 +3332,7 @@ "i2c": { "topo_info": { "parent_bus": "0x25", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3431,7 +3431,7 @@ "i2c": { "topo_info": { "parent_bus": "0x26", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3530,7 +3530,7 @@ "i2c": { "topo_info": { "parent_bus": "0x27", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3629,7 +3629,7 @@ "i2c": { "topo_info": { "parent_bus": "0x28", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3728,7 +3728,7 @@ "i2c": { "topo_info": { "parent_bus": "0x29", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3827,7 +3827,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2A", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3926,7 +3926,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2B", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4025,7 +4025,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2C", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4124,7 +4124,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2D", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4223,7 +4223,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2E", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4322,7 +4322,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2F", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4421,7 +4421,7 @@ "i2c": { "topo_info": { "parent_bus": "0x30", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4520,7 +4520,7 @@ "i2c": { "topo_info": { "parent_bus": "0x31", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4619,7 +4619,7 @@ "i2c": { "topo_info": { "parent_bus": "0x33", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json index dec149491308..9e65e4f73347 100644 --- a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json @@ -1407,7 +1407,7 @@ "i2c": { "topo_info": { "parent_bus": "0x12", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -1506,7 +1506,7 @@ "i2c": { "topo_info": { "parent_bus": "0x13", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -1605,7 +1605,7 @@ "i2c": { "topo_info": { "parent_bus": "0x14", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -1704,7 +1704,7 @@ "i2c": { "topo_info": { "parent_bus": "0x15", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -1803,7 +1803,7 @@ "i2c": { "topo_info": { "parent_bus": "0x16", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -1902,7 +1902,7 @@ "i2c": { "topo_info": { "parent_bus": "0x17", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2001,7 +2001,7 @@ "i2c": { "topo_info": { "parent_bus": "0x18", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2100,7 +2100,7 @@ "i2c": { "topo_info": { "parent_bus": "0x19", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2199,7 +2199,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1A", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2298,7 +2298,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1B", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2397,7 +2397,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1C", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2496,7 +2496,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1D", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2595,7 +2595,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1E", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2694,7 +2694,7 @@ "i2c": { "topo_info": { "parent_bus": "0x1F", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2793,7 +2793,7 @@ "i2c": { "topo_info": { "parent_bus": "0x20", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2892,7 +2892,7 @@ "i2c": { "topo_info": { "parent_bus": "0x21", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -2991,7 +2991,7 @@ "i2c": { "topo_info": { "parent_bus": "0x22", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3090,7 +3090,7 @@ "i2c": { "topo_info": { "parent_bus": "0x23", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3189,7 +3189,7 @@ "i2c": { "topo_info": { "parent_bus": "0x24", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3288,7 +3288,7 @@ "i2c": { "topo_info": { "parent_bus": "0x25", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3387,7 +3387,7 @@ "i2c": { "topo_info": { "parent_bus": "0x26", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3486,7 +3486,7 @@ "i2c": { "topo_info": { "parent_bus": "0x27", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3585,7 +3585,7 @@ "i2c": { "topo_info": { "parent_bus": "0x28", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3684,7 +3684,7 @@ "i2c": { "topo_info": { "parent_bus": "0x29", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3783,7 +3783,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2A", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3882,7 +3882,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2B", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -3981,7 +3981,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2C", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4080,7 +4080,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2D", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4179,7 +4179,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2E", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4278,7 +4278,7 @@ "i2c": { "topo_info": { "parent_bus": "0x2F", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4377,7 +4377,7 @@ "i2c": { "topo_info": { "parent_bus": "0x30", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4476,7 +4476,7 @@ "i2c": { "topo_info": { "parent_bus": "0x31", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ @@ -4575,7 +4575,7 @@ "i2c": { "topo_info": { "parent_bus": "0x33", - "dev_addr": "0x53", + "dev_addr": "0x5f", "dev_type": "pddf_xcvr" }, "attr_list": [ diff --git a/dockers/docker-dhcp-relay/Dockerfile.j2 b/dockers/docker-dhcp-relay/Dockerfile.j2 index 5b0dc82c314b..e7b70a954ce2 100644 --- a/dockers/docker-dhcp-relay/Dockerfile.j2 +++ b/dockers/docker-dhcp-relay/Dockerfile.j2 @@ -50,14 +50,11 @@ COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] COPY ["critical_processes", "/etc/supervisor"] COPY ["cli", "/cli/"] -{% if include_system_eventd == "y" and build_reduce_image_size != "y" %} -# Copy regex json and rsyslog_plugin.conf file into rsyslog.d -COPY ["*.json", "/etc/rsyslog.d/"] -COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"] -# Create dhcp_relay_regex.conf -RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json > /etc/rsyslog.d/dhcp_relay_events.conf -RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2 -RUN rm -f /etc/rsyslog.d/events_info.json -{% endif %} +RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin + +# Copy rsyslog plugin configuration file and regexes to docker +COPY ["dhcp_relay_regex.json", "/etc/rsyslog.d/"] +COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"] +COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"] ENTRYPOINT ["/usr/bin/docker_init.sh"] diff --git a/dockers/docker-dhcp-relay/cli-plugin-tests/mock_tables.py b/dockers/docker-dhcp-relay/cli-plugin-tests/mock_tables.py index 650d2cf489e1..e81a041ee9d3 100644 --- a/dockers/docker-dhcp-relay/cli-plugin-tests/mock_tables.py +++ b/dockers/docker-dhcp-relay/cli-plugin-tests/mock_tables.py @@ -58,6 +58,16 @@ def connect_SonicV2Connector(self, db_name, retry_on=True): def _subscribe_keyspace_notification(self, db_name, client): pass +def keys(self, db_name, pattern='*'): + """ + Retrieve all the keys of DB %db_name + """ + client = self.redis_clients[db_name] + keys = client.keys(pattern=pattern) + if not keys: + return [] + else: + return keys def config_set(self, *args): pass @@ -146,6 +156,7 @@ def keys(self, pattern='*'): swsssdk.interface.DBInterface._subscribe_keyspace_notification = _subscribe_keyspace_notification +swsssdk.interface.DBInterface.keys = keys mockredis.MockRedis.config_set = config_set redis.StrictRedis = SwssSyncClient SonicV2Connector.connect = connect_SonicV2Connector diff --git a/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py b/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py index d9e87b2b347c..7a3ea15d5f47 100644 --- a/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py +++ b/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py @@ -45,13 +45,13 @@ def __init__(self): self.db = SonicV2Connector(use_unix_socket_path=False) self.db.connect(self.db.STATE_DB) self.table_name = DHCPv6_COUNTER_TABLE + self.db.get_db_separator(self.db.STATE_DB) + self.table_prefix_len = len(self.table_name) def get_interface(self): """ Get all names of all interfaces in DHCPv6_COUNTER_TABLE """ vlans = [] - for key in self.db.keys(self.db.STATE_DB): - if DHCPv6_COUNTER_TABLE in key: - vlans.append(key[21:]) + for key in self.db.keys(self.db.STATE_DB, self.table_name + "*"): + vlans.append(key[self.table_prefix_len:]) return vlans def get_dhcp6relay_msg_count(self, interface, msg): diff --git a/dockers/docker-dhcp-relay/docker_init.sh b/dockers/docker-dhcp-relay/docker_init.sh index 1ff0e936ff68..94e2ddff0622 100755 --- a/dockers/docker-dhcp-relay/docker_init.sh +++ b/dockers/docker-dhcp-relay/docker_init.sh @@ -21,4 +21,7 @@ chmod +x /usr/bin/wait_for_intf.sh # The docker container should start this script as PID 1, so now that supervisord is # properly configured, we exec /usr/local/bin/supervisord so that it runs as PID 1 for the # duration of the container's lifetime +export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state') +j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json > /etc/rsyslog.d/dhcp_relay_events.conf + exec /usr/local/bin/supervisord diff --git a/dockers/docker-fpm-frr/Dockerfile.j2 b/dockers/docker-fpm-frr/Dockerfile.j2 index 98c4593811f7..e39ffdadf4cc 100644 --- a/dockers/docker-fpm-frr/Dockerfile.j2 +++ b/dockers/docker-fpm-frr/Dockerfile.j2 @@ -59,12 +59,11 @@ RUN chmod a+x /usr/bin/TSA && \ chmod a+x /usr/bin/TSC && \ chmod a+x /usr/bin/zsocket.sh -{% if include_system_eventd == "y" and build_reduce_image_size != "y" %} -COPY ["*.json", "/etc/rsyslog.d/"] -COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"] -RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json > /etc/rsyslog.d/bgp_events.conf -RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2 -RUN rm -f /etc/rsyslog.d/events_info.json -{% endif %} +RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin + +# Copy rsyslog plugin configuration file and regexes to docker +COPY ["bgp_regex.json", "/etc/rsyslog.d/"] +COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"] +COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"] ENTRYPOINT ["/usr/bin/docker_init.sh"] diff --git a/dockers/docker-fpm-frr/base_image_files/TSA b/dockers/docker-fpm-frr/base_image_files/TSA index beeb86819f67..4f78cd58ce1c 100755 --- a/dockers/docker-fpm-frr/base_image_files/TSA +++ b/dockers/docker-fpm-frr/base_image_files/TSA @@ -1,12 +1,15 @@ #!/bin/bash +# Source the platform_utils script +source "$(dirname "$0")/platform_utils" + # Restrict command to sudo users if [ "$EUID" -ne 0 ] ; then echo "Root priveleges are needed for this operation" exit 1 fi -if [ -f /etc/sonic/chassisdb.conf ]; then +if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] ; then CHASSIS_TSA_STATE_UPDATE="CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL\|STATE" tsa_enabled "true"" CONFIG_DB_TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "true"}}}' current_tsa_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.tsa_enabled)" diff --git a/dockers/docker-fpm-frr/base_image_files/TSB b/dockers/docker-fpm-frr/base_image_files/TSB index 36c69843b1b3..8c82796f18c1 100755 --- a/dockers/docker-fpm-frr/base_image_files/TSB +++ b/dockers/docker-fpm-frr/base_image_files/TSB @@ -1,12 +1,15 @@ #!/bin/bash +# Source the platform_utils script +source "$(dirname "$0")/platform_utils" + # Restrict command to sudo users if [ "$EUID" -ne 0 ] ; then echo "Root priveleges are needed for this operation" exit 1 fi -if [ -f /etc/sonic/chassisdb.conf ]; then +if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] ; then CHASSIS_TSA_STATE_UPDATE="CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL\|STATE" tsa_enabled "false"" CONFIG_DB_TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "false"}}}' current_tsa_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.tsa_enabled)" diff --git a/dockers/docker-fpm-frr/base_image_files/TSC b/dockers/docker-fpm-frr/base_image_files/TSC index bcdd9d1872ae..ccb6c7d6ea21 100755 --- a/dockers/docker-fpm-frr/base_image_files/TSC +++ b/dockers/docker-fpm-frr/base_image_files/TSC @@ -1,12 +1,15 @@ #!/bin/bash +# Source the platform_utils script +source "$(dirname "$0")/platform_utils" + # Restrict command to sudo users if [ "$EUID" -ne 0 ] ; then echo "Root priveleges are needed for this operation" exit 1 fi -if [ -f /etc/sonic/chassisdb.conf ]; then +if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] ; then if [[ $1 == "no-stats" ]]; then rexec all -c "sudo TSC no-stats" else diff --git a/dockers/docker-fpm-frr/base_image_files/platform_utils b/dockers/docker-fpm-frr/base_image_files/platform_utils new file mode 100755 index 000000000000..e4d8da76e95d --- /dev/null +++ b/dockers/docker-fpm-frr/base_image_files/platform_utils @@ -0,0 +1,18 @@ +#!/bin/bash + +# platform_utils + +# Determine platform and is smartswitch +PLATFORM="$(sonic-cfggen -d -v DEVICE_METADATA.localhost.platform)" +SMARTSWITCH=false +PLATFORM_JSON=/usr/share/sonic/device/$PLATFORM/platform.json + +if [ -f "$PLATFORM_JSON" ]; then + NUM_DPU=$(jq -r '.DPUS | length' $PLATFORM_JSON 2>/dev/null) + if [[ $NUM_DPU -gt 0 ]]; then + SMARTSWITCH=true + fi +fi + +# Export SMARTSWITCH for other scripts +export SMARTSWITCH diff --git a/dockers/docker-fpm-frr/docker_init.sh b/dockers/docker-fpm-frr/docker_init.sh index 0ed274ec703f..fbbcee8bd66c 100755 --- a/dockers/docker-fpm-frr/docker_init.sh +++ b/dockers/docker-fpm-frr/docker_init.sh @@ -88,6 +88,7 @@ elif [ "$CONFIG_TYPE" == "unified" ]; then CFGGEN_PARAMS=" \ -d \ -y /etc/sonic/constants.yml \ + -T /usr/local/sonic/frrcfgd \ -t /usr/share/sonic/templates/gen_frr.conf.j2,/etc/frr/frr.conf \ " sonic-cfggen $CFGGEN_PARAMS @@ -111,4 +112,7 @@ TZ=$(cat /etc/timezone) rm -rf /etc/localtime ln -sf /usr/share/zoneinfo/$TZ /etc/localtime +export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state') +j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json > /etc/rsyslog.d/bgp_events.conf + exec /usr/local/bin/supervisord diff --git a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 index 1b920e7a52d8..da6358a00ca6 100644 --- a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 +++ b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 @@ -70,6 +70,7 @@ router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }} ! {% block bgp_init %} bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy {% if (DEVICE_METADATA is defined) and ('localhost' in DEVICE_METADATA) and ('subtype' in DEVICE_METADATA['localhost']) and (DEVICE_METADATA['localhost']['subtype'].lower() == 'dualtor') %} diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2 index 7cf5e148f694..3dc9447f75bb 100644 --- a/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2 +++ b/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2 @@ -50,6 +50,7 @@ route-map FROM_BGP_PEER_V6 permit 11 route-map FROM_BGP_PEER_V4 permit 100 ! route-map TO_BGP_PEER_V4 permit 100 + call CHECK_IDF_ISOLATION ! ! route-map FROM_BGP_PEER_V6 permit 1 @@ -59,6 +60,9 @@ route-map FROM_BGP_PEER_V6 permit 1 route-map FROM_BGP_PEER_V6 permit 100 ! route-map TO_BGP_PEER_V6 permit 100 + call CHECK_IDF_ISOLATION +! +route-map CHECK_IDF_ISOLATION permit 10 ! ! end of template: bgpd/templates/general/policies.conf.j2 ! diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/instance.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/instance.conf.j2 index 4f7bde5ddf1a..c40d3b84235b 100644 --- a/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/instance.conf.j2 +++ b/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/instance.conf.j2 @@ -11,7 +11,7 @@ {% endif %} neighbor {{ neighbor_addr }} remote-as {{ bgp_session['asn'] }} neighbor {{ neighbor_addr }} description {{ bgp_session['name'] }} - neighbor {{ neighbor_addr }} timers 3 10 + neighbor {{ neighbor_addr }} timers 2 7 neighbor {{ neighbor_addr }} timers connect 10 ! {% if 'admin_status' in bgp_session and bgp_session['admin_status'] == 'down' or 'admin_status' not in bgp_session and 'default_bgp_status' in CONFIG_DB__DEVICE_METADATA['localhost'] and CONFIG_DB__DEVICE_METADATA['localhost']['default_bgp_status'] == 'down' %} diff --git a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 index 4ee96cf845c3..15aa2ed55110 100644 --- a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 +++ b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 @@ -30,7 +30,7 @@ stderr_logfile=syslog dependent_startup=true [program:zebra] -command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_nl -M snmp +command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_sonic -M snmp --asic-offload=notify_on_offload priority=4 autostart=false autorestart=false diff --git a/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2 b/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2 index f5a56c316d41..673918b3d948 100644 --- a/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2 +++ b/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2 @@ -7,8 +7,14 @@ {% endblock banner %} ! {% block fpm %} +{% if ( ('localhost' in DEVICE_METADATA) and ('nexthop_group' in DEVICE_METADATA['localhost']) and + (DEVICE_METADATA['localhost']['nexthop_group'] == 'enabled') ) %} +! enable next hop group support +fpm use-next-hop-groups +{% else %} ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages no fpm use-next-hop-groups +{% endif %} ! fpm address 127.0.0.1 {% endblock fpm %} diff --git a/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2 b/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2 index 82b973d37cc9..88ad9b46dac2 100644 --- a/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2 +++ b/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2 @@ -4,6 +4,7 @@ {% for vnet_name, vnet_metadata in VNET.items() %} vrf {{ vnet_name }} vni {{ vnet_metadata['vni'] }} +exit ! {% endfor %} {% endif %} diff --git a/dockers/docker-orchagent/Dockerfile.j2 b/dockers/docker-orchagent/Dockerfile.j2 index fb90b4f09c22..b3a7e49c3254 100755 --- a/dockers/docker-orchagent/Dockerfile.j2 +++ b/dockers/docker-orchagent/Dockerfile.j2 @@ -80,14 +80,11 @@ RUN sonic-cfggen -a "{\"ENABLE_ASAN\":\"{{ENABLE_ASAN}}\"}" -t /usr/share/sonic/ RUN rm -f /usr/share/sonic/templates/docker-init.j2 RUN chmod 755 /usr/bin/docker-init.sh -{% if include_system_eventd == "y" and build_reduce_image_size != "y" %} -# Copy all regex json files and rsyslog_plugin.conf to rsyslog.d -COPY ["*.json", "/etc/rsyslog.d/"] -COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"] -# Create swss rsyslog_plugin conf file -RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json > /etc/rsyslog.d/swss_events.conf -RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2 -RUN rm -f /etc/rsyslog.d/events_info.json -{% endif %} +RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin + +# Copy rsyslog plugin configuration file and regexes to docker +COPY ["swss_regex.json", "/etc/rsyslog.d/"] +COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"] +COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"] ENTRYPOINT ["/usr/bin/docker-init.sh"] diff --git a/dockers/docker-orchagent/docker-init.j2 b/dockers/docker-orchagent/docker-init.j2 index 41dbe27285f1..143c9bd5229f 100755 --- a/dockers/docker-orchagent/docker-init.j2 +++ b/dockers/docker-orchagent/docker-init.j2 @@ -74,4 +74,7 @@ TZ=$(cat /etc/timezone) rm -rf /etc/localtime ln -sf /usr/share/zoneinfo/$TZ /etc/localtime +export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state') +j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json > /etc/rsyslog.d/swss_events.conf + exec /usr/local/bin/supervisord diff --git a/dockers/docker-orchagent/enable_counters.py b/dockers/docker-orchagent/enable_counters.py index 6054503892d0..53b9568cf9ec 100755 --- a/dockers/docker-orchagent/enable_counters.py +++ b/dockers/docker-orchagent/enable_counters.py @@ -2,6 +2,7 @@ import time from swsscommon import swsscommon +from sonic_py_common import device_info # ALPHA defines the size of the window over which we calculate the average value. ALPHA is 2/(N+1) where N is the interval(window size) # In this case we configure the window to be 10s. This way if we have a huge 1s spike in traffic, @@ -40,11 +41,17 @@ def enable_counters(): db.connect() default_enabled_counters = ['PORT', 'RIF', 'QUEUE', 'PFCWD', 'PG_WATERMARK', 'PG_DROP', 'QUEUE_WATERMARK', 'BUFFER_POOL_WATERMARK', 'PORT_BUFFER_DROP', 'ACL'] - + dpu_counters = ["ENI"] + # Enable those default counters for key in default_enabled_counters: enable_counter_group(db, key) + platform_info = device_info.get_platform_info(db) + if platform_info.get('switch_type') == 'dpu': + for key in dpu_counters: + enable_counter_group(db, key) + # Set FLEX_COUNTER_DELAY_STATUS to false for those non-default counters keys = db.get_keys('FLEX_COUNTER_TABLE') for key in keys: diff --git a/dockers/docker-orchagent/ipinip.json.j2 b/dockers/docker-orchagent/ipinip.json.j2 index f25f7d9fb695..478a19a8fe2b 100644 --- a/dockers/docker-orchagent/ipinip.json.j2 +++ b/dockers/docker-orchagent/ipinip.json.j2 @@ -3,6 +3,8 @@ {% else %} {% set ipv4_addresses = [] %} {% set ipv6_addresses = [] %} +{% set ipv4_vlan_addresses = [] %} +{% set ipv6_vlan_addresses = [] %} {% set ipv4_loopback_addresses = [] %} {% set ipv6_loopback_addresses = [] %} {% if DEVICE_METADATA['localhost']['sub_role'] == 'FrontEnd' or DEVICE_METADATA['localhost']['sub_role'] == 'BackEnd'%} @@ -44,12 +46,14 @@ {% endfor %} {% for (name, prefix) in VLAN_INTERFACE|pfx_filter %} {%- if prefix | ipv4 %} - {%- set ipv4_addresses = ipv4_addresses.append(prefix) %} + {%- set ipv4_vlan_addresses = ipv4_vlan_addresses.append(prefix) %} {%- endif %} {%- if prefix | ipv6 %} - {%- set ipv6_addresses = ipv6_addresses.append(prefix) %} + {%- set ipv6_vlan_addresses = ipv6_vlan_addresses.append(prefix) %} {%- endif %} {% endfor %} +{%- set ipv4_addresses = ipv4_addresses + ipv4_vlan_addresses %} +{%- set ipv6_addresses = ipv6_addresses + ipv6_vlan_addresses %} [ {% if ipv4_loopback_addresses %} {% if subnet_decap.enable %} @@ -66,6 +70,15 @@ }, "OP": "SET" }, +{% for prefix in ipv4_vlan_addresses|sort %} + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:{{ prefix | network }}/{{ prefix | prefixlen }}" : { + "term_type":"MP2MP", + "subnet_type": "vlan" + }, + "OP": "SET" + }, +{% endfor %} {% endif %} { "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : { @@ -110,6 +123,15 @@ }, "OP": "SET" }, +{% for prefix in ipv6_vlan_addresses|sort %} + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET_V6:{{ prefix | network }}/{{ prefix | prefixlen }}" : { + "term_type":"MP2MP", + "subnet_type": "vlan" + }, + "OP": "SET" + }, +{% endfor %} {% endif %} { "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : { diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh index df29c6a258b5..705e1ea0db5d 100755 --- a/dockers/docker-orchagent/orchagent.sh +++ b/dockers/docker-orchagent/orchagent.sh @@ -1,5 +1,6 @@ #!/usr/bin/env bash +HWSKU_DIR=/usr/share/sonic/hwsku SWSS_VARS_FILE=/usr/share/sonic/templates/swss_vars.j2 # Retrieve SWSS vars from sonic-cfggen @@ -69,6 +70,12 @@ elif [ "$platform" == "nvidia-bluefield" ]; then elif [ "$platform" == "pensando" ]; then MAC_ADDRESS=$(ip link property add dev oob_mnic0 altname eth0; ip link show oob_mnic0 | grep ether | awk '{print $2}') ORCHAGENT_ARGS+="-m $MAC_ADDRESS" +elif [ "$platform" == "marvell" ]; then + ORCHAGENT_ARGS+="-m $MAC_ADDRESS" + CREATE_SWITCH_TIMEOUT=`cat $HWSKU_DIR/sai.profile | grep "createSwitchTimeout" | cut -d'=' -f 2` + if [[ ! -z $CREATE_SWITCH_TIMEOUT ]]; then + ORCHAGENT_ARGS+=" -t $CREATE_SWITCH_TIMEOUT" + fi else # Should we use the fallback MAC in case it is not found in Device.Metadata ORCHAGENT_ARGS+="-m $MAC_ADDRESS" @@ -77,13 +84,13 @@ fi # Enable ZMQ for SmartSwitch LOCALHOST_SUBTYPE=`sonic-db-cli CONFIG_DB hget "DEVICE_METADATA|localhost" "subtype"` if [[ x"${LOCALHOST_SUBTYPE}" == x"SmartSwitch" ]]; then - midplane_mgmt_ip=$( ip -json -4 addr show eth0-midplane | jq -r ".[0].addr_info[0].local" ) + midplane_mgmt_state=$( ip -json -4 addr show eth0-midplane | jq -r ".[0].operstate" ) mgmt_ip=$( ip -json -4 addr show eth0 | jq -r ".[0].addr_info[0].local" ) - if [[ $midplane_ip != "" ]]; then - # Enable ZMQ with eth0-midplane address - ORCHAGENT_ARGS+=" -q tcp://${midplane_mgmt_ip}:8100" + if [[ $midplane_mgmt_state == "UP" ]]; then + # Enable ZMQ with eth0-midplane interface name + ORCHAGENT_ARGS+=" -q tcp://eth0-midplane:8100" elif [[ $mgmt_ip != "" ]] && [[ $mgmt_ip != "null" ]]; then - # If eth0-midplane interface does not exist, enable ZMQ with eth0 address + # If eth0-midplane interface does not up, enable ZMQ with eth0 address ORCHAGENT_ARGS+=" -q tcp://${mgmt_ip}:8100" else ORCHAGENT_ARGS+=" -q tcp://127.0.0.1:8100" diff --git a/dockers/docker-orchagent/switch.json.j2 b/dockers/docker-orchagent/switch.json.j2 index 565d6b5005e4..63d3e80e3175 100644 --- a/dockers/docker-orchagent/switch.json.j2 +++ b/dockers/docker-orchagent/switch.json.j2 @@ -26,8 +26,10 @@ "ecmp_hash_seed": "{{ hash_seed_value }}", "lag_hash_seed": "{{ hash_seed_value }}", "fdb_aging_time": "600", +{% if not DEVICE_METADATA.localhost.switch_type or DEVICE_METADATA.localhost.switch_type != "chassis-packet" %} "ecmp_hash_offset": "{{ ecmp_hash_offset_value }}", "lag_hash_offset": "{{ lag_hash_offset_value }}", +{% endif %} {% if DEVICE_METADATA.localhost.type and "LeafRouter" in DEVICE_METADATA.localhost.type %} "ordered_ecmp": "true" {% else %} diff --git a/dockers/docker-platform-monitor/Dockerfile.j2 b/dockers/docker-platform-monitor/Dockerfile.j2 index 1bd0b1b1c082..b357133f5b91 100755 --- a/dockers/docker-platform-monitor/Dockerfile.j2 +++ b/dockers/docker-platform-monitor/Dockerfile.j2 @@ -54,6 +54,10 @@ RUN pip3 install libpci # Install psutil for process and system monitoring operations RUN pip3 install psutil +# Install blkinfo for block device information gathering operations +RUN pip3 install blkinfo + + {% if docker_platform_monitor_debs.strip() -%} # Copy locally-built Debian package dependencies {{ copy_files("debs/", docker_platform_monitor_debs.split(' '), "/debs/") }} diff --git a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 index 1cfd61ee8474..b023a8f2b0e7 100644 --- a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 +++ b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 @@ -28,7 +28,7 @@ stdout_logfile=syslog stderr_logfile=syslog dependent_startup=true -{% if not skip_chassisd and IS_MODULAR_CHASSIS == 1 %} +{% if not skip_chassisd and (IS_MODULAR_CHASSIS == 1 or is_smartswitch) %} [program:chassisd] command=/usr/local/bin/chassisd priority=3 diff --git a/dockers/docker-ptf/Dockerfile.j2 b/dockers/docker-ptf/Dockerfile.j2 index d19c1441825b..5148dd1125f1 100644 --- a/dockers/docker-ptf/Dockerfile.j2 +++ b/dockers/docker-ptf/Dockerfile.j2 @@ -118,7 +118,7 @@ RUN rm -rf /debs \ && rm -fr scapy-vxlan \ {% else %} && wget --https-only https://bootstrap.pypa.io/pip/get-pip.py \ - && python get-pip.py \ + && python3 get-pip.py \ && rm -f get-pip.py \ {% endif %} && git clone https://github.com/sflow/sflowtool \ @@ -197,7 +197,7 @@ RUN pip3 install setuptools \ && pip3 install Flask \ && pip3 install exabgp \ && pip3 install pyaml \ - && pip3 install pybrctl pyro4 rpyc yabgp \ + && pip3 install pybrctl pyro4 rpyc \ && pip3 install unittest-xml-reporting \ && pip3 install pyrasite \ && pip3 install python-libpcap \ diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm index 4c337ee0aab7..9e866beb21e2 100644 --- a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm +++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm @@ -47,6 +47,7 @@ mlnx-dpdk==22.11.0-2404.0.2 mlnx-dpdk-dev==22.11.0-2404.0.2 mlnx-iproute2==6.7.0-1.2404066 mlnx-ofed-kernel-utils==24.04.OFED.24.04.0.6.6.1-1 +mlnx-sai==1.mlnx.SAIBuild2405.28.0.33 mlnx-tools==24.04.0-1.2404066 mlxbf-bootctl==2.1 mlxbf-bootimages==4.7.0-13127 diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64 b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64 new file mode 100644 index 000000000000..5ab60ae1ec1f --- /dev/null +++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64 @@ -0,0 +1 @@ +mrvllibsai==1.14.0-1 diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-git b/files/build/versions/build/build-sonic-slave-bookworm/versions-git deleted file mode 100644 index 5ba32e1f336e..000000000000 --- a/files/build/versions/build/build-sonic-slave-bookworm/versions-git +++ /dev/null @@ -1 +0,0 @@ -https://github.com/thom311/libnl==fa05d58ebef426a545b4170b35214492b401c8af diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 index b73981a6f034..933217760ecd 100644 --- a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 +++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 @@ -13,7 +13,7 @@ filelock==3.15.4 freezegun==1.5.1 ijson==3.2.3 ipaddress==1.0.23 -jsondiff==2.2.0 +jsondiff==2.2.1 jsonpatch==1.33 jsonpointer==3.0.0 jsonschema==2.6.0 diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye index 1a89e443ed52..ed43881c5f4e 100644 --- a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye +++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye @@ -13,7 +13,7 @@ libprotobuf-dev==3.21.12-3 libprotobuf-lite32==3.21.12-3 libprotobuf32==3.21.12-3 libprotoc32==3.21.12-3 -libsai==1.13.0-1 +libsai==1.10.1-0 libsai-dev==1.13.0-1 libsaimetadata==1.0.0 libsaimetadata-dev==1.0.0 diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64 b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64 new file mode 100644 index 000000000000..2ccb237ebd9e --- /dev/null +++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64 @@ -0,0 +1 @@ +libsai==1.13.0-1 diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-git b/files/build/versions/build/build-sonic-slave-bullseye/versions-git deleted file mode 100644 index 5ba32e1f336e..000000000000 --- a/files/build/versions/build/build-sonic-slave-bullseye/versions-git +++ /dev/null @@ -1 +0,0 @@ -https://github.com/thom311/libnl==fa05d58ebef426a545b4170b35214492b401c8af diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 index 8b7f603785e3..1ef3c81eab16 100644 --- a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 +++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 @@ -1,4 +1,3 @@ -bitarray==2.8.1 blessed==1.20.0 cffi==1.17.0 charset-normalizer==3.3.2 @@ -10,7 +9,7 @@ enlighten==1.12.4 filelock==3.15.4 ijson==3.2.3 ipaddress==1.0.23 -jsondiff==2.2.0 +jsondiff==2.2.1 jsonpatch==1.33 jsonpointer==3.0.0 natsort==6.2.1 @@ -22,7 +21,6 @@ prettyprinter==0.18.0 pycairo==1.26.1 pycparser==2.22 pynacl==1.5.0 -pyyaml==6.0.1 scp==0.14.5 semantic-version==2.10.0 systemd-python==235 diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-arm64 b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-arm64 new file mode 100644 index 000000000000..dd22191a0c63 --- /dev/null +++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-arm64 @@ -0,0 +1,2 @@ +bitarray==2.8.1 +pyyaml==6.0.1 diff --git a/files/build/versions/default/versions-git b/files/build/versions/default/versions-git index 0306db65f1b5..cd33a9ac65b1 100644 --- a/files/build/versions/default/versions-git +++ b/files/build/versions/default/versions-git @@ -1,12 +1,12 @@ -https://chromium.googlesource.com/chromium/tools/depot_tools.git==0bc7c4832e4f2d453e4826c9a2e1197e11bd6ec7 +https://chromium.googlesource.com/chromium/tools/depot_tools.git==2836a02f55cd943760ab4949d5846cc5fb1fadcb https://github.com/aristanetworks/swi-tools.git==b5f087e4774168bf536360d43c9c509c8f14ad9f https://github.com/CESNET/libyang.git==fba28260f382d81cf8f4b91b24cd717b52324fc2 https://github.com/daveolson53/audisp-tacplus.git==559c9f22edd4f2dea0ecedffb3ad9502b12a75b6 https://github.com/daveolson53/libnss-tacplus.git==19008ab68d9d504aa58eb34d5f564755a1613b8b https://github.com/dyninc/OpenBFDD.git==e35f43ad8d2b3f084e96a84c392528a90d05a287 -https://github.com/flashrom/flashrom.git==8685230caa03940772358db6927c6076397a6d78 -https://github.com/FreeRADIUS/freeradius-server.git==da410bd1698ffce69486a94558d61bc13bac9dbc -https://github.com/FreeRADIUS/pam_radius.git==b6442c3e0147f1019990520483fa3a30e4ccf059 +https://github.com/flashrom/flashrom.git==00e02a61840d0f230d25f8988d2f30100ae1388d +https://github.com/FreeRADIUS/freeradius-server.git==e61cfd0d01dfebd290beb499fce6476443018c98 +https://github.com/FreeRADIUS/pam_radius.git==c898ed12675cf386218e6e071bb158b725e9bdf4 https://github.com/jeroennijhof/pam_tacplus.git==b839c440e33c36eced9dcbc287fcfe6237c4c4ce https://github.com/lguohan/gnxi.git==3adf8b97755b49947e465b5a14645f11e79fa0cd https://github.com/Mellanox/libpsample.git==62bb27d9a49424e45191eee81df7ce0d8c74e774 @@ -15,8 +15,8 @@ https://github.com/p4lang/ptf.git==c554f83685186be4cfa9387eb5d6d700d2bbd7c0 https://github.com/p4lang/scapy-vxlan.git==85ffe83da156568ee47a0750f638227e6e1d7479 https://github.com/sflow/host-sflow==2893b4808608233da0c26531dff942a960445006 https://github.com/sflow/sflowtool==c350bc8a6c5ef73d5b6b6529329391be4a2f5543 -https://github.com/sonic-net/DASH.git==173f1c79e7b549bcf1ad038f3a8eadcd3b309de8 -https://github.com/thom311/libnl==fa05d58ebef426a545b4170b35214492b401c8af -https://salsa.debian.org/kernel-team/initramfs-tools.git==18b98fa239af9b8a02dd009091b2085193681c64 +https://github.com/sonic-net/DASH.git==78fca1e632cc664798ad0ddd6c75cd0b7cbaa69a +https://github.com/thom311/libnl==81c40cbb904fb4844411cc660eaa0fd1d5d9f5f3 +https://salsa.debian.org/kernel-team/initramfs-tools.git==1030062ea45fe8c0dcde0586e588bd95075afe5c https://salsa.debian.org/sk-guest/monit.git==c9da7ebb1f35dfba17b50b5969a6e75e29cbec0d https://salsa.debian.org/tai271828/rasdaemon.git==51a7f485f8b2e2ae43e613f19c5a387595174132 diff --git a/files/build/versions/default/versions-mirror b/files/build/versions/default/versions-mirror index 291de46fbe2f..dc917aeaf967 100644 --- a/files/build/versions/default/versions-mirror +++ b/files/build/versions/default/versions-mirror @@ -1,13 +1,13 @@ archive.ubuntu.com_ubuntu_dists_focal==2020-04-23T17:33:17Z archive.ubuntu.com_ubuntu_dists_focal-backports==2024-05-31T11:48:10Z -archive.ubuntu.com_ubuntu_dists_focal-updates==2024-08-19T02:41:01Z +archive.ubuntu.com_ubuntu_dists_focal-updates==2024-08-31T04:28:43Z deb.nodesource.com_node%5f14.x_dists_bookworm==2023-02-17T00:35:29Z deb.nodesource.com_node%5f14.x_dists_bullseye==2023-02-17T00:35:28Z deb.nodesource.com_node%5f14.x_dists_buster==2023-02-17T00:35:28Z debian==20240801T000314Z debian-security==20240801T000306Z -download.docker.com_linux_debian_dists_bookworm==2024-08-16T23:21:06Z -download.docker.com_linux_debian_dists_bullseye==2024-08-16T23:21:06Z +download.docker.com_linux_debian_dists_bookworm==2024-08-27T19:23:45Z +download.docker.com_linux_debian_dists_bullseye==2024-08-27T19:23:45Z download.docker.com_linux_debian_dists_buster==2024-06-17T16:53:50Z packages.trafficmanager.net_snapshot_debian-security_20240801T000306Z_dists_bookworm-security==2024-07-31T23:24:08Z packages.trafficmanager.net_snapshot_debian-security_20240801T000306Z_dists_bullseye-security==2024-07-31T23:24:07Z @@ -21,4 +21,4 @@ packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_bullseye-upda packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_buster==2023-06-10T08:53:33Z packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_buster-backports==2024-03-09T20:54:54Z packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_buster-updates==2023-06-10T08:55:10Z -security.ubuntu.com_ubuntu_dists_focal-security==2024-08-15T23:58:16Z +security.ubuntu.com_ubuntu_dists_focal-security==2024-08-23T00:11:18Z diff --git a/files/build/versions/default/versions-web b/files/build/versions/default/versions-web index 788d0ac5b72c..78d7b529e451 100644 --- a/files/build/versions/default/versions-web +++ b/files/build/versions/default/versions-web @@ -23,7 +23,7 @@ http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-p4c_1.2. http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0-15.debian.tar.xz==b9d8e4ce4cb66385250cf6dded0ef57a http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0-15.dsc==03154ab52843ee9efa380febb8053c06 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0.orig.tar.gz==551d3780d615557674e93fa11210499d -http://www.iana.org/assignments/enterprise-numbers.txt==a1246c0137a93741b1a68322f3c473c2 +http://www.iana.org/assignments/enterprise-numbers.txt==2dc962e3f609c1503727a8028a526d05 http://www.mellanox.com/downloads/MFT/mft-4.28.0-96-arm64-deb.tgz==39b3244a00029f97734ee75e5a321065 http://www.mellanox.com/downloads/MFT/mft-4.28.0-96-x86_64-deb.tgz==f552e1faddc8f76fe4eb0b8902606c2a https://archive.apache.org/dist/thrift/0.14.1/thrift-0.14.1.tar.gz==c64434548438df2cb1e53fb27c600e85 @@ -42,7 +42,7 @@ https://deb.nodesource.com/node_14.x/dists/bullseye/Release==6b7d50c433d129d4c6f https://deb.nodesource.com/node_14.x/dists/buster/Release==42875141604382f0abb4d047f645dfe1 https://deb.nodesource.com/setup_14.x==c30873f4a513bb935afaf8f65e7de9e1 https://download.docker.com/linux/debian/gpg==1afae06b34a13c1b3d9cb61a26285a15 -https://github.com/aristanetworks/sonic-firmware/raw/9e34da2a2d2d1e7e972cda3064b7b73c0558b322/phy/phy-credo_1.0_amd64.deb==a9c38d11ae4e34ca728d9b3b92fd89af +https://github.com/aristanetworks/sonic-firmware/raw/24716c4e03f223d8e18afff786ac427f6ac77fe0/phy/phy-credo_1.0_amd64.deb==14e233cd68bc5db22eb8c9e177242851 https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-amd64==4c5f03df0d1074addce889dd53d9564a https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-arm64==bd02444daced3e97685d1067fbe6498d https://github.com/CentecNetworks/sonic-binaries/raw/master/amd64/sai/libsaictc-dev_1.13.0-1_amd64.deb==b2e4b33541d4ab5de4c1b8eb4a783761 @@ -81,7 +81,7 @@ https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-sdk-2 https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-sdk-24.7-RC4-bookworm//rdma-core_2404mlnx51-1.2404066_arm64.deb==fc1135a6c64cc4402732261f12c64bfe https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-sdk-24.7-RC4-bookworm//rxp-compiler_22.05.1_arm64.deb==dd7265c708beffaf4a1dc4cdeac28c6e https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-sdk-24.7-RC4-bookworm//sdn-appliance_1.5-1mlnx1_arm64.deb==75c91f2efe5b452b4751e45f666e1daf -https://github.com/Mellanox/sonic-bluefield-packages/releases/download/rshim-2.0.19-bookworm-amd64/rshim_2.0.19_amd64.deb==8128219b0328704b67def640a356df1f +https://github.com/Mellanox/sonic-bluefield-packages/releases/download/rshim-2.0.29-bookworm-amd64/rshim_2.0.29_amd64.deb==f78f52c7e36ddeb04602c11c95b10181 https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/fw-2012.4072/fw-SPC-rel-13_2012_4072-EVB.mfa==fbcd5f1192855031a6f4b678474fa2d4 https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/fw-2012.4072/fw-SPC2-rel-29_2012_4072-EVB.mfa==857c07996d406a7130b2a422dff44d7c https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/fw-2012.4072/fw-SPC3-rel-30_2012_4072-EVB.mfa==c040593a9eb8927d85b5394e246ca2d4 diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3 b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3 index 87add86ead31..463edbeae50f 100644 --- a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3 +++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3 @@ -1,7 +1,7 @@ bitarray==2.8.1 ijson==3.2.3 ipaddress==1.0.23 -jsondiff==2.2.0 +jsondiff==2.2.1 lxml==4.9.1 natsort==6.2.1 netaddr==0.8.0 diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3 b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3 index 1a1c9250903f..51c6d30ebb12 100644 --- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3 +++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3 @@ -1,7 +1,7 @@ bitarray==2.8.1 ijson==3.2.3 ipaddress==1.0.23 -jsondiff==2.2.0 +jsondiff==2.2.1 lxml==4.9.1 natsort==6.2.1 netaddr==0.8.0 diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-py3 b/files/build/versions/dockers/docker-platform-monitor/versions-py3 index 960078b051ef..cede940bf325 100644 --- a/files/build/versions/dockers/docker-platform-monitor/versions-py3 +++ b/files/build/versions/dockers/docker-platform-monitor/versions-py3 @@ -1,11 +1,11 @@ attrs==22.2.0 -certifi==2024.7.4 +certifi==2024.8.30 charset-normalizer==3.3.2 enum34==1.1.10 grpcio==1.51.1 grpcio-tools==1.51.1 guacamole==0.9.2 -idna==3.7 +idna==3.8 jsonschema==2.6.0 libpci==0.2 netifaces==0.11.0 diff --git a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3 b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3 index 8fbb76d5fd8b..0d7901881f78 100644 --- a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3 +++ b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3 @@ -1,5 +1,5 @@ -certifi==2024.7.4 +certifi==2024.8.30 charset-normalizer==3.3.2 -idna==3.7 +idna==3.8 requests==2.32.3 urllib3==2.2.2 diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-py3 b/files/build/versions/dockers/docker-sonic-vs/versions-py3 index a7d5f91d9b2a..ab8596ef5cdf 100644 --- a/files/build/versions/dockers/docker-sonic-vs/versions-py3 +++ b/files/build/versions/dockers/docker-sonic-vs/versions-py3 @@ -1,7 +1,7 @@ async-timeout==4.0.2 bcrypt==3.2.2 blessed==1.20.0 -certifi==2024.7.4 +certifi==2024.8.30 cffi==1.17.0 charset-normalizer==3.3.2 click==7.0 @@ -13,7 +13,7 @@ docker==7.1.0 docker-image-py==0.1.13 enlighten==1.12.4 filelock==3.15.4 -idna==3.7 +idna==3.8 importlib-metadata==6.1.0 jsonpatch==1.33 jsonpointer==3.0.0 diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64 b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64 index 9b956a86a33f..c4a2333b4da0 100644 --- a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64 +++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64 @@ -11,7 +11,7 @@ libpython3-dev==3.11.2-1+b1 libpython3.11-dev==3.11.2-6+deb12u2 libsaimetadata==1.0.0 libsairedis==1.0.0 -mrvllibsai==1.13.0-1 +mrvllibsai==1.14.0-1 pkg-config==1.8.1-1 pkgconf==1.8.1-1 pkgconf-bin==1.8.1-1 diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf index 637e2933d58f..c4a2333b4da0 100644 --- a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf +++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf @@ -11,7 +11,7 @@ libpython3-dev==3.11.2-1+b1 libpython3.11-dev==3.11.2-6+deb12u2 libsaimetadata==1.0.0 libsairedis==1.0.0 -mrvllibsai==1.13.0-3 +mrvllibsai==1.14.0-1 pkg-config==1.8.1-1 pkgconf==1.8.1-1 pkgconf-bin==1.8.1-1 diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm index 902ef9de3424..12e46295fd7a 100644 --- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm +++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm @@ -25,7 +25,7 @@ automake==1:1.16.5-1.3 autopoint==0.21-12 autotools-dev==20220109.1 bash-completion==1:2.11-6 -bc==1.07.1-3+b1 +bc==1.07.1-3 bind9-dnsutils==1:9.18.28-1~deb12u2 bind9-host==1:9.18.28-1~deb12u2 bind9-libs==1:9.18.28-1~deb12u2 @@ -76,7 +76,7 @@ dbus-system-bus-common==1.14.10-1~deb12u1 dbus-user-session==1.14.10-1~deb12u1 dconf-gsettings-backend==0.40.0-4 dconf-service==0.40.0-4 -dctrl-tools==2.24-3+b1 +dctrl-tools==2.24-3 debhelper==13.11.4 debian-keyring==2022.12.24 debootstrap==1.0.128+nmu2+deb12u1 @@ -110,14 +110,14 @@ docbook-xml==4.5-12 docker-buildx-plugin==0.10.5-1~debian.12~bookworm docker-ce==5:24.0.2-1~debian.12~bookworm docker-ce-cli==5:24.0.2-1~debian.12~bookworm -docker-ce-rootless-extras==5:27.1.2-1~debian.12~bookworm +docker-ce-rootless-extras==5:27.2.0-1~debian.12~bookworm docker-compose-plugin==2.18.1-1~debian.12~bookworm docutils-common==0.19+dfsg-6 dosfstools==4.2-1 doxygen==1.9.4-4 dpkg-dev==1.21.22 dput==1.1.3 -dvipng==1.15-1.1+b1 +dvipng==1.15-1.1 dvisvgm==3.0.3-1 dwz==0.15-1 eatmydata==130-2 @@ -1016,8 +1016,8 @@ libmunge2==0.5.15-2 libmysofa1==1.3.1~dfsg0-1 libnamespace-autoclean-perl==0.29-2 libnamespace-clean-perl==0.27-2 -libnanomsg-dev==1.1.5+dfsg-1.1+b1 -libnanomsg5==1.1.5+dfsg-1.1+b1 +libnanomsg-dev==1.1.5+dfsg-1.1 +libnanomsg5==1.1.5+dfsg-1.1 libncurses-dev==6.4-4 libncurses5-dev==6.4-4 libncurses6==6.4-4 @@ -2035,10 +2035,10 @@ velocity==1.7-6 vim==2:9.0.1378-2 vim-common==2:9.0.1378-2 vim-runtime==2:9.0.1378-2 -watchdog==5.16-1+b2 +watchdog==5.16-1+b1 wayland-protocols==1.31-1 wdiff==1.2.2-5 -wget==1.21.3-1+b2 +wget==1.21.3-1+b1 x11-common==1:7.7+23 x11-utils==7.7+5 x11-xserver-utils==7.7+9+b1 diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64 b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64 deleted file mode 100644 index 3b6c4c092385..000000000000 --- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64 +++ /dev/null @@ -1,7 +0,0 @@ -bc==1.07.1-3 -dctrl-tools==2.24-3 -dvipng==1.15-1.1 -libnanomsg-dev==1.1.5+dfsg-1.1 -libnanomsg5==1.1.5+dfsg-1.1 -watchdog==5.16-1+b1 -wget==1.21.3-1+b1 diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf index 5a56eb851a10..6fd0984f5ec6 100644 --- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf +++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf @@ -1,10 +1,3 @@ -bc==1.07.1-3 -dctrl-tools==2.24-3 -dvipng==1.15-1.1 -libnanomsg-dev==1.1.5+dfsg-1.1 -libnanomsg5==1.1.5+dfsg-1.1 linux-compiler-gcc-12-arm==6.1.99-1 linux-headers-6.1.0-23-armmp==6.1.99-1 linux-headers-armmp==6.1.99-1 -watchdog==5.16-1+b1 -wget==1.21.3-1+b1 diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 index 402f9445a9f9..6ae5e3eda6bf 100644 --- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 +++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 @@ -97,8 +97,8 @@ platformdirs==2.6.0 pluggy==1.0.0+repack ply==3.11 prompt-toolkit==3.0.36 -protobuf==4.21.12 -psutil==5.9.4 +protobuf==4.25.4 +psutil==6.0.0 ptyprocess==0.7.0 pure-eval==0.0.0 py==1.11.0 diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64 deleted file mode 100644 index 5206c39a50f7..000000000000 --- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64 +++ /dev/null @@ -1,2 +0,0 @@ -protobuf==4.25.4 -psutil==6.0.0 diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf deleted file mode 100644 index 5206c39a50f7..000000000000 --- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf +++ /dev/null @@ -1,2 +0,0 @@ -protobuf==4.25.4 -psutil==6.0.0 diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye index 8f0505d04b21..9d40025ca2d5 100644 --- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye +++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye @@ -70,7 +70,7 @@ dbus==1.12.28-0+deb11u1 dbus-user-session==1.12.28-0+deb11u1 dconf-gsettings-backend==0.38.0-2 dconf-service==0.38.0-2 -dctrl-tools==2.24-3+b1 +dctrl-tools==2.24-3 debhelper==13.3.4 debian-keyring==2021.07.26 debootstrap==1.0.123+deb11u2 @@ -106,7 +106,7 @@ docbook-xsl==1.79.2+dfsg-1 docker-buildx-plugin==0.10.5-1~debian.11~bullseye docker-ce==5:24.0.2-1~debian.11~bullseye docker-ce-cli==5:24.0.2-1~debian.11~bullseye -docker-ce-rootless-extras==5:27.1.2-1~debian.11~bullseye +docker-ce-rootless-extras==5:27.2.0-1~debian.11~bullseye docker-compose-plugin==2.18.1-1~debian.11~bullseye docutils-common==0.16+dfsg-4 dosfstools==4.2-1 @@ -114,7 +114,7 @@ doxygen==1.9.1-1 dpatch==2.0.41 dpkg-dev==1.20.13 dput==1.1.0 -dvipng==1.15-1.1+b1 +dvipng==1.15-1.1 dvisvgm==2.11.1-1 dwarves==1.20-1 dwz==0.13+20210201-1 @@ -1295,7 +1295,7 @@ libucx0==1.10.1~rc1+really.1.10.0-1 libudev-dev==247.3-7+deb11u5 libudfread0==1.1.1-1 libunbound8==1.13.1-1+deb11u2 -libunicode-linebreak-perl==0.0.20190101-1+b3 +libunicode-linebreak-perl==0.0.20190101-1+b2 libunicode-utf8-perl==0.62-1+b2 libunivocity-parsers-java==2.8.3-2 libunwind-dev==1.3.2-2 diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-arm64 b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-arm64 deleted file mode 100644 index 8c36820881e4..000000000000 --- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-arm64 +++ /dev/null @@ -1,3 +0,0 @@ -dctrl-tools==2.24-3 -dvipng==1.15-1.1 -libunicode-linebreak-perl==0.0.20190101-1+b2 diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf index eef585c8b7b8..f98b360d3695 100644 --- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf +++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf @@ -1,8 +1,5 @@ -dctrl-tools==2.24-3 -dvipng==1.15-1.1 libjpeg-dev==1:2.0.6-4 libjpeg62-turbo-dev==1:2.0.6-4 -libunicode-linebreak-perl==0.0.20190101-1+b2 linux-compiler-gcc-10-arm==5.10.221-1 linux-headers-5.10.0-31-armmp==5.10.221-1 linux-headers-armmp==5.10.221-1 diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 index 19ed5b0197fe..3cc1b88b917d 100644 --- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 +++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 @@ -75,7 +75,7 @@ pluggy==0.13.0 ply==3.11 prompt-toolkit==3.0.14 protobuf==4.25.4 -psutil==5.8.0 +psutil==6.0.0 ptyprocess==0.7.0 py==1.10.0 pyang==2.4.0 diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-arm64 b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-arm64 deleted file mode 100644 index 84f3d20c064b..000000000000 --- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-arm64 +++ /dev/null @@ -1 +0,0 @@ -psutil==6.0.0 diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-armhf b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-armhf deleted file mode 100644 index 84f3d20c064b..000000000000 --- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-armhf +++ /dev/null @@ -1 +0,0 @@ -psutil==6.0.0 diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster index 4469ca16b14d..f97105806fba 100644 --- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster +++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster @@ -1140,7 +1140,7 @@ libtexlua53==2018.20181218.49446-1+deb10u2 libtexluajit2==2018.20181218.49446-1+deb10u2 libtext-charwidth-perl==0.04-7.1+b1 libtext-glob-perl==0.10-1 -libtext-iconv-perl==1.7-5+b7 +libtext-iconv-perl==1.7-5+b6 libtext-levenshtein-perl==0.13-1 libtext-unidecode-perl==1.30-1 libtext-wrapi18n-perl==0.06-7.1 diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-arm64 b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-arm64 deleted file mode 100644 index 8f68d6329237..000000000000 --- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-arm64 +++ /dev/null @@ -1 +0,0 @@ -libtext-iconv-perl==1.7-5+b6 diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf index 4db6ea2c4dcf..201942d33930 100644 --- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf +++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf @@ -17,6 +17,7 @@ libqt5sql5-sqlite==5.11.3+dfsg1-1+deb10u5 libqt5test5==5.11.3+dfsg1-1+deb10u5 libqt5widgets5==5.11.3+dfsg1-1+deb10u5 libqt5xml5==5.11.3+dfsg1-1+deb10u5 +libtext-iconv-perl==1.7-5+b7 linux-compiler-gcc-8-arm==4.19.316-1 nasm==2.14-1 qt5-default==5.11.3+dfsg1-1+deb10u5 diff --git a/files/build/versions/host-image/versions-deb-bookworm b/files/build/versions/host-image/versions-deb-bookworm index 820dfc3ab34b..f48451bfa5da 100644 --- a/files/build/versions/host-image/versions-deb-bookworm +++ b/files/build/versions/host-image/versions-deb-bookworm @@ -310,7 +310,7 @@ ntpdate==1:4.2.8p15+dfsg-2~1.2.2+dfsg1-1+deb12u1 ntpsec==1.2.2+dfsg1-1+deb12u1 ntpsec-ntpdate==1.2.2+dfsg1-1+deb12u1 ntpsec-ntpdig==1.2.2+dfsg1-1+deb12u1 -ntpstat==0.0.0.1-2+b1 +ntpstat==0.0.0.1-2 nvme-cli==2.4+really2.3-3 opennsl-modules==7.1.0.0 openssh-client==1:9.2p1-2+deb12u3+fips @@ -357,7 +357,7 @@ rasdaemon==0.6.8-1 readline-common==8.2-1.3 resolvconf==1.91+nmu1 rpcsvc-proto==1.4.3-1 -rshim==2.0.19 +rshim==2.0.29 rsyslog==8.2302.0-1 runit-helper==2.15.2 sbsigntool==0.9.4-3.1 diff --git a/files/build/versions/host-image/versions-deb-bookworm-arm64 b/files/build/versions/host-image/versions-deb-bookworm-arm64 index d82ad88387ea..8260d1e41f88 100644 --- a/files/build/versions/host-image/versions-deb-bookworm-arm64 +++ b/files/build/versions/host-image/versions-deb-bookworm-arm64 @@ -1,3 +1,2 @@ mrvlprestera==1.0 -ntpstat==0.0.0.1-2 tsingma-bsp==1.0 diff --git a/files/build/versions/host-image/versions-deb-bookworm-armhf b/files/build/versions/host-image/versions-deb-bookworm-armhf index 85aa015ee127..f5c751412ff6 100644 --- a/files/build/versions/host-image/versions-deb-bookworm-armhf +++ b/files/build/versions/host-image/versions-deb-bookworm-armhf @@ -1,5 +1,4 @@ binutils-arm-linux-gnueabihf==2.40-2 linux-image-6.1.0-11-2-armmp==6.1.38-4 mrvlprestera==1.0 -ntpstat==0.0.0.1-2 python3-gi==3.42.2-3+b1 diff --git a/files/build/versions/host-image/versions-py3 b/files/build/versions/host-image/versions-py3 index 548519d7cdfe..aba2738717a6 100644 --- a/files/build/versions/host-image/versions-py3 +++ b/files/build/versions/host-image/versions-py3 @@ -5,7 +5,7 @@ bcrypt==3.2.2 bitarray==2.8.1 blessed==1.20.0 blkinfo==0.2.0 -certifi==2024.7.4 +certifi==2024.8.30 cffi==1.15.1 charset-normalizer==3.3.2 click==7.0 @@ -19,13 +19,13 @@ enlighten==1.12.4 filelock==3.15.4 grpcio==1.51.1 grpcio-tools==1.51.1 -idna==3.7 +idna==3.8 ijson==3.2.3 ipaddr==2.2.0 ipaddress==1.0.23 j2cli==0.3.12b0 jinja2==3.1.2 -jsondiff==2.2.0 +jsondiff==2.2.1 jsonpatch==1.33 jsonpointer==3.0.0 jsonschema==2.6.0 diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2 index 7e64845c8097..732681818824 100644 --- a/files/build_templates/docker_image_ctl.j2 +++ b/files/build_templates/docker_image_ctl.j2 @@ -327,6 +327,11 @@ function postStartAction() docker cp $PSENSOR pmon:/usr/bin/ fi fi +{%- elif docker_container_name == "eventd" %} + export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state') + j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json > /etc/rsyslog.d/host_events.conf + j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/syncd_events_info.json > /etc/rsyslog.d/syncd_events.conf + systemctl restart rsyslog {%- else %} : # nothing {%- endif %} @@ -428,7 +433,7 @@ start() { if [ -d "$HWSKU_FOLDER" ]; then CREATE_ONLY_CONFIG_DB_BUFFERS_JSON="$HWSKU_FOLDER/create_only_config_db_buffers.json" if [ -f "$CREATE_ONLY_CONFIG_DB_BUFFERS_JSON" ]; then - $SONIC_CFGGEN -j $CREATE_ONLY_CONFIG_DB_BUFFERS_JSON --write-to-db + $SONIC_DB_CLI CONFIG_DB HSET 'DEVICE_METADATA|localhost' create_only_config_db_buffers true fi fi {%- endif %} diff --git a/files/build_templates/rsyslog_plugin.conf.j2 b/files/build_templates/rsyslog_plugin.conf.j2 index 56ec0f71d3f1..f69e58cf4313 100644 --- a/files/build_templates/rsyslog_plugin.conf.j2 +++ b/files/build_templates/rsyslog_plugin.conf.j2 @@ -1,7 +1,6 @@ ## rsyslog-plugin for streaming telemetry via gnmi - - +{% if ENVIRONMENT['EVENTD_STATE'] == "enabled" %} template(name="prog_msg" type="list") { property(name="msg") constant(value="\n") @@ -16,3 +15,4 @@ if re_match($programname, "{{ proc.name }}") then { template="prog_msg") } {% endfor %} +{% endif %} diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2 index 12c743d9308a..da7cdd8a2744 100644 --- a/files/build_templates/sonic_debian_extension.j2 +++ b/files/build_templates/sonic_debian_extension.j2 @@ -362,13 +362,16 @@ sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-db-cli_*.deb || \ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f -{% if include_system_eventd == "y" and build_reduce_image_size != "y" %} +{% if include_system_eventd == "y" %} # Install sonic-rsyslog-plugin sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-rsyslog-plugin_*.deb || \ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f # Generate host conf for rsyslog_plugin -j2 -f json $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $BUILD_TEMPLATES/events_info.json | sudo tee $FILESYSTEM_ROOT_ETC/rsyslog.d/host_events.conf +sudo mkdir -p $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin +sudo cp $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/ +sudo cp $BUILD_TEMPLATES/events_info.json $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/ +sudo cp $BUILD_TEMPLATES/syncd_events_info.json $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/ sudo cp $BUILD_TEMPLATES/monit_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ sudo cp $BUILD_TEMPLATES/sshd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ sudo cp $BUILD_TEMPLATES/systemd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ @@ -377,11 +380,7 @@ sudo cp $BUILD_TEMPLATES/dockerd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ sudo cp $BUILD_TEMPLATES/seu_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ sudo cp $BUILD_TEMPLATES/zebra_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ sudo cp $BUILD_TEMPLATES/bgpd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ - - -j2 -f json $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $BUILD_TEMPLATES/syncd_events_info.json | sudo tee $FILESYSTEM_ROOT_ETC/rsyslog.d/syncd_events.conf sudo cp $BUILD_TEMPLATES/syncd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ - {% endif %} # Install custom-built monit package and SONiC configuration files @@ -397,6 +396,8 @@ sudo cp $IMAGE_CONFIGS/monit/memory_checker $FILESYSTEM_ROOT/usr/bin/ sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/memory_checker sudo cp $IMAGE_CONFIGS/monit/restart_service $FILESYSTEM_ROOT/usr/bin/ sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/restart_service +sudo cp $IMAGE_CONFIGS/monit/arp_update_checker $FILESYSTEM_ROOT/usr/bin/ +sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/arp_update_checker # Installed smartmontools version should match installed smartmontools in docker-platform-monitor Dockerfile # TODO: are mismatching versions fine for bookworm? @@ -431,6 +432,13 @@ echo "ntpsec.service" | sudo tee -a $GENERATED_SERVICE_FILE # Copy DNS templates sudo cp $BUILD_TEMPLATES/dns.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/ +# Copy cli-sessions config files +sudo cp $IMAGE_CONFIGS/cli_sessions/tmout-env.sh.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/ +sudo cp $IMAGE_CONFIGS/cli_sessions/sysrq-sysctl.conf.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/ +sudo cp $IMAGE_CONFIGS/cli_sessions/serial-config.sh $FILESYSTEM_ROOT/usr/bin/ +sudo cp $IMAGE_CONFIGS/cli_sessions/serial-config.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM +echo "serial-config.service" | sudo tee -a $GENERATED_SERVICE_FILE + # Copy warmboot-finalizer files sudo LANG=C cp $IMAGE_CONFIGS/warmboot-finalizer/finalize-warmboot.sh $FILESYSTEM_ROOT/usr/local/bin/finalize-warmboot.sh sudo LANG=C cp $IMAGE_CONFIGS/warmboot-finalizer/warmboot-finalizer.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM @@ -1089,7 +1097,20 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in sudo mkdir -p $FILESYSTEM_ROOT/etc/minicom/ sudo cp platform/mellanox/minirc.dfl $FILESYSTEM_ROOT/etc/minicom/ -sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable rshim.service +# Install rshim script +sudo install -m 755 platform/mellanox/rshim/files/rshim.sh $FILESYSTEM_ROOT/usr/bin/rshim.sh + +# Install rshim services +sudo cp platform/mellanox/rshim/files/rshim@.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/ +sudo cp platform/mellanox/rshim/files/rshim-manager.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/ + +# Install dpuctl script and config file +sudo install -m 755 platform/mellanox/smartswitch/dpuctl/dpuctl.sh $FILESYSTEM_ROOT/usr/bin/dpuctl.sh +sudo install -m 755 platform/mellanox/smartswitch/dpuctl/dpu.conf $FILESYSTEM_ROOT_ETC/mlnx/ + +# Install dpuctl services +sudo cp platform/mellanox/smartswitch/dpuctl/dpuctl.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/ + {% endif %} {% if sonic_asic_platform == "nvidia-bluefield" %} @@ -1103,6 +1124,8 @@ for fw_file_name in ${!FW_FILE_MAP[@]}; do sudo ln -s /host/image-$SONIC_IMAGE_VERSION/$PLATFORM_DIR/fw/dpu/${FW_FILE_MAP[$fw_file_name]} $FILESYSTEM_ROOT/etc/bluefield/${FW_FILE_MAP[$fw_file_name]} done +sudo install -m 755 platform/nvidia-bluefield/byo/sonic-byo.py $FILESYSTEM_ROOT/usr/bin/sonic-byo.py + SONIC_PLATFORM_PY3_WHEEL_NAME=$(basename {{platform_api_py3_wheel_path}}) sudo cp {{platform_api_py3_wheel_path}} $FILESYSTEM_ROOT/$SONIC_PLATFORM_PY3_WHEEL_NAME sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $SONIC_PLATFORM_PY3_WHEEL_NAME diff --git a/files/dsc/install_debian.j2 b/files/dsc/install_debian.j2 index 4cb6d24631ec..def175249764 100755 --- a/files/dsc/install_debian.j2 +++ b/files/dsc/install_debian.j2 @@ -244,8 +244,8 @@ cat <> $root_mnt/$BL_CONF default main label main - kernel /$image_dir/boot/vmlinuz-6.1.0-11-2-arm64 - initrd /$image_dir/boot/initrd.img-6.1.0-11-2-arm64 + kernel /$image_dir/boot/vmlinuz-6.1.0-22-2-arm64 + initrd /$image_dir/boot/initrd.img-6.1.0-22-2-arm64 devicetree /$image_dir/boot/elba-asic-psci.dtb append softdog.soft_panic=1 FW_NAME=mainfwa root=/dev/mmcblk0p10 rw rootwait rootfstype=ext4 loopfstype=squashfs loop=/$image_dir/fs.squashfs } diff --git a/files/image_config/bannerconfig/banner-config.sh b/files/image_config/bannerconfig/banner-config.sh index b81b342bf52f..5c605a034ea0 100755 --- a/files/image_config/bannerconfig/banner-config.sh +++ b/files/image_config/bannerconfig/banner-config.sh @@ -1,14 +1,14 @@ #!/bin/bash -e -STATE=$(sonic-cfggen -d -v 'BANNER_MESSAGE["global"]["state"]') +STATE=$(sonic-db-cli CONFIG_DB HGET 'BANNER_MESSAGE|global' state) LOGIN= MOTD= LOGOUT= if [[ $STATE == "enabled" ]]; then - LOGIN=$(sonic-cfggen -d -v 'BANNER_MESSAGE["global"]["login"]') - MOTD=$(sonic-cfggen -d -v 'BANNER_MESSAGE["global"]["motd"]') - LOGOUT=$(sonic-cfggen -d -v 'BANNER_MESSAGE["global"]["logout"]') + LOGIN=$(sonic-db-cli CONFIG_DB HGET 'BANNER_MESSAGE|global' login) + MOTD=$(sonic-db-cli CONFIG_DB HGET 'BANNER_MESSAGE|global' motd) + LOGOUT=$(sonic-db-cli CONFIG_DB HGET 'BANNER_MESSAGE|global' logout) echo -e "$LOGIN" > /etc/issue.net echo -e "$LOGIN" > /etc/issue diff --git a/files/image_config/cli_sessions/serial-config.service b/files/image_config/cli_sessions/serial-config.service new file mode 100644 index 000000000000..6211ecaaae28 --- /dev/null +++ b/files/image_config/cli_sessions/serial-config.service @@ -0,0 +1,13 @@ +[Unit] +Description=Update serial console config +Requires=sonic.target +After=sonic.target +Before=getty-pre.target +StartLimitIntervalSec=0 + +[Service] +Type=oneshot +ExecStart=/usr/bin/serial-config.sh + +[Install] +WantedBy=sonic.target diff --git a/files/image_config/cli_sessions/serial-config.sh b/files/image_config/cli_sessions/serial-config.sh new file mode 100755 index 000000000000..b02d65ffae49 --- /dev/null +++ b/files/image_config/cli_sessions/serial-config.sh @@ -0,0 +1,15 @@ +#!/bin/bash + +# generate conf file for sysrq capabilities. +sonic-cfggen -d -t /usr/share/sonic/templates/sysrq-sysctl.conf.j2 > /etc/sysctl.d/95-sysrq-sysctl.conf + +SYSRQ_CONF=0 +# update sysrq for current boot. +sysrq_conf=`sonic-db-cli CONFIG_DB HGET "SERIAL_CONSOLE|POLICIES" sysrq_capabilities` +if [ ${sysrq_conf} = "enabled" ]; then + SYSRQ_CONF=1 +fi +sudo echo $SYSRQ_CONF > /proc/sys/kernel/sysrq + +# generate env file for profile.d to set auto-logout timeout for serial consoles. +sonic-cfggen -d -t /usr/share/sonic/templates/tmout-env.sh.j2 > /etc/profile.d/tmout-env.sh diff --git a/files/image_config/cli_sessions/sysrq-sysctl.conf.j2 b/files/image_config/cli_sessions/sysrq-sysctl.conf.j2 new file mode 100644 index 000000000000..9d7b96660b74 --- /dev/null +++ b/files/image_config/cli_sessions/sysrq-sysctl.conf.j2 @@ -0,0 +1,10 @@ +############################################################################### +# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY. +# Controlled by serial-config.sh +############################################################################### +{% set sysrq = 0 %} +{% set serial_policies = (SERIAL_CONSOLE | d({})).get('POLICIES', {}) -%} +{% if serial_policies.sysrq_capabilities == 'enabled' %} +{% set sysrq = 1 %} +{% endif %} +kernel.sysrq={{ sysrq }} \ No newline at end of file diff --git a/files/image_config/cli_sessions/tmout-env.sh.j2 b/files/image_config/cli_sessions/tmout-env.sh.j2 new file mode 100644 index 000000000000..528504ee7218 --- /dev/null +++ b/files/image_config/cli_sessions/tmout-env.sh.j2 @@ -0,0 +1,11 @@ +{# Default timeout (15 min) #} +{% set inactivity_timeout_sec = 900 %} + +{% set serial_pol = (SERIAL_CONSOLE | d({})).get('POLICIES', {}) -%} +{% if serial_pol and serial_pol.inactivity_timeout and serial_pol.inactivity_timeout | int >= 0 %} +{% set inactivity_timeout_sec = serial_pol.inactivity_timeout | int * 60 %} +{% endif %} + +{# apply only for serial tty #} +tty | grep -q tty && \ +export TMOUT={{ inactivity_timeout_sec }} diff --git a/files/image_config/hostname/hostname-config.sh b/files/image_config/hostname/hostname-config.sh index 5f4bfede2097..91b0b7b32f91 100755 --- a/files/image_config/hostname/hostname-config.sh +++ b/files/image_config/hostname/hostname-config.sh @@ -1,7 +1,7 @@ #!/bin/bash -e -CURRENT_HOSTNAME=`hostname` -HOSTNAME=`sonic-cfggen -d -v DEVICE_METADATA[\'localhost\'][\'hostname\']` +CURRENT_HOSTNAME=$(hostname) +HOSTNAME=$(sonic-db-cli CONFIG_DB HGET 'DEVICE_METADATA|localhost' hostname) if [ -z "$HOSTNAME" ] ; then echo "Missing hostname in the config file, setting to default 'sonic'" diff --git a/files/image_config/logrotate/rsyslog.j2 b/files/image_config/logrotate/rsyslog.j2 index 4c40da24d256..b0a7ff7e7002 100644 --- a/files/image_config/logrotate/rsyslog.j2 +++ b/files/image_config/logrotate/rsyslog.j2 @@ -19,7 +19,9 @@ delaycompress sharedscripts postrotate - /bin/kill -HUP $(cat /var/run/rsyslogd.pid) + if [ -f /var/run/rsyslogd.pid ]; then + /bin/kill -HUP $(cat /var/run/rsyslogd.pid) + fi endscript } @@ -116,7 +118,9 @@ pgrep -x orchagent | xargs /bin/kill -HUP 2>/dev/null || true fi else - /bin/kill -HUP $(cat /var/run/rsyslogd.pid) + if [ -f /var/run/rsyslogd.pid ]; then + /bin/kill -HUP $(cat /var/run/rsyslogd.pid) + fi fi endscript } diff --git a/files/image_config/monit/arp_update_checker b/files/image_config/monit/arp_update_checker new file mode 100644 index 000000000000..9869bf057a8b --- /dev/null +++ b/files/image_config/monit/arp_update_checker @@ -0,0 +1,83 @@ +#!/usr/bin/env python3 + +""" +arp_update_checker + +This script is intended to be run by Monit. It will write an alerting message into +syslog if it finds arp_update script stuck on ping command. +Then it will attempt to restart arp_update script. + +The following is an example in Monit configuration file to show how Monit will run +this script: + +check program arp_update_checker with path "/usr/bin/arp_update_checker" every 10 cycles + if status != 0 for 3 times within 3 cycles then alert repeat every 1 cycles +""" + +import syslog +import subprocess +import sys + +TIMEOUT=5.0 + +def log_info(message): + syslog.syslog(syslog.LOG_INFO, message) + +def log_warning(message): + syslog.syslog(syslog.LOG_WARNING, message) + +def log_error(message): + syslog.syslog(syslog.LOG_ERR, message) + +def is_process_running(process_name): + """Check if there is any running process that contains the given name.""" + try: + # Use pgrep to check if the process is running + output = subprocess.check_output(["pgrep", "-f", process_name]) + return bool(output.strip()) + except subprocess.CalledProcessError: + return False + +def is_arp_update_stuck(timeout=TIMEOUT): + """Check if arp_update is stuck by looking for a ping command running longer than the specified timeout. (Default 1sec)""" + try: + arp_update_pid = subprocess.check_output(["pgrep", "-x", "arp_update"]).strip().decode('utf-8') + child_pids = subprocess.check_output(["pgrep", "-P", arp_update_pid]).strip().decode('utf-8').split() + for pid in child_pids: + (cmd, elapsed_time)=subprocess.check_output(["ps", "-p", "1550527", "-o", "comm=,etimes="]).strip().decode('utf-8').split() + + if "ping" in cmd: + # Check if the elapsed time is greater than the timeout + if elapsed_time > timeout: + return True + return False + except subprocess.CalledProcessError: + return False + +def restart_arp_update(): + """Restart the arp_update process.""" + try: + log_info("patching arp_update...") + sed_regex="s/ping6cmd=\"ping6/ping6cmd=\"timeout 0.2 ping6/" + subprocess.check_call(["docker", "exec", "swss", "sed", "-i", "-s", sed_regex, "/usr/bin/arp_update"]) + # restart arp_update to make sure changes are in effect + subprocess.check_call(["docker", "exec", "swss", "supervisorctl", "restart", "arp_update"]) + log_info("arp_update process restarted successfully.") + except subprocess.CalledProcessError as e: + log_error(f"Failed to restart arp_update process: {e}") + sys.exit(1) + +def main(): + """ + This function will check if arp_update script is stuck and restart the script if needed. + """ + if is_process_running("arp_update"): + if is_arp_update_stuck(): + log_warning("arp_update process is stuck. Restarting...") + restart_arp_update() + sys.exit(1) + else: + log_warning("arp_update process is not running.") + +if __name__ == "__main__": + main() \ No newline at end of file diff --git a/files/image_config/monit/conf.d/sonic-host b/files/image_config/monit/conf.d/sonic-host index 482a992b6df7..e71c082e9061 100644 --- a/files/image_config/monit/conf.d/sonic-host +++ b/files/image_config/monit/conf.d/sonic-host @@ -56,3 +56,7 @@ check program vnetRouteCheck with path "/usr/local/bin/vnet_route_check.py" # memory_check tool that verifies that memory usage does not cross the threshold or invokes techsupport. check program memory_check with path "/usr/local/bin/memory_threshold_check.py" if status == 2 for 10 times within 20 cycles then exec "/usr/local/bin/memory_threshold_check_handler.py" + +# arp_update_checker tool that verifies that arp_update script is not stuck on ping command every 10 minutes +check program arp_update_checker with path "/usr/bin/arp_update_checker" every 10 cycles + if status != 0 for 3 times within 3 cycles then alert repeat every 1 cycles diff --git a/files/image_config/monit/container_checker b/files/image_config/monit/container_checker index f4e4995060c8..58f5aa75cf94 100755 --- a/files/image_config/monit/container_checker +++ b/files/image_config/monit/container_checker @@ -109,8 +109,15 @@ def get_expected_running_containers(): else: always_running_containers.add(container_name) - if device_info.is_supervisor(): + if device_info.is_supervisor() or device_info.is_smartswitch(): always_running_containers.add("database-chassis") + + if device_info.is_smartswitch(): + raw_dpustable = config_db.get_table("DPUS") + for dpu_name in raw_dpustable: + container_name = f"databasedpu{dpu_name.replace('dpu', '')}" + always_running_containers.add(container_name) + return expected_running_containers, always_running_containers def get_current_running_from_DB(always_running_containers): diff --git a/files/image_config/monit/memory_checker b/files/image_config/monit/memory_checker index e5bfe4e3864e..6ea00cbc5e35 100755 --- a/files/image_config/monit/memory_checker +++ b/files/image_config/monit/memory_checker @@ -20,6 +20,7 @@ check program container_memory_ with path "/usr/bin/memory_check """ import argparse +import os import subprocess import sys import syslog @@ -33,6 +34,29 @@ from swsscommon import swsscommon EVENTS_PUBLISHER_SOURCE = "sonic-events-host" EVENTS_PUBLISHER_TAG = "mem-threshold-exceeded" +CGROUP_DOCKER_MEMORY_DIR = "/sys/fs/cgroup/memory/docker/" + +# Define common error codes +ERROR_CONTAINER_ID_NOT_FOUND = "[memory_checker] Failed to get container ID of '{}'! Exiting ..." +ERROR_CGROUP_MEMORY_USAGE_NOT_FOUND = "[memory_checker] cgroup memory usage file '{}' of container '{}' does not exist on device! Exiting ..." +ERROR_CONTAINER_MEMORY_USAGE_NOT_FOUND = "[memory_checker] Failed to get the memory usage of container '{}'! Exiting ..." +ERROR_CONTAINER_CACHE_USAGE_NOT_FOUND = "[memory_checker] Failed to get the cache usage of container '{}'! Exiting ..." +ERROR_CGROUP_MEMORY_STATS_NOT_FOUND = "[memory_checker] cgroup memory statistics file '{}' of container '{}' does not exist on device! Exiting ..." +ERROR_CGROUP_MEMORY_STATS_LINE_FORMAT = "[memory_checker] cgroup memory statistics file '{}' of container '{}' has invalid line format! Exiting ..." + +# Define common exit codes +CONTAINER_NOT_RUNNING = 0 +INTERNAL_ERROR = 1 +INVALID_VALUE = 2 +EXCEED_THRESHOLD = 3 + +def validate_container_id(container_id): + pattern = r'^[a-zA-Z0-9]+$' + + if not re.match(pattern, container_id): + syslog.syslog(syslog.LOG_ERR, "Invalid container_id: {}".format(container_id)) + sys.exit(INTERNAL_ERROR) + def get_command_result(command): """Executes the command and return the resulting output. @@ -50,15 +74,99 @@ def get_command_result(command): command_stdout, command_stderr = proc_instance.communicate() if proc_instance.returncode != 0: syslog.syslog(syslog.LOG_ERR, "[memory_checker] Failed to execute the command '{}'. Return code: '{}'" - .format(command, proc_instance.returncode)) - sys.exit(1) + .format(' '.join(command), proc_instance.returncode)) + sys.exit(INTERNAL_ERROR) except (OSError, ValueError) as err: syslog.syslog(syslog.LOG_ERR, "[memory_checker] Failed to execute the command '{}'. Error: '{}'" - .format(command, err)) - sys.exit(2) + .format(' '.join(command), err)) + sys.exit(INTERNAL_ERROR) return command_stdout.strip() +def get_container_id(container_name): + """Gets full container ID of the specified container + Args: + container_name: A string indicates the name of specified container. + Returns: + container_id: A string indicates the full ID of specified container. + """ + container_id = "" + + get_container_info_cmd = ["docker", "ps", "--no-trunc", "--filter", "name={}".format(container_name)] + + command_stdout = get_command_result(get_container_info_cmd) + + for line in command_stdout.splitlines(): + if container_name in line: + container_id = line.split()[0].strip() + break + + if not container_id: + syslog.syslog(syslog.LOG_ERR, ERROR_CONTAINER_ID_NOT_FOUND.format(container_name)) + + sys.exit(INTERNAL_ERROR) + + return container_id + +def get_memory_usage(container_id): + """Reads the container's memory usage from the control group subsystem's file + '/sys/fs/cgroup/memory/docker//memory.usage_in_bytes'. + Args: + container_id: A string indicates the full ID of a container. + Returns: + memory_usage_in_bytes: A string indicates memory usage (Bytes) of a container. + """ + memory_usage_in_bytes = "" + + validate_container_id(container_id) + + docker_memory_usage_file_path = CGROUP_DOCKER_MEMORY_DIR + container_id + "/memory.usage_in_bytes" + if not os.path.exists(docker_memory_usage_file_path): + syslog.syslog(syslog.LOG_ERR, ERROR_CGROUP_MEMORY_USAGE_NOT_FOUND.format(docker_memory_usage_file_path, container_id)) + sys.exit(INTERNAL_ERROR) + + try: + with open(docker_memory_usage_file_path, 'r') as file: + memory_usage_in_bytes = file.read().strip() + except IOError as err: + syslog.syslog(syslog.LOG_ERR, ERROR_CONTAINER_MEMORY_USAGE_NOT_FOUND.format(container_id)) + sys.exit(INTERNAL_ERROR) + + return memory_usage_in_bytes + +def get_inactive_cache_usage(container_id): + """Reads the container's cache usage from the field 'total_inactive_file' in control + group subsystem's file '/sys/fs/cgroup/memory/docker//memory.stat'. + Args: + container_id: A string indicates the full ID of a container. + Returns: + cache_usage_in_bytes: A string indicates the cache usage (Bytes) of a container. + """ + cache_usage_in_bytes = "" + + validate_container_id(container_id) + + docker_memory_stat_file_path = CGROUP_DOCKER_MEMORY_DIR + container_id + "/memory.stat" + if not os.path.exists(docker_memory_stat_file_path): + syslog.syslog(syslog.LOG_ERR, ERROR_CGROUP_MEMORY_STATS_NOT_FOUND.format(docker_memory_stat_file_path, container_id)) + sys.exit(INTERNAL_ERROR) + + try: + with open(docker_memory_stat_file_path, 'r') as file: + for line in file: + if "total_inactive_file" in line: + split_line = line.split() + if len(split_line) >= 2: + cache_usage_in_bytes = split_line[1].strip() + else: + syslog.syslog(syslog.LOG_ERR, ERROR_CGROUP_MEMORY_STATS_LINE_FORMAT.format(docker_memory_stat_file_path, container_id)) + sys.exit(INTERNAL_ERROR) + break + except IOError as err: + syslog.syslog(syslog.LOG_ERR, ERROR_CONTAINER_CACHE_USAGE_NOT_FOUND.format(container_id)) + sys.exit(INTERNAL_ERROR) + + return cache_usage_in_bytes def publish_events(container_name, mem_usage_bytes, threshold_value): events_handle = swsscommon.events_init_publisher(EVENTS_PUBLISHER_SOURCE) @@ -71,8 +179,8 @@ def publish_events(container_name, mem_usage_bytes, threshold_value): def check_memory_usage(container_name, threshold_value): - """Checks the memory usage of a container and writes an alerting messages into - the syslog if the memory usage is larger than the threshold value. + """Checks the memory usage of a container from its cgroup subsystem and writes an alerting + messages into the syslog if the memory usage is larger than the threshold value. Args: container_name: A string represtents name of a container @@ -81,37 +189,38 @@ def check_memory_usage(container_name, threshold_value): Returns: None. """ - command = ["docker", "stats", "--no-stream", "--format", "{{.MemUsage}}", container_name] - command_stdout = get_command_result(command) - mem_usage = command_stdout.split("/")[0].strip() - match_obj = re.match(r"\d+\.?\d*", mem_usage) - if match_obj: - mem_usage_value = float(mem_usage[match_obj.start():match_obj.end()]) - mem_usage_unit = mem_usage[match_obj.end():] - - mem_usage_bytes = 0.0 - if mem_usage_unit == "B": - mem_usage_bytes = mem_usage_value - elif mem_usage_unit == "KiB": - mem_usage_bytes = mem_usage_value * 1024 - elif mem_usage_unit == "MiB": - mem_usage_bytes = mem_usage_value * 1024 ** 2 - elif mem_usage_unit == "GiB": - mem_usage_bytes = mem_usage_value * 1024 ** 3 - - if mem_usage_bytes > threshold_value: - print("[{}]: Memory usage ({} Bytes) is larger than the threshold ({} Bytes)!" - .format(container_name, mem_usage_bytes, threshold_value)) - syslog.syslog(syslog.LOG_INFO, "[{}]: Memory usage ({} Bytes) is larger than the threshold ({} Bytes)!" - .format(container_name, mem_usage_bytes, threshold_value)) - # publish event - publish_events(container_name, "{:.2f}".format(mem_usage_bytes), str(threshold_value)) - sys.exit(3) - else: - syslog.syslog(syslog.LOG_ERR, "[memory_checker] Failed to retrieve memory value from '{}'" - .format(mem_usage)) - sys.exit(4) + if not isinstance(threshold_value, int) or threshold_value <= 0: + syslog.syslog(syslog.LOG_ERR, "[memory_checker] Invalid threshold value! Threshold value should be a positive integer.") + sys.exit(INVALID_VALUE) + container_id = get_container_id(container_name) + syslog.syslog(syslog.LOG_INFO, "[memory_checker] Container ID of '{}' is: '{}'." + .format(container_name, container_id)) + + memory_usage_in_bytes = get_memory_usage(container_id) + syslog.syslog(syslog.LOG_INFO, "[memory_checker] The memory usage of container '{}' is '{}' Bytes!" + .format(container_name, memory_usage_in_bytes)) + + cache_usage_in_bytes = get_inactive_cache_usage(container_id) + syslog.syslog(syslog.LOG_INFO, "[memory_checker] The cache usage of container '{}' is '{}' Bytes!" + .format(container_name, cache_usage_in_bytes)) + + try: + memory_usage = int(memory_usage_in_bytes) + cache_usage = int(cache_usage_in_bytes) + except ValueError as err: + syslog.syslog(syslog.LOG_ERR, "[memory_checker] Failed to convert the memory or cache usage in string to integer! Exiting ...") + sys.exit(INVALID_VALUE) + + total_memory_usage = memory_usage - cache_usage + syslog.syslog(syslog.LOG_INFO, "[memory_checker] Total memory usage of container '{}' is '{}' Bytes!" + .format(container_name, total_memory_usage)) + + if total_memory_usage > threshold_value: + print("[{}]: Memory usage ({} Bytes) is larger than the threshold ({} Bytes)!" + .format(container_name, total_memory_usage, threshold_value)) + publish_events(container_name, "{:.2f}".format(total_memory_usage), str(threshold_value)) + sys.exit(EXCEED_THRESHOLD) def is_service_active(service_name): """Test if service is running. @@ -148,7 +257,7 @@ def get_running_container_names(): syslog.syslog(syslog.LOG_ERR, "Failed to retrieve the running container list from docker daemon! Error message is: '{}'" .format(err)) - sys.exit(5) + sys.exit(INTERNAL_ERROR) return running_container_names @@ -167,7 +276,7 @@ def main(): syslog.syslog(syslog.LOG_INFO, "[memory_checker] Exits without checking memory usage of container '{}' since docker daemon is not running!" .format(args.container_name)) - sys.exit(0) + sys.exit(CONTAINER_NOT_RUNNING) running_container_names = get_running_container_names() if args.container_name in running_container_names: diff --git a/files/image_config/monit/tests/__init__.py b/files/image_config/monit/tests/__init__.py new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/files/image_config/monit/tests/test_memory_checker.py b/files/image_config/monit/tests/test_memory_checker.py new file mode 100644 index 000000000000..d856fa33523d --- /dev/null +++ b/files/image_config/monit/tests/test_memory_checker.py @@ -0,0 +1,81 @@ +import unittest +from unittest.mock import patch, MagicMock +import sys +import subprocess + +import memory_checker + + +class TestMemoryChecker(unittest.TestCase): + + @patch('subprocess.Popen') + def test_get_command_result(self, mock_popen): + command = 'your command' + stdout = 'Command output' + returncode = 0 + mock_popen.return_value.communicate.return_value = (stdout, None) + mock_popen.return_value.returncode = returncode + + result = memory_checker.get_command_result(command) + + self.assertEqual(result, stdout.strip()) + mock_popen.assert_called_once_with(command, stdout=subprocess.PIPE, stderr=subprocess.PIPE, + universal_newlines=True) + mock_popen.return_value.communicate.assert_called_once() + mock_popen.return_value.communicate.assert_called_with() + self.assertEqual(mock_popen.return_value.returncode, returncode) + + @patch('memory_checker.get_command_result') + def test_get_container_id(self, mock_get_command_result): + container_name = 'your_container' + command = ['docker', 'ps', '--no-trunc', '--filter', 'name=your_container'] + mock_get_command_result.return_value = '' + + with self.assertRaises(SystemExit) as cm: + memory_checker.get_container_id(container_name) + self.assertEqual(cm.exception.code, 1) + mock_get_command_result.assert_called_once_with(command) + + @patch('memory_checker.open', side_effect=FileNotFoundError) + def test_get_memory_usage(self, mock_open): + container_id = 'your_container_id' + with self.assertRaises(SystemExit) as cm: + memory_checker.get_memory_usage(container_id) + self.assertEqual(cm.exception.code, 1) + + @patch('memory_checker.open', side_effect=FileNotFoundError) + def test_get_memory_usage_invalid(self, mock_open): + container_id = '../..' + with self.assertRaises(SystemExit) as cm: + memory_checker.get_memory_usage(container_id) + self.assertEqual(cm.exception.code, 1) + + @patch('builtins.open', side_effect=FileNotFoundError) + def test_get_inactive_cache_usage(self, mock_open): + container_id = 'your_container_id' + with self.assertRaises(SystemExit) as cm: + memory_checker.get_inactive_cache_usage(container_id) + self.assertEqual(cm.exception.code, 1) + + @patch('syslog.syslog') + @patch('memory_checker.get_container_id') + @patch('memory_checker.get_memory_usage') + @patch('memory_checker.get_inactive_cache_usage') + def test_check_memory_usage(self, mock_get_inactive_cache_usage, mock_get_memory_usage, mock_get_container_id, mock_syslog): + container_name = 'your_container' + threshold_value = 1024 + container_id = 'your_container' + memory_usage = 2048 + cache_usage = 512 + mock_get_container_id.return_value = container_id + mock_get_memory_usage.return_value = str(memory_usage) + mock_get_inactive_cache_usage.return_value = str(cache_usage) + + with self.assertRaises(SystemExit) as cm: + memory_checker.check_memory_usage(container_name, threshold_value) + + self.assertEqual(cm.exception.code, 3) + mock_get_memory_usage.assert_called_once_with(container_name) + +if __name__ == '__main__': + unittest.main() diff --git a/files/image_config/ntp/ntp.conf.j2 b/files/image_config/ntp/ntp.conf.j2 index e50822a67a9d..a3b0f0909728 100644 --- a/files/image_config/ntp/ntp.conf.j2 +++ b/files/image_config/ntp/ntp.conf.j2 @@ -18,6 +18,7 @@ leapfile /usr/share/zoneinfo/leap-seconds.list {# Adding NTP servers. We need to know if we have some pools, to set proper config -#} {% set ns = namespace(is_pools=false) %} +{% set ip_ver_ns = namespace(ipv4_server=false, ipv6_server=false) %} {% for server in NTP_SERVER if NTP_SERVER[server].admin_state != 'disabled' -%} {% set config = NTP_SERVER[server] -%} {# Server options -#} @@ -56,6 +57,13 @@ config -#} restrict {{ resolve_as }} kod limited nomodify noquery {% endif %} +{% if resolve_as | ipv4 -%} + {% set ip_ver_ns.ipv4_server = true %} +{% elif resolve_as | ipv6 %} + {% set ip_ver_ns.ipv6_server = true %} +{% endif -%} + + {% endfor -%} {% set trusted_keys_arr = [] -%} @@ -102,7 +110,7 @@ interface ignore wildcard {%- set ns.source_intf = global.src_intf %} {%- if ns.source_intf != "" %} {%- if ns.source_intf == "eth0" %} - {%- set ns.source_intf_ip = 'true' %} + {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, MGMT_INTERFACE) %} {%- elif ns.source_intf.startswith('Vlan') %} {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, VLAN_INTERFACE) %} {%- elif ns.source_intf.startswith('Ethernet') %} @@ -125,9 +133,11 @@ interface listen {{ mgmt_prefix | ip }} {% endfor %} {% elif LOOPBACK_INTERFACE %} {% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %} -{% if prefix | ipv4 and name == 'Loopback0' %} +{% if name == 'Loopback0' %} +{% if prefix | ipv4 and ip_ver_ns.ipv4_server or prefix | ipv6 and ip_ver_ns.ipv6_server %} interface listen {{ prefix | ip }} {% endif %} +{% endif %} {% endfor %} {% else %} interface listen eth0 diff --git a/files/image_config/pcie-check/pcie-check.sh b/files/image_config/pcie-check/pcie-check.sh index 3d4184c8684c..d8558da82701 100755 --- a/files/image_config/pcie-check/pcie-check.sh +++ b/files/image_config/pcie-check/pcie-check.sh @@ -18,7 +18,7 @@ function debug() function check_and_rescan_pcie_devices() { PCIE_CHK_CMD='sudo pcieutil check | grep "$RESULTS"' - PLATFORM=$(sonic-cfggen -H -v DEVICE_METADATA.localhost.platform) + PLATFORM=$(sonic-db-cli CONFIG_DB HGET 'DEVICE_METADATA|localhost' platform) if [ ! -f /usr/share/sonic/device/$PLATFORM/pcie*.yaml ]; then debug "pcie.yaml does not exist! Can't check PCIe status!" @@ -38,7 +38,7 @@ function check_and_rescan_pcie_devices() fi if [ "$(eval $PCIE_CHK_CMD)" = "$EXPECTED" ]; then - redis-cli -n 6 HSET $PCIE_STATUS_TABLE "status" "PASSED" + sonic-db-cli STATE_DB HSET $PCIE_STATUS_TABLE "status" "PASSED" debug "PCIe check passed" exit else @@ -54,7 +54,7 @@ function check_and_rescan_pcie_devices() done debug "PCIe check failed" - redis-cli -n 6 HSET $PCIE_STATUS_TABLE "status" "FAILED" + sonic-db-cli STATE_DB HSET $PCIE_STATUS_TABLE "status" "FAILED" } check_and_rescan_pcie_devices diff --git a/files/image_config/rsyslog/rsyslog-config.sh b/files/image_config/rsyslog/rsyslog-config.sh index 5f28708216ed..9c2da9780112 100755 --- a/files/image_config/rsyslog/rsyslog-config.sh +++ b/files/image_config/rsyslog/rsyslog-config.sh @@ -1,6 +1,6 @@ #!/bin/bash -PLATFORM=`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform` +PLATFORM=$(sonic-db-cli CONFIG_DB HGET 'DEVICE_METADATA|localhost' platform) # Parse the device specific asic conf file, if it exists ASIC_CONF=/usr/share/sonic/device/$PLATFORM/asic.conf diff --git a/files/scripts/swss.sh b/files/scripts/swss.sh index e00cc752ea04..35815fe4dfb9 100755 --- a/files/scripts/swss.sh +++ b/files/scripts/swss.sh @@ -328,7 +328,7 @@ start() { $SONIC_DB_CLI GB_ASIC_DB FLUSHDB $SONIC_DB_CLI GB_COUNTERS_DB FLUSHDB $SONIC_DB_CLI RESTAPI_DB FLUSHDB - clean_up_tables STATE_DB "'PORT_TABLE*', 'MGMT_PORT_TABLE*', 'VLAN_TABLE*', 'VLAN_MEMBER_TABLE*', 'LAG_TABLE*', 'LAG_MEMBER_TABLE*', 'INTERFACE_TABLE*', 'MIRROR_SESSION*', 'VRF_TABLE*', 'FDB_TABLE*', 'FG_ROUTE_TABLE*', 'BUFFER_POOL*', 'BUFFER_PROFILE*', 'MUX_CABLE_TABLE*', 'ADVERTISE_NETWORK_TABLE*', 'VXLAN_TUNNEL_TABLE*', 'VNET_ROUTE*', 'MACSEC_PORT_TABLE*', 'MACSEC_INGRESS_SA_TABLE*', 'MACSEC_EGRESS_SA_TABLE*', 'MACSEC_INGRESS_SC_TABLE*', 'MACSEC_EGRESS_SC_TABLE*', 'VRF_OBJECT_TABLE*', 'VNET_MONITOR_TABLE*', 'BFD_SESSION_TABLE*', 'SYSTEM_NEIGH_TABLE*', 'FABRIC_PORT_TABLE*'" + clean_up_tables STATE_DB "'PORT_TABLE*', 'MGMT_PORT_TABLE*', 'VLAN_TABLE*', 'VLAN_MEMBER_TABLE*', 'LAG_TABLE*', 'LAG_MEMBER_TABLE*', 'INTERFACE_TABLE*', 'MIRROR_SESSION*', 'VRF_TABLE*', 'FDB_TABLE*', 'FG_ROUTE_TABLE*', 'BUFFER_POOL*', 'BUFFER_PROFILE*', 'MUX_CABLE_TABLE*', 'ADVERTISE_NETWORK_TABLE*', 'VXLAN_TUNNEL_TABLE*', 'VNET_ROUTE*', 'MACSEC_PORT_TABLE*', 'MACSEC_INGRESS_SA_TABLE*', 'MACSEC_EGRESS_SA_TABLE*', 'MACSEC_INGRESS_SC_TABLE*', 'MACSEC_EGRESS_SC_TABLE*', 'VRF_OBJECT_TABLE*', 'VNET_MONITOR_TABLE*', 'BFD_SESSION_TABLE*', 'SYSTEM_NEIGH_TABLE*', 'FABRIC_PORT_TABLE*', 'TUNNEL_DECAP_TABLE*', 'TUNNEL_DECAP_TERM_TABLE*'" $SONIC_DB_CLI APPL_STATE_DB FLUSHDB clean_up_chassis_db_tables rm -rf /tmp/cache diff --git a/files/scripts/syncd.sh b/files/scripts/syncd.sh index 0930de72b87c..0c794ef5d9dc 100755 --- a/files/scripts/syncd.sh +++ b/files/scripts/syncd.sh @@ -2,18 +2,6 @@ . /usr/local/bin/syncd_common.sh -declare -r UNKN_MST="unknown" - -function GetMstDevice() { - local _MST_DEVICE="$(ls /dev/mst/*_pci_cr0 2>&1)" - - if [[ ! -c "${_MST_DEVICE}" ]]; then - echo "${UNKN_MST}" - else - echo "${_MST_DEVICE}" - fi -} - function startplatform() { # platform specific tasks @@ -36,12 +24,7 @@ function startplatform() { debug "Starting Firmware update procedure" /usr/bin/mst start --with_i2cdev - local -r _MST_DEVICE="$(GetMstDevice)" - if [[ "${_MST_DEVICE}" != "${UNKN_MST}" ]]; then - /usr/bin/flint -d $_MST_DEVICE --clear_semaphore - fi - - /usr/bin/mlnx-fw-upgrade.sh -v + /usr/bin/mlnx-fw-upgrade.sh -c -v if [[ "$?" -ne "${EXIT_SUCCESS}" ]]; then debug "Failed to upgrade fw. " "$?" "Restart syncd" exit 1 diff --git a/installer/default_platform.conf b/installer/default_platform.conf index 85882f001c3a..85aeddb0e1d2 100755 --- a/installer/default_platform.conf +++ b/installer/default_platform.conf @@ -588,13 +588,13 @@ menuentry '$demo_grub_entry' { if [ x$grub_platform = xxen ]; then insmod xzio; insmod lzopio; fi insmod part_msdos insmod ext2 - $GRUB_CFG_LINUX_CMD /$image_dir/boot/vmlinuz-6.1.0-11-2-${arch} root=$grub_cfg_root rw $GRUB_CMDLINE_LINUX \ + $GRUB_CFG_LINUX_CMD /$image_dir/boot/vmlinuz-6.1.0-22-2-${arch} root=$grub_cfg_root rw $GRUB_CMDLINE_LINUX \ net.ifnames=0 biosdevname=0 \ loop=$image_dir/$FILESYSTEM_SQUASHFS loopfstype=squashfs \ systemd.unified_cgroup_hierarchy=0 \ apparmor=1 security=apparmor varlog_size=$VAR_LOG_SIZE usbcore.autosuspend=-1 $ONIE_PLATFORM_EXTRA_CMDLINE_LINUX echo 'Loading $demo_volume_label $demo_type initial ramdisk ...' - $GRUB_CFG_INITRD_CMD /$image_dir/boot/initrd.img-6.1.0-11-2-${arch} + $GRUB_CFG_INITRD_CMD /$image_dir/boot/initrd.img-6.1.0-22-2-${arch} } EOF diff --git a/platform/barefoot/bfn-modules/debian/control b/platform/barefoot/bfn-modules/debian/control index c6fd3ef472a3..1d7a74bde597 100644 --- a/platform/barefoot/bfn-modules/debian/control +++ b/platform/barefoot/bfn-modules/debian/control @@ -7,6 +7,6 @@ Standards-Version: 3.9.3 Package: bfn-modules Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for bfn asic for mmap diff --git a/platform/barefoot/sonic-platform-modules-arista b/platform/barefoot/sonic-platform-modules-arista index af03fbd9f672..ed942d617ddd 160000 --- a/platform/barefoot/sonic-platform-modules-arista +++ b/platform/barefoot/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit af03fbd9f67260ba764c833aaaa65b2ff07762d7 +Subproject commit ed942d617ddde8e63b5190ad3a7d8171c1dbde9a diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control index 9aaded6c69de..eff91a7fa334 100644 --- a/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control @@ -7,6 +7,6 @@ Standards-Version: 3.9.3 Package: sonic-platform-modules-bfn-montara Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control index 53866745049b..0bcc98273d6d 100644 --- a/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control @@ -7,11 +7,11 @@ Standards-Version: 3.9.3 Package: sonic-platform-modules-bfn-newport-as9516 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel module for bfn platform fpga and scripts for the devices such as fan, led, sfp Package: sonic-platform-modules-bfn-newport-as9516bf Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel module for bfn platform fpga and scripts for the devices such as fan, led, sfp diff --git a/platform/barefoot/sonic-platform-modules-bfn/debian/control b/platform/barefoot/sonic-platform-modules-bfn/debian/control index 923b096d4908..78a556eead0e 100644 --- a/platform/barefoot/sonic-platform-modules-bfn/debian/control +++ b/platform/barefoot/sonic-platform-modules-bfn/debian/control @@ -7,6 +7,6 @@ Standards-Version: 3.9.3 Package: sonic-platform-modules-bfn Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control index 415d82c5c811..7e60b796ce20 100644 --- a/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control @@ -7,6 +7,6 @@ Standards-Version: 3.9.3 Package: platform-modules-wnc-osw1800 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk index 0b93b3b2b165..38c1a9521388 100755 --- a/platform/broadcom/one-image.mk +++ b/platform/broadcom/one-image.mk @@ -54,7 +54,11 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(CEL_DX010_PLATFORM_MODULE) \ $(CEL_HALIBURTON_PLATFORM_MODULE) \ $(CEL_SEASTONE2_PLATFORM_MODULE) \ - $(CEL_BELGITE_PLATFORM_MODULE) \ + $(CEL_DS3000_PLATFORM_MODULE) \ + $(CEL_DS1000_PLATFORM_MODULE) \ + $(CEL_QUESTONE2_PLATFORM_MODULE) \ + $(CEL_SILVERSTONE_V2_PLATFORM_MODULE) \ + $(CEL_DS2000_PLATFORM_MODULE) \ $(DELTA_AG9032V1_PLATFORM_MODULE) \ $(DELTA_AG9064_PLATFORM_MODULE) \ $(DELTA_AG5648_PLATFORM_MODULE) \ @@ -82,6 +86,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(NOKIA_IXR7250_PLATFORM_MODULE) \ $(NOKIA_IXR7220H3_PLATFORM_MODULE) \ $(NOKIA_IXR7220H4_32D_PLATFORM_MODULE) \ + $(NOKIA_IXR7220H4_64D_PLATFORM_MODULE) \ $(NOKIA_IXR7220H5_64D_PLATFORM_MODULE) \ $(TENCENT_TCS8400_PLATFORM_MODULE) \ $(TENCENT_TCS9400_PLATFORM_MODULE) \ @@ -92,7 +97,8 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(UFISPACE_S9300_32D_PLATFORM_MODULE) \ $(UFISPACE_S9301_32D_PLATFORM_MODULE) \ $(UFISPACE_S9301_32DB_PLATFORM_MODULE) \ - $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE) + $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE) \ + $(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL) ifeq ($(INSTALL_DEBUG_TOOLS),y) diff --git a/platform/broadcom/platform-modules-cel.mk b/platform/broadcom/platform-modules-cel.mk index b25aeb7c0900..2db8560b8bf3 100644 --- a/platform/broadcom/platform-modules-cel.mk +++ b/platform/broadcom/platform-modules-cel.mk @@ -1,16 +1,24 @@ # Celestica DX010 and Haliburton Platform modules -CEL_DX010_PLATFORM_MODULE_VERSION = 0.9 -CEL_HALIBURTON_PLATFORM_MODULE_VERSION = 0.9 -CEL_SEASTONE2_PLATFORM_MODULE_VERSION = 0.9 -CEL_SILVERSTONE_PLATFORM_MODULE_VERSION = 0.9 -CEL_BELGITE_PLATFORM_MODULE_VERSION = 0.9 +CEL_DX010_PLATFORM_MODULE_VERSION = 1.0 +CEL_HALIBURTON_PLATFORM_MODULE_VERSION = 1.0 +CEL_SEASTONE2_PLATFORM_MODULE_VERSION = 1.0 +CEL_SILVERSTONE_PLATFORM_MODULE_VERSION = 1.0 +CEL_DS1000_PLATFORM_MODULE_VERSION = 1.0 +CEL_QUESTONE2_PLATFORM_MODULE_VERSION = 1.0 +CEL_DS3000_PLATFORM_MODULE_VERSION = 1.0 +CEL_SILVERSTONE_V2_PLATFORM_MODULE_VERSION = 1.0 +CEL_DS2000_PLATFORM_MODULE_VERSION = 1.0 export CEL_DX010_PLATFORM_MODULE_VERSION export CEL_HALIBURTON_PLATFORM_MODULE_VERSION export CEL_SEASTONE2_PLATFORM_MODULE_VERSION export CEL_SILVERSTONE_PLATFORM_MODULE_VERSION -export CEL_BELGITE_PLATFORM_MODULE_VERSION +export CEL_DS1000_PLATFORM_MODULE_VERSION +export CEL_QUESTONE2_PLATFORM_MODULE_VERSION +export CEL_DS3000_PLATFORM_MODULE_VERSION +export CEL_SILVERSTONE_V2_PLATFORM_MODULE_VERSION +export CEL_DS2000_PLATFORM_MODULE_VERSION CEL_DX010_PLATFORM_MODULE = platform-modules-dx010_$(CEL_DX010_PLATFORM_MODULE_VERSION)_amd64.deb $(CEL_DX010_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-cel @@ -30,6 +38,22 @@ CEL_SILVERSTONE_PLATFORM_MODULE = platform-modules-silverstone_$(CEL_SILVERSTONE $(CEL_SILVERSTONE_PLATFORM_MODULE)_PLATFORM = x86_64-cel_silverstone-r0 $(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_SILVERSTONE_PLATFORM_MODULE))) -CEL_BELGITE_PLATFORM_MODULE = platform-modules-belgite_$(CEL_BELGITE_PLATFORM_MODULE_VERSION)_amd64.deb -$(CEL_BELGITE_PLATFORM_MODULE)_PLATFORM = x86_64-cel_belgite-r0 -$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_BELGITE_PLATFORM_MODULE))) +CEL_DS1000_PLATFORM_MODULE = platform-modules-ds1000_$(CEL_DS1000_PLATFORM_MODULE_VERSION)_amd64.deb +$(CEL_DS1000_PLATFORM_MODULE)_PLATFORM = x86_64-cel_ds1000-r0 +$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_DS1000_PLATFORM_MODULE))) + +CEL_QUESTONE2_PLATFORM_MODULE = platform-modules-questone2_$(CEL_QUESTONE2_PLATFORM_MODULE_VERSION)_amd64.deb +$(CEL_QUESTONE2_PLATFORM_MODULE)_PLATFORM = x86_64-cel_questone_2-r0 +$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_QUESTONE2_PLATFORM_MODULE))) + +CEL_DS3000_PLATFORM_MODULE = platform-modules-ds3000_$(CEL_DS3000_PLATFORM_MODULE_VERSION)_amd64.deb +$(CEL_DS3000_PLATFORM_MODULE)_PLATFORM = x86_64-cel_ds3000-r0 +$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_DS3000_PLATFORM_MODULE))) + +CEL_SILVERSTONE_V2_PLATFORM_MODULE = platform-modules-silverstone-v2_$(CEL_SILVERSTONE_V2_PLATFORM_MODULE_VERSION)_amd64.deb +$(CEL_SILVERSTONE_V2_PLATFORM_MODULE)_PLATFORM = x86_64-cel_silverstone_v2-r0 +$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_SILVERSTONE_V2_PLATFORM_MODULE))) + +CEL_DS2000_PLATFORM_MODULE = platform-modules-ds2000_$(CEL_DS2000_PLATFORM_MODULE_VERSION)_amd64.deb +$(CEL_DS2000_PLATFORM_MODULE)_PLATFORM = x86_64-cel_ds2000-r0 +$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_DS2000_PLATFORM_MODULE))) diff --git a/platform/broadcom/platform-modules-micas.mk b/platform/broadcom/platform-modules-micas.mk index 7f2a95cade55..5b7fd2cdcb07 100644 --- a/platform/broadcom/platform-modules-micas.mk +++ b/platform/broadcom/platform-modules-micas.mk @@ -8,3 +8,11 @@ $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEAD $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6510-48v8c-r0 SONIC_DPKG_DEBS += $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE) SONIC_STRETCH_DEBS += $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE) + +## M2-W6510-48GT4V +MICAS_M2_W6510_48GT4V_PLATFORM_MODULE_VERSION = 1.0 +export MICAS_M2_W6510_48GT4V_PLATFORM_MODULE_VERSION + +MICAS_M2_W6510_48GT4V_PLATFORM_MODULE = platform-modules-micas-m2-w6510-48gt4v_$(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE_VERSION)_amd64.deb +$(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6510-48gt4v-r0 +$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE))) diff --git a/platform/broadcom/platform-modules-nokia.mk b/platform/broadcom/platform-modules-nokia.mk index 10c556917c8d..b671de058441 100644 --- a/platform/broadcom/platform-modules-nokia.mk +++ b/platform/broadcom/platform-modules-nokia.mk @@ -3,11 +3,13 @@ NOKIA_IXR7250_PLATFORM_MODULE_VERSION = 1.0 NOKIA_IXR7220H3_PLATFORM_MODULE_VERSION = 1.0 NOKIA_IXR7220H4_32D_PLATFORM_MODULE_VERSION = 1.0 +NOKIA_IXR7220H4_64D_PLATFORM_MODULE_VERSION = 1.0 NOKIA_IXR7220H5_64D_PLATFORM_MODULE_VERSION = 1.0 export NOKIA_IXR7250_PLATFORM_MODULE_VERSION export NOKIA_IXR7220H3_PLATFORM_MODULE_VERSION export NOKIA_IXR7220H4_32D_PLATFORM_MODULE_VERSION +export NOKIA_IXR7220H4_64D_PLATFORM_MODULE_VERSION export NOKIA_IXR7220H5_64D_PLATFORM_MODULE_VERSION NOKIA_IXR7250_PLATFORM_MODULE = sonic-platform-nokia-chassis_$(NOKIA_IXR7250_PLATFORM_MODULE_VERSION)_amd64.deb @@ -27,6 +29,11 @@ $(NOKIA_IXR7220H4_32D_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADE $(NOKIA_IXR7220H4_32D_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_h4_32d-r0 $(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7220H4_32D_PLATFORM_MODULE))) +NOKIA_IXR7220H4_64D_PLATFORM_MODULE = sonic-platform-nokia-ixr7220h4-64d_$(NOKIA_IXR7220H4_64D_PLATFORM_MODULE_VERSION)_amd64.deb +$(NOKIA_IXR7220H4_64D_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(NOKIA_IXR7220H4_64D_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_h4-r0 +$(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7220H4_64D_PLATFORM_MODULE))) + NOKIA_IXR7220H5_64D_PLATFORM_MODULE = sonic-platform-nokia-ixr7220h5-64d_$(NOKIA_IXR7220H5_64D_PLATFORM_MODULE_VERSION)_amd64.deb $(NOKIA_IXR7220H5_64D_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) $(NOKIA_IXR7220H5_64D_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_h5_64d-r0 diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk index dd0c05ed48c6..05ca22e7319d 100644 --- a/platform/broadcom/sai-modules.mk +++ b/platform/broadcom/sai-modules.mk @@ -1,6 +1,6 @@ # Broadcom SAI modules -BRCM_OPENNSL_KERNEL_VERSION = 8.4.0.2 +BRCM_OPENNSL_KERNEL_VERSION = 11.2.4.1 BRCM_OPENNSL_KERNEL = opennsl-modules_$(BRCM_OPENNSL_KERNEL_VERSION)_amd64.deb $(BRCM_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules @@ -10,7 +10,7 @@ $(BRCM_OPENNSL_KERNEL)_MACHINE = broadcom SONIC_DPKG_DEBS += $(BRCM_OPENNSL_KERNEL) # SAI bcm modules for DNX family ASIC -BRCM_DNX_OPENNSL_KERNEL_VERSION = 11.2.4.1 +BRCM_DNX_OPENNSL_KERNEL_VERSION = 11.2.9.1 BRCM_DNX_OPENNSL_KERNEL = opennsl-modules-dnx_$(BRCM_DNX_OPENNSL_KERNEL_VERSION)_amd64.deb $(BRCM_DNX_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules-dnx diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk index bae4bf67ded3..632a8c222c43 100644 --- a/platform/broadcom/sai.mk +++ b/platform/broadcom/sai.mk @@ -1,6 +1,6 @@ -LIBSAIBCM_XGS_VERSION = 10.1.37.0 -LIBSAIBCM_DNX_VERSION = 11.2.4.1 -LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA +LIBSAIBCM_XGS_VERSION = 11.2.4.1 +LIBSAIBCM_DNX_VERSION = 11.2.9.1 +LIBSAIBCM_XGS_BRANCH_NAME = SAI_11.2.0_GA LIBSAIBCM_DNX_BRANCH_NAME = SAI_11.2.0_GA LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs" LIBSAIBCM_DNX_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx" diff --git a/platform/broadcom/saibcm-modules-dnx b/platform/broadcom/saibcm-modules-dnx index 6d2b735f5c6b..3a1e939bc2b7 160000 --- a/platform/broadcom/saibcm-modules-dnx +++ b/platform/broadcom/saibcm-modules-dnx @@ -1 +1 @@ -Subproject commit 6d2b735f5c6b66867e01b423f3343ca4119c83b2 +Subproject commit 3a1e939bc2b7169953ebd89f2494341a34ed78f7 diff --git a/platform/broadcom/saibcm-modules/GFILE b/platform/broadcom/saibcm-modules/GFILE new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/platform/broadcom/saibcm-modules/GFILES b/platform/broadcom/saibcm-modules/GFILES new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/platform/broadcom/saibcm-modules/GLOG b/platform/broadcom/saibcm-modules/GLOG new file mode 100644 index 000000000000..86ed8bca39ad --- /dev/null +++ b/platform/broadcom/saibcm-modules/GLOG @@ -0,0 +1,2 @@ +CMD = [/projects/csg_sonic2/sk411346/repos/SAI/6.5.29/ocp_sai/sdk-src/hsdk-6.5.29/xgs-sdk-6.5.29-gpl-modules/, gtags --single-update systems/linux/kernel/modules/bcm-knet/bcm-knet.c] +CMD = [/projects/csg_sonic2/sk411346/repos/SAI/6.5.29/ocp_sai/sdk-src/hsdk-6.5.29/xgs-sdk-6.5.29-gpl-modules/, gtags --single-update systems/linux/kernel/modules/knet-cb/knet-cb.c] diff --git a/platform/broadcom/saibcm-modules/GPATH b/platform/broadcom/saibcm-modules/GPATH new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/platform/broadcom/saibcm-modules/GRTAGS b/platform/broadcom/saibcm-modules/GRTAGS new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/platform/broadcom/saibcm-modules/GTAGS b/platform/broadcom/saibcm-modules/GTAGS new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/platform/broadcom/saibcm-modules/debian/changelog b/platform/broadcom/saibcm-modules/debian/changelog index 9233f775a806..dd635964bc71 100644 --- a/platform/broadcom/saibcm-modules/debian/changelog +++ b/platform/broadcom/saibcm-modules/debian/changelog @@ -1,3 +1,15 @@ +opennsl (11.2.4.1) unstable; urgency=medium + + * Update to Broadcom SAI 11.2.4.1 + + -- Ziting Guo Mon, 2 Sep 2024 02:53:09 +0000 + +opennsl (10.1.0.0) unstable; urgency=medium + + * Update to Broadcom SAI 10.1.0.0 + + -- Ziting Guo Mon Jun 17 05:18:47 2024 +0000 + opennsl (8.4.0.2) unstable; urgency=medium * Update to Broadcom SAI 8.4.0.2 diff --git a/platform/broadcom/saibcm-modules/debian/control b/platform/broadcom/saibcm-modules/debian/control index ccef115a39ff..09648fd9ad87 100644 --- a/platform/broadcom/saibcm-modules/debian/control +++ b/platform/broadcom/saibcm-modules/debian/control @@ -10,5 +10,5 @@ Standards-Version: 3.9.3 Package: opennsl-modules Architecture: amd64 Section: main -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for broadcom SAI diff --git a/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs b/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs index 58fb6cdd4ba5..1fc81d870427 100644 --- a/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs +++ b/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs @@ -1 +1 @@ -lib/modules/6.1.0-11-2-amd64/extra +lib/modules/6.1.0-22-2-amd64/extra diff --git a/platform/broadcom/saibcm-modules/debian/opennsl-modules.install b/platform/broadcom/saibcm-modules/debian/opennsl-modules.install index b43f23360aa0..999195fda780 100644 --- a/platform/broadcom/saibcm-modules/debian/opennsl-modules.install +++ b/platform/broadcom/saibcm-modules/debian/opennsl-modules.install @@ -1,8 +1,8 @@ -systems/linux/user/x86-smp_generic_64-2_6/linux-bcm-knet.ko lib/modules/6.1.0-11-2-amd64/extra -systems/linux/user/x86-smp_generic_64-2_6/linux-kernel-bde.ko lib/modules/6.1.0-11-2-amd64/extra -systems/linux/user/x86-smp_generic_64-2_6/linux-user-bde.ko lib/modules/6.1.0-11-2-amd64/extra -systems/linux/user/x86-smp_generic_64-2_6/linux-knet-cb.ko lib/modules/6.1.0-11-2-amd64/extra +systems/linux/user/x86-smp_generic_64-2_6/linux-bcm-knet.ko lib/modules/6.1.0-22-2-amd64/extra +systems/linux/user/x86-smp_generic_64-2_6/linux-kernel-bde.ko lib/modules/6.1.0-22-2-amd64/extra +systems/linux/user/x86-smp_generic_64-2_6/linux-user-bde.ko lib/modules/6.1.0-22-2-amd64/extra +systems/linux/user/x86-smp_generic_64-2_6/linux-knet-cb.ko lib/modules/6.1.0-22-2-amd64/extra systemd/opennsl-modules.service lib/systemd/system -sdklt/build/bde/linux_ngbde.ko lib/modules/6.1.0-11-2-amd64/extra -sdklt/build/knet/linux_ngknet.ko lib/modules/6.1.0-11-2-amd64/extra -sdklt/build/knetcb/linux_ngknetcb.ko lib/modules/6.1.0-11-2-amd64/extra +sdklt/build/bde/linux_ngbde.ko lib/modules/6.1.0-22-2-amd64/extra +sdklt/build/knet/linux_ngknet.ko lib/modules/6.1.0-22-2-amd64/extra +sdklt/build/knetcb/linux_ngknetcb.ko lib/modules/6.1.0-22-2-amd64/extra diff --git a/platform/broadcom/saibcm-modules/debian/rules b/platform/broadcom/saibcm-modules/debian/rules index 052dcdca968b..2c81ab6d0616 100755 --- a/platform/broadcom/saibcm-modules/debian/rules +++ b/platform/broadcom/saibcm-modules/debian/rules @@ -34,8 +34,8 @@ sname:=opennsl PACKAGE=opennsl-modules # modifieable for experiments or debugging m-a MA_DIR ?= /usr/share/modass -KVERSION ?= 6.1.0-11-2-amd64 -KERNVERSION ?= 6.1.0-11-2 +KVERSION ?= 6.1.0-22-2-amd64 +KERNVERSION ?= 6.1.0-22-2 # load generic variable handling -include $(MA_DIR)/include/generic.make diff --git a/platform/broadcom/saibcm-modules/include/ibde.h b/platform/broadcom/saibcm-modules/include/ibde.h index 12f507ea6fd2..c28db2a76ad6 100644 --- a/platform/broadcom/saibcm-modules/include/ibde.h +++ b/platform/broadcom/saibcm-modules/include/ibde.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: ibde.h,v 1.27 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: ibde.h,v 1.27 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * */ #ifndef __IBDE_H__ diff --git a/platform/broadcom/saibcm-modules/include/kcom.h b/platform/broadcom/saibcm-modules/include/kcom.h index 341ddd0f70d2..6a20600469e5 100644 --- a/platform/broadcom/saibcm-modules/include/kcom.h +++ b/platform/broadcom/saibcm-modules/include/kcom.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: kcom.h,v 1.9 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: kcom.h,v 1.9 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * * * File: kcom.h * Purpose: User/Kernel message definitions @@ -74,7 +72,7 @@ #define KCOM_M_CLOCK_CMD 52 /* Clock Commands */ #define KCOM_M_PCIE_LINK_STATUS 53 /* PCIe link status */ -#define KCOM_VERSION 13 /* Protocol version */ +#define KCOM_VERSION 16 /* Protocol version */ /* * Message status codes @@ -137,18 +135,17 @@ typedef struct kcom_msg_hdr_s { /* * Max size of Sand System Headers - * For DNX, Module Header(20B) + PTCH(2B) + ITMH(5B) + * For DNX, Module Header(16B) + PTCH(2B/3B) + ITMH(5B) * For DPP, PTCH(2B) + ITMH(4B) */ -#define KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX 27 +#define KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX 64 typedef struct kcom_netif_s { uint16 id; uint8 type; uint8 flags; uint32 cb_user_data; - uint8 port; - uint8 reserved; + uint16 port; uint16 vlan; uint16 qnum; uint8 macaddr[6]; @@ -357,6 +354,7 @@ typedef struct kcom_msg_version_s { uint32 version; uint32 netif_max; uint32 filter_max; + uint32 module_reload; } kcom_msg_version_t; /* @@ -423,20 +421,6 @@ typedef struct kcom_msg_hw_init_s { uint8 pkt_hdr_size; uint32 dma_hi; uint32 cdma_channels; - /* - * Information to parse Dune system headers - */ - uint32 ftmh_lb_key_ext_size; - uint32 ftmh_stacking_ext_size; - uint32 pph_base_size; - uint32 pph_lif_ext_size[8]; - uint32 udh_length_type[4]; - uint32 udh_size; - uint32 oamp_punted; - uint8 no_skip_udh_check; - uint8 oam_dm_tod_exist; - uint8 system_headers_mode; - uint8 udh_enable; /* * Bitmap of DMA channels reserved for the user mode network driver. * These channels cannot be used by the kernel network driver (KNET). @@ -593,6 +577,20 @@ typedef struct kcom_msg_dma_info_s { typedef struct kcom_msg_hw_info_s { kcom_msg_hdr_t hdr; kcom_oamp_info_t oamp_info; + /* + * Information to parse Dune system headers + */ + uint32 ftmh_lb_key_ext_size; + uint32 ftmh_stacking_ext_size; + uint32 pph_base_size; + uint32 pph_lif_ext_size[8]; + uint32 udh_length_type[4]; + uint32 udh_size; + uint32 oamp_punted; + uint8 no_skip_udh_check; + uint8 oam_dm_tod_exist; + uint8 system_headers_mode; + uint8 udh_enable; } kcom_msg_hw_info_t; /* diff --git a/platform/broadcom/saibcm-modules/include/sal/types.h b/platform/broadcom/saibcm-modules/include/sal/types.h index 43d64dbcc6b9..11f85d0578d9 100644 --- a/platform/broadcom/saibcm-modules/include/sal/types.h +++ b/platform/broadcom/saibcm-modules/include/sal/types.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: types.h,v 1.3 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: types.h,v 1.3 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * * * File: types.h * Purpose: SAL type definitions @@ -148,6 +146,8 @@ typedef union #define SAL_AXI_DEV_TYPE 0x00080 /* AXI device */ #define SAL_EMMI_DEV_TYPE 0x10000 /* EMMI device */ #define SAL_COMPOSITE_DEV_TYPE 0x20000 /* Composite device, composed of sub-devices with buses */ +#define SAL_USER_DEV_TYPE 0x40000 /* User implemented method of access to the device */ +#define SAL_SUB_DEV_TYPE 0x80000 /* A sub-device (with a bus) of a composite device */ #define SAL_DEV_BUS_TYPE_MASK 0xf00ff /* Odd for historical reasons */ /* Device types */ diff --git a/platform/broadcom/saibcm-modules/include/sdk_config.h b/platform/broadcom/saibcm-modules/include/sdk_config.h index 6ce7d77d52d0..36c33b8412c0 100644 --- a/platform/broadcom/saibcm-modules/include/sdk_config.h +++ b/platform/broadcom/saibcm-modules/include/sdk_config.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: sdk_config.h,v 1.5 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: sdk_config.h,v 1.5 Broadcom SDK $ - * $Copyright: (c) 2006 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * * * */ diff --git a/platform/broadcom/saibcm-modules/include/soc/devids.h b/platform/broadcom/saibcm-modules/include/soc/devids.h index edbdef32b285..a4ee14018a18 100644 --- a/platform/broadcom/saibcm-modules/include/soc/devids.h +++ b/platform/broadcom/saibcm-modules/include/soc/devids.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: devids.h,v 1.309 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,84 +23,102 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * Copyright: (c) 2022 Broadcom. - * All Rights Reserved. + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * */ #ifndef _SOC_DEVIDS_H #define _SOC_DEVIDS_H +/* + * Defines PCI device and revision ID for every recognized device. + * All driver routines refer to this ID only. + */ #define BROADCOM_VENDOR_ID 0x14e4 +/* Draco */ #define BCM5690_DEVICE_ID 0x5690 #define BCM5690_A0_REV_ID 1 #define BCM5690_A1_REV_ID 2 #define BCM5690_A2_REV_ID 3 +/* Draco without HG (Medusa) */ #define BCM5691_DEVICE_ID 0x5691 #define BCM5691_A0_REV_ID 1 #define BCM5691_A1_REV_ID 2 #define BCM5691_A2_REV_ID 3 +/* Draco without L3 */ #define BCM5692_DEVICE_ID 0x5692 #define BCM5692_A0_REV_ID 1 #define BCM5692_A1_REV_ID 2 #define BCM5692_A2_REV_ID 3 +/* Draco without HG or L3 */ #define BCM5693_DEVICE_ID 0x5693 #define BCM5693_A0_REV_ID 1 #define BCM5693_A1_REV_ID 2 #define BCM5693_A2_REV_ID 3 +/* Draco 1.5 */ #define BCM5695_DEVICE_ID 0x5695 #define BCM5695_A0_REV_ID 1 #define BCM5695_A1_REV_ID 2 #define BCM5695_B0_REV_ID 0x11 +/* Draco 1.5 without HG */ #define BCM5696_DEVICE_ID 0x5696 #define BCM5696_A0_REV_ID 1 #define BCM5696_A1_REV_ID 2 #define BCM5696_B0_REV_ID 0x11 +/* Draco 1.5 without L3 */ #define BCM5697_DEVICE_ID 0x5697 #define BCM5697_A0_REV_ID 1 #define BCM5697_A1_REV_ID 2 #define BCM5697_B0_REV_ID 0x11 +/* Draco 1.5 without HG or L3 */ #define BCM5698_DEVICE_ID 0x5698 #define BCM5698_A0_REV_ID 1 #define BCM5698_A1_REV_ID 2 #define BCM5698_B0_REV_ID 0x11 +/* Hercules with 8 ports */ #define BCM5670_DEVICE_ID 0x5670 #define BCM5670_A0_REV_ID 1 #define BCM5670_A1_REV_ID 2 +/* Hercules with 4 ports */ #define BCM5671_DEVICE_ID 0x5671 #define BCM5671_A0_REV_ID 1 #define BCM5671_A1_REV_ID 2 -#define BCM5671_A2_REV_ID 3 +#define BCM5671_A2_REV_ID 3 /* Maxxus */ +/* Hercules 1.5 with 8 ports */ #define BCM5675_DEVICE_ID 0x5675 #define BCM5675_A0_REV_ID 1 #define BCM5675_A1_REV_ID 2 +/* Hercules 1.5 with 4 ports */ #define BCM5676_DEVICE_ID 0x5676 #define BCM5676_A0_REV_ID 1 #define BCM5676_A1_REV_ID 2 +/* Lynx */ #define BCM5673_DEVICE_ID 0x5673 #define BCM5673_A0_REV_ID 1 #define BCM5673_A1_REV_ID 2 #define BCM5673_A2_REV_ID 3 +/* Lynx 1.5 */ #define BCM5674_DEVICE_ID 0x5674 #define BCM5674_A0_REV_ID 1 +/* Felix */ #define BCM56100_DEVICE_ID 0xb100 #define BCM56100_A0_REV_ID 1 #define BCM56100_A1_REV_ID 2 @@ -119,6 +138,7 @@ #define BCM56107_A0_REV_ID 1 #define BCM56107_A1_REV_ID 2 +/* Felix 1.5 */ #define BCM56110_DEVICE_ID 0xb110 #define BCM56110_A0_REV_ID 1 #define BCM56111_DEVICE_ID 0xb111 @@ -132,6 +152,7 @@ #define BCM56117_DEVICE_ID 0xb117 #define BCM56117_A0_REV_ID 1 +/* Helix */ #define BCM56300_DEVICE_ID 0xb300 #define BCM56300_A0_REV_ID 1 #define BCM56300_A1_REV_ID 2 @@ -186,6 +207,7 @@ #define BCM56309_B0_REV_ID 0x11 #define BCM56309_B1_REV_ID 0x12 +/* Helix 1.5 */ #define BCM56310_DEVICE_ID 0xb310 #define BCM56310_A0_REV_ID 1 #define BCM56311_DEVICE_ID 0xb311 @@ -208,11 +230,12 @@ #define BCM56319_A0_REV_ID 1 #ifndef EXCLUDE_BCM56324 +/* Helix 2 */ #define BCM56322_DEVICE_ID 0xb322 #define BCM56322_A0_REV_ID 1 #define BCM56324_DEVICE_ID 0xb324 #define BCM56324_A0_REV_ID 1 -#endif +#endif /* EXCLUDE_BCM56324 */ #define BCM53300_DEVICE_ID 0xb006 #define BCM53300_A0_REV_ID 0x11 @@ -224,6 +247,7 @@ #define BCM53302_A0_REV_ID 0x11 #define BCM53302_A1_REV_ID 0x12 +/* Firebolt */ #define BCM56500_DEVICE_ID 0xb500 #define BCM56500_A0_REV_ID 1 #define BCM56500_A1_REV_ID 2 @@ -285,6 +309,7 @@ #define BCM56509_B1_REV_ID 0x12 #define BCM56509_B2_REV_ID 0x13 +/* Easyrider */ #define BCM56600_DEVICE_ID 0xb600 #define BCM56600_A0_REV_ID 1 #define BCM56600_B0_REV_ID 0x11 @@ -318,14 +343,17 @@ #define BCM56608_B0_REV_ID 0x11 #define BCM56608_C0_REV_ID 0x21 +/* Goldwing */ #define BCM56580_DEVICE_ID 0xb580 #define BCM56580_A0_REV_ID 1 +/* HUMV */ #define BCM56700_DEVICE_ID 0xb700 #define BCM56700_A0_REV_ID 1 #define BCM56701_DEVICE_ID 0xb701 #define BCM56701_A0_REV_ID 1 +/* Bradley */ #define BCM56800_DEVICE_ID 0xb800 #define BCM56800_A0_REV_ID 1 #define BCM56801_DEVICE_ID 0xb801 @@ -335,6 +363,7 @@ #define BCM56803_DEVICE_ID 0xb803 #define BCM56803_A0_REV_ID 1 +/* Raven */ #define BCM56224_DEVICE_ID 0xb224 #define BCM56224_A0_REV_ID 1 #define BCM56224_B0_REV_ID 0x11 @@ -366,6 +395,7 @@ #define BCM53726_A0_REV_ID 1 #define BCM53726_B0_REV_ID 0x11 +/* Hawkeye */ #define BCM53312_DEVICE_ID 0xc312 #define BCM53312_A0_REV_ID 1 #define BCM53312_B0_REV_ID 0x11 @@ -376,6 +406,7 @@ #define BCM53314_A0_REV_ID 1 #define BCM53314_B0_REV_ID 0x11 +/* Hawkeye EEE */ #define BCM53322_DEVICE_ID 0xc322 #define BCM53322_A0_REV_ID 1 #define BCM53323_DEVICE_ID 0xc323 @@ -384,6 +415,7 @@ #define BCM53324_A0_REV_ID 1 +/* Raptor */ #define BCM56218_DEVICE_ID 0xB218 #define BCM56218_A0_REV_ID 1 #define BCM56218_A1_REV_ID 2 @@ -457,6 +489,7 @@ #define BCM56014_A1_REV_ID 2 #define BCM56014_A2_REV_ID 3 +/* Firebolt2 */ #define BCM56510_DEVICE_ID 0xb510 #define BCM56510_A0_REV_ID 1 #define BCM56511_DEVICE_ID 0xb511 @@ -476,6 +509,7 @@ #define BCM56519_DEVICE_ID 0xb519 #define BCM56519_A0_REV_ID 1 +/* Triumph */ #define BCM56620_DEVICE_ID 0xb620 #define BCM56620_A0_REV_ID 1 #define BCM56620_A1_REV_ID 2 @@ -507,6 +541,7 @@ #define BCM56629_B1_REV_ID 0x12 #define BCM56629_B2_REV_ID 0x13 +/* Valkyrie */ #define BCM56680_DEVICE_ID 0xb680 #define BCM56680_A0_REV_ID 1 #define BCM56680_A1_REV_ID 2 @@ -524,6 +559,7 @@ #define BCM56686_B1_REV_ID 0x12 #define BCM56686_B2_REV_ID 0x13 +/* Scorpion */ #define BCM56820_DEVICE_ID 0xb820 #define BCM56820_A0_REV_ID 1 #define BCM56820_B0_REV_ID 0x11 @@ -539,6 +575,7 @@ #define BCM56825_DEVICE_ID 0xb825 #define BCM56825_B0_REV_ID 0x11 +/* HUMV Plus */ #define BCM56720_DEVICE_ID 0xb720 #define BCM56720_A0_REV_ID 1 #define BCM56720_B0_REV_ID 0x11 @@ -546,10 +583,12 @@ #define BCM56721_A0_REV_ID 1 #define BCM56721_B0_REV_ID 0x11 +/* Conqueror */ #define BCM56725_DEVICE_ID 0xb725 #define BCM56725_A0_REV_ID 1 #define BCM56725_B0_REV_ID 0x11 +/* Triumph2 */ #define BCM56630_DEVICE_ID 0xb630 #define BCM56630_A0_REV_ID 1 #define BCM56630_B0_REV_ID 0x11 @@ -566,6 +605,7 @@ #define BCM56639_A0_REV_ID 1 #define BCM56639_B0_REV_ID 0x11 +/* Valkyrie2 */ #define BCM56685_DEVICE_ID 0xb685 #define BCM56685_A0_REV_ID 1 #define BCM56685_B0_REV_ID 0x11 @@ -573,6 +613,7 @@ #define BCM56689_A0_REV_ID 1 #define BCM56689_B0_REV_ID 0x11 +/* Apollo */ #define BCM56520_DEVICE_ID 0xb520 #define BCM56520_A0_REV_ID 1 #define BCM56520_B0_REV_ID 0x11 @@ -589,11 +630,13 @@ #define BCM56526_A0_REV_ID 1 #define BCM56526_B0_REV_ID 0x11 +/* Firebolt 3 */ #define BCM56534_DEVICE_ID 0xb534 #define BCM56534_B0_REV_ID 0x11 #define BCM56538_DEVICE_ID 0xb538 #define BCM56538_B0_REV_ID 0x11 +/* Enduro */ #define BCM56331_DEVICE_ID 0xb331 #define BCM56331_A0_REV_ID 1 #define BCM56331_B0_REV_ID 0x11 @@ -611,6 +654,7 @@ #define BCM56338_B0_REV_ID 0x11 #define BCM56338_B1_REV_ID 0x12 +/* Helix 3 */ #define BCM56320_DEVICE_ID 0xb320 #define BCM56320_A0_REV_ID 1 #define BCM56320_B0_REV_ID 0x11 @@ -621,6 +665,7 @@ #define BCM56321_B1_REV_ID 0x12 +/* FireScout */ #define BCM56548H_DEVICE_ID 0xB54A #define BCM56548H_A0_REV_ID 1 #define BCM56548_DEVICE_ID 0xb548 @@ -628,6 +673,7 @@ #define BCM56547_DEVICE_ID 0xb547 #define BCM56547_A0_REV_ID 1 +/* Helix 4 */ #define BCM56346_DEVICE_ID 0xb346 #define BCM56346_A0_REV_ID 1 #define BCM56345_DEVICE_ID 0xb345 @@ -639,6 +685,7 @@ #define BCM56340_DEVICE_ID 0xb340 #define BCM56340_A0_REV_ID 1 +/* Spiral */ #define BCM56049_DEVICE_ID 0xb049 #define BCM56049_A0_REV_ID 1 #define BCM56048_DEVICE_ID 0xb048 @@ -646,6 +693,7 @@ #define BCM56047_DEVICE_ID 0xb047 #define BCM56047_A0_REV_ID 1 +/* Ranger */ #define BCM56042_DEVICE_ID 0xb042 #define BCM56042_A0_REV_ID 1 #define BCM56041_DEVICE_ID 0xb041 @@ -653,6 +701,7 @@ #define BCM56040_DEVICE_ID 0xb040 #define BCM56040_A0_REV_ID 1 +/* Stardust */ #define BCM56132_DEVICE_ID 0xb132 #define BCM56132_A0_REV_ID 1 #define BCM56132_B0_REV_ID 0x11 @@ -662,11 +711,13 @@ #define BCM56134_B0_REV_ID 0x11 #define BCM56134_B1_REV_ID 0x12 +/* Dagger */ #define BCM56230_DEVICE_ID 0xb230 #define BCM56230_B1_REV_ID 0x12 #define BCM56231_DEVICE_ID 0xb231 #define BCM56231_B1_REV_ID 0x12 +/* Hurricane */ #define BCM56140_DEVICE_ID 0xb140 #define BCM56140_A0_REV_ID 1 #define BCM56142_DEVICE_ID 0xb142 @@ -682,6 +733,7 @@ #define BCM56149_DEVICE_ID 0xb149 #define BCM56149_A0_REV_ID 1 +/* Trident */ #define BCM56840_DEVICE_ID 0xb840 #define BCM56840_A0_REV_ID 1 #define BCM56840_A1_REV_ID 2 @@ -715,6 +767,7 @@ #define BCM56845_B0_REV_ID 0x11 #define BCM56845_B1_REV_ID 0x12 +/* Titan */ #define BCM56743_DEVICE_ID 0xb743 #define BCM56743_A0_REV_ID 1 #define BCM56743_A1_REV_ID 2 @@ -732,6 +785,7 @@ #define BCM56745_B0_REV_ID 0x11 #define BCM56745_B1_REV_ID 0x12 +/* Saber 2 */ #define BCM56260_DEVICE_ID 0xb260 #define BCM56260_A0_REV_ID 1 #define BCM56260_B0_REV_ID 0x11 @@ -758,6 +812,7 @@ #define BCM56268_A0_REV_ID 1 #define BCM56268_B0_REV_ID 0x11 +/*Dagger 2*/ #define BCM56233_DEVICE_ID 0xb233 #define BCM56233_B0_REV_ID 0x11 @@ -787,6 +842,7 @@ #define BCM56468_A0_REV_ID 1 #define BCM56468_B0_REV_ID 0x11 +/* Metrolite */ #define BCM56270_DEVICE_ID 0xb270 #define BCM56270_A0_REV_ID 1 #define BCM56271_DEVICE_ID 0xb271 @@ -794,11 +850,13 @@ #define BCM56272_DEVICE_ID 0xb272 #define BCM56272_A0_REV_ID 1 +/* Beagle */ #define BCM53460_DEVICE_ID 0x8460 #define BCM53460_A0_REV_ID 1 #define BCM53461_DEVICE_ID 0x8461 #define BCM53461_A0_REV_ID 1 +/* Trident Plus */ #define BCM56842_DEVICE_ID 0xb842 #define BCM56842_A0_REV_ID 1 #define BCM56842_A1_REV_ID 2 @@ -835,6 +893,7 @@ #define BCM56849_A0_REV_ID 1 #define BCM56849_A1_REV_ID 2 +/* Titan Plus */ #define BCM56742_DEVICE_ID 0xb742 #define BCM56742_A0_REV_ID 1 #define BCM56742_A1_REV_ID 2 @@ -847,6 +906,7 @@ #define BCM56746_A1_REV_ID 2 +/* Triumph 3 */ #define BCM56640_DEVICE_ID 0xb640 #define BCM56640_A0_REV_ID 1 #define BCM56640_A1_REV_ID 2 @@ -868,6 +928,7 @@ #define BCM56649_A1_REV_ID 2 #define BCM56649_B0_REV_ID 0x11 +/* Apollo 2 */ #define BCM56540_DEVICE_ID 0xb540 #define BCM56540_A0_REV_ID 1 #define BCM56540_A1_REV_ID 2 @@ -889,6 +950,7 @@ #define BCM56544_A1_REV_ID 2 #define BCM56544_B0_REV_ID 0x11 +/* Firebolt 4 */ #define BCM56545_DEVICE_ID 0xb545 #define BCM56545_A0_REV_ID 1 #define BCM56545_A1_REV_ID 2 @@ -898,6 +960,7 @@ #define BCM56546_A1_REV_ID 2 #define BCM56546_B0_REV_ID 0x11 +/* Ranger plus */ #define BCM56044_DEVICE_ID 0xb044 #define BCM56044_B0_REV_ID 0x11 #define BCM56045_DEVICE_ID 0xb045 @@ -910,6 +973,7 @@ #define BCM56046_B0_REV_ID 0x11 +/* Katana */ #define BCM56440_DEVICE_ID 0xb440 #define BCM56440_A0_REV_ID 1 #define BCM56440_B0_REV_ID 0x11 @@ -962,6 +1026,7 @@ #define BCM55441_A0_REV_ID 1 #define BCM55441_B0_REV_ID 0x11 +/* Katana 2 */ #define BCM55450_DEVICE_ID 0xa450 #define BCM55450_A0_REV_ID 1 #define BCM55450_B0_REV_ID 0x11 @@ -1012,6 +1077,7 @@ #define BCM56458_B0_REV_ID 0x11 #define BCM56458_B1_REV_ID 0x12 +/* Trident 2 */ #define BCM56850_DEVICE_ID 0xb850 #define BCM56850_A0_REV_ID 1 #define BCM56850_A1_REV_ID 2 @@ -1041,6 +1107,7 @@ #define BCM56834_A1_REV_ID 2 #define BCM56834_A2_REV_ID 3 +/* Trident 2+ */ #define BCM56860_DEVICE_ID 0xb860 #define BCM56860_A0_REV_ID 1 #define BCM56860_A1_REV_ID 2 @@ -1076,16 +1143,19 @@ #define BCM56836_A1_REV_ID 2 +/* Titan 2 */ #define BCM56750_DEVICE_ID 0xb750 #define BCM56750_A0_REV_ID 1 #define BCM56750_A1_REV_ID 2 #define BCM56750_A2_REV_ID 3 +/* Scorpion 960 */ #define BCM56830_DEVICE_ID 0xb830 #define BCM56830_A0_REV_ID 1 #define BCM56830_A1_REV_ID 2 #define BCM56830_A2_REV_ID 3 +/* Hurricane 2*/ #define BCM56150_DEVICE_ID 0xb150 #define BCM56150_A0_REV_ID 1 #define BCM56151_DEVICE_ID 0xb151 @@ -1093,6 +1163,7 @@ #define BCM56152_DEVICE_ID 0xb152 #define BCM56152_A0_REV_ID 1 +/* Wolfhound*/ #define BCM53342_DEVICE_ID 0x8342 #define BCM53342_A0_REV_ID 1 #define BCM53343_DEVICE_ID 0x8343 @@ -1104,19 +1175,22 @@ #define BCM53347_DEVICE_ID 0x8347 #define BCM53347_A0_REV_ID 1 +/* Foxhound*/ #define BCM53333_DEVICE_ID 0x8333 #define BCM53333_A0_REV_ID 1 #define BCM53334_DEVICE_ID 0x8334 #define BCM53334_A0_REV_ID 1 +/* Deerhound*/ #define BCM53393_DEVICE_ID 0x8393 #define BCM53393_A0_REV_ID 1 #define BCM53394_DEVICE_ID 0x8394 #define BCM53394_A0_REV_ID 1 +/* Greyhound , Ranger 2 */ #define BCM53400_DEVICE_ID 0x8400 #define BCM53400_A0_REV_ID 1 -#define BCM56060_DEVICE_ID 0xb060 +#define BCM56060_DEVICE_ID 0xb060 #define BCM56060_A0_REV_ID 1 #define BCM56062_DEVICE_ID 0xb062 #define BCM56062_A0_REV_ID 1 @@ -1154,6 +1228,7 @@ #define BCM53369_DEVICE_ID 0x8369 #define BCM53369_A0_REV_ID 1 +/* Elkhound */ #define BCM53454_DEVICE_ID 0x8454 #define BCM53455_DEVICE_ID 0x8455 #define BCM53454_A0_REV_ID 1 @@ -1161,6 +1236,7 @@ #define BCM53457_DEVICE_ID 0x8457 #define BCM53456_A0_REV_ID 1 +/* Bloodhound */ #define BCM53422_DEVICE_ID 0x8422 #define BCM53422_A0_REV_ID 1 #define BCM53424_DEVICE_ID 0x8424 @@ -1168,6 +1244,7 @@ #define BCM53426_DEVICE_ID 0x8426 #define BCM53426_A0_REV_ID 1 +/* Tomahawk */ #define BCM56960_DEVICE_ID 0xb960 #define BCM56960_A0_REV_ID 1 #define BCM56960_B0_REV_ID 0x11 @@ -1206,6 +1283,7 @@ #define BCM56939_B0_REV_ID 0x11 #define BCM56939_C0_REV_ID 0x21 +/* Ranger3+ */ #define BCM56168_DEVICE_ID 0xb168 #define BCM56168_A0_REV_ID 1 #define BCM56168_B0_REV_ID 0x11 @@ -1215,6 +1293,7 @@ #define BCM56169_B0_REV_ID 0x11 #define BCM56169_B1_REV_ID 0x12 +/* Tomahawk 3 */ #define BCM56980_DEVICE_ID_MASK 0xFFF0 #define BCM56980_DEVICE_ID 0xb980 #define BCM56980_A0_REV_ID 1 @@ -1232,28 +1311,32 @@ #define BCM56984_A0_REV_ID 1 #define BCM56984_B0_REV_ID 0x11 +/* Titanhawk */ #define BCM56968_DEVICE_ID 0xb968 #define BCM56968_A0_REV_ID 1 #define BCM56968_B0_REV_ID 0x11 #define BCM56968_B1_REV_ID 0x12 -#define BCM56160_DEVICE_ID 0xb160 +/* Hurricane 3 */ +#define BCM56160_DEVICE_ID 0xb160 #define BCM56160_A0_REV_ID 1 #define BCM56160_B0_REV_ID 0x11 -#define BCM56162_DEVICE_ID 0xb162 +#define BCM56162_DEVICE_ID 0xb162 #define BCM56162_A0_REV_ID 1 #define BCM56162_B0_REV_ID 0x11 -#define BCM56163_DEVICE_ID 0xb163 +/* Hurricane3 Lite */ +#define BCM56163_DEVICE_ID 0xb163 #define BCM56163_A0_REV_ID 1 #define BCM56163_B0_REV_ID 0x11 -#define BCM56164_DEVICE_ID 0xb164 +#define BCM56164_DEVICE_ID 0xb164 #define BCM56164_A0_REV_ID 1 #define BCM56164_B0_REV_ID 0x11 -#define BCM56166_DEVICE_ID 0xb166 +#define BCM56166_DEVICE_ID 0xb166 #define BCM56166_A0_REV_ID 1 #define BCM56166_B0_REV_ID 0x11 +/* Hurricane4 */ #define BCM56273_DEVICE_ID 0xb273 #define BCM56273_A0_REV_ID 1 #define BCM56273_A1_REV_ID 2 @@ -1290,20 +1373,23 @@ #define BCM56176_DEVICE_ID 0xb176 #define BCM56176_A1_REV_ID 2 -#define BCM53440_DEVICE_ID 0x8440 +/* Buckhound */ +#define BCM53440_DEVICE_ID 0x8440 #define BCM53440_A0_REV_ID 1 #define BCM53440_B0_REV_ID 0x11 -#define BCM53442_DEVICE_ID 0x8442 +#define BCM53442_DEVICE_ID 0x8442 #define BCM53442_A0_REV_ID 1 #define BCM53442_B0_REV_ID 0x11 -#define BCM53443_DEVICE_ID 0x8443 +#define BCM53443_DEVICE_ID 0x8443 #define BCM53443_A0_REV_ID 1 #define BCM53443_B0_REV_ID 0x11 -#define BCM53434_DEVICE_ID 0x8434 +/* Foxhound2 */ +#define BCM53434_DEVICE_ID 0x8434 #define BCM53434_A0_REV_ID 1 #define BCM53434_B0_REV_ID 0x11 +/* Apache */ #define BCM56560_DEVICE_ID 0xb560 #define BCM56560_A0_REV_ID 1 #define BCM56560_B0_REV_ID 0x11 @@ -1316,6 +1402,7 @@ #define BCM56562_A0_REV_ID 1 #define BCM56562_B0_REV_ID 0x11 +/* MONTEREY */ #define BCM56670_DEVICE_ID 0xb670 #define BCM56670_A0_REV_ID 1 #define BCM56670_B0_REV_ID 0x11 @@ -1337,7 +1424,28 @@ #define BCM56675_B0_REV_ID 0x11 #define BCM56675_C0_REV_ID 0x21 +/* WOLFHOUND3 PLUS */ +#define BCM53650_DEVICE_ID 0x8650 +#define BCM53650_A0_REV_ID 1 +#define BCM53650_B0_REV_ID 0x11 +#define BCM53650_C0_REV_ID 0x21 + +#define BCM53651_DEVICE_ID 0x8651 +#define BCM53651_A0_REV_ID 1 +#define BCM53651_B0_REV_ID 0x11 +#define BCM53651_C0_REV_ID 0x21 + +#define BCM53652_DEVICE_ID 0x8652 +#define BCM53652_A0_REV_ID 1 +#define BCM53652_B0_REV_ID 0x11 +#define BCM53652_C0_REV_ID 0x21 +#define BCM53653_DEVICE_ID 0x8653 +#define BCM53653_A0_REV_ID 1 +#define BCM53653_B0_REV_ID 0x11 +#define BCM53653_C0_REV_ID 0x21 + +/* Firebolt-5 */ #define BCM56565_DEVICE_ID 0xb565 #define BCM56565_A0_REV_ID 1 #define BCM56565_B0_REV_ID 0x11 @@ -1354,6 +1462,7 @@ #define BCM56568_A0_REV_ID 1 #define BCM56568_B0_REV_ID 0x11 +/* Maverick */ #define BCM56760_DEVICE_ID 0xb760 #define BCM56760_A0_REV_ID 1 #define BCM56760_A1_REV_ID 2 @@ -1386,6 +1495,7 @@ #define BCM56768_A0_REV_ID 1 #define BCM56768_B0_REV_ID 0x11 +/* Ranger 2+ */ #define BCM56068_DEVICE_ID 0xb068 #define BCM56068_A0_REV_ID 1 #define BCM56068_B0_REV_ID 0x11 @@ -1395,6 +1505,7 @@ #define BCM56069_A0_REV_ID 1 #define BCM56069_B0_REV_ID 0x11 +/* Hurricane3-MG */ #define BCM56170_DEVICE_ID 0xb170 #define BCM56170_A0_REV_ID 1 #define BCM56170_B0_REV_ID 0x11 @@ -1405,6 +1516,7 @@ #define BCM56174_A0_REV_ID 1 #define BCM56174_B0_REV_ID 0x11 +/* Quartz, Greyhound 2 */ #define BCM53570_DEVICE_ID 0x8570 #define BCM53570_A0_REV_ID 1 #define BCM53570_B0_REV_ID 0x11 @@ -1412,6 +1524,7 @@ #define BCM53575_A0_REV_ID 1 #define BCM53575_B0_REV_ID 0x11 +/* FireLight */ #define BCM56070_DEVICE_ID 0xb070 #define BCM56070_A0_REV_ID 1 #define BCM56071_DEVICE_ID 0xb071 @@ -1420,16 +1533,18 @@ #define BCM56072_A0_REV_ID 1 +/* Tomahawk+ */ #define BCM56965_DEVICE_ID 0xb965 #define BCM56965_A0_REV_ID 1 #define BCM56965_A1_REV_ID 2 -#define BCM56969_DEVICE_ID 0xb969 +#define BCM56969_DEVICE_ID 0xb969 /* Corresponds to TH 56961 */ #define BCM56969_A0_REV_ID 1 -#define BCM56966_DEVICE_ID 0xb966 +#define BCM56966_DEVICE_ID 0xb966 /* Corresponds to TH 56962 */ #define BCM56966_A0_REV_ID 1 -#define BCM56967_DEVICE_ID 0xb967 +#define BCM56967_DEVICE_ID 0xb967 /* Corresponds to TH 56963 */ #define BCM56967_A0_REV_ID 1 +/* Tomahawk 2 */ #define BCM56970_DEVICE_ID 0xb970 #define BCM56970_A0_REV_ID 1 #define BCM56970_B0_REV_ID 0x11 @@ -1446,11 +1561,13 @@ #define BCM56975_A0_REV_ID 1 #define BCM56975_B0_REV_ID 0x11 +/* Trident3 */ #define BCM56870_DEVICE_ID 0xb870 #define BCM56870_A0_REV_ID 1 #define BCM56873_DEVICE_ID 0xb873 #define BCM56873_A0_REV_ID 1 +/* Helix5 */ #define BCM56370_DEVICE_ID 0xb370 #define BCM56370_A0_REV_ID 1 #define BCM56370_A1_REV_ID 0x02 @@ -1501,12 +1618,14 @@ #define BCM56579_A1_REV_ID 0x02 #define BCM56579_A2_REV_ID 0x03 +/* Maverick2 */ #define BCM56770_DEVICE_ID 0xb770 #define BCM56770_A0_REV_ID 1 #define BCM56771_DEVICE_ID 0xb771 #define BCM56771_A0_REV_ID 1 +/* Firebolt6 */ #define BCM56470_DEVICE_ID 0xb470 #define BCM56470_A0_REV_ID 1 #define BCM56471_DEVICE_ID 0xb471 @@ -1519,6 +1638,7 @@ #define BCM56474_A0_REV_ID 1 +/* Wolfhound2 (Hurricane3-CR)*/ #define BCM53540_DEVICE_ID 0x8540 #define BCM53540_A0_REV_ID 1 #define BCM53547_DEVICE_ID 0x8547 @@ -1528,19 +1648,43 @@ #define BCM53549_DEVICE_ID 0x8549 #define BCM53549_A0_REV_ID 1 +/* Wolfhound3 */ #define BCM53642_DEVICE_ID 0x8642 #define BCM53642_A0_REV_ID 1 +/* + * BCM5665: Tucana48 (48+4+1) + * BCM5665L: Tucana24 (24+4+1) + * BCM5666: Tucana48 (48+4+1) without L3 + * BCM5666L: Tucana24 (24+4+1) without L3 + * + * The device ID is 0x5665 for all of these parts. For BCM5665L and + * BCM5666L, the pbmp_valid property must be set to invalidate fe24-fe47 + * (see $SDK/rc/config.bcm). + */ #define BCM5665_DEVICE_ID 0x5665 #define BCM5665_A0_REV_ID 1 #define BCM5665_B0_REV_ID 0x11 +/* + * BCM5655: Titanium48 (48+4) + * BCM5656: Titanium48 (48+4) without L3 + * + * The device ID is 0x5655 for both parts. + */ #define BCM5655_DEVICE_ID 0x5655 #define BCM5655_A0_REV_ID 1 #define BCM5655_B0_REV_ID 0x11 +/* + * BCM5650: Titanium-II (24+4) + * BCM5651: Titanium-II (24+4) without L3 + * + * The device ID is 0x5650 for both parts. + * BCM5650C0 is the first spin of a real 24+4 cost-reduced chip. + */ #define BCM5650_DEVICE_ID 0x5650 #define BCM5650_A0_REV_ID 1 #define BCM5650_B0_REV_ID 0x11 @@ -1548,9 +1692,10 @@ #define BROADCOM_PHYID_HIGH 0x0040 -#define ARAD_DEVICE_ID 0x8650 +/* Define Dune device IDs */ +#define ARAD_DEVICE_ID 0x8650 #define ARAD_A0_REV_ID 0x0000 -#define ARAD_B0_REV_ID 0x0011 +#define ARAD_B0_REV_ID 0x0011 #define ARAD_B1_REV_ID 0x0012 #define BCM88770_DEVICE_ID 0x8770 #define BCM88770_A1_REV_ID 0x0002 @@ -1600,49 +1745,20 @@ #define BCM8879E_DEVICE_ID 0x879E #define BCM8879F_DEVICE_ID 0x879F #ifdef BCM_DNXF3_SUPPORT -#define BCM88910_DEVICE_ID 0x8910 -#define BCM88910_A0_REV_ID DNXC_A0_REV_ID -#define BCM88911_DEVICE_ID 0x8911 -#define BCM88912_DEVICE_ID 0x8912 -#define BCM88913_DEVICE_ID 0x8913 -#define BCM88914_DEVICE_ID 0x8914 -#define BCM88915_DEVICE_ID 0x8915 -#define BCM88916_DEVICE_ID 0x8916 -#define BCM88917_DEVICE_ID 0x8917 -#define BCM88918_DEVICE_ID 0x8918 -#define BCM88919_DEVICE_ID 0x8919 -#define BCM8891A_DEVICE_ID 0x891A -#define BCM8891B_DEVICE_ID 0x891B -#define BCM8891C_DEVICE_ID 0x891C -#define BCM8891D_DEVICE_ID 0x891D -#define BCM8891E_DEVICE_ID 0x891E +#define RAMON2_DEVICE_ID 0x8910 #define BCM8891F_DEVICE_ID 0x891F -#define BCM88920_DEVICE_ID 0x8920 -#define BCM88920_A0_REV_ID DNXC_A0_REV_ID -#define BCM88921_DEVICE_ID 0x8921 -#define BCM88922_DEVICE_ID 0x8922 -#define BCM88923_DEVICE_ID 0x8923 -#define BCM88924_DEVICE_ID 0x8924 -#define BCM88925_DEVICE_ID 0x8925 -#define BCM88926_DEVICE_ID 0x8926 -#define BCM88927_DEVICE_ID 0x8927 -#define BCM88928_DEVICE_ID 0x8928 -#define BCM88929_DEVICE_ID 0x8929 -#define BCM8892A_DEVICE_ID 0x892A -#define BCM8892B_DEVICE_ID 0x892B -#define BCM8892C_DEVICE_ID 0x892C -#define BCM8892D_DEVICE_ID 0x892D -#define BCM8892E_DEVICE_ID 0x892E -#define BCM8892F_DEVICE_ID 0x892F +#define RAMON3_DEVICE_ID 0x8920 #endif #define ARADPLUS_DEVICE_ID 0x8660 -#define ARADPLUS_A0_REV_ID 0x0001 +#define ARADPLUS_A0_REV_ID 0x0001 #define BCM88660_DEVICE_ID ARADPLUS_DEVICE_ID #define BCM88660_A0_REV_ID ARADPLUS_A0_REV_ID -#define JERICHO_DEVICE_ID 0x8675 +/* Jericho */ +#define JERICHO_DEVICE_ID 0x8675 #define JERICHO_A0_REV_ID 0x0001 #define JERICHO_B0_REV_ID 0x0011 #define JERICHO_A1_REV_ID 0x0002 +/* Jericho SKUs */ #define BCM88670_DEVICE_ID 0x8670 #define BCM88670_A0_REV_ID JERICHO_A0_REV_ID #define BCM88670_A1_REV_ID JERICHO_A1_REV_ID @@ -1700,10 +1816,12 @@ #define BCM88677_B0_REV_ID JERICHO_B0_REV_ID #define BCM88678_B0_REV_ID JERICHO_B0_REV_ID #define BCM88679_B0_REV_ID JERICHO_B0_REV_ID -#define QMX_DEVICE_ID 0x8375 +/* Qumran MX */ +#define QMX_DEVICE_ID 0x8375 #define QMX_A0_REV_ID 0x0001 #define QMX_B0_REV_ID 0x0011 #define QMX_A1_REV_ID 0x0002 +/* Qumran MX SKUs*/ #define BCM88370_DEVICE_ID 0x8370 #define BCM88370_A0_REV_ID QMX_A0_REV_ID #define BCM88370_A1_REV_ID QMX_A1_REV_ID @@ -1743,7 +1861,7 @@ #define BCM88379_B0_REV_ID QMX_B0_REV_ID -#define JERICHO_PLUS_DEVICE_ID 0x8680 +#define JERICHO_PLUS_DEVICE_ID 0x8680 #define JERICHO_PLUS_A0_REV_ID 0x0001 #define BCM88680_DEVICE_ID JERICHO_PLUS_DEVICE_ID #define BCM88680_A0_REV_ID JERICHO_PLUS_A0_REV_ID @@ -1773,7 +1891,7 @@ #define BCM88381_DEVICE_ID 0x8381 #define BCM88381_A0_REV_ID JERICHO_PLUS_A0_REV_ID -#define JERICHO2_DEVICE_ID 0x8690 +#define JERICHO2_DEVICE_ID 0x8690 #define JERICHO2_A0_REV_ID DNXC_A0_REV_ID #define JERICHO2_B0_REV_ID DNXC_B0_REV_ID #define JERICHO2_B1_REV_ID DNXC_B1_REV_ID @@ -1797,9 +1915,9 @@ #define BCM8869E_DEVICE_ID 0x869E #define BCM8869F_DEVICE_ID 0x869F -#define J2C_DEVICE_ID 0x8800 -#define J2C_2ND_DEVICE_ID 0x8820 -#define J2C_DEVID_FAMILY_MASK 0xffd0 +#define J2C_DEVICE_ID 0x8800 +#define J2C_2ND_DEVICE_ID 0x8820 +#define J2C_DEVID_FAMILY_MASK 0xffd0 #define J2C_A0_REV_ID DNXC_A0_REV_ID #define J2C_A1_REV_ID DNXC_A1_REV_ID #define BCM88800_DEVICE_ID J2C_DEVICE_ID @@ -1878,6 +1996,23 @@ #define BCM8884E_DEVICE_ID 0x884E #define BCM8884F_DEVICE_ID 0x884F +#define BCM88810_DEVICE_ID 0x8810 +#define BCM88811_DEVICE_ID 0x8811 +#define BCM88812_DEVICE_ID 0x8812 +#define BCM88813_DEVICE_ID 0x8813 +#define BCM88814_DEVICE_ID 0x8814 +#define BCM88815_DEVICE_ID 0x8815 +#define BCM88816_DEVICE_ID 0x8816 +#define BCM88817_DEVICE_ID 0x8817 +#define BCM88818_DEVICE_ID 0x8818 +#define BCM88819_DEVICE_ID 0x8819 +#define BCM8881A_DEVICE_ID 0x881A +#define BCM8881B_DEVICE_ID 0x881B +#define BCM8881C_DEVICE_ID 0x881C +#define BCM8881D_DEVICE_ID 0x881D +#define BCM8881E_DEVICE_ID 0x881E +#define BCM8881F_DEVICE_ID 0x881F + #define J2X_DEVICE_ID 0x8830 #define J2X_A0_REV_ID DNXC_A0_REV_ID #define BCM88830_DEVICE_ID J2X_DEVICE_ID @@ -1898,18 +2033,19 @@ #define BCM8883E_DEVICE_ID 0x883E #define BCM8883F_DEVICE_ID 0x883F +#define J2Z_DEVICE_ID 0x216 +#define J2Z_A0_REV_ID DNXC_A0_REV_ID +#define BCM8216_DEVICE_ID J2Z_DEVICE_ID +#define BCM8216_A0_REV_ID J2Z_A0_REV_ID + #ifdef BCM_DNX3_SUPPORT -#define JERICHO3_DEVICE_ID 0x8860 -#define JERICHO3_A0_REV_ID DNXC_A0_REV_ID -#define BCM88860_DEVICE_ID JERICHO3_DEVICE_ID -#define BCM88860_A0_REV_ID JERICHO3_A0_REV_ID -#define Q4_DEVICE_ID 0x8870 -#define Q4_A0_REV_ID DNXC_A0_REV_ID -#define BCM88870_DEVICE_ID Q4_DEVICE_ID -#define BCM88870_A0_REV_ID Q4_A0_REV_ID +#define JERICHO3_DEVICE_ID 0x8860 +#define Q3_DEVICE_ID_START 0x886a +#define Q3_DEVICE_ID_END 0x886f +#define J3AI_DEVICE_ID 0x8890 +#define Q3D_DEVICE_ID 0x8870 #endif - -#define Q2A_DEVICE_ID 0x8480 +#define Q2A_DEVICE_ID 0x8480 #define Q2A_A0_REV_ID DNXC_A0_REV_ID #define Q2A_B0_REV_ID DNXC_B0_REV_ID #define Q2A_B1_REV_ID DNXC_B1_REV_ID @@ -1969,10 +2105,10 @@ #define BCM8829E_DEVICE_ID 0x829E #define BCM8829F_DEVICE_ID 0x829F -#define QAX_DEVICE_ID 0x8470 +#define QAX_DEVICE_ID 0x8470 #define QAX_A0_REV_ID 0x0001 #define QAX_B0_REV_ID 0x0011 -#define BCM88470_DEVICE_ID QAX_DEVICE_ID +#define BCM88470_DEVICE_ID QAX_DEVICE_ID #define BCM88470_B0_REV_ID QAX_B0_REV_ID #define BCM88470P_DEVICE_ID 0x847C #define BCM88471_DEVICE_ID 0x8471 @@ -1988,7 +2124,7 @@ #define BCM88470_A0_REV_ID QAX_A0_REV_ID -#define QUX_DEVICE_ID 0x8270 +#define QUX_DEVICE_ID 0x8270 #define QUX_A0_REV_ID 0x0001 #define QUX_A1_REV_ID 0x0002 #define QUX_B0_REV_ID 0x0011 @@ -2046,11 +2182,31 @@ #define BCM88952_A0_REV_ID 0x0001 #define BCM88952_A1_REV_ID 0x0002 -#define PLX9056_DEVICE_ID 0x9056 +#define PLX9056_DEVICE_ID 0x9056 /* needed for DNX_TEST_BOARD */ +/* Trident4 X11c*/ #define BCM56890_DEVICE_ID 0xb890 #define BCM56890_A0_REV_ID 0x0001 - +#define BCM56891_DEVICE_ID 0xb891 +#define BCM56891_A0_REV_ID 0x0001 +#define BCM56892_DEVICE_ID 0xb892 +#define BCM56892_A0_REV_ID 0x0001 +#define BCM56895_DEVICE_ID 0xb895 +#define BCM56895_A0_REV_ID 0x0001 +#define BCM56896_DEVICE_ID 0xb896 +#define BCM56896_A0_REV_ID 0x0001 + +/* Trident4 X7*/ +#define BCM56690_DEVICE_ID 0xb690 +#define BCM56690_A0_REV_ID 0x0001 +#define BCM56692_DEVICE_ID 0xb692 +#define BCM56692_A0_REV_ID 0x0001 + +/* Trident5 X12*/ +#define BCM78800_DEVICE_ID 0xf800 +#define BCM78800_A0_REV_ID 0x0001 + +/* Trident4 */ #define BCM56880_DEVICE_ID 0xb880 #define BCM56880_A0_REV_ID 0x0001 #define BCM56880_B0_REV_ID 0x0011 @@ -2061,26 +2217,37 @@ #define BCM56883_A0_REV_ID 0x0001 #define BCM56883_B0_REV_ID 0x0011 +/* Trident4 X9 */ #define BCM56780_DEVICE_ID 0xb780 #define BCM56780_A0_REV_ID 0x0001 #define BCM56782_DEVICE_ID 0xb782 #define BCM56782_A0_REV_ID 0x0001 +#define BCM56782_A1_REV_ID 0x0002 #define BCM56784_DEVICE_ID 0xb784 #define BCM56784_A0_REV_ID 0x0001 #define BCM56785_DEVICE_ID 0xb785 #define BCM56785_A0_REV_ID 0x0001 #define BCM56786_DEVICE_ID 0xb786 #define BCM56786_A0_REV_ID 0x0001 +#define BCM56786_A1_REV_ID 0x0002 #define BCM56787_DEVICE_ID 0xb787 #define BCM56787_A0_REV_ID 0x0001 +#define BCM56787_A1_REV_ID 0x0002 #define BCM56788_DEVICE_ID 0xb788 #define BCM56788_A0_REV_ID 0x0001 +#define BCM56788_A1_REV_ID 0x0002 #define BCM56789_DEVICE_ID 0xb789 #define BCM56789_A0_REV_ID 0x0001 +/* Firelight3 */ +#define BCM56089_DEVICE_ID 0xb089 +#define BCM56089_A0_REV_ID 0x0001 +#define BCM56089_A1_REV_ID 0x0002 +/* Tomahawk4 */ #define BCM56990_DEVICE_ID 0xb990 #define BCM56990_A0_REV_ID 0x0001 +/* Tomahawk4 */ #ifndef BCM56990_DEVICE_ID #define BCM56990_DEVICE_ID 0xb990 #define BCM56990_A0_REV_ID 0x0001 @@ -2093,11 +2260,13 @@ #define BCM56993_DEVICE_ID 0xb993 #define BCM56993_B0_REV_ID 0x0011 +/* Tomahawk4G */ #define BCM56996_DEVICE_ID 0xb996 #define BCM56996_A0_REV_ID 0x0001 #define BCM56997_DEVICE_ID 0xb997 #define BCM56997_A0_REV_ID 0x0001 +/* Tomahawk4G */ #ifndef BCM56996_DEVICE_ID #define BCM56996_DEVICE_ID 0xb996 #define BCM56996_A0_REV_ID 0x0001 @@ -2106,9 +2275,11 @@ #define BCM56996_B0_REV_ID 0x0011 #define BCM56997_B0_REV_ID 0x0011 +/* Tomahawk4GT */ #define BCM56998_DEVICE_ID 0xb998 #define BCM56998_A0_REV_ID 0x0001 +/* Tomahawk4D */ #define BCM56999_DEVICE_ID 0xb999 #define BCM56999_A0_REV_ID 0x0001 #define BCM56999_B0_REV_ID 0x0011 @@ -2116,18 +2287,38 @@ #define BCM56995_A0_REV_ID 0x0001 #define BCM56995_B0_REV_ID 0x0011 +/* Tomahawk5 */ #define BCM78900_DEVICE_ID 0xf900 #define BCM78900_B0_REV_ID 0x0011 +#define BCM78902_DEVICE_ID 0xf902 +#define BCM78902_B0_REV_ID 0x0011 + +#define BCM78903_DEVICE_ID 0xf903 +#define BCM78903_B0_REV_ID 0x0011 + +/* Tomahawk5+ */ +#define BCM78905_DEVICE_ID 0xf905 +#define BCM78905_A0_REV_ID 0x0001 + +/* Firelight2 */ #define BCM56080_DEVICE_ID 0xb080 #define BCM56080_A0_REV_ID 0x0001 +#define BCM56080_A1_REV_ID 0x0002 #define BCM56081_DEVICE_ID 0xb081 #define BCM56081_A0_REV_ID 0x0001 +#define BCM56081_A1_REV_ID 0x0002 #define BCM56082_DEVICE_ID 0xb082 #define BCM56082_A0_REV_ID 0x0001 +#define BCM56082_A1_REV_ID 0x0002 #define BCM56083_DEVICE_ID 0xb083 #define BCM56083_A0_REV_ID 0x0001 +#define BCM56083_A1_REV_ID 0x0002 #define BCM56084_DEVICE_ID 0xb084 #define BCM56084_A0_REV_ID 0x0001 +#define BCM56084_A1_REV_ID 0x0002 +#define BCM56085_DEVICE_ID 0xb085 +#define BCM56085_A0_REV_ID 0x0001 +#define BCM56085_A1_REV_ID 0x0002 -#endif +#endif /* !_SOC_DEVIDS_H */ diff --git a/platform/broadcom/saibcm-modules/make/Make.clang b/platform/broadcom/saibcm-modules/make/Make.clang new file mode 100644 index 000000000000..fc80fb079bdc --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Make.clang @@ -0,0 +1,69 @@ +# $Id: Make.clang +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# +# Build flags for CLANG. +# + +SHELL := $(shell which bash) +CHK_CC := $(shell PATH="$(PATH)" which $(CC)) +CLANG_MAJOR := $(shell $(CHK_CC) --version | sed -n 's/.* \([0-9]*\)\..*/\1/p') +# +# This is not suitable for CLANG compilation of DNX family so do not inclue. +# +ifneq (1,$(SAND_CHIPS)) +ifeq (true,$(shell [ $(CLANG_MAJOR) -ge 10 ] && echo true)) +# Support kernel module build +export KERNEL_LLVM ?= 1 + +# Suppress various Clang warnings +CLANG_ADD_CFLAGS += \ + -Wno-gnu-designator \ + -Wno-gnu-variable-sized-type-not-at-end \ + -Wno-address-of-packed-member \ + -Wno-unused-command-line-argument \ + -Wno-misleading-indentation + +# Suppress Clang build issues on TCL Bindings +ifeq (TCL,$(findstring TCL,$(FEATURE_LIST))) +CLANG_ADD_CFLAGS += \ + -Wno-deprecated-non-prototype \ + -Wno-incompatible-function-pointer-types \ + -Wno-incompatible-pointer-types-discards-qualifiers \ + -Wno-void-pointer-to-int-cast \ + -Wno-int-to-void-pointer-cast \ + -Wno-pointer-to-int-cast +endif + +# Use LLD by default +LDFLAGS += -fuse-ld=lld +CLANG_ADD_CFLAGS += -fuse-ld=lld + +# Use DWARF V4 for compatibility +CLANG_ADD_CFLAGS += -gdwarf-4 +endif +endif diff --git a/platform/broadcom/saibcm-modules/make/Make.config b/platform/broadcom/saibcm-modules/make/Make.config index 9a881329e669..5e28e7222d24 100644 --- a/platform/broadcom/saibcm-modules/make/Make.config +++ b/platform/broadcom/saibcm-modules/make/Make.config @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Make.config,v 1.3 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # ifneq ($(strip $(override-target)),) @@ -119,12 +117,14 @@ else # ifeq "$(HOSTTYPE)" "Windows2000PC" ifndef SDKBUILD SDKBUILD :=build endif + ifdef SDK_OUTDIR BLDROOT = ${SDK_OUTDIR}/${SDKBUILD}/$(if ${BLDCONFIG},${BLDCONFIG}/)${target}${all_suffix}${bldroot_suffix} export DEST_DIR := ${SDK_OUTDIR}/${SDKBUILD}$(if ${BLDCONFIG},/${BLDCONFIG})$(DEST_DIR_SUFFIX) else BLDROOT = ${SDK}/${SDKBUILD}/$(if ${BLDCONFIG},${BLDCONFIG}/)${target}${all_suffix}${bldroot_suffix} endif + endif # ifeq "$(HOSTTYPE)" "Windows2000PC" # This is needed because we cannot include Make.vxworks before Make.config diff --git a/platform/broadcom/saibcm-modules/make/Make.depend b/platform/broadcom/saibcm-modules/make/Make.depend index 802f5f4483c2..f51ffd77bbf6 100644 --- a/platform/broadcom/saibcm-modules/make/Make.depend +++ b/platform/broadcom/saibcm-modules/make/Make.depend @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Make.depend,v 1.14 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # # Default rule to build dependencies. This builds a x.d file for each # x.c file that describes the dependencies. We then conditionally include diff --git a/platform/broadcom/saibcm-modules/make/Make.kernlib b/platform/broadcom/saibcm-modules/make/Make.kernlib index 56752beca3b6..3051da05e1ba 100644 --- a/platform/broadcom/saibcm-modules/make/Make.kernlib +++ b/platform/broadcom/saibcm-modules/make/Make.kernlib @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Make.kernlib,v 1.7 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # # Make rules/targets for handling libraries diff --git a/platform/broadcom/saibcm-modules/make/Make.lib b/platform/broadcom/saibcm-modules/make/Make.lib index a4f19aad9321..c6558c0cb181 100644 --- a/platform/broadcom/saibcm-modules/make/Make.lib +++ b/platform/broadcom/saibcm-modules/make/Make.lib @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Make.lib,v 1.14 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # # Make rules/targets for handling libraries @@ -79,4 +77,4 @@ distclean:: clean ifeq ($(DNX_FAST_MODE),1) -include $(SDK)/tools/dnx/make/lib.mk -endif +endif \ No newline at end of file diff --git a/platform/broadcom/saibcm-modules/make/Make.linux b/platform/broadcom/saibcm-modules/make/Make.linux index ad18872a34eb..83871cdbbe5b 100644 --- a/platform/broadcom/saibcm-modules/make/Make.linux +++ b/platform/broadcom/saibcm-modules/make/Make.linux @@ -1,33 +1,31 @@ # -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# -# # $Id: Make.linux,v 1.18 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # # Common make targets for Linux user and kernel builds included by top # level Linux makefiles @@ -68,6 +66,10 @@ LINUX_MAKE_DIR := $(SDK)/systems/linux/kernel/common endif endif +ifneq (,$(findstring iproc,$(platform))) + ADD_TO_CFLAGS += -DINCLUDE_MTD +endif + ifdef LINUX_MAKE_USER CMD = $(LINUX_MAKE_FLAGS) -C $(LINUX_MAKE_DIR) \ platform=$(platform) bldroot_suffix=/$(platform) kernel_version=$(kernel_version) \ diff --git a/platform/broadcom/saibcm-modules/make/Make.subdirs b/platform/broadcom/saibcm-modules/make/Make.subdirs index 4016cb83202d..2473764aec1c 100644 --- a/platform/broadcom/saibcm-modules/make/Make.subdirs +++ b/platform/broadcom/saibcm-modules/make/Make.subdirs @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Make.subdirs,v 1.8 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # # Make rules/targets for handling subdirectories diff --git a/platform/broadcom/saibcm-modules/make/Make.tools b/platform/broadcom/saibcm-modules/make/Make.tools index 0d55eb2e653a..189abf92c74f 100644 --- a/platform/broadcom/saibcm-modules/make/Make.tools +++ b/platform/broadcom/saibcm-modules/make/Make.tools @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Make.tools,v 1.2 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# SYSNAME := $(shell uname -s) HCC ?=/usr/bin/gcc diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-gts b/platform/broadcom/saibcm-modules/make/Makefile.linux-gts index 293feaf979d6..5ac089618a60 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-gts +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-gts @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-xlr-4_19,v 0.1 Broadcom SDK $ -# $Copyright: (c) 2015 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # # XLR system make file. @@ -45,9 +43,9 @@ #endif # some basic path variables for tools and kernel source, etc # -XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/xlr-510 +XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/gcc12.2 TOOLCHAIN_DIR = $(XLR_TOOLS_BASE)/buildroot/host/usr -KERNDIR = $(XLR_TOOLS_BASE)/kernel/linux +KERNDIR ?= /projects/ntsw-tools/linux/xlr-510/kernel/linux # Target machine for EDK-Host defconfig TARGET_MACHINE ?= x86_64 @@ -72,7 +70,7 @@ export PATH := $(TOOLCHAIN_DIR)/bin:$(KERNDIR):$(PATH) CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_DIR)/bin/$(CROSS_COMPILE)gcc -dumpversion) export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include -# Glibc 2.27 or later version doesn't support SVID libm error handling. +# Glibc 2.27 or later version doesn't support SVID libm error handling. # Building tcl 8.3.3 with the new toolchain will occur errors. export TCL840 := 1 @@ -93,6 +91,10 @@ CFLAGS += -L$(TOOLCHAIN_DIR)/lib64 ifeq (1,$(USE_CLANG)) # CLANG-specific CFLAGS CFLAGS += -Wno-strlcpy-strlcat-size CFLAGS += -Wno-strncat-size +ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 12)" "1" +export LIBNSL_DEPRECATED := 1 +endif + else # GCC-specific CFLAGS CFLAGS += -Wno-error=unused-but-set-variable CFLAGS += -Wno-error=maybe-uninitialized @@ -116,6 +118,11 @@ ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f2 -d.` \== 2)" "1" CFLAGS += -Wno-zero-length-bounds endif endif +ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 12)" "1" + CFGFLAGS += -flarge-source-files + CFGFLAGS += -Wno-error=address + export LIBNSL_DEPRECATED := 1 +endif endif # Compiler-specific CFLAGS #XLDK-568 fix inline references @@ -131,7 +138,12 @@ CFLAGS += -Wno-deprecated-declarations #SDK-233174 # set up KFLAGS appropriately. # ifeq (,$(KFLAGS)) -KFLAGS := -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -I$(KERNDIR) -lc -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -funit-at-a-time -maccumulate-outgoing-args -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm -fconserve-stack +KFLAGS := -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -I$(KERNDIR) -lc -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm +ifneq (1,$(USE_CLANG)) +KFLAGS += -funit-at-a-time -maccumulate-outgoing-args -fconserve-stack +else +KFLAGS += -fno-pie +endif endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc index 9b08d0b2a3d4..c38f713082bb 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-iproc Exp $ -# $Copyright: (c) 2007 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # Makefile for iproc-CMICd # User must select one platform from below.By default ARM_LINUX is selected. . @@ -46,8 +44,8 @@ KERN_BASE_DIR ?= $(TOOLCHAIN_BASE_DIR) TARGET_ARCHITECTURE:=armeb-broadcom-linux-uclibcgnueabi KERNDIR ?= $(TOOLCHAIN_BASE_DIR)/kernel/linux else -TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/XLDK_GCC10/XLDK32 -KERN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk61/XLDK32 +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk62/XLDK32 +KERN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk62/XLDK32 TARGET_ARCHITECTURE:= arm-broadcom-linux-uclibcgnueabi KERNDIR ?= $(KERN_BASE_DIR)/kernel/linux endif @@ -80,7 +78,11 @@ endif CFLAGS += -fno-aggressive-loop-optimizations CFLAGS += -Wno-error=maybe-uninitialized +CFLAGS += -Wno-error=unused-function CFLAGS += -Wno-error=array-bounds +CFLAGS += -Wno-error=unused-variable +CFLAGS += -Wno-error=memset-elt-size #SDK-232626 +CFLAGS += -Wno-error=unused-const-variable CFLAGS += -fgnu89-inline ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1" CFLAGS += -Wno-stringop-overflow @@ -90,21 +92,22 @@ endif ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1" CFLAGS += -Wno-address-of-packed-member endif -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \== 10)" "1" - #There might be a bug in GCC10 that cannot detect initialization correctly. +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1" CFLAGS += -Wno-error=uninitialized CFLAGS += -Wno-error=format-overflow CFLAGS += -fcommon endif +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" + CFLAGS += -flarge-source-files + CFLAGS += -Wno-error=address +endif +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1" + CFLAGS += -Wno-error=enum-int-mismatch +endif CFGFLAGS += -D$(ENDIAN) -DIPROC_CMICD CFGFLAGS += -DBCM_PLATFORM_STRING=\"IPROC_CMICD\" -#XLR-54 -CFLAGS += -Wno-error=memset-elt-size #SDK-232626 -CFLAGS += -Wno-error=unused-function -CFLAGS += -Wno-error=unused-variable -CFLAGS += -Wno-error=unused-const-variable ARCH = arm KBUILD_VERBOSE = 1 @@ -125,7 +128,7 @@ modname_flags = $(if $(filter 1,$(words $(modname))),\ KFLAG_INCLD ?= $(LD_LIBRARY_PATH)/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include ifeq (,$(KFLAGS)) -KFLAGS := -D__LINUX_ARM_ARCH__=7 -D__KERNEL__ -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm/include -I$(KERNDIR)/arch/arm/include/generated -I$(KERNDIR)/arch/arm/mach-iproc/include -Wall -Wstrict-prototypes -Wno-trigraphs -Os -fno-strict-aliasing -fno-common -marm -mabi=aapcs-linux -fno-pic -pipe -msoft-float -ffreestanding -march=armv7-a -mfpu=vfp -mfloat-abi=softfp -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mlong-calls +KFLAGS := -D__LINUX_ARM_ARCH__=7 -D__KERNEL__ -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm/include -I$(KERNDIR)/arch/arm/include/generated -I$(KERNDIR)/arch/arm/mach-iproc/include -Wall -Wstrict-prototypes -Wno-trigraphs -Os -fno-strict-aliasing -fno-common -marm -mabi=aapcs-linux -fno-pic -pipe -msoft-float -ffreestanding -march=armv7-a -mfloat-abi=softfp -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mlong-calls KFLAGS += -I$(LINUX_INCLUDE)/uapi -I$(LINUX_INCLUDE)/generated/uapi -I$(KERNDIR)/arch/arm/include/uapi -I$(KERNDIR)/arch/arm/include/generated/uapi ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \== 10)" "1" diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14 b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14 index 8d9f66aa50a0..61c7ad1d0e54 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14 @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-iproc-3_6,v 1.1 Broadcom SDK $ -# $Copyright: (c) 2007 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # Makefile for iproc-CMICd # User must select one platform from below.By default ARM_LINUX is selected. . diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4 b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4 index bcef1ff69dd4..f60d8c899109 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4 @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-iproc Exp $ -# $Copyright: (c) 2007 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # Makefile for iproc-CMICd # User must select one platform from below.By default ARM_LINUX is selected. . diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 index ac7915be93ee..c98be8a2c04f 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-iproc Exp $ -# $Copyright: (c) 2007 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # Makefile for iproc-CMICd # User must select one platform from below.By default ARM_LINUX is selected. . @@ -34,6 +32,11 @@ ifeq (,$(BUILD_PLATFORM)) BUILD_PLATFORM=ARM_LINUX endif +# Upgrade TCL version from default 8.3 to 8.4 +ifneq ($(ESW_CHIPS)$(LTSW_CHIPS),) +export TCL840 := 1 +endif + # TOOLCHAIN_BASE_DIR Toolchain base directory for iPROC-CMICd devices # TARGET_ARCHITECTURE Compiler for target architecture # KERNDIR Kernel directory for iPROC-CMICd devices @@ -45,8 +48,8 @@ KERN_BASE_DIR ?= $(TOOLCHAIN_BASE_DIR) TARGET_ARCHITECTURE ?= aarch64_be-broadcom-linux-uclibc KERNDIR ?= $(KERN_BASE_DIR)/kernel/linux else -TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/XLDK_GCC10/XLDK64 -KERN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk61/XLDK64 +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk62/XLDK64 +KERN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk62/XLDK64 TARGET_ARCHITECTURE ?= aarch64-broadcom-linux-uclibc KERNDIR ?= $(KERN_BASE_DIR)/kernel/linux endif @@ -56,12 +59,14 @@ CROSS_COMPILE:= $(TARGET_ARCHITECTURE)- endif # A72 tools -TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/bin +# JIRA SONIC-69062 +TOOLCHAIN_BIN_DIR?=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/bin override PATH:=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/$(TARGET_ARCHITECTURE)/bin:$(TOOLCHAIN_BIN_DIR):$(PATH) -LD_LIBRARY_PATH=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/lib +LD_LIBRARY_PATH?=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/lib export TOOLCHAIN_BIN_DIR LD_LIBRARY_PATH CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_BIN_DIR)/$(CROSS_COMPILE)gcc -dumpversion) +CROSS_GCC_VER_MAJOR := $(shell echo $(CROSS_GCC_VER) | cut -f1 -d.) # Default Linux include directory ifeq (,$(LINUX_INCLUDE)) @@ -84,19 +89,26 @@ CFLAGS += -Wno-error=unused-function CFLAGS += -Wno-error=array-bounds CFLAGS += -Wno-error=format-overflow CFLAGS += -fgnu89-inline -ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 8)" "1" +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1" CFLAGS += -Wno-stringop-overflow CFLAGS += -Wno-stringop-truncation CFLAGS += -Wno-error=restrict endif -ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 9)" "1" +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1" CFLAGS += -Wno-address-of-packed-member endif -ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 10)" "1" +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1" CFLAGS += -Wno-error=uninitialized CFLAGS += -Wno-error=format-overflow CFLAGS += -fcommon endif +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" + CFLAGS += -flarge-source-files + CFLAGS += -Wno-error=address +endif +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1" + CFLAGS += -Wno-error=enum-int-mismatch +endif CFGFLAGS += -D$(ENDIAN) -DIPROC_CMICD CFGFLAGS += -DBCM_PLATFORM_STRING=\"IPROC_CMICD\" @@ -119,7 +131,7 @@ basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" modname_flags = $(if $(filter 1,$(words $(modname))),\ -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") -KFLAG_INCLD ?= $(LD_LIBRARY_PATH)/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include +KFLAG_INCLD ?= $(LD_LIBRARY_PATH)/../gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include ifeq (,$(KFLAGS)) KFLAGS := -D__LINUX_ARM_ARCH__=8 -D__KERNEL__ -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm64/include -I$(KERNDIR)/arch/arm64/include/generated -I$(KERNDIR)/arch/arm64/include/generated/uapi -I$(KERNDIR)/arch/arm64/include/generated/asm -I$(KERNDIR)/include/uapi -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/arch/arm64/include/uapi -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -fno-pic -pipe -ffreestanding -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mcmodel=large diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel index 34663445b8a3..37416d5897a4 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-kernel,v 1.27 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # Configuration Flags diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6 index c0e8f084e9f0..229eee533163 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6 @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-kernel-2_6,v 1.40 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # Configuration Flags @@ -39,11 +37,11 @@ FEATURE_EXCLUDE_LIST = $(sort $(_FEATURE_EXCLUDE_LIST)) # Conditionally Replaces DEFAULT var ifeq ($(origin CC),default) -CC = $(LSRUN) $(CROSS_COMPILE)gcc +CC = $(strip $(LSRUN) $(CROSS_COMPILE)gcc) else # If using CLANG then revert the CC to default gcc tool ifeq ($(USE_CLANG),1) -CC = $(LSRUN) $(CROSS_COMPILE)gcc +CC = $(strip $(LSRUN) $(CROSS_COMPILE)gcc) endif endif @@ -53,6 +51,11 @@ endif ifeq ($(origin LD),default) LD = $(CROSS_COMPILE)ld +else +# If using CLANG then revert the LD to default gcc tool +ifeq ($(USE_CLANG),1) +LD = $(CROSS_COMPILE)ld +endif endif ifeq ($(origin AR),default) diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6 index a454ea16bad8..f5c51de59f5b 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6 @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-kernel-3_6,v 1.2 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # Configuration Flags diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_18 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_18 new file mode 100644 index 000000000000..535222656875 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_18 @@ -0,0 +1,161 @@ +# $Id: Makefile.linux-kernel-4_18,v 1.00 $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +# Configuration Flags + +# Filter out features that cannot or should not be supported in kernel mode + +_FEATURE_EXCLUDE_LIST += EDITLINE TCL OOB_RCPU CINT APIMODE DUNE_UI C_UNIT +FEATURE_EXCLUDE_LIST = $(sort $(_FEATURE_EXCLUDE_LIST)) + +# Tools + +# Conditionally Replaces DEFAULT var +ifeq ($(origin CC),default) +CC = $(LSRUN) $(CROSS_COMPILE)gcc +else +# If using CLANG then revert the CC to default gcc tool +ifeq ($(USE_CLANG),1) +CC = $(LSRUN) $(CROSS_COMPILE)gcc +endif +endif + +ifeq ($(origin CXX),default) +CXX = $(CROSS_COMPILE)g++ +endif + +ifeq ($(origin LD),default) +LD = $(CROSS_COMPILE)ld +endif + +ifeq ($(origin AR),default) +AR = $(CROSS_COMPILE)gcc-ar +endif + +ifeq ($(origin AS),default) +AS = $(CROSS_COMPILE)as +endif + +ifeq ($(origin ARFLAGS),default) + ARFLAGS = -rc +endif + +STRIP = $(CROSS_COMPILE)strip +RANLIB = $(CROSS_COMPILE)gcc-ranlib +OBJCOPY = $(CROSS_COMPILE)objcopy +NM = $(CROSS_COMPILE)gcc-nm + +# Handle differences between gcc 2.x and gcc 3.x +gcc-tune-flag = $(shell if ${CC} -dumpspecs | grep mcpu >/dev/null; then echo cpu; else echo tune; fi) + +# Configuration Variables + +# OSType Defines: This defines the type of RTOS or microkernel which you +# are compiling the SAL (and its associated driver) for. New platforms +# can be created by porting the routines (system.c) to your platform and +# adding the define in this Makefile. +OSTYPE = LINUX + +# +# ORIGIN is used to Optionally select different CFLAGS. It is used to import +# source from other vendors. If SOURCE=Broadcom, then the BCM_ flags are added +# to those passed to the compiler. If SOURCE != Broadcom, BCM_ flags are NOT +# added. +# +# Default specifies Broadcom +# +ifndef ORIGIN + ORIGIN = Broadcom +endif + +# +# STD_{C|CPP|CXX}FLAGS - Standard flags used by ALL compilations +# BCM_{C|CPP|CXX}FLAGS - Flags used for Broadcom source files +# OPT_{C|CPP|CXX}FLAGS - Defined in local make files BEFORE inclusion of +# this Makefile, to define local "Extra" flags. +# +ifdef IPROC_BUILD +CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \ + -I$(SDK)/systems/bde/linux/include \ + -I$(LINUX_INCLUDE) \ + -I$(LINUX_INCLUDE)/uapi \ + -I$(LINUX_INCLUDE)/generated/uapi \ + -I$(KERNDIR)/arch/$(ARCH) \ + -I$(KERNDIR)/arch/$(ARCH)/include/uapi \ + -I$(KERNDIR)/arch/$(ARCH)/include/generated \ + -I$(KERNDIR)/arch/$(ARCH)/include/generated/uapi +else +CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \ + -I$(SDK)/systems/bde/linux/include \ + -I$(LINUX_INCLUDE) \ + -I$(LINUX_INCLUDE)/asm/gcc \ + -I$(LINUX_INCLUDE)/asm/mach-generic \ + -I$(LINUX_INCLUDE)/uapi \ + -I$(LINUX_INCLUDE)/generated/uapi \ + -I$(KERNDIR)/arch/$(ARCH) \ + -I$(KERNDIR)/arch/$(ARCH)/include/uapi \ + -I$(KERNDIR)/arch/$(ARCH)/include/generated \ + -I$(KERNDIR)/arch/$(ARCH)/include/generated/uapi +endif + +CFGFLAGS += -DNO_FILEIO -DNO_CTRL_C -DNO_MEMTUNE + +CFGFLAGS += -D$(OSTYPE) + +# No user sal for the linux kernel +# NO_SAL_APPL=1 + +STD_CFLAGS = $(KFLAGS) $(CFGFLAGS) + + +STD_CPPFLAGS = ${STD_CFLAGS} +STD_CXXFLAGS = ${STD_CFLAGS} + +ifndef BCM_CFLAGS +BCM_CFLAGS = -Wall -Werror +endif + +BCM_CPPFLAGS = ${BCM_CFLAGS} +BCM_CXXFLAGS = ${BCM_CFLAGS} + +ifeq (${ORIGIN}, Broadcom) + CFLAGS += ${STD_CFLAGS} ${BCM_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${BCM_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${BCM_CXXFLAGS} ${OPT_CXXFLAGS} +else + CFLAGS += ${STD_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${OPT_CXXFLAGS} +endif + +# +# Ignore pedantic flag for kernel modules +# +ifdef DEBUG_PEDANTIC +DEBUG_PEDANTIC = FALSE +endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4 index 6fcb9a9d1590..10cfd9cd9e22 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4 @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-kernel-2_6,v 1.40 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # Configuration Flags diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule b/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule index d3a41f3824b0..e14b6cd89b96 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-kmodule-3_6,v 1.2 Broadcom SDK $ -# $Copyright: (c) 2006 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # Due to the extensive use of driver libraries, the SDK usually builds # kernel modules from a precompiled object. To avoid various warnings @@ -39,11 +37,17 @@ # module symbol versions. The symbol source file should be passed to # this Makefile via the MODULE_SYM variable. +# +# Do not remove this assignment of LOCALDIR. +# It is used as an input flag for Make.config +LOCALDIR = . MODULE := $(MOD_NAME).o KMODULE := $(MOD_NAME).ko obj-m := $(MODULE) -SAVE_CFLAGS := ${CFLAGS} +# Get CFGFLAGS, but ignore CFLAGS +include $(SDK)/make/Make.config +CFLAGS := ifeq (1,$(NO_PRECOMPILED_MODULE)) # { @@ -52,26 +56,26 @@ ifeq (1,$(NO_PRECOMPILED_MODULE)) # of pointer-to-int and the other way round. So, we need to silence them. # Apart from that, we need a search path on the kernel's 'include' and the various # SDK 'include' directories. -# It is not clear why they need to be repeated in EXTRA_CFLAGS (probably because -# of the compilation cycle which is done within the SDK environment). # ccflags-y := \ -Wno-pointer-to-int-cast \ -Wno-int-to-pointer-cast \ - -I$(KERNDIR)/include \ -I$(SDK)/include \ -I$(SDK)/systems/bde/linux/include \ -I$(SDK)/systems/bde/shared/include \ -I$(SDK)/systems/linux/kernel/modules/include -include $(SDK)/make/Make.config # -# For compilation of all module files on linux environment, make sure -# all CFLAGS are passed to the module. This was not required when a -# 'precompiled' object was used since it automatically got all these flags. +# For compilation of all module files in Linux environment, make sure +# all configuration flags (CFGFLAGS) are passed to the module. This +# was not required when a 'precompiled' object was used since it +# automatically got all these flags. # -ccflags-y += $(KFLAGS) -ccflags-y += $(CFLAGS) +ccflags-y += $(CFGFLAGS) $(LKM_BUILD_INFO) + +# Required for older kernels +export EXTRA_CFLAGS := $(ccflags-y) + # # Reach here if this makefile is invoked # from systems\bde\linux\kernel (module name: linux-kernel-bde.ko). @@ -79,24 +83,11 @@ ccflags-y += $(CFLAGS) # from systems/linux/kernel/modules/bcm-knet (module name: linux-bcm-knet) # from systems/linux/kernel/modules/knet-cb (module name: linux-knet-cb) $(MOD_NAME)-y := $(MOD_OBJS) -# -# If, for any reason, the definition of CROSS_COMPILE was erased, then -# set it, again. -# -ifeq ($(CROSS_COMPILE),) -CROSS_COMPILE = /tools/bin/ -endif -export CROSS_COMPILE # } else # { PRE_COMPILED_OBJ := obj_$(MOD_NAME).o $(MOD_NAME)-y := $(MODULE_SYM) $(PRE_COMPILED_OBJ) -ifeq (,$(CROSS_COMPILE)) -export CROSS_COMPILE -endif - -include $(SDK)/make/Make.config # } endif @@ -112,13 +103,13 @@ A := ARCH=$(ARCH) export ARCH endif +ifeq (,$(CROSS_COMPILE)) +export CROSS_COMPILE +endif + # Provide an option in case kernel was built in separate directory KERNBLDDIR ?= $(KERNDIR) -# -# Standard SDK include path for building source files that export -# kernel symbols. -# -override EXTRA_CFLAGS = -I${SDK}/include -I${SDK}/systems/linux/kernel/modules/include -I${SDK}/systems/bde/linux/include + # # If, for any reason, the definition of LD was erased, then # set it, again. @@ -126,6 +117,7 @@ override EXTRA_CFLAGS = -I${SDK}/include -I${SDK}/systems/linux/kernel/modules/i ifeq ($(LD),) LD = $(CROSS_COMPILE)ld endif + ifeq (1,$(NO_PRECOMPILED_MODULE)) # { $(KMODULE): @@ -136,7 +128,8 @@ $(KMODULE): # This make creates the module's object. It, somehow, runs two cycls, one in SDK environment # and one in the kernel's directory. # - $(MAKE) -C $(KERNBLDDIR) CROSS_COMPILE=$(CROSS_COMPILE) LD=$(LD) M=$(PWD) modules + $(MAKE) -C $(KERNBLDDIR) CROSS_COMPILE=$(CROSS_COMPILE) LD=$(LD) M=$(PWD) \ + quiet=$(quiet) KBUILD_VERBOSE=$(KBUILD_VERBOSE) modules if [ ! -f Module.symvers ]; then echo "old kernel (pre-2.6.17)" > Module.symvers; fi cp -f $(KMODULE) $(LIBDIR) # } @@ -158,6 +151,3 @@ $(KMODULE): rm -f $(PRE_COMPILED_OBJ)_shipped # } endif - -EXTRA_CFLAGS = $(CFLAGS) -CFLAGS := ${SAVE_CFLAGS} diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-slk b/platform/broadcom/saibcm-modules/make/Makefile.linux-slk index de6322fceb74..fe20b9d5892c 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-slk +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-slk @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-slk-3_14,v 1.2 Broadcom SDK $ -# $Copyright: (c) 2013 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # Makefile for SLK(BCM957812) # User must select one platform from below.By default ARM_LINUX is selected. . @@ -34,6 +32,11 @@ ifeq (,$(BUILD_PLATFORM)) BUILD_PLATFORM=ARM_LINUX endif +# Upgrade TCL version from default 8.3 to 8.4 +ifneq ($(ESW_CHIPS)$(LTSW_CHIPS),) +export TCL840 := 1 +endif + # Toolchain base directory for NS2 XMC card ifeq (BE,$(ENDIAN_MODE)) TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/toolchains/slk/linaro-be @@ -85,7 +88,13 @@ CFGFLAGS += -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS endif CFGFLAGS += -DPHYS_ADDRS_ARE_64BITS +ifeq (1,$(USE_CLANG)) +CLANG_ADD_CFLAGS += --target=$(TARGET_ARCHITECTURE) --gcc-toolchain=$(TOOLCHAIN_BASE_DIR) --sysroot=$(TOOLCHAIN_BASE_DIR)/$(TARGET_ARCHITECTURE)/libc +export KERNEL_LLVM = 0 +OPT_KERNEL_TOOLCHAIN = CC=$(CROSS_COMPILE)gcc LD=$(CROSS_COMPILE)ld AR=$(CROSS_COMPILE)ar +else CFLAGS += -Wno-unused-value -Wno-unused-but-set-variable -Wno-sizeof-pointer-memaccess -fno-aggressive-loop-optimizations +endif ifdef DPP_CHIPS CFLAGS += -DDUNE_BCM -D__DUNE_LINUX_BCM_CPU_PCP_DMA__ @@ -136,7 +145,7 @@ CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_BIN_DIR)/$(CROSS_COMPILE)gcc -dumpversion) KFLAG_INCLD = $(TOOLCHAIN_BASE_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include ifeq (,$(KFLAGS)) -KFLAGS := -D__LINUX_ARM_ARCH__=8 -D__KERNEL__ -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm64/include -I$(KERNDIR)/arch/arm64/include/generated -I$(KERNDIR)/arch/arm64/include/generated/asm -I$(KERNDIR)/include/uapi -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/arch/arm64/include/uapi -Wall -Wstrict-prototypes -Wno-trigraphs -Os -fno-strict-aliasing -fno-common -fno-pic -pipe -ffreestanding -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign +KFLAGS := -D__LINUX_ARM_ARCH__=8 -D__KERNEL__ -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm64/include -I$(KERNDIR)/arch/arm64/include/generated -I$(KERNDIR)/arch/arm64/include/generated/asm -I$(KERNDIR)/include/uapi -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/arch/arm64/include/uapi -Wall -Wstrict-prototypes -Wno-trigraphs -Os -fno-strict-aliasing -fno-common -fno-pic -pipe -ffreestanding -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -Wno-unused-but-set-variable endif ifdef LTSW_CHIPS diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10 new file mode 100644 index 000000000000..4463b1c88b3b --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10 @@ -0,0 +1,262 @@ +# $Id: Makefile.linux-gts,v 0.1 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +# +# x86_64 build for Fedora 28 - system make file. +# +# + + +############################################################################# +# this segment is custom and not sourced from any existing makefile # +# (base thanks to http:confluence.broadcom.com/display/NTSWSW/X86+System) # +############################################################################# + +# set up a basic feature list. tcl, etc. # +#ifeq (,$(FEATURE_LIST)) +#FEATURE_LIST = TCL BFD PTP CINT L3 I2C MEM_SCAN EDITLINE BCM_SAL_PROFILE CUSTOMER TEST CHASSIS MSTP RCPU +#endif + +# some basic path variables for tools and kernel source, etc # + +ifeq (1,$(NO_PRECOMPILED_MODULE)) +# { +# +# This is set due to some issue in binutils which has been fixed, apparently, in versions beyond 2.32. +# If this is not used, an error 'File format not recognized' is ejected and the compilation fails. +# +export BINUTILSVER := 2.33.1 +# } +else +# { +export BINUTILSVER := 2.38 +# } +endif +# +# For ESW compilation, suppress 'stringop-overflow' +# +ifeq ($(BCM_ESW_SUPPORT),1) + CFGFLAGS += -Wno-error=stringop-overflow +endif +ifeq (1,$(GCC_12_1_0)) + export BINUTILSVER := 2.38 + export GCCVER := 12.1.0 + TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER) + CFGFLAGS += -Wno-error=address + CFGFLAGS += -Wno-error=format + CFGFLAGS += -Wno-error=long-long + CFGFLAGS += -Wno-error=pedantic + CFGFLAGS += -Wno-variadic-macros + CFGFLAGS += -Wno-error=overlength-strings +else ifeq (1,$(GCC_13_1_0)) + export BINUTILSVER := 2.38 + export GCCVER := 13.1.0 + TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/13.1.0 + ifneq ($(DEBUG_OPTIMIZE),FALSE) + # { + # These flags are required for -O2 'optimized' compilation + # + CFGFLAGS += -Wno-error=stringop-truncation + CFGFLAGS += -Wno-error=array-bounds= + # } + endif + CFGFLAGS += -Wno-error=address + CFGFLAGS += -Wno-error=enum-int-mismatch + CFGFLAGS += -Wno-error=format + CFGFLAGS += -Wno-variadic-macros +else + export BINUTILSVER := 2.38 + export GCCVER := 11.2.0 + TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/11.2.0-x86_64 + ifneq ($(USE_CLANG),1) + CFGFLAGS += -Wno-error=sizeof-array-div + CFGFLAGS += -Wno-error=stringop-truncation + CFGFLAGS += -Wno-error=maybe-uninitialized + CFGFLAGS += -Wno-error=stringop-overread + CFGFLAGS += -Wno-error=format-overflow + CFGFLAGS += -Wno-error=array-bounds + endif +endif + +BINUTILS_DIR = /tools/oss/packages/x86_64-rhel7/binutils/$(BINUTILSVER)/bin +export TCL860 := 1 + +# For GCC versions >= 4.7 +USE_GCC_TOOLS := 1 +#enables executables > 2GB +#CFLAGS += -mcmodel=medium + +TARGET_MACHINE ?= x86_64 +KERNDIR ?= /projects/ntsw-tools/linux/x86-kernel-5.10.67 + +# set up cross compile prefix, tools dir variables. # +#export CROSS_COMPILE := x86_64-fedora-linux-gnu- +export TOOLS_DIR := $(TOOLCHAIN_DIR)/bin + +# architecture. # +ARCH = x86_64 +#TARGET_ARCHITECTURE = x86_64-fedora-linux-gnu +TARGET_ARCHITECTURE := x86_64-pc-linux-gnu +TOOLCHAIN_BASE_DIR := $(TOOLCHAIN_DIR) + +ifeq (,$(BUILD_32BITS_EXEC)) +TOOLCHAIN_LIB_DIR:= $(TOOLCHAIN_DIR)/lib64 +else +TOOLCHAIN_LIB_DIR:= $(TOOLCHAIN_DIR)/lib +endif +# set up paths. # +#export LIBRARY_PATH := $(TOOLCHAIN_LIB_DIR):$(LIBRARY_PATH) +export PATH := $(TOOLS_DIR):$(BINUTILS_DIR):$(KERNDIR):$(PATH) + +# set up SYSINC path # +export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(GCCVER)/include + +# CFLAGS/CFGFLAGS # +ifdef SAND_CHIPS +CFLAGS += -D__DUNE_GTS_BCM_CPU__ +endif +CFLAGS += -DUSE_LINUX_BDE_MMAP=1 +#CFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT +# +#Flags to prevent gcc 8.1.0 new warnings to appear as errors. +#(All these flags have been removed so as to activate the maximal types of +#warning) +# +#CFLAGS += -Wno-error=unused-value +#CFLAGS += -Wno-error=unused-but-set-variable +#CFLAGS += -Wno-error=maybe-uninitialized +#CFLAGS += -Wno-error=aggressive-loop-optimizations +#CFLAGS += -Wno-error=array-bounds + +# set up KFLAGS appropriately. # +# -fno-builtin needed for using kernel's version of memcpy instead of the gcc inline version +ifeq (,$(KFLAGS)) +# { + KFLAGS := -I$(KERNDIR) -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/asm -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wno-error=unused-value -Wno-error=cpp -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -O2 -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -funit-at-a-time -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -Wframe-larger-than=1024 -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-strict-overflow -fno-dwarf2-cfi-asm -fno-builtin + # + # Current version of CLANG seems to not recognize some of the options of kernel FLAGS. + # +ifneq (1,$(USE_CLANG)) +# { + KFLAGS += -Wno-error=maybe-uninitialized -lc -fno-delete-null-pointer-checks -maccumulate-outgoing-args -fconserve-stack -mpreferred-stack-boundary=3 +# } +else +# { + KFLAGS += -Wno-error=address-of-packed-member +# } +endif +ifeq (1,$(NO_PRECOMPILED_MODULE)) +# { + KFLAGS += -DNO_PRECOMPILED_MODULE=1 + export KFLAGS +# } +else +# { + KFLAGS += -DNO_PRECOMPILED_MODULE=0 +# } +endif + +# } +endif + + +###################################################################### +# this segment comes from make/Makefile.linux-x86-smp_generic_64-2_6 # +###################################################################### +CFGFLAGS += -DSAL_SPL_LOCK_ON_IRQ + +ifeq (,$(BUILD_32BITS_EXEC)) +CFLAGS += -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS +else +CFLAGS += -m32 +EXTRA_USER_LDFLAGS += -m32 +CFGFLAGS += -DSAL_BDE_32BIT_USER_64BIT_KERNEL +endif +CFLAGS += -DPHYS_ADDRS_ARE_64BITS + + +########################################################################################### +# This segment comes from make/Makefile.linux-x86-generic-common-2_6 (with modifications) # +########################################################################################### + +# Default architecture +ifeq (,$(ARCH)) +ARCH = x86_64 +endif + +# Noisy kernel build +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE KERNDIR + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +# autoconf.h was moved in later kernels +AUTOCONF = $(KERNDIR)/include/generated/autoconf.h +ifeq (,$(shell ls $(AUTOCONF) 2>/dev/null)) +AUTOCONF = $(KERNDIR)/include/linux/autoconf.h +endif + +# gcc system include path +#SYSINC = $(shell gcc -print-search-dirs | grep install | cut -c 10-)include + + +############################################################## +# This segment comes from make/Makefile.linux-x86-common-2_6 # +############################################################## +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 +ENDIAN = LE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"X86\" +CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32 + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ +-D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +ifneq (, $(EDKHOST)) +# Default open source target build +OPENSRC_BUILD ?= fed21-x86_64 +endif + +ifneq ($(targetplat),user) +# By default we exclude -Werror from x86 kernel builds +BCM_CFLAGS = -Wall +include ${SDK}/make/Makefile.linux-kernel-4_18 +endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28 new file mode 100644 index 000000000000..5e86e1d579f2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28 @@ -0,0 +1,270 @@ +# $Id: Makefile.linux-gts,v 0.1 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +# +# x86_64 build for Fedora 28 - system make file. +# +# + + +############################################################################# +# this segment is custom and not sourced from any existing makefile # +# (base thanks to http:confluence.broadcom.com/display/NTSWSW/X86+System) # +############################################################################# + +# set up a basic feature list. tcl, etc. # +#ifeq (,$(FEATURE_LIST)) +#FEATURE_LIST = TCL BFD PTP CINT L3 I2C MEM_SCAN EDITLINE BCM_SAL_PROFILE CUSTOMER TEST CHASSIS MSTP RCPU +#endif + +# some basic path variables for tools and kernel source, etc # + +ifeq (1,$(NO_PRECOMPILED_MODULE)) +# { +# +# This is set due to some issue in binutils which has been fixed, apparently, in versions beyond 2.32. +# If this is not used, an error 'File format not recognized' is ejected and the compilation fails. +# +export BINUTILSVER := 2.33.1 +# } +else +# { +export BINUTILSVER := 2.38 +# } +endif + +# +# For ESW compilation, suppress 'stringop-overflow' +# +ifeq ($(BCM_ESW_SUPPORT),1) + CFGFLAGS += -Wno-error=stringop-overflow +endif +ifeq (1,$(GCC_11_2_0)) + export BINUTILSVER := 2.38 + export GCCVER := 11.2.0 + TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/11.2.0-x86_64 + CFGFLAGS += -Wno-error=stringop-truncation + CFGFLAGS += -Wno-error=maybe-uninitialized + CFGFLAGS += -Wno-error=stringop-overread + CFGFLAGS += -Wno-error=format-overflow + CFGFLAGS += -Wno-error=array-bounds +else + ifeq (1,$(GCC_12_1_0)) + export BINUTILSVER := 2.38 + export GCCVER := 12.1.0 + TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER) + CFGFLAGS += -Wno-error=address + CFGFLAGS += -Wno-error=format + CFGFLAGS += -Wno-error=long-long + CFGFLAGS += -Wno-error=pedantic + CFGFLAGS += -Wno-variadic-macros + CFGFLAGS += -Wno-error=overlength-strings + else + ifeq (1,$(GCC_13_1_0)) + export BINUTILSVER := 2.38 + export GCCVER := 13.1.0 + TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/13.1.0 + ifneq ($(DEBUG_OPTIMIZE),FALSE) + # { + # These flags are required for -O2 'optimized' compilation + # + CFGFLAGS += -Wno-error=stringop-truncation + CFGFLAGS += -Wno-error=array-bounds= + # } + endif + CFGFLAGS += -Wno-error=address + CFGFLAGS += -Wno-error=enum-int-mismatch + CFGFLAGS += -Wno-error=format + CFGFLAGS += -Wno-variadic-macros + else + export GCCVER := 8.1.0 + TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER) + endif + endif +endif +BINUTILS_DIR = /tools/oss/packages/x86_64-rhel7/binutils/$(BINUTILSVER)/bin +export TCL860 := 1 + +# For GCC versions >= 4.7 +USE_GCC_TOOLS := 1 +#enables executables > 2GB +#CFLAGS += -mcmodel=medium + +TARGET_MACHINE ?= x86_64 +ifeq (1,$(KERNEL_5_10)) +KERNDIR ?= /projects/ntsw-tools/linux/x86-kernel-5.10.67 +else +KERNDIR ?= /projects/ntsw-tools/linux/x86-kernel-4.18.12 +endif + +# set up cross compile prefix, tools dir variables. # +#export CROSS_COMPILE := x86_64-fedora-linux-gnu- +export TOOLS_DIR := $(TOOLCHAIN_DIR)/bin + +# architecture. # +ARCH = x86_64 +#TARGET_ARCHITECTURE = x86_64-fedora-linux-gnu +TARGET_ARCHITECTURE := x86_64-pc-linux-gnu +TOOLCHAIN_BASE_DIR := $(TOOLCHAIN_DIR) + +ifeq (,$(BUILD_32BITS_EXEC)) +TOOLCHAIN_LIB_DIR:= $(TOOLCHAIN_DIR)/lib64 +else +TOOLCHAIN_LIB_DIR:= $(TOOLCHAIN_DIR)/lib +endif +# set up paths. # +#export LIBRARY_PATH := $(TOOLCHAIN_LIB_DIR):$(LIBRARY_PATH) +export PATH := $(TOOLS_DIR):$(BINUTILS_DIR):$(KERNDIR):$(PATH) + +# set up SYSINC path # +export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(GCCVER)/include + +# CFLAGS/CFGFLAGS # +ifdef SAND_CHIPS +CFGFLAGS += -D__DUNE_GTS_BCM_CPU__ +endif +CFGFLAGS += -DUSE_LINUX_BDE_MMAP=1 +#CFGFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT +# +#Flags to prevent gcc 8.1.0 new warnings to appear as errors. +#(All these flags have been removed so as to activate the maximal types of +#warning) +# +#CFLAGS += -Wno-error=unused-value +#CFLAGS += -Wno-error=unused-but-set-variable +#CFLAGS += -Wno-error=maybe-uninitialized +#CFLAGS += -Wno-error=aggressive-loop-optimizations +#CFLAGS += -Wno-error=array-bounds + +# set up KFLAGS appropriately. # +# -fno-builtin needed for using kernel's version of memcpy instead of the gcc inline version +ifeq (,$(KFLAGS)) +# { + KFLAGS := -I$(KERNDIR) -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/asm -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wno-error=unused-value -Wno-error=cpp -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -O2 -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -funit-at-a-time -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -Wframe-larger-than=1024 -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-strict-overflow -fno-dwarf2-cfi-asm -fno-builtin + # + # Current version of CLANG seems to not recognize some of the options of kernel FLAGS. + # +ifneq (1,$(USE_CLANG)) +# { + KFLAGS += -Wno-error=maybe-uninitialized -lc -fno-delete-null-pointer-checks -maccumulate-outgoing-args -fconserve-stack -mpreferred-stack-boundary=3 +# } +else +# { + OPTFLAGS += -Wno-error=address-of-packed-member +# } +endif +ifeq (1,$(NO_PRECOMPILED_MODULE)) +# { + KFLAGS += -DNO_PRECOMPILED_MODULE=1 + export KFLAGS +# } +else +# { + KFLAGS += -DNO_PRECOMPILED_MODULE=0 +# } +endif + +# } +endif + + +###################################################################### +# this segment comes from make/Makefile.linux-x86-smp_generic_64-2_6 # +###################################################################### +CFGFLAGS += -DSAL_SPL_LOCK_ON_IRQ + +ifeq (,$(BUILD_32BITS_EXEC)) +CFGFLAGS += -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS +else +CFLAGS += -m32 +EXTRA_USER_LDFLAGS += -m32 +CFGFLAGS += -DSAL_BDE_32BIT_USER_64BIT_KERNEL +endif +CFGFLAGS += -DPHYS_ADDRS_ARE_64BITS + + +########################################################################################### +# This segment comes from make/Makefile.linux-x86-generic-common-2_6 (with modifications) # +########################################################################################### + +# Default architecture +ifeq (,$(ARCH)) +ARCH = x86_64 +endif + +# Noisy kernel build +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE KERNDIR + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +# autoconf.h was moved in later kernels +AUTOCONF = $(KERNDIR)/include/generated/autoconf.h +ifeq (,$(shell ls $(AUTOCONF) 2>/dev/null)) +AUTOCONF = $(KERNDIR)/include/linux/autoconf.h +endif + +# gcc system include path +#SYSINC = $(shell gcc -print-search-dirs | grep install | cut -c 10-)include + + +############################################################## +# This segment comes from make/Makefile.linux-x86-common-2_6 # +############################################################## +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 +ENDIAN = LE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"X86\" +CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32 + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ +-D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +ifneq (, $(EDKHOST)) +# Default open source target build +OPENSRC_BUILD ?= fed21-x86_64 +endif + +ifneq ($(targetplat),user) +# By default we exclude -Werror from x86 kernel builds +BCM_CFLAGS = -Wall +include ${SDK}/make/Makefile.linux-kernel-4_18 +endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6 index dbd51ee1f627..b888606ec2a6 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6 @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-x86-common-2_6,v 1.13 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 ENDIAN = LE_HOST=1 diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 index 4b02aa53cda8..726c2ea29e80 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-x86-generic-common-2_6,v 1.2 Broadcom SDK $ -# $Copyright: (c) 2008 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # Default kernel source directory ifeq (,$(KERNDIR)) diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 index 2f6b54f1b994..e34cc42b3054 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-x86-smp_generic_64-2_6,v 1.5 Broadcom SDK $ -# $Copyright: (c) 2008 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# CFGFLAGS += -DLONGS_ARE_64BITS CFGFLAGS += -DPTRS_ARE_64BITS @@ -36,9 +34,11 @@ CFGFLAGS += -DSAL_SPL_LOCK_ON_IRQ include ${SDK}/make/Makefile.linux-x86-generic-common-2_6 ifeq (,$(KFLAGS)) -KFLAGS := -nostdinc -isystem $(SYSINC) -I$(KERNDIR)/include -I$(KERNDIR)/arch/x86/include -include $(AUTOCONF) -D__KERNEL__ -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Werror-implicit-function-declaration -Wno-format-security -fno-delete-null-pointer-checks -Os -m64 -mtune=generic -mno-red-zone -fno-pie -mcmodel=kernel -funit-at-a-time -maccumulate-outgoing-args -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -fno-stack-protector -fomit-frame-pointer -g -Wdeclaration-after-statement -Wno-pointer-sign +KFLAGS := -nostdinc -isystem $(SYSINC) -I$(KERNDIR)/include -I$(KERNDIR)/arch/x86/include -include $(AUTOCONF) -D__KERNEL__ -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Werror-implicit-function-declaration -Wno-format-security -fno-delete-null-pointer-checks -Os -m64 -mtune=generic -mno-red-zone -fno-pie -mcmodel=kernel -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -fno-stack-protector -fomit-frame-pointer -g -Wdeclaration-after-statement -Wno-pointer-sign +ifneq (1,$(USE_CLANG)) +KFLAGS += -funit-at-a-time -maccumulate-outgoing-args +endif endif - LINUX_UAPI = $(LINUX_INCLUDE)/uapi ifneq (,$(shell ls $(LINUX_UAPI) 2>/dev/null)) @@ -58,8 +58,10 @@ SYSTEM_INTERFACE ?= ngbde # Turn on direct register access if running on real hardware. ifeq (ngbde,$(SYSTEM_INTERFACE)) +ifeq (,$(EXTRA_SYSTEM_INTERFACES)) LTSW_ADD_CPPFLAGS += -DBCMDRD_CONFIG_MEMMAP_DIRECT=1 endif +endif export SYSTEM_INTERFACE endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr b/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr index 293feaf979d6..5ac089618a60 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr @@ -1,32 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-xlr-4_19,v 0.1 Broadcom SDK $ -# $Copyright: (c) 2015 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # # XLR system make file. @@ -45,9 +43,9 @@ #endif # some basic path variables for tools and kernel source, etc # -XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/xlr-510 +XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/gcc12.2 TOOLCHAIN_DIR = $(XLR_TOOLS_BASE)/buildroot/host/usr -KERNDIR = $(XLR_TOOLS_BASE)/kernel/linux +KERNDIR ?= /projects/ntsw-tools/linux/xlr-510/kernel/linux # Target machine for EDK-Host defconfig TARGET_MACHINE ?= x86_64 @@ -72,7 +70,7 @@ export PATH := $(TOOLCHAIN_DIR)/bin:$(KERNDIR):$(PATH) CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_DIR)/bin/$(CROSS_COMPILE)gcc -dumpversion) export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include -# Glibc 2.27 or later version doesn't support SVID libm error handling. +# Glibc 2.27 or later version doesn't support SVID libm error handling. # Building tcl 8.3.3 with the new toolchain will occur errors. export TCL840 := 1 @@ -93,6 +91,10 @@ CFLAGS += -L$(TOOLCHAIN_DIR)/lib64 ifeq (1,$(USE_CLANG)) # CLANG-specific CFLAGS CFLAGS += -Wno-strlcpy-strlcat-size CFLAGS += -Wno-strncat-size +ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 12)" "1" +export LIBNSL_DEPRECATED := 1 +endif + else # GCC-specific CFLAGS CFLAGS += -Wno-error=unused-but-set-variable CFLAGS += -Wno-error=maybe-uninitialized @@ -116,6 +118,11 @@ ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f2 -d.` \== 2)" "1" CFLAGS += -Wno-zero-length-bounds endif endif +ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 12)" "1" + CFGFLAGS += -flarge-source-files + CFGFLAGS += -Wno-error=address + export LIBNSL_DEPRECATED := 1 +endif endif # Compiler-specific CFLAGS #XLDK-568 fix inline references @@ -131,7 +138,12 @@ CFLAGS += -Wno-deprecated-declarations #SDK-233174 # set up KFLAGS appropriately. # ifeq (,$(KFLAGS)) -KFLAGS := -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -I$(KERNDIR) -lc -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -funit-at-a-time -maccumulate-outgoing-args -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm -fconserve-stack +KFLAGS := -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -I$(KERNDIR) -lc -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm +ifneq (1,$(USE_CLANG)) +KFLAGS += -funit-at-a-time -maccumulate-outgoing-args -fconserve-stack +else +KFLAGS += -fno-pie +endif endif diff --git a/platform/broadcom/saibcm-modules/sdklt/Makefile b/platform/broadcom/saibcm-modules/sdklt/Makefile index e0084d260925..5600a33a3508 100644 --- a/platform/broadcom/saibcm-modules/sdklt/Makefile +++ b/platform/broadcom/saibcm-modules/sdklt/Makefile @@ -1,5 +1,5 @@ # -# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. +# Copyright 2018-2024 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or @@ -12,7 +12,7 @@ # GNU General Public License for more details. # # A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder.$ +# be found in the LICENSES folder. # # Makefile for building Linux GPL kernel modules for SDKLT. # @@ -54,11 +54,13 @@ endif BDE_BLDDIR := $(OUTPUT_DIR)/bde KNET_BLDDIR := $(OUTPUT_DIR)/knet KNETCB_BLDDIR := $(OUTPUT_DIR)/knetcb +BCMGENL_BLDDIR := $(OUTPUT_DIR)/bcmgenl +GENL_PACKET_BLDDIR := $(OUTPUT_DIR)/genl-packet LKM_CFLAGS += -UNGKNET_NETIF_MAX -DNGKNET_NETIF_MAX=1056 -UNGKNET_FILTER_MAX -DNGKNET_FILTER_MAX=1025 export LKM_CFLAGS -kmod: bde knet knetcb +kmod: bde knet knetcb genl-packet bcmgenl bde: $(MAKE) -C $(SDK)/linux/bde SDK=$(SDK) \ @@ -74,15 +76,27 @@ knet: bde knetcb: knet $(MAKE) -C $(SDK)/linux/knetcb SDK=$(SDK) \ KBUILD_EXTRA_SYMBOLS=$(KNET_BLDDIR)/Module.symvers \ - KBUILD_EXTRA_SYMBOLS+=$(PSAMPLE_SYMVERS) \ LKM_BLDDIR=$(KNETCB_BLDDIR) $(TARGET) ln -sf $(KNETCB_BLDDIR)/*.ko $(OUTPUT_DIR) +bcmgenl: knet genl-packet + $(MAKE) -C $(SDK)/linux/bcmgenl SDK=$(SDK) \ + KBUILD_EXTRA_SYMBOLS=$(KNET_BLDDIR)/Module.symvers \ + KBUILD_EXTRA_SYMBOLS+=$(GENL_PACKET_BLDDIR)/Module.symvers \ + LKM_BLDDIR=$(BCMGENL_BLDDIR) $(TARGET) + ln -sf $(BCMGENL_BLDDIR)/*.ko $(OUTPUT_DIR) + +genl-packet: + $(MAKE) -C $(SDK)/linux/genl-packet SDK=$(SDK) \ + LKM_BLDDIR=$(GENL_PACKET_BLDDIR) $(TARGET) + ln -sf $(GENL_PACKET_BLDDIR)/*.ko $(OUTPUT_DIR) + clean: - $(MAKE) kmod TARGET=clean + $(MAKE) kmod TARGET=$@ rm -f $(OUTPUT_DIR)/*.ko distclean: + $(MAKE) kmod TARGET=$@ rm -rf $(OUTPUT_DIR) -.PHONY: help kmod bde knet knetcb clean distclean +.PHONY: help kmod bde knet knetcb genl-packet bcmgenl clean distclean diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c index 7b71dd745ca6..4f2f776c6535 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c new file mode 100644 index 000000000000..65d28a0113b6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c @@ -0,0 +1,38 @@ +/*! \file bcm56690_a0_pdma_attach.c + * + * Initialize PDMA driver resources. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include + +int +bcm56690_a0_cnet_pdma_attach(struct pdma_dev *dev) +{ + return bcmcnet_cmicx_pdma_driver_attach(dev); +} + +int +bcm56690_a0_cnet_pdma_detach(struct pdma_dev *dev) +{ + return bcmcnet_cmicx_pdma_driver_detach(dev); +} + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c index 4edd614c2a07..cdff9ce0a3f9 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c index d803f27827a2..8abad49b7006 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c index f5297b1bcfcc..7b0668522807 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c index 4e7626a2b414..3f2338263698 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c index 95b1b3adb601..6f16042a5b9f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c index 1ec4e3a9f414..e889d221a235 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c index c881a7a37266..fad6934e8696 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c index 47b83a495538..5a9745e211ee 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c index 2aee042564f3..75d0c2f36504 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78800_a0/bcm78800_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78800_a0/bcm78800_a0_pdma_attach.c new file mode 100644 index 000000000000..ae9f2b921b92 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78800_a0/bcm78800_a0_pdma_attach.c @@ -0,0 +1,38 @@ +/*! \file bcm78800_a0_pdma_attach.c + * + * Initialize PDMA driver resources. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include + +int +bcm78800_a0_cnet_pdma_attach(struct pdma_dev *dev) +{ + return bcmcnet_cmicr_pdma_driver_attach(dev); +} + +int +bcm78800_a0_cnet_pdma_detach(struct pdma_dev *dev) +{ + return bcmcnet_cmicr_pdma_driver_detach(dev); +} + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c index e09f04d9b44f..a84aabba94b2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c new file mode 100644 index 000000000000..ded5f926a3ba --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c @@ -0,0 +1,38 @@ +/*! \file bcm78905_a0_pdma_attach.c + * + * Initialize PDMA driver resources. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include + +int +bcm78905_a0_cnet_pdma_attach(struct pdma_dev *dev) +{ + return bcmcnet_cmicr_pdma_driver_attach(dev); +} + +int +bcm78905_a0_cnet_pdma_detach(struct pdma_dev *dev) +{ + return bcmcnet_cmicr_pdma_driver_detach(dev); +} + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c index b887a2b829a7..d64b67434a50 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include @@ -100,16 +100,16 @@ cmicd_pdma_hw_init(struct pdma_hw *hw) hw->dev->mode = DEV_MODE_UNET; } - /* - * FIXME: SDKLT-27954 SDKLT-27956 - * - * credit release is invoked by cmic_edb_credit_refresh() in - * bcmtm_internal_port_up(). - * - * But, bcmtm_internal_port_up() is missed in bcm56960_a0. - * - * Need to remove credit release once all CMICd chipsets are fixed. - */ + + + + + + + + + + /* Release credits to EP. Only do this once when HW is initialized. */ hw->hdls.reg_rd32(hw, CMICD_EPINTF_RELEASE_CREDITS, &val); diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c index e78e3ae26668..6a322030492c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c @@ -38,7 +38,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -51,7 +51,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c new file mode 100644 index 000000000000..de9e2e3bdf09 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c @@ -0,0 +1,369 @@ +/*! \file bcmcnet_cmicr2_pdma_rxtx.c + * + * Utility routines for BCMCNET hardware (CMICr2) specific Tx. + * All others leverage CMICr stuffs. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include +#include +#include + +#define TX_DCB_STAT_SET(r, f) TX_DCB_SET(r, 3, f) +#define TX_DCB_CTRL_HGf_SET(r) TX_DCB_HGf_SET(r, 1) +#define TX_DCB_CTRL_HGf_CLR(r) TX_DCB_HGf_SET(r, 0) +#define TX_DCB_CTRL_PURGEf_SET(r) (r).tx_dcb[2] |= 1 << 23 +#define TX_DCB_CTRL_PURGEf_CLR(r) (r).tx_dcb[2] &= ~(1 << 23) +#define TX_DCB_CTRL_PROFf_SET(r, f) (r).tx_dcb[2] = ((r).tx_dcb[2] & ~(0x7 << 20)) | (((f) & 0x7) << 20) + +/*! + * Configure Tx descriptor + */ +static inline void +cmicr2_tx_desc_config(volatile TX_DCB_t *td, uint64_t addr, uint32_t len, + uint32_t prof, uint16_t flags) +{ + TX_DCB_ADDR_LOf_SET(*td, addr); + TX_DCB_ADDR_HIf_SET(*td, DMA_TO_BUS_HI(addr >> 32)); + TX_DCB_STAT_SET(*td, 0); + + if (flags & PDMA_TX_HIGIG_PKT) { + TX_DCB_CTRL_HGf_SET(*td); + } else { + TX_DCB_CTRL_HGf_CLR(*td); + } + if (flags & PDMA_TX_PURGE_PKT) { + TX_DCB_CTRL_PURGEf_SET(*td); + } else { + TX_DCB_CTRL_PURGEf_CLR(*td); + } + TX_DCB_CTRL_PROFf_SET(*td, prof); + TX_DCB_BYTE_COUNTf_SET(*td, len); + + MEMORY_BARRIER; +} + +/*! + * Chain Tx descriptor + */ +static inline void +cmicr2_tx_desc_chain(volatile TX_DCB_t *td, int chain) +{ + if (chain) { + TX_DCB_CHAINf_SET(*td, 1); + } else { + TX_DCB_CHAINf_SET(*td, 0); + } + + MEMORY_BARRIER; +} + +/*! + * Get unused descriptors in a Tx ring + */ +static inline int +cmicr2_pdma_tx_ring_unused(struct pdma_tx_queue *txq) +{ + /* Leave one descriptor unused so as not to halt */ + return (txq->nb_desc + txq->dirt - txq->curr - 1) % txq->nb_desc; +} + +/*! + * Fetch Tx vring + */ +static int +cmicr2_pdma_tx_vring_fetch(struct pdma_hw *hw, struct pdma_tx_queue *txq, + struct pdma_tx_buf *pbuf) +{ + struct pdma_dev *dev = hw->dev; + volatile TX_DCB_t *ring = (volatile TX_DCB_t *)txq->ring; + struct pdma_tx_queue *vtxq = NULL; + volatile TX_DCB_t *vring = NULL; + uint32_t rm; + + vtxq = (struct pdma_tx_queue *)dev->ctrl.vnet_txq[txq->queue_id]; + vring = (volatile TX_DCB_t *)vtxq->ring; + if (!vring || !TX_DCB_BYTE_COUNTf_GET(vring[vtxq->curr])) { + return SHR_E_UNAVAIL; + } + + /* Fetch vring descriptor */ + rm = TX_DCB_DESC_REMAINf_GET(ring[txq->curr]); + TX_DCB_SET(ring[txq->curr], 0, TX_DCB_GET(vring[vtxq->curr], 0)); + TX_DCB_SET(ring[txq->curr], 1, TX_DCB_GET(vring[vtxq->curr], 1)); + TX_DCB_SET(ring[txq->curr], 2, TX_DCB_GET(vring[vtxq->curr], 2)); + TX_DCB_SET(ring[txq->curr], 3, TX_DCB_GET(vring[vtxq->curr], 3)); + TX_DCB_DESC_REMAINf_SET(ring[txq->curr], rm); + TX_DCB_BYTE_COUNTf_SET(vring[vtxq->curr], 0); + + MEMORY_BARRIER; + + pbuf->dma = TX_DCB_ADDR_LOf_GET(vring[vtxq->curr]); + pbuf->len = TX_DCB_BYTE_COUNTf_GET(ring[txq->curr]); + vtxq->curr = (vtxq->curr + 1) % vtxq->nb_desc; + + return SHR_E_NONE; +} + +/*! + * Check Tx ring + */ +static inline int +cmicr2_pdma_tx_ring_check(struct pdma_hw *hw, struct pdma_tx_queue *txq) +{ + struct pdma_dev *dev = hw->dev; + + if (dev->suspended) { + txq->stats.xoffs++; + if (dev->tx_suspend) { + dev->tx_suspend(dev, txq->queue_id); + return SHR_E_BUSY; + } + if (!(txq->state & PDMA_TX_QUEUE_POLL)) { + return SHR_E_BUSY; + } + } + + if (cmicr2_pdma_tx_ring_unused(txq)) { + return SHR_E_NONE; + } + + sal_spinlock_lock(txq->lock); + if (!cmicr2_pdma_tx_ring_unused(txq)) { + txq->status |= PDMA_TX_QUEUE_XOFF; + txq->stats.xoffs++; + if (dev->tx_suspend) { + dev->tx_suspend(dev, txq->queue_id); + } + sal_spinlock_unlock(txq->lock); + return SHR_E_BUSY; + } + sal_spinlock_unlock(txq->lock); + + return SHR_E_NONE; +} + +/*! + * \brief Start packet transmission + * + * \param [in] hw HW structure point. + * \param [in] txq Tx queue structure point. + * \param [in] buf Tx packet buffer. + * + * \retval SHR_E_NONE No errors. + * \retval SHR_E_XXXX Operation failed. + */ +static int +cmicr2_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf) +{ + struct pdma_dev *dev = hw->dev; + struct pdma_buf_mngr *bm = (struct pdma_buf_mngr *)dev->ctrl.buf_mngr; + volatile TX_DCB_t *ring = (volatile TX_DCB_t *)txq->ring; + struct pdma_tx_buf *pbuf = NULL; + struct pkt_hdr *pkh = NULL; + dma_addr_t addr; + uint32_t curr; + int retry = 5000000; + int rv; + + if (dev->tx_suspend) { + sal_spinlock_lock(txq->mutex); + } else { + rv = sal_sem_take(txq->sem, BCMCNET_TX_RSRC_WAIT_USEC); + if (rv == -1) { + CNET_ERROR(hw->unit, "Timeout waiting for Tx resources\n"); + return SHR_E_TIMEOUT; + } + } + + /* Check Tx resource */ + if (dev->tx_suspend) { + /* Suspend Tx if no resource */ + rv = cmicr2_pdma_tx_ring_check(hw, txq); + if (SHR_FAILURE(rv)) { + sal_spinlock_unlock(txq->mutex); + return rv; + } + } else { + /* Abort Tx if a fatal error happened */ + if (txq->status & PDMA_TX_QUEUE_XOFF) { + sal_sem_give(txq->sem); + return SHR_E_RESOURCE; + } + } + + /* Setup the new descriptor */ + curr = txq->curr; + pbuf = &txq->pbuf[curr]; + if (dev->mode == DEV_MODE_HNET && !buf) { + rv = cmicr2_pdma_tx_vring_fetch(hw, txq, pbuf); + if (SHR_FAILURE(rv)) { + sal_spinlock_unlock(txq->mutex); + return SHR_E_EMPTY; + } + txq->state |= PDMA_TX_QUEUE_BUSY; + } else { + pbuf->adj = 1; + pkh = bm->tx_buf_get(dev, txq, pbuf, buf); + if (!pkh) { + txq->stats.dropped++; + if (dev->tx_suspend) { + sal_spinlock_unlock(txq->mutex); + } else { + sal_sem_give(txq->sem); + } + return SHR_E_RESOURCE; + } + bm->tx_buf_dma(dev, txq, pbuf, &addr); + cmicr2_tx_desc_config(&ring[curr], addr, pbuf->len, pkh->hdr_prof, pkh->attrs); + } + + /* Notify HNET to process if needed */ + if (dev->mode == DEV_MODE_VNET) { + if (!TX_DCB_BYTE_COUNTf_GET(ring[(curr + txq->nb_desc - 1) % txq->nb_desc])) { + dev->xnet_wake(dev); + } + } + + /* Update the indicators */ + curr = (curr + 1) % txq->nb_desc; + txq->curr = curr; + + /* Start DMA if in chain mode */ + if (dev->flags & PDMA_CHAIN_MODE) { + if (txq->state & PDMA_TX_QUEUE_POLL) { + do { + rv = hw->dops.tx_ring_clean(hw, txq, txq->nb_desc - 1); + if (rv != (int)txq->nb_desc - 1) { + break; + } + sal_usleep(1); + } while (retry--); + if (retry < 0) { + CNET_ERROR(hw->unit, "Last Tx could not get done in given time\n"); + } + } + sal_spinlock_lock(txq->lock); + if (txq->dirt == txq->halt && txq->dirt != curr) { + hw->hdls.chan_stop(hw, txq->chan_id); + cmicr2_tx_desc_chain(&ring[(curr + txq->nb_desc - 1) % txq->nb_desc], 0); + hw->hdls.chan_setup(hw, txq->chan_id, + txq->ring_addr + sizeof(TX_DCB_t) * txq->halt); + hw->hdls.chan_start(hw, txq->chan_id); + txq->halt = curr; + } + sal_spinlock_unlock(txq->lock); + } + + /* Kick off DMA */ + txq->halt_addr = txq->ring_addr + sizeof(TX_DCB_t) * curr; + hw->hdls.chan_goto(hw, txq->chan_id, txq->halt_addr); + + /* Count the packets/bytes */ + txq->stats.packets++; + txq->stats.bytes += pbuf->len; + + /* Clean up ring if in polling mode */ + if (txq->state & PDMA_TX_QUEUE_POLL && + cmicr2_pdma_tx_ring_unused(txq) <= (int)txq->free_thresh) { + hw->dops.tx_ring_clean(hw, txq, dev->ctrl.budget); + } + + /* Suspend Tx if no resource */ + rv = cmicr2_pdma_tx_ring_check(hw, txq); + if (SHR_FAILURE(rv)) { + if (dev->mode == DEV_MODE_VNET) { + dev->xnet_wake(dev); + } + + if (txq->state & PDMA_TX_QUEUE_POLL) { + /* In polling mode, must wait till the ring is available */ + do { + hw->dops.tx_ring_clean(hw, txq, dev->ctrl.budget); + if (!(txq->status & PDMA_TX_QUEUE_XOFF) || + !(txq->state & PDMA_TX_QUEUE_ACTIVE)) { + break; + } + sal_usleep(1); + } while (retry--); + if (retry < 0) { + CNET_ERROR(hw->unit, "Fatal error: Tx ring is full, packets can not been transmitted\n"); + if (!dev->tx_suspend) { + sal_sem_give(txq->sem); + return SHR_E_RESOURCE; + } + } + } else { + /* In interrupt mode, the handle thread will wake up Tx */ + if (!dev->tx_suspend) { + return SHR_E_NONE; + } + } + } + + if (dev->tx_suspend) { + sal_spinlock_unlock(txq->mutex); + } else { + sal_sem_give(txq->sem); + } + + return SHR_E_NONE; +} + +/*! + * Attach device driver + */ +int +bcmcnet_cmicr2_pdma_driver_attach(struct pdma_dev *dev) +{ + struct pdma_hw *hw = NULL; + + /* Allocate memory for HW data */ + hw = sal_alloc(sizeof(*hw), "bcmcnetPdmaHw"); + if (!hw) { + return SHR_E_MEMORY; + } + sal_memset(hw, 0, sizeof(*hw)); + hw->unit = dev->unit; + hw->dev = dev; + dev->ctrl.hw = hw; + + bcmcnet_cmicr_pdma_hw_hdls_init(hw); + bcmcnet_cmicr_pdma_desc_ops_init(hw); + + hw->dops.pkt_xmit = cmicr2_pdma_pkt_xmit; + + return SHR_E_NONE; +} + +/*! + * Detach device driver + */ +int +bcmcnet_cmicr2_pdma_driver_detach(struct pdma_dev *dev) +{ + if (dev->ctrl.hw) { + sal_free(dev->ctrl.hw); + } + dev->ctrl.hw = NULL; + + return SHR_E_NONE; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c index 99f1d7276cfc..fdcc03ebba32 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include @@ -161,10 +161,12 @@ cmicr_pdma_hw_config(struct pdma_hw *hw) int grp, que; uint32_t qi; int ip_if_hdr_endian = 0; + int pipe; CMIC_CMC_PKTDMA_CTRLr_t pktdma_ctrl; CMIC_CMC_PKTDMA_INTR_ENABLEr_t pktdma_intr_enable; CMIC_CMC_PKTDMA_INTR_CLRr_t pktdma_intr_clr; CMIC_TOP_CONFIGr_t cmic_config; + CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_t pktdma_rxbuf_thresh; CMIC_CMC_PKTDMA_INTR_ENABLEr_CLR(pktdma_intr_enable); CMIC_CMC_PKTDMA_INTR_ENABLEr_DESC_CONTROLLED_INTR_ENABLEf_SET(pktdma_intr_enable, 1); @@ -180,7 +182,13 @@ cmicr_pdma_hw_config(struct pdma_hw *hw) grp = rxq->group_id; que = rxq->chan_id % CMICR_PDMA_CMC_CHAN; que_ctrl = ctrl->grp[grp].que_ctrl[que]; + pipe = ctrl->grp[grp].pipe[que]; + hw->hdls.reg_rd32(hw, CMICR_PDMA_RBUF_THRE(grp, que), + &CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_GET(pktdma_rxbuf_thresh)); + CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_ENABLEf_SET(pktdma_rxbuf_thresh, 1); + hw->hdls.reg_wr32(hw, CMICR_PDMA_RBUF_THRE(grp, que), + CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_GET(pktdma_rxbuf_thresh)); hw->hdls.reg_wr32(hw, CMICR_PDMA_INTR_CLR(grp, que), CMIC_CMC_PKTDMA_INTR_CLRr_GET(pktdma_intr_clr)); CMIC_CMC_PKTDMA_CTRLr_CLR(pktdma_ctrl); @@ -198,6 +206,11 @@ cmicr_pdma_hw_config(struct pdma_hw *hw) } CMIC_CMC_PKTDMA_CTRLr_CONTIGUOUS_DESCRIPTORSf_SET(pktdma_ctrl, 1); CMIC_CMC_PKTDMA_CTRLr_DESC_DONE_INTR_MODEf_SET(pktdma_ctrl, 1); + if (pipe == 1) { + CMIC_CMC_PKTDMA_CTRLr_PIPE_MAPf_SET(pktdma_ctrl, 1); + } else if (pipe != 0) { + return SHR_E_CONFIG; + } hw->hdls.reg_wr32(hw, CMICR_PDMA_CTRL(grp, que), CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl)); @@ -210,6 +223,7 @@ cmicr_pdma_hw_config(struct pdma_hw *hw) grp = txq->group_id; que = txq->chan_id % CMICR_PDMA_CMC_CHAN; que_ctrl = ctrl->grp[grp].que_ctrl[que]; + pipe = ctrl->grp[grp].pipe[que]; hw->hdls.reg_wr32(hw, CMICR_PDMA_INTR_CLR(grp, que), CMIC_CMC_PKTDMA_INTR_CLRr_GET(pktdma_intr_clr)); @@ -231,6 +245,11 @@ cmicr_pdma_hw_config(struct pdma_hw *hw) CMIC_CMC_PKTDMA_CTRLr_CONTIGUOUS_DESCRIPTORSf_SET(pktdma_ctrl, 1); CMIC_CMC_PKTDMA_CTRLr_DESC_DONE_INTR_MODEf_SET(pktdma_ctrl, 1); CMIC_CMC_PKTDMA_CTRLr_DIRECTIONf_SET(pktdma_ctrl, 1); + if (pipe == 1) { + CMIC_CMC_PKTDMA_CTRLr_PIPE_MAPf_SET(pktdma_ctrl, 1); + } else if (pipe != 0) { + return SHR_E_CONFIG; + } hw->hdls.reg_wr32(hw, CMICR_PDMA_CTRL(grp, que), CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl)); @@ -425,6 +444,26 @@ cmicr_pdma_chan_clear(struct pdma_hw *hw, int chan) return SHR_E_NONE; } +/*! + * Check a channel + */ +static int +cmicr_pdma_chan_check(struct pdma_hw *hw, int chan) +{ + CMIC_CMC_PKTDMA_STATr_t pktdma_stat; + int grp, que; + + grp = chan / CMICR_PDMA_CMC_CHAN; + que = chan % CMICR_PDMA_CMC_CHAN; + + MEMORY_BARRIER; + + hw->hdls.reg_rd32(hw, CMICR_PDMA_STAT(grp, que), + &CMIC_CMC_PKTDMA_STATr_GET(pktdma_stat)); + + return CMIC_CMC_PKTDMA_STATr_DESC_CONTROLLEDf_GET(pktdma_stat); +} + /*! * Get interrupt number for a channel */ @@ -655,6 +694,7 @@ bcmcnet_cmicr_pdma_hw_hdls_init(struct pdma_hw *hw) hw->hdls.chan_setup = cmicr_pdma_chan_setup; hw->hdls.chan_goto = cmicr_pdma_chan_goto; hw->hdls.chan_clear = cmicr_pdma_chan_clear; + hw->hdls.chan_check = cmicr_pdma_chan_check; hw->hdls.chan_intr_num_get = cmicr_pdma_chan_intr_num_get; hw->hdls.chan_intr_enable = cmicr_pdma_chan_intr_enable; hw->hdls.chan_intr_disable = cmicr_pdma_chan_intr_disable; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c index 381b9e208446..8def97539560 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c @@ -38,7 +38,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -51,7 +51,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include @@ -519,6 +519,7 @@ cmicr_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg /* Move forward */ if (!(rxq->state & PDMA_RX_BATCH_REFILL)) { + /* coverity[double_lock : FALSE] */ sal_spinlock_lock(rxq->lock); if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) { /* Descriptor cherry pick */ @@ -566,7 +567,8 @@ cmicr_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg rxq->stats.bytes += len; /* Count the errors if any */ - if (RX_DCB_ERRORf_GET(ring[curr])) { + if (RX_DCB_CELL_ERRORf_GET(ring[curr]) || + RX_DCB_ECC_ERRORf_GET(ring[curr])) { rxq->stats.errors++; } @@ -631,6 +633,7 @@ cmicr_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg /* Restart DMA if in chain mode */ if (dev->flags & PDMA_CHAIN_MODE) { + /* coverity[double_lock : FALSE] */ sal_spinlock_lock(rxq->lock); if (curr == 0 && !(rxq->status & PDMA_RX_QUEUE_XOFF)) { hw->hdls.chan_stop(hw, rxq->chan_id); @@ -754,6 +757,7 @@ cmicr_pdma_tx_ring_clean(struct pdma_hw *hw, struct pdma_tx_queue *txq, int budg /* One more poll for chain done in chain mode */ if (dev->flags & PDMA_CHAIN_MODE) { + /* coverity[double_lock : FALSE] */ sal_spinlock_lock(txq->lock); if (dirt != txq->halt) { done = budget; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c index f43dc9a3ed65..988e6373bb34 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c index 0eaf26890e43..690bf865f665 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c @@ -38,7 +38,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -51,7 +51,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h index 1811ca44c33c..57310338525e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef BCMCNET_CMICD_H diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h index 6f74d7fb1895..73c52555c8ea 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef BCMCNET_CMICR_H @@ -150,7 +150,7 @@ #define CMICR_HW_RETRY_TIMES 100000 /*! Max remaining descriptors */ -#define CMICR_DESC_REMAIN_MAX 8 +#define CMICR_DESC_REMAIN_MAX 63 /*! * \brief Initialize HW handles. diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h new file mode 100644 index 000000000000..d052d1abfb82 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h @@ -0,0 +1,50 @@ +/*! \file bcmcnet_cmicr2.h + * + * BCMCNET CMICr2 specific definitions and declarations. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMCNET_CMICR2_H +#define BCMCNET_CMICR2_H + +#include + +/*! + * \brief Attach device driver. + * + * \param [in] dev Device structure point. + * + * \retval SHR_E_NONE No errors. + * \retval SHR_E_XXXX Operation failed. + */ +extern int +bcmcnet_cmicr2_pdma_driver_attach(struct pdma_dev *dev); + +/*! + * \brief Detach device driver. + * + * \param [in] dev Device structure point. + * + * \retval SHR_E_NONE No errors. + * \retval SHR_E_XXXX Operation failed. + */ +extern int +bcmcnet_cmicr2_pdma_driver_detach(struct pdma_dev *dev); + +#endif /* BCMCNET_CMICR2_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h index 9bd736d5694d..ebcaf595c043 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h @@ -6,7 +6,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -19,7 +19,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef BCMCNET_CMICR_ACC_H @@ -728,16 +728,18 @@ typedef union TX_DCB_s { #define TX_DCB_RELOADf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 18)) | ((((uint32_t)f) & 0x1) << 18)) #define TX_DCB_HGf_GET(r) ((((r).tx_dcb[2]) >> 19) & 0x1) #define TX_DCB_HGf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 19)) | ((((uint32_t)f) & 0x1) << 19)) +#define TX_DCB_ALIGN_BYTESf_GET(r) ((((r).tx_dcb[2]) >> 20) & 0x3) +#define TX_DCB_ALIGN_BYTESf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x3 << 20)) | ((((uint32_t)f) & 0x3) << 20)) #define TX_DCB_PURGEf_GET(r) ((((r).tx_dcb[2]) >> 22) & 0x1) #define TX_DCB_PURGEf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 22)) | ((((uint32_t)f) & 0x1) << 22)) #define TX_DCB_DESC_DONE_INTRf_GET(r) ((((r).tx_dcb[2]) >> 23) & 0x1) #define TX_DCB_DESC_DONE_INTRf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 23)) | ((((uint32_t)f) & 0x1) << 23)) #define TX_DCB_DESC_CTRL_INTRf_GET(r) ((((r).tx_dcb[2]) >> 24) & 0x1) #define TX_DCB_DESC_CTRL_INTRf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 24)) | ((((uint32_t)f) & 0x1) << 24)) -#define TX_DCB_DESC_REMAINf_GET(r) ((((r).tx_dcb[2]) >> 25) & 0xf) -#define TX_DCB_DESC_REMAINf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0xf << 25)) | ((((uint32_t)f) & 0xf) << 25)) -#define TX_DCB_DESC_STAT_WR_DISABLEf_GET(r) ((((r).tx_dcb[2]) >> 29) & 0x1) -#define TX_DCB_DESC_STAT_WR_DISABLEf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 29)) | ((((uint32_t)f) & 0x1) << 29)) +#define TX_DCB_DESC_REMAINf_GET(r) ((((r).tx_dcb[2]) >> 25) & 0x3f) +#define TX_DCB_DESC_REMAINf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x3f << 25)) | ((((uint32_t)f) & 0x3f) << 25)) +#define TX_DCB_DESC_STAT_WR_DISABLEf_GET(r) ((((r).tx_dcb[2]) >> 31) & 0x1) +#define TX_DCB_DESC_STAT_WR_DISABLEf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31)) #define TX_DCB_ADDR_HIf_GET(r) ((r).tx_dcb[1]) #define TX_DCB_ADDR_HIf_SET(r,f) (r).tx_dcb[1]=((uint32_t)f) #define TX_DCB_ADDR_LOf_GET(r) ((r).tx_dcb[0]) @@ -763,8 +765,10 @@ typedef union RX_DCB_s { #define RX_DCB_END_BITf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 16)) | ((((uint32_t)f) & 0x1) << 16)) #define RX_DCB_START_BITf_GET(r) ((((r).rx_dcb[3]) >> 17) & 0x1) #define RX_DCB_START_BITf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 17)) | ((((uint32_t)f) & 0x1) << 17)) -#define RX_DCB_ERRORf_GET(r) ((((r).rx_dcb[3]) >> 18) & 0x1) -#define RX_DCB_ERRORf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 18)) | ((((uint32_t)f) & 0x1) << 18)) +#define RX_DCB_CELL_ERRORf_GET(r) ((((r).rx_dcb[3]) >> 18) & 0x1) +#define RX_DCB_CELL_ERRORf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 18)) | ((((uint32_t)f) & 0x1) << 18)) +#define RX_DCB_ECC_ERRORf_GET(r) ((((r).rx_dcb[3]) >> 19) & 0x1) +#define RX_DCB_ECC_ERRORf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 19)) | ((((uint32_t)f) & 0x1) << 19)) #define RX_DCB_DONEf_GET(r) ((((r).rx_dcb[3]) >> 31) & 0x1) #define RX_DCB_DONEf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31)) #define RX_DCB_BYTE_COUNTf_GET(r) (((r).rx_dcb[2]) & 0xffff) @@ -775,14 +779,16 @@ typedef union RX_DCB_s { #define RX_DCB_SGf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 17)) | ((((uint32_t)f) & 0x1) << 17)) #define RX_DCB_RELOADf_GET(r) ((((r).rx_dcb[2]) >> 18) & 0x1) #define RX_DCB_RELOADf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 18)) | ((((uint32_t)f) & 0x1) << 18)) +#define RX_DCB_ALIGN_BYTESf_GET(r) ((((r).rx_dcb[2]) >> 20) & 0x3) +#define RX_DCB_ALIGN_BYTESf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x3 << 20)) | ((((uint32_t)f) & 0x3) << 20)) #define RX_DCB_DESC_DONE_INTRf_GET(r) ((((r).rx_dcb[2]) >> 23) & 0x1) #define RX_DCB_DESC_DONE_INTRf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 23)) | ((((uint32_t)f) & 0x1) << 23)) #define RX_DCB_DESC_CTRL_INTRf_GET(r) ((((r).rx_dcb[2]) >> 24) & 0x1) #define RX_DCB_DESC_CTRL_INTRf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 24)) | ((((uint32_t)f) & 0x1) << 24)) -#define RX_DCB_DESC_REMAINf_GET(r) ((((r).rx_dcb[2]) >> 25) & 0xf) -#define RX_DCB_DESC_REMAINf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0xf << 25)) | ((((uint32_t)f) & 0xf) << 25)) -#define RX_DCB_DESC_STAT_WR_DISABLEf_GET(r) ((((r).rx_dcb[2]) >> 29) & 0x1) -#define RX_DCB_DESC_STAT_WR_DISABLEf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 29)) | ((((uint32_t)f) & 0x1) << 29)) +#define RX_DCB_DESC_REMAINf_GET(r) ((((r).rx_dcb[2]) >> 25) & 0x3f) +#define RX_DCB_DESC_REMAINf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x3f << 25)) | ((((uint32_t)f) & 0x3f) << 25)) +#define RX_DCB_DESC_STAT_WR_DISABLEf_GET(r) ((((r).rx_dcb[2]) >> 31) & 0x1) +#define RX_DCB_DESC_STAT_WR_DISABLEf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31)) #define RX_DCB_ADDR_HIf_GET(r) ((r).rx_dcb[1]) #define RX_DCB_ADDR_HIf_SET(r,f) (r).rx_dcb[1]=((uint32_t)f) #define RX_DCB_ADDR_LOf_GET(r) ((r).rx_dcb[0]) diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h index 75d61c7a38bf..538c8b2b2f80 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef BCMCNET_CMICX_H diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h index 82341cac7b7a..6ab4327a3ffc 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,14 +17,14 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef BCMCNET_CORE_H #define BCMCNET_CORE_H -#include -#include +#include "bcmcnet_types.h" +#include "bcmcnet_internal.h" /*! * \brief Packet header structure. @@ -45,8 +45,8 @@ struct pkt_hdr { /*! Data length */ uint16_t data_len; - /*! Reserved */ - uint16_t rsvd2; + /*! Header profile */ + uint16_t hdr_prof; /*! Meta length */ uint8_t meta_len; @@ -129,6 +129,9 @@ struct intr_handle { /*! Interrupt flags */ uint32_t intr_flags; + + /*! Extra polling after queue is empty */ + bool extra_poll; }; /*! @@ -180,6 +183,9 @@ struct queue_group { /*! Header_byte_swap */ #define PDMA_HDR_BYTE_SWAP (1 << 2) + /*! Pipe interfaces */ + int pipe[NUM_Q_PER_GRP]; + /*! Group ID */ int id; @@ -918,6 +924,9 @@ struct pdma_dev { /*! Abort PDMA mode for suspend and resume */ #define PDMA_ABORT (1 << 6) + /*! Extra poll time in microseconds */ + int extra_poll_time; + /*! Device mode */ dev_mode_t mode; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h index 2a316531f1e0..67118f757096 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef BCMCNET_DEV_H @@ -172,6 +172,16 @@ typedef int (*chan_goto_f)(struct pdma_hw *hw, int chan, uint64_t addr); */ typedef int (*chan_clear_f)(struct pdma_hw *hw, int chan); +/*! + * \brief Check channel. + * + * \param [in] hw Pointer to hardware structure. + * \param [in] chan Channel number. + * + * \retval SHR_E_NONE No errors. + */ +typedef int (*chan_check_f)(struct pdma_hw *hw, int chan); + /*! * \brief Get interrupt number. * @@ -281,6 +291,9 @@ struct hw_handlers { /*! Channel clear */ chan_clear_f chan_clear; + /*! Channel check */ + chan_check_f chan_check; + /*! Channel interrupt number get */ chan_intr_num_get_f chan_intr_num_get; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h index 6a4495a84bb8..e2e7f2c6cd41 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef BCMCNET_INTERNAL_H diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h index cd3eb1afe933..36dd2cf2ef11 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef BCMCNET_RXTX_H diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h index 67b0c3578d83..26c1992e0f53 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef BCMCNET_TYPES_H diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c index 4a1125548b03..6089df9ad9fd 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c index ab91bdfd0760..1277187d6035 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include @@ -67,11 +67,11 @@ bcn_rx_queues_alloc(struct pdma_dev *dev) if (!rxq) { goto error; } + ctrl->grp[gi].rx_queue[qi] = rxq; sal_memset(rxq, 0, sizeof(*rxq)); rxq->group_id = gi; rxq->chan_id = qi + gi * dev->grp_queues; rxq->ctrl = ctrl; - ctrl->grp[gi].rx_queue[qi] = rxq; if (dev->mode == DEV_MODE_HNET) { vrxq = sal_alloc(sizeof(*vrxq), "bcmcnetVnetRxQueue"); if (!vrxq) { @@ -139,6 +139,7 @@ bcn_tx_queues_alloc(struct pdma_dev *dev) if (!txq) { goto error; } + ctrl->grp[gi].tx_queue[qi] = txq; sal_memset(txq, 0, sizeof(*txq)); txq->group_id = gi; txq->chan_id = qi + gi * dev->grp_queues; @@ -147,7 +148,6 @@ bcn_tx_queues_alloc(struct pdma_dev *dev) if (!txq->sem) { goto error; } - ctrl->grp[gi].tx_queue[qi] = txq; if (dev->mode == DEV_MODE_HNET) { vtxq = sal_alloc(sizeof(*vtxq), "bcmcnetVnetTxQueue"); if (!vtxq) { diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c index 6f42236eb08f..af745618b115 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include @@ -574,7 +574,8 @@ bcmcnet_pdma_group_poll(struct pdma_dev *dev, int group, int budget) struct pdma_rx_queue *rxq = NULL; struct pdma_tx_queue *txq = NULL; struct queue_group *grp = &ctrl->grp[group]; - int done = 0, done_que, budget_que; + uint32_t intr_actives = 0; + int rx_done = 0, tx_done = 0, done_que, budget_que; int i; /* Acknowledge the interrupts */ @@ -584,6 +585,7 @@ bcmcnet_pdma_group_poll(struct pdma_dev *dev, int group, int budget) if (hw->hdls.chan_intr_query(hw, rxq->chan_id)) { hw->hdls.chan_clear(hw, rxq->chan_id); grp->poll_queues |= 1 << i; + intr_actives |= 1 << i; } if (rxq->state & PDMA_RX_QUEUE_BUSY) { rxq->state &= ~PDMA_RX_QUEUE_BUSY; @@ -596,6 +598,7 @@ bcmcnet_pdma_group_poll(struct pdma_dev *dev, int group, int budget) if (hw->hdls.chan_intr_query(hw, txq->chan_id)) { hw->hdls.chan_clear(hw, txq->chan_id); grp->poll_queues |= 1 << i; + intr_actives |= 1 << i; } if (txq->state & PDMA_TX_QUEUE_BUSY) { txq->state &= ~PDMA_TX_QUEUE_BUSY; @@ -625,10 +628,12 @@ bcmcnet_pdma_group_poll(struct pdma_dev *dev, int group, int budget) if (1 << i & grp->bm_rxq & grp->poll_queues) { rxq = grp->rx_queue[i]; done_que = bcn_rx_poll(rxq, budget_que); - if (done_que < budget_que) { - grp->poll_queues &= ~(1 << i); + if (done_que >= budget_que || + (done_que == 0 && (1 << i & intr_actives))) { + continue; } - done += done_que; + grp->poll_queues &= ~(1 << i); + rx_done += done_que; } } @@ -636,13 +641,44 @@ bcmcnet_pdma_group_poll(struct pdma_dev *dev, int group, int budget) for (i = 0; i < dev->grp_queues; i++) { txq = grp->tx_queue[i]; if (1 << i & grp->bm_txq & grp->poll_queues && !txq->free_thresh) { - if (bcn_tx_poll(txq, budget) < budget) { - grp->poll_queues &= ~(1 << i); + done_que = bcn_tx_poll(txq, budget); + if (done_que >= budget || + (done_que == 0 && (1 << i & intr_actives))) { + continue; } + grp->poll_queues &= ~(1 << i); + tx_done += done_que; } } - return grp->poll_queues ? budget : done; + /* Reschedule the poll if not completed */ + if (grp->poll_queues) { + return budget; + } + + /* Check channel status before exits */ + if (hw->hdls.chan_check) { + for (i = 0; i < dev->grp_queues; i++) { + rxq = grp->rx_queue[i]; + if (rxq->state & PDMA_RX_QUEUE_ACTIVE) { + if (hw->hdls.chan_check(hw, rxq->chan_id)) { + hw->hdls.chan_clear(hw, rxq->chan_id); + grp->poll_queues |= 1 << i; + } + continue; + } + txq = grp->tx_queue[i]; + if (txq->state & PDMA_TX_QUEUE_ACTIVE) { + if (hw->hdls.chan_check(hw, txq->chan_id)) { + hw->hdls.chan_clear(hw, txq->chan_id); + grp->poll_queues |= 1 << i; + } + } + } + return grp->poll_queues ? budget : rx_done; + } else { + return (rx_done + tx_done) ? budget : 0; + } } /*! diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h index 5ede02035a9c..da607bc2a915 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h @@ -4,7 +4,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/drd/instpkgs.pl * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ /* @@ -41,26 +41,53 @@ #define BCM56080_VENDOR_ID 0x14e4 #define BCM56080_DEVICE_ID 0xb080 #define BCM56080_REV_A0 0x01 +#define BCM56080_REV_A1 0x02 /* BCM56081 */ #define BCM56081_VENDOR_ID 0x14e4 #define BCM56081_DEVICE_ID 0xb081 #define BCM56081_REV_A0 0x01 +#define BCM56081_REV_A1 0x02 /* BCM56082 */ #define BCM56082_VENDOR_ID 0x14e4 #define BCM56082_DEVICE_ID 0xb082 #define BCM56082_REV_A0 0x01 +#define BCM56082_REV_A1 0x02 /* BCM56083 */ #define BCM56083_VENDOR_ID 0x14e4 #define BCM56083_DEVICE_ID 0xb083 #define BCM56083_REV_A0 0x01 +#define BCM56083_REV_A1 0x02 /* BCM56084 */ #define BCM56084_VENDOR_ID 0x14e4 #define BCM56084_DEVICE_ID 0xb084 #define BCM56084_REV_A0 0x01 +#define BCM56084_REV_A1 0x02 + +/* BCM56085 */ +#define BCM56085_VENDOR_ID 0x14e4 +#define BCM56085_DEVICE_ID 0xb085 +#define BCM56085_REV_A0 0x01 +#define BCM56085_REV_A1 0x02 + +/* BCM56690 */ +#define BCM56690_VENDOR_ID 0x14e4 +#define BCM56690_DEVICE_ID 0xb690 +#define BCM56690_REV_A0 0x01 + +/* BCM56692 */ +#define BCM56692_VENDOR_ID 0x14e4 +#define BCM56692_DEVICE_ID 0xb692 +#define BCM56692_REV_A0 0x01 + +/* BCM56089 */ +#define BCM56089_VENDOR_ID 0x14e4 +#define BCM56089_DEVICE_ID 0xb089 +#define BCM56089_REV_A0 0x01 +#define BCM56089_REV_A1 0x02 /* BCM56780 */ #define BCM56780_VENDOR_ID 0x14e4 @@ -71,6 +98,7 @@ #define BCM56782_VENDOR_ID 0x14e4 #define BCM56782_DEVICE_ID 0xb782 #define BCM56782_REV_A0 0x01 +#define BCM56782_REV_A1 0x02 /* BCM56784 */ #define BCM56784_VENDOR_ID 0x14e4 @@ -86,16 +114,19 @@ #define BCM56786_VENDOR_ID 0x14e4 #define BCM56786_DEVICE_ID 0xb786 #define BCM56786_REV_A0 0x01 +#define BCM56786_REV_A1 0x02 /* BCM56787 */ #define BCM56787_VENDOR_ID 0x14e4 #define BCM56787_DEVICE_ID 0xb787 #define BCM56787_REV_A0 0x01 +#define BCM56787_REV_A1 0x02 /* BCM56788 */ #define BCM56788_VENDOR_ID 0x14e4 #define BCM56788_DEVICE_ID 0xb788 #define BCM56788_REV_A0 0x01 +#define BCM56788_REV_A1 0x02 /* BCM56789 */ #define BCM56789_VENDOR_ID 0x14e4 @@ -195,15 +226,35 @@ #define BCM56999_REV_A0 0x01 #define BCM56999_REV_B0 0x11 +/* BCM78800 */ +#define BCM78800_VENDOR_ID 0x14e4 +#define BCM78800_DEVICE_ID 0xf800 +#define BCM78800_REV_A0 0x01 + +/* BCM78808 */ +#define BCM78808_VENDOR_ID 0x14e4 +#define BCM78808_DEVICE_ID 0xf808 +#define BCM78808_REV_A0 0x01 + /* BCM78900 */ #define BCM78900_VENDOR_ID 0x14e4 #define BCM78900_DEVICE_ID 0xf900 #define BCM78900_REV_B0 0x11 +/* BCM78902 */ +#define BCM78902_VENDOR_ID 0x14e4 +#define BCM78902_DEVICE_ID 0xf902 +#define BCM78902_REV_B0 0x11 + +/* BCM78903 */ +#define BCM78903_VENDOR_ID 0x14e4 +#define BCM78903_DEVICE_ID 0xf903 +#define BCM78903_REV_B0 0x11 + /* BCM78905 */ #define BCM78905_VENDOR_ID 0x14e4 #define BCM78905_DEVICE_ID 0xf905 -#define BCM78905_REV_B0 0x11 +#define BCM78905_REV_A0 0x01 /* * End of Supported Devices and Revisions @@ -242,8 +293,18 @@ BCMDRD_DEVLIST_ENTRY(BCM56080, BCM56080_VENDOR_ID, BCM56080_DEVICE_ID, BCM56080_REV_A0, \ 0, 0, \ bcm56080_a0, bcm56080_a0, bcm56080_a0, \ - "Pex1", "BCM56080", \ - "1.6 Tbps Multilayer Switch", 0, 0) + "Firelight2", "BCM56080", \ + "1.6 Tbps Multilayer Switch w/ MACSec", 0, 0) +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56080, BCM56080_VENDOR_ID, BCM56080_DEVICE_ID, BCM56080_REV_A1, \ + 0, 0, \ + bcm56080_a0, bcm56080_a0, bcm56080_a1, \ + "Firelight2", "BCM56080", \ + "1.6 Tbps Multilayer Switch w/ MACSec", 0, 0) +#endif #endif #if BCMDRD_CONFIG_INCLUDE_BCM56081_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) @@ -251,8 +312,18 @@ BCMDRD_DEVLIST_ENTRY(BCM56080, BCM56080_VENDOR_ID, BCM56080_DEVICE_ID, BCM56080_ BCMDRD_DEVLIST_ENTRY(BCM56081, BCM56081_VENDOR_ID, BCM56081_DEVICE_ID, BCM56081_REV_A0, \ 0, 0, \ bcm56080_a0, bcm56081_a0, bcm56081_a0, \ - "Pex1", "BCM56080", \ - "1.2 Tbps Line Card w/MACsec", 0, 0) + "Firelight2", "BCM56080", \ + "1.2 Tbps Multilayer Switch w/ MACSec", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56081_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56081, BCM56081_VENDOR_ID, BCM56081_DEVICE_ID, BCM56081_REV_A1, \ + 0, 0, \ + bcm56080_a0, bcm56081_a0, bcm56081_a1, \ + "Firelight2", "BCM56080", \ + "1.2 Tbps Multilayer Switch w/ MACSec", 0, 0) #endif #endif @@ -261,8 +332,18 @@ BCMDRD_DEVLIST_ENTRY(BCM56081, BCM56081_VENDOR_ID, BCM56081_DEVICE_ID, BCM56081_ BCMDRD_DEVLIST_ENTRY(BCM56082, BCM56082_VENDOR_ID, BCM56082_DEVICE_ID, BCM56082_REV_A0, \ 0, 0, \ bcm56080_a0, bcm56082_a0, bcm56082_a0, \ - "Pex1", "BCM56080", \ - "1.08 Tbps Line Card w/MACsec", 0, 0) + "Firelight2", "BCM56080", \ + "0.96 Tbps Multilayer Switch w/ MACSec", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56082_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56082, BCM56082_VENDOR_ID, BCM56082_DEVICE_ID, BCM56082_REV_A1, \ + 0, 0, \ + bcm56080_a0, bcm56082_a0, bcm56082_a1, \ + "Firelight2", "BCM56080", \ + "0.96 Tbps Multilayer Switch w/ MACSec", 0, 0) #endif #endif @@ -271,8 +352,18 @@ BCMDRD_DEVLIST_ENTRY(BCM56082, BCM56082_VENDOR_ID, BCM56082_DEVICE_ID, BCM56082_ BCMDRD_DEVLIST_ENTRY(BCM56083, BCM56083_VENDOR_ID, BCM56083_DEVICE_ID, BCM56083_REV_A0, \ 0, 0, \ bcm56080_a0, bcm56083_a0, bcm56083_a0, \ - "Pex1", "BCM56080", \ - "1.2 Tbps Line Card", 0, 0) + "Firelight2", "BCM56080", \ + "1.2 Tbps Multilayer Switch", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56083_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56083, BCM56083_VENDOR_ID, BCM56083_DEVICE_ID, BCM56083_REV_A1, \ + 0, 0, \ + bcm56080_a0, bcm56083_a0, bcm56083_a1, \ + "Firelight2", "BCM56080", \ + "1.2 Tbps Multilayer Switch", 0, 0) #endif #endif @@ -281,8 +372,76 @@ BCMDRD_DEVLIST_ENTRY(BCM56083, BCM56083_VENDOR_ID, BCM56083_DEVICE_ID, BCM56083_ BCMDRD_DEVLIST_ENTRY(BCM56084, BCM56084_VENDOR_ID, BCM56084_DEVICE_ID, BCM56084_REV_A0, \ 0, 0, \ bcm56080_a0, bcm56084_a0, bcm56084_a0, \ - "Pex1", "BCM56080", \ - "1.08 Tbps Line Card", 0, 0) + "Firelight2", "BCM56080", \ + "0.96 Tbps Multilayer Switch", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56084_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56084, BCM56084_VENDOR_ID, BCM56084_DEVICE_ID, BCM56084_REV_A1, \ + 0, 0, \ + bcm56080_a0, bcm56084_a0, bcm56084_a1, \ + "Firelight2", "BCM56080", \ + "0.96 Tbps Multilayer Switch", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56085_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56085, BCM56085_VENDOR_ID, BCM56085_DEVICE_ID, BCM56085_REV_A0, \ + 0, 0, \ + bcm56080_a0, bcm56085_a0, bcm56085_a0, \ + "Firelight2", "BCM56080", \ + "0.8 Tbps Multilayer Switch w/ MACSec", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56085_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56085, BCM56085_VENDOR_ID, BCM56085_DEVICE_ID, BCM56085_REV_A1, \ + 0, 0, \ + bcm56080_a0, bcm56085_a0, bcm56085_a1, \ + "Firelight2", "BCM56080", \ + "0.8 Tbps Multilayer Switch w/ MACSec", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56690_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +BCMDRD_DEVLIST_ENTRY(BCM56690, BCM56690_VENDOR_ID, BCM56690_DEVICE_ID, BCM56690_REV_A0, \ + 0, 0, \ + bcm56690_a0, bcm56690_a0, bcm56690_a0, \ + "Trident4-X7", "BCM56690", \ + "4T cost-optimized 50G-DL ToR", 0, 0) +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56692_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56692, BCM56692_VENDOR_ID, BCM56692_DEVICE_ID, BCM56692_REV_A0, \ + 0, 0, \ + bcm56690_a0, bcm56692_a0, bcm56692_a0, \ + "Trident4-X7", "BCM56690", \ + "2T cost-optimized 50G-DL ToR", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56089_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56089, BCM56089_VENDOR_ID, BCM56089_DEVICE_ID, BCM56089_REV_A0, \ + 0, 0, \ + bcm56780_a0, bcm56089_a0, bcm56089_a0, \ + "Trident4-X9", "BCM56780", \ + "6.4 Tb/s Firelight3 linecard switch.", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56089_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56089, BCM56089_VENDOR_ID, BCM56089_DEVICE_ID, BCM56089_REV_A1, \ + 0, 0, \ + bcm56780_a0, bcm56089_a0, bcm56089_a1, \ + "Trident4-X9", "BCM56780", \ + "6.4 Tb/s Firelight3 linecard switch.", 0, 0) #endif #endif @@ -304,6 +463,16 @@ BCMDRD_DEVLIST_ENTRY(BCM56782, BCM56782_VENDOR_ID, BCM56782_DEVICE_ID, BCM56782_ #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56782_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56782, BCM56782_VENDOR_ID, BCM56782_DEVICE_ID, BCM56782_REV_A1, \ + 0, 0, \ + bcm56780_a0, bcm56782_a0, bcm56782_a1, \ + "Trident4-X9", "BCM56780", \ + "8 Tb/s 160x50G-PAM4 Programmable Switch w/MACsec", 0, 0) +#endif +#endif + #if BCMDRD_CONFIG_INCLUDE_BCM56784_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) #ifdef BCMDRD_DEVLIST_INCLUDE_ALL BCMDRD_DEVLIST_ENTRY(BCM56784, BCM56784_VENDOR_ID, BCM56784_DEVICE_ID, BCM56784_REV_A0, \ @@ -334,6 +503,16 @@ BCMDRD_DEVLIST_ENTRY(BCM56786, BCM56786_VENDOR_ID, BCM56786_DEVICE_ID, BCM56786_ #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56786_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56786, BCM56786_VENDOR_ID, BCM56786_DEVICE_ID, BCM56786_REV_A1, \ + 0, 0, \ + bcm56780_a0, bcm56786_a0, bcm56786_a1, \ + "Trident4-X9", "BCM56780", \ + "5.6 Tb/s 96x50G-PAM4/32x35G-NRZ Programmable Switch w/MACsec", 0, 0) +#endif +#endif + #if BCMDRD_CONFIG_INCLUDE_BCM56787_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) #ifdef BCMDRD_DEVLIST_INCLUDE_ALL BCMDRD_DEVLIST_ENTRY(BCM56787, BCM56787_VENDOR_ID, BCM56787_DEVICE_ID, BCM56787_REV_A0, \ @@ -344,6 +523,16 @@ BCMDRD_DEVLIST_ENTRY(BCM56787, BCM56787_VENDOR_ID, BCM56787_DEVICE_ID, BCM56787_ #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56787_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56787, BCM56787_VENDOR_ID, BCM56787_DEVICE_ID, BCM56787_REV_A1, \ + 0, 0, \ + bcm56780_a0, bcm56787_a0, bcm56787_a1, \ + "Trident4-X9", "BCM56780", \ + "5.6 Tb/s 96x50G-PAM4/32x35G-NRZ Programmable Switch w/MACsec w/SmartToR", 0, 0) +#endif +#endif + #if BCMDRD_CONFIG_INCLUDE_BCM56788_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) #ifdef BCMDRD_DEVLIST_INCLUDE_ALL BCMDRD_DEVLIST_ENTRY(BCM56788, BCM56788_VENDOR_ID, BCM56788_DEVICE_ID, BCM56788_REV_A0, \ @@ -354,6 +543,16 @@ BCMDRD_DEVLIST_ENTRY(BCM56788, BCM56788_VENDOR_ID, BCM56788_DEVICE_ID, BCM56788_ #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56788_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56788, BCM56788_VENDOR_ID, BCM56788_DEVICE_ID, BCM56788_REV_A1, \ + 0, 0, \ + bcm56780_a0, bcm56788_a0, bcm56788_a1, \ + "Trident4-X9", "BCM56780", \ + "8 Tb/s 160x50G-PAM4 Programmable Switch w/MACsec w/SmartToR", 0, 0) +#endif +#endif + #if BCMDRD_CONFIG_INCLUDE_BCM56789_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) #ifdef BCMDRD_DEVLIST_INCLUDE_ALL BCMDRD_DEVLIST_ENTRY(BCM56789, BCM56789_VENDOR_ID, BCM56789_DEVICE_ID, BCM56789_REV_A0, \ @@ -598,6 +797,24 @@ BCMDRD_DEVLIST_ENTRY(BCM56999, BCM56999_VENDOR_ID, BCM56999_DEVICE_ID, BCM56999_ #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM78800_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +BCMDRD_DEVLIST_ENTRY(BCM78800, BCM78800_VENDOR_ID, BCM78800_DEVICE_ID, BCM78800_REV_A0, \ + 0, 0, \ + bcm78800_a0, bcm78800_a0, bcm78800_a0, \ + "Trident5", "BCM78800", \ + "16 Tbps Programmable Switch", 0, 0) +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM78808_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM78808, BCM78808_VENDOR_ID, BCM78808_DEVICE_ID, BCM78808_REV_A0, \ + 0, 0, \ + bcm78800_a0, bcm78808_a0, bcm78808_a0, \ + "Trident5", "BCM78800", \ + "8 Tbps Programmable Switch", 0, 0) +#endif +#endif + #if BCMDRD_CONFIG_INCLUDE_BCM78900_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) BCMDRD_DEVLIST_ENTRY(BCM78900, BCM78900_VENDOR_ID, BCM78900_DEVICE_ID, BCM78900_REV_B0, \ 0, 0, \ @@ -606,16 +823,34 @@ BCMDRD_DEVLIST_ENTRY(BCM78900, BCM78900_VENDOR_ID, BCM78900_DEVICE_ID, BCM78900_ "51.2 Tbps Multilayer Switch", 0, 0) #endif -#if BCMDRD_CONFIG_INCLUDE_BCM78905_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#if BCMDRD_CONFIG_INCLUDE_BCM78902_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) #ifdef BCMDRD_DEVLIST_INCLUDE_ALL -BCMDRD_DEVLIST_ENTRY(BCM78905, BCM78905_VENDOR_ID, BCM78905_DEVICE_ID, BCM78905_REV_B0, \ +BCMDRD_DEVLIST_ENTRY(BCM78902, BCM78902_VENDOR_ID, BCM78902_DEVICE_ID, BCM78902_REV_B0, \ 0, 0, \ - bcm78900_b0, bcm78905_b0, bcm78905_b0, \ + bcm78900_b0, bcm78902_b0, bcm78902_b0, \ "Tomahawk5", "BCM78900", \ "25.6 Tbps Multilayer Switch", 0, 0) #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM78903_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM78903, BCM78903_VENDOR_ID, BCM78903_DEVICE_ID, BCM78903_REV_B0, \ + 0, 0, \ + bcm78900_b0, bcm78903_b0, bcm78903_b0, \ + "Tomahawk5", "BCM78900", \ + "25.6 Tbps Multilayer Switch", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM78905_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +BCMDRD_DEVLIST_ENTRY(BCM78905, BCM78905_VENDOR_ID, BCM78905_DEVICE_ID, BCM78905_REV_A0, \ + 0, 0, \ + bcm78905_a0, bcm78905_a0, bcm78905_a0, \ + "Tomahawk5+", "BCM78905", \ + "51.2 Tbps Multilayer Switch", 0, 0) +#endif + /* End BCMDRD_DEVLIST_ENTRY Macros */ #ifdef BCMDRD_DEVLIST_INCLUDE_ALL diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h new file mode 100644 index 000000000000..1cca91ae081f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h @@ -0,0 +1,214 @@ +/*! \file bcmdrd_symbol_types.h + * + * + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMDRD_SYMBOL_TYPES_H +#define BCMDRD_SYMBOL_TYPES_H + +#include + +/*! + * \name Symbol flags. + * \anchor BCMDRD_SYMBOL_FLAG_xxx + */ + +/*! \{ */ + +/*! Symbol applicable for SER test. */ +#define BCMDRD_SYMBOL_FLAG_SER_TEST (1U << 7) + +/*! Symbol data will be cleared on read. */ +#define BCMDRD_SYMBOL_FLAG_CLEAR_ON_READ (1U << 8) + +/*! Symbol data can be updated by hardware. */ +#define BCMDRD_SYMBOL_FLAG_HW_UPDATED (1U << 9) + +/*! Symbol should not be accessed with traffic running. */ +#define BCMDRD_SYMBOL_FLAG_ACC_IDLE (1U << 10) + +/*! Symbol validity can be decided dynamically at system initialization. */ +#define BCMDRD_SYMBOL_FLAG_DYNAMIC (1U << 11) + +/*! Symbol represents a special access. */ +#define BCMDRD_SYMBOL_FLAG_SPECIAL (1U << 12) + +/*! Symbol access type represents a unique pipe. */ +#define BCMDRD_SYMBOL_FLAG_ACC_UNIQUE_PIPE (1U << 13) + +/*! Symbol is associated with a specific sub-pipe. */ +#define BCMDRD_SYMBOL_FLAG_SUB_PIPE (1U << 14) + +/*! Symbol is write-only. */ +#define BCMDRD_SYMBOL_FLAG_WRITEONLY (1U << 15) + +/*! Symbol is not suitable for read/write tests. */ +#define BCMDRD_SYMBOL_FLAG_NOTEST (1U << 16) + +/*! Symbol is a non-CMIC iProc register. */ +#define BCMDRD_SYMBOL_FLAG_IPROC (1U << 17) + +/*! Symbol is an overlay of other symbols. */ +#define BCMDRD_SYMBOL_FLAG_OVERLAY (1U << 18) + +/*! Symbol is read-only or any field within the symbol is read-only. */ +#define BCMDRD_SYMBOL_FLAG_READONLY (1U << 19) + +/*! Symbol with FIFO operations. */ +#define BCMDRD_SYMBOL_FLAG_FIFO (1U << 20) + +/*! Symbol is reasonable to cache in S/W. */ +#define BCMDRD_SYMBOL_FLAG_CACHEABLE (1U << 21) + +/*! Symbol is a hashed table. */ +#define BCMDRD_SYMBOL_FLAG_HASHED (1U << 22) + +/*! Symbol is an external CAM. */ +#define BCMDRD_SYMBOL_FLAG_EXT_CAM (1U << 23) + +/*! Symbol is a CAM. */ +#define BCMDRD_SYMBOL_FLAG_CAM (1U << 24) + +/*! Symbol is a register. */ +#define BCMDRD_SYMBOL_FLAG_REGISTER (1U << 25) + +/*! Symbol is a port-based register, i.e. one ionstance per port. */ +#define BCMDRD_SYMBOL_FLAG_PORT (1U << 26) + +/*! Symbol is a counter register. */ +#define BCMDRD_SYMBOL_FLAG_COUNTER (1U << 27) + +/*! Symbol is a memory. */ +#define BCMDRD_SYMBOL_FLAG_MEMORY (1U << 28) + +/*! Symbol uses big endian word ordering. */ +#define BCMDRD_SYMBOL_FLAG_BIG_ENDIAN (1U << 29) + +/*! Symbol is a memory-mapped register. */ +#define BCMDRD_SYMBOL_FLAG_MEMMAPPED (1U << 30) + +/*! Symbol is a port-block register, i.e. one instance per port-block. */ +#define BCMDRD_SYMBOL_FLAG_SOFT_PORT (1U << 31) + +/*! \} */ + +/*! + * \name Symbol attributes. + * \anchor BCMDRD_SYM_ATTR_xxx + */ + +/*! \{ */ + +/*! Symbol is a CAM. */ +#define BCMDRD_SYM_ATTR_CAM (1 << 0) + +/*! Symbol is a hashed memory. */ +#define BCMDRD_SYM_ATTR_HASHED (1 << 1) + +/*! Symbol is not visible in this configuration. */ +#define BCMDRD_SYM_ATTR_HIDDEN (1 << 2) + +/*! \} */ + +/*! + * \brief Symbol (register/memory) information + * + * The symbol information is dynamic information about a symbol in the + * current device configuraton. In many situations, this information + * will be identical to the static symbol information of the base + * device. + */ +typedef struct { + + /*! Symbol ID (unique per device). */ + bcmdrd_sid_t sid; + + /*! Symbol name, e.g. "VLANm" or "MISCCONFIGr". */ + const char *name; + + /*! Mask of block types this symbol is valid for. */ + uint32_t blktypes; + + /*! Special attributes of this symbol (\ref BCMDRD_SYMBOL_FLAG_xxx). */ + uint32_t flags; + + /*! Fixed part of symbol address (composition is device-dependent). */ + uint32_t offset; + + /*! Minimum valid index for array-type symbols. */ + uint32_t index_min; + + /*! Maximum valid index for array-type symbols. */ + uint32_t index_max; + + /*! Size of symbol data (or entry if array-type) in 32-bit words. */ + uint32_t entry_wsize; + + /*! Index address step value for array-type symbols. */ + uint32_t step_size; + +} bcmdrd_sym_info_t; + +/*! + * \name Symbol field flags. + * \anchor BCMDRD_SYMBOL_FIELD_FLAG_xxx + */ + +/*! \{ */ + +/*! Symbol field is a counter field. */ +#define BCMDRD_SYMBOL_FIELD_FLAG_COUNTER (1 << 0) + +/*! Symbol field is a key field. */ +#define BCMDRD_SYMBOL_FIELD_FLAG_KEY (1 << 1) + +/*! Symbol field is a mask field. */ +#define BCMDRD_SYMBOL_FIELD_FLAG_MASK (1 << 2) + +/*! \} */ + +/*! + * \brief Field information structure. + * + * This structure defines a single field within a symbol. + */ +typedef struct bcmdrd_sym_field_info_s { + + /*! Field name, e.g. "VLANf" or "VALIDf". */ + const char *name; + + /*! Field ID (unique per device). */ + int fid; + + /*! Special field ID, which defines how multi-view memories are decoded. */ + int view; + + /*! Special attributes of this field (\ref BCMDRD_SYMBOL_FIELD_FLAG_xxx). */ + uint32_t flags; + + /*! First bit of this field. */ + uint16_t minbit; + + /*! Last bit of this field. */ + uint16_t maxbit; + +} bcmdrd_sym_field_info_t; + +#endif /* BCMDRD_SYMBOL_TYPES_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h new file mode 100644 index 000000000000..0a8faeb1362f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h @@ -0,0 +1,1139 @@ +/*! \file bcmdrd_symbols.h + * + * Chip symbol table definitions. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMDRD_SYMBOLS_H +#define BCMDRD_SYMBOLS_H + +/******************************************************************************* + * BCMDRD symbol formats + ******************************************************************************/ + +#include + +/******************************************************************************* + * Resolve compile depedencies for optimized code size reduction. + ******************************************************************************/ + +#if BCMDRD_CONFIG_INCLUDE_CHIP_SYMBOLS == 0 +#undef BCMDRD_CONFIG_INCLUDE_FIELD_INFO +#define BCMDRD_CONFIG_INCLUDE_FIELD_INFO 0 +#endif + +/*! + * \name Symbol index information. + * \anchor BCMDRD_SYMBOL_INDEX_F_xxx + * + * In order to maintain a compact symbol table format the entry size + * and the minimum/maximum table indexes are encoded into a single + * 32-bit word. + * + * The following flags and macros are used to encode and extract the + * above information to/from the 32-bit index word. + */ + +/*! \{ */ + +/*! + * \brief Flag indicating exponential index calculation. + * + * Used if real maximum cannot be contained within max field. + * + * Real maximum is encoded as ((1 << min) * max) - 1). + * + * Real minimum is always zero. + * + * Example: + * (max,min)=(17,12) + * => real max = ((1 << 12) * 17) - 1) = 0x10fff + */ +#define BCMDRD_SYMBOL_INDEX_F_EXP 0x1 + +/*! + * \brief Flag indicating variable index maximum. + * + * Used e.g. if register array size is port-dependent. + * + * Real maximum and minimum depend on configuration. + * + * The min value is used as an encoding key which may be passed to a + * chip-specific function. + */ +#define BCMDRD_SYMBOL_INDEX_F_VAR 0x2 + +/*! + * \brief Flag indicating address step different from 1. + * + * Used e.g. if address step for a register array is non-standard. + * + * Real minimum is always zero. + * + * The min value is interpreted as (address step - 1). + * + * Example: + * (max,min)=(11,3) + * => 12 elements with addr(i+1) = addr(i)+4 + */ +#define BCMDRD_SYMBOL_INDEX_F_STEP 0x4 + +/*! Encode entry size into index word. */ +#define BCMDRD_SYMBOL_INDEX_SIZE_ENCODE(s) F32_ENCODE((uint32_t)s, 0, 8) + +/*! Extract entry size from index word. */ +#define BCMDRD_SYMBOL_INDEX_SIZE_GET(w) F32_GET(w, 0, 8) + +/*! Encode minimum table index into index word. */ +#define BCMDRD_SYMBOL_INDEX_MIN_ENCODE(s) F32_ENCODE((uint32_t)s, 8, 5) + +/*! Extract raw minimum table index from index word. */ +#define BCMDRD_SYMBOL_INDEX_MIN_GETRAW(w) F32_GET(w, 8, 5) + +/*! Encode maximum table index into index word. */ +#define BCMDRD_SYMBOL_INDEX_MAX_ENCODE(s) F32_ENCODE((uint32_t)s, 13, 16) + +/*! Extract raw maximum table index from index word. */ +#define BCMDRD_SYMBOL_INDEX_MAX_GETRAW(w) F32_GET(w, 13, 16) + +/*! Encode index flags into index word. */ +#define BCMDRD_SYMBOL_INDEX_FLAGS_ENCODE(s) F32_ENCODE((uint32_t)s, 29, 3) + +/*! Extract index flags from index word. */ +#define BCMDRD_SYMBOL_INDEX_FLAGS_GET(w) F32_GET(w, 29, 3) + +/*! Get real minimum table index based on raw values and flags. */ +#define BCMDRD_SYMBOL_INDEX_MIN_GET(w) \ + (BCMDRD_SYMBOL_INDEX_FLAGS_GET(w) ? \ + 0 : \ + BCMDRD_SYMBOL_INDEX_MIN_GETRAW(w)) + +/*! Get encoding type from index word. */ +#define BCMDRD_SYMBOL_INDEX_ENC_GET(w) BCMDRD_SYMBOL_INDEX_MIN_GETRAW(w) + +/*! Get real maximum table index based on raw values and flags. */ +#define BCMDRD_SYMBOL_INDEX_MAX_GET(w) \ + ((BCMDRD_SYMBOL_INDEX_FLAGS_GET(w) & BCMDRD_SYMBOL_INDEX_F_EXP) ? \ + (BCMDRD_SYMBOL_INDEX_MAX_GETRAW(w) * \ + (1U << BCMDRD_SYMBOL_INDEX_MIN_GETRAW(w))) - 1 : \ + BCMDRD_SYMBOL_INDEX_MAX_GETRAW(w)) + +/*! Get per-index address step value. */ +#define BCMDRD_SYMBOL_INDEX_STEP_GET(w) \ + ((BCMDRD_SYMBOL_INDEX_FLAGS_GET(w) & BCMDRD_SYMBOL_INDEX_F_STEP) ? \ + (BCMDRD_SYMBOL_INDEX_MIN_GETRAW(w) + 1) : \ + 1) + +/*! \} */ + +/*! + * \name Symbol field encode information. + * + * Symbol field information is encoded in variable size. The supported formats + * are depicted in the following tables: + * + * - Single Word Field Format + * | Bits | Name | Description | + * | :---: | --------- | ------------------------------------------- | + * | 31:31 | LastField | Indicates this is the last field descriptor word in a field array. | + * | 30:30 | Ext | Indicates that this is the first word in a Double Word Field, not a Single Word Field.
This word and the next form a Double Word Field. | + * | 29:29 | Ext2 | Indicates that this field is visible only in certain memory views.
This word and the next two form a Triple Word Field. | + * | 28:15 | FieldId | This is the unique field id for this field. | + * | 14:7 | Minbit | This is the field's minbit. | + * | 6:0 | Width | This is the field's width (in bits). | + *
+ * + * - Double Word Field Format + * | Word | Bits | Name | Description | + * | :--: | :---: | --------- | ------------------------------------------- | + * | 0 | 31:31 | LastField | Indicates this is the last field descriptor word in a field array. | + * | 0 | 30:30 | Ext | Indicates this is the start of a Double Word field. | + * | 0 | 29:29 | Ext2 | Must be zero for Double Word fields. | + * | 0 | 28:28 | Cnt | Indicates that field is a counter. | + * | 0 | 27:27 | Key | Indicates that field is a key. | + * | 0 | 26:26 | Mask | Indicates that field is a mask. | + * | 0 | 25:24 | Rsvd | Reserved for future field attributes. | + * | 0 | 23:0 | FieldId | This is the unique field id for this field. | + * | 1 | 31:16 | Minbit | This is the field's minbit. | + * | 1 | 15:0 | Width | This is the field's width (in bits). | + *
+ * + * - Triple Word Field Format + * | Word | Bits | Name | Description | + * | :--: | :---: | --------- | ------------------------------------------- | + * | 0 | 31:31 | LastField | Indicates this is the last field descriptor word in a field array. | + * | 0 | 30:30 | Ext | Must be zero for Triple Word fields. | + * | 0 | 29:29 | Ext2 | Indicates that this word and the next two form a Triple Word Field. | + * | 0 | 28:28 | Cnt | Indicates that field is a counter. | + * | 0 | 27:27 | Key | Indicates that field is a key. | + * | 0 | 26:26 | Mask | Indicates that field is a mask. | + * | 0 | 25:24 | Rsvd | Reserved for future field attributes. | + * | 0 | 23:0 | FieldId | This is the unique field id for this field. | + * | 1 | 31:16 | Minbit | This is the field's minbit. | + * | 1 | 15:0 | Width | This is the field's width (in bits). | + * | 2 | 23:0 | ViewId | This is the unique field view id for this field. | + *
+ */ + +/*! \{ */ + +/*! Indicates last field descriptor word in a field array. */ +#define BCMDRD_SYM_FIELD_FLAG_LAST (1U << 31) + +/*! Indicates double-word field descriptor. */ +#define BCMDRD_SYM_FIELD_FLAG_EXT (1U << 30) + +/*! Indicates triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_FLAG_EXT2 (1U << 29) + +/*! Indicates counter attribute in a field */ +#define BCMDRD_SYM_FIELD_ATTR_COUNTER (1U << 28) + +/*! Indicates key attribute in a field */ +#define BCMDRD_SYM_FIELD_ATTR_KEY (1U << 27) + +/*! Indicates mask attribute in a field */ +#define BCMDRD_SYM_FIELD_ATTR_MASK (1U << 26) + +/*! Test field descriptor word for \ref BCMDRD_SYM_FIELD_FLAG_LAST. */ +#define BCMDRD_SYM_FIELD_LAST(w) ((w) & BCMDRD_SYM_FIELD_FLAG_LAST) + +/*! Test field descriptor word for \ref BCMDRD_SYM_FIELD_FLAG_EXT. */ +#define BCMDRD_SYM_FIELD_EXT(w) ((w) & BCMDRD_SYM_FIELD_FLAG_EXT) + +/*! Test field descriptor word for \ref BCMDRD_SYM_FIELD_FLAG_EXT2. */ +#define BCMDRD_SYM_FIELD_EXT2(w) ((w) & BCMDRD_SYM_FIELD_FLAG_EXT2) + + +/*! Encode field ID into a single-word field descriptor. */ +#define BCMDRD_SYM_FIELD_ID_ENCODE(id) F32_ENCODE(id, 15, 14) + +/*! Encode field start-bit into a single-word field descriptor. */ +#define BCMDRD_SYM_FIELD_MIN_ENCODE(b) F32_ENCODE(b, 7, 8) + +/*! Encode field size into a single-word field descriptor. */ +#define BCMDRD_SYM_FIELD_WIDTH_ENCODE(b) F32_ENCODE(b, 0, 7) + +/*! Extract field ID from a single-word field descriptor. */ +#define BCMDRD_SYM_FIELD_ID_GET(w) F32_GET(w, 15, 14) + +/*! Extract field start-bit from a single-word field descriptor. */ +#define BCMDRD_SYM_FIELD_MIN_GET(w) F32_GET(w, 7, 8) + +/*! Extract field size from a single-word field descriptor. */ +#define BCMDRD_SYM_FIELD_WIDTH_GET(w) F32_GET(w, 0, 7) + +/*! Encode field information into a single-word field descriptor. */ +#define BCMDRD_SYM_FIELD_ENCODE(id, min, width) \ + (BCMDRD_SYM_FIELD_ID_ENCODE(id) | \ + BCMDRD_SYM_FIELD_MIN_ENCODE(min) | \ + BCMDRD_SYM_FIELD_WIDTH_ENCODE(width)) + +/*! Encode field ID into a double-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT_ID_ENCODE(id) F32_ENCODE(id, 0, 24) + +/*! Encode field start-bit into a double-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT_MIN_ENCODE(b) F32_ENCODE(b, 16, 16) + +/*! Encode field size into a double-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT_WIDTH_ENCODE(b) F32_ENCODE(b, 0, 16) + +/*! Extract field ID from a double-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT_ID_GET(w) F32_GET(w, 0, 24) + +/*! Extract field start-bit from a double-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT_MIN_GET(w) F32_GET((&(w))[1], 16, 16) + +/*! Extract field size from a double-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT_WIDTH_GET(w) F32_GET((&(w))[1], 0, 16) + +/*! Encode field information into a double-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT_ENCODE(id, min, width) \ + (BCMDRD_SYM_FIELD_FLAG_EXT | BCMDRD_SYM_FIELD_EXT_ID_ENCODE(id)), \ + (BCMDRD_SYM_FIELD_EXT_MIN_ENCODE(min) | \ + BCMDRD_SYM_FIELD_EXT_WIDTH_ENCODE(width)) + +/*! + * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_COUNTER + * in double-word field descriptor. + */ +#define BCMDRD_SYM_FIELD_EXT_ATTR_IS_COUNTER(w) \ + ((w) & BCMDRD_SYM_FIELD_ATTR_COUNTER) + +/*! + * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_KEY + * in double-word field descriptor. + */ +#define BCMDRD_SYM_FIELD_EXT_ATTR_IS_KEY(w) \ + ((w) & BCMDRD_SYM_FIELD_ATTR_KEY) + +/*! + * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_MASK + * in double-word field descriptor. + */ +#define BCMDRD_SYM_FIELD_EXT_ATTR_IS_MASK(w) \ + ((w) & BCMDRD_SYM_FIELD_ATTR_MASK) + + +/*! Encode field ID into a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_ID_ENCODE(id) F32_ENCODE(id, 0, 24) + +/*! Encode field start-bit into a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_MIN_ENCODE(b) F32_ENCODE(b, 16, 16) + +/*! Encode field size into a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_WIDTH_ENCODE(b) F32_ENCODE(b, 0, 16) + +/*! Encode field view ID into a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_VIEW_ENCODE(b) F32_ENCODE(b, 0, 24) + +/*! Extract field ID from a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_ID_GET(w) F32_GET(w, 0, 24) + +/*! Extract field start-bit from a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_MIN_GET(w) F32_GET((&(w))[1], 16, 16) + +/*! Extract field width from a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_WIDTH_GET(w) F32_GET((&(w))[1], 0, 16) + +/*! Extract field view ID from a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_VIEW_GET(w) F32_GET((&(w))[2], 0, 24) + +/*! Encode field information into a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_ENCODE(id, min, width, view) \ + (BCMDRD_SYM_FIELD_FLAG_EXT2 | BCMDRD_SYM_FIELD_EXT2_ID_ENCODE(id)), \ + (BCMDRD_SYM_FIELD_EXT2_MIN_ENCODE(min) | \ + BCMDRD_SYM_FIELD_EXT2_WIDTH_ENCODE(width)), \ + BCMDRD_SYM_FIELD_EXT2_VIEW_ENCODE(view) + +/*! + * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_COUNTER + * in triple-word field descriptor. + */ +#define BCMDRD_SYM_FIELD_EXT2_ATTR_IS_COUNTER(w) \ + ((w) & BCMDRD_SYM_FIELD_ATTR_COUNTER) + +/*! + * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_KEY + * in triple-word field descriptor. + */ +#define BCMDRD_SYM_FIELD_EXT2_ATTR_IS_KEY(w) \ + ((w) & BCMDRD_SYM_FIELD_ATTR_KEY) + +/*! + * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_MASK + * in triple-word field descriptor. + */ +#define BCMDRD_SYM_FIELD_EXT2_ATTR_IS_MASK(w) \ + ((w) & BCMDRD_SYM_FIELD_ATTR_MASK) + +/*! \} */ + + +/*! + * \brief Iterate over all fields for a symbol. + * + * Given a pointer to a field descriptor word array, this macro will + * fill out the \ref bcmdrd_sym_field_info_t structure for each field + * in the field descriptor word array. + * + * If a list of corresponding fieln names is given, the field + * information will include the symbolic field name. + * + * The macro must be terminated with \ref BCMDRD_SYM_FIELDS_ITER_END. + */ +#define BCMDRD_SYM_FIELDS_ITER_BEGIN(start, finfo, fnames) { \ + uint32_t *_fp = start; \ + for (;;) { \ + if (!_fp) { \ + break; \ + } else { \ + _fp = bcmdrd_sym_field_info_decode(_fp, (fnames), &(finfo)); + +/*! Refer to \ref BCMDRD_SYM_FIELDS_ITER_BEGIN. */ +#define BCMDRD_SYM_FIELDS_ITER_END() }}} + +/*! + * Symbol information structure (single symbol). + */ +typedef struct bcmdrd_symbol_s { + + /*! Base offset (fixed address information). */ + uint32_t addr; + + /*! Encoded information about valid indexes for arrays. */ + uint32_t index; + + /*! Symbol flags (\ref BCMDRD_SYMBOL_FLAG_xxx). */ + uint32_t flags; + + /*! + * Device-specific information. + * | Bits | Name | Description | + * | :---: | ----------------- | ---------------------------------------- | + * | 31:24 | HMI-specific data | This is 8-bit symbol HMI-specific data. | + * | 23:21 | Sub-pipe instance | Sub-pipe association (if any). | + * | 20:14 | Access type | This is the symbol access type. | + * | 13:7 | Block type 1 | The 2nd symbol block type (> 0 if any). | + * | 6:0 | Block type 0 | The 1st symbol block type (> 0 always). | + */ + uint32_t info; + + /*! Profile information for default value, SER information, etc. */ + uint32_t pfinfo; + +#if BCMDRD_CONFIG_INCLUDE_FIELD_INFO == 1 + /*! Pointer to field information data. */ + uint32_t *fields; +#endif + + /*! Symbol name. */ + const char *name; + +#if BCMDRD_CONFIG_INCLUDE_ALIAS_NAMES == 1 + /*! + * Alternative symbol name (typically used if hardware and + * software names differ). + */ + const char *alias; + + /*! + * User-fiendly symbol name (typically a shorter a more meaningful + * name). + */ + const char *ufname; +#endif + +} bcmdrd_symbol_t; + +/*! Maximum block types encoded in the symbol device-specific information. */ +#define BCMDRD_SYM_INFO_MAX_BLKTYPES 2 + +/*! Bit number of the encoded block type. */ +#define BCMDRD_SYM_INFO_BLKTYPE_BITS 7 + +/*! Bit mask of the encoded block type. */ +#define BCMDRD_SYM_INFO_BLKTYPE_MASK ((1U << BCMDRD_SYM_INFO_BLKTYPE_BITS) - 1) + +/*! Bit mask of all the encoded block types. */ +#define BCMDRD_SYM_INFO_BLKTYPES_MASK \ + ((1U << (BCMDRD_SYM_INFO_MAX_BLKTYPES * BCMDRD_SYM_INFO_BLKTYPE_BITS)) - 1) + +/*! Extract block types from symbol device-specific information. */ +#define BCMDRD_SYM_INFO_BLKTYPES(_w) ((_w) & BCMDRD_SYM_INFO_BLKTYPES_MASK) + +/*! Bit number of the encoded access type. */ +#define BCMDRD_SYM_INFO_ACCTYPE_SHIFT \ + (BCMDRD_SYM_INFO_MAX_BLKTYPES * BCMDRD_SYM_INFO_BLKTYPE_BITS) + +/*! Bit number of the encoded access type. */ +#define BCMDRD_SYM_INFO_ACCTYPE_BITS 7 + +/*! Bit mask of the encoded access type. */ +#define BCMDRD_SYM_INFO_ACCTYPE_MASK ((1U << BCMDRD_SYM_INFO_ACCTYPE_BITS) - 1) + +/*! Extract access type from symbol device-specific information. */ +#define BCMDRD_SYM_INFO_ACCTYPE(_w) \ + (((_w) >> BCMDRD_SYM_INFO_ACCTYPE_SHIFT) & BCMDRD_SYM_INFO_ACCTYPE_MASK) + +/*! Bit number of the encoded sub-pipe instance. */ +#define BCMDRD_SYM_INFO_SUBPIPE_INST_BITS 3 + +/*! Bit mask of the encoded sub-pipe instance. */ +#define BCMDRD_SYM_INFO_SUBPIPE_INST_MASK \ + ((1U << BCMDRD_SYM_INFO_SUBPIPE_INST_BITS) - 1) + +/*! Extract sub-pipe instance from symbol device-specific information. */ +#define BCMDRD_SYM_INFO_SUBPIPE_INST(_w) \ + (((_w) >> 21) & BCMDRD_SYM_INFO_SUBPIPE_INST_MASK) + +/*! Extract block type by index from symbol device-specific information. */ +#define BCMDRD_SYM_INFO_BLKTYPE(_w, _i) \ + ((BCMDRD_SYM_INFO_BLKTYPES(_w) >> \ + (BCMDRD_SYM_INFO_BLKTYPE_BITS * (_i))) & BCMDRD_SYM_INFO_BLKTYPE_MASK) + +/*! + * \name Symbol profile information. + */ + +/*! \{ */ + +/*! Set profile offset for memory symbol. */ +#define BCMDRD_SYM_MEMPF_OFFSET_SET(_p) F32_ENCODE((_p), 0, 12) + +/*! Get profile offset for memory. */ +#define BCMDRD_SYM_MEMPF_OFFSET_GET(_pi) F32_GET((_pi), 0, 12) + +/*! Set profile offset for register. */ +#define BCMDRD_SYM_REGPF_OFFSET_SET(_p) F32_ENCODE((_p), 0, 12) + +/*! Get profile offset for register. */ +#define BCMDRD_SYM_REGPF_OFFSET_GET(_pi) F32_GET((_pi), 0, 12) + +/*! Set profile offset for MOR of symbol. */ +#define BCMDRD_SYM_MORPF_OFFSET_SET(_p) F32_ENCODE((_p), 12, 8) + +/*! Get profile offset for MOR of symbol. */ +#define BCMDRD_SYM_MORPF_OFFSET_GET(_pi) F32_GET((_pi), 12, 8) + +/*! Set profile offset for error correction information of symbol. */ +#define BCMDRD_SYM_ECCPF_OFFSET_SET(_p) F32_ENCODE((_p), 20, 12) + +/*! Get profile offset for error correction information of symbol. */ +#define BCMDRD_SYM_ECCPF_OFFSET_GET(_pi) F32_GET((_pi), 20, 12) + +/*! \} */ + + +/*! + * \brief Memory comparison function. + * + * \param [in] ent_a Element a of memory to be compared. + * \param [in] ent_b Element b of memory to be compared. + * + * \return 0 if two memory elements equal, otherwise unequal. + */ +typedef int (*bcmdrd_sym_mem_cmp_f)(void *ent_a, void *ent_b); + +/*! + * Memory profile structure. + */ +typedef struct bcmdrd_sym_mem_profile_s { + + /*! Memory comparison function. */ + bcmdrd_sym_mem_cmp_f cmp_fn; + + /*! Null entry data array. */ + const void *null_ent; + +} bcmdrd_sym_mem_profile_t; + +/*! + * MOR profile structure. + */ +typedef struct bcmdrd_sym_mor_profile_s { + + /*! MOR read. */ + uint32_t mrd; + + /*! MOR write. */ + uint32_t mwr; + +} bcmdrd_sym_mor_profile_t; + +/*! + * Symbols table structure (all symbols). + */ +typedef struct bcmdrd_symbols_s { + + /*! List of all symbols used by this device. */ + const bcmdrd_symbol_t *symbols; + + /*! Number of entries in symbols array. */ + const uint32_t size; + + /*! Number of entries in each symbols array section. */ + const uint32_t sect_size[2]; + + /*! List of all field names used by this device. */ + const char **field_names; + + /*! List of all reset values/masks used by this device. */ + const uint32_t *reg_profiles; + + /*! List of all memory profiles used by this device. */ + const bcmdrd_sym_mem_profile_t *mem_profiles; + + /*! List of all MOR profiles used by this device. */ + const bcmdrd_sym_mor_profile_t *mor_profiles; + + /*! SER data used by this device. */ + const void *ser_data; + +#if BCMDRD_CONFIG_INCLUDE_ALIAS_NAMES == 1 + /*! List of all symbols alias names used in this device. */ + const bcmdrd_enum_map_t *alias_names; + + /*! Number of entries in symbols alias names array */ + const uint32_t alias_names_size; +#endif + + /*! Symbols are sorted and searchable by bsearch. */ + const bool sorted; + +} bcmdrd_symbols_t; + + +/*! + * \brief Search a symbol array. + * + * Search symbol array by comparing input name to each symbol name. + * + * This function is primarily intended for internal use, and should + * normally not be called directly. + * + * \param [in] name Symbol name to search for. + * \param [in] table Array of symbol structures. + * \param [in] size Size of symbol array. + * \param [out] sid Symbol ID if match is found. + * + * \retval Pointer to symbol structure, or NULL if not found. + */ +extern const bcmdrd_symbol_t * +bcmdrd_symbol_find(const char *name, + const bcmdrd_symbol_t *table, uint32_t size, + bcmdrd_sid_t *sid); + +/*! + * \brief Binary search a symbol table. + * + * Binary search a symbol table from symbol names or alternative names. + * The symbol table should be sorted properly for the binary search support. + * + * This function is primarily intended for internal use, and should + * normally not be called directly. + * + * \param [in] name Symbol name to look for. + * \param [in] symbols Symbol table structure. + * \param [out] sid Symbol ID if match is found. + * + * \retval Pointer to symbol structure, or NULL if not found. + */ +const bcmdrd_symbol_t * +bcmdrd_symbols_fast_find(const char *name, const bcmdrd_symbols_t *symbols, + bcmdrd_sid_t *sid); + +/*! + * \brief Search a symbol table. + * + * Primary symbol search function. Takes a pointer to the symbols + * structure, finds the name in either one, and returns a full symbol + * structure. + * + * \param [in] name Symbol name to look for. + * \param [in] symbols Symbol table structure. + * \param [out] sid Symbol ID if match is found. + * + * \retval Pointer to symbol structure, or NULL if not found. + */ +extern const bcmdrd_symbol_t * +bcmdrd_symbols_find(const char *name, const bcmdrd_symbols_t *symbols, + bcmdrd_sid_t *sid); + +/*! + * \brief Get a specific symbol by index. + * + * \param [in] symbols - Symbols information structure for device. + * \param [in] sindex - Symbol index (usually same as symbol ID). + * \param [out] rsym - Symbol information structure to fill. + * + * \retval 0 No errors, or -1 if not found + */ +extern int +bcmdrd_symbols_get(const bcmdrd_symbols_t *symbols, uint32_t sindex, + bcmdrd_symbol_t *rsym); + +/*! + * \brief Get index of a specific symbol. + * + * \param [in] symbols - Symbols information structure for device. + * \param [in] symbol - Specific symbol structure. + * + * \retval Symbol index, or -1 if not found + */ +extern int +bcmdrd_symbols_index(const bcmdrd_symbols_t *symbols, + const bcmdrd_symbol_t *symbol); + +/*! + * \brief Get symbol information. + * + * Retrieve dynamic symbol information for register/memory. + * + * \param [in] symbols - Symbols information structure for device. + * \param [in] sid Device-specific symbol ID + * \param [out] sinfo Symbol information structure to fill if not NULL + * + * \retval Raw symbol structure, or NULL if not found. + */ +extern const bcmdrd_symbol_t * +bcmdrd_sym_info_get(const bcmdrd_symbols_t *symbols, bcmdrd_sid_t sid, + bcmdrd_sym_info_t *sinfo); + +/*! + * \name Symbol matching modes. + * \anchor BCMDRD_SYMBOLS_ITER_MODE_xxx + */ + +/*! \{ */ + +/*! Symbol table iterator must match exact symbol name. */ +#define BCMDRD_SYMBOLS_ITER_MODE_EXACT 0 + +/*! Symbol table iterator must match beginning of symbol name. */ +#define BCMDRD_SYMBOLS_ITER_MODE_START 1 + +/*! Symbol table iterator must match any sub-string in symbol name. */ +#define BCMDRD_SYMBOLS_ITER_MODE_STRSTR 2 + +/*! \} */ + +/*! + * \brief Symbols iteration call-back function. + * + * \param [in] symbol Symbol structure (single symbol). + * \param [in] sid Symbol ID. + * \param [in] vptr Caller-provided context. + * + * \retval 0 on success, -1 on failure. + */ +typedef int (*bcmdrd_symbols_iter_cb_f)(const bcmdrd_symbol_t *symbol, + bcmdrd_sid_t sid, + void *vptr); + +/*! + * \brief Symbol table iterator control structure. + * + * This structure contains symbol matching information and call-back + * function information for the symbol table iterator function. + */ +typedef struct bcmdrd_symbols_iter_s { + + /*! String to match against each symbol. */ + const char *name; + + /*! Defines valid matches (\ref BCMDRD_SYMBOLS_ITER_MODE_xxx) */ + int matching_mode; + + /*! Symbol flags that must be present. */ + uint32_t pflags; + + /*! Symbol flags that must be absent. */ + uint32_t aflags; + + /*! + * Block types that must be present. + * List of block types terminated by -1 if not NULL. + */ + int *pblktypes; + + /*! + * Block types that must be absent. + * List of block types terminated by -1 if not NULL. + */ + int *ablktypes; + + /*! + * Access types that must be present. + * List of access types terminated by -1 if not NULL. + */ + int *pacctypes; + + /*! + * Access types that must be absent. + * List of access types terminated by -1 if not NULL. + */ + int *aacctypes; + + /*! Symbols information structure for device. */ + const bcmdrd_symbols_t *symbols; + + /*! Function to be called for each matching symbol. */ + bcmdrd_symbols_iter_cb_f function; + + /*! Context for call-back function. */ + void *vptr; + +} bcmdrd_symbols_iter_t; + +/*! + * \brief Field filtering call-back function. + * + * This function will indicate whether a particular field should be + * filtered out for the current memory view. + * + * The field-view encoding string has the following syntax: + * + * {[\]:\:\[|\ ... ]} + * + * Ideally the keysrc is the same data entry which is + * being decoded, and in this case it can left out, e.g.: + * + * {:KEY_TYPEf:1} + * + * This example encoding means that if KEY_TYPEf=1, then + * this field is valid for this view. + * + * Note that a field can be for multiple views, e.g.: + * + * {:KEY_TYPEf:1|3} + * + * This example encoding means that this field is valid + * if KEY_TYPEf=1 or KEY_TYPEf=3. + * + * The special \=-1 means that this field is valid + * even if there is no context (cookie=NULL). + * + * \param [in] symbol Symbol structure (single symbol). + * \param [in] fnames List of all field names for this unit. + * \param [in] encoding Field-view encoding string. + * \param [in] cookie Caller-provided context. + * + * \retval true if field should be filtered out, otherwise false. + */ +typedef int (*bcmdrd_symbol_filter_cb_f)(const bcmdrd_symbol_t *symbol, + const char **fnames, + const char *encoding, + void *cookie); + +/*! + * \brief Customized symbol filtering call-back function. + * + * This function will indicate whether a particular name with + * with extra flags information should be filtered out. + * + * \param [in] symbol Symbol structure (single symbol). + * \param [in] name Name of the identifier. + * \param [in] flags Flags carried with the identifier. + * \param [in] data Table entry data to process. + * \param [in] cookie Caller-provided context. + * + * \retval true if field should be filtered out, otherwise false. + */ +typedef int (*bcmdrd_symbol_custom_filter_cb_f)(const bcmdrd_symbol_t *symbol, + const char *name, + uint32_t flags, + uint32_t *data, + void *cookie); + +/*! + * \brief Iterate over all symbols in a symbol table. + * + * Search symbol table and call a user-defined function for each + * matched symbol. Useful if multiple partial matches may occur. + * + * Iteration will stop if the call-back function returns a non-zero + * value. + * + * \param [in] iter Iterator control structure (see \ref + * bcmdrd_symbols_iter_t). + * + * \retval 0 No errors, otherwise call-back function return value. + */ +extern int +bcmdrd_symbols_iter(bcmdrd_symbols_iter_t *iter); + +/*! + * \brief Default field-view filtering function. + * + * See \ref bcmdrd_symbol_filter_cb_f for a detailed description. + * + * \param [in] symbol Symbol structure (single symbol). + * \param [in] fnames List of all field names for this unit. + * \param [in] encoding Field-view encoding string. + * \param [in] cookie Caller-provided context. + * + * \retval true if field should be filtered out, otherwise false. + */ +extern int +bcmdrd_symbol_field_filter(const bcmdrd_symbol_t *symbol, + const char **fnames, + const char *encoding, + void *cookie); + +/*! + * \brief Get list of fields IDs for given symbol ID. + * + * The function will always return the total number of valid field IDs + * in num_fid, irrespective of the value of list_max, i.e. if num_fid + * is greater than list_max, then the returned fid_list was truncated. + * + * For example, if list_max is zero, then the number of valid field + * IDs is returned in num_fid, but the fid_list is not updated (can be + * specified as NULL). The returned num_fid can then be used to + * allocate a sufficiently large fid_list array. + * + * \param [in] symbols - Symbols information structure for device. + * \param [in] sid Device-specific symbol ID + * \param [in] list_max Maximum number of entries in field ID list + * \param [out] fid_list Field ID list + * \param [out] num_fid Total number of field IDs for this symbold ID + * + * \retval 0 No errors + */ +int +bcmdrd_sym_fid_list_get(const bcmdrd_symbols_t *symbols, + bcmdrd_sid_t sid, size_t list_max, + bcmdrd_fid_t *fid_list, size_t *num_fid); + +/*! + * \brief Get field information for register/memory field. + * + * Obtain field information (name, start bit, end bit, etc.) for + * specified symbol ID and field ID. + * + * \param [in] symbols - Symbols information structure for device. + * \param [in] sid Device-specific symbol ID + * \param [in] fid Device-specific field ID + * \param [out] finfo Field information structure to fill + * + * \retval Pointer to symbol entry, or NULL if not found + */ +extern const bcmdrd_symbol_t * +bcmdrd_sym_field_info_get(const bcmdrd_symbols_t *symbols, + bcmdrd_sid_t sid, bcmdrd_fid_t fid, + bcmdrd_sym_field_info_t *finfo); + +/*! + * \brief Get field information for register/memory field. + * + * Obtain field information (name, start bit, end bit, etc.) for + * specified symbol ID and field name. + * + * \param [in] symbols - Symbols information structure for device. + * \param [in] sid Device-specific symbol ID + * \param [in] fname Field name (ASCII string) + * \param [out] finfo Field information structure to fill + * + * \return Pointer to symbol entry, or NULL if not found. + */ +extern const bcmdrd_symbol_t * +bcmdrd_sym_field_info_get_by_name(const bcmdrd_symbols_t *symbols, + bcmdrd_sid_t sid, const char *fname, + bcmdrd_sym_field_info_t *finfo); + +/*! + * \brief Decode raw field information. + * + * This function decodes raw field information as encoded in the + * symbol table. + * + * FOR INTERNAL USE ONLY. + * + * \param [in] fp Pointer to raw field encoding + * \param [in] fnames Device-specfic list of all field names + * \param [out] finfo Field information structure + * + * \return Pointer to the next field encoding, or NULL if end of list. + */ +extern uint32_t * +bcmdrd_sym_field_info_decode(uint32_t *fp, const char **fnames, + bcmdrd_sym_field_info_t *finfo); + +/*! + * \brief Return the number of fields in a register/memory entry. + * + * FOR INTERNAL USE ONLY. + * + * \param [in] fp Pointer to raw field encoding + * + * \return Number of fields in this register/memory entry. + */ +extern uint32_t +bcmdrd_sym_field_info_count(uint32_t *fp); + +/*! + * \brief Common memory comparison function. + * + * \param [in] ent_a Element a of memory to be compared. + * \param [in] ent_b Element b of memory to be compared. + * + * \return 0 if two memory elements equal, otherwise unequal. + */ +extern int +bcmdrd_sym_mem_cmp_undef(void *ent_a, void *ent_b); + +/*! + * \brief Memory comparison function with inverted mask. + * + * This function will compare only the specified mask bits in + * memory \c ent_a and \c ent_b. The memory mask will be specified + * in an inverted bit mask by \c imask. For example, if bits 0~3 are + * intended to be compared in a 32-bit entry, the contents of \c imask + * would be 0xfffffff0. + * + * \param [in] ent_a Memory entry a to be compared. + * \param [in] ent_b Memory entry b to be compared. + * \param [in] imask Invert mask of Memory entry to be masked with memory entry. + * \param [in] size Compared memory entry size in byte. + * + * \return 0 if two values equal, -1 if ent_a < ent_b, and 1 if ent_a > ent_b. + */ +extern int +bcmdrd_sym_mem_cmp_imask(void *ent_a, void *ent_b, void *imask, int size); + +/*! + * \brief Memory comparison function with mask. + * + * This function will compare only the specified mask bits in + * memory \c ent_a and \c ent_b. The memory mask will be specified in an + * bit mask by \c mask. For example, if bits 0~3 are intended to be compared + * in a 32-bit entry, the contents of \c mask would be 0x0000000f. + * + * \param [in] ent_a Memory entry a to be compared. + * \param [in] ent_b Memory entry b to be compared. + * \param [in] mask Mask of Memory entry to be masked with memory entry. + * \param [in] size Compared memory entry size in byte. + * + * \return 0 if two values equal, -1 if ent_a < ent_b, and 1 if ent_a > ent_b. + */ +extern int +bcmdrd_sym_mem_cmp_mask(void *ent_a, void *ent_b, void *mask, int size); + +/*! + * Memory element value comparison macro. + * The macro will not return only if the comparing values a and b + * are equal. + */ +#define BCMDRD_SYM_MEM_VAL_CMP_RETURN(_a, _b) { \ + if ((_a) < (_b)) { \ + return -1; \ + } \ + if ((_a) > (_b)) { \ + return 1; \ + } \ +} + +/*! + * \brief Get comparison function of a specified memory symbol. + * + * The comparison function is stored in \c profile of \ref bcmdrd_symbol_t. + * And \ref bcmdrd_sym_mem_profile_t is used for profile structure of + * memory symbols. The function is mainly to retrieve the memory + * comparison function pre-defined for memory symbols. + * + * \param [in] symbols Symbol table structure. + * \param [in] symbol Symbol structure. + * + * \return Memory comparison function. NULL on failure or + * no comparison function is specified. + */ +extern bcmdrd_sym_mem_cmp_f +bcmdrd_sym_mem_cmp_fun_get(const bcmdrd_symbols_t *symbols, + const bcmdrd_symbol_t *symbol); + +/*! + * \brief Get null entry of a specified memory symbol. + * + * The memory null entry is stored in \c profile of \ref bcmdrd_symbol_t. + * And \ref bcmdrd_sym_mem_profile_t is used for profile structure of + * memory symbols. The function is mainly to retrieve the null-entry + * pre-defined for memory symbols. + * + * \param [in] symbols Symbol table structure. + * \param [in] symbol Symbol structure. + * + * \return Memory null entry pointer. NULL on failure or + * no null entry is specified. + */ +extern const void * +bcmdrd_sym_mem_null_ent_get(const bcmdrd_symbols_t *symbols, + const bcmdrd_symbol_t *symbol); + +/*! + * \brief Get reset value and mask of a specified register symbol. + * + * This function returns the reset value and reset mask in variable length + * according to the word-size of the specified register symbol. + * The first n-word(s) of the return value is the reset value of the specified + * register which size is n word(s). The following n-word(s) of the + * return value is the reset mask of the specified register. + * + * \param [in] symbols Symbol table structure. + * \param [in] symbol Symbol structure. + * + * \return Pointer to reset value and reset mask or Null on failure. + */ +extern const uint32_t * +bcmdrd_sym_reg_resetval_get(const bcmdrd_symbols_t *symbols, + const bcmdrd_symbol_t *symbol); + +/*! + * \brief Check if default value of a specified symbol is non-zero. + * + * \param [in] symbols Symbol table structure. + * \param [in] symbol Symbol structure. + * + * \retval true Default value is non-zero. + * \retval false Default value is zero. + */ +extern bool +bcmdrd_sym_default_value_is_nonzero(const bcmdrd_symbols_t *symbols, + const bcmdrd_symbol_t *symbol); + +/*! + * \brief Get MOR clocks value of a specified symbol for read operation. + * + * The MOR (Multiple Outstanding Requests) clocks value is supposed to be + * used to optimize the CMIC S-bus DMA read opreration performance + * for this symbol. + * The returned value from this function can be taken as a reference for the + * MOR clocks value setting. + * + * \param [in] symbols Symbol table structure. + * \param [in] symbol Symbol structure. + * + * \return MOR clocks value or 0 if not supported. + */ +extern uint32_t +bcmdrd_sym_mor_clks_read_get(const bcmdrd_symbols_t *symbols, + const bcmdrd_symbol_t *symbol); + +/*! + * \brief Get MOR clocks value of a specified symbol for write operation. + * + * The MOR (Multiple Outstanding Requests) clocks value is supposed to be + * used to optimize the CMIC S-bus DMA write opreration performance + * for this symbol. + * The returned value from this function can be taken as a reference for the + * MOR clocks value setting. + * + * \param [in] symbols Symbol table structure. + * \param [in] symbol Symbol structure. + * + * \return MOR clocks value or 0 if not supported. + */ +extern uint32_t +bcmdrd_sym_mor_clks_write_get(const bcmdrd_symbols_t *symbols, + const bcmdrd_symbol_t *symbol); + +/*! + * \brief Get device-specific SER data structure. + * + * \param [in] symbols Symbol table structure. + * + * \return Device-specific SER data structure or NULL if not support. + */ +extern const void * +bcmdrd_sym_ser_data_get(const bcmdrd_symbols_t *symbols); + +/*! + * \brief Get SER profile offset of a specified symbol. + * + * Note that the given symbol is indicated to have no SER support if + * the returned offset is 0. + * + * \param [in] symbol Symbol structure. + * + * \return Offset to SER profile for a given symbol. + */ +extern int +bcmdrd_sym_ser_profile_offset_get(const bcmdrd_symbol_t *symbol); + +#endif /* BCMDRD_SYMBOLS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h new file mode 100644 index 000000000000..2dfa87a635fe --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h @@ -0,0 +1,634 @@ +/*! \file bcmdrd_types.h + * + * Basic DRD types, which may be used outside the DRD as well. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMDRD_TYPES_H +#define BCMDRD_TYPES_H + +#include + +#include +#include + +#include + +/*! 16-bit-safe left shift */ +#define LSHIFT32(_val, _cnt) ((uint32_t)(_val) << (_cnt)) + +/*! 32-bit-safe left shift */ +#define LSHIFT64(_val, _cnt) ((uint64_t)(_val) << (_cnt)) + + + +#ifndef F32_MASK +/*! Create a bit mask of w bits as a 32-bit word. */ +#define F32_MASK(w) \ + ((((w) > 31) ? 0 : ((uint32_t)1 << (w))) - 1) +#endif + +#ifndef F64_MASK +/*! Create a bit mask of w bits as a 64-bit dword. */ +#define F64_MASK(w) \ + ((((w) > 63) ? 0 : ((uint64_t)1 << (w))) - 1) +#endif + +#ifndef F32_GET +/*! Extract a field of w bits at offset o from a 32-bit word d. */ +#define F32_GET(d,o,w) \ + (((d) >> o) & F32_MASK(w)) +#endif + +#ifndef F64_GET +/*! Extract a field of w bits at offset o from a 64-bit word d. */ +#define F64_GET(d,o,w) \ + (((d) >> o) & F64_MASK(w)) +#endif + +#ifndef F32_SET +/*! Set a field of w bits at offset o in a 32-bit word d. */ +#define F32_SET(d,o,w,v) \ + (d = ((d & ~(F32_MASK(w) << o)) | (((v) & F32_MASK(w)) << o))) +#endif + +#ifndef F64_SET +/*! Set a field of w bits at offset o in a 64-bit word d. */ +#define F64_SET(d,o,w,v) \ + (d = ((d & ~(F64_MASK(w) << o)) | (((v) & F64_MASK(w)) << o))) +#endif + +/*! Optionally force an error in compiler pre-processor. */ +#if BCMDRD_CONFIG_INCLUDE_FIELD_CHECKS +#define BCMDRD_COMPILER_ERROR (1 << 99) +#else +#define BCMDRD_COMPILER_ERROR 0 +#endif + +#ifndef F32_ENCODE +/*! + * Encode a value of a given width at a given offset. Optionally + * performs compile-time error checking on the value to ensure it fits + * within the given width. + */ +#define F32_ENCODE(v,o,w) \ + ( ((v & F32_MASK(w)) == v) ? \ + /* Value fits in width */ ( (uint32_t)(v) << o ) : \ + /* Value does not fit */ BCMDRD_COMPILER_ERROR) + +#endif + +#ifndef F64_ENCODE +/*! + * Encode a value of a given width at a given offset. Performs + * compile-time error checking on the value to ensure it fits within + * the given width. + */ +#define F64_ENCODE(v,o,w) \ + ( ((v & F64_MASK(w)) == v) ? \ + /* Value fits in width */ ( (uint64_t)(v) << o ) : \ + /* Value does not fit */ BCMDRD_COMPILER_ERROR) + +#endif + +/*! Words in port bit maps */ +#define BCMDRD_PBMP_WORD_MAX (((BCMDRD_CONFIG_MAX_PORTS - 1) >> 5) + 1) + +/*! + * Bitmap of ports of a particular type or properties. + */ +typedef struct bcmdrd_pbmp_s { + /*! Word array. */ + uint32_t w[BCMDRD_PBMP_WORD_MAX]; +} bcmdrd_pbmp_t; + +/* Port bitmap helper functions */ + +/*! + * \brief Check if port bitmap is empty. + * + * Check that no bits are set in a port bitmap of type \ref + * bcmdrd_pbmp_t. + * + * \param [in] pbmp Port bitmap. + * + * \retval true Port bitmap is empty. + * \retval false Port bitmap is not empty. + */ +extern int +bcmdrd_pbmp_is_null(const bcmdrd_pbmp_t *pbmp); + +/*! + * \brief Parse a port list string into a port bitmap. + * + * The port list string may contain commas to separate port numbers + * and hyphens to indicate port ranges. + * + * Examples: "2" "2,5" "2,5,7-13,43" + * + * \param [in] str String to be parsed. + * \param [out] pbmp Port bitmap. + * + * \retval 0 No errors. + * \retval -1 Fail to parse the string to a port bitmap. + */ +extern int +bcmdrd_pbmp_parse(const char *str, bcmdrd_pbmp_t *pbmp); + +/*! + * \brief Get bitmap word index for a given port. + * + * A port bitmap is an array of data words, and this macro will return + * the index of the data word associated with a given port number. + * + * No range check is performed on the port number. + * + * \param [in] _pbmp Port bitmap. + * \param [in] _port Port number to check. + */ +#define BCMDRD_PBMP_WORD(_pbmp, _port) \ + (&(_pbmp))->w[(_port) >> 5] + +/*! + * \brief Check if a port is member of a port bitmap. + * + * Check if a port is member of a port bitmap of type \ref + * bcmdrd_pbmp_t. + * + * No range check is performed on the port number. + * + * \param [in] _pbmp Port bitmap. + * \param [in] _port Port number to check. + */ +#define BCMDRD_PBMP_MEMBER(_pbmp, _port) \ + (BCMDRD_PBMP_WORD(_pbmp, _port) & LSHIFT32(1, (_port) & 0x1f)) + +/*! + * \brief Iterate over a port bitmap. + * + * Iterate over a port bitmap of type \ref bcmdrd_pbmp_t and execute + * the subsequent statement for all bits set in the port bitmap. + * + * \param [in] _pbmp Port bitmap. + * \param [in] _port Port iterator variable. + */ +#define BCMDRD_PBMP_ITER(_pbmp, _port) \ + for (_port = 0; _port < BCMDRD_CONFIG_MAX_PORTS; _port++) \ + if (BCMDRD_PBMP_WORD(_pbmp, _port) == 0) \ + _port += 31; \ + else if (BCMDRD_PBMP_MEMBER(_pbmp, _port)) + +/*! + * \brief Add a port to a port bitmap. + * + * Add a port to a port bitmap of type \ref bcmdrd_pbmp_t. + * + * No range check is performed on the port number. + * + * \param [in] _pbmp Port bitmap. + * \param [in] _port Port number to add. + */ +#define BCMDRD_PBMP_PORT_ADD(_pbmp, _port) \ + (BCMDRD_PBMP_WORD(_pbmp, _port) |= LSHIFT32(1, (_port) & 0x1f)) + +/*! + * \brief Remove a port from a port bitmap. + * + * Remove a port from a port bitmap of type \ref bcmdrd_pbmp_t. + * + * No range check is performed on the port number. + * + * \param [in] _pbmp Port bitmap. + * \param [in] _port Port number to remove. + */ +#define BCMDRD_PBMP_PORT_REMOVE(_pbmp, _port) \ + (BCMDRD_PBMP_WORD(_pbmp, _port) &= ~(LSHIFT32(1, (_port) & 0x1f))) + +/*! + * \brief Clear a port bitmap. + * + * Clear a port bitmap of type \ref bcmdrd_pbmp_t. + * + * After clearing the port bitmap, it will have no members.. + * + * \param [in] _pbmp Port bitmap. + */ +#define BCMDRD_PBMP_CLEAR(_pbmp) sal_memset(&_pbmp, 0, sizeof(bcmdrd_pbmp_t)) + +/*! + * \brief Get a word from a port bitmap. + * + * Get a 32-bit word from a port bitmap of type \ref bcmdrd_pbmp_t. + * + * \param [in] _pbmp Port bitmap. + * \param [in] _w Word number to get (first word is word 0). + */ +#define BCMDRD_PBMP_WORD_GET(_pbmp, _w) ((&(_pbmp))->w[_w]) + +/*! + * \brief Set a word in a port bitmap. + * + * Set a 32-bit word in a port bitmap of type \ref bcmdrd_pbmp_t. + * + * \param [in] _pbmp Port bitmap. + * \param [in] _w Word number to set (first word is word 0). + * \param [in] _val Value of word to set. + */ +#define BCMDRD_PBMP_WORD_SET(_pbmp, _w, _val) ((&(_pbmp))->w[_w]) = (_val) + +/*! + * \brief Helper macro for port bimap operations. + * + * \param [in] _pbmp0 First port bitmap. + * \param [in] _pbmp1 Second port bitmap. + * \param [in] _op Port bitmap operator. + */ +#define BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, _op) \ + do { \ + int _w; \ + for (_w = 0; _w < BCMDRD_PBMP_WORD_MAX; _w++) { \ + BCMDRD_PBMP_WORD_GET(_pbmp0, _w) _op BCMDRD_PBMP_WORD_GET(_pbmp1, _w); \ + } \ + } while (0) + +/*! Return true if port bitmap _pbmp is empty. */ +#define BCMDRD_PBMP_IS_NULL(_pbmp) (bcmdrd_pbmp_is_null(&(_pbmp))) + +/*! Return true if port bitmap _pbmp is not empty. */ +#define BCMDRD_PBMP_NOT_NULL(_pbmp) (!(bcmdrd_pbmp_is_null(&(_pbmp)))) + +/*! Assign port bitmap src to port bitmap dst. */ +#define BCMDRD_PBMP_ASSIGN(dst, src) sal_memcpy(&(dst), &(src), sizeof(bcmdrd_pbmp_t)) + +/*! + * Perform a logical AND operation between all bits of port bitmaps _pbmp0 and + * pbmp1. + */ +#define BCMDRD_PBMP_AND(_pbmp0, _pbmp1) BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, &=) + +/*! + * Perform a logical OR operation between all bits of port bitmaps _pbmp0 and + * pbmp1. + */ +#define BCMDRD_PBMP_OR(_pbmp0, _pbmp1) BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, |=) + +/*! + * Perform a logical XOR operation between all bits of port bitmaps _pbmp0 and + * pbmp1. + */ +#define BCMDRD_PBMP_XOR(_pbmp0, _pbmp1) BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, ^=) + +/*! + * Remove all bits in port bitmap _pbmp1 from port bitmap _pbmp0. + */ +#define BCMDRD_PBMP_REMOVE(_pbmp0, _pbmp1) BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, &= ~) + +/*! + * Assign an inversed port bitmap _pbmp1 to port bitmap _pbmp0, + * i.e. any port which is a member of _pbmp1 will not be a member of + * _pbmp0 and vice versa. + */ +#define BCMDRD_PBMP_NEGATE(_pbmp0, _pbmp1) BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, = ~) + +/*! Convert a number of (8-bit) bytes to a number of bits. */ +#define BCMDRD_BYTES2BITS(_x) ((_x) * 8) + +/*! Convert a number of (8-bit) bytes to a number of 32-bit words. */ +#define BCMDRD_BYTES2WORDS(_x) (((_x) + 3) / 4) + +/*! Convert a number of 32-bit words to a number of bits. */ +#define BCMDRD_WORDS2BITS(_x) ((_x) * 32) + +/*! Convert a number of 32-bit words to a number of (8-bit) bytes. */ +#define BCMDRD_WORDS2BYTES(_x) ((_x) * 4) + +/*! Align a size to a specific number of bytes. */ +#define BCMDRD_ALIGN(_s, _a) (((_s) + ((_a) - 1)) & ~((_a) - 1)) + +/*! Maximum size of physical table entry (in words). */ +#define BCMDRD_MAX_PT_WSIZE \ + BCMDRD_BYTES2WORDS(BCMDRD_CONFIG_MAX_PT_ENTRY_SIZE) + +/*! Create enumeration values from list of supported devices. */ +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + BCMDRD_DEV_T_##_bd, +/*! Enumeration for all base device types. */ +typedef enum { + BCMDRD_DEV_T_NONE = 0, +/*! \cond */ +#include +/*! \endcond */ + BCMDRD_DEV_T_COUNT +} bcmdrd_dev_type_t; + +/*! Generic ID (enum). */ +typedef uint32_t bcmdrd_id_t; + +/*! Generic invalid ID value. */ +#define BCMDRD_INVALID_ID ((bcmdrd_id_t)-1) + +/*! Invalid register value. */ +#define INVALIDr BCMDRD_INVALID_ID + +/*! Invalid memory value. */ +#define INVALIDm BCMDRD_INVALID_ID + +/*! Invalid field value. */ +#define INVALIDf BCMDRD_INVALID_ID + +/*! Check if an ID is valid, i.e. different from BCMDRD_INVALID_ID. */ +#define BCMDRD_ID_VALID(_id) \ + ((_id) != BCMDRD_INVALID_ID) + +/*! Device-specific symbol ID (enum). */ +typedef bcmdrd_id_t bcmdrd_sid_t; + +/*! Device-specific field ID (enum). */ +typedef bcmdrd_id_t bcmdrd_fid_t; + +/*! Enum for string/value map. */ +typedef shr_enum_map_t bcmdrd_enum_map_t; + +/*! + * \brief Port number domain. + * + * Port-based registers and memories use different port number domains + * in their physical address. For example, some registers use the + * physical port number, some registers use the logical port number + * and some use a MMU port number. + * + * For most devices, each block type use the same port number domain, + * but there are a few exceptions, so this needs to be a per-reg/mem + * property. + */ +typedef enum bcmdrd_port_num_domain_e { + BCMDRD_PND_PHYS = 0, + BCMDRD_PND_LOGIC = 1, + BCMDRD_PND_MMU = 2, + BCMDRD_PND_COUNT +} bcmdrd_port_num_domain_t; + +/*! + * \name Port types. + * \anchor BCMDRD_PORT_TYPE_xxx + * + * Port types are defined as bit masks, such that it is possible to + * group multiple types into a single one, e.g. CPU and loopback ports + * could be greoup as internal ports. + */ + +/*! \{ */ + +/*! Port type undefined. */ +#define BCMDRD_PORT_TYPE_UNDEF 0 + +/*! Reserved port (e.g. spare port or other unused port). */ +#define BCMDRD_PORT_TYPE_RSVD (1U << 0) + +/*! CPU/HMI port (internal). */ +#define BCMDRD_PORT_TYPE_CPU (1U << 1) + +/*! Loopback port (internal). */ +#define BCMDRD_PORT_TYPE_LB (1U << 2) + +/*! Front-panel port. */ +#define BCMDRD_PORT_TYPE_FPAN (1U << 3) + +/*! Up-link port. */ +#define BCMDRD_PORT_TYPE_UPLINK (1U << 4) + +/*! Management port. */ +#define BCMDRD_PORT_TYPE_MGMT (1U << 5) + +/*! RDB port. */ +#define BCMDRD_PORT_TYPE_RDB (1U << 6) + +/*! FAE port. */ +#define BCMDRD_PORT_TYPE_FAE (1U << 7) + +/*! AUX port. */ +#define BCMDRD_PORT_TYPE_AUX (1U << 8) +/*! } */ + +/*! + * \brief Port category. + * + * Please refer to \ref BCMDRD_PORT_TYPE_xxx for a list possible + * values (categories). + * + * Values are bit-based such that a port can belong to multiple + * categories. + */ +typedef uint32_t bcmdrd_port_type_t; + +/*! Words in pipe maps */ +#define BCMDRD_PIPEMAP_WORD_MAX (((BCMDRD_CONFIG_MAX_PIPES - 1) >> 5) + 1) + +/*! + * Bitmap of pipes of a particular type. + */ +typedef struct bcmdrd_pipemap_s { + /*! Word array. */ + uint32_t w[BCMDRD_PIPEMAP_WORD_MAX]; +} bcmdrd_pipemap_t; + +/* pipe map helper functions */ + +/*! + * \brief Check if pipe map is empty. + * + * Check that no bits are set in a pipe map of type \ref + * bcmdrd_pipemap_t. + * + * \param [in] pm pipe map. + * + * \retval true Pipe map is empty. + * \retval false Pipe map is not empty. + */ +extern bool +bcmdrd_pipemap_is_null(const bcmdrd_pipemap_t *pm); + +/*! + * \brief Get bitmap word index for a given pipe. + * + * A pipe map is an array of data words, and this macro will return + * the index of the data word associated with a given pipe number. + * + * No range check is performed on the pipe number. + * + * \param [in] _pm Pipe map. + * \param [in] _pipe Pipe number to check. + */ +#define BCMDRD_PIPEMAP_WORD(_pm, _pipe) \ + (&(_pm))->w[(_pipe) >> 5] + +/*! + * \brief Check if a pipe is member of a pipe map. + * + * Check if a pipe is member of a pipe map of type \ref + * bcmdrd_pipemap_t. + * + * No range check is performed on the pipe number. + * + * \param [in] _pm Pipe map. + * \param [in] _pipe Pipe number to check. + */ +#define BCMDRD_PIPEMAP_MEMBER(_pm, _pipe) \ + (BCMDRD_PIPEMAP_WORD(_pm, _pipe) & LSHIFT32(1, (_pipe) & 0x1f)) + +/*! + * \brief Iterate over a pipe map. + * + * Iterate over a pipe map of type \ref bcmdrd_pipemap_t and + * execute the subsequent statement for all bits set in the pipe + * bitmap. + * + * \param [in] _pm Pipe map. + * \param [in] _pipe Pipe iterator variable. + */ +#define BCMDRD_PIPEMAP_ITER(_pm, _pipe) \ + for (_pipe = 0; _pipe < BCMDRD_CONFIG_MAX_PIPES; _pipe++) \ + if (BCMDRD_PIPEMAP_WORD(_pm, _pipe) == 0) \ + _pipe += 31; \ + else if (BCMDRD_PIPEMAP_MEMBER(_pm, _pipe)) + +/*! + * \brief Add a pipe to a pipe map. + * + * Add a pipe to a pipe map of type \ref bcmdrd_pipemap_t. + * + * No range check is performed on the pipe number. + * + * \param [in] _pm Pipe map. + * \param [in] _pipe Pipe number to add. + */ +#define BCMDRD_PIPEMAP_PIPE_ADD(_pm, _pipe) \ + (BCMDRD_PIPEMAP_WORD(_pm, _pipe) |= LSHIFT32(1, (_pipe) & 0x1f)) + +/*! + * \brief Remove a pipe from a pipe map. + * + * Remove a pipe from a pipe map of type \ref bcmdrd_pipemap_t. + * + * No range check is performed on the pipe number. + * + * \param [in] _pm Pipe map. + * \param [in] _pipe Pipe number to remove. + */ +#define BCMDRD_PIPEMAP_PIPE_REMOVE(_pm, _pipe) \ + (BCMDRD_PIPEMAP_WORD(_pm, _pipe) &= ~(LSHIFT32(1, (_pipe) & 0x1f))) + +/*! + * \brief Clear a pipe map. + * + * Clear a pipe map of type \ref bcmdrd_pipemap_t. + * + * After clearing the pipe map, it will have no members. + * + * \param [in] _pm Pipe map. + */ +#define BCMDRD_PIPEMAP_CLEAR(_pm) \ + sal_memset(&_pm, 0, sizeof(bcmdrd_pipemap_t)) + +/*! + * \brief Get a word from a pipe map. + * + * Get a 32-bit word from a pipe map of type \ref bcmdrd_pipemap_t. + * + * \param [in] _pm Pipe map. + * \param [in] _w Word number to get (first word is word 0). + */ +#define BCMDRD_PIPEMAP_WORD_GET(_pm, _w) \ + ((&(_pm))->w[_w]) + +/*! + * \brief Set a word in a pipe map. + * + * Set a 32-bit word in a pipe map of type \ref bcmdrd_pipemap_t. + * + * \param [in] _pm Pipe map. + * \param [in] _w Word number to set (first word is word 0). + * \param [in] _val Value of word to set. + */ +#define BCMDRD_PIPEMAP_WORD_SET(_pm, _w, _val) \ + ((&(_pm))->w[_w]) = (_val) + +/*! + * \brief Helper macro for pipe map operations. + * + * \param [in] _pm0 First pipe map. + * \param [in] _pm1 Second pipe map. + * \param [in] _op Pipe map operator. + */ +#define BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, _op) \ + do { \ + int _w; \ + for (_w = 0; _w < BCMDRD_PIPEMAP_WORD_MAX; _w++) { \ + BCMDRD_PIPEMAP_WORD_GET(_pm0, _w) _op BCMDRD_PIPEMAP_WORD_GET(_pm1, _w); \ + } \ + } while (0) + +/*! Return true if pipe map _pm is empty. */ +#define BCMDRD_PIPEMAP_IS_NULL(_pm) \ + (bcmdrd_pipemap_is_null(&(_pm))) + +/*! Return true if pipe map _pm is not empty. */ +#define BCMDRD_PIPEMAP_NOT_NULL(_pm) \ + (!(bcmdrd_pipemap_is_null(&(_pm)))) + +/*! Assign pipe map src to pipe map dst. */ +#define BCMDRD_PIPEMAP_ASSIGN(dst, src) \ + sal_memcpy(&(dst), &(src), sizeof(bcmdrd_pipemap_t)) + +/*! + * Perform a logical AND operation between all bits of pipe maps _pm0 + * and _pm1. + */ +#define BCMDRD_PIPEMAP_AND(_pm0, _pm1) \ + BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, &=) + +/*! + * Perform a logical OR operation between all bits of pipe maps _pm0 + * and _pm1. + */ +#define BCMDRD_PIPEMAP_OR(_pm0, _pm1) \ + BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, |=) + +/*! + * Perform a logical XOR operation between all bits of pipe maps _pm0 + * and _pm1. + */ +#define BCMDRD_PIPEMAP_XOR(_pm0, _pm1) \ + BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, ^=) + +/*! + * Remove all bits in pipe map _pm1 from pipe map _pm0. + */ +#define BCMDRD_PIPEMAP_REMOVE(_pm0, _pm1) \ + BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, &= ~) + +/*! + * Assign an inversed pipe map _pm1 to pipe map _pm0, i.e. any pipe + * which is a member of _pm1 will not be a member of _pm0 and vice + * versa. + */ +#define BCMDRD_PIPEMAP_NEGATE(_pm0, _pm1) \ + BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, = ~) + +#endif /* BCMDRD_TYPES_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h index 455f748e9077..21380990a79e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h @@ -23,9 +23,10 @@ * compilation * d) Make sure the compilation include path includes * 'bcmdrd_custom_config.h' + * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -38,7 +39,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef BCMDRD_CONFIG_H @@ -63,7 +64,22 @@ /*! Maximum number of ports per chip supported. */ #ifndef BCMDRD_CONFIG_MAX_PORTS -#define BCMDRD_CONFIG_MAX_PORTS 848 +#define BCMDRD_CONFIG_MAX_PORTS 1088 +#endif + +/*! Maximum number of pipes per chip supported. */ +#ifndef BCMDRD_CONFIG_MAX_PIPES +#define BCMDRD_CONFIG_MAX_PIPES 96 +#endif + +/*! Maximum size of physical table entries (in bytes). */ +#ifndef BCMDRD_CONFIG_MAX_PT_ENTRY_SIZE +#define BCMDRD_CONFIG_MAX_PT_ENTRY_SIZE 128 +#endif + +/*! Maximum number of interrupt lines per chip supported. */ +#ifndef BCMDRD_CONFIG_MAX_IRQ_LINES +#define BCMDRD_CONFIG_MAX_IRQ_LINES 16 #endif /*! Direct access to memory-mapped registers. */ @@ -145,6 +161,15 @@ CONFIG_OPTION(BCMDRD_CONFIG_MAX_UNITS) #ifdef BCMDRD_CONFIG_MAX_PORTS CONFIG_OPTION(BCMDRD_CONFIG_MAX_PORTS) #endif +#ifdef BCMDRD_CONFIG_MAX_PIPES +CONFIG_OPTION(BCMDRD_CONFIG_MAX_PIPES) +#endif +#ifdef BCMDRD_CONFIG_MAX_PT_ENTRY_SIZE +CONFIG_OPTION(BCMDRD_CONFIG_MAX_PT_ENTRY_SIZE) +#endif +#ifdef BCMDRD_CONFIG_MAX_IRQ_LINES +CONFIG_OPTION(BCMDRD_CONFIG_MAX_IRQ_LINES) +#endif #ifdef BCMDRD_CONFIG_MEMMAP_DIRECT CONFIG_OPTION(BCMDRD_CONFIG_MEMMAP_DIRECT) #endif diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h index 1fa1afd92af0..f222215a68f0 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h @@ -4,7 +4,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/drd/instpkgs.pl * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ /* @@ -26,17 +26,17 @@ * * (1) #define BCMDRD_CONFIG_INCLUDE_ [1|0] * -- Include or exclude all revisions of the given device - * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080 1 + * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780 1 * * (2) #define BCMDRD_CONFIG_INCLUDE__X [1|0] * -- Include or exclude all versions of the given revision - * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080_Ax 0 - * #define BCMDRD_CONFIG_INCLUde_BCM56080_Bx 1 + * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780_Ax 0 + * #define BCMDRD_CONFIG_INCLUde_BCM56780_Bx 1 * * (3) #define BCMDRD_CONFIG_INCLUDE_ [1|0] * -- Include or exclude an exact device - * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 - * #define BCMDRD_CONFIG_INCLUDE_BCM56080_A1 0 + * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1 + * #define BCMDRD_CONFIG_INCLUDE_BCM56780_A1 0 * * * The value of BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT is used for any @@ -72,6 +72,20 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_BCM56080_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A1 BCMDRD_CONFIG_INCLUDE_BCM56080_Ax +#endif +/* Resolve all interchip dependencies */ +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A1 == 1 +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 +#endif +#endif /* @@ -89,6 +103,9 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56081_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56081_A0 BCMDRD_CONFIG_INCLUDE_BCM56081_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56081_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56081_A1 BCMDRD_CONFIG_INCLUDE_BCM56081_Ax +#endif /* Resolve all interchip dependencies */ #if BCMDRD_CONFIG_INCLUDE_BCM56081_A0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 @@ -100,6 +117,13 @@ #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56081_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 +#endif +#endif /* @@ -117,6 +141,9 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56082_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56082_A0 BCMDRD_CONFIG_INCLUDE_BCM56082_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56082_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56082_A1 BCMDRD_CONFIG_INCLUDE_BCM56082_Ax +#endif /* Resolve all interchip dependencies */ #if BCMDRD_CONFIG_INCLUDE_BCM56082_A0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 @@ -128,6 +155,13 @@ #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56082_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 +#endif +#endif /* @@ -145,6 +179,9 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56083_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56083_A0 BCMDRD_CONFIG_INCLUDE_BCM56083_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56083_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56083_A1 BCMDRD_CONFIG_INCLUDE_BCM56083_Ax +#endif /* Resolve all interchip dependencies */ #if BCMDRD_CONFIG_INCLUDE_BCM56083_A0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 @@ -156,6 +193,13 @@ #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56083_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 +#endif +#endif /* @@ -173,6 +217,9 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56084_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56084_A0 BCMDRD_CONFIG_INCLUDE_BCM56084_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56084_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56084_A1 BCMDRD_CONFIG_INCLUDE_BCM56084_Ax +#endif /* Resolve all interchip dependencies */ #if BCMDRD_CONFIG_INCLUDE_BCM56084_A0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 @@ -184,6 +231,134 @@ #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56084_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 +#endif +#endif + + +/* + * BCM56085 + */ + +/* Sets the default include state if it was not given */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56085 +#define BCMDRD_CONFIG_INCLUDE_BCM56085 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +/* Resolve revision dependencies */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56085_Ax +#define BCMDRD_CONFIG_INCLUDE_BCM56085_Ax BCMDRD_CONFIG_INCLUDE_BCM56085 +#endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56085_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56085_A0 BCMDRD_CONFIG_INCLUDE_BCM56085_Ax +#endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56085_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56085_A1 BCMDRD_CONFIG_INCLUDE_BCM56085_Ax +#endif +/* Resolve all interchip dependencies */ +#if BCMDRD_CONFIG_INCLUDE_BCM56085_A0 == 1 +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 +#endif +#endif +#if BCMDRD_CONFIG_INCLUDE_BCM56085_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 +#endif +#endif + + +/* + * BCM56690 + */ + +/* Sets the default include state if it was not given */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56690 +#define BCMDRD_CONFIG_INCLUDE_BCM56690 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +/* Resolve revision dependencies */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56690_Ax +#define BCMDRD_CONFIG_INCLUDE_BCM56690_Ax BCMDRD_CONFIG_INCLUDE_BCM56690 +#endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56690_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56690_A0 BCMDRD_CONFIG_INCLUDE_BCM56690_Ax +#endif + + +/* + * BCM56692 + */ + +/* Sets the default include state if it was not given */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56692 +#define BCMDRD_CONFIG_INCLUDE_BCM56692 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +/* Resolve revision dependencies */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56692_Ax +#define BCMDRD_CONFIG_INCLUDE_BCM56692_Ax BCMDRD_CONFIG_INCLUDE_BCM56692 +#endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56692_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56692_A0 BCMDRD_CONFIG_INCLUDE_BCM56692_Ax +#endif +/* Resolve all interchip dependencies */ +#if BCMDRD_CONFIG_INCLUDE_BCM56692_A0 == 1 +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56690_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56690_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +#if BCMDRD_CONFIG_INCLUDE_BCM56690_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56690_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56690_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56690_A0_IMPLIED 1 +#endif +#endif + + +/* + * BCM56089 + */ + +/* Sets the default include state if it was not given */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56089 +#define BCMDRD_CONFIG_INCLUDE_BCM56089 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +/* Resolve revision dependencies */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56089_Ax +#define BCMDRD_CONFIG_INCLUDE_BCM56089_Ax BCMDRD_CONFIG_INCLUDE_BCM56089 +#endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56089_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56089_A0 BCMDRD_CONFIG_INCLUDE_BCM56089_Ax +#endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56089_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56089_A1 BCMDRD_CONFIG_INCLUDE_BCM56089_Ax +#endif +/* Resolve all interchip dependencies */ +#if BCMDRD_CONFIG_INCLUDE_BCM56089_A0 == 1 +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 +#endif +#endif +#if BCMDRD_CONFIG_INCLUDE_BCM56089_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 +#endif +#endif /* @@ -218,6 +393,9 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56782_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56782_A0 BCMDRD_CONFIG_INCLUDE_BCM56782_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56782_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56782_A1 BCMDRD_CONFIG_INCLUDE_BCM56782_Ax +#endif /* Resolve all interchip dependencies */ #if BCMDRD_CONFIG_INCLUDE_BCM56782_A0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 @@ -229,6 +407,13 @@ #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56782_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 +#endif +#endif /* @@ -302,6 +487,9 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56786_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56786_A0 BCMDRD_CONFIG_INCLUDE_BCM56786_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56786_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56786_A1 BCMDRD_CONFIG_INCLUDE_BCM56786_Ax +#endif /* Resolve all interchip dependencies */ #if BCMDRD_CONFIG_INCLUDE_BCM56786_A0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 @@ -313,6 +501,13 @@ #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56786_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 +#endif +#endif /* @@ -330,6 +525,9 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56787_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56787_A0 BCMDRD_CONFIG_INCLUDE_BCM56787_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56787_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56787_A1 BCMDRD_CONFIG_INCLUDE_BCM56787_Ax +#endif /* Resolve all interchip dependencies */ #if BCMDRD_CONFIG_INCLUDE_BCM56787_A0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 @@ -341,6 +539,13 @@ #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56787_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 +#endif +#endif /* @@ -358,6 +563,9 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56788_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56788_A0 BCMDRD_CONFIG_INCLUDE_BCM56788_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56788_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56788_A1 BCMDRD_CONFIG_INCLUDE_BCM56788_Ax +#endif /* Resolve all interchip dependencies */ #if BCMDRD_CONFIG_INCLUDE_BCM56788_A0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 @@ -369,6 +577,13 @@ #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56788_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 +#endif +#endif /* @@ -910,6 +1125,51 @@ #endif +/* + * BCM78800 + */ + +/* Sets the default include state if it was not given */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78800 +#define BCMDRD_CONFIG_INCLUDE_BCM78800 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +/* Resolve revision dependencies */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78800_Ax +#define BCMDRD_CONFIG_INCLUDE_BCM78800_Ax BCMDRD_CONFIG_INCLUDE_BCM78800 +#endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78800_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM78800_A0 BCMDRD_CONFIG_INCLUDE_BCM78800_Ax +#endif + + +/* + * BCM78808 + */ + +/* Sets the default include state if it was not given */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78808 +#define BCMDRD_CONFIG_INCLUDE_BCM78808 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +/* Resolve revision dependencies */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78808_Ax +#define BCMDRD_CONFIG_INCLUDE_BCM78808_Ax BCMDRD_CONFIG_INCLUDE_BCM78808 +#endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78808_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM78808_A0 BCMDRD_CONFIG_INCLUDE_BCM78808_Ax +#endif +/* Resolve all interchip dependencies */ +#if BCMDRD_CONFIG_INCLUDE_BCM78808_A0 == 1 +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78800_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM78800_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +#if BCMDRD_CONFIG_INCLUDE_BCM78800_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM78800_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM78800_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM78800_A0_IMPLIED 1 +#endif +#endif + + /* * BCM78900 */ @@ -928,22 +1188,22 @@ /* - * BCM78905 + * BCM78902 */ /* Sets the default include state if it was not given */ -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905 -#define BCMDRD_CONFIG_INCLUDE_BCM78905 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78902 +#define BCMDRD_CONFIG_INCLUDE_BCM78902 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT #endif /* Resolve revision dependencies */ -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905_Bx -#define BCMDRD_CONFIG_INCLUDE_BCM78905_Bx BCMDRD_CONFIG_INCLUDE_BCM78905 +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78902_Bx +#define BCMDRD_CONFIG_INCLUDE_BCM78902_Bx BCMDRD_CONFIG_INCLUDE_BCM78902 #endif -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905_B0 -#define BCMDRD_CONFIG_INCLUDE_BCM78905_B0 BCMDRD_CONFIG_INCLUDE_BCM78905_Bx +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78902_B0 +#define BCMDRD_CONFIG_INCLUDE_BCM78902_B0 BCMDRD_CONFIG_INCLUDE_BCM78902_Bx #endif /* Resolve all interchip dependencies */ -#if BCMDRD_CONFIG_INCLUDE_BCM78905_B0 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM78902_B0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78900_B0 #define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT #endif @@ -955,6 +1215,51 @@ #endif +/* + * BCM78903 + */ + +/* Sets the default include state if it was not given */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78903 +#define BCMDRD_CONFIG_INCLUDE_BCM78903 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +/* Resolve revision dependencies */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78903_Bx +#define BCMDRD_CONFIG_INCLUDE_BCM78903_Bx BCMDRD_CONFIG_INCLUDE_BCM78903 +#endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78903_B0 +#define BCMDRD_CONFIG_INCLUDE_BCM78903_B0 BCMDRD_CONFIG_INCLUDE_BCM78903_Bx +#endif +/* Resolve all interchip dependencies */ +#if BCMDRD_CONFIG_INCLUDE_BCM78903_B0 == 1 +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78900_B0 +#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +#if BCMDRD_CONFIG_INCLUDE_BCM78900_B0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM78900_B0 +#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0_IMPLIED 1 +#endif +#endif + + +/* + * BCM78905 + */ + +/* Sets the default include state if it was not given */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905 +#define BCMDRD_CONFIG_INCLUDE_BCM78905 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +/* Resolve revision dependencies */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905_Ax +#define BCMDRD_CONFIG_INCLUDE_BCM78905_Ax BCMDRD_CONFIG_INCLUDE_BCM78905 +#endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM78905_A0 BCMDRD_CONFIG_INCLUDE_BCM78905_Ax +#endif + + #endif /* BCMDRD_CONFIG_CHIPS_H */ /* @@ -965,21 +1270,43 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080_A1) #ifdef BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED) #endif CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56081) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56081_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56081_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56081_A1) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56082) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56082_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56082_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56082_A1) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56083) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56083_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56083_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56083_A1) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56084) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56084_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56084_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56084_A1) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56085) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56085_Ax) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56085_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56085_A1) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56690) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56690_Ax) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56690_A0) +#ifdef BCMDRD_CONFIG_INCLUDE_BCM56690_A0_IMPLIED +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56690_A0_IMPLIED) +#endif +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56692) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56692_Ax) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56692_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56089) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56089_Ax) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56089_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56089_A1) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780_A0) @@ -989,6 +1316,7 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56782) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56782_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56782_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56782_A1) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56784) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56784_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56784_A0) @@ -998,12 +1326,15 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56785_A0) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56786) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56786_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56786_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56786_A1) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56787) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56787_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56787_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56787_A1) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56788) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56788_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56788_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56788_A1) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56789) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56789_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56789_A0) @@ -1098,14 +1429,32 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56999_B0) #ifdef BCMDRD_CONFIG_INCLUDE_BCM56999_A0_IMPLIED CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56999_A0_IMPLIED) #endif +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78800) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78800_Ax) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78800_A0) +#ifdef BCMDRD_CONFIG_INCLUDE_BCM78800_A0_IMPLIED +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78800_A0_IMPLIED) +#endif +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78808) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78808_Ax) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78808_A0) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78900) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78900_Bx) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78900_B0) #ifdef BCMDRD_CONFIG_INCLUDE_BCM78900_B0_IMPLIED CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78900_B0_IMPLIED) #endif +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78902) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78902_Bx) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78902_B0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78903) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78903_Bx) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78903_B0) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_Bx) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_B0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_Ax) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_A0) +#ifdef BCMDRD_CONFIG_INCLUDE_BCM78905_A0_IMPLIED +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_A0_IMPLIED) +#endif #undef CONFIG_OPTION #endif /* #ifdef CONFIG_OPTION */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_conf.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_conf.h new file mode 100644 index 000000000000..cbc9bd821543 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_conf.h @@ -0,0 +1,165 @@ +/*! \file bcmlrd_conf.h + * + * \brief Public interface to access the configuration. + * + * This file should not depend on any other header files than the SAL + * types. It is used for building libraries that are only a small + * subset of the full SDK (e.g. the PMD library). + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMLRD_CONF_H +#define BCMLRD_CONF_H + +#include + +/*! Create enumeration values from list of supported variants. */ +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ + BCMLRD_VARIANT_T_##_bd##_##_ve, + +/*! Enumeration for all device variants. */ +typedef enum bcmlrd_variant_e { + BCMLRD_VARIANT_T_NONE = 0, +/*! \cond */ +#include +/*! \endcond */ + BCMLRD_VARIANT_T_COUNT +} bcmlrd_variant_t; + +/*! + * \brief Get device variant. + * + * Get device logical table variant, + * which is an enumeration of all supported logical table variants. + * + * \param [in] unit Unit number. + * + * \retval Variant type. + */ +extern bcmlrd_variant_t +bcmlrd_variant_get(int unit); + +/*! + * \brief Set device variant. + * + * Set device logical table variant, + * which is an enumeration of all supported logical table variants. + * + * \param [in] unit Unit number. + * \param [in] variant BCMLRD variant enumeration. + * + * \retval 0 OK + * \retval <0 ERROR + */ +extern int +bcmlrd_variant_set(int unit, bcmlrd_variant_t variant); + +/*! + * \brief Return bcmlrd_variant_t enum from LTL DEVICE_VARIANT_T. + * + * Return a bcmlrd_variant_t enum value from a LTL DEVICE_VARIANT_T + * symbolic value. + * + * The DEVICE_VARIANT_T LTL enum is based on all the devices and + * variants present in the source tree when SDKLT logical table code + * is generated and is numbered starting at one, assigning a unique + * integer for each base and variant logical table configuration. The + * bcmlrd_variant_t C enum values are determined at compile time based + * on which BCMDRD devices are configured for a particular compile and is + * also numbered starting at one. If a device is not enabled by + * BCMDRD, then all of the associated bcmlrd_variant_t enum symbols + * associated with that device are not present. + * + * \param [in] device_variant DEVICE_VARIANT_T symbolic value. + * + * \retval bcmlrd_variant_t value + */ +bcmlrd_variant_t +bcmlrd_variant_from_device_variant_t(uint64_t device_variant); + +/*! + * \brief Return LTL DEVICE_VARIANT_T from the variant_t. + * + * Return a LTL DEVICE_VARIANT_T symbolic value from a + * bcmlrd_variant enum value. + * + * \param [in] variant bcmlrd_variant_t value. + * + * \retval DEVICE_VARIANT_T symbolic value. + * + */ +uint64_t +bcmlrd_device_variant_t_from_variant(bcmlrd_variant_t variant); + +/*! + * \brief Return a bcmlrd_variant_t enum value from a given variant string. + * + * Return a bcmlrd_variant_t enum value from a given variant string. + * + * \param [in] unit Unit number. + * \param [in] variant_string variant name. + * \param [out] variant variant value. + * + * \retval 0 OK + * \retval <0 ERROR + */ +int +bcmlrd_variant_from_variant_string(int unit, + const char* variant_string, + bcmlrd_variant_t* variant); + +/*! + * \brief Get base device variant. + * + * Get device logical table base variant, which is a set of initial + * mappings for a device. + * + * \param [in] unit Unit number. + * + * \retval Variant type. + */ +extern bcmlrd_variant_t +bcmlrd_base_get(int unit); + +/*! + * \brief Get variant string. + * + * Get the variant string for the given bcmlrd_variant_t. + * + * \param [in] variant Variant enumeration value. + * + * \return Pointer to variant name. + */ +extern const char * +bcmlrd_variant_string(bcmlrd_variant_t variant); + +/*! + * \brief Get variant name. + * + * Get the variant name for the given unit. If the unit does not + * exist, an empty string ("") is returned. + * + * \param [in] unit Unit number. + * + * \return Pointer to variant name. + */ +extern const char * +bcmlrd_variant_name(int unit); + +#endif /* BCMLRD_CONF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_id_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_id_types.h new file mode 100644 index 000000000000..c10b86eb7b1c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_id_types.h @@ -0,0 +1,44 @@ +/*! \file bcmlrd_id_types.h + * + * \brief Logical Table ID Types + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMLRD_ID_TYPES_H +#define BCMLRD_ID_TYPES_H + +#include + +/*! + * \brief Table identifier. + * + * Table identifier similar to those used by the DRD. + * + */ +typedef bcmltd_sid_t bcmlrd_sid_t; /* Generic table ID local to symbol. */ + +/*! + * \brief Field identifier. + * + * Field identifiers similar to those used by the DRD. + * + */ +typedef bcmltd_fid_t bcmlrd_fid_t; /* DRD compatible field ID local to logical. */ + +#endif /* BCMLRD_ID_TYPES_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h new file mode 100644 index 000000000000..79da85ad8a88 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h @@ -0,0 +1,367 @@ +/*! \file bcmlrd_match_id_db.h + * + * \brief Match ID DB data structures and APIs. + * + * This file constains the collection of + * Match ID DB related data structures and APIs. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMLRD_MATCH_ID_DB_H +#define BCMLRD_MATCH_ID_DB_H + +#include +#include + +/*! + * \brief Information on match ID fields. + * + * This structure is used to store information for each + * match id field. + * + */ +typedef struct bcmlrd_match_id_db_s { + /*! Match ID name. */ + const char *name; + + /*! Match. */ + uint32_t match; + + /*! Mask for match. */ + uint32_t match_mask; + + /*! Maxbit of the match id field in the physical container. */ + uint8_t match_maxbit; + + /*! Minbit of the match id field in the physical container. */ + uint8_t match_minbit; + + /*! Maxbit of the match id field. */ + uint8_t maxbit; + + /*! Minbit of the match id field. */ + uint8_t minbit; + + /*! Default value for the match id field. */ + uint32_t value; + + /*! Mask for the default value for the match id field. */ + uint32_t mask; + + /*! Maxbit of the field within match_id container. */ + uint8_t pmaxbit; + + /*! Minbit of the field within match_id container. */ + uint8_t pminbit; + + /*! ARC ID zone minbit. */ + uint8_t zone_minbit; + + /*! ARC ID mask. */ + uint64_t arc_id_mask; + + /*! Number of words used by zone bitmap. */ + uint8_t num_zone_bmp_words; + + /*! Zone bitmap. */ + uint32_t *zone_bmp; +} bcmlrd_match_id_db_t; + +/*! + * \brief Information on match ID fields. + * + * This structure is used to store information match id data. + * + */ +typedef struct bcmlrd_match_id_db_info_s { + /*! Number of entries in the match ID DB. */ + uint32_t num_entries; + + /*! Pointer to match ID DB. */ + const bcmlrd_match_id_db_t *db; +} bcmlrd_match_id_db_info_t; + +/*! + * \brief Function pointer to retrieve the match id information. + */ +typedef int (*bcmlrd_match_id_db_get_t)(int unit, const bcmlrd_sid_t sid, + const bcmlrd_fid_t fid, + const bcmlrd_match_id_db_t **info); + +/*! + * \brief Information on physical containers. + * + * This structure is used to store information for each + * physical container that a logical field is mapped to. + * + */ +typedef struct bcmlrd_cont_info_s { + /*! Section in which the container is available. */ + uint8_t section_id; + + /*! Offset of the container within the section. */ + uint16_t cont_id; + + /*! Width of the container in the section. */ + uint8_t width; + + /*! Bit offset of the container within the section. */ + uint16_t bit_offset; +} bcmlrd_cont_info_t; + +/*! + * \brief PDD information for physical containers. + * + * This structure is used to store PDD information for each + * physical container that a logical field is mapped to. + * + */ +typedef struct bcmlrd_pdd_info_s { + /*! + * Physical container id. This is the bit id of + * the physical container in the PDD bitmap. + */ + uint16_t phy_cont_id; + + /*! + * SBR Physical container id. This is the bit id of + * the physical container in the SBR bitmap. + */ + uint16_t sbr_phy_cont_id; + + /*! Physical container size. */ + uint16_t phy_cont_size; + + /*! Offset of action in the physical container. */ + uint8_t offset; + + /*! Width of action in the physical container from the offset */ + uint8_t width; + + /*! MFAP_INDEX to represend order of containers in contiguous */ + uint8_t mfap_index; + + /*! If set, then PDD is aligned from LSB. */ + bool is_lsb; +} bcmlrd_pdd_info_t; + +/*! + * \brief Container information per logical field. + * + * This structure is used to maintain the container information + * per logical field. + * + * Each logical field can be mapped to multiple containers. + * In which case, the information would be available as + * an array of this structure. + * Count specifies the array length. + * + */ +typedef struct bcmlrd_field_cont_info_s { + /*! Number of instances that physical container is mapped in the TILE. */ + uint8_t instances; + + /*! Number of containers that logical field is mapped to. */ + uint8_t count; + + /*! Physical container information. */ + const bcmlrd_cont_info_t *info; +} bcmlrd_field_cont_info_t; + +/*! + * \brief SBR type. + */ +typedef enum bcmlrd_field_sbr_type_e { + /*! Non SBR eligible action. */ + BCMLRD_SBR_NONE, + + /*! Non SBR eligible action, mapped to SBR container. */ + BCMLRD_SBR_INTERNAL, + + /*! SBR eligible action, mapped to SBR container. */ + BCMLRD_SBR_EXTERNAL +} bcmlrd_field_sbr_type_t; + +/*! + * \brief PDD information on containers per logical field. + * + * This structure is used to maintain the PDD information for containers + * per logical field. + * + * Each logical field can be mapped to multiple containers. + * In which case, the information would be available as + * an array of this structure. + * Count specifies the array length. + * + */ +typedef struct bcmlrd_field_pdd_info_s { + /*! SBR type of the field. */ + bcmlrd_field_sbr_type_t sbr_type; + + /*! Number of containers that logical field is mapped to. */ + uint8_t count; + + /*! PDD information for each physical container. */ + const bcmlrd_pdd_info_t *info; +} bcmlrd_field_pdd_info_t; + +/*! + * \brief Container map information for logical field. + * + * This structure provides container and PDD information for + * each physical container that the logical field is mapped to. + * + */ +typedef struct bcmlrd_field_info_s { + /*! Name of the physical field. */ + const char *name; + + /*! Field ID. */ + bcmltd_fid_t id; + + /*! Container information for the logical field. */ + const bcmlrd_field_cont_info_t *cont_info; + + /*! PDD container information for the logical field. */ + const bcmlrd_field_pdd_info_t *pdd_info; + +} bcmlrd_field_info_t; + +/*! + * \brief Table tile information for the special tables. + * + * This structure provides physical container information for each + * logical field in the tile mapped to the table. + * + */ + +typedef struct bcmlrd_tile_pcm_info_s { + /*! Mux information for this logical table. */ + uint32_t tile_id; + + /*! Number of fields in the table. */ + uint16_t field_count; + + /*! Field information for each field. */ + const bcmlrd_field_info_t *field_info; + +} bcmlrd_tile_pcm_info_t; + +/*! + * \brief Table information for the special tables. + * + * This structure provides physical container information for each + * logical field. + * + */ +typedef struct bcmlrd_table_pcm_info_s { + /*! Logical Table source ID. */ + uint32_t src_id; + + /*! Number of tiles in the table. */ + uint8_t tile_count; + + /*! Tile PCM information for each field. */ + const bcmlrd_tile_pcm_info_t *tile_info; + +} bcmlrd_table_pcm_info_t; + +/*! + * \brief Table PCM configuration storage compact representation. + */ +typedef struct bcmlrd_pcm_conf_compact_rep_s { + /*! PCM configuration name. */ + const char *name; + + /*! Number of tables that support PCM in the device. */ + uint32_t num_pcm; + + /*! Pointer to the array of PCM configurations. */ + const bcmlrd_table_pcm_info_t **pcm; + +} bcmlrd_pcm_conf_compact_rep_t; + +/*! + * \brief Table PCM configuration storage representation. + */ +typedef bcmlrd_pcm_conf_compact_rep_t bcmlrd_pcm_conf_rep_t; + +/*! + * \brief Return the PCM configuration for the given table. + * + * This routine returns the PCM configuration + * for the given unit, sid. + * + * \param [in] unit Unit number. + * \param [in] sid Logical Table symbol ID. + * \param [out] pcm_info PCM configuration. + * + * \retval SHR_E_NONE Success. + * \retval SHR_E_UNAVAIL Unit/Table/PCM configuration not found. + * + */ +extern int +bcmlrd_table_pcm_conf_get(int unit, + bcmlrd_sid_t sid, + const bcmlrd_table_pcm_info_t **pcm_info); + +/*! + * \brief Return the match id information. + * + * This routine returns the match id information + * for the given unit, table and field. + * + * \param [in] unit Unit number. + * \param [in] sid Logical Table symbol ID. + * \param [in] fid Logical field symbol ID. + * \param [out] info Match ID data. + * + * \retval SHR_E_NONE Success. + * \retval SHR_E_PARAM Invalid unit, sid, fid or info. + * \retval SHR_E_UNAVAIL Match ID data is not found. + * + */ +extern int +bcmlrd_table_match_id_db_get(int unit, + const bcmlrd_sid_t sid, + const bcmlrd_fid_t fid, + const bcmlrd_match_id_db_t **info); + +/*! + * \brief Return the match id information. + * + * This routine returns the match id information + * for the given match id in string format. + * + * \param [in] unit Unit number. + * \param [in] spec Match ID name. + * \param [out] info Match ID data. + * + * \retval SHR_E_NONE Success. + * \retval SHR_E_PARAM Invalid unit, sid, fid or info. + * \retval SHR_E_NOT_FOUND Match ID data is not found. + * + */ +extern int +bcmlrd_table_match_id_data_get(int unit, + const char *spec, + const bcmlrd_match_id_db_t **info); + + +#endif /* BCMLRD_MATCH_ID_DB_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h index 2949f6626425..d930d7b84969 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h @@ -13,7 +13,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -26,7 +26,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef BCMLRD_VARIANT_H diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h index 1d746a2e981b..db283eabc291 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef BCMLRD_CHIP_VARIANT_H diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h similarity index 72% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h index 607e1369508b..4cde687a4c31 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,18 +20,20 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H -#define GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H +#ifndef GEN_BCMLRD_CHIP_VARIANT_DEFS_H +#define GEN_BCMLRD_CHIP_VARIANT_DEFS_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56780_A0_HNA_1_2_10_0 14 -#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_1_2_10_0 3 +#include +#include +#include + #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H */ +#endif /* GEN_BCMLRD_CHIP_VARIANT_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h new file mode 100644 index 000000000000..20e2df1b9ee0 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h @@ -0,0 +1,56 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table definition files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ +#ifndef BCMLRD_VARIANT_DEFS_INTERNAL_H +#define BCMLRD_VARIANT_DEFS_INTERNAL_H +#ifndef DOXYGEN_IGNORE_AUTOGEN +/*+replace reverse */ +#include "../../defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h" +#include "../../defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_lrd_variant_def.h" +#include "../../defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h" +#include "../../defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h" +#include "../../defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_lrd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_lrd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h" +#include "../../defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h" +/*-replace*/ +#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#endif /* BCMLRD_VARIANT_DEFS_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h similarity index 74% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h index ce6a7109d385..10e6e258510d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,18 +20,18 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_UTLTM_LTD_VARIANT_DEF_H -#define GEN_BCM56880_A0_UTLTM_LTD_VARIANT_DEF_H +#ifndef GEN_BCMLRD_CHIP_VARIANT_LIMITS_H +#define GEN_BCMLRD_CHIP_VARIANT_LIMITS_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56880_A0_UTLTM 20 -#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTLTM 6 +#define BCMLRD_VARIANT_MAX BCMLTD_VARIANT_MAX + #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56880_A0_UTLTM_LTD_VARIANT_DEF_H */ +#endif /* GEN_BCMLRD_CHIP_VARIANT_LIMITS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h old mode 100644 new mode 100755 similarity index 74% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h index 6a7659d095bb..3ff1d4124353 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,18 +20,17 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_UTLRD_LTD_VARIANT_DEF_H -#define GEN_BCM56880_A0_UTLRD_LTD_VARIANT_DEF_H +#ifndef GEN_BCM56080_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56080_A0_LRD_VARIANT_DEF_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56880_A0_UTLRD 19 -#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTLRD 5 +#define BCMLRD_VARIANT_BCM56080_A0_BASE BCMLTD_VARIANT_BCM56080_A0_BASE #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56880_A0_UTLRD_LTD_VARIANT_DEF_H */ +#endif /* GEN_BCM56080_A0_LRD_VARIANT_DEF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h old mode 100644 new mode 100755 similarity index 74% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h index 154ab064843e..ec14ef1471c5 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,18 +20,17 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_UTCFG_LTD_VARIANT_DEF_H -#define GEN_BCM56880_A0_UTCFG_LTD_VARIANT_DEF_H +#ifndef GEN_BCM56690_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56690_A0_LRD_VARIANT_DEF_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56880_A0_UTCFG 18 -#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTCFG 4 +#define BCMLRD_VARIANT_BCM56690_A0_BASE BCMLTD_VARIANT_BCM56690_A0_BASE #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56880_A0_UTCFG_LTD_VARIANT_DEF_H */ +#endif /* GEN_BCM56690_A0_LRD_VARIANT_DEF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h old mode 100644 new mode 100755 similarity index 73% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h index e6efc2937edf..4bc81f8e4740 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,18 +20,17 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_DEF_H -#define GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_DEF_H +#ifndef GEN_BCM56690_A0_DNA_6_5_29_0_1_LRD_VARIANT_DEF_H +#define GEN_BCM56690_A0_DNA_6_5_29_0_1_LRD_VARIANT_DEF_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56880_A0_CNA_1_2_13 15 -#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_CNA_1_2_13 1 +#define BCMLRD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1 BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1 #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_DEF_H */ +#endif /* GEN_BCM56690_A0_DNA_6_5_29_0_1_LRD_VARIANT_DEF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h new file mode 100755 index 000000000000..e4d567d33643 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56780_A0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56780_A0_BASE BCMLTD_VARIANT_BCM56780_A0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_lrd_variant_def.h new file mode 100755 index 000000000000..05347a2d6aa1 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H +#define GEN_BCM56780_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56780_A0_CNA_6_5_30_2_0 BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_30_2_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_lrd_variant_def.h new file mode 100755 index 000000000000..23f5c62f6f49 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_DNA_6_5_30_2_0_LRD_VARIANT_DEF_H +#define GEN_BCM56780_A0_DNA_6_5_30_2_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56780_A0_DNA_6_5_30_2_0 BCMLTD_VARIANT_BCM56780_A0_DNA_6_5_30_2_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_DNA_6_5_30_2_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_lrd_variant_def.h new file mode 100755 index 000000000000..73fa0876d1b9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_HNA_6_5_30_6_0_LRD_VARIANT_DEF_H +#define GEN_BCM56780_A0_HNA_6_5_30_6_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56780_A0_HNA_6_5_30_6_0 BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_30_6_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_HNA_6_5_30_6_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h new file mode 100755 index 000000000000..ee0ec5203cbc --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56880_A0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56880_A0_BASE BCMLTD_VARIANT_BCM56880_A0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_lrd_variant_def.h new file mode 100755 index 000000000000..e0984c1463c4 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_DNA_6_5_30_1_1_LRD_VARIANT_DEF_H +#define GEN_BCM56880_A0_DNA_6_5_30_1_1_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56880_A0_DNA_6_5_30_1_1 BCMLTD_VARIANT_BCM56880_A0_DNA_6_5_30_1_1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_DNA_6_5_30_1_1_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_lrd_variant_def.h new file mode 100755 index 000000000000..1af4ea229bfa --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_HNA_6_5_30_3_0_LRD_VARIANT_DEF_H +#define GEN_BCM56880_A0_HNA_6_5_30_3_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56880_A0_HNA_6_5_30_3_0 BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_30_3_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_HNA_6_5_30_3_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_lrd_variant_def.h new file mode 100755 index 000000000000..af6ea4ed85bf --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_NFA_6_5_30_1_1_LRD_VARIANT_DEF_H +#define GEN_BCM56880_A0_NFA_6_5_30_1_1_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56880_A0_NFA_6_5_30_1_1 BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_30_1_1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_NFA_6_5_30_1_1_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h new file mode 100755 index 000000000000..f295d63c4191 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56890_A0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56890_A0_BASE BCMLTD_VARIANT_BCM56890_A0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_lrd_variant_def.h new file mode 100755 index 000000000000..dc5af3486b95 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H +#define GEN_BCM56890_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56890_A0_CNA_6_5_30_2_0 BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_30_2_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_lrd_variant_def.h new file mode 100755 index 000000000000..32ca41777985 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_DNA_6_5_30_8_0_LRD_VARIANT_DEF_H +#define GEN_BCM56890_A0_DNA_6_5_30_8_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56890_A0_DNA_6_5_30_8_0 BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_30_8_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_DNA_6_5_30_8_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h new file mode 100755 index 000000000000..c5fed3024907 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56990_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56990_A0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56990_A0_BASE BCMLTD_VARIANT_BCM56990_A0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56990_A0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h new file mode 100755 index 000000000000..09faa730dedd --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56990_B0_LRD_VARIANT_DEF_H +#define GEN_BCM56990_B0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56990_B0_BASE BCMLTD_VARIANT_BCM56990_B0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56990_B0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h new file mode 100755 index 000000000000..0f9d297a3a13 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56996_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56996_A0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56996_A0_BASE BCMLTD_VARIANT_BCM56996_A0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56996_A0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h new file mode 100755 index 000000000000..e2f3c407f24d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56996_B0_LRD_VARIANT_DEF_H +#define GEN_BCM56996_B0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56996_B0_BASE BCMLTD_VARIANT_BCM56996_B0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56996_B0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h new file mode 100755 index 000000000000..11a7db0e1fb2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56998_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56998_A0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56998_A0_BASE BCMLTD_VARIANT_BCM56998_A0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56998_A0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h new file mode 100755 index 000000000000..a8ba50b696c1 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56999_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56999_A0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56999_A0_BASE BCMLTD_VARIANT_BCM56999_A0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56999_A0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h new file mode 100755 index 000000000000..24902afc37ab --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78800_A0_LRD_VARIANT_DEF_H +#define GEN_BCM78800_A0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM78800_A0_BASE BCMLTD_VARIANT_BCM78800_A0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78800_A0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_lrd_variant_def.h new file mode 100755 index 000000000000..4708d71d8f59 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78800_A0_DNA_6_5_30_3_1_LRD_VARIANT_DEF_H +#define GEN_BCM78800_A0_DNA_6_5_30_3_1_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM78800_A0_DNA_6_5_30_3_1 BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_30_3_1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78800_A0_DNA_6_5_30_3_1_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h new file mode 100755 index 000000000000..2a1f1b5f1fc1 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78900_B0_LRD_VARIANT_DEF_H +#define GEN_BCM78900_B0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM78900_B0_BASE BCMLTD_VARIANT_BCM78900_B0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78900_B0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h new file mode 100755 index 000000000000..fb7e6a60ac42 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78905_A0_LRD_VARIANT_DEF_H +#define GEN_BCM78905_A0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM78905_A0_BASE BCMLTD_VARIANT_BCM78905_A0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78905_A0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_id_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_id_types.h new file mode 100644 index 000000000000..f692eefe3a49 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_id_types.h @@ -0,0 +1,59 @@ +/*! \file bcmltd_id_types.h + * + * Logical Table Data ID Types header file + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMLTD_ID_TYPES_H +#define BCMLTD_ID_TYPES_H + +/*! + * \brief Logical table ID type. + */ +typedef uint32_t bcmltd_sid_t; + +/*! + * \brief Logical field ID type. + */ +typedef uint32_t bcmltd_fid_t; + +/*! + * \brief Global logical field ID type. + */ +typedef bcmltd_fid_t bcmltd_gfid_t; + +/*! + * \brief Invalid logical table ID. + */ +#define BCMLTD_SID_INVALID ((bcmltd_sid_t)-1) + +/*! + * \brief Invalid logical table ID + * + * To store invalid LTID in HA for ISSU upgrade, + * this invalid LTID has to be used. + */ +#define BCMLTD_INVALID_LT BCMLTD_SID_INVALID + +/*! + * \brief Invalid logical field ID. + */ +#define BCMLTD_FID_INVALID ((bcmltd_fid_t)-1) + +#endif /* BCMLTD_ID_TYPES_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h index 18abbe88055d..b677351a4473 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h @@ -36,7 +36,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -49,7 +49,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef BCMLTD_VARIANT_H diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h index c4a5131ef2d2..77c57e39584b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef BCMLTD_CHIP_VARIANT_H diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h index 2dfe7fe81277..506b8108dfd8 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef BCMLTD_VARIANT_DEFS_H diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h old mode 100644 new mode 100755 similarity index 61% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h index e80842ef117e..1ccf6ca3bffb --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,21 +20,28 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H -#define GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H */ +#ifndef GEN_BCMLTD_CONFIG_VARIANT_H +#define GEN_BCMLTD_CONFIG_VARIANT_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_1_2_13 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,cna_1_2_13,CNA_1_2_13,_,BCMLTD_VARIANT_BCM56780_A0_CNA_1_2_13,BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_1_2_13,NULL,0,0) +#include + +/* This determines whether a BASE variant is included or excluded by default */ +#ifndef BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#define BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT 1 #endif -#endif /* DOXYGEN_IGNORE_AUTOGEN */ +/* This determines whether a variant is included or excluded by default */ +#ifndef BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#define BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT 1 +#endif +#include +#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#endif /* GEN_BCMLTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h new file mode 100755 index 000000000000..804903e09340 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h @@ -0,0 +1,56 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table definition files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ +#ifndef GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H +#define GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H +#ifndef DOXYGEN_IGNORE_AUTOGEN +/*+replace reverse */ +#include "../../conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h" +#include "../../conf/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_config_variant.h" +#include "../../conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h" +#include "../../conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h" +#include "../../conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_config_variant.h" +#include "../../conf/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_config_variant.h" +#include "../../conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h" +#include "../../conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h" +/*-replace*/ +#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#endif /* GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h new file mode 100755 index 000000000000..3c6d3899a48a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h @@ -0,0 +1,38 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCMLTD_VARIANT_DEFS_H +#define GEN_BCMLTD_VARIANT_DEFS_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#include +#include + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCMLTD_VARIANT_DEFS_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h new file mode 100755 index 000000000000..079bbb5be10b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h @@ -0,0 +1,56 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table definition files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ +#ifndef GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H +#define GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H +#ifndef DOXYGEN_IGNORE_AUTOGEN +/*+replace reverse */ +#include "../../defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h" +#include "../../defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_def.h" +#include "../../defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h" +#include "../../defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h" +#include "../../defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h" +#include "../../defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h" +/*-replace*/ +#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#endif /* GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h new file mode 100755 index 000000000000..7d68a5e02556 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h @@ -0,0 +1,57 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table definition files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ +#ifndef GEN_BCMLTD_VARIANT_ENTRY_H +#define GEN_BCMLTD_VARIANT_ENTRY_H +/* guard deliberately empty */ +#endif /* GEN_BCMLTD_VARIANT_ENTRY_H */ +#ifndef DOXYGEN_IGNORE_AUTOGEN +/*+replace variant */ +#include "../../entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h" +#include "../../entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h" +#include "../../entry/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_entry.h" +#include "../../entry/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_entry.h" +#include "../../entry/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_entry.h" +/*-replace*/ +#endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h new file mode 100755 index 000000000000..0be4c3277760 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCMLTD_VARIANT_LIMITS_H +#define GEN_BCMLTD_VARIANT_LIMITS_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_MAX 24 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCMLTD_VARIANT_LIMITS_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h new file mode 100755 index 000000000000..6cc7dd75e65d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56080_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56080_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56080_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56080_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56080_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56080_A0_BASE 1 +#define BCMLTD_VARIANT_LOCAL_BCM56080_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56080_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h new file mode 100755 index 000000000000..594c7e6f451a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56690_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56690_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56690_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56690_A0_BASE 2 +#define BCMLTD_VARIANT_LOCAL_BCM56690_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56690_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h new file mode 100755 index 000000000000..8b436739ed3e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_CONFIG_VARIANT_H +#define GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56690_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 +#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1=1, BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h new file mode 100755 index 000000000000..f023bf66e6d1 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56780_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56780_A0_BASE 3 +#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_config_variant.h new file mode 100755 index 000000000000..0001e457e635 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_config_variant.h new file mode 100755 index 000000000000..2156d844ac42 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_config_variant.h new file mode 100755 index 000000000000..d4642e4ca1bb --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h new file mode 100755 index 000000000000..025abf2529c9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56880_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56880_A0_BASE 4 +#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_config_variant.h new file mode 100755 index 000000000000..762391e56e02 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_CONFIG_VARIANT_H +#define GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1 +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_config_variant.h new file mode 100755 index 000000000000..cf6f78a34401 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_config_variant.h new file mode 100755 index 000000000000..d5fefbeb296f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_CONFIG_VARIANT_H +#define GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1 +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h new file mode 100755 index 000000000000..10f01c3f2f37 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56890_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56890_A0_BASE 5 +#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_config_variant.h new file mode 100755 index 000000000000..ec40fd40676d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_config_variant.h new file mode 100755 index 000000000000..78af73f2edd5 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h new file mode 100755 index 000000000000..0fe4ceaffa9f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56990_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56990_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56990_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56990_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56990_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56990_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56990_A0_BASE 6 +#define BCMLTD_VARIANT_LOCAL_BCM56990_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56990_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h new file mode 100755 index 000000000000..90d141baf8dc --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56990_B0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56990_B0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56990_B0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56990_B0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56990_B0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56990_B0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56990_B0_BASE 7 +#define BCMLTD_VARIANT_LOCAL_BCM56990_B0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56990_B0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h new file mode 100755 index 000000000000..5bba194fcab5 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56996_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56996_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56996_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56996_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56996_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56996_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56996_A0_BASE 8 +#define BCMLTD_VARIANT_LOCAL_BCM56996_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56996_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h new file mode 100755 index 000000000000..b5203e926f4c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56996_B0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56996_B0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56996_B0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56996_B0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56996_B0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56996_B0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56996_B0_BASE 9 +#define BCMLTD_VARIANT_LOCAL_BCM56996_B0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56996_B0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h new file mode 100755 index 000000000000..410ccaf5d52a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56998_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56998_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56998_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56998_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56998_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56998_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56998_A0_BASE 10 +#define BCMLTD_VARIANT_LOCAL_BCM56998_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56998_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h new file mode 100755 index 000000000000..0383a1b35384 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56999_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56999_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56999_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56999_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56999_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56999_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56999_A0_BASE 11 +#define BCMLTD_VARIANT_LOCAL_BCM56999_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56999_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h new file mode 100755 index 000000000000..ac5bb875d00e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78800_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM78800_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM78800_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM78800_A0_BASE 12 +#define BCMLTD_VARIANT_LOCAL_BCM78800_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78800_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_config_variant.h new file mode 100755 index 000000000000..96d06c9656de --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_CONFIG_VARIANT_H +#define GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM78800_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1 +#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1=1, BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h new file mode 100755 index 000000000000..10f1aebe6ebd --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78900_B0_LTD_CONFIG_VARIANT_H +#define GEN_BCM78900_B0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM78900_B0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM78900_B0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM78900_B0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM78900_B0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM78900_B0_BASE 13 +#define BCMLTD_VARIANT_LOCAL_BCM78900_B0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78900_B0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h new file mode 100755 index 000000000000..0d3ff3b3a6ab --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78905_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM78905_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM78905_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM78905_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM78905_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM78905_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM78905_A0_BASE 14 +#define BCMLTD_VARIANT_LOCAL_BCM78905_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78905_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h old mode 100644 new mode 100755 index eb0297e5ac7c..452962fed822 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h new file mode 100755 index 000000000000..e73cae8cbc0a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56690_A0_LTD_VARIANT_DEF_H +#define GEN_BCM56690_A0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56690_A0_BASE 2 +#define BCMLTD_VARIANT_LOCAL_BCM56690_A0_BASE 0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56690_A0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h old mode 100644 new mode 100755 similarity index 73% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h index aa4b1b7dcfcb..0a39b63ed1e2 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,18 +20,18 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_DEF_H -#define GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_DEF_H +#ifndef GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_DEF_H +#define GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_DEF_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56780_A0_CNA_1_2_13 12 -#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_1_2_13 1 +#define BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1 15 +#define BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_29_0_1 1 #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_DEF_H */ +#endif /* GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_DEF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h old mode 100644 new mode 100755 index a4a167739bca..3fdb9451f9a1 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56780_A0_BASE 2 +#define BCMLTD_VARIANT_BCM56780_A0_BASE 3 #define BCMLTD_VARIANT_LOCAL_BCM56780_A0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_def.h old mode 100644 new mode 100755 similarity index 73% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_def.h index c6d9933996dc..44c23d04e69b --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,18 +20,18 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_DEF_H -#define GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_DEF_H +#ifndef GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H +#define GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56780_A0_DNA_2_9_5_0 13 -#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_2_9_5_0 2 +#define BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_30_2_0 16 +#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_30_2_0 1 #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_DEF_H */ +#endif /* GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_def.h new file mode 100755 index 000000000000..99163f509a1b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_DEF_H +#define GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56780_A0_DNA_6_5_30_2_0 17 +#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_6_5_30_2_0 2 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_def.h new file mode 100755 index 000000000000..b8378adb1cc0 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_DEF_H +#define GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_30_6_0 18 +#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_30_6_0 3 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h old mode 100644 new mode 100755 index 7b3f82532223..bc2252b67852 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56880_A0_BASE 3 +#define BCMLTD_VARIANT_BCM56880_A0_BASE 4 #define BCMLTD_VARIANT_LOCAL_BCM56880_A0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h deleted file mode 100644 index e7af41f9b460..000000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_DEF_H -#define GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56880_A0_DNA_4_11_4_0 16 -#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_4_11_4_0 2 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_def.h new file mode 100755 index 000000000000..40df3e6b0c99 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_DEF_H +#define GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56880_A0_DNA_6_5_30_1_1 19 +#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_6_5_30_1_1 1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_def.h deleted file mode 100644 index 1694f3a1ab09..000000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H -#define GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56880_A0_HNA_1_2_10_0 17 -#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_1_2_10_0 3 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_def.h new file mode 100755 index 000000000000..8528d3a84522 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_DEF_H +#define GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_30_3_0 20 +#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_30_3_0 2 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_def.h new file mode 100755 index 000000000000..b99fdff03335 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_DEF_H +#define GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_30_1_1 21 +#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_6_5_30_1_1 3 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h old mode 100644 new mode 100755 index 067cd3aa6fd8..26ea9a04231d --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56890_A0_BASE 4 +#define BCMLTD_VARIANT_BCM56890_A0_BASE 5 #define BCMLTD_VARIANT_LOCAL_BCM56890_A0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_def.h new file mode 100755 index 000000000000..d4fd99e762ab --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H +#define GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_30_2_0 22 +#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_30_2_0 1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_def.h deleted file mode 100644 index fcea5c979c8a..000000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_DEF_H -#define GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56890_A0_DNA_4_0_17_0 21 -#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_4_0_17_0 1 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_def.h new file mode 100755 index 000000000000..6e094163dd9d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_DEF_H +#define GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_30_8_0 23 +#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_30_8_0 2 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h old mode 100644 new mode 100755 index 0b136b21dd3c..86a131856a56 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56990_A0_BASE 5 +#define BCMLTD_VARIANT_BCM56990_A0_BASE 6 #define BCMLTD_VARIANT_LOCAL_BCM56990_A0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h old mode 100644 new mode 100755 index 72f72fbd1e17..f753a77001bd --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56990_B0_BASE 6 +#define BCMLTD_VARIANT_BCM56990_B0_BASE 7 #define BCMLTD_VARIANT_LOCAL_BCM56990_B0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h old mode 100644 new mode 100755 index 80ef0b123700..340ea5336680 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56996_A0_BASE 7 +#define BCMLTD_VARIANT_BCM56996_A0_BASE 8 #define BCMLTD_VARIANT_LOCAL_BCM56996_A0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h old mode 100644 new mode 100755 index 2a9e72e913d6..c7d11581444a --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56996_B0_BASE 8 +#define BCMLTD_VARIANT_BCM56996_B0_BASE 9 #define BCMLTD_VARIANT_LOCAL_BCM56996_B0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h old mode 100644 new mode 100755 index a5ec341f379a..d193bf95ab9d --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56998_A0_BASE 9 +#define BCMLTD_VARIANT_BCM56998_A0_BASE 10 #define BCMLTD_VARIANT_LOCAL_BCM56998_A0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h old mode 100644 new mode 100755 index 22ef37f20095..f89ecfad9f2b --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56999_A0_BASE 10 +#define BCMLTD_VARIANT_BCM56999_A0_BASE 11 #define BCMLTD_VARIANT_LOCAL_BCM56999_A0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h new file mode 100755 index 000000000000..ad0e9daf7db9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78800_A0_LTD_VARIANT_DEF_H +#define GEN_BCM78800_A0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM78800_A0_BASE 12 +#define BCMLTD_VARIANT_LOCAL_BCM78800_A0_BASE 0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78800_A0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_def.h new file mode 100755 index 000000000000..752feaa57d4f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_DEF_H +#define GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_30_3_1 24 +#define BCMLTD_VARIANT_LOCAL_BCM78800_A0_DNA_6_5_30_3_1 1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h old mode 100644 new mode 100755 index ed6b18f0827d..92d633da92c6 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM78900_B0_BASE 11 +#define BCMLTD_VARIANT_BCM78900_B0_BASE 13 #define BCMLTD_VARIANT_LOCAL_BCM78900_B0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h new file mode 100755 index 000000000000..b4a083cca9a8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78905_A0_LTD_VARIANT_DEF_H +#define GEN_BCM78905_A0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM78905_A0_BASE 14 +#define BCMLTD_VARIANT_LOCAL_BCM78905_A0_BASE 0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78905_A0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h old mode 100644 new mode 100755 index 50616d50963f..69f0454d203b --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h new file mode 100755 index 000000000000..e211e30cffa6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56690_A0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56690_A0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56690_A0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56690_a0,BCM56690_A0,,BASE,,BCMLTD_VARIANT_BCM56690_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM56690_A0_BASE,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h old mode 100644 new mode 100755 similarity index 61% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h index 2e3cd8ef6419..63d52143e949 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,19 +20,19 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_ENTRY_H */ +#ifndef GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_ENTRY_H +#define GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_ENTRY_H */ #ifndef DOXYGEN_IGNORE_AUTOGEN -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,dna_2_9_5_0,DNA_2_9_5_0,_,BCMLTD_VARIANT_BCM56780_A0_DNA_2_9_5_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_2_9_5_0,NULL,0,0) +#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56690_a0,BCM56690_A0,dna_6_5_29_0_1,DNA_6_5_29_0_1,_,BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1,BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_29_0_1,NULL,0,0) #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h old mode 100644 new mode 100755 index 6f6b34efbdb7..3ef67ceabd3b --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_entry.h old mode 100644 new mode 100755 similarity index 61% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_entry.h index 27d73773bdbc..82e276e6ab17 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,19 +20,19 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H */ +#ifndef GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H */ #ifndef DOXYGEN_IGNORE_AUTOGEN -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_1_2_10_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,hna_1_2_10_0,HNA_1_2_10_0,_,BCMLTD_VARIANT_BCM56780_A0_HNA_1_2_10_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_1_2_10_0,NULL,0,0) +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,cna_6_5_30_2_0,CNA_6_5_30_2_0,_,BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_30_2_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_30_2_0,NULL,0,0) #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_entry.h new file mode 100755 index 000000000000..6fe0337c0d6a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,dna_6_5_30_2_0,DNA_6_5_30_2_0,_,BCMLTD_VARIANT_BCM56780_A0_DNA_6_5_30_2_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_6_5_30_2_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_entry.h new file mode 100755 index 000000000000..a462d25fc858 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,hna_6_5_30_6_0,HNA_6_5_30_6_0,_,BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_30_6_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_30_6_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h old mode 100644 new mode 100755 index 08775e092c8c..9c925f030db3 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h deleted file mode 100644 index e677601d1dfe..000000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h +++ /dev/null @@ -1,40 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,dna_4_11_4_0,DNA_4_11_4_0,_,BCMLTD_VARIANT_BCM56880_A0_DNA_4_11_4_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_4_11_4_0,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_entry.h new file mode 100755 index 000000000000..f8b70cd7c2d4 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_ENTRY_H +#define GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,dna_6_5_30_1_1,DNA_6_5_30_1_1,_,BCMLTD_VARIANT_BCM56880_A0_DNA_6_5_30_1_1,BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_6_5_30_1_1,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_entry.h deleted file mode 100644 index c0707c11439a..000000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_entry.h +++ /dev/null @@ -1,40 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_1_2_10_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,hna_1_2_10_0,HNA_1_2_10_0,_,BCMLTD_VARIANT_BCM56880_A0_HNA_1_2_10_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_1_2_10_0,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_entry.h old mode 100644 new mode 100755 similarity index 64% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_entry.h index 8fb2a10d8389..9eeb8ddbb210 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,19 +20,19 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H -#define GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H */ +#ifndef GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_ENTRY_H */ #ifndef DOXYGEN_IGNORE_AUTOGEN -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_1_2_13 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,cna_1_2_13,CNA_1_2_13,_,BCMLTD_VARIANT_BCM56880_A0_CNA_1_2_13,BCMLTD_VARIANT_LOCAL_BCM56880_A0_CNA_1_2_13,NULL,0,0) +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,hna_6_5_30_3_0,HNA_6_5_30_3_0,_,BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_30_3_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_30_3_0,NULL,0,0) #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_entry.h new file mode 100755 index 000000000000..99fed8f6ffdf --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_ENTRY_H +#define GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,nfa_6_5_30_1_1,NFA_6_5_30_1_1,_,BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_30_1_1,BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_6_5_30_1_1,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_entry.h deleted file mode 100644 index db4192647c2b..000000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_entry.h +++ /dev/null @@ -1,40 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_UTCFG_LTD_VARIANT_ENTRY_H -#define GEN_BCM56880_A0_UTCFG_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56880_A0_UTCFG_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_UTCFG == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,utcfg,UTCFG,_,BCMLTD_VARIANT_BCM56880_A0_UTCFG,BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTCFG,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_entry.h deleted file mode 100644 index 6ba897bc6800..000000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_entry.h +++ /dev/null @@ -1,40 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_UTLRD_LTD_VARIANT_ENTRY_H -#define GEN_BCM56880_A0_UTLRD_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56880_A0_UTLRD_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_UTLRD == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,utlrd,UTLRD,_,BCMLTD_VARIANT_BCM56880_A0_UTLRD,BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTLRD,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_entry.h deleted file mode 100644 index 6adb5eda219f..000000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_entry.h +++ /dev/null @@ -1,40 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_UTLTM_LTD_VARIANT_ENTRY_H -#define GEN_BCM56880_A0_UTLTM_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56880_A0_UTLTM_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_UTLTM == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,utltm,UTLTM,_,BCMLTD_VARIANT_BCM56880_A0_UTLTM,BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTLTM,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h old mode 100644 new mode 100755 index 56deb27eb09f..a53f9713a7fd --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_entry.h new file mode 100755 index 000000000000..4ac79fbe627e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,cna_6_5_30_2_0,CNA_6_5_30_2_0,_,BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_30_2_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_30_2_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_entry.h deleted file mode 100644 index a139a20a3959..000000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_entry.h +++ /dev/null @@ -1,40 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_4_0_17_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,dna_4_0_17_0,DNA_4_0_17_0,_,BCMLTD_VARIANT_BCM56890_A0_DNA_4_0_17_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_4_0_17_0,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_entry.h new file mode 100755 index 000000000000..6200261b3df9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,dna_6_5_30_8_0,DNA_6_5_30_8_0,_,BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_30_8_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_30_8_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h old mode 100644 new mode 100755 index 7e58e4babd30..a77734200c7c --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h old mode 100644 new mode 100755 index a395052a5853..e52261cf99a9 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h old mode 100644 new mode 100755 index 40abaeff0df0..cab8c914fd14 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h old mode 100644 new mode 100755 index ad387ff5c24b..9a1d414f7ac2 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h old mode 100644 new mode 100755 index b5313fb0a589..1b5eeeaec89d --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h old mode 100644 new mode 100755 index a472cabc74c3..17d0d78c7ca0 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h new file mode 100755 index 000000000000..1a28b94db35a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78800_A0_LTD_VARIANT_ENTRY_H +#define GEN_BCM78800_A0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM78800_A0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm78800_a0,BCM78800_A0,,BASE,,BCMLTD_VARIANT_BCM78800_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM78800_A0_BASE,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_entry.h new file mode 100755 index 000000000000..a69f9ba238c4 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_ENTRY_H +#define GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm78800_a0,BCM78800_A0,dna_6_5_30_3_1,DNA_6_5_30_3_1,_,BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_30_3_1,BCMLTD_VARIANT_LOCAL_BCM78800_A0_DNA_6_5_30_3_1,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h old mode 100644 new mode 100755 index 339373fd1afe..d91efcb918c7 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,7 +20,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. * ******************************************************************************/ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h new file mode 100755 index 000000000000..9ca67d38e32d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78905_A0_LTD_VARIANT_ENTRY_H +#define GEN_BCM78905_A0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM78905_A0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM78905_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm78905_a0,BCM78905_A0,,BASE,,BCMLTD_VARIANT_BCM78905_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM78905_A0_BASE,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..fb0db69dc947 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c @@ -0,0 +1,343 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides LBHDR access functions for BCM56080_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 8, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 8); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + if (val == BCMPKT_LBHDR_HEADER_T_GENERIC) { + val = 0; + } + WORD_FIELD_SET(data[0], 15, 1, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 1); + if (val == 0) { + val = BCMPKT_LBHDR_HEADER_T_GENERIC; + } + return val; +} + +static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 20, 4, val); +} + +static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 20, 4); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 26, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 26, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 29, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 29, 1); + return val; +} + +static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 30, 2, val & MASK(2)); + WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14)); +} + +static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ; + return val; +} + +static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_zero_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 5, 1, val); +} + +static uint32_t bcmpkt_lbhdr_zero_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 5, 1); + return val; +} + +static void bcmpkt_lbhdr_pp_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 7, val); +} + +static uint32_t bcmpkt_lbhdr_pp_port_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 7); + return val; +} + +static void bcmpkt_lbhdr_routed_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_lbhdr_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_lbhdr_vrf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 30, 2, val & MASK(2)); + WORD_FIELD_SET(data[1], 0, 4, (val >> 2) & MASK(4)); +} + +static uint32_t bcmpkt_lbhdr_vrf_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[2], 30, 2) | (WORD_FIELD_GET(data[1], 0, 4) << 2)) ; + return val; +} + +static void bcmpkt_lbhdr_vrf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 4, 1, val); +} + +static uint32_t bcmpkt_lbhdr_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 4, 1); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm56080_a0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + bcmpkt_lbhdr_input_priority_get, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + bcmpkt_lbhdr_source_get, + bcmpkt_lbhdr_source_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_lbhdr_zero_get, + bcmpkt_lbhdr_pp_port_get, + bcmpkt_lbhdr_routed_pkt_get, + bcmpkt_lbhdr_vrf_get, + bcmpkt_lbhdr_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56080_a0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + bcmpkt_lbhdr_input_priority_set, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + bcmpkt_lbhdr_source_set, + bcmpkt_lbhdr_source_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_lbhdr_zero_set, + bcmpkt_lbhdr_pp_port_set, + bcmpkt_lbhdr_routed_pkt_set, + bcmpkt_lbhdr_vrf_set, + bcmpkt_lbhdr_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56080_a0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm56080_a0_lbhdr_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56080_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56080_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56080_a0_lbhdr_view_infos; + info->view_types = bcm56080_a0_lbhdr_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..7a41a9f17c46 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c @@ -0,0 +1,1160 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides RXPMD access functions for BCM56080_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 0, 8, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 0, 8); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 20, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 20, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 11, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 11, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 12, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 12, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 4, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 4, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 4, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 4, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 10, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 10, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + data[4] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = data[4]; + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 8, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 8, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 28, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 28, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 26, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 26, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 14, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 14, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 13); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 0, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 0, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 26, 5, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 26, 5); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 14, 12, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 14, 12); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 27, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 27, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 16, 1); + return val; +} + +static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 14, 12, val); +} + +static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 14, 12); + return val; +} + +static void bcmpkt_rxpmd_ieu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 28, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ieu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 28, 1); + return val; +} + +static void bcmpkt_rxpmd_ieu_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ieu_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_vrf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 6, val); +} + +static uint32_t bcmpkt_rxpmd_vrf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 6); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 10; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 48 + ******************************************************************************/ +void bcm56080_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) { + WORD_FIELD_SET(data[1], 16, 2, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) { + WORD_FIELD_SET(data[1], 16, 2, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 23); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) { + WORD_FIELD_SET(data[1], 24, 3, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) { + WORD_FIELD_SET(data[1], 24, 3, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) { + WORD_FIELD_SET(data[1], 24, 3, 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) { + WORD_FIELD_SET(data[1], 24, 3, 4); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR)) { + WORD_FIELD_SET(data[1], 24, 3, 7); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN)) { + data[0] |= (0x1 << 10); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_OAM_PROCESSING_OAM_CCM)) { + WORD_FIELD_SET(data[0], 11, 3, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_OAM_PROCESSING_OAM_LM)) { + WORD_FIELD_SET(data[0], 11, 3, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_OAM_PROCESSING_OAM_DM)) { + WORD_FIELD_SET(data[0], 11, 3, 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_OAM_PROCESSING_OAM_OTHER_OPCODES)) { + WORD_FIELD_SET(data[0], 11, 3, 4); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_OAM_PROCESSING)) { + WORD_FIELD_SET(data[0], 11, 3, 7); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SUBPORT_ID_LOOKUP_MISS)) { + data[0] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SVTAG_CPU_BIT_SET)) { + data[0] |= (0x1 << 15); + } +} + +void bcm56080_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + + val = WORD_FIELD_GET(data[1], 16, 2); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val); + } + + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + + val = WORD_FIELD_GET(data[1], 24, 3); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val); + } + + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN); + } + + val = WORD_FIELD_GET(data[0], 11, 3); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_OAM_PROCESSING); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_OAM_PROCESSING + val); + } + + if (data[0] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SUBPORT_ID_LOOKUP_MISS); + } + if (data[0] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SVTAG_CPU_BIT_SET); + } +} + +void bcm56080_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56080_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56080_a0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + bcmpkt_rxpmd_timestamp_type_get, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + NULL, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_get, + bcmpkt_rxpmd_o_nhi_get, + bcmpkt_rxpmd_ieu_get, + bcmpkt_rxpmd_ieu_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_vrf_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56080_a0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + bcmpkt_rxpmd_timestamp_type_set, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + NULL, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_set, + bcmpkt_rxpmd_o_nhi_set, + bcmpkt_rxpmd_ieu_set, + bcmpkt_rxpmd_ieu_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_vrf_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56080_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm56080_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56080_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56080_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56080_a0_rxpmd_view_infos; + info->view_types = bcm56080_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c new file mode 100644 index 000000000000..4c73216593c7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c @@ -0,0 +1,1330 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides TXPMD access functions for BCM56080_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 17, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 29, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 29, 1); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 0, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 1); + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 23, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 23, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 3, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 3, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 9, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 9, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[1], 0, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[1], 0, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 13, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 13, 4); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 0, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 30, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 30, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 1, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 31, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 31, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 22, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 22, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 18, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 18, 2); + return val; +} + +static void bcmpkt_txpmd_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 1, 2, val); +} + +static uint32_t bcmpkt_txpmd_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 1, 2); + return val; +} + +static void bcmpkt_txpmd_destination_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 9, 16, val); +} + +static uint32_t bcmpkt_txpmd_destination_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 16); + return val; +} + +static void bcmpkt_txpmd_destination_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + if (val == BCMPKT_TXPMD_DESTINATION_T_INVALID) { + val = 9; + } + WORD_FIELD_SET(data[3], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_destination_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 25, 4); + if (val == 9) { + val = BCMPKT_TXPMD_DESTINATION_T_INVALID; + } + return val; +} + +static void bcmpkt_txpmd_wred_mark_eligible_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[1], 1, 1, val); +} + +static uint32_t bcmpkt_txpmd_wred_mark_eligible_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[1], 1, 1); + return val; +} + +static void bcmpkt_txpmd_wred_response_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[1], 2, 1, val); +} + +static uint32_t bcmpkt_txpmd_wred_response_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[1], 2, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 0, 7, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 7); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 0, 10, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 10); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_destination_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 10, 16, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_destination_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 10, 16); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_destination_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + if (val == BCMPKT_TXPMD_CPU_TX_DESTINATION_T_INVALID) { + val = 9; + } + WORD_FIELD_SET(data[3], 26, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_destination_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 26, 4); + if (val == 9) { + val = BCMPKT_TXPMD_CPU_TX_DESTINATION_T_INVALID; + } + return val; +} + +static void bcmpkt_txpmd_cpu_tx_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 30, 2); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_input_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 0, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_input_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 4); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 4, 2, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 4, 2); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 6, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 6, 4); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 10, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 10, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_pkt_profile_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 11, 3, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 11, 3); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_unicast_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_unicast_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 17, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_sop_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_sop_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 16, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 18, 6, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 18, 6); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_wcmp_sel_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 25, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_wcmp_sel_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 25, 1); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_cell_error_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[3], 0, 1, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_cell_error_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 1); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_cell_length_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[3], 1, 8, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_cell_length_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 1, 8); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_cos_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[3], 9, 6, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_cos_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 6); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_destination_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[3], 15, 16, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_destination_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 15, 16); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_destination_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val & MASK(1)); + WORD_FIELD_SET(data[2], 0, 3, (val >> 1) & MASK(3)); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_destination_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = (WORD_FIELD_GET(data[3], 31, 1) | (WORD_FIELD_GET(data[2], 0, 3) << 1)) ; + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_eop_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[2], 3, 1, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_eop_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 3, 1); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_input_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[2], 4, 4, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_input_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 4, 4); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_lm_counter_action_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[2], 8, 2, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_lm_counter_action_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 8, 2); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_lm_counter_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[2], 10, 9, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_lm_counter_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 10, 9); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_oam_replacement_offset_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[2], 19, 6, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_oam_replacement_offset_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 19, 6); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_pkt_length_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[2], 25, 7, val & MASK(7)); + WORD_FIELD_SET(data[1], 0, 7, (val >> 7) & MASK(7)); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_pkt_length_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 25, 7) | (WORD_FIELD_GET(data[1], 0, 7) << 7)) ; + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[1], 7, 4, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 7, 4); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_sop_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[1], 11, 1, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_sop_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 11, 1); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_spap_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[1], 12, 2, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_spap_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 12, 2); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_spid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[1], 14, 2, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_spid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 14, 2); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_spid_override_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_spid_override_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_src_modid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[1], 17, 8, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_src_modid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 17, 8); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_timestamp_action_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[1], 25, 1, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_timestamp_action_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 25, 1); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_unicast_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[1], 26, 1, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_unicast_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 26, 1); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56080_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + NULL, + NULL, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + NULL, + bcmpkt_txpmd_cell_error_get, + NULL, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + NULL, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cng_get, + bcmpkt_txpmd_destination_get, + bcmpkt_txpmd_destination_type_get, + bcmpkt_txpmd_wred_mark_eligible_get, + bcmpkt_txpmd_wred_response_get, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_get, + bcmpkt_txpmd_cpu_tx_ecmp_member_id_get, + bcmpkt_txpmd_cpu_tx_destination_get, + bcmpkt_txpmd_cpu_tx_destination_type_get, + bcmpkt_txpmd_cpu_tx_dp_get, + bcmpkt_txpmd_cpu_tx_input_pri_get, + bcmpkt_txpmd_cpu_tx_int_cn_get, + bcmpkt_txpmd_cpu_tx_int_pri_get, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get, + bcmpkt_txpmd_cpu_tx_pkt_profile_get, + bcmpkt_txpmd_cpu_tx_qos_fields_vld_get, + bcmpkt_txpmd_cpu_tx_routed_pkt_get, + bcmpkt_txpmd_cpu_tx_unicast_get, + bcmpkt_txpmd_cpu_tx_sop_get, + bcmpkt_txpmd_cpu_tx_vrf_get, + bcmpkt_txpmd_cpu_tx_vrf_valid_get, + bcmpkt_txpmd_cpu_tx_wcmp_sel_get, + bcmpkt_txpmd_oam_downmep_tx_cell_error_get, + bcmpkt_txpmd_oam_downmep_tx_cell_length_get, + bcmpkt_txpmd_oam_downmep_tx_cos_get, + bcmpkt_txpmd_oam_downmep_tx_destination_get, + bcmpkt_txpmd_oam_downmep_tx_destination_type_get, + bcmpkt_txpmd_oam_downmep_tx_eop_get, + bcmpkt_txpmd_oam_downmep_tx_input_pri_get, + bcmpkt_txpmd_oam_downmep_tx_lm_counter_action_get, + bcmpkt_txpmd_oam_downmep_tx_lm_counter_id_get, + bcmpkt_txpmd_oam_downmep_tx_oam_replacement_offset_get, + bcmpkt_txpmd_oam_downmep_tx_pkt_length_get, + bcmpkt_txpmd_oam_downmep_tx_rqe_q_num_get, + bcmpkt_txpmd_oam_downmep_tx_sop_get, + bcmpkt_txpmd_oam_downmep_tx_spap_get, + bcmpkt_txpmd_oam_downmep_tx_spid_get, + bcmpkt_txpmd_oam_downmep_tx_spid_override_get, + bcmpkt_txpmd_oam_downmep_tx_src_modid_get, + bcmpkt_txpmd_oam_downmep_tx_timestamp_action_get, + bcmpkt_txpmd_oam_downmep_tx_unicast_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56080_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + NULL, + NULL, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + NULL, + bcmpkt_txpmd_cell_error_set, + NULL, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + NULL, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cng_set, + bcmpkt_txpmd_destination_set, + bcmpkt_txpmd_destination_type_set, + bcmpkt_txpmd_wred_mark_eligible_set, + bcmpkt_txpmd_wred_response_set, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_set, + bcmpkt_txpmd_cpu_tx_ecmp_member_id_set, + bcmpkt_txpmd_cpu_tx_destination_set, + bcmpkt_txpmd_cpu_tx_destination_type_set, + bcmpkt_txpmd_cpu_tx_dp_set, + bcmpkt_txpmd_cpu_tx_input_pri_set, + bcmpkt_txpmd_cpu_tx_int_cn_set, + bcmpkt_txpmd_cpu_tx_int_pri_set, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set, + bcmpkt_txpmd_cpu_tx_pkt_profile_set, + bcmpkt_txpmd_cpu_tx_qos_fields_vld_set, + bcmpkt_txpmd_cpu_tx_routed_pkt_set, + bcmpkt_txpmd_cpu_tx_unicast_set, + bcmpkt_txpmd_cpu_tx_sop_set, + bcmpkt_txpmd_cpu_tx_vrf_set, + bcmpkt_txpmd_cpu_tx_vrf_valid_set, + bcmpkt_txpmd_cpu_tx_wcmp_sel_set, + bcmpkt_txpmd_oam_downmep_tx_cell_error_set, + bcmpkt_txpmd_oam_downmep_tx_cell_length_set, + bcmpkt_txpmd_oam_downmep_tx_cos_set, + bcmpkt_txpmd_oam_downmep_tx_destination_set, + bcmpkt_txpmd_oam_downmep_tx_destination_type_set, + bcmpkt_txpmd_oam_downmep_tx_eop_set, + bcmpkt_txpmd_oam_downmep_tx_input_pri_set, + bcmpkt_txpmd_oam_downmep_tx_lm_counter_action_set, + bcmpkt_txpmd_oam_downmep_tx_lm_counter_id_set, + bcmpkt_txpmd_oam_downmep_tx_oam_replacement_offset_set, + bcmpkt_txpmd_oam_downmep_tx_pkt_length_set, + bcmpkt_txpmd_oam_downmep_tx_rqe_q_num_set, + bcmpkt_txpmd_oam_downmep_tx_sop_set, + bcmpkt_txpmd_oam_downmep_tx_spap_set, + bcmpkt_txpmd_oam_downmep_tx_spid_set, + bcmpkt_txpmd_oam_downmep_tx_spid_override_set, + bcmpkt_txpmd_oam_downmep_tx_src_modid_set, + bcmpkt_txpmd_oam_downmep_tx_timestamp_action_set, + bcmpkt_txpmd_oam_downmep_tx_unicast_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56080_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56080_a0_txpmd_view_types[] = { + {"sobmh_from_cpu", 1}, + {"oam_downmep_tx", 12}, + {"cpu_tx", 2}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56080_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -2, -2, 1, 1, -2, 1, -2, 1, 1, 1, 1, 1, -2, 1, + 1, 1, 1, 1, 1, 1, 1, -2, -2, -2, -2, -2, -2, -2, 1, 1, + 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, + 12, 12, 12, 12, 12, 12, 12, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56080_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56080_a0_txpmd_view_infos; + info->view_types = bcm56080_a0_txpmd_view_types; + info->view_type_get = bcmpkt_txpmd_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..cf8d9663d92e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c @@ -0,0 +1,181 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides LBHDR access functions for BCM56690_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +const bcmpkt_lbhdr_fget_t bcm56690_a0_lbhdr_fget = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56690_a0_lbhdr_fset = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56690_a0_lbhdr_figet = { + { + NULL + } +}; + +static shr_enum_map_t bcm56690_a0_lbhdr_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56690_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56690_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56690_a0_lbhdr_view_infos; + info->view_types = bcm56690_a0_lbhdr_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..2fb78ae3f6ea --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c @@ -0,0 +1,559 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides RXPMD access functions for BCM56690_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 576 + ******************************************************************************/ +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 2, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 2, 6); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 13, 1, val == 0); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[0], 13, 1) == 0); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_mpb_flex_data_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 1, 6, val); +} + +static uint32_t bcmpkt_rxpmd_mpb_flex_data_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 1, 6); + return val; +} + +static void bcmpkt_rxpmd_int_cn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_int_cn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_cng_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 18, 2, val); +} + +static uint32_t bcmpkt_rxpmd_cng_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 18, 2); + return val; +} + +static void bcmpkt_rxpmd_egr_zone_remap_ctrl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 9, 4, val); +} + +static uint32_t bcmpkt_rxpmd_egr_zone_remap_ctrl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 9, 4); + return val; +} + +static void bcmpkt_rxpmd_dma_header_version_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 0, 2, val); +} + +static uint32_t bcmpkt_rxpmd_dma_header_version_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 0, 2); + return val; +} + +static void bcmpkt_rxpmd_multicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 20, 1, val); +} + +static uint32_t bcmpkt_rxpmd_multicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 20, 1); + return val; +} + +static void bcmpkt_rxpmd_copy_to_cpu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 22, 1, val); +} + +static uint32_t bcmpkt_rxpmd_copy_to_cpu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 22, 1); + return val; +} + +static void bcmpkt_rxpmd_truncate_cpu_copy_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 8, 1, val); +} + +static uint32_t bcmpkt_rxpmd_truncate_cpu_copy_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 8, 1); + return val; +} + +static void bcmpkt_rxpmd_dop_trigger_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 7, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dop_trigger_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 7, 1); + return val; +} + +static void bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 4, val); +} + +static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 4); + return val; +} + +static void bcmpkt_rxpmd_eparse_extract_offsets_6_4_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 12, 3, val); +} + +static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_6_4_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 12, 3); + return val; +} + +static void bcmpkt_rxpmd_arc_id_lo_set(uint32_t *data, uint32_t val) +{ + data[2] = val; +} + +static uint32_t bcmpkt_rxpmd_arc_id_lo_get(uint32_t *data) +{ + uint32_t val; + val = data[2]; + return val; +} + +static void bcmpkt_rxpmd_arc_id_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_arc_id_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 0, 16); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 18; +} + +static uint32_t bcmpkt_rxpmd_i_flex_data_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 4; + return 14; +} + +void bcm56690_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56690_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +void bcm56690_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56690_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56690_a0_rxpmd_fget = { + { + NULL, + bcmpkt_rxpmd_queue_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + bcmpkt_rxpmd_mpb_flex_data_type_get, + bcmpkt_rxpmd_int_cn_get, + bcmpkt_rxpmd_cng_get, + bcmpkt_rxpmd_egr_zone_remap_ctrl_get, + bcmpkt_rxpmd_dma_header_version_get, + bcmpkt_rxpmd_multicast_get, + bcmpkt_rxpmd_copy_to_cpu_get, + bcmpkt_rxpmd_truncate_cpu_copy_get, + NULL, + bcmpkt_rxpmd_dop_trigger_get, + bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_eparse_extract_offsets_6_4_get, + NULL, + bcmpkt_rxpmd_arc_id_lo_get, + bcmpkt_rxpmd_arc_id_hi_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56690_a0_rxpmd_fset = { + { + NULL, + bcmpkt_rxpmd_queue_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + bcmpkt_rxpmd_mpb_flex_data_type_set, + bcmpkt_rxpmd_int_cn_set, + bcmpkt_rxpmd_cng_set, + bcmpkt_rxpmd_egr_zone_remap_ctrl_set, + bcmpkt_rxpmd_dma_header_version_set, + bcmpkt_rxpmd_multicast_set, + bcmpkt_rxpmd_copy_to_cpu_set, + bcmpkt_rxpmd_truncate_cpu_copy_set, + NULL, + bcmpkt_rxpmd_dop_trigger_set, + bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_eparse_extract_offsets_6_4_set, + NULL, + bcmpkt_rxpmd_arc_id_lo_set, + bcmpkt_rxpmd_arc_id_hi_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56690_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + NULL, + NULL, + bcmpkt_rxpmd_i_flex_data_get + } +}; + +static shr_enum_map_t bcm56690_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56690_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -2, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -1, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, + -2, -2, -2, -2, -2, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56690_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56690_a0_rxpmd_view_infos; + info->view_types = bcm56690_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c new file mode 100644 index 000000000000..dfe1fae79314 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c @@ -0,0 +1,105 @@ +/*! \file bcm56690_a0_pkt_rxpmd_field.c + * + * This file provides RXPMD access functions for BCM56690_A0. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +int bcm56690_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t *val) +{ + uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + /* Skip fields with minbit >= 448.*/ + if (minbit >= 448) { + return SHR_E_PARAM; + } + + if (diff == 31) { + *val = data[index]; + } else if (diff < 31) { + *val = WORD_FIELD_GET(data[index], low_bit, diff+1); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} + +int bcm56690_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t val) +{ + uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + /* Skip fields with minbit >= 448.*/ + if (minbit >= 448) { + return SHR_E_PARAM; + } + + if (diff == 31) { + data[index] = val; + } else if (diff < 31) { + WORD_FIELD_SET(data[index], low_bit, diff+1, val); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c new file mode 100644 index 000000000000..d452bf6d8440 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c @@ -0,0 +1,612 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides TXPMD access functions for BCM56690_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 1, 7, val); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 1, 7); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 6, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 6, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 13, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 13, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 23, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 23, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 21, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 21, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 19, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 19, 2); + return val; +} + +static void bcmpkt_txpmd_unicast_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 12, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 12, 1); + return val; +} + +static void bcmpkt_txpmd_ts_action_lsb_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ts_action_lsb_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ts_action_msb_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 21, 1, val); +} + +static uint32_t bcmpkt_txpmd_ts_action_msb_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 21, 1); + return val; +} + +static void bcmpkt_txpmd_ts_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 22, 1, val); +} + +static uint32_t bcmpkt_txpmd_ts_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 22, 1); + return val; +} + +static void bcmpkt_txpmd_dst_subport_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[0], 0, 1, (val >> 9) & MASK(1)); +} + +static uint32_t bcmpkt_txpmd_dst_subport_num_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 23, 9) | (WORD_FIELD_GET(data[0], 0, 1) << 9)) ; + return val; +} + +static void bcmpkt_txpmd_udp_checksum_update_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 1, 1, val); +} + +static uint32_t bcmpkt_txpmd_udp_checksum_update_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 1, 1); + return val; +} + +static void bcmpkt_txpmd_udp_checksum_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 2, 6, val); +} + +static uint32_t bcmpkt_txpmd_udp_checksum_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 2, 6); + return val; +} + +static void bcmpkt_txpmd_copy_to_debug_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 5, 1, val); +} + +static uint32_t bcmpkt_txpmd_copy_to_debug_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 5, 1); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56690_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + NULL, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + NULL, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + bcmpkt_txpmd_unicast_pkt_get, + bcmpkt_txpmd_ts_action_lsb_get, + bcmpkt_txpmd_ts_action_msb_get, + bcmpkt_txpmd_ts_type_get, + bcmpkt_txpmd_dst_subport_num_get, + bcmpkt_txpmd_udp_checksum_update_enable_get, + bcmpkt_txpmd_udp_checksum_offset_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_copy_to_debug_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56690_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + NULL, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + NULL, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + bcmpkt_txpmd_unicast_pkt_set, + bcmpkt_txpmd_ts_action_lsb_set, + bcmpkt_txpmd_ts_action_msb_set, + bcmpkt_txpmd_ts_type_set, + bcmpkt_txpmd_dst_subport_num_set, + bcmpkt_txpmd_udp_checksum_update_enable_set, + bcmpkt_txpmd_udp_checksum_offset_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_copy_to_debug_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56690_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56690_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56690_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56690_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56690_a0_txpmd_view_infos; + info->view_types = bcm56690_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..1337f4d115d2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c @@ -0,0 +1,181 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides LBHDR access functions for BCM56780_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +const bcmpkt_lbhdr_fget_t bcm56780_a0_lbhdr_fget = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56780_a0_lbhdr_fset = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56780_a0_lbhdr_figet = { + { + NULL + } +}; + +static shr_enum_map_t bcm56780_a0_lbhdr_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56780_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56780_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56780_a0_lbhdr_view_infos; + info->view_types = bcm56780_a0_lbhdr_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..9449bce00cb4 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c @@ -0,0 +1,571 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides RXPMD access functions for BCM56780_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 576 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 2, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 2, 6); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 8, 8, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 8, 8); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 28, 1, val == 0); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[3], 28, 1) == 0); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_match_id_lo_set(uint32_t *data, uint32_t val) +{ + data[2] = val; +} + +static uint32_t bcmpkt_rxpmd_match_id_lo_get(uint32_t *data) +{ + uint32_t val; + val = data[2]; + return val; +} + +static void bcmpkt_rxpmd_match_id_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_match_id_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mpb_flex_data_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 7, val); +} + +static uint32_t bcmpkt_rxpmd_mpb_flex_data_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 7); + return val; +} + +static void bcmpkt_rxpmd_int_cn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_int_cn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_cng_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 18, 2, val); +} + +static uint32_t bcmpkt_rxpmd_cng_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 18, 2); + return val; +} + +static void bcmpkt_rxpmd_egr_zone_remap_ctrl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 24, 4, val); +} + +static uint32_t bcmpkt_rxpmd_egr_zone_remap_ctrl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 24, 4); + return val; +} + +static void bcmpkt_rxpmd_dma_header_version_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 0, 2, val); +} + +static uint32_t bcmpkt_rxpmd_dma_header_version_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 0, 2); + return val; +} + +static void bcmpkt_rxpmd_multicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 20, 1, val); +} + +static uint32_t bcmpkt_rxpmd_multicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 20, 1); + return val; +} + +static void bcmpkt_rxpmd_copy_to_cpu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 22, 1, val); +} + +static uint32_t bcmpkt_rxpmd_copy_to_cpu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 22, 1); + return val; +} + +static void bcmpkt_rxpmd_truncate_cpu_copy_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 23, 1, val); +} + +static uint32_t bcmpkt_rxpmd_truncate_cpu_copy_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 23, 1); + return val; +} + +static void bcmpkt_rxpmd_dop_trigger_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 7, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dop_trigger_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 7, 1); + return val; +} + +static void bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 4, val); +} + +static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 4); + return val; +} + +static void bcmpkt_rxpmd_eparse_extract_offsets_7_4_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 12, 4, val); +} + +static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_7_4_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 12, 4); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 18; +} + +static uint32_t bcmpkt_rxpmd_i_flex_data_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 4; + return 14; +} + +void bcm56780_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56780_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +void bcm56780_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56780_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56780_a0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + bcmpkt_rxpmd_match_id_lo_get, + bcmpkt_rxpmd_match_id_hi_get, + bcmpkt_rxpmd_mpb_flex_data_type_get, + bcmpkt_rxpmd_int_cn_get, + bcmpkt_rxpmd_cng_get, + bcmpkt_rxpmd_egr_zone_remap_ctrl_get, + bcmpkt_rxpmd_dma_header_version_get, + bcmpkt_rxpmd_multicast_get, + bcmpkt_rxpmd_copy_to_cpu_get, + bcmpkt_rxpmd_truncate_cpu_copy_get, + NULL, + bcmpkt_rxpmd_dop_trigger_get, + bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get, + bcmpkt_rxpmd_eparse_extract_offsets_7_4_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56780_a0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + bcmpkt_rxpmd_match_id_lo_set, + bcmpkt_rxpmd_match_id_hi_set, + bcmpkt_rxpmd_mpb_flex_data_type_set, + bcmpkt_rxpmd_int_cn_set, + bcmpkt_rxpmd_cng_set, + bcmpkt_rxpmd_egr_zone_remap_ctrl_set, + bcmpkt_rxpmd_dma_header_version_set, + bcmpkt_rxpmd_multicast_set, + bcmpkt_rxpmd_copy_to_cpu_set, + bcmpkt_rxpmd_truncate_cpu_copy_set, + NULL, + bcmpkt_rxpmd_dop_trigger_set, + bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set, + bcmpkt_rxpmd_eparse_extract_offsets_7_4_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56780_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + NULL, + NULL, + bcmpkt_rxpmd_i_flex_data_get + } +}; + +static shr_enum_map_t bcm56780_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56780_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56780_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56780_a0_rxpmd_view_infos; + info->view_types = bcm56780_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c new file mode 100644 index 000000000000..e860a841cb73 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c @@ -0,0 +1,95 @@ +/*! \file bcm56780_a0_pkt_rxpmd_field.c + * + * This file provides RXPMD access functions for BCM56780_A0. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +int bcm56780_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t *val) +{ + uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + if (diff == 31) { + *val = data[index]; + } else if (diff < 31) { + *val = WORD_FIELD_GET(data[index], low_bit, diff+1); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} + +int bcm56780_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t val) +{ + uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + if (diff == 31) { + data[index] = val; + } else if (diff < 31) { + WORD_FIELD_SET(data[index], low_bit, diff+1, val); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c new file mode 100644 index 000000000000..2a78f6b96a53 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c @@ -0,0 +1,527 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides TXPMD access functions for BCM56780_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 11, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 11, 14); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 9, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 9); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 7, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 7, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static void bcmpkt_txpmd_unicast_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 13, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 13, 1); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56780_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + NULL, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + NULL, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + bcmpkt_txpmd_unicast_pkt_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56780_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + NULL, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + NULL, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + bcmpkt_txpmd_unicast_pkt_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56780_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56780_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56780_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56780_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56780_a0_txpmd_view_infos; + info->view_types = bcm56780_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..97c1234d65f2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c @@ -0,0 +1,181 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides LBHDR access functions for BCM56880_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +const bcmpkt_lbhdr_fget_t bcm56880_a0_lbhdr_fget = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56880_a0_lbhdr_fset = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56880_a0_lbhdr_figet = { + { + NULL + } +}; + +static shr_enum_map_t bcm56880_a0_lbhdr_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56880_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56880_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56880_a0_lbhdr_view_infos; + info->view_types = bcm56880_a0_lbhdr_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..5d5538534e75 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c @@ -0,0 +1,535 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides RXPMD access functions for BCM56880_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 576 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 2, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 2, 6); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 8, 8, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 8, 8); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 17, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 17, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 28, 1, val == 0); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[3], 28, 1) == 0); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_match_id_lo_set(uint32_t *data, uint32_t val) +{ + data[2] = val; +} + +static uint32_t bcmpkt_rxpmd_match_id_lo_get(uint32_t *data) +{ + uint32_t val; + val = data[2]; + return val; +} + +static void bcmpkt_rxpmd_match_id_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_match_id_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mpb_flex_data_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 7, val); +} + +static uint32_t bcmpkt_rxpmd_mpb_flex_data_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 7); + return val; +} + +static void bcmpkt_rxpmd_int_cn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 2, val); +} + +static uint32_t bcmpkt_rxpmd_int_cn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 2); + return val; +} + +static void bcmpkt_rxpmd_cng_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 2, val); +} + +static uint32_t bcmpkt_rxpmd_cng_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 2); + return val; +} + +static void bcmpkt_rxpmd_egr_zone_remap_ctrl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 24, 4, val); +} + +static uint32_t bcmpkt_rxpmd_egr_zone_remap_ctrl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 24, 4); + return val; +} + +static void bcmpkt_rxpmd_dma_header_version_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 0, 2, val); +} + +static uint32_t bcmpkt_rxpmd_dma_header_version_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 0, 2); + return val; +} + +static void bcmpkt_rxpmd_multicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_multicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 16, 1); + return val; +} + +static void bcmpkt_rxpmd_copy_to_cpu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 20, 1, val); +} + +static uint32_t bcmpkt_rxpmd_copy_to_cpu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 20, 1); + return val; +} + +static void bcmpkt_rxpmd_truncate_cpu_copy_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_truncate_cpu_copy_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 21, 1); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 18; +} + +static uint32_t bcmpkt_rxpmd_i_flex_data_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 4; + return 13; +} + +void bcm56880_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56880_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +void bcm56880_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56880_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56880_a0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + bcmpkt_rxpmd_match_id_lo_get, + bcmpkt_rxpmd_match_id_hi_get, + bcmpkt_rxpmd_mpb_flex_data_type_get, + bcmpkt_rxpmd_int_cn_get, + bcmpkt_rxpmd_cng_get, + bcmpkt_rxpmd_egr_zone_remap_ctrl_get, + bcmpkt_rxpmd_dma_header_version_get, + bcmpkt_rxpmd_multicast_get, + bcmpkt_rxpmd_copy_to_cpu_get, + bcmpkt_rxpmd_truncate_cpu_copy_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56880_a0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + bcmpkt_rxpmd_match_id_lo_set, + bcmpkt_rxpmd_match_id_hi_set, + bcmpkt_rxpmd_mpb_flex_data_type_set, + bcmpkt_rxpmd_int_cn_set, + bcmpkt_rxpmd_cng_set, + bcmpkt_rxpmd_egr_zone_remap_ctrl_set, + bcmpkt_rxpmd_dma_header_version_set, + bcmpkt_rxpmd_multicast_set, + bcmpkt_rxpmd_copy_to_cpu_set, + bcmpkt_rxpmd_truncate_cpu_copy_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56880_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + NULL, + NULL, + bcmpkt_rxpmd_i_flex_data_get + } +}; + +static shr_enum_map_t bcm56880_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56880_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56880_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56880_a0_rxpmd_view_infos; + info->view_types = bcm56880_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c new file mode 100644 index 000000000000..2baed2401029 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c @@ -0,0 +1,95 @@ +/*! \file bcm56880_a0_pkt_rxpmd_field.c + * + * This file provides RXPMD access functions for BCM56880_A0. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +int bcm56880_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t *val) +{ + uint32_t hdr_words = 13; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + if (diff == 31) { + *val = data[index]; + } else if (diff < 31) { + *val = WORD_FIELD_GET(data[index], low_bit, diff+1); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} + +int bcm56880_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t val) +{ + uint32_t hdr_words = 13; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + if (diff == 31) { + data[index] = val; + } else if (diff < 31) { + WORD_FIELD_SET(data[index], low_bit, diff+1, val); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c new file mode 100644 index 000000000000..73e94d4efc02 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c @@ -0,0 +1,527 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides TXPMD access functions for BCM56880_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 7, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 7, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static void bcmpkt_txpmd_unicast_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 13, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 13, 1); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56880_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + NULL, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + NULL, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + bcmpkt_txpmd_unicast_pkt_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56880_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + NULL, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + NULL, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + bcmpkt_txpmd_unicast_pkt_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56880_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56880_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56880_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56880_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56880_a0_txpmd_view_infos; + info->view_types = bcm56880_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..435fedc94306 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c @@ -0,0 +1,181 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides LBHDR access functions for BCM56890_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +const bcmpkt_lbhdr_fget_t bcm56890_a0_lbhdr_fget = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56890_a0_lbhdr_fset = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56890_a0_lbhdr_figet = { + { + NULL + } +}; + +static shr_enum_map_t bcm56890_a0_lbhdr_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56890_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56890_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56890_a0_lbhdr_view_infos; + info->view_types = bcm56890_a0_lbhdr_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..6e1c8c1984bf --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c @@ -0,0 +1,559 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides RXPMD access functions for BCM56890_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 576 + ******************************************************************************/ +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 2, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 2, 6); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 23, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 23, 9); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 13, 1, val == 0); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[0], 13, 1) == 0); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_mpb_flex_data_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 1, 6, val); +} + +static uint32_t bcmpkt_rxpmd_mpb_flex_data_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 1, 6); + return val; +} + +static void bcmpkt_rxpmd_int_cn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_int_cn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_cng_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 18, 2, val); +} + +static uint32_t bcmpkt_rxpmd_cng_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 18, 2); + return val; +} + +static void bcmpkt_rxpmd_egr_zone_remap_ctrl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 9, 4, val); +} + +static uint32_t bcmpkt_rxpmd_egr_zone_remap_ctrl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 9, 4); + return val; +} + +static void bcmpkt_rxpmd_dma_header_version_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 0, 2, val); +} + +static uint32_t bcmpkt_rxpmd_dma_header_version_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 0, 2); + return val; +} + +static void bcmpkt_rxpmd_multicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 20, 1, val); +} + +static uint32_t bcmpkt_rxpmd_multicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 20, 1); + return val; +} + +static void bcmpkt_rxpmd_copy_to_cpu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 22, 1, val); +} + +static uint32_t bcmpkt_rxpmd_copy_to_cpu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 22, 1); + return val; +} + +static void bcmpkt_rxpmd_truncate_cpu_copy_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 8, 1, val); +} + +static uint32_t bcmpkt_rxpmd_truncate_cpu_copy_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 8, 1); + return val; +} + +static void bcmpkt_rxpmd_dop_trigger_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 7, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dop_trigger_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 7, 1); + return val; +} + +static void bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 4, val); +} + +static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 4); + return val; +} + +static void bcmpkt_rxpmd_eparse_extract_offsets_6_4_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 12, 3, val); +} + +static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_6_4_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 12, 3); + return val; +} + +static void bcmpkt_rxpmd_arc_id_lo_set(uint32_t *data, uint32_t val) +{ + data[2] = val; +} + +static uint32_t bcmpkt_rxpmd_arc_id_lo_get(uint32_t *data) +{ + uint32_t val; + val = data[2]; + return val; +} + +static void bcmpkt_rxpmd_arc_id_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_arc_id_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 0, 16); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 18; +} + +static uint32_t bcmpkt_rxpmd_i_flex_data_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 4; + return 14; +} + +void bcm56890_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56890_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +void bcm56890_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56890_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56890_a0_rxpmd_fget = { + { + NULL, + bcmpkt_rxpmd_queue_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + bcmpkt_rxpmd_mpb_flex_data_type_get, + bcmpkt_rxpmd_int_cn_get, + bcmpkt_rxpmd_cng_get, + bcmpkt_rxpmd_egr_zone_remap_ctrl_get, + bcmpkt_rxpmd_dma_header_version_get, + bcmpkt_rxpmd_multicast_get, + bcmpkt_rxpmd_copy_to_cpu_get, + bcmpkt_rxpmd_truncate_cpu_copy_get, + NULL, + bcmpkt_rxpmd_dop_trigger_get, + bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_eparse_extract_offsets_6_4_get, + NULL, + bcmpkt_rxpmd_arc_id_lo_get, + bcmpkt_rxpmd_arc_id_hi_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56890_a0_rxpmd_fset = { + { + NULL, + bcmpkt_rxpmd_queue_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + bcmpkt_rxpmd_mpb_flex_data_type_set, + bcmpkt_rxpmd_int_cn_set, + bcmpkt_rxpmd_cng_set, + bcmpkt_rxpmd_egr_zone_remap_ctrl_set, + bcmpkt_rxpmd_dma_header_version_set, + bcmpkt_rxpmd_multicast_set, + bcmpkt_rxpmd_copy_to_cpu_set, + bcmpkt_rxpmd_truncate_cpu_copy_set, + NULL, + bcmpkt_rxpmd_dop_trigger_set, + bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_eparse_extract_offsets_6_4_set, + NULL, + bcmpkt_rxpmd_arc_id_lo_set, + bcmpkt_rxpmd_arc_id_hi_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56890_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + NULL, + NULL, + bcmpkt_rxpmd_i_flex_data_get + } +}; + +static shr_enum_map_t bcm56890_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56890_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -2, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -1, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, + -2, -2, -2, -2, -2, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56890_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56890_a0_rxpmd_view_infos; + info->view_types = bcm56890_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c new file mode 100644 index 000000000000..131e8022a76d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c @@ -0,0 +1,107 @@ +/*! \file bcm56890_a0_pkt_rxpmd_field.c + * + * This file provides RXPMD access functions for BCM56890_A0. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include +#include +#include +#include + +#define BSL_LOG_MODULE BSL_LS_BCMPKT_FLEX_HDR + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +int bcm56890_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t *val) +{ + uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + /* Skip fields with minbit >= 448.*/ + if (minbit >= 448) { + return SHR_E_PARAM; + } + + if (diff == 31) { + *val = data[index]; + } else if (diff < 31) { + *val = WORD_FIELD_GET(data[index], low_bit, diff+1); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} + +int bcm56890_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t val) +{ + uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + /* Skip fields with minbit >= 448.*/ + if (minbit >= 448) { + return SHR_E_PARAM; + } + + if (diff == 31) { + data[index] = val; + } else if (diff < 31) { + WORD_FIELD_SET(data[index], low_bit, diff+1, val); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c new file mode 100644 index 000000000000..f76028c09ef5 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c @@ -0,0 +1,613 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides TXPMD access functions for BCM56890_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 31, 1, val & MASK(1)); + WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8)); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ; + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 6, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 6, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 13, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 13, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 23, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 23, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 21, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 21, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 19, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 19, 2); + return val; +} + +static void bcmpkt_txpmd_unicast_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 12, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 12, 1); + return val; +} + +static void bcmpkt_txpmd_ts_action_lsb_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ts_action_lsb_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ts_action_msb_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 21, 1, val); +} + +static uint32_t bcmpkt_txpmd_ts_action_msb_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 21, 1); + return val; +} + +static void bcmpkt_txpmd_ts_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 22, 1, val); +} + +static uint32_t bcmpkt_txpmd_ts_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 22, 1); + return val; +} + +static void bcmpkt_txpmd_dst_subport_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[0], 0, 1, (val >> 9) & MASK(1)); +} + +static uint32_t bcmpkt_txpmd_dst_subport_num_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 23, 9) | (WORD_FIELD_GET(data[0], 0, 1) << 9)) ; + return val; +} + +static void bcmpkt_txpmd_udp_checksum_update_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 1, 1, val); +} + +static uint32_t bcmpkt_txpmd_udp_checksum_update_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 1, 1); + return val; +} + +static void bcmpkt_txpmd_udp_checksum_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 2, 6, val); +} + +static uint32_t bcmpkt_txpmd_udp_checksum_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 2, 6); + return val; +} + +static void bcmpkt_txpmd_copy_to_debug_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 5, 1, val); +} + +static uint32_t bcmpkt_txpmd_copy_to_debug_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 5, 1); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56890_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + NULL, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + NULL, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + bcmpkt_txpmd_unicast_pkt_get, + bcmpkt_txpmd_ts_action_lsb_get, + bcmpkt_txpmd_ts_action_msb_get, + bcmpkt_txpmd_ts_type_get, + bcmpkt_txpmd_dst_subport_num_get, + bcmpkt_txpmd_udp_checksum_update_enable_get, + bcmpkt_txpmd_udp_checksum_offset_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_copy_to_debug_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56890_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + NULL, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + NULL, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + bcmpkt_txpmd_unicast_pkt_set, + bcmpkt_txpmd_ts_action_lsb_set, + bcmpkt_txpmd_ts_action_msb_set, + bcmpkt_txpmd_ts_type_set, + bcmpkt_txpmd_dst_subport_num_set, + bcmpkt_txpmd_udp_checksum_update_enable_set, + bcmpkt_txpmd_udp_checksum_offset_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_copy_to_debug_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56890_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56890_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56890_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56890_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56890_a0_txpmd_view_infos; + info->view_types = bcm56890_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..3fa7c9d881b2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c @@ -0,0 +1,604 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides LBHDR access functions for BCM56990_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 8, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 8); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 5, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 5); + return val; +} + +static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 20, 4, val); +} + +static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 20, 4); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 26, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 26, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 29, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 29, 1); + return val; +} + +static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 30, 2, val & MASK(2)); + WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14)); +} + +static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ; + return val; +} + +static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 11, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 11, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 15, 16, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 15, 16); + return val; +} + +static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 7, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 7, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 9, 12, val); +} + +static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 9, 12); + return val; +} + +static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 1, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 3, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 3, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 6, 8, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 6, 8); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 0, 9, val); +} + +static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 9); + return val; +} + +static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 0, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 9, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 2); + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 21, 11, val & MASK(11)); + WORD_FIELD_SET(data[1], 0, 2, (val >> 11) & MASK(2)); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 21, 11) | (WORD_FIELD_GET(data[1], 0, 2) << 11)) ; + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 2, 1, val); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 2, 1); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm56990_a0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + bcmpkt_lbhdr_input_priority_get, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + bcmpkt_lbhdr_source_get, + bcmpkt_lbhdr_source_type_get, + bcmpkt_lbhdr_trill_ac_cng_get, + bcmpkt_lbhdr_trill_ac_tc_get, + NULL, + bcmpkt_lbhdr_trill_nw_cng_get, + bcmpkt_lbhdr_trill_nw_tc_get, + bcmpkt_lbhdr_eth_dest_type_get, + bcmpkt_lbhdr_eth_dest_get, + bcmpkt_lbhdr_eth_dp_get, + bcmpkt_lbhdr_eth_ecmp_member_id_get, + bcmpkt_lbhdr_eth_int_cn_get, + bcmpkt_lbhdr_eth_int_pri_get, + bcmpkt_lbhdr_eth_mcast_lb_index_get, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_get, + bcmpkt_lbhdr_eth_pp_port_get, + bcmpkt_lbhdr_eth_qos_fields_vld_get, + bcmpkt_lbhdr_eth_routed_pkt_get, + bcmpkt_lbhdr_eth_subflow_type_get, + bcmpkt_lbhdr_ethernet_vrf_get, + bcmpkt_lbhdr_ethernet_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56990_a0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + bcmpkt_lbhdr_input_priority_set, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + bcmpkt_lbhdr_source_set, + bcmpkt_lbhdr_source_type_set, + bcmpkt_lbhdr_trill_ac_cng_set, + bcmpkt_lbhdr_trill_ac_tc_set, + NULL, + bcmpkt_lbhdr_trill_nw_cng_set, + bcmpkt_lbhdr_trill_nw_tc_set, + bcmpkt_lbhdr_eth_dest_type_set, + bcmpkt_lbhdr_eth_dest_set, + bcmpkt_lbhdr_eth_dp_set, + bcmpkt_lbhdr_eth_ecmp_member_id_set, + bcmpkt_lbhdr_eth_int_cn_set, + bcmpkt_lbhdr_eth_int_pri_set, + bcmpkt_lbhdr_eth_mcast_lb_index_set, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_set, + bcmpkt_lbhdr_eth_pp_port_set, + bcmpkt_lbhdr_eth_qos_fields_vld_set, + bcmpkt_lbhdr_eth_routed_pkt_set, + bcmpkt_lbhdr_eth_subflow_type_set, + bcmpkt_lbhdr_ethernet_vrf_set, + bcmpkt_lbhdr_ethernet_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56990_a0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm56990_a0_lbhdr_view_types[] = { + {"trill_nw", 1}, + {"trill_ac", 2}, + {"ethernet", 3}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56990_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56990_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56990_a0_lbhdr_view_infos; + info->view_types = bcm56990_a0_lbhdr_view_types; + info->view_type_get = bcmpkt_lbhdr_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..0163fd4ddca9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c @@ -0,0 +1,1099 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides RXPMD access functions for BCM56990_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 24, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 24, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 3, 8, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 3, 8); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 22, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 22, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 18, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 18, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 11, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 11, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 11, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 11, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 28, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 28, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 23, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 23, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 28, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 28, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 13, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 13, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 14, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 14, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 4, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 4, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 15, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 15, 13); + return val; +} + +static void bcmpkt_rxpmd_loopback_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 0, 3, val); +} + +static uint32_t bcmpkt_rxpmd_loopback_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 0, 3); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 1, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 1, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 18, 5, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 18, 5); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 15, 17, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 15, 17); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 30, 2); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 10; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 43 + ******************************************************************************/ +void bcm56990_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) { + WORD_FIELD_SET(data[1], 16, 2, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) { + WORD_FIELD_SET(data[1], 16, 2, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 23); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) { + WORD_FIELD_SET(data[1], 24, 3, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) { + WORD_FIELD_SET(data[1], 24, 3, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) { + WORD_FIELD_SET(data[1], 24, 3, 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) { + WORD_FIELD_SET(data[1], 24, 3, 4); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR)) { + WORD_FIELD_SET(data[1], 24, 3, 7); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 10); + } +} + +void bcm56990_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + + val = WORD_FIELD_GET(data[1], 16, 2); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val); + } + + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + + val = WORD_FIELD_GET(data[1], 24, 3); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val); + } + + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } +} + +void bcm56990_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56990_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56990_a0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + bcmpkt_rxpmd_timestamp_type_get, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + bcmpkt_rxpmd_loopback_packet_type_get, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + bcmpkt_rxpmd_dlb_id_valid_get, + bcmpkt_rxpmd_dlb_id_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56990_a0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + bcmpkt_rxpmd_timestamp_type_set, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + bcmpkt_rxpmd_loopback_packet_type_set, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + bcmpkt_rxpmd_dlb_id_valid_set, + bcmpkt_rxpmd_dlb_id_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56990_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm56990_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56990_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56990_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56990_a0_rxpmd_view_infos; + info->view_types = bcm56990_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c new file mode 100644 index 000000000000..bc93655d3e8d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c @@ -0,0 +1,540 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides TXPMD access functions for BCM56990_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 24, 8, val); +} + +static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 24, 8); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 31, 1, val & MASK(1)); + WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8)); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ; + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 8, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 8, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56990_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + bcmpkt_txpmd_ipcf_ptr_get, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56990_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + bcmpkt_txpmd_ipcf_ptr_set, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56990_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56990_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56990_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56990_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56990_a0_txpmd_view_infos; + info->view_types = bcm56990_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c new file mode 100644 index 000000000000..49ac1724fbe7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c @@ -0,0 +1,604 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides LBHDR access functions for BCM56990_B0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 8, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 8); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 5, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 5); + return val; +} + +static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 20, 4, val); +} + +static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 20, 4); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 26, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 26, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 29, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 29, 1); + return val; +} + +static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 30, 2, val & MASK(2)); + WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14)); +} + +static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ; + return val; +} + +static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 11, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 11, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 15, 16, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 15, 16); + return val; +} + +static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 7, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 7, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 9, 14, val); +} + +static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 9, 14); + return val; +} + +static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 1, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 3, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 3, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 6, 8, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 6, 8); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 0, 9, val); +} + +static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 9); + return val; +} + +static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 0, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 9, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 2); + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4)); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ; + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 4, 1, val); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 4, 1); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm56990_b0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + bcmpkt_lbhdr_input_priority_get, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + bcmpkt_lbhdr_source_get, + bcmpkt_lbhdr_source_type_get, + bcmpkt_lbhdr_trill_ac_cng_get, + bcmpkt_lbhdr_trill_ac_tc_get, + NULL, + bcmpkt_lbhdr_trill_nw_cng_get, + bcmpkt_lbhdr_trill_nw_tc_get, + bcmpkt_lbhdr_eth_dest_type_get, + bcmpkt_lbhdr_eth_dest_get, + bcmpkt_lbhdr_eth_dp_get, + bcmpkt_lbhdr_eth_ecmp_member_id_get, + bcmpkt_lbhdr_eth_int_cn_get, + bcmpkt_lbhdr_eth_int_pri_get, + bcmpkt_lbhdr_eth_mcast_lb_index_get, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_get, + bcmpkt_lbhdr_eth_pp_port_get, + bcmpkt_lbhdr_eth_qos_fields_vld_get, + bcmpkt_lbhdr_eth_routed_pkt_get, + bcmpkt_lbhdr_eth_subflow_type_get, + bcmpkt_lbhdr_ethernet_vrf_get, + bcmpkt_lbhdr_ethernet_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56990_b0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + bcmpkt_lbhdr_input_priority_set, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + bcmpkt_lbhdr_source_set, + bcmpkt_lbhdr_source_type_set, + bcmpkt_lbhdr_trill_ac_cng_set, + bcmpkt_lbhdr_trill_ac_tc_set, + NULL, + bcmpkt_lbhdr_trill_nw_cng_set, + bcmpkt_lbhdr_trill_nw_tc_set, + bcmpkt_lbhdr_eth_dest_type_set, + bcmpkt_lbhdr_eth_dest_set, + bcmpkt_lbhdr_eth_dp_set, + bcmpkt_lbhdr_eth_ecmp_member_id_set, + bcmpkt_lbhdr_eth_int_cn_set, + bcmpkt_lbhdr_eth_int_pri_set, + bcmpkt_lbhdr_eth_mcast_lb_index_set, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_set, + bcmpkt_lbhdr_eth_pp_port_set, + bcmpkt_lbhdr_eth_qos_fields_vld_set, + bcmpkt_lbhdr_eth_routed_pkt_set, + bcmpkt_lbhdr_eth_subflow_type_set, + bcmpkt_lbhdr_ethernet_vrf_set, + bcmpkt_lbhdr_ethernet_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56990_b0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm56990_b0_lbhdr_view_types[] = { + {"trill_nw", 1}, + {"trill_ac", 2}, + {"ethernet", 3}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56990_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56990_b0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56990_b0_lbhdr_view_infos; + info->view_types = bcm56990_b0_lbhdr_view_types; + info->view_type_get = bcmpkt_lbhdr_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c new file mode 100644 index 000000000000..53e9c9e23532 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c @@ -0,0 +1,1123 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides RXPMD access functions for BCM56990_B0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 24, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 24, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 3, 8, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 3, 8); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 22, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 22, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 18, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 18, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 11, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 11, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 11, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 11, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 28, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 28, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 2, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 2, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 1, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 1, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 23, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 23, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 13, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 13, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 14, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 14, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 4, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 4, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 13); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 1, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 1, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 18, 5, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 18, 5); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 15, 17, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 15, 17); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 16, 1); + return val; +} + +static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 15, 15, val); +} + +static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 15, 15); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 10; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 45 + ******************************************************************************/ +void bcm56990_b0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) { + WORD_FIELD_SET(data[1], 16, 2, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) { + WORD_FIELD_SET(data[1], 16, 2, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 23); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) { + WORD_FIELD_SET(data[1], 24, 3, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) { + WORD_FIELD_SET(data[1], 24, 3, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) { + WORD_FIELD_SET(data[1], 24, 3, 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) { + WORD_FIELD_SET(data[1], 24, 3, 4); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR)) { + WORD_FIELD_SET(data[1], 24, 3, 7); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { + data[0] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { + data[0] |= (0x1 << 12); + } +} + +void bcm56990_b0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + + val = WORD_FIELD_GET(data[1], 16, 2); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val); + } + + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + + val = WORD_FIELD_GET(data[1], 24, 3); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val); + } + + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } + if (data[0] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); + } + if (data[0] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); + } +} + +void bcm56990_b0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56990_b0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56990_b0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + bcmpkt_rxpmd_timestamp_type_get, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + NULL, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + bcmpkt_rxpmd_dlb_id_valid_get, + bcmpkt_rxpmd_dlb_id_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_get, + bcmpkt_rxpmd_o_nhi_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56990_b0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + bcmpkt_rxpmd_timestamp_type_set, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + NULL, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + bcmpkt_rxpmd_dlb_id_valid_set, + bcmpkt_rxpmd_dlb_id_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_set, + bcmpkt_rxpmd_o_nhi_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56990_b0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm56990_b0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56990_b0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56990_b0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56990_b0_rxpmd_view_infos; + info->view_types = bcm56990_b0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c new file mode 100644 index 000000000000..d8d86e8770ce --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c @@ -0,0 +1,540 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides TXPMD access functions for BCM56990_B0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 24, 8, val); +} + +static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 24, 8); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 31, 1, val & MASK(1)); + WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8)); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ; + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 8, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 8, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56990_b0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + bcmpkt_txpmd_ipcf_ptr_get, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56990_b0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + bcmpkt_txpmd_ipcf_ptr_set, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56990_b0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56990_b0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56990_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56990_b0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56990_b0_txpmd_view_infos; + info->view_types = bcm56990_b0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..4b1249b92617 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c @@ -0,0 +1,604 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides LBHDR access functions for BCM56996_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 8, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 8); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 5, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 5); + return val; +} + +static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 20, 4, val); +} + +static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 20, 4); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 26, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 26, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 29, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 29, 1); + return val; +} + +static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 30, 2, val & MASK(2)); + WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14)); +} + +static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ; + return val; +} + +static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 11, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 11, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 15, 16, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 15, 16); + return val; +} + +static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 7, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 7, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 9, 14, val); +} + +static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 9, 14); + return val; +} + +static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 1, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 3, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 3, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 6, 8, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 6, 8); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 0, 9, val); +} + +static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 9); + return val; +} + +static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 0, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 9, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 2); + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4)); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ; + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 4, 1, val); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 4, 1); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm56996_a0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + bcmpkt_lbhdr_input_priority_get, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + bcmpkt_lbhdr_source_get, + bcmpkt_lbhdr_source_type_get, + bcmpkt_lbhdr_trill_ac_cng_get, + bcmpkt_lbhdr_trill_ac_tc_get, + NULL, + bcmpkt_lbhdr_trill_nw_cng_get, + bcmpkt_lbhdr_trill_nw_tc_get, + bcmpkt_lbhdr_eth_dest_type_get, + bcmpkt_lbhdr_eth_dest_get, + bcmpkt_lbhdr_eth_dp_get, + bcmpkt_lbhdr_eth_ecmp_member_id_get, + bcmpkt_lbhdr_eth_int_cn_get, + bcmpkt_lbhdr_eth_int_pri_get, + bcmpkt_lbhdr_eth_mcast_lb_index_get, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_get, + bcmpkt_lbhdr_eth_pp_port_get, + bcmpkt_lbhdr_eth_qos_fields_vld_get, + bcmpkt_lbhdr_eth_routed_pkt_get, + bcmpkt_lbhdr_eth_subflow_type_get, + bcmpkt_lbhdr_ethernet_vrf_get, + bcmpkt_lbhdr_ethernet_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56996_a0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + bcmpkt_lbhdr_input_priority_set, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + bcmpkt_lbhdr_source_set, + bcmpkt_lbhdr_source_type_set, + bcmpkt_lbhdr_trill_ac_cng_set, + bcmpkt_lbhdr_trill_ac_tc_set, + NULL, + bcmpkt_lbhdr_trill_nw_cng_set, + bcmpkt_lbhdr_trill_nw_tc_set, + bcmpkt_lbhdr_eth_dest_type_set, + bcmpkt_lbhdr_eth_dest_set, + bcmpkt_lbhdr_eth_dp_set, + bcmpkt_lbhdr_eth_ecmp_member_id_set, + bcmpkt_lbhdr_eth_int_cn_set, + bcmpkt_lbhdr_eth_int_pri_set, + bcmpkt_lbhdr_eth_mcast_lb_index_set, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_set, + bcmpkt_lbhdr_eth_pp_port_set, + bcmpkt_lbhdr_eth_qos_fields_vld_set, + bcmpkt_lbhdr_eth_routed_pkt_set, + bcmpkt_lbhdr_eth_subflow_type_set, + bcmpkt_lbhdr_ethernet_vrf_set, + bcmpkt_lbhdr_ethernet_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56996_a0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm56996_a0_lbhdr_view_types[] = { + {"trill_nw", 1}, + {"trill_ac", 2}, + {"ethernet", 3}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56996_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56996_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56996_a0_lbhdr_view_infos; + info->view_types = bcm56996_a0_lbhdr_view_types; + info->view_type_get = bcmpkt_lbhdr_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..27201c56ee22 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c @@ -0,0 +1,1123 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides RXPMD access functions for BCM56996_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 24, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 24, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 3, 8, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 3, 8); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 22, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 22, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 18, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 18, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 11, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 11, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 11, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 11, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 28, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 28, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 2, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 2, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 1, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 1, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 23, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 23, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 13, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 13, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 14, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 14, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 4, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 4, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 13); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 1, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 1, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 18, 5, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 18, 5); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 15, 17, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 15, 17); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 16, 1); + return val; +} + +static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 15, 15, val); +} + +static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 15, 15); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 10; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 45 + ******************************************************************************/ +void bcm56996_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) { + WORD_FIELD_SET(data[1], 16, 2, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) { + WORD_FIELD_SET(data[1], 16, 2, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 23); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) { + WORD_FIELD_SET(data[1], 24, 3, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) { + WORD_FIELD_SET(data[1], 24, 3, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) { + WORD_FIELD_SET(data[1], 24, 3, 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) { + WORD_FIELD_SET(data[1], 24, 3, 4); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR)) { + WORD_FIELD_SET(data[1], 24, 3, 7); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { + data[0] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { + data[0] |= (0x1 << 12); + } +} + +void bcm56996_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + + val = WORD_FIELD_GET(data[1], 16, 2); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val); + } + + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + + val = WORD_FIELD_GET(data[1], 24, 3); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val); + } + + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } + if (data[0] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); + } + if (data[0] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); + } +} + +void bcm56996_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56996_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56996_a0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + bcmpkt_rxpmd_timestamp_type_get, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + NULL, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + bcmpkt_rxpmd_dlb_id_valid_get, + bcmpkt_rxpmd_dlb_id_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_get, + bcmpkt_rxpmd_o_nhi_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56996_a0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + bcmpkt_rxpmd_timestamp_type_set, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + NULL, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + bcmpkt_rxpmd_dlb_id_valid_set, + bcmpkt_rxpmd_dlb_id_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_set, + bcmpkt_rxpmd_o_nhi_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56996_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm56996_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56996_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56996_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56996_a0_rxpmd_view_infos; + info->view_types = bcm56996_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c new file mode 100644 index 000000000000..7ac67f73f999 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c @@ -0,0 +1,540 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides TXPMD access functions for BCM56996_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 24, 8, val); +} + +static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 24, 8); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 31, 1, val & MASK(1)); + WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8)); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ; + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 8, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 8, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56996_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + bcmpkt_txpmd_ipcf_ptr_get, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56996_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + bcmpkt_txpmd_ipcf_ptr_set, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56996_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56996_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56996_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56996_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56996_a0_txpmd_view_infos; + info->view_types = bcm56996_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c new file mode 100644 index 000000000000..12dc7734cba7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c @@ -0,0 +1,604 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides LBHDR access functions for BCM56996_B0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 8, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 8); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 5, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 5); + return val; +} + +static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 20, 4, val); +} + +static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 20, 4); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 26, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 26, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 29, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 29, 1); + return val; +} + +static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 30, 2, val & MASK(2)); + WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14)); +} + +static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ; + return val; +} + +static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 11, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 11, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 15, 16, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 15, 16); + return val; +} + +static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 7, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 7, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 9, 14, val); +} + +static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 9, 14); + return val; +} + +static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 1, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 3, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 3, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 6, 8, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 6, 8); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 0, 9, val); +} + +static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 9); + return val; +} + +static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 0, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 9, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 2); + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4)); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ; + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 4, 1, val); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 4, 1); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm56996_b0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + bcmpkt_lbhdr_input_priority_get, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + bcmpkt_lbhdr_source_get, + bcmpkt_lbhdr_source_type_get, + bcmpkt_lbhdr_trill_ac_cng_get, + bcmpkt_lbhdr_trill_ac_tc_get, + NULL, + bcmpkt_lbhdr_trill_nw_cng_get, + bcmpkt_lbhdr_trill_nw_tc_get, + bcmpkt_lbhdr_eth_dest_type_get, + bcmpkt_lbhdr_eth_dest_get, + bcmpkt_lbhdr_eth_dp_get, + bcmpkt_lbhdr_eth_ecmp_member_id_get, + bcmpkt_lbhdr_eth_int_cn_get, + bcmpkt_lbhdr_eth_int_pri_get, + bcmpkt_lbhdr_eth_mcast_lb_index_get, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_get, + bcmpkt_lbhdr_eth_pp_port_get, + bcmpkt_lbhdr_eth_qos_fields_vld_get, + bcmpkt_lbhdr_eth_routed_pkt_get, + bcmpkt_lbhdr_eth_subflow_type_get, + bcmpkt_lbhdr_ethernet_vrf_get, + bcmpkt_lbhdr_ethernet_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56996_b0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + bcmpkt_lbhdr_input_priority_set, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + bcmpkt_lbhdr_source_set, + bcmpkt_lbhdr_source_type_set, + bcmpkt_lbhdr_trill_ac_cng_set, + bcmpkt_lbhdr_trill_ac_tc_set, + NULL, + bcmpkt_lbhdr_trill_nw_cng_set, + bcmpkt_lbhdr_trill_nw_tc_set, + bcmpkt_lbhdr_eth_dest_type_set, + bcmpkt_lbhdr_eth_dest_set, + bcmpkt_lbhdr_eth_dp_set, + bcmpkt_lbhdr_eth_ecmp_member_id_set, + bcmpkt_lbhdr_eth_int_cn_set, + bcmpkt_lbhdr_eth_int_pri_set, + bcmpkt_lbhdr_eth_mcast_lb_index_set, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_set, + bcmpkt_lbhdr_eth_pp_port_set, + bcmpkt_lbhdr_eth_qos_fields_vld_set, + bcmpkt_lbhdr_eth_routed_pkt_set, + bcmpkt_lbhdr_eth_subflow_type_set, + bcmpkt_lbhdr_ethernet_vrf_set, + bcmpkt_lbhdr_ethernet_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56996_b0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm56996_b0_lbhdr_view_types[] = { + {"trill_nw", 1}, + {"trill_ac", 2}, + {"ethernet", 3}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56996_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56996_b0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56996_b0_lbhdr_view_infos; + info->view_types = bcm56996_b0_lbhdr_view_types; + info->view_type_get = bcmpkt_lbhdr_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c new file mode 100644 index 000000000000..3ec995e60a40 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c @@ -0,0 +1,1123 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides RXPMD access functions for BCM56996_B0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 24, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 24, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 3, 8, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 3, 8); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 22, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 22, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 18, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 18, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 11, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 11, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 11, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 11, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 28, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 28, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 2, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 2, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 1, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 1, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 23, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 23, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 13, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 13, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 14, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 14, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 4, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 4, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 13); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 1, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 1, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 18, 5, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 18, 5); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 15, 17, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 15, 17); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 16, 1); + return val; +} + +static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 15, 15, val); +} + +static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 15, 15); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 10; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 45 + ******************************************************************************/ +void bcm56996_b0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) { + WORD_FIELD_SET(data[1], 16, 2, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) { + WORD_FIELD_SET(data[1], 16, 2, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 23); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) { + WORD_FIELD_SET(data[1], 24, 3, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) { + WORD_FIELD_SET(data[1], 24, 3, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) { + WORD_FIELD_SET(data[1], 24, 3, 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) { + WORD_FIELD_SET(data[1], 24, 3, 4); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR)) { + WORD_FIELD_SET(data[1], 24, 3, 7); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { + data[0] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { + data[0] |= (0x1 << 12); + } +} + +void bcm56996_b0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + + val = WORD_FIELD_GET(data[1], 16, 2); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val); + } + + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + + val = WORD_FIELD_GET(data[1], 24, 3); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val); + } + + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } + if (data[0] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); + } + if (data[0] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); + } +} + +void bcm56996_b0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56996_b0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56996_b0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + bcmpkt_rxpmd_timestamp_type_get, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + NULL, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + bcmpkt_rxpmd_dlb_id_valid_get, + bcmpkt_rxpmd_dlb_id_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_get, + bcmpkt_rxpmd_o_nhi_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56996_b0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + bcmpkt_rxpmd_timestamp_type_set, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + NULL, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + bcmpkt_rxpmd_dlb_id_valid_set, + bcmpkt_rxpmd_dlb_id_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_set, + bcmpkt_rxpmd_o_nhi_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56996_b0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm56996_b0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56996_b0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56996_b0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56996_b0_rxpmd_view_infos; + info->view_types = bcm56996_b0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c new file mode 100644 index 000000000000..4cf357466584 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c @@ -0,0 +1,540 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides TXPMD access functions for BCM56996_B0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 24, 8, val); +} + +static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 24, 8); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 31, 1, val & MASK(1)); + WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8)); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ; + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 8, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 8, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56996_b0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + bcmpkt_txpmd_ipcf_ptr_get, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56996_b0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + bcmpkt_txpmd_ipcf_ptr_set, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56996_b0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56996_b0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56996_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56996_b0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56996_b0_txpmd_view_infos; + info->view_types = bcm56996_b0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..530e6f33934f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c @@ -0,0 +1,604 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides LBHDR access functions for BCM56998_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 8, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 8); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 5, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 5); + return val; +} + +static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 20, 4, val); +} + +static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 20, 4); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 26, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 26, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 29, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 29, 1); + return val; +} + +static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 30, 2, val & MASK(2)); + WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14)); +} + +static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ; + return val; +} + +static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 11, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 11, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 15, 16, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 15, 16); + return val; +} + +static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 7, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 7, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 9, 14, val); +} + +static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 9, 14); + return val; +} + +static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 1, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 3, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 3, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 6, 8, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 6, 8); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 0, 9, val); +} + +static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 9); + return val; +} + +static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 0, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 9, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 2); + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4)); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ; + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 4, 1, val); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 4, 1); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm56998_a0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + bcmpkt_lbhdr_input_priority_get, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + bcmpkt_lbhdr_source_get, + bcmpkt_lbhdr_source_type_get, + bcmpkt_lbhdr_trill_ac_cng_get, + bcmpkt_lbhdr_trill_ac_tc_get, + NULL, + bcmpkt_lbhdr_trill_nw_cng_get, + bcmpkt_lbhdr_trill_nw_tc_get, + bcmpkt_lbhdr_eth_dest_type_get, + bcmpkt_lbhdr_eth_dest_get, + bcmpkt_lbhdr_eth_dp_get, + bcmpkt_lbhdr_eth_ecmp_member_id_get, + bcmpkt_lbhdr_eth_int_cn_get, + bcmpkt_lbhdr_eth_int_pri_get, + bcmpkt_lbhdr_eth_mcast_lb_index_get, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_get, + bcmpkt_lbhdr_eth_pp_port_get, + bcmpkt_lbhdr_eth_qos_fields_vld_get, + bcmpkt_lbhdr_eth_routed_pkt_get, + bcmpkt_lbhdr_eth_subflow_type_get, + bcmpkt_lbhdr_ethernet_vrf_get, + bcmpkt_lbhdr_ethernet_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56998_a0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + bcmpkt_lbhdr_input_priority_set, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + bcmpkt_lbhdr_source_set, + bcmpkt_lbhdr_source_type_set, + bcmpkt_lbhdr_trill_ac_cng_set, + bcmpkt_lbhdr_trill_ac_tc_set, + NULL, + bcmpkt_lbhdr_trill_nw_cng_set, + bcmpkt_lbhdr_trill_nw_tc_set, + bcmpkt_lbhdr_eth_dest_type_set, + bcmpkt_lbhdr_eth_dest_set, + bcmpkt_lbhdr_eth_dp_set, + bcmpkt_lbhdr_eth_ecmp_member_id_set, + bcmpkt_lbhdr_eth_int_cn_set, + bcmpkt_lbhdr_eth_int_pri_set, + bcmpkt_lbhdr_eth_mcast_lb_index_set, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_set, + bcmpkt_lbhdr_eth_pp_port_set, + bcmpkt_lbhdr_eth_qos_fields_vld_set, + bcmpkt_lbhdr_eth_routed_pkt_set, + bcmpkt_lbhdr_eth_subflow_type_set, + bcmpkt_lbhdr_ethernet_vrf_set, + bcmpkt_lbhdr_ethernet_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56998_a0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm56998_a0_lbhdr_view_types[] = { + {"trill_nw", 1}, + {"trill_ac", 2}, + {"ethernet", 3}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56998_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56998_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56998_a0_lbhdr_view_infos; + info->view_types = bcm56998_a0_lbhdr_view_types; + info->view_type_get = bcmpkt_lbhdr_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..8b1ccb26e6b2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c @@ -0,0 +1,1153 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides RXPMD access functions for BCM56998_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 24, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 24, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 3, 8, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 3, 8); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 22, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 22, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 18, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 18, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 11, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 11, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 11, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 11, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 28, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 28, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 2, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 2, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 0, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 0, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 23, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 23, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 13, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 13, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 14, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 14, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 4, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 4, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 13); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 1, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 1, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 18, 5, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 18, 5); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 15, 17, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 15, 17); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 16, 1); + return val; +} + +static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 15, 15, val); +} + +static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 15, 15); + return val; +} + +static void bcmpkt_rxpmd_ieu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 0, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ieu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 0, 1); + return val; +} + +static void bcmpkt_rxpmd_ieu_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 1, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ieu_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 1, 1); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 10; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 46 + ******************************************************************************/ +void bcm56998_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) { + WORD_FIELD_SET(data[1], 16, 2, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) { + WORD_FIELD_SET(data[1], 16, 2, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 23); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) { + WORD_FIELD_SET(data[1], 24, 3, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) { + WORD_FIELD_SET(data[1], 24, 3, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) { + WORD_FIELD_SET(data[1], 24, 3, 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) { + WORD_FIELD_SET(data[1], 24, 3, 4); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR)) { + WORD_FIELD_SET(data[1], 24, 3, 7); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { + data[0] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { + data[0] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN)) { + data[0] |= (0x1 << 13); + } +} + +void bcm56998_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + + val = WORD_FIELD_GET(data[1], 16, 2); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val); + } + + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + + val = WORD_FIELD_GET(data[1], 24, 3); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val); + } + + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } + if (data[0] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); + } + if (data[0] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); + } + if (data[0] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN); + } +} + +void bcm56998_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56998_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56998_a0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + bcmpkt_rxpmd_timestamp_type_get, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + NULL, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + bcmpkt_rxpmd_dlb_id_valid_get, + bcmpkt_rxpmd_dlb_id_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_get, + bcmpkt_rxpmd_o_nhi_get, + bcmpkt_rxpmd_ieu_get, + bcmpkt_rxpmd_ieu_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56998_a0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + bcmpkt_rxpmd_timestamp_type_set, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + NULL, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + bcmpkt_rxpmd_dlb_id_valid_set, + bcmpkt_rxpmd_dlb_id_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_set, + bcmpkt_rxpmd_o_nhi_set, + bcmpkt_rxpmd_ieu_set, + bcmpkt_rxpmd_ieu_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56998_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm56998_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56998_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56998_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56998_a0_rxpmd_view_infos; + info->view_types = bcm56998_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c new file mode 100644 index 000000000000..779a1650c85c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c @@ -0,0 +1,540 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides TXPMD access functions for BCM56998_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 24, 8, val); +} + +static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 24, 8); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 31, 1, val & MASK(1)); + WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8)); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ; + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 8, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 8, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56998_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + bcmpkt_txpmd_ipcf_ptr_get, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56998_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + bcmpkt_txpmd_ipcf_ptr_set, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56998_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56998_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56998_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56998_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56998_a0_txpmd_view_infos; + info->view_types = bcm56998_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..a7bdc0769714 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c @@ -0,0 +1,604 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides LBHDR access functions for BCM56999_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 8, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 8); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 5, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 5); + return val; +} + +static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 20, 4, val); +} + +static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 20, 4); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 26, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 26, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 29, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 29, 1); + return val; +} + +static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 30, 2, val & MASK(2)); + WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14)); +} + +static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ; + return val; +} + +static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 11, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 11, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 15, 16, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 15, 16); + return val; +} + +static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 7, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 7, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 9, 14, val); +} + +static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 9, 14); + return val; +} + +static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 1, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 3, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 3, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 6, 8, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 6, 8); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 0, 9, val); +} + +static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 9); + return val; +} + +static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 0, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 9, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 2); + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4)); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ; + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 4, 1, val); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 4, 1); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm56999_a0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + bcmpkt_lbhdr_input_priority_get, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + bcmpkt_lbhdr_source_get, + bcmpkt_lbhdr_source_type_get, + bcmpkt_lbhdr_trill_ac_cng_get, + bcmpkt_lbhdr_trill_ac_tc_get, + NULL, + bcmpkt_lbhdr_trill_nw_cng_get, + bcmpkt_lbhdr_trill_nw_tc_get, + bcmpkt_lbhdr_eth_dest_type_get, + bcmpkt_lbhdr_eth_dest_get, + bcmpkt_lbhdr_eth_dp_get, + bcmpkt_lbhdr_eth_ecmp_member_id_get, + bcmpkt_lbhdr_eth_int_cn_get, + bcmpkt_lbhdr_eth_int_pri_get, + bcmpkt_lbhdr_eth_mcast_lb_index_get, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_get, + bcmpkt_lbhdr_eth_pp_port_get, + bcmpkt_lbhdr_eth_qos_fields_vld_get, + bcmpkt_lbhdr_eth_routed_pkt_get, + bcmpkt_lbhdr_eth_subflow_type_get, + bcmpkt_lbhdr_ethernet_vrf_get, + bcmpkt_lbhdr_ethernet_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56999_a0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + bcmpkt_lbhdr_input_priority_set, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + bcmpkt_lbhdr_source_set, + bcmpkt_lbhdr_source_type_set, + bcmpkt_lbhdr_trill_ac_cng_set, + bcmpkt_lbhdr_trill_ac_tc_set, + NULL, + bcmpkt_lbhdr_trill_nw_cng_set, + bcmpkt_lbhdr_trill_nw_tc_set, + bcmpkt_lbhdr_eth_dest_type_set, + bcmpkt_lbhdr_eth_dest_set, + bcmpkt_lbhdr_eth_dp_set, + bcmpkt_lbhdr_eth_ecmp_member_id_set, + bcmpkt_lbhdr_eth_int_cn_set, + bcmpkt_lbhdr_eth_int_pri_set, + bcmpkt_lbhdr_eth_mcast_lb_index_set, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_set, + bcmpkt_lbhdr_eth_pp_port_set, + bcmpkt_lbhdr_eth_qos_fields_vld_set, + bcmpkt_lbhdr_eth_routed_pkt_set, + bcmpkt_lbhdr_eth_subflow_type_set, + bcmpkt_lbhdr_ethernet_vrf_set, + bcmpkt_lbhdr_ethernet_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56999_a0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm56999_a0_lbhdr_view_types[] = { + {"trill_nw", 1}, + {"trill_ac", 2}, + {"ethernet", 3}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56999_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56999_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56999_a0_lbhdr_view_infos; + info->view_types = bcm56999_a0_lbhdr_view_types; + info->view_type_get = bcmpkt_lbhdr_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..fdd431831ff7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c @@ -0,0 +1,1123 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides RXPMD access functions for BCM56999_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 24, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 24, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 3, 8, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 3, 8); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 22, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 22, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 18, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 18, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 11, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 11, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 11, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 11, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 28, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 28, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 2, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 2, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 1, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 1, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 23, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 23, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 13, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 13, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 14, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 14, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 4, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 4, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 13); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 1, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 1, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 18, 5, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 18, 5); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 15, 17, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 15, 17); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 16, 1); + return val; +} + +static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 15, 15, val); +} + +static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 15, 15); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 10; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 45 + ******************************************************************************/ +void bcm56999_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) { + WORD_FIELD_SET(data[1], 16, 2, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) { + WORD_FIELD_SET(data[1], 16, 2, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 23); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) { + WORD_FIELD_SET(data[1], 24, 3, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) { + WORD_FIELD_SET(data[1], 24, 3, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) { + WORD_FIELD_SET(data[1], 24, 3, 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) { + WORD_FIELD_SET(data[1], 24, 3, 4); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR)) { + WORD_FIELD_SET(data[1], 24, 3, 7); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { + data[0] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { + data[0] |= (0x1 << 12); + } +} + +void bcm56999_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + + val = WORD_FIELD_GET(data[1], 16, 2); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val); + } + + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + + val = WORD_FIELD_GET(data[1], 24, 3); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val); + } + + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } + if (data[0] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); + } + if (data[0] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); + } +} + +void bcm56999_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56999_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56999_a0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + bcmpkt_rxpmd_timestamp_type_get, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + NULL, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + bcmpkt_rxpmd_dlb_id_valid_get, + bcmpkt_rxpmd_dlb_id_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_get, + bcmpkt_rxpmd_o_nhi_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56999_a0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + bcmpkt_rxpmd_timestamp_type_set, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + NULL, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + bcmpkt_rxpmd_dlb_id_valid_set, + bcmpkt_rxpmd_dlb_id_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_set, + bcmpkt_rxpmd_o_nhi_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56999_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm56999_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56999_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56999_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56999_a0_rxpmd_view_infos; + info->view_types = bcm56999_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c new file mode 100644 index 000000000000..525f34c0e67a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c @@ -0,0 +1,540 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides TXPMD access functions for BCM56999_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 24, 8, val); +} + +static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 24, 8); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 31, 1, val & MASK(1)); + WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8)); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ; + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 8, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 8, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56999_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + bcmpkt_txpmd_ipcf_ptr_get, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56999_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + bcmpkt_txpmd_ipcf_ptr_set, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56999_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56999_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56999_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56999_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56999_a0_txpmd_view_infos; + info->view_types = bcm56999_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..e977ea83fcd5 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c @@ -0,0 +1,181 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides LBHDR access functions for BCM78800_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +const bcmpkt_lbhdr_fget_t bcm78800_a0_lbhdr_fget = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm78800_a0_lbhdr_fset = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm78800_a0_lbhdr_figet = { + { + NULL + } +}; + +static shr_enum_map_t bcm78800_a0_lbhdr_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm78800_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm78800_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm78800_a0_lbhdr_view_infos; + info->view_types = bcm78800_a0_lbhdr_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..d2a5cf0bdb75 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd.c @@ -0,0 +1,559 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides RXPMD access functions for BCM78800_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 576 + ******************************************************************************/ +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 2, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 2, 6); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 23, 8, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 23, 8); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 13, 1, val == 0); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[0], 13, 1) == 0); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_mpb_flex_data_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 1, 6, val); +} + +static uint32_t bcmpkt_rxpmd_mpb_flex_data_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 1, 6); + return val; +} + +static void bcmpkt_rxpmd_int_cn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_int_cn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_cng_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 18, 2, val); +} + +static uint32_t bcmpkt_rxpmd_cng_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 18, 2); + return val; +} + +static void bcmpkt_rxpmd_egr_zone_remap_ctrl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 9, 4, val); +} + +static uint32_t bcmpkt_rxpmd_egr_zone_remap_ctrl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 9, 4); + return val; +} + +static void bcmpkt_rxpmd_dma_header_version_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 0, 2, val); +} + +static uint32_t bcmpkt_rxpmd_dma_header_version_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 0, 2); + return val; +} + +static void bcmpkt_rxpmd_multicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 20, 1, val); +} + +static uint32_t bcmpkt_rxpmd_multicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 20, 1); + return val; +} + +static void bcmpkt_rxpmd_copy_to_cpu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 22, 1, val); +} + +static uint32_t bcmpkt_rxpmd_copy_to_cpu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 22, 1); + return val; +} + +static void bcmpkt_rxpmd_truncate_cpu_copy_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 8, 1, val); +} + +static uint32_t bcmpkt_rxpmd_truncate_cpu_copy_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 8, 1); + return val; +} + +static void bcmpkt_rxpmd_dop_trigger_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 7, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dop_trigger_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 7, 1); + return val; +} + +static void bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 4, val); +} + +static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 4); + return val; +} + +static void bcmpkt_rxpmd_eparse_extract_offsets_6_4_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 12, 3, val); +} + +static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_6_4_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 12, 3); + return val; +} + +static void bcmpkt_rxpmd_arc_id_lo_set(uint32_t *data, uint32_t val) +{ + data[2] = val; +} + +static uint32_t bcmpkt_rxpmd_arc_id_lo_get(uint32_t *data) +{ + uint32_t val; + val = data[2]; + return val; +} + +static void bcmpkt_rxpmd_arc_id_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_arc_id_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 0, 16); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 18; +} + +static uint32_t bcmpkt_rxpmd_i_flex_data_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 4; + return 14; +} + +void bcm78800_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm78800_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +void bcm78800_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm78800_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm78800_a0_rxpmd_fget = { + { + NULL, + bcmpkt_rxpmd_queue_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + bcmpkt_rxpmd_mpb_flex_data_type_get, + bcmpkt_rxpmd_int_cn_get, + bcmpkt_rxpmd_cng_get, + bcmpkt_rxpmd_egr_zone_remap_ctrl_get, + bcmpkt_rxpmd_dma_header_version_get, + bcmpkt_rxpmd_multicast_get, + bcmpkt_rxpmd_copy_to_cpu_get, + bcmpkt_rxpmd_truncate_cpu_copy_get, + NULL, + bcmpkt_rxpmd_dop_trigger_get, + bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_eparse_extract_offsets_6_4_get, + NULL, + bcmpkt_rxpmd_arc_id_lo_get, + bcmpkt_rxpmd_arc_id_hi_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm78800_a0_rxpmd_fset = { + { + NULL, + bcmpkt_rxpmd_queue_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + bcmpkt_rxpmd_mpb_flex_data_type_set, + bcmpkt_rxpmd_int_cn_set, + bcmpkt_rxpmd_cng_set, + bcmpkt_rxpmd_egr_zone_remap_ctrl_set, + bcmpkt_rxpmd_dma_header_version_set, + bcmpkt_rxpmd_multicast_set, + bcmpkt_rxpmd_copy_to_cpu_set, + bcmpkt_rxpmd_truncate_cpu_copy_set, + NULL, + bcmpkt_rxpmd_dop_trigger_set, + bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_eparse_extract_offsets_6_4_set, + NULL, + bcmpkt_rxpmd_arc_id_lo_set, + bcmpkt_rxpmd_arc_id_hi_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm78800_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + NULL, + NULL, + bcmpkt_rxpmd_i_flex_data_get + } +}; + +static shr_enum_map_t bcm78800_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm78800_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -2, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -1, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, + -2, -2, -2, -2, -2, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm78800_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm78800_a0_rxpmd_view_infos; + info->view_types = bcm78800_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c new file mode 100644 index 000000000000..c9e685ec9687 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c @@ -0,0 +1,108 @@ +/*! \file bcm78800_a0_pkt_rxpmd_field.c + * + * This file provides RXPMD access functions for BCM78800_A0. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include +#include +#include +#include + +#define BSL_LOG_MODULE BSL_LS_BCMPKT_FLEX_HDR + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +int bcm78800_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t *val) +{ + uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + /* Skip fields with minbit >= 448.*/ + if (minbit >= 448) { + *val = 0; + return SHR_E_NONE; + } + + if (diff == 31) { + *val = data[index]; + } else if (diff < 31) { + *val = WORD_FIELD_GET(data[index], low_bit, diff+1); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} + +int bcm78800_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t val) +{ + uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + /* Skip fields with minbit >= 448.*/ + if (minbit >= 448) { + return SHR_E_PARAM; + } + + if (diff == 31) { + data[index] = val; + } else if (diff < 31) { + WORD_FIELD_SET(data[index], low_bit, diff+1, val); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c new file mode 100644 index 000000000000..76901a19f330 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c @@ -0,0 +1,659 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides TXPMD access functions for BCM78800_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 11, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 11, 14); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 9, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 9); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 7, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 7, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static void bcmpkt_txpmd_unicast_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 13, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 13, 1); + return val; +} + +static void bcmpkt_txpmd_ts_action_lsb_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ts_action_lsb_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ts_action_msb_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 21, 1, val); +} + +static uint32_t bcmpkt_txpmd_ts_action_msb_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 21, 1); + return val; +} + +static void bcmpkt_txpmd_ts_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 22, 1, val); +} + +static uint32_t bcmpkt_txpmd_ts_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 22, 1); + return val; +} + +static void bcmpkt_txpmd_dst_subport_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 23, 8, val); +} + +static uint32_t bcmpkt_txpmd_dst_subport_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 23, 8); + return val; +} + +static void bcmpkt_txpmd_udp_checksum_update_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 31, 1, val); +} + +static uint32_t bcmpkt_txpmd_udp_checksum_update_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 31, 1); + return val; +} + +static void bcmpkt_txpmd_udp_checksum_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 0, 6, val); +} + +static uint32_t bcmpkt_txpmd_udp_checksum_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 0, 6); + return val; +} + +static void bcmpkt_txpmd_cng_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 5, 2, val); +} + +static uint32_t bcmpkt_txpmd_cng_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 5, 2); + return val; +} + +static void bcmpkt_txpmd_wred_mark_eligible_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 3, 1, val); +} + +static uint32_t bcmpkt_txpmd_wred_mark_eligible_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 3, 1); + return val; +} + +static void bcmpkt_txpmd_copy_to_debug_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 26, 1, val); +} + +static uint32_t bcmpkt_txpmd_copy_to_debug_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 26, 1); + return val; +} + +static void bcmpkt_txpmd_copy_to_cpu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 25, 1, val); +} + +static uint32_t bcmpkt_txpmd_copy_to_cpu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 25, 1); + return val; +} + +static void bcmpkt_txpmd_wred_responsive_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 4, 1, val); +} + +static uint32_t bcmpkt_txpmd_wred_responsive_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 4, 1); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm78800_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + NULL, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + NULL, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + bcmpkt_txpmd_unicast_pkt_get, + bcmpkt_txpmd_ts_action_lsb_get, + bcmpkt_txpmd_ts_action_msb_get, + bcmpkt_txpmd_ts_type_get, + bcmpkt_txpmd_dst_subport_num_get, + bcmpkt_txpmd_udp_checksum_update_enable_get, + bcmpkt_txpmd_udp_checksum_offset_get, + bcmpkt_txpmd_cng_get, + NULL, + NULL, + bcmpkt_txpmd_wred_mark_eligible_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_copy_to_debug_get, + bcmpkt_txpmd_copy_to_cpu_get, + bcmpkt_txpmd_wred_responsive_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm78800_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + NULL, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + NULL, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + bcmpkt_txpmd_unicast_pkt_set, + bcmpkt_txpmd_ts_action_lsb_set, + bcmpkt_txpmd_ts_action_msb_set, + bcmpkt_txpmd_ts_type_set, + bcmpkt_txpmd_dst_subport_num_set, + bcmpkt_txpmd_udp_checksum_update_enable_set, + bcmpkt_txpmd_udp_checksum_offset_set, + bcmpkt_txpmd_cng_set, + NULL, + NULL, + bcmpkt_txpmd_wred_mark_eligible_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_copy_to_debug_set, + bcmpkt_txpmd_copy_to_cpu_set, + bcmpkt_txpmd_wred_responsive_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm78800_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm78800_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm78800_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm78800_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm78800_a0_txpmd_view_infos; + info->view_types = bcm78800_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c new file mode 100644 index 000000000000..3e601cc5659e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c @@ -0,0 +1,359 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides LBHDR access functions for BCM78900_B0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 13, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 13, 1); + return val; +} + +static void bcmpkt_lbhdr_pp_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 21, 9, val); +} + +static uint32_t bcmpkt_lbhdr_pp_port_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 21, 9); + return val; +} + +static void bcmpkt_lbhdr_routed_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_lbhdr_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_lbhdr_vrf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 2, 13, val); +} + +static uint32_t bcmpkt_lbhdr_vrf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 2, 13); + return val; +} + +static void bcmpkt_lbhdr_vrf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_qos_field_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_lbhdr_qos_field_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_lbhdr_opaque_object_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 8, 4, val); +} + +static uint32_t bcmpkt_lbhdr_opaque_object_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 8, 4); + return val; +} + +static void bcmpkt_lbhdr_qos_field_eth_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 12, 8, val); +} + +static uint32_t bcmpkt_lbhdr_qos_field_eth_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 12, 8); + return val; +} + +static void bcmpkt_lbhdr_int_pri_eth_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 12, 4, val); +} + +static uint32_t bcmpkt_lbhdr_int_pri_eth_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 12, 4); + return val; +} + +static void bcmpkt_lbhdr_int_cn_eth_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 16, 2, val); +} + +static uint32_t bcmpkt_lbhdr_int_cn_eth_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 16, 2); + return val; +} + +static void bcmpkt_lbhdr_cng_eth_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 18, 2, val); +} + +static uint32_t bcmpkt_lbhdr_cng_eth_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 18, 2); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm78900_b0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + NULL, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_lbhdr_pp_port_get, + bcmpkt_lbhdr_routed_pkt_get, + bcmpkt_lbhdr_vrf_get, + bcmpkt_lbhdr_vrf_valid_get, + bcmpkt_lbhdr_qos_field_valid_get, + bcmpkt_lbhdr_opaque_object_get, + bcmpkt_lbhdr_qos_field_eth_get, + bcmpkt_lbhdr_int_pri_eth_get, + bcmpkt_lbhdr_int_cn_eth_get, + bcmpkt_lbhdr_cng_eth_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm78900_b0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + NULL, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_lbhdr_pp_port_set, + bcmpkt_lbhdr_routed_pkt_set, + bcmpkt_lbhdr_vrf_set, + bcmpkt_lbhdr_vrf_valid_set, + bcmpkt_lbhdr_qos_field_valid_set, + bcmpkt_lbhdr_opaque_object_set, + bcmpkt_lbhdr_qos_field_eth_set, + bcmpkt_lbhdr_int_pri_eth_set, + bcmpkt_lbhdr_int_cn_eth_set, + bcmpkt_lbhdr_cng_eth_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm78900_b0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm78900_b0_lbhdr_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm78900_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm78900_b0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm78900_b0_lbhdr_view_infos; + info->view_types = bcm78900_b0_lbhdr_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c new file mode 100644 index 000000000000..9ae1a6b5e464 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c @@ -0,0 +1,1137 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides RXPMD access functions for BCM78900_B0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 22, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 22, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 26, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 26, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 26, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 26, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 16, 12, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 16, 12); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 3, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 3, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 22, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 22, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 3, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 3, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 6, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 6, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 2, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 2, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 6, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 6, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 3, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 3, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 28, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 28, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 1, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 1, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 1, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 1, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 1); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 18, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 18, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 4, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 4, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 5, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 5, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 16, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 16, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 4, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 4, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 4, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 4, 13); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 0, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 0, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 1, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 1, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 17, 4, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 17, 4); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 4, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 4, 1); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 15, 17, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 15, 17); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 23, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 23, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 20, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 20, 1); + return val; +} + +static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 17, 15, val); +} + +static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 17, 15); + return val; +} + +static void bcmpkt_rxpmd_incoming_opaque_tag_status_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 0, 1, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_opaque_tag_status_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 0, 1); + return val; +} + +static void bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 16, 1); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 11; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 46 + ******************************************************************************/ +void bcm78900_b0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC)) { + data[1] |= (0x1 << 16); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST)) { + data[1] |= (0x1 << 17); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS)) { + data[1] |= (0x1 << 23); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION)) { + data[1] |= (0x1 << 24); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD)) { + data[1] |= (0x1 << 25); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 26); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { + data[0] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { + data[0] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH)) { + data[0] |= (0x1 << 13); + } +} + +void bcm78900_b0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + if (data[1] & (0x1 << 16)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC); + } + if (data[1] & (0x1 << 17)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST); + } + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS); + } + if (data[1] & (0x1 << 24)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION); + } + if (data[1] & (0x1 << 25)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD); + } + if (data[1] & (0x1 << 26)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } + if (data[0] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); + } + if (data[0] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); + } + if (data[0] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH); + } +} + +/******************************************************************************* + * SWFORMAT: EP_RX_REASON + * BLOCKS: + * SIZE: 64 + ******************************************************************************/ +void bcm78900_b0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_EP_CTC)) { + data[1] |= (0x1 << 0); + } +} + +void bcm78900_b0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_EP_CTC); + } +} + +const bcmpkt_rxpmd_fget_t bcm78900_b0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + NULL, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + NULL, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + bcmpkt_rxpmd_dlb_id_valid_get, + bcmpkt_rxpmd_dlb_id_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_get, + bcmpkt_rxpmd_o_nhi_get, + NULL, + NULL, + bcmpkt_rxpmd_incoming_opaque_tag_status_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm78900_b0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + NULL, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + NULL, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + bcmpkt_rxpmd_dlb_id_valid_set, + bcmpkt_rxpmd_dlb_id_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_set, + bcmpkt_rxpmd_o_nhi_set, + NULL, + NULL, + bcmpkt_rxpmd_incoming_opaque_tag_status_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm78900_b0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm78900_b0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm78900_b0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -2, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -1, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm78900_b0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm78900_b0_rxpmd_view_infos; + info->view_types = bcm78900_b0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c new file mode 100644 index 000000000000..1d368e0c674a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c @@ -0,0 +1,885 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides TXPMD access functions for BCM78900_B0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 0, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 1); + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 20, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 20, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 3, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 3, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 8, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 8, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 29, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 29, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 12, 3, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 12, 3); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 30, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 30, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 29, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 29, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 28, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 28, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 19, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 17, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 17, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 15, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 15, 2); + return val; +} + +static void bcmpkt_txpmd_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 1, 2, val); +} + +static uint32_t bcmpkt_txpmd_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 1, 2); + return val; +} + +static void bcmpkt_txpmd_destination_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 9, 16, val); +} + +static uint32_t bcmpkt_txpmd_destination_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 16); + return val; +} + +static void bcmpkt_txpmd_destination_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_destination_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 25, 4); + return val; +} + +static void bcmpkt_txpmd_wred_mark_eligible_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 30, 1, val); +} + +static uint32_t bcmpkt_txpmd_wred_mark_eligible_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 30, 1); + return val; +} + +static void bcmpkt_txpmd_wred_response_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 31, 1, val); +} + +static uint32_t bcmpkt_txpmd_wred_response_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 31, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 0, 17, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 17); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_destination_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 17, 15, val & MASK(15)); + WORD_FIELD_SET(data[2], 0, 1, (val >> 15) & MASK(1)); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_destination_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = (WORD_FIELD_GET(data[3], 17, 15) | (WORD_FIELD_GET(data[2], 0, 1) << 15)) ; + return val; +} + +static void bcmpkt_txpmd_cpu_tx_destination_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 1, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_destination_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 4); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 5, 2, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 5, 2); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_input_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 7, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_input_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 7, 4); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 11, 2, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 11, 2); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 13, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 13, 4); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 17, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_pkt_profile_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 18, 3, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 18, 3); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 21, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 21, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 22, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 22, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4)); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ; + return val; +} + +static void bcmpkt_txpmd_cpu_tx_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[1], 4, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 4, 1); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm78900_b0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cell_error_get, + NULL, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + NULL, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cng_get, + bcmpkt_txpmd_destination_get, + bcmpkt_txpmd_destination_type_get, + bcmpkt_txpmd_wred_mark_eligible_get, + bcmpkt_txpmd_wred_response_get, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_get, + bcmpkt_txpmd_cpu_tx_ecmp_member_id_get, + bcmpkt_txpmd_cpu_tx_destination_get, + bcmpkt_txpmd_cpu_tx_destination_type_get, + bcmpkt_txpmd_cpu_tx_dp_get, + bcmpkt_txpmd_cpu_tx_input_pri_get, + bcmpkt_txpmd_cpu_tx_int_cn_get, + bcmpkt_txpmd_cpu_tx_int_pri_get, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get, + bcmpkt_txpmd_cpu_tx_pkt_profile_get, + bcmpkt_txpmd_cpu_tx_qos_fields_vld_get, + bcmpkt_txpmd_cpu_tx_routed_pkt_get, + NULL, + NULL, + bcmpkt_txpmd_cpu_tx_vrf_get, + bcmpkt_txpmd_cpu_tx_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm78900_b0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cell_error_set, + NULL, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + NULL, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cng_set, + bcmpkt_txpmd_destination_set, + bcmpkt_txpmd_destination_type_set, + bcmpkt_txpmd_wred_mark_eligible_set, + bcmpkt_txpmd_wred_response_set, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_set, + bcmpkt_txpmd_cpu_tx_ecmp_member_id_set, + bcmpkt_txpmd_cpu_tx_destination_set, + bcmpkt_txpmd_cpu_tx_destination_type_set, + bcmpkt_txpmd_cpu_tx_dp_set, + bcmpkt_txpmd_cpu_tx_input_pri_set, + bcmpkt_txpmd_cpu_tx_int_cn_set, + bcmpkt_txpmd_cpu_tx_int_pri_set, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set, + bcmpkt_txpmd_cpu_tx_pkt_profile_set, + bcmpkt_txpmd_cpu_tx_qos_fields_vld_set, + bcmpkt_txpmd_cpu_tx_routed_pkt_set, + NULL, + NULL, + bcmpkt_txpmd_cpu_tx_vrf_set, + bcmpkt_txpmd_cpu_tx_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm78900_b0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm78900_b0_txpmd_view_types[] = { + {"sobmh_from_cpu", 1}, + {"cpu_tx", 2}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm78900_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -2, -2, -2, -2, -2, 1, -2, 1, 1, 1, 1, 1, -2, 1, + 1, 1, 1, 1, 1, 1, 1, -2, -2, -2, -2, -2, -2, -2, 1, 1, + 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, -2, + -2, 2, 2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm78900_b0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm78900_b0_txpmd_view_infos; + info->view_types = bcm78900_b0_txpmd_view_types; + info->view_type_get = bcmpkt_txpmd_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..ddded01f2183 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c @@ -0,0 +1,359 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides LBHDR access functions for BCM78905_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 13, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 13, 1); + return val; +} + +static void bcmpkt_lbhdr_pp_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 21, 9, val); +} + +static uint32_t bcmpkt_lbhdr_pp_port_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 21, 9); + return val; +} + +static void bcmpkt_lbhdr_routed_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_lbhdr_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_lbhdr_vrf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 2, 13, val); +} + +static uint32_t bcmpkt_lbhdr_vrf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 2, 13); + return val; +} + +static void bcmpkt_lbhdr_vrf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_qos_field_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_lbhdr_qos_field_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_lbhdr_opaque_object_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 8, 4, val); +} + +static uint32_t bcmpkt_lbhdr_opaque_object_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 8, 4); + return val; +} + +static void bcmpkt_lbhdr_qos_field_eth_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 12, 8, val); +} + +static uint32_t bcmpkt_lbhdr_qos_field_eth_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 12, 8); + return val; +} + +static void bcmpkt_lbhdr_int_pri_eth_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 12, 4, val); +} + +static uint32_t bcmpkt_lbhdr_int_pri_eth_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 12, 4); + return val; +} + +static void bcmpkt_lbhdr_int_cn_eth_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 16, 2, val); +} + +static uint32_t bcmpkt_lbhdr_int_cn_eth_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 16, 2); + return val; +} + +static void bcmpkt_lbhdr_cng_eth_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 18, 2, val); +} + +static uint32_t bcmpkt_lbhdr_cng_eth_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 18, 2); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm78905_a0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + NULL, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_lbhdr_pp_port_get, + bcmpkt_lbhdr_routed_pkt_get, + bcmpkt_lbhdr_vrf_get, + bcmpkt_lbhdr_vrf_valid_get, + bcmpkt_lbhdr_qos_field_valid_get, + bcmpkt_lbhdr_opaque_object_get, + bcmpkt_lbhdr_qos_field_eth_get, + bcmpkt_lbhdr_int_pri_eth_get, + bcmpkt_lbhdr_int_cn_eth_get, + bcmpkt_lbhdr_cng_eth_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm78905_a0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + NULL, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_lbhdr_pp_port_set, + bcmpkt_lbhdr_routed_pkt_set, + bcmpkt_lbhdr_vrf_set, + bcmpkt_lbhdr_vrf_valid_set, + bcmpkt_lbhdr_qos_field_valid_set, + bcmpkt_lbhdr_opaque_object_set, + bcmpkt_lbhdr_qos_field_eth_set, + bcmpkt_lbhdr_int_pri_eth_set, + bcmpkt_lbhdr_int_cn_eth_set, + bcmpkt_lbhdr_cng_eth_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm78905_a0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm78905_a0_lbhdr_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm78905_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm78905_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm78905_a0_lbhdr_view_infos; + info->view_types = bcm78905_a0_lbhdr_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..8e7feab9a6b2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c @@ -0,0 +1,1137 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides RXPMD access functions for BCM78905_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 22, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 22, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 26, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 26, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 26, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 26, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 16, 12, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 16, 12); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 3, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 3, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 22, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 22, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 3, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 3, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 6, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 6, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 2, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 2, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 6, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 6, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 3, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 3, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 28, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 28, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 1, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 1, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 1, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 1, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 1); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 18, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 18, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 4, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 4, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 5, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 5, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 16, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 16, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 4, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 4, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 4, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 4, 13); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 0, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 0, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 1, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 1, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 17, 4, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 17, 4); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 4, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 4, 1); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 15, 17, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 15, 17); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 23, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 23, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 20, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 20, 1); + return val; +} + +static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 17, 15, val); +} + +static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 17, 15); + return val; +} + +static void bcmpkt_rxpmd_incoming_opaque_tag_status_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 0, 1, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_opaque_tag_status_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 0, 1); + return val; +} + +static void bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 16, 1); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 11; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 46 + ******************************************************************************/ +void bcm78905_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC)) { + data[1] |= (0x1 << 16); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST)) { + data[1] |= (0x1 << 17); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS)) { + data[1] |= (0x1 << 23); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION)) { + data[1] |= (0x1 << 24); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD)) { + data[1] |= (0x1 << 25); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 26); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { + data[0] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { + data[0] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH)) { + data[0] |= (0x1 << 13); + } +} + +void bcm78905_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + if (data[1] & (0x1 << 16)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC); + } + if (data[1] & (0x1 << 17)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST); + } + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS); + } + if (data[1] & (0x1 << 24)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION); + } + if (data[1] & (0x1 << 25)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD); + } + if (data[1] & (0x1 << 26)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } + if (data[0] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); + } + if (data[0] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); + } + if (data[0] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH); + } +} + +/******************************************************************************* + * SWFORMAT: EP_RX_REASON + * BLOCKS: + * SIZE: 64 + ******************************************************************************/ +void bcm78905_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_EP_CTC)) { + data[1] |= (0x1 << 0); + } +} + +void bcm78905_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_EP_CTC); + } +} + +const bcmpkt_rxpmd_fget_t bcm78905_a0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + NULL, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + NULL, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + bcmpkt_rxpmd_dlb_id_valid_get, + bcmpkt_rxpmd_dlb_id_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_get, + bcmpkt_rxpmd_o_nhi_get, + NULL, + NULL, + bcmpkt_rxpmd_incoming_opaque_tag_status_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm78905_a0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + NULL, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + NULL, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + bcmpkt_rxpmd_dlb_id_valid_set, + bcmpkt_rxpmd_dlb_id_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_set, + bcmpkt_rxpmd_o_nhi_set, + NULL, + NULL, + bcmpkt_rxpmd_incoming_opaque_tag_status_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm78905_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm78905_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm78905_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -2, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -1, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm78905_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm78905_a0_rxpmd_view_infos; + info->view_types = bcm78905_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c new file mode 100644 index 000000000000..2da682502179 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c @@ -0,0 +1,885 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides TXPMD access functions for BCM78905_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 0, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 1); + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 20, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 20, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 3, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 3, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 8, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 8, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 29, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 29, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 12, 3, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 12, 3); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 30, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 30, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 29, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 29, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 28, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 28, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 19, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 17, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 17, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 15, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 15, 2); + return val; +} + +static void bcmpkt_txpmd_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 1, 2, val); +} + +static uint32_t bcmpkt_txpmd_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 1, 2); + return val; +} + +static void bcmpkt_txpmd_destination_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 9, 16, val); +} + +static uint32_t bcmpkt_txpmd_destination_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 16); + return val; +} + +static void bcmpkt_txpmd_destination_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_destination_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 25, 4); + return val; +} + +static void bcmpkt_txpmd_wred_mark_eligible_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 30, 1, val); +} + +static uint32_t bcmpkt_txpmd_wred_mark_eligible_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 30, 1); + return val; +} + +static void bcmpkt_txpmd_wred_response_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 31, 1, val); +} + +static uint32_t bcmpkt_txpmd_wred_response_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 31, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 0, 17, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 17); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_destination_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 17, 15, val & MASK(15)); + WORD_FIELD_SET(data[2], 0, 1, (val >> 15) & MASK(1)); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_destination_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = (WORD_FIELD_GET(data[3], 17, 15) | (WORD_FIELD_GET(data[2], 0, 1) << 15)) ; + return val; +} + +static void bcmpkt_txpmd_cpu_tx_destination_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 1, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_destination_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 4); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 5, 2, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 5, 2); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_input_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 7, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_input_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 7, 4); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 11, 2, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 11, 2); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 13, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 13, 4); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 17, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_pkt_profile_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 18, 3, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 18, 3); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 21, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 21, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 22, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 22, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4)); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ; + return val; +} + +static void bcmpkt_txpmd_cpu_tx_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[1], 4, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 4, 1); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm78905_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cell_error_get, + NULL, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + NULL, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cng_get, + bcmpkt_txpmd_destination_get, + bcmpkt_txpmd_destination_type_get, + bcmpkt_txpmd_wred_mark_eligible_get, + bcmpkt_txpmd_wred_response_get, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_get, + bcmpkt_txpmd_cpu_tx_ecmp_member_id_get, + bcmpkt_txpmd_cpu_tx_destination_get, + bcmpkt_txpmd_cpu_tx_destination_type_get, + bcmpkt_txpmd_cpu_tx_dp_get, + bcmpkt_txpmd_cpu_tx_input_pri_get, + bcmpkt_txpmd_cpu_tx_int_cn_get, + bcmpkt_txpmd_cpu_tx_int_pri_get, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get, + bcmpkt_txpmd_cpu_tx_pkt_profile_get, + bcmpkt_txpmd_cpu_tx_qos_fields_vld_get, + bcmpkt_txpmd_cpu_tx_routed_pkt_get, + NULL, + NULL, + bcmpkt_txpmd_cpu_tx_vrf_get, + bcmpkt_txpmd_cpu_tx_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm78905_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cell_error_set, + NULL, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + NULL, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cng_set, + bcmpkt_txpmd_destination_set, + bcmpkt_txpmd_destination_type_set, + bcmpkt_txpmd_wred_mark_eligible_set, + bcmpkt_txpmd_wred_response_set, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_set, + bcmpkt_txpmd_cpu_tx_ecmp_member_id_set, + bcmpkt_txpmd_cpu_tx_destination_set, + bcmpkt_txpmd_cpu_tx_destination_type_set, + bcmpkt_txpmd_cpu_tx_dp_set, + bcmpkt_txpmd_cpu_tx_input_pri_set, + bcmpkt_txpmd_cpu_tx_int_cn_set, + bcmpkt_txpmd_cpu_tx_int_pri_set, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set, + bcmpkt_txpmd_cpu_tx_pkt_profile_set, + bcmpkt_txpmd_cpu_tx_qos_fields_vld_set, + bcmpkt_txpmd_cpu_tx_routed_pkt_set, + NULL, + NULL, + bcmpkt_txpmd_cpu_tx_vrf_set, + bcmpkt_txpmd_cpu_tx_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm78905_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm78905_a0_txpmd_view_types[] = { + {"sobmh_from_cpu", 1}, + {"cpu_tx", 2}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm78905_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -2, -2, -2, -2, -2, 1, -2, 1, 1, 1, 1, 1, -2, 1, + 1, 1, 1, 1, 1, 1, 1, -2, -2, -2, -2, -2, -2, -2, 1, 1, + 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, -2, + -2, 2, 2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm78905_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm78905_a0_txpmd_view_infos; + info->view_types = bcm78905_a0_txpmd_view_types; + info->view_type_get = bcmpkt_txpmd_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c new file mode 100644 index 000000000000..46d43820e6a1 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c @@ -0,0 +1,588 @@ +/*! \file bcmpkt_flexhdr.c + * + * Flexhdr access interface. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include +#include + + +/* Define stub functions for base variant. */ +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ +bcmpkt_flex_pmd_info_t * _bc##_flex_pmd_info_get(uint32_t hid) {return NULL;} +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ +shr_enum_map_t * _bc##_flexhdr_map_get(void) {return NULL;} +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + int _bc##_flexhdr_variant_support_map[] = {-1, -1, -1, -1}; +#define BCMDRD_DEVLIST_OVERRIDE +#include + +/* Array of device variant specific data */ +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \ + &_bd##_vu##_va##_flex_pmd_info_get, +static bcmpkt_flex_pmd_info_t * (*flex_pmd_info_get[])(uint32_t hid) = { + NULL, +#include + NULL +}; + +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \ + &_bd##_vu##_va##_flexhdr_map_get, +static shr_enum_map_t * (*flexhdr_map_get[])(void) = { + NULL, +#include + NULL +}; + +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \ + &_bd##_vu##_va##_flexhdr_variant_support_map[0], + +int *bcmpkt_flexhdr_variant_support_map[] = { + NULL, +#include + NULL +}; + +int +bcmpkt_flexhdr_header_name_get(bcmlrd_variant_t variant, + uint32_t hid, char **name) +{ + shr_enum_map_t *id_map = NULL; + + if (name == NULL) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + id_map = flexhdr_map_get[variant](); + if (id_map == NULL) { + return SHR_E_UNAVAIL; + } + while (sal_strcasecmp(id_map->name, "flexhdr count") != 0) { + if (id_map->val == (int)hid) { + *name = id_map->name; + return SHR_E_NONE; + } + id_map++; + } + + return SHR_E_UNAVAIL; +} + +int +bcmpkt_flexhdr_header_id_get(bcmlrd_variant_t variant, + char *name, uint32_t *hid) +{ + shr_enum_map_t *id_map = NULL; + + if ((name == NULL) || (hid == NULL)) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + id_map = flexhdr_map_get[variant](); + if (id_map == NULL) { + return SHR_E_UNAVAIL; + } + + while (1) { + if (sal_strcasecmp(id_map->name, name) == 0) { + *hid = id_map->val; + return SHR_E_NONE; + } + if (sal_strcasecmp(id_map->name, "flexhdr count") == 0) { + break; + } + id_map++; + } + + return SHR_E_UNAVAIL; +} + +/* + * SDKLT-43974: This is a simple workaround. Normal fix will be ready in the + * JIRA. + */ +int +bcmpkt_flexhdr_len_get(bcmlrd_variant_t variant, uint32_t hid, + uint32_t *len) +{ + int rv; + char *name = NULL; + + if (len == NULL) { + return SHR_E_PARAM; + } + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + rv = bcmpkt_flexhdr_header_name_get(variant, hid, &name); + if (SHR_FAILURE(rv)) { + return rv; + } + + if (sal_strcasecmp(name, "generic_loopback_t") == 0) { + *len = 16; + } else if (sal_strcasecmp(name, "hg3_base_t") == 0 || + sal_strcasecmp(name, "hg3_extension_0_t") == 0) { + *len = 8; + } else { + /* no support*/ + *len = 0; + } + + return SHR_E_NONE; +} + +int +bcmpkt_flexhdr_is_supported(bcmlrd_variant_t variant, uint32_t hid, + bool *is_supported) +{ + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + + if (is_supported == NULL) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + *is_supported = pmd_info->is_supported; + + return SHR_E_NONE; +} + +int +bcmpkt_flexhdr_field_get(bcmlrd_variant_t variant, uint32_t hid, + uint32_t *flexhdr, int profile, int fid, uint32_t *val) +{ + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + bcmpkt_flex_field_metadata_t *fld_info = NULL; + + if ((flexhdr == NULL) || (val == NULL)) { + return SHR_E_PARAM; + } + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->field_info == NULL) { + return SHR_E_UNAVAIL; + } + if (fid <= BCMPKT_FID_INVALID || fid >= pmd_info->field_info->num_fields) { + return SHR_E_PARAM; + } + + if (pmd_info->flex_fget != NULL) { + if (pmd_info->flex_fget[fid] == NULL) { + return SHR_E_UNAVAIL; + } + return (pmd_info->flex_fget[fid])(flexhdr, profile, val); + } else if (pmd_info->flex_common_fget != NULL) { + fld_info = &pmd_info->field_info->info[fid]; + return (pmd_info->flex_common_fget)(flexhdr, fld_info, profile, val); + } else { + return SHR_E_UNAVAIL; + } + + return SHR_E_NONE; +} + +int +bcmpkt_flexhdr_field_set(bcmlrd_variant_t variant, uint32_t hid, + uint32_t *flexhdr, int profile, int fid, uint32_t val) +{ + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + bcmpkt_flex_field_metadata_t *fld_info = NULL; + + if (flexhdr == NULL) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->field_info == NULL) { + return SHR_E_UNAVAIL; + } + if (fid <= BCMPKT_FID_INVALID || fid >= pmd_info->field_info->num_fields) { + return SHR_E_PARAM; + } + + if (pmd_info->flex_fset != NULL) { + if (pmd_info->flex_fset[fid] == NULL) { + return SHR_E_UNAVAIL; + } + return (pmd_info->flex_fset[fid])(flexhdr, profile, val); + } else if (pmd_info->flex_common_fset != NULL) { + fld_info = &pmd_info->field_info->info[fid]; + return (pmd_info->flex_common_fset)(flexhdr, fld_info, profile, val); + } else { + return SHR_E_UNAVAIL; + } + + return SHR_E_NONE; +} + +int +bcmpkt_flexhdr_field_name_get(bcmlrd_variant_t variant, uint32_t hid, + int fid, char **name) +{ + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + + if (name == NULL) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->field_info == NULL) { + return SHR_E_UNAVAIL; + } + if (fid <= BCMPKT_FID_INVALID || fid >= pmd_info->field_info->num_fields) { + return SHR_E_PARAM; + } + + if (pmd_info->field_info->info == NULL) { + return SHR_E_UNAVAIL; + } + *name = pmd_info->field_info->info[fid].name; + + return SHR_E_NONE; +} + +int +bcmpkt_flexhdr_field_id_get(bcmlrd_variant_t variant, uint32_t hid, + char *name, int *fid) +{ + int i; + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + + if ((name == NULL) || (fid == NULL)) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->field_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->field_info->info == NULL) { + return SHR_E_UNAVAIL; + } + + for (i = BCMPKT_FID_INVALID + 1; i < pmd_info->field_info->num_fields; i++) { + if (sal_strcasecmp(pmd_info->field_info->info[i].name, name) == 0) { + *fid = pmd_info->field_info->info[i].fid; + return SHR_E_NONE; + } + } + + return SHR_E_NOT_FOUND; +} + +int +bcmpkt_flexhdr_field_info_get(bcmlrd_variant_t variant, uint32_t hid, + bcmpkt_flex_field_info_t *info) +{ + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + + if (info == NULL) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->field_info == NULL) { + return SHR_E_UNAVAIL; + } + + *info = *(pmd_info->field_info); + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_flex_reasons_get(bcmlrd_variant_t variant, + uint32_t *rxpmd_flex, bcmpkt_bitmap_t *reasons) +{ + int32_t ret = SHR_E_NONE; + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + uint32_t hid; + + if ((rxpmd_flex == NULL) || (reasons == NULL)) { + return SHR_E_PARAM; + } + + ret = bcmpkt_flexhdr_header_id_get(variant, "RXPMD_FLEX_T", &hid); + if (ret < 0) { + return ret; + } + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->reasons_info == NULL) { + return SHR_E_UNAVAIL; + } + + SHR_BITCLR_RANGE + (((*reasons).pbits), 0, pmd_info->reasons_info->num_reasons); + pmd_info->reasons_info->reason_decode (rxpmd_flex, reasons); + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_flex_reasons_set(bcmlrd_variant_t variant, + bcmpkt_bitmap_t *reasons, uint32_t *rxpmd_flex) +{ + int32_t ret = SHR_E_NONE; + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + uint32_t hid; + + if ((rxpmd_flex == NULL) || (reasons == NULL)) { + return SHR_E_PARAM; + } + + ret = bcmpkt_flexhdr_header_id_get(variant, "RXPMD_FLEX_T", &hid); + if (ret < 0) { + return ret; + } + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->reasons_info == NULL) { + return SHR_E_UNAVAIL; + } + + + pmd_info->reasons_info->reason_encode(reasons, rxpmd_flex); + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_flex_reason_name_get(bcmlrd_variant_t variant, + int reason, char **name) +{ + int32_t ret = SHR_E_NONE; + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + uint32_t hid; + + if (name == NULL) { + return SHR_E_PARAM; + } + + ret = bcmpkt_flexhdr_header_id_get(variant, "RXPMD_FLEX_T", &hid); + if (ret < 0) { + return ret; + } + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->reasons_info == NULL) { + return SHR_E_UNAVAIL; + } + + + if (reason <= 0 || + reason > pmd_info->reasons_info->num_reasons) { + return SHR_E_PARAM; + } + + if (pmd_info->reasons_info->reason_names == NULL) { + return SHR_E_UNAVAIL; + } + *name = pmd_info->reasons_info->reason_names[reason].name; + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_flex_reason_max_get(bcmlrd_variant_t variant, uint32_t *num) +{ + int32_t ret = SHR_E_NONE; + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + uint32_t hid; + + if (num == NULL) { + return SHR_E_PARAM ; + } + + ret = bcmpkt_flexhdr_header_id_get(variant, "RXPMD_FLEX_T", &hid); + if (ret < 0) { + return ret; + } + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->reasons_info == NULL) { + return SHR_E_UNAVAIL; + } + + *num = pmd_info->reasons_info->num_reasons; + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_flex_reason_id_get(bcmlrd_variant_t variant, + char *name, int *rid) +{ + int32_t ret = SHR_E_NONE; + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + int i; + uint32_t hid; + + if ((name == NULL) || (rid == NULL)) { + return SHR_E_PARAM; + } + + ret = bcmpkt_flexhdr_header_id_get(variant, "RXPMD_FLEX_T", &hid); + if (ret < 0) { + return ret; + } + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->reasons_info == NULL) { + return SHR_E_UNAVAIL; + } + + if (pmd_info->reasons_info->reason_names == NULL) { + return SHR_E_UNAVAIL; + } + for (i = 0; i < pmd_info->reasons_info->num_reasons; i++) { + if (sal_strcasecmp(pmd_info->reasons_info->reason_names[i].name, + name) == 0) { + *rid = pmd_info->reasons_info->reason_names[i].val; + return SHR_E_NONE; + } + } + + return SHR_E_NOT_FOUND; +} + +int * +bcmpkt_flexhdr_support_map_get(bcmlrd_variant_t variant) +{ + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return NULL; + } + + return bcmpkt_flexhdr_variant_support_map[variant]; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h new file mode 100644 index 000000000000..c240b6e55f89 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h @@ -0,0 +1,384 @@ +/*! \file bcmpkt_flexhdr.h + * + * Flexhdr access interface. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_FLEXHDR_H +#define BCMPKT_FLEXHDR_H + +#include +#include +#include +#include +#include +#include +#include + +/*! Invalid profile ID. */ +#define BCMPKT_FLEXHDR_PROFILE_NONE -1 + +/*! Max profile count. */ +#define BCMPKT_FLEXHDR_PROFILE_MAX 64 + +/*! CELL Error status bitmap. */ +#define BCMPKT_RXFLEXMETA_ST_CELL_ERROR (0x1 << 18) + +/*! + * \name Packet FLEX reason utility macros. + * \anchor BCMPKT_RXPMD_FLEX_REASON_OPS + */ +/*! \{ */ +/*! + * Macro to check if a reason is included in a + * set of reasons (\ref bcmpkt_bitmap_t). Returns: + * zero => reason is not included in the set + * non-zero => reason is included in the set + */ +#define BCMPKT_RXPMD_FLEX_REASON_GET(_reasons, _reason) \ + SHR_BITGET(((_reasons).pbits), (_reason)) + +/*! + * Macro to add a reason to a set of + * reasons (\ref bcmpkt_bitmap_t) + */ +#define BCMPKT_RXPMD_FLEX_REASON_SET(_reasons, _reason) \ + SHR_BITSET(((_reasons).pbits), (_reason)) + +/*! + * Macro to clear a reason from a set of + * reasons (\ref bcmpkt_bitmap_t) + */ +#define BCMPKT_RXPMD_FLEX_REASON_CLEAR(_reasons, _reason) \ + SHR_BITCLR(((_reasons).pbits), (_reason)) + +/*! + * Macro to add all reasons to a set of reasons. + */ +#define BCMPKT_RXPMD_FLEX_REASON_SET_ALL(_reasons, _count) \ + SHR_BITSET_RANGE(((_reasons).pbits), 0, _count) + +/*! + * Macro to clear all reasons. + */ +#define BCMPKT_RXPMD_FLEX_REASON_CLEAR_ALL(_reasons, _count) \ + SHR_BITCLR_RANGE(((_reasons).pbits), 0, _count) + +/*! + * Macro to check for no reason. + */ +#define BCMPKT_RXPMD_FLEX_REASON_IS_NULL(_reasons, _count) \ + SHR_BITNULL_RANGE(((_reasons).pbits), 0, _count) + +/*! + * Macro to get reasons number. + */ +#define BCMPKT_RXPMD_FLEX_REASONS_COUNT(_reasons, _count, _reason_count) \ + SHR_BITCOUNT_RANGE(((_reasons).pbits), _count, 0, _reason_count) + +/*! + * Macro to compare 2 reasons, return 1 for exact match. + */ +#define BCMPKT_RXPMD_FLEX_REASON_EQ(_reasons1, _reasons2, _count) \ + SHR_BITEQ_RANGE(((_reasons1).pbits), ((_reasons2).pbits), \ + 0, _count) +/*! \} */ + +/*! + * Flex header field profile info. + */ +typedef struct bcmpkt_flex_field_profile_s { + /*! Minbit in NPL header. */ + uint32_t minbit; + + /*! Maxbit in NPL header. */ + uint32_t maxbit; +} bcmpkt_flex_field_profile_t; + +/*! + * Flex header field data. + */ +typedef struct bcmpkt_flex_field_metadata_s { + /*! Field name. */ + char *name; + + /*! Field ID. */ + int fid; + + /*! Number of profiles defined in NPL. */ + int profile_cnt; + + /*! Field boundary for each profile defined in NPL. */ + bcmpkt_flex_field_profile_t profile[BCMPKT_FLEXHDR_PROFILE_MAX]; +} bcmpkt_flex_field_metadata_t; + +/*! + * Flex header field info structure. + */ +typedef struct bcmpkt_flex_field_info_s { + + /*! Number of header fields. */ + int num_fields; + + /*! Header field names. */ + bcmpkt_flex_field_metadata_t *info; + +} bcmpkt_flex_field_info_t; + +/*! RXPMD data update function pointer. */ +typedef int (*bcmpkt_rxpmd_data_set_f)( + int unit, + bcmpkt_flex_field_metadata_t *pmd_fld_info); + +/*! Process RXPMD entry. */ +typedef int (*bcmpkt_rxpmd_data_process_f)(int unit, uint64_t prof_id); + +/*! Update RXMPMD data from HW during warmboot. */ +typedef int (*bcmpkt_rxpmd_data_update_f)(int unit); + +/*! Array of RXPMD LT subscribe function pointers. */ +typedef struct bcmpkt_rxpmd_func_s { + /*! Set RXMPMD data. */ + bcmpkt_rxpmd_data_set_f rxpmd_data_set; + + /*! Process RXMPMD data flow entry. */ + bcmpkt_rxpmd_data_process_f rxpmd_data_flow; + + /*! Process RXMPMD data remap entry. */ + bcmpkt_rxpmd_data_process_f rxpmd_data_remap; + + /*! Update RXMPMD data from HW during warmboot. */ + bcmpkt_rxpmd_data_update_f rxpmd_data_update; +} bcmpkt_rxpmd_func_t; + +/*! Externs for the rxpmd functions. */ +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_rxpmd_func_t _bd##_rxpmd_func; +#include + +/*! + * \brief Get Header name for a given header ID. + * + * \param [in] variant Variant type. + * \param [in] hid flexhdr ID. + * \param [out] name flexhdr name string. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + */ +extern int +bcmpkt_flexhdr_header_name_get(bcmlrd_variant_t variant, + uint32_t hid, char **name); + +/*! + * \brief Get Header encapsulation length for a given header ID. + * + * \param [in] variant Variant type. + * \param [in] hid flexhdr ID. + * \param [out] len header length. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + */ +extern int +bcmpkt_flexhdr_len_get(bcmlrd_variant_t variant, uint32_t hid, + uint32_t *len); + +/*! + * \brief Get Header ID for a given flexhdr name. + * + * \param [in] variant Variant type. + * \param [in] name flexhdr name string. + * \param [out] hid flexhdr ID. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_NOT_FOUND Not found the name. + */ +extern int +bcmpkt_flexhdr_header_id_get(bcmlrd_variant_t variant, + char* name, uint32_t *hid); + +/*! + * \brief Check if flexhdr is supported. + * + * \param [in] variant Variant type. + * \param [in] hid flexhdr ID. + * \param [out] is_supported Supported for flexhdr. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not supported. + */ +extern int +bcmpkt_flexhdr_is_supported(bcmlrd_variant_t variant, uint32_t hid, + bool *is_supported); + +/*! + * \brief Get field name for a given flexhdr field ID. + * + * \param [in] variant Variant type. + * \param [in] hid flexhdr ID. + * \param [in] fid flexhdr field ID. + * \param [out] name flexhdr field name string. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + */ +extern int +bcmpkt_flexhdr_field_name_get(bcmlrd_variant_t variant, uint32_t hid, + int fid, char **name); + +/*! + * \brief Get field ID for a given flexhdr field name. + * + * \param [in] variant Variant type. + * \param [in] hid flexhdr ID. + * \param [in] name flexhdr field name string. + * \param [out] fid flexhdr Field ID. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_NOT_FOUND Not found the name. + */ +extern int +bcmpkt_flexhdr_field_id_get(bcmlrd_variant_t variant, uint32_t hid, + char* name, int *fid); + +/*! + * \brief Get field info for a given flexhdr type. + * + * \param [in] variant Variant type. + * \param [in] hid flexhdr ID. + * \param [out] info field information. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_NOT_FOUND Not found the name. + */ +extern int +bcmpkt_flexhdr_field_info_get(bcmlrd_variant_t variant, uint32_t hid, + bcmpkt_flex_field_info_t *info); + +/*! + * \brief Get RX reasons from RXPMD_FLEX. + * + * Decode packet's RX reasons into "reasons". A received packet may have one RX + * reason, multiple RX reasons, or none reason. RX reasons are in the format of + * bitmap. Each bit means one reason type (refer to \ref BCMPKT_RX_REASON_XXX). + * + * User may use \ref BCMPKT_RXPMD_FLEX_REASON_OPS to parse each individual reason based + * on this function's return value "reasons". + * + * \param [in] variant Variant type. + * \param [in] rxpmd_flex RXPMD_FLEX handle. + * \param [out] reasons RX reasons in bit array. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support Reason. + * \retval SHR_E_INTERNAL Internal issue. + */ +extern int +bcmpkt_rxpmd_flex_reasons_get(bcmlrd_variant_t variant, uint32_t *rxpmd_flex, + bcmpkt_bitmap_t *reasons); + +/*! + * \brief Set RX reasons into the RXPMD_FLEX. (Internally used for filter configuration.) + * + * Set RX reasons into RXPMD_FLEX data for packet filter purpose. + * + * \param [in] variant Variant type. + * \param [in] reasons Reasons bit array. + * \param [in,out] rxpmd_flex RXPMD_FLEX handle. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support Reason. + * \retval SHR_E_INTERNAL Internal issue. + */ +extern int +bcmpkt_rxpmd_flex_reasons_set(bcmlrd_variant_t variant, + bcmpkt_bitmap_t *reasons, uint32_t *rxpmd_flex); + +/*! + * \brief Get an RX reason's name. + * + * \param [in] variant Variant type. + * \param [in] reason Reason ID. + * \param [out] name Reason name string handle. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + */ +extern int +bcmpkt_rxpmd_flex_reason_name_get(bcmlrd_variant_t variant, + int reason, char **name); + +/*! + * \brief Get max number of RX reason types. + * + * \param [in] variant Variant type. + * \param [out] num Maximum RX reason types. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + */ +extern int +bcmpkt_rxpmd_flex_reason_max_get(bcmlrd_variant_t variant, uint32_t *num); + +/*! + * \brief Get reason ID for a given RX reason name. + * + * \param [in] variant Variant type. + * \param [in] name Reason name string handle. + * \param [out] rid Reason ID. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_NOT_FOUND Not found the name. + */ +extern int +bcmpkt_rxpmd_flex_reason_id_get(bcmlrd_variant_t variant, + char* name, int *rid); + +/*! + * \brief Intialize RXPMD module + * + * \param [in] unit Device ID. + * \param [in] warm Warmboot flag. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNIT Incorrect unit. + */ +extern int +bcmpkt_flexhdr_init(int unit, bool warm); + +/*! + * \brief Cleanup RXPMD module + * + * \param [in] unit Device ID. + * + * \retval SHR_E_NONE success. + */ +extern int +bcmpkt_flexhdr_cleanup(int unit); + +#endif /* BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h new file mode 100644 index 000000000000..9a458358949f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h @@ -0,0 +1,100 @@ +/*! \file bcmpkt_flexhdr_field.h + * + * Flexhdr field access interface. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_FLEXHDR_FIELD_H +#define BCMPKT_FLEXHDR_FIELD_H + +/*! + * \brief Get value from a flexhdr field. + * + * \param [in] variant Variant type. + * \param [in] hid flexhdr ID. + * \param [in] flexhdr flexhdr handle. + * \param [in] profile Flexible data profile. + * \param [in] fid flexhdr field ID. + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_flexhdr_field_get(bcmlrd_variant_t variant, uint32_t hid, + uint32_t *flexhdr, int profile, int fid, uint32_t *val); + +/*! + * \brief Set value into a flexhdr field. + * + * \param [in] variant Variant type. + * \param [in] hid flexhdr ID. + * \param [in,out] flexhdr flexhdr handle. + * \param [in] profile Flexible data profile. + * \param [in] fid flexhdr field ID. + * \param [in] val Set value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_flexhdr_field_set(bcmlrd_variant_t variant, uint32_t hid, + uint32_t *flexhdr, int profile, int fid, uint32_t val); + +/*! + * \brief Get value from a flexhdr field. + * + * \param [in] unit Device unit number. + * \param [in] hid flexhdr ID. + * \param [in] flexhdr flexhdr handle. + * \param [in] profile Flexible data profile. + * \param [in] fid flexhdr field ID. + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_flexhdr_device_field_get(int unit, uint32_t hid, + uint32_t *flexhdr, int profile, int fid, + uint32_t *val); + +/*! + * \brief Set value into a flexhdr field. + * + * \param [in] unit Device unit number. + * \param [in] hid flexhdr ID. + * \param [in,out] flexhdr flexhdr handle. + * \param [in] profile Flexible data profile. + * \param [in] fid flexhdr field ID. + * \param [in] val Set value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_flexhdr_device_field_set(int unit, uint32_t hid, + uint32_t *flexhdr, int profile, int fid, + uint32_t val); + +#endif /* BCMPKT_FLEXHDR_FIELD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h new file mode 100644 index 000000000000..957132704689 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h @@ -0,0 +1,160 @@ +/*! \file bcmpkt_flexhdr_internal.h + * + * \brief Flex Packet MetaData internal library. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_FLEXHDR_INTERNAL_H +#define BCMPKT_FLEXHDR_INTERNAL_H + +#include +#include +#include + +/*! PMD types. + * This has to match the header IDs present in + * xfc_map_parser/hdr/header_map.yml file. + */ +/*! Generic loopback header type */ +#define BCMPKT_GENERIC_LOOPBACK_T 0 +/*! Higig 3 header type */ +#define BCMPKT_HG3_BASE_T 1 +/*! Higig3 extension 0 header type */ +#define BCMPKT_HG3_EXTENSION_0_T 2 +/*! RXPMD flex header type */ +#define BCMPKT_RXPMD_FLEX_T 3 +/*! Count of PMD types */ +#define BCMPKT_PMD_COUNT 4 + +/*! Get a flex field from a PMD buffer. */ +typedef int32_t (*bcmpkt_flex_field_get_f)(uint32_t *data, int profile, uint32_t *val); + +/*! Set a flex field within a PMD buffer. */ +typedef int32_t (*bcmpkt_flex_field_set_f)(uint32_t *data, int profile, uint32_t val); + +/*! Decode flex packet's RX reasons. */ +typedef void (*bcmpkt_flex_reason_decode_f) (uint32_t *data, bcmpkt_bitmap_t *reasons); + +/*! Encode flex packet's RX reasons */ +typedef void (*bcmpkt_flex_reason_encode_f) (bcmpkt_bitmap_t *reasons, uint32_t *data); + +/*! Get a flex field from a PMD buffer. */ +typedef int (*bcmpkt_flex_field_common_get_f)( + uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t *val); + +/*! Set a flex field from a PMD buffer. */ +typedef int (*bcmpkt_flex_field_common_set_f)( + uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t val); + +/*! + * \brief Flex Packet reasons information structure. + */ +typedef struct bcmpkt_flex_reasons_info_s { + /*! Number of reasons supported. */ + int num_reasons; + + /*! Reason names. */ + shr_enum_map_t *reason_names; + + /*! Encode RX reasons */ + bcmpkt_flex_reason_encode_f reason_encode; + + /*! Decode RX reasons */ + bcmpkt_flex_reason_decode_f reason_decode; + +} bcmpkt_flex_reasons_info_t; + +/*! + * \brief Flex Packet metadata information structure. + */ +typedef struct bcmpkt_flex_pmd_info_s { + + /*! Header field info. */ + bcmpkt_flex_field_info_t *field_info; + + /*! Header support */ + bool is_supported; + + /*! Flex reasons info */ + bcmpkt_flex_reasons_info_t *reasons_info; + + /*! Flex field get functions. */ + bcmpkt_flex_field_get_f *flex_fget; + + /*! Flex field set functions. */ + bcmpkt_flex_field_set_f *flex_fset; + + /*! Flex field common get functions. */ + bcmpkt_flex_field_common_get_f flex_common_fget; + + /*! Flex field common set functions. */ + bcmpkt_flex_field_common_set_f flex_common_fset; +} bcmpkt_flex_pmd_info_t; + +/*! \cond Externs for the required functions. */ +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \ + extern bcmpkt_flex_pmd_info_t * _bd##_vu##_va##_flex_pmd_info_get(uint32_t hid); +#define BCMLRD_VARIANT_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern bcmpkt_flex_pmd_info_t * _bc##_flex_pmd_info_get(uint32_t hid); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \ + extern shr_enum_map_t * _bd##_vu##_va##_flexhdr_map_get(void); +#define BCMLRD_VARIANT_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern shr_enum_map_t * _bc##_flexhdr_map_get(void); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \ + extern int _bd##_vu##_va##_flexhdr_variant_support_map[BCMPKT_PMD_COUNT]; +#define BCMLRD_VARIANT_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern int _bc##_flexhdr_variant_support_map[BCMPKT_PMD_COUNT]; +#define BCMDRD_DEVLIST_OVERRIDE +#include +/*! \endcond */ + +/*! + * \brief Get flex header support mapping for a given variant. + * + * \param [in] variant Variant type. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_NOT_FOUND Not found the name. + */ +extern int * +bcmpkt_flexhdr_support_map_get(bcmlrd_variant_t variant); + +#endif /* BCMPKT_FLEXHDR_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h new file mode 100644 index 000000000000..80474121b929 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h @@ -0,0 +1,49 @@ +/*! \file bcmpkt_hg3.h + * + * Common macros and definitions for Higig3 protocol + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_HG3_H +#define BCMPKT_HG3_H + +/* Note, ether type set to same value as reset value of R_GSH_ETHERTYPEr(700) */ +/*! Ethernet type used for Higig3 header */ +#define BCMPKT_HG3_ETHER_TYPE 0x2BC + +/*! Higig3 base header size (bytes). */ +#define BCMPKT_HG3_BASE_HEADER_SIZE_BYTES 8 +/*! Higig3 base header size (words). */ +#define BCMPKT_HG3_BASE_HEADER_SIZE_WORDS 2 + +/*! Higig3 extension 0 header size (bytes). */ +#define BCMPKT_HG3_EXT0_HEADER_SIZE_BYTES 8 +/*! Higig3 extension 0 header size (words). */ +#define BCMPKT_HG3_EXT0_HEADER_SIZE_WORDS 2 + +/*! Higig3 header size (bytes). Includes base and ext0 header */ +#define BCMPKT_HG3_SIZE_BYTES (BCMPKT_HG3_BASE_HEADER_SIZE_BYTES + \ + BCMPKT_HG3_EXT0_HEADER_SIZE_BYTES) +/*! Higig3 header size (words). Includes base and ext0 header */ +#define BCMPKT_HG3_SIZE_WORDS (BCMPKT_HG3_BASE_HEADER_SIZE_WORDS + \ + BCMPKT_HG3_EXT0_HEADER_SIZE_WORDS) + +/*! Higig3 extension 0 field max. */ +#define BCMPKT_HG3_EXT0_FID_MAX 32 +#endif /* BCMPKT_HG3_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h new file mode 100644 index 000000000000..928eeaff52a2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h @@ -0,0 +1,346 @@ +#ifndef BCMPKT_HIGIG_DEFS_H +#define BCMPKT_HIGIG_DEFS_H +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-chip.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides access macros for the HiGig module header. + * + ******************************************************************************/ + +#include + +/******************************************************************************* + * + * HIGIG DEFINITIONS BEGIN HERE + * + ******************************************************************************/ + + +/* Start of HiGig packet indicators */ +#define BCMPKT_HIGIG_SOF 0xfb +#define BCMPKT_HIGIG2_SOF 0xfc + + +/* HiGig module header size (in bytes) */ +#define BCMPKT_HIGIG_SIZE 12 +#define BCMPKT_HIGIG2_SIZE 16 + + +/* HiGig module header size (in words) */ +#define BCMPKT_HIGIG_WSIZE 3 +#define BCMPKT_HIGIG2_WSIZE 4 + + +/******************************************************************************* + * SWFORMAT: HIGIG + * BLOCKS: + * SIZE: 96 + ******************************************************************************/ +#define HIGIG_OFFSET 0x00000000 + +#define HIGIG_BLKACC () + +#define HIGIG_SIZE 12 + +/* + * This structure should be used to declare and program HIGIG. + * + */ +typedef union HIGIG_s { + uint32_t v[3]; + uint32_t higig[3]; + uint32_t _higig; +} HIGIG_t; + +#define HIGIG_CLR(r) sal_memset(&((r).higig[0]), 0, sizeof(HIGIG_t)) +#define HIGIG_SET(r,i,d) (r).higig[i] = d +#define HIGIG_GET(r,i) (r).higig[i] + +/* + * These macros can be used to access individual fields. + * + */ +#define HIGIG_VC_LABELf_GET(r) (((r).higig[2]) & 0xfffff) +#define HIGIG_VC_LABELf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0xfffff)) | (((uint32_t)f) & 0xfffff)) +#define HIGIG_CLASSIFICATION_TAGf_GET(r) ((((r).higig[2]) >> 16) & 0xffff) +#define HIGIG_CLASSIFICATION_TAGf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0xffff << 16)) | ((((uint32_t)f) & 0xffff) << 16)) +#define HIGIG_LABEL_PRESENTf_GET(r) ((((r).higig[2]) >> 20) & 0x1) +#define HIGIG_LABEL_PRESENTf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 20)) | ((((uint32_t)f) & 0x1) << 20)) +#define HIGIG_L3f_GET(r) ((((r).higig[2]) >> 21) & 0x1) +#define HIGIG_L3f_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 21)) | ((((uint32_t)f) & 0x1) << 21)) +#define HIGIG_DST_MODID_5f_GET(r) ((((r).higig[2]) >> 22) & 0x1) +#define HIGIG_DST_MODID_5f_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 22)) | ((((uint32_t)f) & 0x1) << 22)) +#define HIGIG_SRC_MODID_5f_GET(r) ((((r).higig[2]) >> 23) & 0x1) +#define HIGIG_SRC_MODID_5f_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 23)) | ((((uint32_t)f) & 0x1) << 23)) +#define HIGIG_MIRRORf_GET(r) ((((r).higig[2]) >> 24) & 0x1) +#define HIGIG_MIRRORf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 24)) | ((((uint32_t)f) & 0x1) << 24)) +#define HIGIG_MIRROR_DONEf_GET(r) ((((r).higig[2]) >> 25) & 0x1) +#define HIGIG_MIRROR_DONEf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 25)) | ((((uint32_t)f) & 0x1) << 25)) +#define HIGIG_MIRROR_ONLYf_GET(r) ((((r).higig[2]) >> 26) & 0x1) +#define HIGIG_MIRROR_ONLYf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 26)) | ((((uint32_t)f) & 0x1) << 26)) +#define HIGIG_INGRESS_TAGGEDf_GET(r) ((((r).higig[2]) >> 27) & 0x1) +#define HIGIG_INGRESS_TAGGEDf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 27)) | ((((uint32_t)f) & 0x1) << 27)) +#define HIGIG_DST_TGIDf_GET(r) ((((r).higig[2]) >> 28) & 0x7) +#define HIGIG_DST_TGIDf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x7 << 28)) | ((((uint32_t)f) & 0x7) << 28)) +#define HIGIG_DST_Tf_GET(r) ((((r).higig[2]) >> 31) & 0x1) +#define HIGIG_DST_Tf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31)) +#define HIGIG_DST_MODID_LSf_GET(r) (((r).higig[1]) & 0x1f) +#define HIGIG_DST_MODID_LSf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x1f)) | (((uint32_t)f) & 0x1f)) +#define HIGIG_CNGf_GET(r) ((((r).higig[1]) >> 5) & 0x1) +#define HIGIG_CNGf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x1 << 5)) | ((((uint32_t)f) & 0x1) << 5)) +#define HIGIG_HEADER_TYPEf_GET(r) ((((r).higig[1]) >> 6) & 0x3) +#define HIGIG_HEADER_TYPEf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x3 << 6)) | ((((uint32_t)f) & 0x3) << 6)) +#define HIGIG_PRIORITYf_GET(r) ((((r).higig[1]) >> 8) & 0x7) +#define HIGIG_PRIORITYf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x7 << 8)) | ((((uint32_t)f) & 0x7) << 8)) +#define HIGIG_DST_PORTf_GET(r) ((((r).higig[1]) >> 11) & 0x1f) +#define HIGIG_DST_PORTf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x1f << 11)) | ((((uint32_t)f) & 0x1f) << 11)) +#define HIGIG_SRC_PORT_TGIDf_GET(r) ((((r).higig[1]) >> 16) & 0x3f) +#define HIGIG_SRC_PORT_TGIDf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x3f << 16)) | ((((uint32_t)f) & 0x3f) << 16)) +#define HIGIG_PFMf_GET(r) ((((r).higig[1]) >> 22) & 0x3) +#define HIGIG_PFMf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x3 << 22)) | ((((uint32_t)f) & 0x3) << 22)) +#define HIGIG_OPCODEf_GET(r) ((((r).higig[1]) >> 24) & 0x7) +#define HIGIG_OPCODEf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x7 << 24)) | ((((uint32_t)f) & 0x7) << 24)) +#define HIGIG_SRC_MODID_LSf_GET(r) ((((r).higig[1]) >> 27) & 0x1f) +#define HIGIG_SRC_MODID_LSf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x1f << 27)) | ((((uint32_t)f) & 0x1f) << 27)) +#define HIGIG_VTAGf_GET(r) (((r).higig[0]) & 0xffff) +#define HIGIG_VTAGf_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff)) +#define HIGIG_DST_MODID_6f_GET(r) ((((r).higig[0]) >> 16) & 0x1) +#define HIGIG_DST_MODID_6f_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0x1 << 16)) | ((((uint32_t)f) & 0x1) << 16)) +#define HIGIG_SRC_MODID_6f_GET(r) ((((r).higig[0]) >> 17) & 0x1) +#define HIGIG_SRC_MODID_6f_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0x1 << 17)) | ((((uint32_t)f) & 0x1) << 17)) +#define HIGIG_HDR_EXT_LENf_GET(r) ((((r).higig[0]) >> 18) & 0x7) +#define HIGIG_HDR_EXT_LENf_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0x7 << 18)) | ((((uint32_t)f) & 0x7) << 18)) +#define HIGIG_CNG1f_GET(r) ((((r).higig[0]) >> 21) & 0x1) +#define HIGIG_CNG1f_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0x1 << 21)) | ((((uint32_t)f) & 0x1) << 21)) +#define HIGIG_HGIf_GET(r) ((((r).higig[0]) >> 22) & 0x3) +#define HIGIG_HGIf_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0x3 << 22)) | ((((uint32_t)f) & 0x3) << 22)) +#define HIGIG_STARTf_GET(r) ((((r).higig[0]) >> 24) & 0xff) +#define HIGIG_STARTf_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0xff << 24)) | ((((uint32_t)f) & 0xff) << 24)) + +/******************************************************************************* + * End of 'HIGIG' + ******************************************************************************/ + + + + +/******************************************************************************* + * SWFORMAT: HIGIG2 + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +#define HIGIG2_OFFSET 0x00000000 + +#define HIGIG2_BLKACC () + +#define HIGIG2_SIZE 16 + +/* + * This structure should be used to declare and program HIGIG2. + * + */ +typedef union HIGIG2_s { + uint32_t v[4]; + uint32_t higig2[4]; + uint32_t _higig2; +} HIGIG2_t; + +#define HIGIG2_CLR(r) sal_memset(&((r).higig2[0]), 0, sizeof(HIGIG2_t)) +#define HIGIG2_SET(r,i,d) (r).higig2[i] = d +#define HIGIG2_GET(r,i) (r).higig2[i] + +/* + * These macros can be used to access individual fields. + * + */ +#define HIGIG2_PPD_DATAf_GET(r,a) bcmdrd_field_be_get((r).higig2,4,0,63,a) +#define HIGIG2_PPD_DATAf_SET(r,a) bcmdrd_field_be_set((r).higig2,4,0,63,a) +#define HIGIG2_PPD0_RSVD_4_0f_GET(r) (((r).higig2[3]) & 0x1f) +#define HIGIG2_PPD0_RSVD_4_0f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1f)) | (((uint32_t)f) & 0x1f)) +#define HIGIG2_PPD0_HDR_EXT_LENf_GET(r) ((((r).higig2[3]) >> 5) & 0x7) +#define HIGIG2_PPD0_HDR_EXT_LENf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 5)) | ((((uint32_t)f) & 0x7) << 5)) +#define HIGIG2_PPD0_OPCODEf_GET(r) ((((r).higig2[3]) >> 8) & 0x7) +#define HIGIG2_PPD0_OPCODEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 8)) | ((((uint32_t)f) & 0x7) << 8)) +#define HIGIG2_PPD0_PRESERVE_DOT1Pf_GET(r) ((((r).higig2[3]) >> 11) & 0x1) +#define HIGIG2_PPD0_PRESERVE_DOT1Pf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 11)) | ((((uint32_t)f) & 0x1) << 11)) +#define HIGIG2_PPD0_PRESERVE_DSCPf_GET(r) ((((r).higig2[3]) >> 12) & 0x1) +#define HIGIG2_PPD0_PRESERVE_DSCPf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 12)) | ((((uint32_t)f) & 0x1) << 12)) +#define HIGIG2_PPD0_SRC_Tf_GET(r) ((((r).higig2[3]) >> 13) & 0x1) +#define HIGIG2_PPD0_SRC_Tf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 13)) | ((((uint32_t)f) & 0x1) << 13)) +#define HIGIG2_PPD0_PFMf_GET(r) ((((r).higig2[3]) >> 14) & 0x3) +#define HIGIG2_PPD0_PFMf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 14)) | ((((uint32_t)f) & 0x3) << 14)) +#define HIGIG2_PPD0_VID_LOWf_GET(r) ((((r).higig2[3]) >> 16) & 0xff) +#define HIGIG2_PPD0_VID_LOWf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xff << 16)) | ((((uint32_t)f) & 0xff) << 16)) +#define HIGIG2_PPD0_VID_HIGHf_GET(r) ((((r).higig2[3]) >> 24) & 0xff) +#define HIGIG2_PPD0_VID_HIGHf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xff << 24)) | ((((uint32_t)f) & 0xff) << 24)) +#define HIGIG2_PPD0_REP_IDf_GET(r) (((r).higig2[2]) & 0x7ffff) +#define HIGIG2_PPD0_REP_IDf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x7ffff)) | (((uint32_t)f) & 0x7ffff)) +#define HIGIG2_PPD0_VC_LABELf_GET(r) (((r).higig2[2]) & 0xffff) +#define HIGIG2_PPD0_VC_LABELf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff)) +#define HIGIG2_PPD0_MIRROR_CLASSIFICATION_TAGf_GET(r) ((((r).higig2[2]) >> 4) & 0xffff) +#define HIGIG2_PPD0_MIRROR_CLASSIFICATION_TAGf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff << 4)) | ((((uint32_t)f) & 0xffff) << 4)) +#define HIGIG2_PPD0_ORIG_SRC_PORTf_GET(r) ((((r).higig2[2]) >> 4) & 0xff) +#define HIGIG2_PPD0_ORIG_SRC_PORTf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xff << 4)) | ((((uint32_t)f) & 0xff) << 4)) +#define HIGIG2_PPD0_ORIG_SRC_MODIDf_GET(r) ((((r).higig2[2]) >> 12) & 0xff) +#define HIGIG2_PPD0_ORIG_SRC_MODIDf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xff << 12)) | ((((uint32_t)f) & 0xff) << 12)) +#define HIGIG2_PPD0_VC_LABEL_19_16f_GET(r) ((((r).higig2[2]) >> 16) & 0xf) +#define HIGIG2_PPD0_VC_LABEL_19_16f_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xf << 16)) | ((((uint32_t)f) & 0xf) << 16)) +#define HIGIG2_PPD0_LABEL_PRESENTf_GET(r) ((((r).higig2[2]) >> 20) & 0x1) +#define HIGIG2_PPD0_LABEL_PRESENTf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 20)) | ((((uint32_t)f) & 0x1) << 20)) +#define HIGIG2_PPD0_L3f_GET(r) ((((r).higig2[2]) >> 21) & 0x1) +#define HIGIG2_PPD0_L3f_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 21)) | ((((uint32_t)f) & 0x1) << 21)) +#define HIGIG2_PPD0_LABEL_OVERLAY_TYPEf_GET(r) ((((r).higig2[2]) >> 22) & 0x3) +#define HIGIG2_PPD0_LABEL_OVERLAY_TYPEf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x3 << 22)) | ((((uint32_t)f) & 0x3) << 22)) +#define HIGIG2_PPD0_MIRRORf_GET(r) ((((r).higig2[2]) >> 24) & 0x1) +#define HIGIG2_PPD0_MIRRORf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 24)) | ((((uint32_t)f) & 0x1) << 24)) +#define HIGIG2_PPD0_MIRROR_DONEf_GET(r) ((((r).higig2[2]) >> 25) & 0x1) +#define HIGIG2_PPD0_MIRROR_DONEf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 25)) | ((((uint32_t)f) & 0x1) << 25)) +#define HIGIG2_PPD0_MIRROR_ONLYf_GET(r) ((((r).higig2[2]) >> 26) & 0x1) +#define HIGIG2_PPD0_MIRROR_ONLYf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 26)) | ((((uint32_t)f) & 0x1) << 26)) +#define HIGIG2_PPD0_INGRESS_TAGGEDf_GET(r) ((((r).higig2[2]) >> 27) & 0x1) +#define HIGIG2_PPD0_INGRESS_TAGGEDf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 27)) | ((((uint32_t)f) & 0x1) << 27)) +#define HIGIG2_PPD0_DST_TGIDf_GET(r) ((((r).higig2[2]) >> 28) & 0x7) +#define HIGIG2_PPD0_DST_TGIDf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x7 << 28)) | ((((uint32_t)f) & 0x7) << 28)) +#define HIGIG2_PPD0_DST_Tf_GET(r) ((((r).higig2[2]) >> 31) & 0x1) +#define HIGIG2_PPD0_DST_Tf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31)) +#define HIGIG2_PPD1_RSVD_4_0f_GET(r) (((r).higig2[3]) & 0x1f) +#define HIGIG2_PPD1_RSVD_4_0f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1f)) | (((uint32_t)f) & 0x1f)) +#define HIGIG2_PPD1_HDR_EXT_LENf_GET(r) ((((r).higig2[3]) >> 5) & 0x7) +#define HIGIG2_PPD1_HDR_EXT_LENf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 5)) | ((((uint32_t)f) & 0x7) << 5)) +#define HIGIG2_PPD1_OPCODEf_GET(r) ((((r).higig2[3]) >> 8) & 0x7) +#define HIGIG2_PPD1_OPCODEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 8)) | ((((uint32_t)f) & 0x7) << 8)) +#define HIGIG2_PPD1_RSVD_12_11f_GET(r) ((((r).higig2[3]) >> 11) & 0x3) +#define HIGIG2_PPD1_RSVD_12_11f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 11)) | ((((uint32_t)f) & 0x3) << 11)) +#define HIGIG2_PPD1_SRC_Tf_GET(r) ((((r).higig2[3]) >> 13) & 0x1) +#define HIGIG2_PPD1_SRC_Tf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 13)) | ((((uint32_t)f) & 0x1) << 13)) +#define HIGIG2_PPD1_PFMf_GET(r) ((((r).higig2[3]) >> 14) & 0x3) +#define HIGIG2_PPD1_PFMf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 14)) | ((((uint32_t)f) & 0x3) << 14)) +#define HIGIG2_PPD1_VID_LOWf_GET(r) ((((r).higig2[3]) >> 16) & 0xff) +#define HIGIG2_PPD1_VID_LOWf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xff << 16)) | ((((uint32_t)f) & 0xff) << 16)) +#define HIGIG2_PPD1_VID_HIGHf_GET(r) ((((r).higig2[3]) >> 24) & 0xff) +#define HIGIG2_PPD1_VID_HIGHf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xff << 24)) | ((((uint32_t)f) & 0xff) << 24)) +#define HIGIG2_PPD1_RSVD_48_32f_GET(r) (((r).higig2[2]) & 0xffff) +#define HIGIG2_PPD1_RSVD_48_32f_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff)) +#define HIGIG2_PPD1_CLASSIFICATION_TAGf_GET(r) ((((r).higig2[2]) >> 16) & 0xffff) +#define HIGIG2_PPD1_CLASSIFICATION_TAGf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff << 16)) | ((((uint32_t)f) & 0xffff) << 16)) +#define HIGIG2_PPD2_SOURCE_TYPEf_GET(r) (((r).higig2[3]) & 0x1) +#define HIGIG2_PPD2_SOURCE_TYPEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1)) | (((uint32_t)f) & 0x1)) +#define HIGIG2_PPD2_DEST_TYPEf_GET(r) ((((r).higig2[3]) >> 1) & 0x1) +#define HIGIG2_PPD2_DEST_TYPEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 1)) | ((((uint32_t)f) & 0x1) << 1)) +#define HIGIG2_PPD2_PRESERVE_DOT1Pf_GET(r) ((((r).higig2[3]) >> 2) & 0x1) +#define HIGIG2_PPD2_PRESERVE_DOT1Pf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 2)) | ((((uint32_t)f) & 0x1) << 2)) +#define HIGIG2_PPD2_PRESERVE_DSCPf_GET(r) ((((r).higig2[3]) >> 3) & 0x1) +#define HIGIG2_PPD2_PRESERVE_DSCPf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 3)) | ((((uint32_t)f) & 0x1) << 3)) +#define HIGIG2_PPD2_VNI_HIGHf_GET(r) ((((r).higig2[3]) >> 4) & 0x3) +#define HIGIG2_PPD2_VNI_HIGHf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 4)) | ((((uint32_t)f) & 0x3) << 4)) +#define HIGIG2_PPD2_RSVD_7_6f_GET(r) ((((r).higig2[3]) >> 6) & 0x3) +#define HIGIG2_PPD2_RSVD_7_6f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 6)) | ((((uint32_t)f) & 0x3) << 6)) +#define HIGIG2_PPD2_OPCODEf_GET(r) ((((r).higig2[3]) >> 8) & 0x7) +#define HIGIG2_PPD2_OPCODEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 8)) | ((((uint32_t)f) & 0x7) << 8)) +#define HIGIG2_PPD2_REP_ID_17_16f_GET(r) ((((r).higig2[3]) >> 8) & 0x3) +#define HIGIG2_PPD2_REP_ID_17_16f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 8)) | ((((uint32_t)f) & 0x3) << 8)) +#define HIGIG2_PPD2_RSVD_11f_GET(r) ((((r).higig2[3]) >> 11) & 0x1) +#define HIGIG2_PPD2_RSVD_11f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 11)) | ((((uint32_t)f) & 0x1) << 11)) +#define HIGIG2_PPD2_LAG_FAILOVERf_GET(r) ((((r).higig2[3]) >> 12) & 0x1) +#define HIGIG2_PPD2_LAG_FAILOVERf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 12)) | ((((uint32_t)f) & 0x1) << 12)) +#define HIGIG2_PPD2_DO_NOT_LEARNf_GET(r) ((((r).higig2[3]) >> 13) & 0x1) +#define HIGIG2_PPD2_DO_NOT_LEARNf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 13)) | ((((uint32_t)f) & 0x1) << 13)) +#define HIGIG2_PPD2_DO_NOT_MODIFYf_GET(r) ((((r).higig2[3]) >> 14) & 0x1) +#define HIGIG2_PPD2_DO_NOT_MODIFYf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 14)) | ((((uint32_t)f) & 0x1) << 14)) +#define HIGIG2_PPD2_MIRRORf_GET(r) ((((r).higig2[3]) >> 15) & 0x1) +#define HIGIG2_PPD2_MIRRORf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 15)) | ((((uint32_t)f) & 0x1) << 15)) +#define HIGIG2_PPD2_SOURCE_VPf_GET(r) ((((r).higig2[3]) >> 16) & 0xffff) +#define HIGIG2_PPD2_SOURCE_VPf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xffff << 16)) | ((((uint32_t)f) & 0xffff) << 16)) +#define HIGIG2_PPD2_DEST_VPf_GET(r) (((r).higig2[2]) & 0xffff) +#define HIGIG2_PPD2_DEST_VPf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff)) +#define HIGIG2_PPD2_REP_ID_15_0f_GET(r) (((r).higig2[2]) & 0xffff) +#define HIGIG2_PPD2_REP_ID_15_0f_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff)) +#define HIGIG2_PPD2_VNI_LOWf_GET(r) ((((r).higig2[2]) >> 16) & 0xff) +#define HIGIG2_PPD2_VNI_LOWf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xff << 16)) | ((((uint32_t)f) & 0xff) << 16)) +#define HIGIG2_PPD2_VNI_MIDf_GET(r) ((((r).higig2[2]) >> 24) & 0x3) +#define HIGIG2_PPD2_VNI_MIDf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x3 << 24)) | ((((uint32_t)f) & 0x3) << 24)) +#define HIGIG2_PPD2_FWD_TYPEf_GET(r) ((((r).higig2[2]) >> 26) & 0x1f) +#define HIGIG2_PPD2_FWD_TYPEf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1f << 26)) | ((((uint32_t)f) & 0x1f) << 26)) +#define HIGIG2_PPD2_MULTIPOINTf_GET(r) ((((r).higig2[2]) >> 31) & 0x1) +#define HIGIG2_PPD2_MULTIPOINTf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31)) +#define HIGIG2_PPD3_PPD3_CONTAINER_TYPEf_GET(r) (((r).higig2[3]) & 0xf) +#define HIGIG2_PPD3_PPD3_CONTAINER_TYPEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xf)) | (((uint32_t)f) & 0xf)) +#define HIGIG2_PPD3_RSVD_7_4f_GET(r) ((((r).higig2[3]) >> 4) & 0xf) +#define HIGIG2_PPD3_RSVD_7_4f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xf << 4)) | ((((uint32_t)f) & 0xf) << 4)) +#define HIGIG2_PPD3_OPCODEf_GET(r) ((((r).higig2[3]) >> 8) & 0x7) +#define HIGIG2_PPD3_OPCODEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 8)) | ((((uint32_t)f) & 0x7) << 8)) +#define HIGIG2_PPD3_SOURCE_TYPEf_GET(r) ((((r).higig2[3]) >> 11) & 0x1) +#define HIGIG2_PPD3_SOURCE_TYPEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 11)) | ((((uint32_t)f) & 0x1) << 11)) +#define HIGIG2_PPD3_RSVD_28f_GET(r) ((((r).higig2[3]) >> 12) & 0x1) +#define HIGIG2_PPD3_RSVD_28f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 12)) | ((((uint32_t)f) & 0x1) << 12)) +#define HIGIG2_PPD3_DO_NOT_LEARNf_GET(r) ((((r).higig2[3]) >> 13) & 0x1) +#define HIGIG2_PPD3_DO_NOT_LEARNf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 13)) | ((((uint32_t)f) & 0x1) << 13)) +#define HIGIG2_PPD3_PRESERVE_DOT1Pf_GET(r) ((((r).higig2[3]) >> 14) & 0x1) +#define HIGIG2_PPD3_PRESERVE_DOT1Pf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 14)) | ((((uint32_t)f) & 0x1) << 14)) +#define HIGIG2_PPD3_PRESERVE_DSCPf_GET(r) ((((r).higig2[3]) >> 15) & 0x1) +#define HIGIG2_PPD3_PRESERVE_DSCPf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 15)) | ((((uint32_t)f) & 0x1) << 15)) +#define HIGIG2_PPD3_SOURCE_INFOf_GET(r) ((((r).higig2[3]) >> 16) & 0xffff) +#define HIGIG2_PPD3_SOURCE_INFOf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xffff << 16)) | ((((uint32_t)f) & 0xffff) << 16)) +#define HIGIG2_PPD3_PPD3_DATA_CONTAINERf_GET(r) ((r).higig2[2]) +#define HIGIG2_PPD3_PPD3_DATA_CONTAINERf_SET(r,f) (r).higig2[2]=((uint32_t)f) +#define HIGIG2_PPD_TYPEf_GET(r) (((r).higig2[1]) & 0x7) +#define HIGIG2_PPD_TYPEf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0x7)) | (((uint32_t)f) & 0x7)) +#define HIGIG2_CCf_GET(r) ((((r).higig2[1]) >> 3) & 0x3) +#define HIGIG2_CCf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0x3 << 3)) | ((((uint32_t)f) & 0x3) << 3)) +#define HIGIG2_EHVf_GET(r) ((((r).higig2[1]) >> 5) & 0x1) +#define HIGIG2_EHVf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0x1 << 5)) | ((((uint32_t)f) & 0x1) << 5)) +#define HIGIG2_DPf_GET(r) ((((r).higig2[1]) >> 6) & 0x3) +#define HIGIG2_DPf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0x3 << 6)) | ((((uint32_t)f) & 0x3) << 6)) +#define HIGIG2_LBIDf_GET(r) ((((r).higig2[1]) >> 8) & 0xff) +#define HIGIG2_LBIDf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0xff << 8)) | ((((uint32_t)f) & 0xff) << 8)) +#define HIGIG2_SRC_PIDf_GET(r) ((((r).higig2[1]) >> 16) & 0xff) +#define HIGIG2_SRC_PIDf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0xff << 16)) | ((((uint32_t)f) & 0xff) << 16)) +#define HIGIG2_SRC_MODIDf_GET(r) ((((r).higig2[1]) >> 24) & 0xff) +#define HIGIG2_SRC_MODIDf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0xff << 24)) | ((((uint32_t)f) & 0xff) << 24)) +#define HIGIG2_DST_PORT_MGIDLf_GET(r) (((r).higig2[0]) & 0xff) +#define HIGIG2_DST_PORT_MGIDLf_SET(r,f) (r).higig2[0]=(((r).higig2[0] & ~((uint32_t)0xff)) | (((uint32_t)f) & 0xff)) +#define HIGIG2_DST_MODID_MGIDHf_GET(r) ((((r).higig2[0]) >> 8) & 0xff) +#define HIGIG2_DST_MODID_MGIDHf_SET(r,f) (r).higig2[0]=(((r).higig2[0] & ~((uint32_t)0xff << 8)) | ((((uint32_t)f) & 0xff) << 8)) +#define HIGIG2_TCf_GET(r) ((((r).higig2[0]) >> 16) & 0xf) +#define HIGIG2_TCf_SET(r,f) (r).higig2[0]=(((r).higig2[0] & ~((uint32_t)0xf << 16)) | ((((uint32_t)f) & 0xf) << 16)) +#define HIGIG2_MCSTf_GET(r) ((((r).higig2[0]) >> 20) & 0x1) +#define HIGIG2_MCSTf_SET(r,f) (r).higig2[0]=(((r).higig2[0] & ~((uint32_t)0x1 << 20)) | ((((uint32_t)f) & 0x1) << 20)) +#define HIGIG2_STARTf_GET(r) ((((r).higig2[0]) >> 24) & 0xff) +#define HIGIG2_STARTf_SET(r,f) (r).higig2[0]=(((r).higig2[0] & ~((uint32_t)0xff << 24)) | ((((uint32_t)f) & 0xff) << 24)) + +/******************************************************************************* + * End of 'HIGIG2' + ******************************************************************************/ + + + + +/******************************************************************************* + * + * HIGIG SYMBOL TABLE + * + ******************************************************************************/ + +extern bcmdrd_symbols_t higig_symbols; + + +#endif /* BCMPKT_HIGIG_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h new file mode 100644 index 000000000000..c61ec2411891 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h @@ -0,0 +1,139 @@ +/*! \file bcmpkt_lbhdr.h + * + * Loopback header (LBHDR, called LOOPBACK_MH in hardware) access interface. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_LBHDR_H +#define BCMPKT_LBHDR_H + +#include +#include +#include +#include +#include + +/*! TX Packet MetaData size (bytes). */ +#define BCMPKT_LBHDR_SIZE_BYTES 16 +/*! TX Packet MetaData size (words). */ +#define BCMPKT_LBHDR_SIZE_WORDS 4 + +/*! + * \name LBHDR Dumping flags. + * \anchor BCMPKT_LBHDR_DUMP_F_XXX + */ +/*! \{ */ +/*! + * Dump all fields contents. + */ +#define BCMPKT_LBHDR_DUMP_F_ALL 0 +/*! + * Dump none zero field content only. + */ +#define BCMPKT_LBHDR_DUMP_F_NONE_ZERO 1 +/*! \} */ + +/*! + * \name BCMPKT_LBHDR_START encodings. + * \anchor BCMPKT_LBHDR_START_XXX + */ +/*! \{ */ +/*! + * Loopback header start of frame indicator's value. + */ +#define BCMPKT_LBHDR_START_IND 251 +/*! \} */ + +/*! \brief LBHDR field ID supported bit array. + * Array of bits indicating whether a LBHDR field ID is supported by a given + * device type. + */ +typedef struct bcmpkt_lbhdr_fid_support_s { + /*! Field ID bitmap container */ + SHR_BITDCLNAME(fbits, BCMPKT_LBHDR_FID_COUNT); +} bcmpkt_lbhdr_fid_support_t; + +/*! + * \name Utility macros for \ref bcmpkt_lbhdr_fid_support_t. + * \anchor BCMPKT_LBHDR_SUPPORT_OPS + */ +/*! \{ */ +/*! + * Macro to get a field ID's supported status. + * + * \retval zero Not supported + * \retval non-zero Supported + */ +#define BCMPKT_LBHDR_FID_SUPPORT_GET(_support, _fid) \ + SHR_BITGET(((_support).fbits), (_fid)) + +/*! + * Iterate over all supported LBHDR field IDs in the \c _support. + */ +#define BCMPKT_LBHDR_FID_SUPPORT_ITER(_support, _fid) \ + for(_fid = 0; _fid < BCMPKT_LBHDR_FID_COUNT; _fid++) \ + if(BCMPKT_LBHDR_FID_SUPPORT_GET(_support, _fid)) +/*! \} */ + +/*! + * \brief Get field name for a given LBHDR field ID. + * + * \param [in] fid LBHDR field ID, refer to \ref BCMPKT_LBHDR_XXX. + * \param [out] name LBHDR field name string. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + */ +extern int +bcmpkt_lbhdr_field_name_get(int fid, char **name); + +/*! + * \brief Get field ID for a given LBHDR field name. + * + * \param [in] name LBHDR field name string. + * \param [out] fid LBHDR Field ID. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_NOT_FOUND Not found the name. + */ +extern int +bcmpkt_lbhdr_field_id_get(char* name, int *fid); + +/*! + * \brief Get supported LBHDR field IDs for a given device type. + * + * This function returns a structure with information about the LBHDR field IDs + * a given device type supports. + * + * Use \ref BCMPKT_LBHDR_FID_SUPPORT_GET on the returned structure to get the + * supported status of a specific field ID. + * + * \param [in] dev_type Device type. + * \param [out] support Field ID supported status bitmap. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_INTERNAL API internal error. + */ +extern int +bcmpkt_lbhdr_fid_support_get(bcmdrd_dev_type_t dev_type, + bcmpkt_lbhdr_fid_support_t *support); + +#endif /* BCMPKT_LBHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h new file mode 100644 index 000000000000..85ded0cb45bc --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h @@ -0,0 +1,362 @@ +#ifndef BCMPKT_LBHDR_DEFS_H +#define BCMPKT_LBHDR_DEFS_H +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides field macros for the Packet Loopback HeaDeR (LBHDR, called + * LOOPBACK_MH in hardware.) access. + * + ******************************************************************************/ + +/*! + * \name Loopback module header field IDs. + * \anchor BCMPKT_LBHDR_XXX + */ +/*! \{ */ +/*! Invalid BCMPKT_LBHDR FID indicator */ +#define BCMPKT_LBHDR_FID_INVALID -1 +/*! Start of frame indicator. */ +#define BCMPKT_LBHDR_START 0 +/*! + * 64 Header Types Supported. 1 means Packets from CPU with SOBMH header format + * to Passthru NLF + */ +#define BCMPKT_LBHDR_HEADER_TYPE 1 +/*! + * Indicates the loopback COS queue and is used by the MMU for per + * application group accounting for packets received from the internal + * loopback port. This must be put the PBI.INPUT_PRIORITY whenever the + * source port is the loopback port. + */ +#define BCMPKT_LBHDR_INPUT_PRIORITY 2 +/*! Pointer to CPU_PACKET_PROFILE_1/2 registers. */ +#define BCMPKT_LBHDR_PKT_PROFILE 3 +/*! Triggers capture of intermediate packet processing result of this packet. */ +#define BCMPKT_LBHDR_VISIBILITY_PKT 4 +/*! + * Source field for the packet. + * Contents of this field are determined by value of SOURCE_TYPE. + * SOURCE_TYPE=0x0: + * [15:0] SOURCE_VP + * SOURCE_TYPE=0x1: + * [15:8] SRC_MODID + * [7:0] SRC_PORT + */ +#define BCMPKT_LBHDR_SOURCE 5 +/*! Indicates contents of SOURCE field. 0x1: SGPP 0x0: SVP. */ +#define BCMPKT_LBHDR_SOURCE_TYPE 6 +/*! CNG Bits */ +#define BCMPKT_LBHDR_TRILL_AC_CNG 7 +/*! Traffic class */ +#define BCMPKT_LBHDR_TRILL_AC_TC 8 +/*! Do Not Learn Bit */ +#define BCMPKT_LBHDR_TRILL_AC_DO_NOT_LEARN 9 +/*! CNG Bits */ +#define BCMPKT_LBHDR_TRILL_NW_CNG 10 +/*! Traffic class */ +#define BCMPKT_LBHDR_TRILL_NW_TC 11 +/*! Destination type (see encodings). Valid only if SUBFLOW_TYPE=CPU_TX_PROC. */ +#define BCMPKT_LBHDR_ETH_DEST_TYPE 12 +/*! + * Destination based on DESTINATION_TYPE. (For ECMP/ECMP_MEMBER cases, this field + * contains ECMP_GROUP_PTR). Valid only if SUBFLOW_TYPE=CPU_TX_PROC. + */ +#define BCMPKT_LBHDR_ETH_DEST 13 +/*! Drop precedence for the apcket. Valid only if SUBFLOW_TYPE=CPU_TX_PROC. */ +#define BCMPKT_LBHDR_ETH_DP 14 +/*! + * ECMP member ID for case where DESTINATION_TYPE=ECMP_MEMBER. Only valid for single + * level ECMP. Valid only if SUBFLOW_TYPE=CPU_TX_PROC. + */ +#define BCMPKT_LBHDR_ETH_ECMP_MEMBER_ID 15 +/*! + * Internal Congestion to be used for the packet. Valid only if + * SUBFLOW_TYPE=CPU_TX_PROC. + */ +#define BCMPKT_LBHDR_ETH_INT_CN 16 +/*! + * Internal priority to be used for the packet. Valid only if + * SUBFLOW_TYPE=CPU_TX_PROC. + */ +#define BCMPKT_LBHDR_ETH_INT_PRI 17 +/*! + * Allows software to select load balancing bitmap for non-unicast packets. + * valid only if MCAST_LB_INDEX_VLD=1. + */ +#define BCMPKT_LBHDR_ETH_MCAST_LB_INDEX 18 +/*! If set, MCAST_LB_INDEX field is valid. */ +#define BCMPKT_LBHDR_ETH_MCAST_LB_INDEX_VLD 19 +/*! + * Device Port Number which is to be used for processing packet in Ingress + * Pipeline. + */ +#define BCMPKT_LBHDR_ETH_PP_PORT 20 +/*! + * If set, the qos fields (INT, PRI, etc) are specified in the header and + * override the pre-IFP assignment. Else, derived based on packet lookups. + * Valid only if SUBFLOW_TYPE=CPU_TX_PROC. + */ +#define BCMPKT_LBHDR_ETH_QOS_FIELDS_VLD 21 +/*! + * Indicates whether packets should be treated as routed or bridged. Valid + * only if SUBFLOW_TYPE=CPU_TX_PROC. + */ +#define BCMPKT_LBHDR_ETH_ROUTED_PKT 22 +/*! Identifies sub-flow (see encodings). */ +#define BCMPKT_LBHDR_ETH_SUBFLOW_TYPE 23 +/*! VRF */ +#define BCMPKT_LBHDR_ETHERNET_VRF 24 +/*! VRF valid */ +#define BCMPKT_LBHDR_ETHERNET_VRF_VALID 25 +/*! MUST Always be 0 */ +#define BCMPKT_LBHDR_ZERO 26 +/*! + * Device Port Number which is to be used for processing packet in Ingress + * Pipeline. + */ +#define BCMPKT_LBHDR_PP_PORT 27 +/*! + * Indicates whether packets should be treated as routed or bridged. Valid + * only if SUBFLOW_TYPE=CPU_TX_PROC. + */ +#define BCMPKT_LBHDR_ROUTED_PKT 28 +/*! VRF */ +#define BCMPKT_LBHDR_VRF 29 +/*! VRF valid */ +#define BCMPKT_LBHDR_VRF_VALID 30 +/*! Qos field valid */ +#define BCMPKT_LBHDR_QOS_FIELD_VALID 31 +/*! Opaque object */ +#define BCMPKT_LBHDR_OPAQUE_OBJECT 32 +/*! Qos field ethernet */ +#define BCMPKT_LBHDR_QOS_FIELD_ETH 33 +/*! Internal priority ethernet */ +#define BCMPKT_LBHDR_INT_PRI_ETH 34 +/*! Internal CN ethernet */ +#define BCMPKT_LBHDR_INT_CN_ETH 35 +/*! CNG ethernet */ +#define BCMPKT_LBHDR_CNG_ETH 36 +/*! */ +#define BCMPKT_LBHDR_PKT_PROFILE_MD_ETH 37 +/*! */ +#define BCMPKT_LBHDR_QOS_FIELD_VALID_MD_ETH 38 +/*! */ +#define BCMPKT_LBHDR_PP_PORT_MD_ETH 39 +/*! */ +#define BCMPKT_LBHDR_DESTINATION_MD_ETH 40 +/*! */ +#define BCMPKT_LBHDR_SVTAG_TX_PRESENT_MD_ETH 41 +/*! */ +#define BCMPKT_LBHDR_EXTENDED_DELETE_ENABLE_MD_ETH 42 +/*! */ +#define BCMPKT_LBHDR_EXTENDED_DELETE_BYTE_COUNT_MD_ETH 43 +/*! */ +#define BCMPKT_LBHDR_IFA_AT_OUTER_LAYER_MD_ETH 44 +/*! */ +#define BCMPKT_LBHDR_OPAQUE_OBJECT_MD_ETH 45 +/*! */ +#define BCMPKT_LBHDR_QOS_FIELD_ETH_MD_ETH 46 +/*! */ +#define BCMPKT_LBHDR_INPUT_PRIORITY_MD_ETH 47 +/*! */ +#define BCMPKT_LBHDR_CNP 48 +/*! */ +#define BCMPKT_LBHDR_FLIP_SECOND_PASS_L2_DENSE_MODE_ADDRESS 49 +/*! */ +#define BCMPKT_LBHDR_VFI_VALID_MD_ETH 50 +/*! */ +#define BCMPKT_LBHDR_VFI_MD_ETH 51 +/*! */ +#define BCMPKT_LBHDR_TRUNCATE_MD_ETH 52 +/*! */ +#define BCMPKT_LBHDR_TRUNCATE_OFFSET_MD_ETH 53 +/*! */ +#define BCMPKT_LBHDR_SVP_MD_ETH 54 +/*! LBHDR FIELD ID NUMBER */ +#define BCMPKT_LBHDR_FID_COUNT 55 +/*! \} */ + +/*! LBHDR field name strings for debugging. */ +#define BCMPKT_LBHDR_FIELD_NAME_MAP_INIT \ + {"START", BCMPKT_LBHDR_START},\ + {"HEADER_TYPE", BCMPKT_LBHDR_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCMPKT_LBHDR_INPUT_PRIORITY},\ + {"PKT_PROFILE", BCMPKT_LBHDR_PKT_PROFILE},\ + {"VISIBILITY_PKT", BCMPKT_LBHDR_VISIBILITY_PKT},\ + {"SOURCE", BCMPKT_LBHDR_SOURCE},\ + {"SOURCE_TYPE", BCMPKT_LBHDR_SOURCE_TYPE},\ + {"TRILL_AC::CNG", BCMPKT_LBHDR_TRILL_AC_CNG},\ + {"TRILL_AC::TC", BCMPKT_LBHDR_TRILL_AC_TC},\ + {"TRILL_AC::DO_NOT_LEARN", BCMPKT_LBHDR_TRILL_AC_DO_NOT_LEARN},\ + {"TRILL_NW::CNG", BCMPKT_LBHDR_TRILL_NW_CNG},\ + {"TRILL_NW::TC", BCMPKT_LBHDR_TRILL_NW_TC},\ + {"ETH::DEST_TYPE", BCMPKT_LBHDR_ETH_DEST_TYPE},\ + {"ETH::DEST", BCMPKT_LBHDR_ETH_DEST},\ + {"ETH::DP", BCMPKT_LBHDR_ETH_DP},\ + {"ETH::ECMP_MEMBER_ID", BCMPKT_LBHDR_ETH_ECMP_MEMBER_ID},\ + {"ETH::INT_CN", BCMPKT_LBHDR_ETH_INT_CN},\ + {"ETH::INT_PRI", BCMPKT_LBHDR_ETH_INT_PRI},\ + {"ETH::MCAST_LB_INDEX", BCMPKT_LBHDR_ETH_MCAST_LB_INDEX},\ + {"ETH::MCAST_LB_INDEX_VLD", BCMPKT_LBHDR_ETH_MCAST_LB_INDEX_VLD},\ + {"ETH::PP_PORT", BCMPKT_LBHDR_ETH_PP_PORT},\ + {"ETH::QOS_FIELDS_VLD", BCMPKT_LBHDR_ETH_QOS_FIELDS_VLD},\ + {"ETH::ROUTED_PKT", BCMPKT_LBHDR_ETH_ROUTED_PKT},\ + {"ETH::SUBFLOW_TYPE", BCMPKT_LBHDR_ETH_SUBFLOW_TYPE},\ + {"ETHERNET::VRF", BCMPKT_LBHDR_ETHERNET_VRF},\ + {"ETHERNET::VRF_VALID", BCMPKT_LBHDR_ETHERNET_VRF_VALID},\ + {"ZERO", BCMPKT_LBHDR_ZERO},\ + {"PP_PORT", BCMPKT_LBHDR_PP_PORT},\ + {"ROUTED_PKT", BCMPKT_LBHDR_ROUTED_PKT},\ + {"VRF", BCMPKT_LBHDR_VRF},\ + {"VRF_VALID", BCMPKT_LBHDR_VRF_VALID},\ + {"QOS_FIELD_VALID", BCMPKT_LBHDR_QOS_FIELD_VALID},\ + {"OPAQUE_OBJECT", BCMPKT_LBHDR_OPAQUE_OBJECT},\ + {"QOS_FIELD_ETH", BCMPKT_LBHDR_QOS_FIELD_ETH},\ + {"INT_PRI_ETH", BCMPKT_LBHDR_INT_PRI_ETH},\ + {"INT_CN_ETH", BCMPKT_LBHDR_INT_CN_ETH},\ + {"CNG_ETH", BCMPKT_LBHDR_CNG_ETH},\ + {"PKT_PROFILE_MD_ETH", BCMPKT_LBHDR_PKT_PROFILE_MD_ETH},\ + {"QOS_FIELD_VALID_MD_ETH", BCMPKT_LBHDR_QOS_FIELD_VALID_MD_ETH},\ + {"PP_PORT_MD_ETH", BCMPKT_LBHDR_PP_PORT_MD_ETH},\ + {"DESTINATION_MD_ETH", BCMPKT_LBHDR_DESTINATION_MD_ETH},\ + {"SVTAG_TX_PRESENT_MD_ETH", BCMPKT_LBHDR_SVTAG_TX_PRESENT_MD_ETH},\ + {"EXTENDED_DELETE_ENABLE_MD_ETH", BCMPKT_LBHDR_EXTENDED_DELETE_ENABLE_MD_ETH},\ + {"EXTENDED_DELETE_BYTE_COUNT_MD_ETH", BCMPKT_LBHDR_EXTENDED_DELETE_BYTE_COUNT_MD_ETH},\ + {"IFA_AT_OUTER_LAYER_MD_ETH", BCMPKT_LBHDR_IFA_AT_OUTER_LAYER_MD_ETH},\ + {"OPAQUE_OBJECT_MD_ETH", BCMPKT_LBHDR_OPAQUE_OBJECT_MD_ETH},\ + {"QOS_FIELD_ETH_MD_ETH", BCMPKT_LBHDR_QOS_FIELD_ETH_MD_ETH},\ + {"INPUT_PRIORITY_MD_ETH", BCMPKT_LBHDR_INPUT_PRIORITY_MD_ETH},\ + {"CNP", BCMPKT_LBHDR_CNP},\ + {"FLIP_SECOND_PASS_L2_DENSE_MODE_ADDRESS", BCMPKT_LBHDR_FLIP_SECOND_PASS_L2_DENSE_MODE_ADDRESS},\ + {"VFI_VALID_MD_ETH", BCMPKT_LBHDR_VFI_VALID_MD_ETH},\ + {"VFI_MD_ETH", BCMPKT_LBHDR_VFI_MD_ETH},\ + {"TRUNCATE_MD_ETH", BCMPKT_LBHDR_TRUNCATE_MD_ETH},\ + {"TRUNCATE_OFFSET_MD_ETH", BCMPKT_LBHDR_TRUNCATE_OFFSET_MD_ETH},\ + {"SVP_MD_ETH", BCMPKT_LBHDR_SVP_MD_ETH},\ + {"fid count", BCMPKT_LBHDR_FID_COUNT} + +/*! + * \name BCMPKT_LBHDR_HEADER_TYPE encodings. + * \anchor BCMPKT_LBHDR_HEADER_TYPE_XXX + */ +/*! \{ */ +/*! MinM, L2GRE and VXLAN tunnel terminated packet */ +#define BCMPKT_LBHDR_HEADER_T_TUNNEL_TERM 0 +/*! Trill Network Packets to Passthru NLF */ +#define BCMPKT_LBHDR_HEADER_T_TRILL_NW 1 +/*! Trill Access Layer Packets to Passthru NLF */ +#define BCMPKT_LBHDR_HEADER_T_TRILL_AC 2 +/*! Process as if it was received on front panel port. */ +#define BCMPKT_LBHDR_HEADER_T_ETHERNET 3 +/*! MAC in MAC packets to Passthru NLF */ +#define BCMPKT_LBHDR_HEADER_T_MIM 4 +/*! QCN Packets to Passthru NLF */ +#define BCMPKT_LBHDR_HEADER_T_QCN 5 +/*! Generic loopback */ +#define BCMPKT_LBHDR_HEADER_T_GENERIC 6 +/*! LB Hdr type ETH */ +#define BCMPKT_LBHDR_HEADER_T_LOOPBACK_MH 7 +/*! Transport header */ +#define BCMPKT_LBHDR_HEADER_T_TRANSPORT 7 +/*! \} */ + +/*! BCMPKT_LBHDR_HEADER_TYPE encoding name strings for debugging. */ +#define BCMPKT_LBHDR_HEADER_TYPE_NAME_MAP_INIT \ + {"TUNNEL_TERM", BCMPKT_LBHDR_HEADER_T_TUNNEL_TERM},\ + {"TRILL_NW", BCMPKT_LBHDR_HEADER_T_TRILL_NW},\ + {"TRILL_AC", BCMPKT_LBHDR_HEADER_T_TRILL_AC},\ + {"ETHERNET", BCMPKT_LBHDR_HEADER_T_ETHERNET},\ + {"MIM", BCMPKT_LBHDR_HEADER_T_MIM},\ + {"QCN", BCMPKT_LBHDR_HEADER_T_QCN},\ + {"GENERIC", BCMPKT_LBHDR_HEADER_T_GENERIC},\ + {"LOOPBACK_MH", BCMPKT_LBHDR_HEADER_T_LOOPBACK_MH},\ + {"TRANSPORT", BCMPKT_LBHDR_HEADER_T_TRANSPORT},\ + +/*! + * \name BCMPKT_LBHDR_ETH_DEST_TYPE encodings. + * \anchor BCMPKT_LBHDR_ETH_DEST_TYPE_XXX + */ +/*! \{ */ +/*! + * Destination GLP. Note that despite the name, only physical ports (DGPP) + * are supported. Trunking is not supported. + */ +#define BCMPKT_LBHDR_ETH_DEST_T_DGLP 0 +/*! Next hop */ +#define BCMPKT_LBHDR_ETH_DEST_T_NHI 1 +/*! ECMP group */ +#define BCMPKT_LBHDR_ETH_DEST_T_ECMP 2 +/*! ECMP member */ +#define BCMPKT_LBHDR_ETH_DEST_T_ECMP_MEMBER 3 +/*! IPMC */ +#define BCMPKT_LBHDR_ETH_DEST_T_IPMC 4 +/*! L2MC */ +#define BCMPKT_LBHDR_ETH_DEST_T_L2MC 5 +/*! Vlan flooding */ +#define BCMPKT_LBHDR_ETH_DEST_T_VLAN_FLOOD 6 +/*! \} */ + +/*! BCMPKT_LBHDR_ETH_DEST_TYPE encoding name strings for debugging. */ +#define BCMPKT_LBHDR_ETH_DEST_TYPE_NAME_MAP_INIT \ + {"DGLP", BCMPKT_LBHDR_ETH_DEST_T_DGLP},\ + {"NHI", BCMPKT_LBHDR_ETH_DEST_T_NHI},\ + {"ECMP", BCMPKT_LBHDR_ETH_DEST_T_ECMP},\ + {"ECMP_MEMBER", BCMPKT_LBHDR_ETH_DEST_T_ECMP_MEMBER},\ + {"IPMC", BCMPKT_LBHDR_ETH_DEST_T_IPMC},\ + {"L2MC", BCMPKT_LBHDR_ETH_DEST_T_L2MC},\ + {"VLAN_FLOOD", BCMPKT_LBHDR_ETH_DEST_T_VLAN_FLOOD},\ + +/*! + * \name BCMPKT_LBHDR_ETH_SUBFLOW_TYPE encodings. + * \anchor BCMPKT_LBHDR_ETH_SUBFLOW_TYPE_XXX + */ +/*! \{ */ +/*! CPU masquerade flow */ +#define BCMPKT_LBHDR_ETH_SUBFLOW_T_CPU_MASQUERADE 0 +/*! CPU_TX_PROC */ +#define BCMPKT_LBHDR_ETH_SUBFLOW_T_CPU_TX_PROC 1 +/*! \} */ + +/*! BCMPKT_LBHDR_ETH_SUBFLOW_TYPE encoding name strings for debugging. */ +#define BCMPKT_LBHDR_ETH_SUBFLOW_TYPE_NAME_MAP_INIT \ + {"CPU_MASQUERADE", BCMPKT_LBHDR_ETH_SUBFLOW_T_CPU_MASQUERADE},\ + {"CPU_TX_PROC", BCMPKT_LBHDR_ETH_SUBFLOW_T_CPU_TX_PROC},\ + +/*! + * \name Loopback module header internal usage field IDs. + * \anchor BCMPKT_LBHDR_I_XXX + */ +/*! \{ */ +/*! Invalid BCMPKT_LBHDR_I FID indicator */ +#define BCMPKT_LBHDR_I_FID_INVALID -1 +/*! LBHDR RX raw data size. */ +#define BCMPKT_LBHDR_I_SIZE 0 +/*! LBHDR_I FIELD ID NUMBER */ +#define BCMPKT_LBHDR_I_FID_COUNT 1 +/*! \} */ + +/*! LBHDR_I field name strings for debugging. */ +#define BCMPKT_LBHDR_I_FIELD_NAME_MAP_INIT \ + {"SIZE", BCMPKT_LBHDR_I_SIZE},\ + {"fid count", BCMPKT_LBHDR_I_FID_COUNT} + +#endif /*! BCMPKT_LBHDR_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h new file mode 100644 index 000000000000..56c10eee1f29 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h @@ -0,0 +1,59 @@ +/*! \file bcmpkt_lbhdr_field.h + * + * Loopback header (LBHDR, LOOPBACK_MH in hardware) field access interface. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_LBHDR_FIELD_H +#define BCMPKT_LBHDR_FIELD_H + +/*! + * \brief Get value from a LBHDR field. + * + * \param [in] dev_type Device type. + * \param [in] lbhdr LBHDR handle. + * \param [in] fid LBHDR field ID, refer to \ref BCMPKT_LBHDR_XXX. + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_lbhdr_field_get(bcmdrd_dev_type_t dev_type, uint32_t *lbhdr, + int fid, uint32_t *val); + +/*! + * \brief Set value into a LBHDR field. + * + * \param [in] dev_type Device type. + * \param [in,out] lbhdr LBHDR handle. + * \param [in] fid LBHDR field ID, refer to \ref BCMPKT_LBHDR_XXX. + * \param [in] val Set value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_lbhdr_field_set(bcmdrd_dev_type_t dev_type, uint32_t *lbhdr, + int fid, uint32_t val); + +#endif /* BCMPKT_LBHDR_FIELD_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h new file mode 100644 index 000000000000..830d9663d569 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h @@ -0,0 +1,63 @@ +/*! \file bcmpkt_lbhdr_internal.h + * + * Loopback header (LBHDR, called LOOPBACK_MH in hardware) access interface + * (Internal use only). + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_LBHDR_INTERNAL_H +#define BCMPKT_LBHDR_INTERNAL_H + +#include +#include +#include +#include + +/*! + * Array of LBHDR field getter functions for a particular device + * type. + */ +typedef struct bcmpkt_lbhdr_fget_s { + bcmpkt_field_get_f fget[BCMPKT_LBHDR_FID_COUNT]; +} bcmpkt_lbhdr_fget_t; + +/*! + * Array of LBHDR field setter functions for a particular device + * type. These functions are used for internally configuring packet + * filter. + */ +typedef struct bcmpkt_lbhdr_fset_s { + bcmpkt_field_set_f fset[BCMPKT_LBHDR_FID_COUNT]; +} bcmpkt_lbhdr_fset_t; + +/*! + * Array of LBHDR field address and length getter functions for a multiple + * words field of a particular device type. *addr is output address and return + * length. + */ +typedef struct bcmpkt_lbhdr_figet_s { + bcmpkt_ifield_get_f fget[BCMPKT_LBHDR_I_FID_COUNT]; +} bcmpkt_lbhdr_figet_t; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern void _bd##_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#endif /* BCMPKT_LBHDR_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h new file mode 100644 index 000000000000..dd9f99fff6ff --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h @@ -0,0 +1,58 @@ +/*! \file bcmpkt_pmd.h + * + * Common macros and definitions for PMD. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_PMD_H +#define BCMPKT_PMD_H + +#include + +/* For application convenience */ +#include +#include +#include +#include +#include +#include +#include + +/*! Invalid PMD header field ID. */ +#define BCMPKT_FID_INVALID -1 + +/*! Bitmap array size. */ +#define BCMPKT_BITMAP_WORD_SIZE 16 + +/*! + * \name BCMPKT Dumping flags. + * \anchor BCMPKT_DUMP_F_XXX + */ +/*! Dump all fields contents. */ +#define BCMPKT_DUMP_F_ALL 0 +/*! Dump none zero field content only. */ +#define BCMPKT_DUMP_F_NONE_ZERO 1 + +/*! PMD header field ID bit array. */ +typedef struct bcmpkt_bitmap_s { + /*! Bit array */ + uint32_t pbits[BCMPKT_BITMAP_WORD_SIZE]; +} bcmpkt_bitmap_t; + +#endif /* BCMPKT_PMD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h new file mode 100644 index 000000000000..ce8d21fd096b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h @@ -0,0 +1,61 @@ +/*! \file bcmpkt_pmd_internal.h + * + * \brief Basic PMD definitions. + * + * The defintions are kept separate to minimize the header file + * dependencies for the stand-alone PMD library. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_PMD_INTERNAL_H +#define BCMPKT_PMD_INTERNAL_H + +#include + +/*! Get a field from a PMD buffer. */ +typedef uint32_t (*bcmpkt_field_get_f)(uint32_t *data); + +/*! Set a field within a PMD buffer. */ +typedef void (*bcmpkt_field_set_f)(uint32_t *data, uint32_t val); + +/*! Get a complex field pointer or other attributions. */ +typedef uint32_t (*bcmpkt_ifield_get_f)(uint32_t *data, uint32_t **addr); + +/*! + * \brief Packet metadata information structure. + */ +typedef struct bcmpkt_pmd_view_info_s { + + /*! View type list. */ + shr_enum_map_t *view_types; + + /*! + * Each field's view code. + * -2 means unavailable field. + * -1 means common field. + * others are correspondent view codes defined in view types. + */ + int *view_infos; + + /*! View type get function. */ + bcmpkt_field_get_f view_type_get; + +} bcmpkt_pmd_view_info_t; + +#endif /* BCMPKT_PMD_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h new file mode 100644 index 000000000000..861ba0386cc2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h @@ -0,0 +1,125 @@ +/*! \file bcmpkt_rcpu_hdr.h + * + * RCPU header format definition. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_RCPU_HDR_H +#define BCMPKT_RCPU_HDR_H + +#include + +/*! RCPU Header length. */ +#define BCMPKT_RCPU_HDR_LEN 32 +/*! RX PMD maximum size. */ +#define BCMPKT_RCPU_RXPMD_SIZE 96 +/*! RX Encapsulation size. */ +#define BCMPKT_RCPU_RX_ENCAP_SIZE (BCMPKT_RCPU_HDR_LEN + BCMPKT_RCPU_RXPMD_SIZE) +/*! TX Module Header size. */ +#define BCMPKT_RCPU_TX_MH_SIZE 32 +/*! TX Encapsulation size. */ +#define BCMPKT_RCPU_TX_ENCAP_SIZE (BCMPKT_RCPU_HDR_LEN + BCMPKT_RCPU_TX_MH_SIZE) +/*! Maximum Encapsulation size. */ +#define BCMPKT_RCPU_MAX_ENCAP_SIZE BCMPKT_RCPU_RX_ENCAP_SIZE + +/*! + * \name Packet RCPU operation types. + * \anchor BCMPKT_RCPU_OP_XXX + */ +/*! \{ */ +/*! No operation code. */ +#define BCMPKT_RCPU_OP_NONE 0x0 +/*! To CPU packet. */ +#define BCMPKT_RCPU_OP_RX 0x10 +/*! From CPU packet. */ +#define BCMPKT_RCPU_OP_TX 0x20 +/*! \} */ + +/*! + * \name Packet RCPU flags. + * \anchor BCMPKT_RCPU_F_XXX + */ +/*! \{ */ +/*! No operation code. */ +#define BCMPKT_RCPU_F_NONE 0 +/*! To CPU packet. */ +#define BCMPKT_RCPU_F_MODHDR (1 << 2) +/*! Do not pad runt TX packet. */ +#define BCMPKT_RCPU_F_TX_NO_PAD (1 << 4) +/*! \} */ + +/*! RCPU default VLAN ID with pri and cfi. */ +#define BCMPKT_RCPU_VLAN 0x01 + +/*! RCPU TPID. */ +#define BCMPKT_RCPU_TPID 0x8100 + +/*! RCPU Ethertype. */ +#define BCMPKT_RCPU_ETYPE 0xde08 + +/*! + * \brief The RCPU header format structure. + */ +typedef struct bcmpkt_rcpu_hdr_s { + + /*! RCPU header DMAC. */ + shr_mac_t dmac; + + /*! RCPU header SMAC. */ + shr_mac_t smac; + + /*! VLAN TPID. */ + uint16_t tpid; + + /*! VLAN TAG with cfi + pri. */ + uint16_t vlan; + + /*! Ether-type. */ + uint16_t ethertype; + + /*! RCPU signature. */ + uint16_t signature; + + /*! RCPU operation code. */ + uint8_t opcode; + + /*! RCPU operation code. */ + uint8_t flags; + + /*! RCPU operation code. */ + uint16_t transid; + + /*! Length of packet data. */ + uint16_t pkt_len; + + /*! Expect reply message length. */ + uint16_t reply_len; + + /*! packet meta data length. (Internal usage) */ + uint8_t meta_len; + + /*! Transmission queue number. (Internal usage) */ + uint8_t queue_id; + + /*! Reserved must be 0 */ + uint16_t reserved; + +} bcmpkt_rcpu_hdr_t; + +#endif /* BCMPKT_RCPU_HDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h new file mode 100644 index 000000000000..c97a44978946 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h @@ -0,0 +1,267 @@ +/*! \file bcmpkt_rxpmd.h + * + * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_RXPMD_H +#define BCMPKT_RXPMD_H + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/*! RX raw packet metadata maximum size (words). */ +#define BCMPKT_RXPMD_SIZE_WORDS 18 + +/*! RX raw packet metadata maximum size (bytes). */ +#define BCMPKT_RXPMD_SIZE_BYTES (BCMPKT_RXPMD_SIZE_WORDS * 4) + +/*! CELL Error status bitmap. */ +#define BCMPKT_RXMETA_ST_CELL_ERROR (0x1 << 18) + +/*! \brief Packet reasons bitmap. + * Set of "reasons" (\ref BCMPKT_RX_REASON_XXX) why a packet came to the CPU. + */ +typedef struct bcmpkt_rx_reasons_s { + /*! Bitmap container */ + SHR_BITDCLNAME(pbits, BCMPKT_RX_REASON_COUNT); +} bcmpkt_rx_reasons_t; + +/*! + * \name RXPMD Dumping flags. + * \anchor BCMPKT_RXPMD_DUMP_F_XXX + */ +/*! \{ */ +/*! + * Dump all fields contents. + */ +#define BCMPKT_RXPMD_DUMP_F_ALL 0 +/*! + * Dump none zero field content only. + */ +#define BCMPKT_RXPMD_DUMP_F_NONE_ZERO 1 +/*! \} */ + +/*! + * \name Packet RX reason utility macros. + * \anchor BCMPKT_RX_REASON_OPS + */ +/*! \{ */ +/*! + * Macro to check if a reason (\ref BCMPKT_RX_REASON_XXX) is included in a + * set of reasons (\ref bcmpkt_rx_reasons_t). Returns: + * zero => reason is not included in the set + * non-zero => reason is included in the set + */ +#define BCMPKT_RX_REASON_GET(_reasons, _reason) \ + SHR_BITGET(((_reasons).pbits), (_reason)) + +/*! + * Macro to add a reason (\ref BCMPKT_RX_REASON_XXX) to a set of + * reasons (\ref bcmpkt_rx_reasons_t) + */ +#define BCMPKT_RX_REASON_SET(_reasons, _reason) \ + SHR_BITSET(((_reasons).pbits), (_reason)) + +/*! + * Macro to add all reasons (\ref BCMPKT_RX_REASON_XXX) to a set of + * reasons (\ref bcmpkt_rx_reasons_t) + */ +#define BCMPKT_RX_REASON_SET_ALL(_reasons) \ + SHR_BITSET_RANGE(((_reasons).pbits), 0, BCMPKT_RX_REASON_COUNT) + +/*! + * Macro to clear a reason (\ref BCMPKT_RX_REASON_XXX) from a set of + * reasons (\ref bcmpkt_rx_reasons_t) + */ +#define BCMPKT_RX_REASON_CLEAR(_reasons, _reason) \ + SHR_BITCLR(((_reasons).pbits), (_reason)) + +/*! + * Macro to clear a set of reasons (\ref bcmpkt_rx_reasons_t). + */ +#define BCMPKT_RX_REASON_CLEAR_ALL(_reasons) \ + SHR_BITCLR_RANGE(((_reasons).pbits), 0, BCMPKT_RX_REASON_COUNT) +/*! + * Macro to check for no reason (\ref bcmpkt_rx_reasons_t). + */ +#define BCMPKT_RX_REASON_IS_NULL(_reasons) \ + SHR_BITNULL_RANGE(((_reasons).pbits), \ + 0, BCMPKT_RX_REASON_COUNT) + +/*! + * Macro to iterate every reason (\ref bcmpkt_rx_reasons_t). + */ +#define BCMPKT_RX_REASON_ITER(_reasons, reason) \ + for(reason = BCMPKT_RX_REASON_NONE; reason < (int)BCMPKT_RX_REASON_COUNT; reason++) \ + if(BCMPKT_RX_REASON_GET(_reasons, reason)) + +/*! + * Macro to get reasons number (\ref bcmpkt_rx_reasons_t). + */ +#define BCMPKT_RX_REASONS_COUNT(_reasons, _count) \ + SHR_BITCOUNT_RANGE(((_reasons).pbits), _count, \ + 0, BCMPKT_RX_REASON_COUNT) + +/*! + * Macro to compare 2 reasons (\ref bcmpkt_rx_reasons_t), return 1 for exact match. + */ +#define BCMPKT_RX_REASON_EQ(_reasons1, _reasons2) \ + SHR_BITEQ_RANGE(((_reasons1).pbits), ((_reasons2).pbits), \ + 0, BCMPKT_RX_REASON_COUNT) +/*! \} */ + + +/*! + * \brief Get RXPMD's size for a given device type. + * + * \param [in] dev_type Device type. + * \param [out] len Bytes of RXPMD length. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Unsupported device type or bad \c len pointer. + * \retval SHR_E_UNAVAIL Not support RXPMD get function. + */ +extern int +bcmpkt_rxpmd_len_get(bcmdrd_dev_type_t dev_type, uint32_t *len); + + +/*! + * \brief Get module header's pointer of the RXPMD. + * + * This function is used for geting Module header's pointer in RXPMD. + * + * \param [in] dev_type Device type. + * \param [in] rxpmd RXPMD handle. + * \param [out] hg_hdr HiGig header handle. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support HiGig header. + * \retval SHR_E_INTERNAL Internal issue. + */ +extern int +bcmpkt_rxpmd_mh_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + uint32_t **hg_hdr); + +/*! + * \brief Get RX reasons from RXPMD. + * + * Decode packet's RX reasons into "reasons". A received packet may have one RX + * reason, multiple RX reasons, or none reason. RX reasons are in the format of + * bitmap. Each bit means one reason type (refer to \ref BCMPKT_RX_REASON_XXX). + * + * User may use \ref BCMPKT_RX_REASON_OPS to parse each individual reason based + * on this function's return value "reasons". + * + * \param [in] dev_type Device type. + * \param [in] rxpmd RXPMD handle. + * \param [out] reasons RX reasons in bit array. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support Reason. + * \retval SHR_E_INTERNAL Internal issue. + */ +extern int +bcmpkt_rxpmd_reasons_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + bcmpkt_rx_reasons_t *reasons); + +/*! + * \brief Set RX reasons into the RXPMD. (Internally used for filter configuration.) + * + * Set RX reasons into RXPMD data for packet filter purpose. + * + * \param [in] dev_type Device type. + * \param [in] reasons Reasons bit array. + * \param [in,out] rxpmd RXPMD handle. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support Reason. + * \retval SHR_E_INTERNAL Internal issue. + */ +extern int +bcmpkt_rxpmd_reasons_set(bcmdrd_dev_type_t dev_type, + bcmpkt_rx_reasons_t *reasons, uint32_t *rxpmd); + +/*! + * \brief Get field name for a given RXPMD field ID. + * + * \param [in] fid RXPMD field ID, refer to \ref BCMPKT_RXPMD_XXX. + * \param [out] name RXPMD field name string. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + */ +extern int +bcmpkt_rxpmd_field_name_get(int fid, char **name); + +/*! + * \brief Get field ID for a given RXPMD field name. + * + * \param [in] name RXPMD field name string. + * \param [out] fid RXPMD Field ID. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_NOT_FOUND Not found the name. + */ +extern int +bcmpkt_rxpmd_field_id_get(char* name, int *fid); + +/*! + * \brief Get an RX reason's name. + * + * \param [in] reason Reason ID. + * \param [out] name Reason name string handle. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + */ +extern int +bcmpkt_rx_reason_name_get(int reason, char **name); + +/*! + * \brief Return the RXPMD match id information. + * + * This routine returns the RXPMD match id information + * for the given match id name. + * + * \param [in] variant Variant type. + * \param [in] spec Match ID name. + * \param [out] info Match ID data. + * + * \retval SHR_E_NONE Success. + * \retval SHR_E_PARAM Invalid variant, spec or info. + * \retval SHR_E_UNAVAIL Match ID data is not available. + * + */ +extern int +bcmpkt_rxpmd_match_id_data_get(bcmlrd_variant_t variant, const char *spec, + const bcmlrd_match_id_db_t **info); + +#endif /* BCMPKT_RXPMD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h new file mode 100644 index 000000000000..c3e4ad128083 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h @@ -0,0 +1,958 @@ +#ifndef BCMPKT_RXPMD_DEFS_H +#define BCMPKT_RXPMD_DEFS_H +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides field macros for RX Packet Metadata (RXPMD, called + * EP_TO_CPU in hardware) access. + * + ******************************************************************************/ + +/*! + * \name RX packet metadata field IDs. + * \anchor BCMPKT_RXPMD_XXX + */ +/*! \{ */ +/*! Invalid BCMPKT_RXPMD FID indicator */ +#define BCMPKT_RXPMD_FID_INVALID -1 +/*! Cell was stored in Unicast Queue in MMU. */ +#define BCMPKT_RXPMD_UNICAST_QUEUE 0 +/*! Queue number used in MMU, PBE field */ +#define BCMPKT_RXPMD_QUEUE_NUM 1 +/*! OVERLAY ON QUEUE_NUM Queue number used in MMU for cpu port, PBE field */ +#define BCMPKT_RXPMD_CPU_COS 2 +/*! + * Valid only for packets which came in on Higig+ source port. Higig+ module + * header field, PBE field. + */ +#define BCMPKT_RXPMD_HGI 3 +/*! Matched Rule, PBE field. */ +#define BCMPKT_RXPMD_MATCHED_RULE 4 +/*! DO NOT CHANGE, USED BY CMIC HW: Packet length after all modification. */ +#define BCMPKT_RXPMD_PKT_LENGTH 5 +/*! Source Port Number, PBE field. */ +#define BCMPKT_RXPMD_SRC_PORT_NUM 6 +/*! Inner VID. */ +#define BCMPKT_RXPMD_INNER_VID 7 +/*! Inner CFI */ +#define BCMPKT_RXPMD_INNER_CFI 8 +/*! Inner priority. */ +#define BCMPKT_RXPMD_INNER_PRI 9 +/*! Outer VID. */ +#define BCMPKT_RXPMD_OUTER_VID 10 +/*! Outer Canoncial Format Indicator. */ +#define BCMPKT_RXPMD_OUTER_CFI 11 +/*! Outer Priority. */ +#define BCMPKT_RXPMD_OUTER_PRI 12 +/*! Special packet. */ +#define BCMPKT_RXPMD_SPECIAL_PACKET_INDICATOR 13 +/*! Special packet type. */ +#define BCMPKT_RXPMD_SPECIAL_PACKET_TYPE 14 +/*! Set to 1 if the DSCP value has been changed by the EP */ +#define BCMPKT_RXPMD_CHANGE_DSCP 15 +/*! New DSCP value computed by the chip (EP) for the packet */ +#define BCMPKT_RXPMD_DSCP 16 +/*! Change the ECN as indicated by the IFP. */ +#define BCMPKT_RXPMD_CHANGE_ECN 17 +/*! New ECN value provided by the IFP. */ +#define BCMPKT_RXPMD_ECN 18 +/*! + * NEW This pretty much maps from EP_TO_CPU_HEADER_OVERLAY_TYPE from the MPB + * 0: Invalid + * 1: TIMESTAMP field carries the LM packet-count for an OAM loss measurement + * packet + * 2: TIMESTAMP_UPPER,TIMESTAMP fields carry the 64-bit DM Time-stamp for an + * OAMdelay measurement packet + * 3: 802.1AS timestamp in the TIMESTAMP field + */ +#define BCMPKT_RXPMD_TIMESTAMP_TYPE 19 +/*! Low 32 bits of timestamp. */ +#define BCMPKT_RXPMD_TIMESTAMP 20 +/*! High 32/16bits of timestamp. */ +#define BCMPKT_RXPMD_TIMESTAMP_HI 21 +/*! Mirror-to-Port Index, PBE field */ +#define BCMPKT_RXPMD_MTP_INDEX 22 +/*! BPDU Packet, PBE field */ +#define BCMPKT_RXPMD_BPDU 23 +/*! Indicates the packet is generated as a result of packet replication */ +#define BCMPKT_RXPMD_REPLICATION 24 +/*! L3 IP Multicast Packet Flag, PBE field */ +#define BCMPKT_RXPMD_L3ONLY 25 +/*! Indicates packet was routed - UC OR MC */ +#define BCMPKT_RXPMD_IP_ROUTED 26 +/*! Source port is Higig. */ +#define BCMPKT_RXPMD_SRC_HIGIG 27 +/*! Source port is Higig2. */ +#define BCMPKT_RXPMD_SRC_HIGIG2 28 +/*! Indicates all switch copies were dropped in MMU (for copies to CPU port). */ +#define BCMPKT_RXPMD_UC_SW_COPY_DROPPED 29 +/*! + * Flag to indicate this is a switched packet as opposed to a mirrored packet, + * PBE field + */ +#define BCMPKT_RXPMD_SWITCH 30 +/*! Indicates there is an SD tag in the packet */ +#define BCMPKT_RXPMD_SD_TAG_PRESENT 31 +/*! + * Indicates ingress inner VLAN tag action, PBE field: + * 0: do not modify, 1: add I-VID, 2: replace I-VID, 3: remove I-VID + */ +#define BCMPKT_RXPMD_ING_ITAG_ACTION 32 +/*! + * Indicates ingress outer VLAN tag action, PBE field: + * 0: do not modify, 1: add O-VID, 2: replace O-VID, 3: reserved + */ +#define BCMPKT_RXPMD_ING_OTAG_ACTION 33 +/*! + * Indicates the incoming tag status (INCOMING_TAG_STATUS): + * For single tag device: + * 0: untagged, 1: tagged + * For double tag device: + * 0: untagged, 1: single inner-tag, 2: single outer-tag, 3: double tagged + */ +#define BCMPKT_RXPMD_ING_TAG_TYPE 34 +/*! + * This field is set by the ingress chip to indicate to the egress chip that 1588 + * 1-step ingress correction update has been applied to this packet. Egress chip + * uses this bit when egress port CF_UPDATE_MODE is set to ING_UPDATE_BASED_ENABLE. + * Encodings are: + * 0: Ingress correction update has NOT been applied to the packet. When configured + * in coupled mode, egress chip must NOT apply the egress correction update for + * this packet. + * 1: Ingress correction update has been applied to the packet. When configured in + * coupled mode, egress chip must apply the egress correction update. + */ +#define BCMPKT_RXPMD_ONE_STEP_1588_ING_UPDATE_DONE 35 +/*! The full 32-bit EH tag */ +#define BCMPKT_RXPMD_EH_TAG 36 +/*! + * Defines the header type enabling flexibility for future applications. + * 0x0: Queue selections for Sirius/Arad. + * 0x1: ClassID + * 0x2: ClassID + QTag + * 0x3-0x15: Reserved for future use. + */ +#define BCMPKT_RXPMD_EH_TYPE 37 +/*! See EH_SEG_SEL_ENCODING format */ +#define BCMPKT_RXPMD_EH_TYPE_0_EH_SEG_SEL 38 +/*! + * EH queue tag assignment + * 00: No EH queue tag assignment, + * 01-11: EH queue tag assignment modes + */ +#define BCMPKT_RXPMD_EH_TYPE_0_EH_TAG_TYPE 39 +/*! EH queue tag */ +#define BCMPKT_RXPMD_EH_TYPE_0_EH_QUEUE_TAG 40 +/*! Type of CLASSID */ +#define BCMPKT_RXPMD_EH_TYPE_1_CLASSID_TYPE 41 +/*! L3_IIF */ +#define BCMPKT_RXPMD_EH_TYPE_1_L3_IIF 42 +/*! CLASSID */ +#define BCMPKT_RXPMD_EH_TYPE_1_CLASSID 43 +/*! Type of CLASSID */ +#define BCMPKT_RXPMD_EH_TYPE_2_CLASSID_TYPE 44 +/*! CLASSID */ +#define BCMPKT_RXPMD_EH_TYPE_2_CLASSID 45 +/*! L3_IIF */ +#define BCMPKT_RXPMD_EH_TYPE_2_EH_QUEUE_TAG 46 +/*! Indicates the Session ID for the Rx BFD packet.Valid when OAM_PKT_TYPE=2 */ +#define BCMPKT_RXPMD_RX_BFD_START_OFFSET 47 +/*! Indicates the Session ID for the Rx BFD packet.Valid when OAM_PKT_TYPE=2 */ +#define BCMPKT_RXPMD_RX_BFD_START_OFFSET_TYPE 48 +/*! Indicates the Session ID for the Rx BFD packet.Valid when OAM_PKT_TYPE=2 */ +#define BCMPKT_RXPMD_RX_BFD_SESSION_INDEX 49 +/*! The reason code TYPE. */ +#define BCMPKT_RXPMD_REASON_TYPE 50 +/*! + * This should be the final control in the EP indicating to not change the TTL, + * from any source. + */ +#define BCMPKT_RXPMD_DO_NOT_CHANGE_TTL 51 +/*! Valid for non-BFD packet */ +#define BCMPKT_RXPMD_I2E_CLASSID_TYPE 52 +/*! Valid for non-BFD packet */ +#define BCMPKT_RXPMD_I2E_CLASSID 53 +/*! Ingress L3 Intf number. */ +#define BCMPKT_RXPMD_ING_L3_INTF 54 +/*! Indication to next pass about the type of loopback. */ +#define BCMPKT_RXPMD_LOOPBACK_PACKET_TYPE 55 +/*! If set, then packet has been modified by the EP and CRC needs to be regenerated */ +#define BCMPKT_RXPMD_REGEN_CRC 56 +/*! Entropy label. */ +#define BCMPKT_RXPMD_ENTROPY_LABEL 57 +/*! Used to indicate if and how a tunnel has been decapsulated from the packet. */ +#define BCMPKT_RXPMD_TUNNEL_DECAP_TYPE 58 +/*! DLB_ID valid. */ +#define BCMPKT_RXPMD_DLB_ID_VALID 59 +/*! DLB_ID. */ +#define BCMPKT_RXPMD_DLB_ID 60 +/*! HG2 Extended Header Valid. (was in FRC_reserved) */ +#define BCMPKT_RXPMD_HG2_EXT_HDR_VALID 61 +/*! + * New field for VNTAG/ETAGs: 00: Do not Modify + * 01: Add/Replace incoming VNTAG/ETAG with Ingress Port Based VNTAG + * 10: Add/Replace incoming VNTAG/ETAG with Ingress Port Based ETAG. + * 11: Delete Packets VNTAG/ETAG + */ +#define BCMPKT_RXPMD_VNTAG_ACTION 62 +/*! If set, the DVP/NHOP_INDEX overlay has the DVP. Else, it has the Next Hop Index. */ +#define BCMPKT_RXPMD_DVP_NHI_SEL 63 +/*! Validates VFI field */ +#define BCMPKT_RXPMD_VFI_VALID 64 +/*! + * This field's msb is the replication type from the EGR_IPMC table. + * It is a flag that determines the contents of the lower 15-bits. + * 0 => Lower 16-bits contain the IPMC_INTF_NUM from the MMU + * 1 => Lower 16-bits contain the NEXT_HOP_INDEX from the Ingress Pipeline + */ +#define BCMPKT_RXPMD_REPLICATION_OR_NHOP_INDEX 65 +/*! Low 32 bits of the packet MATCH_ID. */ +#define BCMPKT_RXPMD_MATCH_ID_LO 66 +/*! High 18 bits of the packet MATCH_ID. */ +#define BCMPKT_RXPMD_MATCH_ID_HI 67 +/*! MPB flex data_type from MPB_FIXED.flex_data_type */ +#define BCMPKT_RXPMD_MPB_FLEX_DATA_TYPE 68 +/*! From EPRE/EDEV_CONFIG table EGR_INT_CN_UPDPATE.int_cn */ +#define BCMPKT_RXPMD_INT_CN 69 +/*! From MPB_FIXED */ +#define BCMPKT_RXPMD_CNG 70 +/*! From MPB_FIXED */ +#define BCMPKT_RXPMD_EGR_ZONE_REMAP_CTRL 71 +/*! Constant specified in NPL */ +#define BCMPKT_RXPMD_DMA_HEADER_VERSION 72 +/*! Multicast packet from MPB_FIXED */ +#define BCMPKT_RXPMD_MULTICAST 73 +/*! Copy to CPU from MPB_FIXED */ +#define BCMPKT_RXPMD_COPY_TO_CPU 74 +/*! Trucate CPU copy from MPB_FIXED */ +#define BCMPKT_RXPMD_TRUNCATE_CPU_COPY 75 +/*! Incoming INT header type. */ +#define BCMPKT_RXPMD_INCOMING_INT_HDR_TYPE 76 +/*! MPB_FIXED.dop_trigger. */ +#define BCMPKT_RXPMD_DOP_TRIGGER 77 +/*! From EPRE. If mirror pkt then == MIRROR_ENCAP_INDEx else == eparse_extract_offsets[3:0]. */ +#define BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX 78 +/*! Eparse_extract_offsets[7:4]. */ +#define BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_7_4 79 +/*! Valid for non-BFD packet */ +#define BCMPKT_RXPMD_ING_L3_INTF_VALID 80 +/*! Overlay next hop. */ +#define BCMPKT_RXPMD_O_NHI 81 +/*! Inner Entropy Used indication */ +#define BCMPKT_RXPMD_IEU 82 +/*! IEU indication is valid */ +#define BCMPKT_RXPMD_IEU_VALID 83 +/*! incoming opaque tag status indication */ +#define BCMPKT_RXPMD_INCOMING_OPAQUE_TAG_STATUS 84 +/*! Eparse_extract_offsets[6:4]. */ +#define BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_6_4 85 +/*! From EDEV_CONFIG.SRC_SUBPORT_TABLE. */ +#define BCMPKT_RXPMD_ING_PP_PORT 86 +/*! Low 32 bits of the packet ARC_ID. */ +#define BCMPKT_RXPMD_ARC_ID_LO 87 +/*! High 18 bits of the packet ARC_ID. */ +#define BCMPKT_RXPMD_ARC_ID_HI 88 +/*! IEEE 802_1AS timestamp status. */ +#define BCMPKT_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED 89 +/*! VRF */ +#define BCMPKT_RXPMD_VRF 90 +/*! RX chip port. */ +#define BCMPKT_RXPMD_RX_CHIP_PORT 91 +/*! VPP copy. */ +#define BCMPKT_RXPMD_VPP_COPY_TYPE 92 +/*! SV tag present status. */ +#define BCMPKT_RXPMD_SVTAG_PRESENT 93 +/*! Ingress vpp port. */ +#define BCMPKT_RXPMD_RX_VPP_PORT 94 +/*! Non switch copy. */ +#define BCMPKT_RXPMD_NONSW_COPY 95 +/*! */ +#define BCMPKT_RXPMD_MATCHED_RULE_EP 96 +/*! */ +#define BCMPKT_RXPMD_IS_EGR_TS 97 +/*! If set, then packet has been modified by the EP and CRC needs to be regenerated */ +#define BCMPKT_RXPMD_MODIFIED_PKT 98 +/*! RXPMD FIELD ID NUMBER */ +#define BCMPKT_RXPMD_FID_COUNT 99 +/*! \} */ + +/*! RXPMD field name strings for debugging. */ +#define BCMPKT_RXPMD_FIELD_NAME_MAP_INIT \ + {"UNICAST_QUEUE", BCMPKT_RXPMD_UNICAST_QUEUE},\ + {"QUEUE_NUM", BCMPKT_RXPMD_QUEUE_NUM},\ + {"CPU_COS", BCMPKT_RXPMD_CPU_COS},\ + {"HGI", BCMPKT_RXPMD_HGI},\ + {"MATCHED_RULE", BCMPKT_RXPMD_MATCHED_RULE},\ + {"PKT_LENGTH", BCMPKT_RXPMD_PKT_LENGTH},\ + {"SRC_PORT_NUM", BCMPKT_RXPMD_SRC_PORT_NUM},\ + {"INNER_VID", BCMPKT_RXPMD_INNER_VID},\ + {"INNER_CFI", BCMPKT_RXPMD_INNER_CFI},\ + {"INNER_PRI", BCMPKT_RXPMD_INNER_PRI},\ + {"OUTER_VID", BCMPKT_RXPMD_OUTER_VID},\ + {"OUTER_CFI", BCMPKT_RXPMD_OUTER_CFI},\ + {"OUTER_PRI", BCMPKT_RXPMD_OUTER_PRI},\ + {"SPECIAL_PACKET_INDICATOR", BCMPKT_RXPMD_SPECIAL_PACKET_INDICATOR},\ + {"SPECIAL_PACKET_TYPE", BCMPKT_RXPMD_SPECIAL_PACKET_TYPE},\ + {"CHANGE_DSCP", BCMPKT_RXPMD_CHANGE_DSCP},\ + {"DSCP", BCMPKT_RXPMD_DSCP},\ + {"CHANGE_ECN", BCMPKT_RXPMD_CHANGE_ECN},\ + {"ECN", BCMPKT_RXPMD_ECN},\ + {"TIMESTAMP_TYPE", BCMPKT_RXPMD_TIMESTAMP_TYPE},\ + {"TIMESTAMP", BCMPKT_RXPMD_TIMESTAMP},\ + {"TIMESTAMP_HI", BCMPKT_RXPMD_TIMESTAMP_HI},\ + {"MTP_INDEX", BCMPKT_RXPMD_MTP_INDEX},\ + {"BPDU", BCMPKT_RXPMD_BPDU},\ + {"REPLICATION", BCMPKT_RXPMD_REPLICATION},\ + {"L3ONLY", BCMPKT_RXPMD_L3ONLY},\ + {"IP_ROUTED", BCMPKT_RXPMD_IP_ROUTED},\ + {"SRC_HIGIG", BCMPKT_RXPMD_SRC_HIGIG},\ + {"SRC_HIGIG2", BCMPKT_RXPMD_SRC_HIGIG2},\ + {"UC_SW_COPY_DROPPED", BCMPKT_RXPMD_UC_SW_COPY_DROPPED},\ + {"SWITCH", BCMPKT_RXPMD_SWITCH},\ + {"SD_TAG_PRESENT", BCMPKT_RXPMD_SD_TAG_PRESENT},\ + {"ING_ITAG_ACTION", BCMPKT_RXPMD_ING_ITAG_ACTION},\ + {"ING_OTAG_ACTION", BCMPKT_RXPMD_ING_OTAG_ACTION},\ + {"ING_TAG_TYPE", BCMPKT_RXPMD_ING_TAG_TYPE},\ + {"ONE_STEP_1588_ING_UPDATE_DONE", BCMPKT_RXPMD_ONE_STEP_1588_ING_UPDATE_DONE},\ + {"EH_TAG", BCMPKT_RXPMD_EH_TAG},\ + {"EH_TYPE", BCMPKT_RXPMD_EH_TYPE},\ + {"EH_TYPE_0::EH_SEG_SEL", BCMPKT_RXPMD_EH_TYPE_0_EH_SEG_SEL},\ + {"EH_TYPE_0::EH_TAG_TYPE", BCMPKT_RXPMD_EH_TYPE_0_EH_TAG_TYPE},\ + {"EH_TYPE_0::EH_QUEUE_TAG", BCMPKT_RXPMD_EH_TYPE_0_EH_QUEUE_TAG},\ + {"EH_TYPE_1::CLASSID_TYPE", BCMPKT_RXPMD_EH_TYPE_1_CLASSID_TYPE},\ + {"EH_TYPE_1::L3_IIF", BCMPKT_RXPMD_EH_TYPE_1_L3_IIF},\ + {"EH_TYPE_1::CLASSID", BCMPKT_RXPMD_EH_TYPE_1_CLASSID},\ + {"EH_TYPE_2::CLASSID_TYPE", BCMPKT_RXPMD_EH_TYPE_2_CLASSID_TYPE},\ + {"EH_TYPE_2::CLASSID", BCMPKT_RXPMD_EH_TYPE_2_CLASSID},\ + {"EH_TYPE_2::EH_QUEUE_TAG", BCMPKT_RXPMD_EH_TYPE_2_EH_QUEUE_TAG},\ + {"RX_BFD_START_OFFSET", BCMPKT_RXPMD_RX_BFD_START_OFFSET},\ + {"RX_BFD_START_OFFSET_TYPE", BCMPKT_RXPMD_RX_BFD_START_OFFSET_TYPE},\ + {"RX_BFD_SESSION_INDEX", BCMPKT_RXPMD_RX_BFD_SESSION_INDEX},\ + {"REASON_TYPE", BCMPKT_RXPMD_REASON_TYPE},\ + {"DO_NOT_CHANGE_TTL", BCMPKT_RXPMD_DO_NOT_CHANGE_TTL},\ + {"I2E_CLASSID_TYPE", BCMPKT_RXPMD_I2E_CLASSID_TYPE},\ + {"I2E_CLASSID", BCMPKT_RXPMD_I2E_CLASSID},\ + {"ING_L3_INTF", BCMPKT_RXPMD_ING_L3_INTF},\ + {"LOOPBACK_PACKET_TYPE", BCMPKT_RXPMD_LOOPBACK_PACKET_TYPE},\ + {"REGEN_CRC", BCMPKT_RXPMD_REGEN_CRC},\ + {"ENTROPY_LABEL", BCMPKT_RXPMD_ENTROPY_LABEL},\ + {"TUNNEL_DECAP_TYPE", BCMPKT_RXPMD_TUNNEL_DECAP_TYPE},\ + {"DLB_ID_VALID", BCMPKT_RXPMD_DLB_ID_VALID},\ + {"DLB_ID", BCMPKT_RXPMD_DLB_ID},\ + {"HG2_EXT_HDR_VALID", BCMPKT_RXPMD_HG2_EXT_HDR_VALID},\ + {"VNTAG_ACTION", BCMPKT_RXPMD_VNTAG_ACTION},\ + {"DVP_NHI_SEL", BCMPKT_RXPMD_DVP_NHI_SEL},\ + {"VFI_VALID", BCMPKT_RXPMD_VFI_VALID},\ + {"REPLICATION_OR_NHOP_INDEX", BCMPKT_RXPMD_REPLICATION_OR_NHOP_INDEX},\ + {"MATCH_ID_LO", BCMPKT_RXPMD_MATCH_ID_LO},\ + {"MATCH_ID_HI", BCMPKT_RXPMD_MATCH_ID_HI},\ + {"MPB_FLEX_DATA_TYPE", BCMPKT_RXPMD_MPB_FLEX_DATA_TYPE},\ + {"INT_CN", BCMPKT_RXPMD_INT_CN},\ + {"CNG", BCMPKT_RXPMD_CNG},\ + {"EGR_ZONE_REMAP_CTRL", BCMPKT_RXPMD_EGR_ZONE_REMAP_CTRL},\ + {"DMA_HEADER_VERSION", BCMPKT_RXPMD_DMA_HEADER_VERSION},\ + {"MULTICAST", BCMPKT_RXPMD_MULTICAST},\ + {"COPY_TO_CPU", BCMPKT_RXPMD_COPY_TO_CPU},\ + {"TRUNCATE_CPU_COPY", BCMPKT_RXPMD_TRUNCATE_CPU_COPY},\ + {"INCOMING_INT_HDR_TYPE", BCMPKT_RXPMD_INCOMING_INT_HDR_TYPE},\ + {"DOP_TRIGGER", BCMPKT_RXPMD_DOP_TRIGGER},\ + {"EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX", BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX},\ + {"EPARSE_EXTRACT_OFFSETS_7_4", BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_7_4},\ + {"ING_L3_INTF_VALID", BCMPKT_RXPMD_ING_L3_INTF_VALID},\ + {"O_NHI", BCMPKT_RXPMD_O_NHI},\ + {"IEU", BCMPKT_RXPMD_IEU},\ + {"IEU_VALID", BCMPKT_RXPMD_IEU_VALID},\ + {"INCOMING_OPAQUE_TAG_STATUS", BCMPKT_RXPMD_INCOMING_OPAQUE_TAG_STATUS},\ + {"EPARSE_EXTRACT_OFFSETS_6_4", BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_6_4},\ + {"ING_PP_PORT", BCMPKT_RXPMD_ING_PP_PORT},\ + {"ARC_ID_LO", BCMPKT_RXPMD_ARC_ID_LO},\ + {"ARC_ID_HI", BCMPKT_RXPMD_ARC_ID_HI},\ + {"IEEE_802_1AS_TIMESTAMP_ENABLED", BCMPKT_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED},\ + {"VRF", BCMPKT_RXPMD_VRF},\ + {"RX_CHIP_PORT", BCMPKT_RXPMD_RX_CHIP_PORT},\ + {"VPP_COPY_TYPE", BCMPKT_RXPMD_VPP_COPY_TYPE},\ + {"SVTAG_PRESENT", BCMPKT_RXPMD_SVTAG_PRESENT},\ + {"RX_VPP_PORT", BCMPKT_RXPMD_RX_VPP_PORT},\ + {"NONSW_COPY", BCMPKT_RXPMD_NONSW_COPY},\ + {"MATCHED_RULE_EP", BCMPKT_RXPMD_MATCHED_RULE_EP},\ + {"IS_EGR_TS", BCMPKT_RXPMD_IS_EGR_TS},\ + {"MODIFIED_PKT", BCMPKT_RXPMD_MODIFIED_PKT},\ + {"fid count", BCMPKT_RXPMD_FID_COUNT} + +/*! + * \name BCMPKT_RXPMD_TIMESTAMP_TYPE encodings. + * \anchor BCMPKT_RXPMD_TIMESTAMP_TYPE_XXX + */ +/*! \{ */ +/*! */ +#define BCMPKT_RXPMD_TIMESTAMP_T_INVALID 0 +/*! */ +#define BCMPKT_RXPMD_TIMESTAMP_T_MMU_32NS 1 +/*! */ +#define BCMPKT_RXPMD_TIMESTAMP_T_OAM_LM 1 +/*! */ +#define BCMPKT_RXPMD_TIMESTAMP_T_OAM_DM 2 +/*! */ +#define BCMPKT_RXPMD_TIMESTAMP_T_PM_8NS 2 +/*! */ +#define BCMPKT_RXPMD_TIMESTAMP_T_IEEE_802_1AS 3 +/*! */ +#define BCMPKT_RXPMD_TIMESTAMP_T_PM_1NS 3 +/*! \} */ + +/*! BCMPKT_RXPMD_TIMESTAMP_TYPE encoding name strings for debugging. */ +#define BCMPKT_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT \ + {"INVALID", BCMPKT_RXPMD_TIMESTAMP_T_INVALID},\ + {"MMU_32NS", BCMPKT_RXPMD_TIMESTAMP_T_MMU_32NS},\ + {"OAM_LM", BCMPKT_RXPMD_TIMESTAMP_T_OAM_LM},\ + {"OAM_DM", BCMPKT_RXPMD_TIMESTAMP_T_OAM_DM},\ + {"PM_8NS", BCMPKT_RXPMD_TIMESTAMP_T_PM_8NS},\ + {"IEEE_802_1AS", BCMPKT_RXPMD_TIMESTAMP_T_IEEE_802_1AS},\ + {"PM_1NS", BCMPKT_RXPMD_TIMESTAMP_T_PM_1NS},\ + +/*! + * \name BCMPKT_RXPMD_ING_TAG_TYPE encodings. + * \anchor BCMPKT_RXPMD_ING_TAG_TYPE_XXX + */ +/*! \{ */ +/*! No tag */ +#define BCMPKT_RXPMD_ING_TAG_T_NONE 0 +/*! Singgle inner tag */ +#define BCMPKT_RXPMD_ING_TAG_T_SINGLE_INNER 1 +/*! Tagged */ +#define BCMPKT_RXPMD_ING_TAG_T_TAGGED 1 +/*! Singgle outer tag */ +#define BCMPKT_RXPMD_ING_TAG_T_SINGLE_OUTER 2 +/*! Double tags */ +#define BCMPKT_RXPMD_ING_TAG_T_DOUBLE 3 +/*! \} */ + +/*! BCMPKT_RXPMD_ING_TAG_TYPE encoding name strings for debugging. */ +#define BCMPKT_RXPMD_ING_TAG_TYPE_NAME_MAP_INIT \ + {"NONE", BCMPKT_RXPMD_ING_TAG_T_NONE},\ + {"SINGLE_INNER", BCMPKT_RXPMD_ING_TAG_T_SINGLE_INNER},\ + {"TAGGED", BCMPKT_RXPMD_ING_TAG_T_TAGGED},\ + {"SINGLE_OUTER", BCMPKT_RXPMD_ING_TAG_T_SINGLE_OUTER},\ + {"DOUBLE", BCMPKT_RXPMD_ING_TAG_T_DOUBLE},\ + +/*! + * \name BCMPKT_RXPMD_EH_TYPE encodings. + * \anchor BCMPKT_RXPMD_EH_TYPE_XXX + */ +/*! \{ */ +/*! */ +#define BCMPKT_RXPMD_EH_T_0 0 +/*! */ +#define BCMPKT_RXPMD_EH_T_1 1 +/*! */ +#define BCMPKT_RXPMD_EH_T_2 2 +/*! \} */ + +/*! BCMPKT_RXPMD_EH_TYPE encoding name strings for debugging. */ +#define BCMPKT_RXPMD_EH_TYPE_NAME_MAP_INIT \ + {"EH_TYPE_0", BCMPKT_RXPMD_EH_T_0},\ + {"EH_TYPE_1", BCMPKT_RXPMD_EH_T_1},\ + {"EH_TYPE_2", BCMPKT_RXPMD_EH_T_2},\ + +/*! + * \name BCMPKT_RXPMD_REASON_TYPE encodings. + * \anchor BCMPKT_RXPMD_REASON_TYPE_XXX + */ +/*! \{ */ +/*! */ +#define BCMPKT_RXPMD_REASON_T_FROM_IP 0 +/*! */ +#define BCMPKT_RXPMD_REASON_T_FROM_EP 1 +/*! \} */ + +/*! BCMPKT_RXPMD_REASON_TYPE encoding name strings for debugging. */ +#define BCMPKT_RXPMD_REASON_TYPE_NAME_MAP_INIT \ + {"CTC_INITIATED_FROM_IP", BCMPKT_RXPMD_REASON_T_FROM_IP},\ + {"CTC_INITIATED_FROM_EP", BCMPKT_RXPMD_REASON_T_FROM_EP},\ + +/*! + * \name RX packet metadata internal usage field IDs. + * \anchor BCMPKT_RXPMD_I_XXX + */ +/*! \{ */ +/*! Invalid BCMPKT_RXPMD_I FID indicator */ +#define BCMPKT_RXPMD_I_FID_INVALID -1 +/*! RXPMD raw data size. */ +#define BCMPKT_RXPMD_I_SIZE 0 +/*! Contains RX reasons. Refer to bcmpkt_rxpmd_reasons_get to decode reasons. */ +#define BCMPKT_RXPMD_I_REASON 1 +/*! Module Header information. Refer to Higig macros to encode/decode this erea. */ +#define BCMPKT_RXPMD_I_MODULE_HDR 2 +/*! MPB flex_data */ +#define BCMPKT_RXPMD_I_FLEX_DATA 3 +/*! RXPMD_I FIELD ID NUMBER */ +#define BCMPKT_RXPMD_I_FID_COUNT 4 +/*! \} */ + +/*! RXPMD_I field name strings for debugging. */ +#define BCMPKT_RXPMD_I_FIELD_NAME_MAP_INIT \ + {"SIZE", BCMPKT_RXPMD_I_SIZE},\ + {"REASON", BCMPKT_RXPMD_I_REASON},\ + {"MODULE_HDR", BCMPKT_RXPMD_I_MODULE_HDR},\ + {"FLEX_DATA", BCMPKT_RXPMD_I_FLEX_DATA},\ + {"fid count", BCMPKT_RXPMD_I_FID_COUNT} + +/*! + * \name Packet RX Reason Types. + * \anchor BCMPKT_RX_REASON_XXX + */ +/*! \{ */ +/*! No reason */ +#define BCMPKT_RX_REASON_NONE 0 +/*! Adapt miss. */ +#define BCMPKT_RX_REASON_ADAPT_MISS 1 +/*! IPMC interface mismatch */ +#define BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH 2 +/*! Get: Indicate NAT REASON happened; Set: Configure NAT REASON mask. */ +#define BCMPKT_RX_REASON_NAT 3 +/*! TCP/UDP packet NAT lookup miss. */ +#define BCMPKT_RX_REASON_NAT_TCP_UDP_MISS 4 +/*! ICMP packet NAT lookup miss. */ +#define BCMPKT_RX_REASON_NAT_ICMP_MISS 5 +/*! NAT lookup on fragmented packet. */ +#define BCMPKT_RX_REASON_NAT_FRAGMENT 6 +/*! Non TCP/UDP/ICMP packet NAT lookup miss. */ +#define BCMPKT_RX_REASON_NAT_OTHER_MISS 7 +/*! FCOE zone check fail */ +#define BCMPKT_RX_REASON_FCOE_ZONE_CHECK_FAIL 11 +/*! VXLAN VNID miss */ +#define BCMPKT_RX_REASON_VXLAN_VN_ID_MISS 12 +/*! VXLAN SIP miss */ +#define BCMPKT_RX_REASON_VXLAN_SIP_MISS 13 +/*! QCN_CNM_PRP_DLF */ +#define BCMPKT_RX_REASON_QCN_CNM_PRP_DLF 14 +/*! QCN_CNM_PRP */ +#define BCMPKT_RX_REASON_QCN_CNM_PRP 15 +/*! MPLS_ALERT_LABEL */ +#define BCMPKT_RX_REASON_MPLS_ALERT_LABEL 16 +/*! MPLS_ILLEGAL_RESERVED_LABEL */ +#define BCMPKT_RX_REASON_MPLS_ILLEGAL_RESERVED_LABEL 17 +/*! ICNM */ +#define BCMPKT_RX_REASON_ICNM 18 +/*! Copy to CPU for visibility packet */ +#define BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU 19 +/*! BFD Error */ +#define BCMPKT_RX_REASON_BFD_ERROR 20 +/*! BFD Slowpath to CPU */ +#define BCMPKT_RX_REASON_BFD_SLOWPATH 21 +/*! L2GRE_VPNID_MISS */ +#define BCMPKT_RX_REASON_L2GRE_VPNID_MISS 22 +/*! L2GRE_SIP_MISS */ +#define BCMPKT_RX_REASON_L2GRE_SIP_MISS 23 +/*! Get: Indicate TRILL REASON happened; Set: Configure TRILL REASON mask. */ +#define BCMPKT_RX_REASON_TRILL 24 +/*! Trill Header Error */ +#define BCMPKT_RX_REASON_TRILL_HDR_ERROR 25 +/*! Trill Lookup Miss */ +#define BCMPKT_RX_REASON_TRILL_LOOKUP_MISS 26 +/*! Trill RPF Check Fail */ +#define BCMPKT_RX_REASON_TRILL_RPF_CHECK_FAIL 27 +/*! Trill Slow Path */ +#define BCMPKT_RX_REASON_TRILL_SLOWPATH 28 +/*! Trill Core IS-IS */ +#define BCMPKT_RX_REASON_TRILL_CORE_IS_IS_PKT 29 +/*! Trill Hop Count Check Failure */ +#define BCMPKT_RX_REASON_TRILL_HOP_COUNT_CHECK_FAIL 30 +/*! Rbridge nickname lookup copy to cpu */ +#define BCMPKT_RX_REASON_TRILL_NICKNAME_TABLE 31 +/*! Tunnel decap ECN error */ +#define BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR 32 +/*! OAM packets copied to the CPU for slowpath processing */ +#define BCMPKT_RX_REASON_OAM_SLOWPATH 33 +/*! + * Indicates packet was copied to CPU due to a network time sync packet. This is + * set either by dedicated IEEE 802.1AS controls or the FP. + */ +#define BCMPKT_RX_REASON_TIME_SYNC 34 +/*! Indicates packet was copied to the CPU due to VLAN Translation miss. */ +#define BCMPKT_RX_REASON_VXLT_MISS 35 +/*! Get: Indicate NIV REASON happened; Set: Configure NIV REASON mask. */ +#define BCMPKT_RX_REASON_NIV 36 +/*! Dot1p Admittance Discard */ +#define BCMPKT_RX_REASON_NIV_DOT1P_DROP 37 +/*! VIF Lookup Miss */ +#define BCMPKT_RX_REASON_NIV_VIF_MISS 38 +/*! RPF Lookup Miss */ +#define BCMPKT_RX_REASON_NIV_RPF_MISS 39 +/*! VNTAG Format Error */ +#define BCMPKT_RX_REASON_NIV_VNTAG_ERROR 40 +/*! VNTAG Present Drop */ +#define BCMPKT_RX_REASON_NIV_VNTAG_PRESENT 41 +/*! VNTAG Not Present Drop */ +#define BCMPKT_RX_REASON_NIV_VNTAG_NOT_PRESENT 42 +/*! Copy to CPU for MY_STATION match reason */ +#define BCMPKT_RX_REASON_MY_STATION 44 +/*! MPLS unknown ACH */ +#define BCMPKT_RX_REASON_MPLS_UNKNOWN_ACH_ERROR 45 +/*! ING_L3_NEXT_HOP table copy to CPU */ +#define BCMPKT_RX_REASON_L3_NEXT_HOP 46 +/*! Provider Backbone Transport pkt is not unicast */ +#define BCMPKT_RX_REASON_PBT_NONUC_PKT 47 +/*! Bit32 - MPLS sequence number check fail */ +#define BCMPKT_RX_REASON_MPLS_SEQ_NUM_FAIL 48 +/*! Bit31 - MPLS TTL check fail */ +#define BCMPKT_RX_REASON_MPLS_TTL_CHECK_FAIL 49 +/*! Bit30 - MPLS invalid payload */ +#define BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD 50 +/*! Bit29 - MPLS invalid label action */ +#define BCMPKT_RX_REASON_MPLS_INVALID_ACTION 51 +/*! Bit28 - MPLS label lookup miss */ +#define BCMPKT_RX_REASON_MPLS_LABEL_MISS 52 +/*! Copy to CPU for MAC to IP bind check failures */ +#define BCMPKT_RX_REASON_MAC_BIND_FAIL 53 +/*! Bit26 - CBSM_PREVENTED - copy to CPU */ +#define BCMPKT_RX_REASON_CBSM_PREVENTED 54 +/*! Bit25 - VFP Action - copy to CPU */ +#define BCMPKT_RX_REASON_CPU_VFP 55 +/*! Bit24 - Multicast index error */ +#define BCMPKT_RX_REASON_MCIDX_ERROR 56 +/*! Bit23 - HiGig Header error */ +#define BCMPKT_RX_REASON_HGHDR_ERROR 57 +/*! Bit22 - L3 MTU check fail to CPU */ +#define BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL 58 +/*! Bit21 - Parity error on IP tables */ +#define BCMPKT_RX_REASON_PARITY_ERROR 59 +/*! Bit20 - L3 slow path CPU processed packets */ +#define BCMPKT_RX_REASON_L3_SLOWPATH 60 +/*! Bit19 - ICMP Redirect copy to CPU */ +#define BCMPKT_RX_REASON_ICMP_REDIRECT 61 +/*! Bit18 - Flex Sflow */ +#define BCMPKT_RX_REASON_CPU_SFLOW_FLEX 62 +/*! Bit17 - Tunnel error trap to CPU */ +#define BCMPKT_RX_REASON_CPU_TUNNEL_ERR 63 +/*! Bit16 - Martian address trap to CPU */ +#define BCMPKT_RX_REASON_CPU_MARTIAN_ADDR 64 +/*! Bit15 - DOS attack trap to CPU */ +#define BCMPKT_RX_REASON_CPU_DOS_ATTACK 65 +/*! Bit14 - Protocol Packet */ +#define BCMPKT_RX_REASON_CPU_PROTOCOL_PKT 66 +/*! Bit13 - L3 header - IP options, TTL=0, !IPv4 etc. */ +#define BCMPKT_RX_REASON_CPU_L3HDR_ERR 67 +/*! Bit12 - FFP Action - copy to CPU */ +#define BCMPKT_RX_REASON_CPU_FFP 68 +/*! Bit11 - IPMC miss - {SIP, DIP} miss or DIP miss */ +#define BCMPKT_RX_REASON_CPU_IPMC_MISS 69 +/*! Bit10 - MC miss */ +#define BCMPKT_RX_REASON_CPU_MC_MISS 70 +/*! Bit9 - Station Movement - L3 */ +#define BCMPKT_RX_REASON_CPU_L3SRC_MOVE 71 +/*! Bit8 - L3 DIP Miss */ +#define BCMPKT_RX_REASON_CPU_L3DST_MISS 72 +/*! Bit7 - L3 SIP Miss */ +#define BCMPKT_RX_REASON_CPU_L3SRC_MISS 73 +/*! Bit6 - sFlow - Dst */ +#define BCMPKT_RX_REASON_CPU_SFLOW_DST 74 +/*! Bit5 - sFlow - Src */ +#define BCMPKT_RX_REASON_CPU_SFLOW_SRC 75 +/*! Bit4 - L2_TABLE - copy to CPU */ +#define BCMPKT_RX_REASON_CPU_L2CPU 76 +/*! Bit3- Station Movement - L2 */ +#define BCMPKT_RX_REASON_CPU_L2MOVE 77 +/*! Bit2 - DLF, */ +#define BCMPKT_RX_REASON_CPU_DLF 78 +/*! Bit1 - SLF */ +#define BCMPKT_RX_REASON_CPU_SLF 79 +/*! Bit0- CPU Learn bit is set in PTABLE and SA is learnt; unknown VLAN; VID = 0xfff */ +#define BCMPKT_RX_REASON_CPU_UVLAN 80 +/*! Bit18 - protection data dropped packet copied to CPU */ +#define BCMPKT_RX_REASON_PROTECTION_DATA_DROP 81 +/*! OAM packets copied to the CPU for error cases */ +#define BCMPKT_RX_REASON_OAM_ERROR 82 +/*! Copy to CPU for OAM LMDM */ +#define BCMPKT_RX_REASON_OAM_LMDM 83 +/*! Get: Indicate SFLOW REASON happened; Set: Configure SFLOW REASON mask. */ +#define BCMPKT_RX_REASON_CPU_SFLOW 84 +/*! FP based Sflow */ +#define BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX 85 +/*! Egress port-based Sflow */ +#define BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST 86 +/*! Ingress port-based Sflow */ +#define BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC 87 +/*! Get: Indicate SFLOW REASON happened; Set: Configure SFLOW REASON mask. */ +#define BCMPKT_RX_REASON_MPLS_PROC_ERROR 88 +/*! Invalid payload. */ +#define BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD 89 +/*! Invalid action. */ +#define BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION 90 +/*! Lookup label miss. */ +#define BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS 91 +/*! TTL check fail. */ +#define BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL 92 +/*! TBD. */ +#define BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT 96 +/*! Copied to CPU by ETRAP monitor. */ +#define BCMPKT_RX_REASON_ETRAP_MONITOR 97 +/*! Copied to CPU by Inband Telemetry turnaround. */ +#define BCMPKT_RX_REASON_INT_TURN_AROUND 98 +/*! Copied to CPU by DLB monitor. */ +#define BCMPKT_RX_REASON_DLB_MONITOR 99 +/*! Bit13 - L3 header - IP options, TTL=0, !IPv4 etc. */ +#define BCMPKT_RX_REASON_CPU_L3_HDR_MISMATCH 100 +/*! Bit31 - tunnel with object validation check fail */ +#define BCMPKT_RX_REASON_TUNNEL_OBJECT_VALIDATION_FAIL 101 +/*! L3 copy to CPU. */ +#define BCMPKT_RX_REASON_CPU_L3CPU 102 +/*! VNTAG unknown SUBTENDING port */ +#define BCMPKT_RX_REASON_VNTAG_UNKNOWN_SUBTENDING_PORT_ERROR 103 +/*! RPF Lookup Miss */ +#define BCMPKT_RX_REASON_RPF_MISS 104 +/*! Dot1p Admittance Discard */ +#define BCMPKT_RX_REASON_DOT1P_ADMITTANCE_DISCARD 105 +/*! + * It should be renamed to TUNNEL_ADAPT_LOOKUP_CPU. Indicates packet was copied + * to the CPU due to TUNNEL_ADAPT_LOOKUP's miss policy or hit policy copy to cpu. + */ +#define BCMPKT_RX_REASON_TUNNEL_ADAPT_LOOKUP_MISS_DROP 106 +/*! PKT_FLOW_SELECT_MISS_TO_CPU */ +#define BCMPKT_RX_REASON_PKT_FLOW_SELECT_MISS 107 +/*! Indicates packet was copied to the CPU due to PKT_FLOW_SELECT policy. */ +#define BCMPKT_RX_REASON_PKT_FLOW_SELECT 108 +/*! + * It should be renamed to TUNNEL_ADAPT_LOOKUP_MISS_TO_CPU_FROM_LOGICAL_TABLE_SEL. + * Indicates packet was copied to the CPU due to FORWARDING_LOOKUP miss. + */ +#define BCMPKT_RX_REASON_CPU_FORWARDING_OTHER 109 +/*! */ +#define BCMPKT_RX_REASON_INVALID_TPID 110 +/*! */ +#define BCMPKT_RX_REASON_MPLS_CONTROL_PKT 111 +/*! TUNNEL_ERR_TO_CPU */ +#define BCMPKT_RX_REASON_TUNNEL_ERR 112 +/*! TUNNEL_TTL_ERR_TO_CPU Error */ +#define BCMPKT_RX_REASON_TUNNEL_TTL_ERR 113 +/*! */ +#define BCMPKT_RX_REASON_L3_HDR_ERROR 114 +/*! */ +#define BCMPKT_RX_REASON_L2_HDR_ERROR 115 +/*! */ +#define BCMPKT_RX_REASON_TTL1_ERR 116 +/*! */ +#define BCMPKT_RX_REASON_TTL_ERR 117 +/*! Nat error packet. */ +#define BCMPKT_RX_REASON_NAT_ERROR 118 +/*! L2 MTU check fail to CPU */ +#define BCMPKT_RX_REASON_L2_MTU_CHECK_FAIL 119 +/*! Over system MAC limit threshold to CPU */ +#define BCMPKT_RX_REASON_L2_MAC_LIMIT 120 +/*! L2 STU check fail to CPU */ +#define BCMPKT_RX_REASON_L2_STU_CHECK_FAIL 121 +/*! SR counter threshold exceeded to CPU. */ +#define BCMPKT_RX_REASON_SR_COUNTER_LIMIT 122 +/*! SRV6_PROC_ERROR */ +#define BCMPKT_RX_REASON_SRV6_ERROR 123 +/*! Protection status = down. */ +#define BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN 124 +/*! Invalid opcode. */ +#define BCMPKT_RX_REASON_CPU_INVALID_REASON 125 +/*! MPLS TTL Check. */ +#define BCMPKT_RX_REASON_MPLS_TTL_CHECK 126 +/*! Bit Definitions of the CPU Opcodes. */ +#define BCMPKT_RX_REASON_SVTAG_CPU_BIT_SET 127 +/*! Subport ID lookup miss in Channelization. */ +#define BCMPKT_RX_REASON_SUBPORT_ID_LOOKUP_MISS 128 +/*! OAM operation. */ +#define BCMPKT_RX_REASON_OAM_PROCESSING 129 +/*! Invalid. */ +#define BCMPKT_RX_REASON_OAM_PROCESSING_INVALID 130 +/*! OAM CCM. */ +#define BCMPKT_RX_REASON_OAM_PROCESSING_OAM_CCM 131 +/*! OAM LM. */ +#define BCMPKT_RX_REASON_OAM_PROCESSING_OAM_LM 132 +/*! OAM DM. */ +#define BCMPKT_RX_REASON_OAM_PROCESSING_OAM_DM 133 +/*! OAM Other opcodes. */ +#define BCMPKT_RX_REASON_OAM_PROCESSING_OAM_OTHER_OPCODES 134 +/*! Invalid GSH or NON_GSH packet based on port configuration. */ +#define BCMPKT_RX_REASON_INVALID_GSH_NON_GSH 137 +/*! Copy to CPU triggered at egress pipeline. */ +#define BCMPKT_RX_REASON_EP_CTC 138 +/*! Indicates SVTAG.ERROR !=0 or SVTAG.CPU = 1. */ +#define BCMPKT_RX_REASON_MACSEC 139 +/*! APU Policy CTC. */ +#define BCMPKT_RX_REASON_APU_POLICY_CTC 140 +/*! Delayed CTC. */ +#define BCMPKT_RX_REASON_DELAYED_CTC 141 +/*! Indicates Copy to CPU is for PORT_DOWN event. */ +#define BCMPKT_RX_REASON_PORT_DOWN 142 +/*! SRV6 Control Packet */ +#define BCMPKT_RX_REASON_SRV6_CONTROL_PKT 143 +/*! OUI Compression miss */ +#define BCMPKT_RX_REASON_OUI_COMPRESSION_MISS 144 +/*! BCMPKT_RX_REASON TYPE NUMBER */ +#define BCMPKT_RX_REASON_COUNT 145 +/*! \} */ + +/*! RXPMD reason name strings for debugging. */ +#define BCMPKT_REASON_NAME_MAP_INIT \ + {"NONE", BCMPKT_RX_REASON_NONE},\ + {"ADAPT_MISS", BCMPKT_RX_REASON_ADAPT_MISS},\ + {"CPU_IPMC_INTERFACE_MISMATCH", BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH},\ + {"NAT", BCMPKT_RX_REASON_NAT},\ + {"NAT_TCP_UDP_MISS", BCMPKT_RX_REASON_NAT_TCP_UDP_MISS},\ + {"NAT_ICMP_MISS", BCMPKT_RX_REASON_NAT_ICMP_MISS},\ + {"NAT_FRAGMENT", BCMPKT_RX_REASON_NAT_FRAGMENT},\ + {"NAT_OTHER_MISS", BCMPKT_RX_REASON_NAT_OTHER_MISS},\ + {"RESERVED_REASON", 8},\ + {"RESERVED_REASON", 9},\ + {"RESERVED_REASON", 10},\ + {"FCOE_ZONE_CHECK_FAIL", BCMPKT_RX_REASON_FCOE_ZONE_CHECK_FAIL},\ + {"VXLAN_VN_ID_MISS", BCMPKT_RX_REASON_VXLAN_VN_ID_MISS},\ + {"VXLAN_SIP_MISS", BCMPKT_RX_REASON_VXLAN_SIP_MISS},\ + {"QCN_CNM_PRP_DLF", BCMPKT_RX_REASON_QCN_CNM_PRP_DLF},\ + {"QCN_CNM_PRP", BCMPKT_RX_REASON_QCN_CNM_PRP},\ + {"MPLS_ALERT_LABEL", BCMPKT_RX_REASON_MPLS_ALERT_LABEL},\ + {"MPLS_ILLEGAL_RESERVED_LABEL", BCMPKT_RX_REASON_MPLS_ILLEGAL_RESERVED_LABEL},\ + {"ICNM", BCMPKT_RX_REASON_ICNM},\ + {"PACKET_TRACE_TO_CPU", BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU},\ + {"BFD_ERROR", BCMPKT_RX_REASON_BFD_ERROR},\ + {"BFD_SLOWPATH", BCMPKT_RX_REASON_BFD_SLOWPATH},\ + {"L2GRE_VPNID_MISS", BCMPKT_RX_REASON_L2GRE_VPNID_MISS},\ + {"L2GRE_SIP_MISS", BCMPKT_RX_REASON_L2GRE_SIP_MISS},\ + {"TRILL", BCMPKT_RX_REASON_TRILL},\ + {"TRILL_HDR_ERROR", BCMPKT_RX_REASON_TRILL_HDR_ERROR},\ + {"TRILL_LOOKUP_MISS", BCMPKT_RX_REASON_TRILL_LOOKUP_MISS},\ + {"TRILL_RPF_CHECK_FAIL", BCMPKT_RX_REASON_TRILL_RPF_CHECK_FAIL},\ + {"TRILL_SLOWPATH", BCMPKT_RX_REASON_TRILL_SLOWPATH},\ + {"TRILL_CORE_IS_IS_PKT", BCMPKT_RX_REASON_TRILL_CORE_IS_IS_PKT},\ + {"TRILL_HOP_COUNT_CHECK_FAIL", BCMPKT_RX_REASON_TRILL_HOP_COUNT_CHECK_FAIL},\ + {"TRILL_NICKNAME_TABLE", BCMPKT_RX_REASON_TRILL_NICKNAME_TABLE},\ + {"TUNNEL_DECAP_ECN_ERROR", BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR},\ + {"OAM_SLOWPATH", BCMPKT_RX_REASON_OAM_SLOWPATH},\ + {"TIME_SYNC", BCMPKT_RX_REASON_TIME_SYNC},\ + {"VXLT_MISS", BCMPKT_RX_REASON_VXLT_MISS},\ + {"NIV", BCMPKT_RX_REASON_NIV},\ + {"NIV_DOT1P_DROP", BCMPKT_RX_REASON_NIV_DOT1P_DROP},\ + {"NIV_VIF_MISS", BCMPKT_RX_REASON_NIV_VIF_MISS},\ + {"NIV_RPF_MISS", BCMPKT_RX_REASON_NIV_RPF_MISS},\ + {"NIV_VNTAG_ERROR", BCMPKT_RX_REASON_NIV_VNTAG_ERROR},\ + {"NIV_VNTAG_PRESENT", BCMPKT_RX_REASON_NIV_VNTAG_PRESENT},\ + {"NIV_VNTAG_NOT_PRESENT", BCMPKT_RX_REASON_NIV_VNTAG_NOT_PRESENT},\ + {"RESERVED_REASON", 43},\ + {"MY_STATION", BCMPKT_RX_REASON_MY_STATION},\ + {"MPLS_UNKNOWN_ACH_ERROR", BCMPKT_RX_REASON_MPLS_UNKNOWN_ACH_ERROR},\ + {"L3_NEXT_HOP", BCMPKT_RX_REASON_L3_NEXT_HOP},\ + {"PBT_NONUC_PKT", BCMPKT_RX_REASON_PBT_NONUC_PKT},\ + {"MPLS_SEQ_NUM_FAIL", BCMPKT_RX_REASON_MPLS_SEQ_NUM_FAIL},\ + {"MPLS_TTL_CHECK_FAIL", BCMPKT_RX_REASON_MPLS_TTL_CHECK_FAIL},\ + {"MPLS_INVALID_PAYLOAD", BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD},\ + {"MPLS_INVALID_ACTION", BCMPKT_RX_REASON_MPLS_INVALID_ACTION},\ + {"MPLS_LABEL_MISS", BCMPKT_RX_REASON_MPLS_LABEL_MISS},\ + {"MAC_BIND_FAIL", BCMPKT_RX_REASON_MAC_BIND_FAIL},\ + {"CBSM_PREVENTED", BCMPKT_RX_REASON_CBSM_PREVENTED},\ + {"CPU_VFP", BCMPKT_RX_REASON_CPU_VFP},\ + {"MCIDX_ERROR", BCMPKT_RX_REASON_MCIDX_ERROR},\ + {"HGHDR_ERROR", BCMPKT_RX_REASON_HGHDR_ERROR},\ + {"L3_MTU_CHECK_FAIL", BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL},\ + {"PARITY_ERROR", BCMPKT_RX_REASON_PARITY_ERROR},\ + {"L3_SLOWPATH", BCMPKT_RX_REASON_L3_SLOWPATH},\ + {"ICMP_REDIRECT", BCMPKT_RX_REASON_ICMP_REDIRECT},\ + {"CPU_SFLOW_FLEX", BCMPKT_RX_REASON_CPU_SFLOW_FLEX},\ + {"CPU_TUNNEL_ERR", BCMPKT_RX_REASON_CPU_TUNNEL_ERR},\ + {"CPU_MARTIAN_ADDR", BCMPKT_RX_REASON_CPU_MARTIAN_ADDR},\ + {"CPU_DOS_ATTACK", BCMPKT_RX_REASON_CPU_DOS_ATTACK},\ + {"CPU_PROTOCOL_PKT", BCMPKT_RX_REASON_CPU_PROTOCOL_PKT},\ + {"CPU_L3HDR_ERR", BCMPKT_RX_REASON_CPU_L3HDR_ERR},\ + {"CPU_FFP", BCMPKT_RX_REASON_CPU_FFP},\ + {"CPU_IPMC_MISS", BCMPKT_RX_REASON_CPU_IPMC_MISS},\ + {"CPU_MC_MISS", BCMPKT_RX_REASON_CPU_MC_MISS},\ + {"CPU_L3SRC_MOVE", BCMPKT_RX_REASON_CPU_L3SRC_MOVE},\ + {"CPU_L3DST_MISS", BCMPKT_RX_REASON_CPU_L3DST_MISS},\ + {"CPU_L3SRC_MISS", BCMPKT_RX_REASON_CPU_L3SRC_MISS},\ + {"CPU_SFLOW_DST", BCMPKT_RX_REASON_CPU_SFLOW_DST},\ + {"CPU_SFLOW_SRC", BCMPKT_RX_REASON_CPU_SFLOW_SRC},\ + {"CPU_L2CPU", BCMPKT_RX_REASON_CPU_L2CPU},\ + {"CPU_L2MOVE", BCMPKT_RX_REASON_CPU_L2MOVE},\ + {"CPU_DLF", BCMPKT_RX_REASON_CPU_DLF},\ + {"CPU_SLF", BCMPKT_RX_REASON_CPU_SLF},\ + {"CPU_UVLAN", BCMPKT_RX_REASON_CPU_UVLAN},\ + {"PROTECTION_DATA_DROP", BCMPKT_RX_REASON_PROTECTION_DATA_DROP},\ + {"OAM_ERROR", BCMPKT_RX_REASON_OAM_ERROR},\ + {"OAM_LMDM", BCMPKT_RX_REASON_OAM_LMDM},\ + {"CPU_SFLOW", BCMPKT_RX_REASON_CPU_SFLOW},\ + {"CPU_SFLOW_CPU_SFLOW_FLEX", BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX},\ + {"CPU_SFLOW_CPU_SFLOW_DST", BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST},\ + {"CPU_SFLOW_CPU_SFLOW_SRC", BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC},\ + {"MPLS_PROC_ERROR", BCMPKT_RX_REASON_MPLS_PROC_ERROR},\ + {"MPLS_PROC_ERROR_INVALID_PAYLOAD", BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD},\ + {"MPLS_PROC_ERROR_INVALID_ACTION", BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION},\ + {"MPLS_PROC_ERROR_LABEL_MISS", BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS},\ + {"MPLS_PROC_ERROR_TTL_CHECK_FAIL", BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL},\ + {"RESERVED_REASON", 93},\ + {"RESERVED_REASON", 94},\ + {"RESERVED_REASON", 95},\ + {"MPLS_UNKNOWN_CONTROL_PKT", BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT},\ + {"ETRAP_MONITOR", BCMPKT_RX_REASON_ETRAP_MONITOR},\ + {"INT_TURN_AROUND", BCMPKT_RX_REASON_INT_TURN_AROUND},\ + {"DLB_MONITOR", BCMPKT_RX_REASON_DLB_MONITOR},\ + {"CPU_L3_HDR_MISMATCH", BCMPKT_RX_REASON_CPU_L3_HDR_MISMATCH},\ + {"TUNNEL_OBJECT_VALIDATION_FAIL", BCMPKT_RX_REASON_TUNNEL_OBJECT_VALIDATION_FAIL},\ + {"CPU_L3CPU", BCMPKT_RX_REASON_CPU_L3CPU},\ + {"VNTAG_UNKNOWN_SUBTENDING_PORT_ERROR", BCMPKT_RX_REASON_VNTAG_UNKNOWN_SUBTENDING_PORT_ERROR},\ + {"RPF_MISS", BCMPKT_RX_REASON_RPF_MISS},\ + {"DOT1P_ADMITTANCE_DISCARD", BCMPKT_RX_REASON_DOT1P_ADMITTANCE_DISCARD},\ + {"TUNNEL_ADAPT_LOOKUP_MISS_DROP", BCMPKT_RX_REASON_TUNNEL_ADAPT_LOOKUP_MISS_DROP},\ + {"PKT_FLOW_SELECT_MISS", BCMPKT_RX_REASON_PKT_FLOW_SELECT_MISS},\ + {"PKT_FLOW_SELECT", BCMPKT_RX_REASON_PKT_FLOW_SELECT},\ + {"CPU_FORWARDING_OTHER", BCMPKT_RX_REASON_CPU_FORWARDING_OTHER},\ + {"INVALID_TPID", BCMPKT_RX_REASON_INVALID_TPID},\ + {"MPLS_CONTROL_PKT", BCMPKT_RX_REASON_MPLS_CONTROL_PKT},\ + {"TUNNEL_ERR", BCMPKT_RX_REASON_TUNNEL_ERR},\ + {"TUNNEL_TTL_ERR", BCMPKT_RX_REASON_TUNNEL_TTL_ERR},\ + {"L3_HDR_ERROR", BCMPKT_RX_REASON_L3_HDR_ERROR},\ + {"L2_HDR_ERROR", BCMPKT_RX_REASON_L2_HDR_ERROR},\ + {"TTL1_ERR", BCMPKT_RX_REASON_TTL1_ERR},\ + {"TTL_ERR", BCMPKT_RX_REASON_TTL_ERR},\ + {"NAT_ERROR", BCMPKT_RX_REASON_NAT_ERROR},\ + {"L2_MTU_CHECK_FAIL", BCMPKT_RX_REASON_L2_MTU_CHECK_FAIL},\ + {"L2_MAC_LIMIT", BCMPKT_RX_REASON_L2_MAC_LIMIT},\ + {"L2_STU_CHECK_FAIL", BCMPKT_RX_REASON_L2_STU_CHECK_FAIL},\ + {"SR_COUNTER_LIMIT", BCMPKT_RX_REASON_SR_COUNTER_LIMIT},\ + {"SRV6_ERROR", BCMPKT_RX_REASON_SRV6_ERROR},\ + {"NH_PROTO_STATUS_DOWN", BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN},\ + {"CPU_INVALID_REASON", BCMPKT_RX_REASON_CPU_INVALID_REASON},\ + {"MPLS_TTL_CHECK", BCMPKT_RX_REASON_MPLS_TTL_CHECK},\ + {"SVTAG_CPU_BIT_SET", BCMPKT_RX_REASON_SVTAG_CPU_BIT_SET},\ + {"SUBPORT_ID_LOOKUP_MISS", BCMPKT_RX_REASON_SUBPORT_ID_LOOKUP_MISS},\ + {"OAM_PROCESSING", BCMPKT_RX_REASON_OAM_PROCESSING},\ + {"OAM_PROCESSING_INVALID", BCMPKT_RX_REASON_OAM_PROCESSING_INVALID},\ + {"OAM_PROCESSING_OAM_CCM", BCMPKT_RX_REASON_OAM_PROCESSING_OAM_CCM},\ + {"OAM_PROCESSING_OAM_LM", BCMPKT_RX_REASON_OAM_PROCESSING_OAM_LM},\ + {"OAM_PROCESSING_OAM_DM", BCMPKT_RX_REASON_OAM_PROCESSING_OAM_DM},\ + {"OAM_PROCESSING_OAM_OTHER_OPCODES", BCMPKT_RX_REASON_OAM_PROCESSING_OAM_OTHER_OPCODES},\ + {"RESERVED_REASON", 135},\ + {"RESERVED_REASON", 136},\ + {"INVALID_GSH_NON_GSH", BCMPKT_RX_REASON_INVALID_GSH_NON_GSH},\ + {"EP_CTC", BCMPKT_RX_REASON_EP_CTC},\ + {"MACSEC", BCMPKT_RX_REASON_MACSEC},\ + {"APU_POLICY_CTC", BCMPKT_RX_REASON_APU_POLICY_CTC},\ + {"DELAYED_CTC", BCMPKT_RX_REASON_DELAYED_CTC},\ + {"PORT_DOWN", BCMPKT_RX_REASON_PORT_DOWN},\ + {"SRV6_CONTROL_PKT", BCMPKT_RX_REASON_SRV6_CONTROL_PKT},\ + {"OUI_COMPRESSION_MISS", BCMPKT_RX_REASON_OUI_COMPRESSION_MISS},\ + {"reason count", BCMPKT_RX_REASON_COUNT} + +#endif /*! BCMPKT_RXPMD_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h new file mode 100644 index 000000000000..d707513f3c43 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h @@ -0,0 +1,83 @@ +/*! \file bcmpkt_rxpmd_fid.h + * + * RX Packet Meta Data (RXPMD) field id header file. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_RXPMD_FID_H +#define BCMPKT_RXPMD_FID_H + +#include +#include + +/*! \brief RXPMD field ID supported bit array. + * Array of bits indicating whether a RXPMD field ID is supported by a given + * device type. + */ +typedef struct bcmpkt_rxpmd_fid_support_s { + /*! Field ID bitmap container */ + SHR_BITDCLNAME(fbits, BCMPKT_RXPMD_FID_COUNT); +} bcmpkt_rxpmd_fid_support_t; + +/*! + * \name Utility macros for \ref bcmpkt_rxpmd_fid_support_t. + * \anchor BCMPKT_RXPMD_SUPPORT_OPS + */ +/*! \{ */ +/*! + * Macro to get a field ID's supported status. + * + * \retval zero Not supported + * \retval non-zero Supported + */ +#define BCMPKT_RXPMD_FID_SUPPORT_GET(_support, _fid) \ + SHR_BITGET(((_support).fbits), (_fid)) + +/*! + * Iterate over all supported RXPMD field IDs in the \c _support. + */ +#define BCMPKT_RXPMD_FID_SUPPORT_ITER(_support, _fid) \ + for(_fid = 0; _fid < BCMPKT_RXPMD_FID_COUNT; _fid++) \ + if(BCMPKT_RXPMD_FID_SUPPORT_GET(_support, _fid)) +/*! \} */ + + +/*! + * \brief Get supported RXPMD field IDs for a given device type. + * + * This function returns a structure with information about the RXPMD field IDs + * a given device type supports. + * + * Use \ref BCMPKT_RXPMD_FID_SUPPORT_GET on the returned structure to get the + * supported status of a specific field ID. + * + * \param [in] dev_type Device type. + * \param [out] support Field ID supported status bitmap. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_INTERNAL API internal error. + */ +extern int +bcmpkt_rxpmd_fid_support_get(bcmdrd_dev_type_t dev_type, + bcmpkt_rxpmd_fid_support_t *support); + + + +#endif /* BCMPKT_RXPMD_FID_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h new file mode 100644 index 000000000000..d317e7fdd420 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h @@ -0,0 +1,80 @@ +/*! \file bcmpkt_rxpmd_field.h + * + * RX Packet MetaData (RXPMD, called EP_TO_CPU in hardware) field api's. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_RXPMD_FIELD_H +#define BCMPKT_RXPMD_FIELD_H + + +/*! + * \brief Get value from an RXPMD field. + * + * \param [in] dev_type Device type. + * \param [in] rxpmd RXPMD handle. + * \param [in] fid RXPMD field ID, refer to \ref BCMPKT_RXPMD_XXX. + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_rxpmd_field_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + int fid, uint32_t *val); + +/*! + * \brief Set value into an RXPMD field. (Internally used for filter config.) + * + * \param [in] dev_type Device type. + * \param [in,out] rxpmd RXPMD handle. + * \param [in] fid RXPMD field ID, refer to \ref BCMPKT_RXPMD_XXX. + * \param [in] val Set value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_rxpmd_field_set(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + int fid, uint32_t val); + +/*! + * \brief Get flex data handle from the RXPMD. + * + * This function is used for geting flex data handle from the \c rxpmd. + * + * \param [in] dev_type Device type. + * \param [in] rxpmd RXPMD handle. + * \param [out] flexdata Flex data handle. + * \param [out] len Flex data size in 4-bytes. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support flex data. + * \retval SHR_E_INTERNAL Internal issue. + */ +extern int +bcmpkt_rxpmd_flexdata_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + uint32_t **flexdata, uint32_t *len); + + +#endif /* BCMPKT_RXPMD_FIELD_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h new file mode 100644 index 000000000000..67ab4e3d5a0d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h @@ -0,0 +1,82 @@ +/*! \file bcmpkt_rxpmd_internal.h + * + * RX Packet MetaData internal library. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_RXPMD_INTERNAL_H +#define BCMPKT_RXPMD_INTERNAL_H + +#include +#include +#include +#include + +/*! + * Array of RXPMD field getter functions for a particular device + * type. + */ +typedef struct bcmpkt_rxpmd_fget_s { + bcmpkt_field_get_f fget[BCMPKT_RXPMD_FID_COUNT]; +} bcmpkt_rxpmd_fget_t; + +/*! + * Array of RXPMD field setter functions for a particular device + * type. These functions are used for internally configuring packet + * filter. + */ +typedef struct bcmpkt_rxpmd_fset_s { + bcmpkt_field_set_f fset[BCMPKT_RXPMD_FID_COUNT]; +} bcmpkt_rxpmd_fset_t; + +/*! + * Array of RXPMD field address and length getter functions for a multiple + * words field of a particular device type. *addr is output address and return + * length. + */ +typedef struct bcmpkt_rxpmd_figet_s { + bcmpkt_ifield_get_f fget[BCMPKT_RXPMD_I_FID_COUNT]; +} bcmpkt_rxpmd_figet_t; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern void _bd##_rx_reason_decode(const uint32_t* data, bcmpkt_rx_reasons_t* reasons); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern void _bd##_rx_reason_encode(const bcmpkt_rx_reasons_t* reasons, uint32_t* data); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern void _bd##_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern void _bd##_ep_rx_reason_decode(const uint32_t* data, bcmpkt_rx_reasons_t* reasons); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern void _bd##_ep_rx_reason_encode(const bcmpkt_rx_reasons_t* reasons, uint32_t* data); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#endif /* BCMPKT_RXPMD_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h new file mode 100644 index 000000000000..d17808075b68 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h @@ -0,0 +1,175 @@ +/*! \file bcmpkt_rxpmd_match_id.h + * + * RX Packet Meta Data Match ID api's. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_RXPMD_MATCH_ID_H +#define BCMPKT_RXPMD_MATCH_ID_H + +#include +#include +#include + +/*! + * \brief Does the match id data contain the specified type + * + * This routine returns the true for false for a given match id using the + * provided match id data. + * + * \param [in] variant Variant type. + * \param [in] match_id_array Match ID data. + * \param [in] array_len Match ID data length in words. + * \param [in] match_id Match ID. + * + * \retval SHR_E_NONE The match id data contains the specified type + * \retval SHR_E_* The match id data does not contain the specified + * type or there was an error. + * + */ +extern int +bcmpkt_rxpmd_match_id_present(bcmlrd_variant_t variant, + uint32_t *match_id_array, + uint32_t array_len, + uint32_t match_id); + +/*! + * \brief Does the arc id data contain the specified type + * + * This routine returns the true for false for a given match id using the + * provided arc id data. + * + * \param [in] variant Variant type. + * \param [in] arc_id_array ARC ID data. + * \param [in] array_len Match ID data length in words. + * \param [in] match_id Match ID. + * + * \retval SHR_E_NONE The arc id data contains the specified type + * \retval SHR_E_* The arc id data does not contain the specified + * type or there was an error. + * + */ +extern int +bcmpkt_rxpmd_match_id_from_arc_id_present(bcmlrd_variant_t variant, + uint32_t *arc_id_array, + uint32_t array_len, + uint32_t match_id); + +/*! + * \brief Does the match id data contain the specified type + * + * This routine returns the match id value for the specified variant given the + * match id name (string value). + * + * \param [in] variant Variant type. + * \param [in] name Match ID string name. + * \param [out] match_id Match ID value. + * + * \retval SHR_E_NONE The match id value was found for the given name + * \retval SHR_E_* There was an error + * + */ +extern int +bcmpkt_rxpmd_match_id_get(bcmlrd_variant_t variant, + char *name, + uint32_t *match_id); + +/*! + * \brief Information on match ID fields. + * + * This structure is used to store information for each + * match id field. + * + */ +typedef struct bcmpkt_rxpmd_match_id_db_s { + /*! Match ID name. */ + const char *name; + + /*! Match. */ + uint32_t match; + + /*! Mask for match. */ + uint32_t match_mask; + + /*! Maxbit of the match id field in the physical container. */ + uint8_t match_maxbit; + + /*! Minbit of the match id field in the physical container. */ + uint8_t match_minbit; + + /*! Maxbit of the match id field. */ + uint8_t maxbit; + + /*! Minbit of the match id field. */ + uint8_t minbit; + + /*! Default value for the match id field. */ + uint32_t value; + + /*! Mask for the default value for the match id field. */ + uint32_t mask; + + /*! Maxbit of the field within match_id container. */ + uint8_t pmaxbit; + + /*! Minbit of the field within match_id container. */ + uint8_t pminbit; + + /*! ARC id zone minbit. */ + uint8_t zone_minbit; + + /*! ARC id mask. */ + uint64_t arc_id_mask; + + /*! Number of words used by zone bitmap. */ + uint8_t num_zone_bmp_words; + + /*! Zone bitmap. */ + uint32_t *zone_bmp; +} bcmpkt_rxpmd_match_id_db_t; + +/*! + * \brief Information on match ID fields. + * + * This structure is used to store information for the match id data. + * + */ +typedef struct bcmpkt_rxpmd_match_id_db_info_s { + /*! Number of entries in the match ID DB. */ + uint32_t num_entries; + + /*! Pointer to match ID DB. */ + const bcmpkt_rxpmd_match_id_db_t *db; +} bcmpkt_rxpmd_match_id_db_info_t; + +/*! + * \brief Information for the match ID map. + * + * This structure is used to store information for the match id map. + * + */ +typedef struct bcmpkt_rxpmd_match_id_map_info_s { + /*! Number of entries in the match ID Map. */ + uint32_t num_entries; + + /*! Pointer to match ID Map. */ + const shr_enum_map_t *map; +} bcmpkt_rxpmd_match_id_map_info_t; + +#endif /* BCMPKT_RXPMD_MATCH_ID_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..f879001eec18 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,38 @@ +/*! \file bcmpkt_rxpmd_match_id_defs.h + * + * RX Packet Meta Data Match ID Variant defs. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCMPKT_RXPMD_MATCH_ID_DEFS_H + +/*! \cond Declare externs. */ +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ +extern bcmpkt_rxpmd_match_id_db_info_t * \ +_bd##_vu##_va##_rxpmd_match_id_db_info_get(void); +#include + +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ +extern bcmpkt_rxpmd_match_id_map_info_t * \ +_bd##_vu##_va##_rxpmd_match_id_map_info_get(void); +#include +/*! \endcond */ + +#endif /* BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h new file mode 100644 index 000000000000..2e5f10be9562 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h @@ -0,0 +1,157 @@ +/*! \file bcmpkt_txpmd.h + * + * TX Packet MetaData (TXPMD, called SOBMH in hardware) access interface. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_TXPMD_H +#define BCMPKT_TXPMD_H + +#include +#include +#include +#include +#include + +/*! TX Packet MetaData size (bytes). */ +#define BCMPKT_TXPMD_SIZE_BYTES 16 +/*! TX Packet MetaData size (words). */ +#define BCMPKT_TXPMD_SIZE_WORDS 4 + +/*! + * \name TXPMD Dumping flags. + * \anchor BCMPKT_TXPMD_DUMP_F_XXX + */ +/*! \{ */ +/*! + * Dump all fields contents. + */ +#define BCMPKT_TXPMD_DUMP_F_ALL 0 +/*! + * Dump none zero field content only. + */ +#define BCMPKT_TXPMD_DUMP_F_NONE_ZERO 1 +/*! \} */ + +/*! \brief TXPMD field ID supported bit array. + * Array of bits indicating whether a TXPMD field ID is supported by a given + * device type. + */ +typedef struct bcmpkt_txpmd_fid_support_s { + /*! Field ID bitmap container */ + SHR_BITDCLNAME(fbits, BCMPKT_TXPMD_FID_COUNT); +} bcmpkt_txpmd_fid_support_t; + +/*! + * \name Utility macros for \ref bcmpkt_txpmd_fid_support_t. + * \anchor BCMPKT_TXPMD_SUPPORT_OPS + */ +/*! \{ */ +/*! + * Macro to get a field ID's supported status. + * + * \retval zero Not supported + * \retval non-zero Supported + */ +#define BCMPKT_TXPMD_FID_SUPPORT_GET(_support, _fid) \ + SHR_BITGET(((_support).fbits), (_fid)) + +/*! + * Iterate over all supported TXPMD field IDs in the \c _support. + */ +#define BCMPKT_TXPMD_FID_SUPPORT_ITER(_support, _fid) \ + for(_fid = 0; _fid < BCMPKT_TXPMD_FID_COUNT; _fid++) \ + if(BCMPKT_TXPMD_FID_SUPPORT_GET(_support, _fid)) +/*! \} */ + +/*! + * \brief Get TXPMD's size for a given device type. + * + * \param [in] dev_type Device type. + * \param [out] len Bytes of TXPMD length. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Unsupported device type or bad \c len pointer. + * \retval SHR_E_UNAVAIL Not support TXPMD get function. + */ +extern int +bcmpkt_txpmd_len_get(bcmdrd_dev_type_t dev_type, uint32_t *len); + +/*! + * \brief Get field name for a given TXPMD field ID. + * + * \param [in] fid TXPMD field ID, refer to \ref BCMPKT_TXPMD_XXX. + * \param [out] name TXPMD field name string. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + */ +extern int +bcmpkt_txpmd_field_name_get(int fid, char **name); + +/*! + * \brief Get field ID for a given TXPMD field name. + * + * \param [in] name TXPMD name string. + * \param [out] fid TXPMD Field ID. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_NOT_FOUND Not found the name. + */ +extern int +bcmpkt_txpmd_field_id_get(char* name, int *fid); + +/*! + * \brief Get supported TXPMD field IDs for a given device type. + * + * This function returns a structure with information about the TXPMD field IDs + * a given device type supports. + * + * Use \ref BCMPKT_TXPMD_FID_SUPPORT_GET on the returned structure to get the + * supported status of a specific field ID. + * + * \param [in] dev_type Device type. + * \param [out] support Field ID supported status bitmap. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_INTERNAL API internal error. + */ +extern int +bcmpkt_txpmd_fid_support_get(bcmdrd_dev_type_t dev_type, + bcmpkt_txpmd_fid_support_t *support); + +/*! + * \brief Get view info for a given TXPMD field ID for a given device type. + * + * \param [in] dev_type Device type. + * \param [in] fid TXPMD field ID, refer to \ref BCMPKT_TXPMD_XXX. + * \param [out] view TXPMD view info. -2 for unsupported, -1 for global, + * others for view's value of \ref BCMPKT_TXPMD_HEADER_TYPE_XXX. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_INTERNAL API internal error. + */ +extern int +bcmpkt_txpmd_fid_view_get(bcmdrd_dev_type_t dev_type, + int fid, int *view); + +#endif /* BCMPKT_TXPMD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h new file mode 100644 index 000000000000..e7cfa9d7cf5f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h @@ -0,0 +1,567 @@ +#ifndef BCMPKT_TXPMD_DEFS_H +#define BCMPKT_TXPMD_DEFS_H +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + * This file provides field macros for the TX Packet MetaData (TXPMD, called + * SOBMH in hardware.) access. + * + ******************************************************************************/ + +/*! + * \name TX packet metadata field IDs. + * \anchor BCMPKT_TXPMD_XXX + */ +/*! \{ */ +/*! Invalid BCMPKT_TXPMD FID indicator */ +#define BCMPKT_TXPMD_FID_INVALID -1 +/*! Start of frame indicator. */ +#define BCMPKT_TXPMD_START 0 +/*! + * 64 Header Types Supported. 1 means Packets from CPU with SOBMH header format + * to Passthru NLF + */ +#define BCMPKT_TXPMD_HEADER_TYPE 1 +/*! PKT_LENGTH (set by hardware - in Iarb). */ +#define BCMPKT_TXPMD_PKT_LENGTH 2 +/*! Pointer to cell buffer of this SOBMH cell. (Set by hardware) */ +#define BCMPKT_TXPMD_IPCF_PTR 3 +/*! SOP indicator (set by hardware - in Iarb). */ +#define BCMPKT_TXPMD_SOP 4 +/*! EOP indicator (set by hardware - in Iarb). */ +#define BCMPKT_TXPMD_EOP 5 +/*! CELL_LENGTH (set by hardware - in Iarb). */ +#define BCMPKT_TXPMD_CELL_LENGTH 6 +/*! CELL_ERROR or PURGE */ +#define BCMPKT_TXPMD_CELL_ERROR 7 +/*! Indicates the local port to send a SOBMH packet out. */ +#define BCMPKT_TXPMD_LOCAL_DEST_PORT 8 +/*! Source module ID, must be programmed to MY_MODID. */ +#define BCMPKT_TXPMD_SRC_MODID 9 +/*! + * Class of service for MMU queueing for this packet - sets COS values, + * PBI.UC_COS, PBI.MC_COS1, and PBI.MC_COS2. + */ +#define BCMPKT_TXPMD_COS 10 +/*! Traffic priority to be applied to MMU via PBI.INPUT_PRIORITY. */ +#define BCMPKT_TXPMD_INPUT_PRI 11 +/*! Indicates that PBI.UNICAST should be set to queue as unicast packet. */ +#define BCMPKT_TXPMD_UNICAST 12 +/*! Value for CCBI.RSQ_Q_NUM. */ +#define BCMPKT_TXPMD_RQE_Q_NUM 13 +/*! Indicates that PBI.L2_BITMAP should be set (to queue as L2MC packet). */ +#define BCMPKT_TXPMD_SET_L2BM 14 +/*! ONE STEP TIME STAMPING ENABLE */ +#define BCMPKT_TXPMD_IEEE1588_ONE_STEP_ENABLE 15 +/*! Regenerate UDP Checksum */ +#define BCMPKT_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM 16 +/*! ITS_SIGN bit */ +#define BCMPKT_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN 17 +/*! HDR_OFFSET */ +#define BCMPKT_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET 18 +/*! + * Indicates for TS packet transmitted from CPU into IP that the outgoing packet + * needs to have its transmit timestamp captured by the port. + */ +#define BCMPKT_TXPMD_TX_TS 19 +/*! For PBI.SPID_Override */ +#define BCMPKT_TXPMD_SPID_OVERRIDE 20 +/*! For PBI.SPID - Service Pool ID */ +#define BCMPKT_TXPMD_SPID 21 +/*! For PBI.SPAP - Service Pool Priority (color) */ +#define BCMPKT_TXPMD_SPAP 22 +/*! Will set CCBI_B.UNICAST_PKT */ +#define BCMPKT_TXPMD_UNICAST_PKT 23 +/*! Timestamp action LSB. */ +#define BCMPKT_TXPMD_TS_ACTION_LSB 24 +/*! Timestamp action MSB. */ +#define BCMPKT_TXPMD_TS_ACTION_MSB 25 +/*! Time statmp type. Encodings are 0-NTP TOD(64 bit), 1-PTP TOD(64bit) */ +#define BCMPKT_TXPMD_TS_TYPE 26 +/*! Destination subport number */ +#define BCMPKT_TXPMD_DST_SUBPORT_NUM 27 +/*! Enable UDP incremental checksum */ +#define BCMPKT_TXPMD_UDP_CHECKSUM_UPDATE_ENABLE 28 +/*! Offset to UDP checksum field from start of MACS-SA. */ +#define BCMPKT_TXPMD_UDP_CHECKSUM_OFFSET 29 +/*! CNG Field. */ +#define BCMPKT_TXPMD_CNG 30 +/*! DESTINATION Field. */ +#define BCMPKT_TXPMD_DESTINATION 31 +/*! Destination Field Type. */ +#define BCMPKT_TXPMD_DESTINATION_TYPE 32 +/*! WRED Mark Eligible field. */ +#define BCMPKT_TXPMD_WRED_MARK_ELIGIBLE 33 +/*! WRED Response Field. */ +#define BCMPKT_TXPMD_WRED_RESPONSE 34 +/*! Allows software to select load balancing bitmap for non-unicast packets. */ +#define BCMPKT_TXPMD_CPU_TX_MCAST_LB_INDEX 35 +/*! ECMP member ID for case where DESTINATION_TYPE=ECMP_MEMBER. Only valid for single level ECMP */ +#define BCMPKT_TXPMD_CPU_TX_ECMP_MEMBER_ID 36 +/*! Destination Field. */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION 37 +/*! Destination Field Type. */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE 38 +/*! Drop Precedence. */ +#define BCMPKT_TXPMD_CPU_TX_DP 39 +/*! Traffic priority to be applied to MMU via PBI.INPUT_PRIORITY. */ +#define BCMPKT_TXPMD_CPU_TX_INPUT_PRI 40 +/*! Internal congestion. */ +#define BCMPKT_TXPMD_CPU_TX_INT_CN 41 +/*! Internal priority */ +#define BCMPKT_TXPMD_CPU_TX_INT_PRI 42 +/*! Load balancing bitmap is valid indication. */ +#define BCMPKT_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD 43 +/*! Pointer to CPU_PACKET_PROFILE_1/2 registers. */ +#define BCMPKT_TXPMD_CPU_TX_PKT_PROFILE 44 +/*! QoS fields (INT_PRI, DP, INT_CN) valid indication. */ +#define BCMPKT_TXPMD_CPU_TX_QOS_FIELDS_VLD 45 +/*! If set packet marked as Layer 3 routed. */ +#define BCMPKT_TXPMD_CPU_TX_ROUTED_PKT 46 +/*! Indicates that PBI.UNICAST should be set to queue as unicast packet. */ +#define BCMPKT_TXPMD_CPU_TX_UNICAST 47 +/*! SOP indication. */ +#define BCMPKT_TXPMD_CPU_TX_SOP 48 +/*! VRF ID. */ +#define BCMPKT_TXPMD_CPU_TX_VRF 49 +/*! VRF ID is valid. */ +#define BCMPKT_TXPMD_CPU_TX_VRF_VALID 50 +/*! WCMP Selection. */ +#define BCMPKT_TXPMD_CPU_TX_WCMP_SEL 51 +/*! Cell error. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_CELL_ERROR 52 +/*! Cell length. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_CELL_LENGTH 53 +/*! Class of service. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_COS 54 +/*! Destination. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION 55 +/*! Destination type. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE 56 +/*! EOP indicator. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_EOP 57 +/*! Input priority. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_INPUT_PRI 58 +/*! LM counter action. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION 59 +/*! LM counter ID. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ID 60 +/*! OAM replacement offset. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_OAM_REPLACEMENT_OFFSET 61 +/*! Packet length. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_PKT_LENGTH 62 +/*! RQE Queue Number. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_RQE_Q_NUM 63 +/*! SOP indicator. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_SOP 64 +/*! Service Pool Allocation Precedence. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPAP 65 +/*! Service Pool ID. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPID 66 +/*! For Service Pool ID override. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPID_OVERRIDE 67 +/*! Source module ID. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_SRC_MODID 68 +/*! Timestamp action. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION 69 +/*! Unicast packet. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_UNICAST 70 +/*! Indicates a copy should be sent to the the CPU port mapped to R5. */ +#define BCMPKT_TXPMD_COPY_TO_DEBUG 71 + +#define BCMPKT_TXPMD_COPY_TO_CPU 72 +/*! Used to set PBI.WRED_RESPONSIVE */ +#define BCMPKT_TXPMD_WRED_RESPONSIVE 73 +/*! Cookie correspoding to 1588 2-step */ +#define BCMPKT_TXPMD_CPU_TX_COOKIE 74 +/*! Validates Cookie field */ +#define BCMPKT_TXPMD_CPU_TX_COOKIE_VALID 75 +/*! The 8 LSB bits of Cookie corresponding to 1588 2-Step */ +#define BCMPKT_TXPMD_COOKIE_7_0 76 +/*! The MSB of Cookie corresponding to 1588 2-Step */ +#define BCMPKT_TXPMD_COOKIE_8 77 +/*! Unicast Valid. */ +#define BCMPKT_TXPMD_UNICAST_VALID 78 +/*! Indicates the vpp port to send a SOBMH packet out. */ +#define BCMPKT_TXPMD_DST_VPP_PORT_NUM 79 +/*! Indicates for TS packet transmitted from CPU into IP that the outgoing packet needs to have its transmit timestamp captured by the port. */ +#define BCMPKT_TXPMD_IEEE1588_TX_TS 80 +/*! Destination chip port number. */ +#define BCMPKT_TXPMD_DST_CHIP_PORT_NUM 81 +/*! Source chip port number. */ +#define BCMPKT_TXPMD_SRC_CHIP_PORT_NUM 82 +/*! Unicast packet type. */ +#define BCMPKT_TXPMD_UNICAST_PKT_TYPE 83 +/*! Unicast packet. */ +#define BCMPKT_TXPMD_UNICAST_PKT_VALID 84 +/*! vpp_port to send a SOBMH packet out. */ +#define BCMPKT_TXPMD_TX_VPP_PORT 85 +/*! Destination chip_port number. */ +#define BCMPKT_TXPMD_TX_CHIP_PORT 86 +/*! RX chip port. */ +#define BCMPKT_TXPMD_RX_CHIP_PORT 87 +/*! Ingress vpp port. */ +#define BCMPKT_TXPMD_RX_VPP_PORT 88 +/*! SVP */ +#define BCMPKT_TXPMD_CPU_TX_SVP 89 +/*! TXPMD FIELD ID NUMBER */ +#define BCMPKT_TXPMD_FID_COUNT 90 +/*! \} */ + +/*! TXPMD field name strings for debugging. */ +#define BCMPKT_TXPMD_FIELD_NAME_MAP_INIT \ + {"START", BCMPKT_TXPMD_START},\ + {"HEADER_TYPE", BCMPKT_TXPMD_HEADER_TYPE},\ + {"PKT_LENGTH", BCMPKT_TXPMD_PKT_LENGTH},\ + {"IPCF_PTR", BCMPKT_TXPMD_IPCF_PTR},\ + {"SOP", BCMPKT_TXPMD_SOP},\ + {"EOP", BCMPKT_TXPMD_EOP},\ + {"CELL_LENGTH", BCMPKT_TXPMD_CELL_LENGTH},\ + {"CELL_ERROR", BCMPKT_TXPMD_CELL_ERROR},\ + {"LOCAL_DEST_PORT", BCMPKT_TXPMD_LOCAL_DEST_PORT},\ + {"SRC_MODID", BCMPKT_TXPMD_SRC_MODID},\ + {"COS", BCMPKT_TXPMD_COS},\ + {"INPUT_PRI", BCMPKT_TXPMD_INPUT_PRI},\ + {"UNICAST", BCMPKT_TXPMD_UNICAST},\ + {"RQE_Q_NUM", BCMPKT_TXPMD_RQE_Q_NUM},\ + {"SET_L2BM", BCMPKT_TXPMD_SET_L2BM},\ + {"IEEE1588_ONE_STEP_ENABLE", BCMPKT_TXPMD_IEEE1588_ONE_STEP_ENABLE},\ + {"IEEE1588_REGEN_UDP_CHECKSUM", BCMPKT_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM},\ + {"IEEE1588_INGRESS_TIMESTAMP_SIGN", BCMPKT_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN},\ + {"IEEE1588_TIMESTAMP_HDR_OFFSET", BCMPKT_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET},\ + {"TX_TS", BCMPKT_TXPMD_TX_TS},\ + {"SPID_OVERRIDE", BCMPKT_TXPMD_SPID_OVERRIDE},\ + {"SPID", BCMPKT_TXPMD_SPID},\ + {"SPAP", BCMPKT_TXPMD_SPAP},\ + {"UNICAST_PKT", BCMPKT_TXPMD_UNICAST_PKT},\ + {"TS_ACTION_LSB", BCMPKT_TXPMD_TS_ACTION_LSB},\ + {"TS_ACTION_MSB", BCMPKT_TXPMD_TS_ACTION_MSB},\ + {"TS_TYPE", BCMPKT_TXPMD_TS_TYPE},\ + {"DST_SUBPORT_NUM", BCMPKT_TXPMD_DST_SUBPORT_NUM},\ + {"UDP_CHECKSUM_UPDATE_ENABLE", BCMPKT_TXPMD_UDP_CHECKSUM_UPDATE_ENABLE},\ + {"UDP_CHECKSUM_OFFSET", BCMPKT_TXPMD_UDP_CHECKSUM_OFFSET},\ + {"CNG", BCMPKT_TXPMD_CNG},\ + {"DESTINATION", BCMPKT_TXPMD_DESTINATION},\ + {"DESTINATION_TYPE", BCMPKT_TXPMD_DESTINATION_TYPE},\ + {"WRED_MARK_ELIGIBLE", BCMPKT_TXPMD_WRED_MARK_ELIGIBLE},\ + {"WRED_RESPONSE", BCMPKT_TXPMD_WRED_RESPONSE},\ + {"CPU_TX::MCAST_LB_INDEX", BCMPKT_TXPMD_CPU_TX_MCAST_LB_INDEX},\ + {"CPU_TX::ECMP_MEMBER_ID", BCMPKT_TXPMD_CPU_TX_ECMP_MEMBER_ID},\ + {"CPU_TX::DESTINATION", BCMPKT_TXPMD_CPU_TX_DESTINATION},\ + {"CPU_TX::DESTINATION_TYPE", BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE},\ + {"CPU_TX::DP", BCMPKT_TXPMD_CPU_TX_DP},\ + {"CPU_TX::INPUT_PRI", BCMPKT_TXPMD_CPU_TX_INPUT_PRI},\ + {"CPU_TX::INT_CN", BCMPKT_TXPMD_CPU_TX_INT_CN},\ + {"CPU_TX::INT_PRI", BCMPKT_TXPMD_CPU_TX_INT_PRI},\ + {"CPU_TX::MCAST_LB_INDEX_VLD", BCMPKT_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD},\ + {"CPU_TX::PKT_PROFILE", BCMPKT_TXPMD_CPU_TX_PKT_PROFILE},\ + {"CPU_TX::QOS_FIELDS_VLD", BCMPKT_TXPMD_CPU_TX_QOS_FIELDS_VLD},\ + {"CPU_TX::ROUTED_PKT", BCMPKT_TXPMD_CPU_TX_ROUTED_PKT},\ + {"CPU_TX::UNICAST", BCMPKT_TXPMD_CPU_TX_UNICAST},\ + {"CPU_TX::SOP", BCMPKT_TXPMD_CPU_TX_SOP},\ + {"CPU_TX::VRF", BCMPKT_TXPMD_CPU_TX_VRF},\ + {"CPU_TX::VRF_VALID", BCMPKT_TXPMD_CPU_TX_VRF_VALID},\ + {"CPU_TX::WCMP_SEL", BCMPKT_TXPMD_CPU_TX_WCMP_SEL},\ + {"OAM_DOWNMEP_TX::CELL_ERROR", BCMPKT_TXPMD_OAM_DOWNMEP_TX_CELL_ERROR},\ + {"OAM_DOWNMEP_TX::CELL_LENGTH", BCMPKT_TXPMD_OAM_DOWNMEP_TX_CELL_LENGTH},\ + {"OAM_DOWNMEP_TX::COS", BCMPKT_TXPMD_OAM_DOWNMEP_TX_COS},\ + {"OAM_DOWNMEP_TX::DESTINATION", BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION},\ + {"OAM_DOWNMEP_TX::DESTINATION_TYPE", BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE},\ + {"OAM_DOWNMEP_TX::EOP", BCMPKT_TXPMD_OAM_DOWNMEP_TX_EOP},\ + {"OAM_DOWNMEP_TX::INPUT_PRI", BCMPKT_TXPMD_OAM_DOWNMEP_TX_INPUT_PRI},\ + {"OAM_DOWNMEP_TX::LM_COUNTER_ACTION", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION},\ + {"OAM_DOWNMEP_TX::LM_COUNTER_ID", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ID},\ + {"OAM_DOWNMEP_TX::OAM_REPLACEMENT_OFFSET", BCMPKT_TXPMD_OAM_DOWNMEP_TX_OAM_REPLACEMENT_OFFSET},\ + {"OAM_DOWNMEP_TX::PKT_LENGTH", BCMPKT_TXPMD_OAM_DOWNMEP_TX_PKT_LENGTH},\ + {"OAM_DOWNMEP_TX::RQE_Q_NUM", BCMPKT_TXPMD_OAM_DOWNMEP_TX_RQE_Q_NUM},\ + {"OAM_DOWNMEP_TX::SOP", BCMPKT_TXPMD_OAM_DOWNMEP_TX_SOP},\ + {"OAM_DOWNMEP_TX::SPAP", BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPAP},\ + {"OAM_DOWNMEP_TX::SPID", BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPID},\ + {"OAM_DOWNMEP_TX::SPID_OVERRIDE", BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPID_OVERRIDE},\ + {"OAM_DOWNMEP_TX::SRC_MODID", BCMPKT_TXPMD_OAM_DOWNMEP_TX_SRC_MODID},\ + {"OAM_DOWNMEP_TX::TIMESTAMP_ACTION", BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION},\ + {"OAM_DOWNMEP_TX::UNICAST", BCMPKT_TXPMD_OAM_DOWNMEP_TX_UNICAST},\ + {"COPY_TO_DEBUG", BCMPKT_TXPMD_COPY_TO_DEBUG},\ + {"COPY_TO_CPU", BCMPKT_TXPMD_COPY_TO_CPU},\ + {"WRED_RESPONSIVE", BCMPKT_TXPMD_WRED_RESPONSIVE},\ + {"CPU_TX::COOKIE", BCMPKT_TXPMD_CPU_TX_COOKIE},\ + {"CPU_TX::COOKIE_VALID", BCMPKT_TXPMD_CPU_TX_COOKIE_VALID},\ + {"COOKIE_7_0", BCMPKT_TXPMD_COOKIE_7_0},\ + {"COOKIE_8", BCMPKT_TXPMD_COOKIE_8},\ + {"UNICAST_VALID", BCMPKT_TXPMD_UNICAST_VALID},\ + {"DST_VPP_PORT_NUM", BCMPKT_TXPMD_DST_VPP_PORT_NUM},\ + {"IEEE1588_TX_TS", BCMPKT_TXPMD_IEEE1588_TX_TS},\ + {"DST_CHIP_PORT_NUM", BCMPKT_TXPMD_DST_CHIP_PORT_NUM},\ + {"SRC_CHIP_PORT_NUM", BCMPKT_TXPMD_SRC_CHIP_PORT_NUM},\ + {"UNICAST_PKT_TYPE", BCMPKT_TXPMD_UNICAST_PKT_TYPE},\ + {"UNICAST_PKT_VALID", BCMPKT_TXPMD_UNICAST_PKT_VALID},\ + {"TX_VPP_PORT", BCMPKT_TXPMD_TX_VPP_PORT},\ + {"TX_CHIP_PORT", BCMPKT_TXPMD_TX_CHIP_PORT},\ + {"RX_CHIP_PORT", BCMPKT_TXPMD_RX_CHIP_PORT},\ + {"RX_VPP_PORT", BCMPKT_TXPMD_RX_VPP_PORT},\ + {"CPU_TX::SVP", BCMPKT_TXPMD_CPU_TX_SVP},\ + {"fid count", BCMPKT_TXPMD_FID_COUNT} + +/*! + * \name BCMPKT_TXPMD_START encodings. + * \anchor BCMPKT_TXPMD_START_XXX + */ +/*! \{ */ +/*! The header used internally only */ +#define BCMPKT_TXPMD_START_INTERNAL_HEADER 2 +/*! Frame type is Higig */ +#define BCMPKT_TXPMD_START_HIGIG 3 +/*! \} */ + +/*! BCMPKT_TXPMD_START encoding name strings for debugging. */ +#define BCMPKT_TXPMD_START_NAME_MAP_INIT \ + {"RESERVED_COUNTER", 0},\ + {"RESERVED_COUNTER", 1},\ + {"INTERNAL_HEADER", BCMPKT_TXPMD_START_INTERNAL_HEADER},\ + {"HIGIG", BCMPKT_TXPMD_START_HIGIG},\ + +/*! + * \name BCMPKT_TXPMD_HEADER_TYPE encodings. + * \anchor BCMPKT_TXPMD_HEADER_TYPE_XXX + */ +/*! \{ */ +/*! EP Copy to CPU format, SOBMH header in EP to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_TO_CPU 0 +/*! Packets from CPU with SOBMH header format to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_FROM_CPU 1 +/*! Header type CPU_TX */ +#define BCMPKT_TXPMD_HEADER_T_CPU_TX 2 +/*! MAC in MAC packets to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_MIM 2 +/*! MPLS packets to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_MPLS_PMP 3 +/*! Trill Network Packets to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_TRILL_NW 4 +/*! Trill Access Layer Packets to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_TRILL_AC 5 +/*! WLAN Decap packets sent to WRX NLF */ +#define BCMPKT_TXPMD_HEADER_T_WLAN_DECAP 6 +/*! WLAN Encap packets sent to WTX NLF */ +#define BCMPKT_TXPMD_HEADER_T_WLAN_ENCAP 7 +/*! QCN Packets to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_QCN 8 +/*! DPI/Signature Matcher packets sent to SM NLF */ +#define BCMPKT_TXPMD_HEADER_T_SM_DPI 9 +/*! EP Redirection packets to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_EP_REDIR 10 +/*! Other generic passthrough to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_GENERIC 11 +/*! DOWN MEP Transmit OAM Packets from CPU or CCM from HW Engine or OLP */ +#define BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX 12 +/*! UP MEP Transmit OAM Packets from CPU or CCM from HW Engine or OLP */ +#define BCMPKT_TXPMD_HEADER_T_OAM_UPMEP_TX 13 +/*! \} */ + +/*! BCMPKT_TXPMD_HEADER_TYPE encoding name strings for debugging. */ +#define BCMPKT_TXPMD_HEADER_TYPE_NAME_MAP_INIT \ + {"SOBMH_EP_COPY_TO_CPU", BCMPKT_TXPMD_HEADER_T_TO_CPU},\ + {"SOBMH_FROM_CPU", BCMPKT_TXPMD_HEADER_T_FROM_CPU},\ + {"CPU_TX", BCMPKT_TXPMD_HEADER_T_CPU_TX},\ + {"MIM", BCMPKT_TXPMD_HEADER_T_MIM},\ + {"MPLS_PMP", BCMPKT_TXPMD_HEADER_T_MPLS_PMP},\ + {"TRILL_NW", BCMPKT_TXPMD_HEADER_T_TRILL_NW},\ + {"TRILL_AC", BCMPKT_TXPMD_HEADER_T_TRILL_AC},\ + {"WLAN_DECAP", BCMPKT_TXPMD_HEADER_T_WLAN_DECAP},\ + {"WLAN_ENCAP", BCMPKT_TXPMD_HEADER_T_WLAN_ENCAP},\ + {"QCN", BCMPKT_TXPMD_HEADER_T_QCN},\ + {"SM_DPI", BCMPKT_TXPMD_HEADER_T_SM_DPI},\ + {"EP_REDIR", BCMPKT_TXPMD_HEADER_T_EP_REDIR},\ + {"GENERIC", BCMPKT_TXPMD_HEADER_T_GENERIC},\ + {"OAM_DOWNMEP_TX", BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX},\ + {"OAM_UPMEP_TX", BCMPKT_TXPMD_HEADER_T_OAM_UPMEP_TX},\ + +/*! + * \name BCMPKT_TXPMD_DESTINATION_TYPE encodings. + * \anchor BCMPKT_TXPMD_DESTINATION_TYPE_XXX + */ +/*! \{ */ +/*! Egress Port */ +#define BCMPKT_TXPMD_DESTINATION_T_EGRESS_PORT 0 +/*! Asserts bit selected by destination field in L2_PBM */ +#define BCMPKT_TXPMD_DESTINATION_T_L2_PBM 7 +/*! Destination is Invalid */ +#define BCMPKT_TXPMD_DESTINATION_T_INVALID 15 +/*! \} */ + +/*! BCMPKT_TXPMD_DESTINATION_TYPE encoding name strings for debugging. */ +#define BCMPKT_TXPMD_DESTINATION_TYPE_NAME_MAP_INIT \ + {"EGRESS_PORT", BCMPKT_TXPMD_DESTINATION_T_EGRESS_PORT},\ + {"RESERVED_COUNTER", 1},\ + {"RESERVED_COUNTER", 2},\ + {"RESERVED_COUNTER", 3},\ + {"RESERVED_COUNTER", 4},\ + {"RESERVED_COUNTER", 5},\ + {"RESERVED_COUNTER", 6},\ + {"L2_PBM", BCMPKT_TXPMD_DESTINATION_T_L2_PBM},\ + {"RESERVED_COUNTER", 8},\ + {"RESERVED_COUNTER", 9},\ + {"RESERVED_COUNTER", 10},\ + {"RESERVED_COUNTER", 11},\ + {"RESERVED_COUNTER", 12},\ + {"RESERVED_COUNTER", 13},\ + {"RESERVED_COUNTER", 14},\ + {"INVALID", BCMPKT_TXPMD_DESTINATION_T_INVALID},\ + +/*! + * \name BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE encodings. + * \anchor BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE_XXX + */ +/*! \{ */ +/*! Egress Port */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_EGRESS_PORT 0 +/*! Next Hop Index */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NHI 1 +/*! ECMP Group */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP 2 +/*! ECMP member id */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP_MEMBER 3 +/*! IP Multicast Group */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_IPMC 4 +/*! L2MC group */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2MC 5 +/*! Vlan Flooding */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_VLAN_FLOOD 6 +/*! Asserts bit selected by destination field in L2_PBM */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2_PBM 7 +/*! LAG ID */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_LAG_ID 8 +/*! Forward and derive destination normally */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_FORWARD 15 +/*! Destination is Invalid */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_INVALID 15 +/*! \} */ + +/*! BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE encoding name strings for debugging. */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT \ + {"EGRESS_PORT", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_EGRESS_PORT},\ + {"NHI", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NHI},\ + {"ECMP", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP},\ + {"ECMP_MEMBER", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP_MEMBER},\ + {"IPMC", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_IPMC},\ + {"L2MC", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2MC},\ + {"VLAN_FLOOD", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_VLAN_FLOOD},\ + {"L2_PBM", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2_PBM},\ + {"LAG_ID", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_LAG_ID},\ + {"RESERVED_COUNTER", 9},\ + {"RESERVED_COUNTER", 10},\ + {"RESERVED_COUNTER", 11},\ + {"RESERVED_COUNTER", 12},\ + {"RESERVED_COUNTER", 13},\ + {"RESERVED_COUNTER", 14},\ + {"FORWARD", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_FORWARD},\ + {"INVALID", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_INVALID},\ + +/*! + * \name BCMPKT_TXPMD_CPU_TX_DP encodings. + * \anchor BCMPKT_TXPMD_CPU_TX_DP_XXX + */ +/*! \{ */ +/*! Green */ +#define BCMPKT_TXPMD_CPU_TX_DP_GREEN 0 +/*! Red */ +#define BCMPKT_TXPMD_CPU_TX_DP_RED 1 +/*! Yellow */ +#define BCMPKT_TXPMD_CPU_TX_DP_YELLOW 3 +/*! \} */ + +/*! BCMPKT_TXPMD_CPU_TX_DP encoding name strings for debugging. */ +#define BCMPKT_TXPMD_CPU_TX_DP_NAME_MAP_INIT \ + {"GREEN", BCMPKT_TXPMD_CPU_TX_DP_GREEN},\ + {"RED", BCMPKT_TXPMD_CPU_TX_DP_RED},\ + {"RESERVED_COUNTER", 2},\ + {"YELLOW", BCMPKT_TXPMD_CPU_TX_DP_YELLOW},\ + +/*! + * \name BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE encodings. + * \anchor BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE_XXX + */ +/*! \{ */ +/*! Egress Port */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_T_EGRESS_PORT 0 +/*! \} */ + +/*! BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE encoding name strings for debugging. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE_NAME_MAP_INIT \ + {"EGRESS_PORT", BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_T_EGRESS_PORT},\ + +/*! + * \name BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION encodings. + * \anchor BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_XXX + */ +/*! \{ */ +/*! No operation. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_NO_OP 0 +/*! Increment. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_INCREMENT 1 +/*! Increment and sample. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_INCREMENT_SAMPLE 2 +/*! Sample. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_SAMPLE 3 +/*! \} */ + +/*! BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION encoding name strings for debugging. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_NAME_MAP_INIT \ + {"NO_OP", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_NO_OP},\ + {"INCREMENT", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_INCREMENT},\ + {"INCREMENT_SAMPLE", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_INCREMENT_SAMPLE},\ + {"SAMPLE", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_SAMPLE},\ + +/*! + * \name BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION encodings. + * \anchor BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_XXX + */ +/*! \{ */ +/*! No operation. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_NO_OP 0 +/*! Sample timestamp. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_SAMPLE 1 +/*! \} */ + +/*! BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION encoding name strings for debugging. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_NAME_MAP_INIT \ + {"NO_OP", BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_NO_OP},\ + {"SAMPLE", BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_SAMPLE},\ + +/*! + * \name TX packet metadata internal usage field IDs. + * \anchor BCMPKT_TXPMD_I_XXX + */ +/*! \{ */ +/*! Invalid BCMPKT_TXPMD_I FID indicator */ +#define BCMPKT_TXPMD_I_FID_INVALID -1 +/*! TXPMD RX raw data size. */ +#define BCMPKT_TXPMD_I_SIZE 0 +/*! TXPMD_I FIELD ID NUMBER */ +#define BCMPKT_TXPMD_I_FID_COUNT 1 +/*! \} */ + +/*! TXPMD_I field name strings for debugging. */ +#define BCMPKT_TXPMD_I_FIELD_NAME_MAP_INIT \ + {"SIZE", BCMPKT_TXPMD_I_SIZE},\ + {"fid count", BCMPKT_TXPMD_I_FID_COUNT} + +#endif /*! BCMPKT_TXPMD_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h new file mode 100644 index 000000000000..068875610ca9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h @@ -0,0 +1,59 @@ +/*! \file bcmpkt_txpmd_field.h + * + * TX Packet MetaData (TXPMD, called SOBMH in hardware) field api's. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_TXPMD_FIELD_H +#define BCMPKT_TXPMD_FIELD_H + +/*! + * \brief Get value from a TXPMD field. + * + * \param [in] dev_type Device type. + * \param [in] txpmd TXPMD handle. + * \param [in] fid TXPMD field ID, refer to \ref BCMPKT_TXPMD_XXX. + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_txpmd_field_get(bcmdrd_dev_type_t dev_type, uint32_t *txpmd, + int fid, uint32_t *val); + +/*! + * \brief Set value into a TXPMD field. + * + * \param [in] dev_type Device type. + * \param [in,out] txpmd TXPMD handle. + * \param [in] fid TXPMD field ID, refer to \ref BCMPKT_TXPMD_XXX. + * \param [in] val Set value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_txpmd_field_set(bcmdrd_dev_type_t dev_type, uint32_t *txpmd, + int fid, uint32_t val); + +#endif /* BCMPKT_TXPMD_FIELD_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h new file mode 100644 index 000000000000..13c5710671e7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h @@ -0,0 +1,62 @@ +/*! \file bcmpkt_txpmd_internal.h + * + * TX Packet MetaData (TXPMD, called SOBMH in hardware) access interface + * (Internal use only). + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_TXPMD_INTERNAL_H +#define BCMPKT_TXPMD_INTERNAL_H + +#include +#include +#include + +/*! + * Array of TXPMD field getter functions for a particular device + * type. + */ +typedef struct bcmpkt_txpmd_fget_s { + bcmpkt_field_get_f fget[BCMPKT_TXPMD_FID_COUNT]; +} bcmpkt_txpmd_fget_t; + +/*! + * Array of TXPMD field setter functions for a particular device + * type. These functions are used for internally configuring packet + * filter. + */ +typedef struct bcmpkt_txpmd_fset_s { + bcmpkt_field_set_f fset[BCMPKT_TXPMD_FID_COUNT]; +} bcmpkt_txpmd_fset_t; + +/*! + * Array of TXPMD field address and length getter functions for a multiple + * words field of a particular device type. *addr is output address and return + * length. + */ +typedef struct bcmpkt_txpmd_figet_s { + bcmpkt_ifield_get_f fget[BCMPKT_TXPMD_I_FID_COUNT]; +} bcmpkt_txpmd_figet_t; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern void _bd##_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#endif /* BCMPKT_TXPMD_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h new file mode 100644 index 000000000000..136d4fd5471b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h @@ -0,0 +1,77 @@ +/*! \file bcmpkt_util.h + * + * BCMPKT utility functions. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_UTIL_H +#define BCMPKT_UTIL_H + +#include +#include +#include + +/*! + * \brief Get device dispatch type based on device name. + * + * Device name is case-insensitive. + * + * \param [in] dev_name Device name, e.g. "bcm56000_a0". + * + * \return Device dispatch type or BCMDRD_DEV_T_NONE if not found. + */ +extern bcmdrd_dev_type_t +bcmpkt_util_dev_type_get(const char *dev_name); + +/*! + * \brief Get variant dispatch type based on device and variant names. + * + * Device and variant names are case-insensitive. + * + * \param [in] dev_name Device name, e.g. "bcm56000_a0". + * \param [in] var_name Variant name, e.g. "utltm". + * + * \return Variant dispatch type or BCMLRD_VARIANT_T_NONE if not found. + */ +extern bcmlrd_variant_t +bcmpkt_util_variant_type_get(const char *dev_name, const char *var_name); + +/*! + * \brief Get device id based on device type. + * + * \param [in] dev_type Device type, e.g. "BCMDRD_DEV_T_BCM56000_A0". + * + * \return Device id or 0 if not found. + */ +extern uint32_t +bcmpkt_util_dev_id_get(const bcmdrd_dev_type_t dev_type); + +/*! + * \brief Initialize RCPU header based on device type. + * + * \param [in] dev_type Device type e.g. "BCMDRD_DEV_T_BCM56000_A0". + * \param [out] rhdr RCPU header handle. + * + * \return none. + */ +extern void +bcmpkt_util_rcpu_hdr_init(const bcmdrd_dev_type_t dev_type, + bcmpkt_rcpu_hdr_t *rhdr); + +#endif /* BCMPKT_UTIL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h new file mode 100644 index 000000000000..ee023698311d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h @@ -0,0 +1,60 @@ +/*! \file bcmpkt_bcm56690_a0_rxpmd.h + * + * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_BCM56690_A0_RXPMD_H +#define BCMPKT_BCM56690_A0_RXPMD_H + +#include + +/*! + * \brief Get flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm56690_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t *val); + +/*! + * \brief Set flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [in] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm56690_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t val); + +#endif /* BCMPKT_BCM56690_A0_RXPMD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h new file mode 100644 index 000000000000..6793ea72cae9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h @@ -0,0 +1,60 @@ +/*! \file bcmpkt_bcm56780_a0_rxpmd.h + * + * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_BCM56780_A0_RXPMD_H +#define BCMPKT_BCM56780_A0_RXPMD_H + +#include + +/*! + * \brief Get flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm56780_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t *val); + +/*! + * \brief Set flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [in] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm56780_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t val); + +#endif /* BCMPKT_BCM56780_A0_RXPMD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h new file mode 100644 index 000000000000..84df9dff6a97 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h @@ -0,0 +1,60 @@ +/*! \file bcmpkt_bcm56880_a0_rxpmd.h + * + * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_BCM56880_A0_RXPMD_H +#define BCMPKT_BCM56880_A0_RXPMD_H + +#include + +/*! + * \brief Get flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm56880_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t *val); + +/*! + * \brief Set flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [in] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm56880_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t val); + +#endif /* BCMPKT_BCM56880_A0_RXPMD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h new file mode 100644 index 000000000000..c98ac2016922 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h @@ -0,0 +1,60 @@ +/*! \file bcmpkt_bcm56890_a0_rxpmd.h + * + * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_BCM56890_A0_RXPMD_H +#define BCMPKT_BCM56890_A0_RXPMD_H + +#include + +/*! + * \brief Get flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm56890_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t *val); + +/*! + * \brief Set flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [in] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm56890_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t val); + +#endif /* BCMPKT_BCM56890_A0_RXPMD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h new file mode 100644 index 000000000000..39fcad92ea6c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h @@ -0,0 +1,60 @@ +/*! \file bcmpkt_bcm78800_a0_rxpmd.h + * + * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMPKT_BCM78800_A0_RXPMD_H +#define BCMPKT_BCM78800_A0_RXPMD_H + +#include + +/*! + * \brief Get flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm78800_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t *val); + +/*! + * \brief Set flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [in] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm78800_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t val); + +#endif /* BCMPKT_BCM78800_A0_RXPMD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..65f14a67a9e4 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h @@ -0,0 +1,182 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_H +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_H + +#include + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T 11 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T 12 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T 13 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T 15 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T 17 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T 18 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T 19 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T 20 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T 21 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T 22 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T 23 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T 24 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T 25 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T 26 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T 27 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T 28 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T 29 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T 30 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T 31 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T 32 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T 33 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T 34 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T 35 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T 36 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T 37 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T 38 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T 39 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T 40 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T 41 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T 42 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T 43 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T 44 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T 45 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T 46 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T 47 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T 48 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 49 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 50 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T 51 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T 52 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T 53 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T 54 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T 55 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T 56 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T 57 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T 58 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T 59 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T 60 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T 61 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T 62 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T 63 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T 64 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T 65 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T 66 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T 67 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T 68 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T 69 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_T 70 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_COUNT 71 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T},\ + {"authen_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T},\ + {"cntag_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T},\ + {"ethertype_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T},\ + {"gbp_ethernet_shim_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T},\ + {"generic_loopback_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T},\ + {"hg3_base_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T},\ + {"hg3_extension_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T},\ + {"hop_by_hop_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T},\ + {"ioam_e2e_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T},\ + {"ipfix_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T},\ + {"l2_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T},\ + {"routing_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T},\ + {"segment_routing_srh_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T},\ + {"segment_routing_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T},\ + {"sflow_shim_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T},\ + {"std_segment_id_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T},\ + {"tcp_first_4bytes_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..6c9aacbba374 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h @@ -0,0 +1,1392 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_DATA_H +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_OPERATION 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_AP 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_CPI 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DEM 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DIAG 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FIN 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MPT 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_POLL 11 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_STA 13 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_VERSION 15 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_RPID 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_PAD 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_SPI 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_ID 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GBP_ETHERNET_SHIM_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_SID 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_VER 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \ + {"ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\ + {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\ + {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\ + {"SID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\ + {"SUBTYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\ + {"VER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\ + {"gbp_ethernet_shim_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM 13 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"SRC_SUBPORT_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\ + {"START_BYTE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FLAGS 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_VNI 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_RESERVED 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_VERSION 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HG3_BASE_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_CN 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_CNG 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_ENTROPY 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_L3_ROUTED 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_TC 11 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_VERSION 12 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT 13 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_CN},\ + {"CNG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_CNG},\ + {"ENTROPY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_ENTROPY},\ + {"EXT_HDR_PRESENT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ + {"HG3_RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ + {"L3_ROUTED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_L3_ROUTED},\ + {"MIRROR_COPY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ + {"RESERVED_ETYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ + {"SYSTEM_DESTINATION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ + {"SYSTEM_DESTINATION_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ + {"SYSTEM_SOURCE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ + {"TC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_TC},\ + {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_VERSION},\ + {"hg3_base_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT} + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +/*! + * \name HG3_EXTENSION_0_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_SVP 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ + {"CLASS_ID_LSB", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ + {"CLASS_ID_MSB", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ + {"DVP_OR_L3_IIF", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ + {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ + {"FORWARDING_DOMAIN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ + {"SVP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_SVP},\ + {"hg3_extension_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_CODE 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IOAM_E2E_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_NAMESPACE_ID 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_RESERVED 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_TYPE 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \ + {"IOAM_E2E_DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\ + {"IOAM_E2E_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\ + {"IOAM_HDR_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\ + {"NAMESPACE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\ + {"NEXT_PROTOCOL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\ + {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_RESERVED},\ + {"TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_TYPE},\ + {"ioam_e2e_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_DA 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_ID 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_OPTION 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_SA 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TOS 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TTL 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_DA 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_SA 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_MACDA 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_MACSA 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_BOS 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_EXP 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_LABEL 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_TTL 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_OPERATION 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_DATA 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_TAG 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SEGMENT_ROUTING_SRH_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS},\ + {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN},\ + {"LAST_ENTRY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT},\ + {"TAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG},\ + {"segment_routing_srh_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT} + +/*! + * \name SEGMENT_ROUTING_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_TAG 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN},\ + {"LAST_ENTRY_FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE},\ + {"SEG_LIST", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST},\ + {"SEGMENTS_LEFT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT},\ + {"TAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_TAG},\ + {"segment_routing_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name STD_SEGMENT_ID_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_DATA 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_DATA},\ + {"std_segment_id_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"L5_BYTES_8_9", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\ + {"unknown_l5_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_CFI 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_PCP 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_TPID 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_VID 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FLAGS 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_SPI 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..de8fe7cae024 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,191 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DVP_15_0 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 11 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 12 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 13 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 14 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 15 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 16 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 17 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 18 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 19 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_6_0 20 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 22 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 23 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L2_IIF_11_0 24 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L2_OIF_11_0 25 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0 26 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 27 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 28 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0 29 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 30 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 31 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 32 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 33 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 34 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0 35 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0 36 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0 37 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_TUNNEL_NEXT_SID_SELECT_3_0 38 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVP_15_0 39 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 40 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0 41 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 42 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 43 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 44 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 45 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 46 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_VFI_15_0 47 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 48 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_FID_COUNT 49 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_COUNT 48 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DEFAULT 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 11 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 12 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT 13 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 14 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 15 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 16 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 17 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 18 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 19 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 20 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 21 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 22 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 23 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 24 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 25 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 26 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 27 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 28 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 29 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 30 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 31 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 32 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 33 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 34 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 35 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 36 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 37 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 38 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 39 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 40 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SRV6 41 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SVP 42 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 44 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 45 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 46 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_VFP 47 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DEFAULT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"EM_FT_HPAE_MISS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\ + {"IFP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SER_DROP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SRV6", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SRV6},\ + {"SVP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..6a4d0c14cd5b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,505 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56690_a0_dna_6_5_29_0_1_sf_match_id_info.yml + * for device bcm56690_a0 and variant dna_6_5_29_0_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG 0 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM 1 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 2 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 3 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 4 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 5 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 6 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 7 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 8 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 13 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 14 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 15 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 16 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 17 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 18 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 19 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 20 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 21 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 22 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 23 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 24 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 25 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 26 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 27 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 28 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 29 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 30 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E 31 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 32 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 33 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 34 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 35 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 36 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 37 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 38 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 39 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 40 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 41 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 42 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 43 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 44 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 45 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 46 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 47 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 48 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 49 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 50 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 51 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 52 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 53 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 54 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 55 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 56 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 57 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 58 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 59 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 60 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 61 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 62 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG 63 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM 64 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 65 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 66 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 67 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 68 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 69 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 70 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 71 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 72 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 73 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 74 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 75 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 76 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 77 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 78 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 79 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 80 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 81 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 82 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 83 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 84 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 85 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 86 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 87 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 88 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 89 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 90 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 91 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 92 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 93 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E 94 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 95 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 96 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 97 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 98 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 99 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 100 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 101 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 102 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 103 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 104 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 105 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 106 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 107 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 108 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 109 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 110 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 111 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 112 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 113 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 114 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 115 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 116 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 117 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 118 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 119 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 120 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 121 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 122 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG 123 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 124 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 125 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 126 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 127 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 128 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 129 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 130 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 131 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 132 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 133 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 134 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 135 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 136 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 137 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 138 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 139 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 140 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 141 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 142 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 143 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 144 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 145 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 146 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 147 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 148 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 149 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 150 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 151 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 152 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 153 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 154 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 155 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 156 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 157 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 158 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 159 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG 160 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM 161 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 162 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 163 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 164 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 165 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 166 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 167 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 168 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 169 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 170 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 171 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 172 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 173 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 174 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 175 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 176 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 177 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 178 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 179 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 180 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 181 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 182 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 183 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 184 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 185 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 186 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 187 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 188 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 189 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 190 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E 191 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 192 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 193 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 194 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 195 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 196 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 197 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 198 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 199 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 200 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 201 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 202 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 203 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 204 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 205 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 206 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 207 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 208 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 209 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 210 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 211 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 212 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 213 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 214 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 215 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 216 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 217 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 218 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 219 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 220 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 221 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 222 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_COUNT 223 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..b8df0d5c6ae4 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h @@ -0,0 +1,96 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T 5 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T 6 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T 7 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T 8 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T 9 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T 10 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T 11 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T 12 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T 13 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T 14 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 15 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 16 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T 17 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T 18 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T 19 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T 20 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T 21 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T 22 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T 23 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T 24 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T 25 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T 26 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T 27 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT 28 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T},\ + {"cpu_composites_0_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"ep_nih_header_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"ethertype_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T},\ + {"generic_loopback_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"icmp_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T},\ + {"ipfix_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"psamp_mirror_on_drop_0_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_1_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ + {"psamp_mirror_on_drop_2_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\ + {"rarp_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T},\ + {"tcp_first_4bytes_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T},\ + {"RXPMD_FLEX_T", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..965147346b13 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,592 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_DA 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_ID 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_SA 6 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_DA 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_SA 5 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACDA 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ + {"ING_DROP_REASON", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ + {"MIRROR_ON_DROP_OBJ", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ + {"MMU_DROP_CTRL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ + {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_1_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_2_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR 5 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT 6 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \ + {"EGR_DROP_REASON", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\ + {"EP_COPY_SESSION_INDEX", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\ + {"RESERVED_0", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_2_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT} + + +#endif /* BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..4754761fedf3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,124 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0 5 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 6 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 7 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 8 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0 9 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 10 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 11 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 12 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 13 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 14 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 15 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 16 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 17 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 18 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 19 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 20 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 21 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0 22 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 23 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 24 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0 25 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0 26 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 27 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 28 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 29 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 30 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 31 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 32 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0 33 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 34 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0 35 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT 36 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 21 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP 1 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 2 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 3 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 4 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 5 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 6 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 7 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 8 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 9 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 10 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 11 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 12 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 13 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 14 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 15 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 17 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 19 +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP 20 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"IFP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IVXLT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_DISCARD", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ + {"L2_SRC_STATIC_MOVE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_TTL_ERROR", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ + {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"NO_COPY_TO_CPU", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ + {"TRACE_DOP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"VFP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..7b58853c3853 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,213 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_cna_6_5_30_2_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant cna_6_5_30_2_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 2 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 3 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 4 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 5 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 6 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 7 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 8 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 9 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 10 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 11 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 12 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 13 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 14 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 15 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 16 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 17 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 18 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 19 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 20 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 21 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 22 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 23 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 24 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 25 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 26 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 27 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 28 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 29 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 30 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 31 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 32 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 33 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 34 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 35 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 36 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 37 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 38 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 39 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 40 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 41 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 42 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 43 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 44 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 45 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 46 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 47 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 48 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 49 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 50 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 51 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 52 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 53 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 54 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 55 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 56 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 57 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 58 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 59 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 60 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 61 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 62 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 63 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 64 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 65 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 66 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 67 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 68 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 69 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 70 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 71 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 72 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 73 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 74 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 75 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 76 +#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT 77 + +#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..8dd7a520e072 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr.h @@ -0,0 +1,180 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_H +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T 7 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T 10 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T 11 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T 12 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T 13 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T 15 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T 17 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T 18 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T 19 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T 20 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T 21 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T 22 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T 23 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T 24 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T 25 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T 26 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T 27 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T 28 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T 29 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T 30 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T 31 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T 32 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T 33 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T 34 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T 35 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T 36 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T 37 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T 38 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T 39 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T 40 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T 41 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T 42 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T 43 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T 44 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T 45 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T 46 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T 47 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T 48 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 49 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 50 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T 51 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T 52 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T 53 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T 54 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T 55 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T 56 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T 57 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T 58 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T 59 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T 60 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T 61 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T 62 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T 63 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T 64 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T 65 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T 66 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T 67 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T 68 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T 69 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT 70 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T},\ + {"etag_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T},\ + {"hg3_base_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T},\ + {"hg3_extension_0_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T},\ + {"hop_by_hop_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T},\ + {"pim_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T},\ + {"prog_ext_hdr_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T},\ + {"svtag_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T},\ + {"tcp_first_4bytes_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..905781ac6601 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1343 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_AP 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_CPI 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DEM 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FIN 7 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MPT 9 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_POLL 11 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_STA 13 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_PAD 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_TAG 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_TPID 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_TAG},\ + {"TPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_TPID},\ + {"etag_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_ID 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HG3_BASE_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_CN 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_CNG 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_ENTROPY 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_L3_ROUTED 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_TC 11 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_VERSION 12 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FID_COUNT 13 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_CN},\ + {"CNG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_CNG},\ + {"ENTROPY", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_ENTROPY},\ + {"EXT_HDR_PRESENT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ + {"HG3_RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ + {"L3_ROUTED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\ + {"MIRROR_COPY", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ + {"RESERVED_ETYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ + {"SYSTEM_DESTINATION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ + {"SYSTEM_DESTINATION_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ + {"SYSTEM_SOURCE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ + {"TC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_TC},\ + {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_VERSION},\ + {"hg3_base_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FID_COUNT} + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 + +/*! + * \name HG3_EXTENSION_0_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_SVP 5 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ + {"CLASS_ID_LSB", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ + {"CLASS_ID_MSB", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ + {"DVP_OR_L3_IIF", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ + {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ + {"FORWARDING_DOMAIN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ + {"SVP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\ + {"hg3_extension_0_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_DA 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_ID 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_SA 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_DA 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_SA 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_MACDA 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PIM_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_0_1 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_2_3 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_4_5 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_6_7 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT \ + {"HDR_BYTES_0_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_0_1},\ + {"HDR_BYTES_2_3", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_2_3},\ + {"HDR_BYTES_4_5", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_4_5},\ + {"HDR_BYTES_6_7", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_6_7},\ + {"pim_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name SVTAG_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_DATA_LWR 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_DATA_UPR 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ + {"DATA_LWR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_DATA_LWR},\ + {"DATA_UPR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_DATA_UPR},\ + {"svtag_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_TAG 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_SPI 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..62a3cf94f74f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,180 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 7 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 8 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 9 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 10 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 11 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 12 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 13 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 14 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 15 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0 16 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 17 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 18 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 19 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 20 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 22 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 23 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 24 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 25 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 26 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 27 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 28 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 29 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 30 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 31 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 32 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0 33 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 34 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 35 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 36 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 37 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 38 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 39 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0 40 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0 41 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT 42 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 46 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 2 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 3 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 4 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 5 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 6 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP 7 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 8 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 9 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 10 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 11 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 12 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 13 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 14 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 15 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 16 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 17 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 18 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 19 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 20 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 21 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 22 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 23 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 24 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 25 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 26 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 27 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 28 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 29 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 30 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 31 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 32 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY 33 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 34 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 35 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 36 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 37 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 38 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 39 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP 40 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 41 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 42 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 43 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 44 +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP 45 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"MTOP_IPV4_GATEWAY", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\ + {"NO_COPY_TO_CPU", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"RESERVED_TRACE_BIT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ + {"SER_DROP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SVP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..9e921fc797e1 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,417 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_dna_6_5_30_2_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant dna_6_5_30_2_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 1 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 2 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 3 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 4 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 5 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 6 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 7 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 8 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 9 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 10 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 11 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 12 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 13 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 14 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 15 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 16 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 17 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 18 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 19 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 20 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 21 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 22 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 23 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 24 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 25 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 26 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 27 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 28 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 29 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 30 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 31 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 32 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 33 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 34 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 35 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 36 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 37 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 38 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 39 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 40 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 41 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 42 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 43 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 44 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 45 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 46 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 47 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 48 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 49 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 50 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 51 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 52 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 53 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 54 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 55 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 56 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 57 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 58 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 59 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 60 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 61 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 62 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 63 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 64 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 65 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 66 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 67 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 68 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 69 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 70 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 71 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 72 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 73 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 74 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 75 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 76 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 77 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 78 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 79 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 80 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 81 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 82 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 83 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 84 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 85 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 86 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 87 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 88 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 89 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 90 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 91 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 92 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 93 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 94 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 95 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 96 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 97 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 98 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 99 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 100 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 101 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 102 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 103 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 104 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 105 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 106 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 107 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 108 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 109 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 110 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 111 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 112 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 113 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 114 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 115 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 116 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 117 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 118 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 119 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 120 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 121 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 122 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 123 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 124 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 125 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 126 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 127 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 128 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 129 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 130 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 131 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 132 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 133 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 134 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 135 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 136 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 137 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 138 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 139 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 140 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 141 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 142 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 143 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 144 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 145 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 146 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 147 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 148 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 149 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 150 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 151 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 152 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 153 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 154 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 155 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 156 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 157 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 158 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 159 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 160 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 161 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 162 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 163 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 164 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 165 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 166 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 167 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 168 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 169 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 170 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 171 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 172 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 173 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 174 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 175 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 176 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 177 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 178 +#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT 179 + +#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..093abf95c165 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr.h @@ -0,0 +1,174 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_H +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T 6 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T 7 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T 10 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T 11 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T 12 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T 13 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T 15 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T 17 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T 18 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T 19 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T 20 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T 21 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T 22 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T 23 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T 24 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T 25 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T 26 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T 27 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T 28 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T 29 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T 30 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T 31 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T 32 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T 33 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T 34 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T 35 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T 36 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T 37 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T 38 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T 39 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T 40 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T 41 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T 42 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T 43 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T 44 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T 45 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 46 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 47 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T 48 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T 49 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T 50 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T 51 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T 52 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T 53 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T 54 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T 55 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T 56 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T 57 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T 58 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T 59 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T 60 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T 61 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T 62 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T 63 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T 64 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T 65 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_T 66 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_COUNT 67 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T},\ + {"etag_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T},\ + {"hop_by_hop_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T},\ + {"svtag_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T},\ + {"tcp_first_4bytes_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..8afacd3d5352 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1258 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_AP 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_CPI 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DEM 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FIN 7 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MPT 9 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_POLL 11 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_STA 13 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_PAD 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_TAG 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_TPID 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_TAG},\ + {"TPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_TPID},\ + {"etag_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_ID 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 13 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_SVP 14 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"SVP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\ + {"generic_loopback_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_DA 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_ID 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_SA 6 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_DA 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_SA 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_MACDA 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name SVTAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_DATA_LWR 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_DATA_UPR 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ + {"DATA_LWR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_DATA_LWR},\ + {"DATA_UPR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_DATA_UPR},\ + {"svtag_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_TAG 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_SPI 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..dd9b0bafb4b6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,181 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 6 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 7 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 8 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 9 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 10 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 11 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 12 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 13 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 14 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 15 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0 16 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 17 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 18 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 19 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 20 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 22 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 23 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 24 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 25 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 26 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 27 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 28 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 29 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 30 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 31 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SVP_15_0 32 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 33 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 34 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 35 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 36 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 37 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 38 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_VFI_15_0 39 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 40 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_FID_COUNT 41 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 47 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 3 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 4 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 5 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 6 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 7 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP 8 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 9 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 10 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 11 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 12 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 13 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 14 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 15 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 16 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 17 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 18 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 19 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 20 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 21 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 22 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 23 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 24 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 25 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 26 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 27 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 28 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 29 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 30 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 31 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 32 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 33 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY 34 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 35 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 36 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 37 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 38 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 39 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 40 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP 41 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 42 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 43 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 44 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 45 +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP 46 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"MTOP_IPV4_GATEWAY", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\ + {"NO_COPY_TO_CPU", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"RESERVED_TRACE_BIT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ + {"SER_DROP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SVP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..ccb7e42c51e1 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,405 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_hna_6_5_30_6_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant hna_6_5_30_6_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 4 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 5 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 6 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 7 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 8 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 9 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 10 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 11 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 12 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 13 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 14 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 15 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 16 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 17 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 18 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 19 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 20 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 21 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 22 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 23 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 24 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 25 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 26 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 27 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 28 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 29 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 30 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 31 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 32 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 33 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 34 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 35 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 36 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 37 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 38 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 39 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 40 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 41 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 42 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 43 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 44 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 45 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 46 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 47 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 48 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 49 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 50 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 51 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 52 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 53 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 54 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 55 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 56 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 57 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 58 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 59 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 60 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 61 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 62 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 63 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 64 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 65 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 66 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 67 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 68 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 69 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 70 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 71 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 72 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 73 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 74 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 75 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 76 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 77 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 78 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 79 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 80 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 81 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 82 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 83 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 84 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 85 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 86 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 87 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 88 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 89 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 90 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 91 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 92 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 93 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 94 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 95 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 96 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 97 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 98 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 99 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 100 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 101 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 102 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 103 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 104 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 105 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 106 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 107 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 108 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 109 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 110 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 111 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 112 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 113 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 114 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 115 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 116 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 117 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 118 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 119 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 120 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 121 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 122 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 123 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 124 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 125 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 126 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 127 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 128 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 129 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 130 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 131 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 132 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 133 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 134 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 135 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 136 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 137 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 138 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 139 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 140 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 141 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 142 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 143 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 144 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 145 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 146 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 147 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 148 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 149 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 150 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 151 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 152 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 153 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 154 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 155 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 156 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 157 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 158 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 159 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 160 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 161 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 162 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 163 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 164 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 165 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 166 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 167 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 168 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 169 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 170 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 171 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 172 +#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_COUNT 173 + +#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..30e952c73352 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr.h @@ -0,0 +1,178 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_H +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_H + +#include + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T 7 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T 10 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T 11 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T 12 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T 13 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T 15 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T 17 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T 18 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T 19 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T 20 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T 21 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T 22 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T 23 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T 24 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T 25 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T 26 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T 27 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T 28 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T 29 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T 30 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T 31 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T 32 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T 33 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T 34 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T 35 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T 36 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T 37 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T 38 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T 39 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T 40 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T 41 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T 42 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T 43 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T 44 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T 45 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T 46 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T 47 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T 48 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 49 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 50 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T 51 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T 52 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T 53 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T 54 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T 55 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T 56 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T 57 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T 58 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T 59 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T 60 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T 61 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T 62 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T 63 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T 64 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T 65 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T 66 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T 67 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T 68 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT 69 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T},\ + {"authen_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T},\ + {"cntag_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_ifa_l2_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T},\ + {"cpu_composites_0_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T},\ + {"erspan3_fixed_hdr_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T},\ + {"etag_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T},\ + {"hg3_base_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T},\ + {"hg3_extension_0_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T},\ + {"hop_by_hop_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T},\ + {"l2_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T},\ + {"pim_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T},\ + {"prog_ext_hdr_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T},\ + {"routing_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T},\ + {"tcp_first_4bytes_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..2635fe090264 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr_data.h @@ -0,0 +1,1324 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_OPERATION 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_AP 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_CPI 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DEM 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DIAG 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FIN 7 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MPT 9 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_POLL 11 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_STA 13 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_VERSION 15 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_RPID 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_IFA_L2_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT0 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT1 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT2 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT3 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT4 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT5 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT6 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_MACDA 7 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_MACSA 8 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT 9 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT6},\ + {"MACDA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_MACDA},\ + {"MACSA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_MACSA},\ + {"cpu_composites_0_ifa_l2_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_PAD 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_SPI 4 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_TAG 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_TPID 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_TAG},\ + {"TPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_TPID},\ + {"etag_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_ID 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FLAGS 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_VNI 4 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_RESERVED 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_VERSION 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HG3_BASE_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_CN 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_CNG 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_ENTROPY 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_L3_ROUTED 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_TC 11 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_VERSION 12 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FID_COUNT 13 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_CN},\ + {"CNG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_CNG},\ + {"ENTROPY", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_ENTROPY},\ + {"EXT_HDR_PRESENT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ + {"HG3_RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ + {"L3_ROUTED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_L3_ROUTED},\ + {"MIRROR_COPY", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ + {"RESERVED_ETYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ + {"SYSTEM_DESTINATION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ + {"SYSTEM_DESTINATION_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ + {"SYSTEM_SOURCE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ + {"TC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_TC},\ + {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_VERSION},\ + {"hg3_base_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FID_COUNT} + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 + +/*! + * \name HG3_EXTENSION_0_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_SVP 5 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ + {"CLASS_ID_LSB", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ + {"CLASS_ID_MSB", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ + {"DVP_OR_L3_IIF", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ + {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ + {"FORWARDING_DOMAIN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ + {"SVP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_SVP},\ + {"hg3_extension_0_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_CODE 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_DA 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_ID 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_OPTION 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_SA 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TOS 7 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TTL 9 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_DA 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_SA 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_MACDA 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_MACSA 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_BOS 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_EXP 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_LABEL 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_TTL 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PIM_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_0_1 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_2_3 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_4_5 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_6_7 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT \ + {"HDR_BYTES_0_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_0_1},\ + {"HDR_BYTES_2_3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_2_3},\ + {"HDR_BYTES_4_5", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_4_5},\ + {"HDR_BYTES_6_7", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_6_7},\ + {"pim_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"MOD_STATE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE},\ + {"RESERVED_0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"UC_COS__COLOR__PROB_IDX", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_OPERATION 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_DATA 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_TAG 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_CFI 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_PCP 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_TPID 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_VID 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_TAG 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FLAGS 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_SPI 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..a869f77fbca5 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,163 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 7 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 8 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 9 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 10 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 11 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0 12 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 13 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 15 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 16 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 17 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 18 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 19 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 20 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 21 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 22 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 23 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 24 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 25 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_15_0 26 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 27 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 28 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 29 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 30 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 31 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 32 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VFI_15_0 33 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0 34 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_FID_COUNT 35 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT 41 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP 3 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT 4 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP 5 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 6 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 7 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT 8 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 9 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 10 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 11 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 12 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 13 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 14 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 15 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 16 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 17 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 18 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 19 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 20 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 21 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 22 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 23 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 24 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 25 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 26 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 27 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 28 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 29 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 30 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 31 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 32 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 33 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 34 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 35 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 36 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP 37 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 38 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 39 +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP 40 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DST_FP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"RESERVED_TRACE_BIT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ + {"SER_DROP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SVP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"URPF_CHECK_FAILED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..af0fc82d32a0 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,407 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_dna_6_5_30_1_1_sf_match_id_info.yml + * for device bcm56880_a0 and variant dna_6_5_30_1_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 1 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 2 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 3 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 4 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 5 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 6 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 7 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 8 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 13 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 14 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 15 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 16 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 17 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 18 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 19 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 20 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 21 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 22 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 23 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 24 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 25 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 26 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 27 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 28 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 29 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 30 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 31 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 32 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 33 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 34 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 35 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 36 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 37 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 38 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 39 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 40 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 41 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 42 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 43 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 44 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 45 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 46 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 47 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 48 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 49 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 50 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 51 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 52 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 53 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 54 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 55 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 56 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 57 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 58 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 59 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 60 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 61 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 62 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 63 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 64 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 65 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 66 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 67 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 68 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 69 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 70 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 71 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 72 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 73 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 74 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 75 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 76 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 77 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 78 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 79 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 80 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 81 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 82 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 83 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 84 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 85 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 86 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 87 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 88 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 89 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 90 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 91 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 92 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 93 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 94 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 95 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 96 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 97 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 98 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 99 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 100 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 101 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 102 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 103 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 104 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 105 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 106 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 107 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 108 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 109 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 110 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 111 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 112 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 113 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 114 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 115 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 116 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 117 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 118 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 119 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 120 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 121 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 122 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 123 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 124 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 125 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 126 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 127 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 128 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 129 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 130 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 131 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 132 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 133 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 134 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 135 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 136 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 137 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 138 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 139 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 140 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 141 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 142 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 143 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 144 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 145 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 146 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 147 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 148 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 149 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 150 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 151 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 152 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 153 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 154 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 155 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 156 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 157 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 158 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 159 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 160 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 161 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 162 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 163 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 164 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 165 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 166 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 167 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 168 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 169 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 170 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 171 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 172 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 173 +#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT 174 + +#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..1e4c749bfc14 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr.h @@ -0,0 +1,170 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_H +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T 6 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T 7 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T 8 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T 9 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T 10 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T 11 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T 12 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T 13 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T 14 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T 15 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T 16 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T 17 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T 18 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T 19 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T 20 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T 21 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T 22 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T 23 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T 24 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T 25 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T 26 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T 27 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T 28 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T 29 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T 30 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T 31 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T 32 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T 33 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T 34 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T 35 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T 36 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T 37 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T 38 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T 39 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T 40 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T 41 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T 42 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T 43 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T 44 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 45 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 46 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T 47 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T 48 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T 49 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T 50 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T 51 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T 52 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T 53 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T 54 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T 55 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T 56 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T 57 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T 58 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T 59 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T 60 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T 61 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T 62 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T 63 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_T 64 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_COUNT 65 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T},\ + {"erspan3_fixed_hdr_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T},\ + {"etag_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T},\ + {"hop_by_hop_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T},\ + {"tcp_first_4bytes_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..6b5f4c667fcd --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1212 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_AP 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_CPI 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DEM 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FIN 7 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MPT 9 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_POLL 11 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_STA 13 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_PAD 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_TAG 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_TPID 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_TAG},\ + {"TPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_TPID},\ + {"etag_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_ID 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 13 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_SVP 14 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"SVP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\ + {"generic_loopback_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_DA 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_ID 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_SA 6 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_DA 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_SA 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_MACDA 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"MOD_STATE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE},\ + {"RESERVED_0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"UC_COS__COLOR__PROB_IDX", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_TAG 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_SPI 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..d986e9c3dc94 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,165 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 6 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 7 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 8 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 9 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 10 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 11 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0 12 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0 13 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0 14 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0 15 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 16 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 17 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 18 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 19 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 20 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 21 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 22 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 23 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 24 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 25 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 26 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0 27 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 28 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 29 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 30 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 31 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 32 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 33 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0 34 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT 35 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 42 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 3 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 4 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 5 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP 6 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 7 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 8 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 9 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 10 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 11 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 12 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 13 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 14 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 15 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 16 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 17 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 18 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 19 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 20 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 21 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 22 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 23 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 24 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 25 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 26 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 27 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 28 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 29 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 30 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 31 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 32 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 33 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 34 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 35 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 36 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 37 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP 38 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 39 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 40 +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP 41 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DST_FP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"RESERVED_TRACE_BIT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ + {"SER_DROP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SVP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"URPF_CHECK_FAILED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..a0ee1dc92c9d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,395 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_hna_6_5_30_3_0_sf_match_id_info.yml + * for device bcm56880_a0 and variant hna_6_5_30_3_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 4 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 5 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 6 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 7 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 8 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 9 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 10 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 11 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 12 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 13 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 14 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 15 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 16 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 17 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 18 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 19 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 20 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 21 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 22 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 23 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 24 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 25 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 26 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 27 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 28 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 29 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 30 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 31 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 32 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 33 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 34 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 35 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 36 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 37 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 38 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 39 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 40 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 41 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 42 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 43 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 44 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 45 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 46 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 47 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 48 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 49 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 50 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 51 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 52 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 53 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 54 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 55 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 56 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 57 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 58 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 59 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 60 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 61 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 62 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 63 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 64 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 65 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 66 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 67 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 68 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 69 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 70 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 71 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 72 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 73 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 74 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 75 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 76 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 77 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 78 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 79 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 80 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 81 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 82 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 83 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 84 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 85 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 86 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 87 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 88 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 89 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 90 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 91 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 92 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 93 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 94 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 95 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 96 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 97 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 98 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 99 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 100 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 101 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 102 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 103 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 104 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 105 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 106 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 107 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 108 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 109 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 110 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 111 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 112 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 113 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 114 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 115 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 116 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 117 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 118 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 119 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 120 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 121 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 122 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 123 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 124 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 125 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 126 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 127 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 128 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 129 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 130 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 131 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 132 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 133 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 134 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 135 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 136 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 137 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 138 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 139 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 140 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 141 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 142 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 143 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 144 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 145 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 146 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 147 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 148 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 149 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 150 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 151 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 152 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 153 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 154 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 155 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 156 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 157 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 158 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 159 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 160 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 161 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 162 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 163 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 164 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 165 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 166 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 167 +#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_COUNT 168 + +#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..4b40b1429389 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr.h @@ -0,0 +1,162 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_H +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_H + +#include + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T 6 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T 7 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T 8 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T 9 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T 10 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T 11 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T 12 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T 13 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T 14 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T 15 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T 16 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T 17 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T 18 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T 19 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T 20 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T 21 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T 22 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T 23 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T 24 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T 25 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T 26 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T 27 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T 28 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T 29 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T 30 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T 31 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T 32 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T 33 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T 34 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T 35 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T 36 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T 37 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T 38 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T 39 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T 40 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 41 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 42 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T 43 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T 44 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T 45 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T 46 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T 47 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T 48 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T 49 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T 50 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T 51 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T 52 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T 53 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T 54 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T 55 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T 56 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T 57 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T 58 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T 59 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T 60 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT 61 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T},\ + {"authen_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T},\ + {"cpu_composites_0_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T},\ + {"erspan3_fixed_hdr_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T},\ + {"etag_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T},\ + {"gtp_12byte_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T},\ + {"gtp_8byte_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T},\ + {"gtp_ext_4byte_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T},\ + {"gtp_with_ext_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T},\ + {"hop_by_hop_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T},\ + {"igmp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T},\ + {"l2_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T},\ + {"opaquetag_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T},\ + {"p_1588_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_1_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ + {"rarp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T},\ + {"routing_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T},\ + {"tcp_first_4bytes_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..188725e0be5a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr_data.h @@ -0,0 +1,1152 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_OPERATION 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_AP 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_CPI 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DEM 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DIAG 6 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FIN 7 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MPT 9 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_POLL 11 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_STA 13 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_VERSION 15 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_PAD 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_SPI 4 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_PCP_DEI 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_RSRVD0 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_RSRVD1 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_SVID 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_TPID 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_VID 5 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"PCP_DEI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_PCP_DEI},\ + {"RSRVD0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_RSRVD0},\ + {"RSRVD1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_RSRVD1},\ + {"SVID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_SVID},\ + {"TPID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_TPID},\ + {"VID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_VID},\ + {"etag_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_ID 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FLAGS 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_VNI 4 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_VN_ID_UPPER 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"VN_ID_LOWER_ENTROPY", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY},\ + {"VN_ID_UPPER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_VN_ID_UPPER},\ + {"gre_key_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_RESERVED 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_VERSION 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name GTP_12BYTE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_11_8 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_3_0 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_7_4 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT \ + {"BYTES_11_8", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_11_8},\ + {"BYTES_3_0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_3_0},\ + {"BYTES_7_4", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_7_4},\ + {"gtp_12byte_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FID_COUNT} + +/*! + * \name GTP_8BYTE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_BYTES_3_0 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_BYTES_7_4 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT \ + {"BYTES_3_0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_BYTES_3_0},\ + {"BYTES_7_4", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_BYTES_7_4},\ + {"gtp_8byte_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FID_COUNT} + +/*! + * \name GTP_EXT_4BYTE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_EXT_HDR 0 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FIELD_NAME_MAP_INIT \ + {"EXT_HDR", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_EXT_HDR},\ + {"gtp_ext_4byte_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT} + +/*! + * \name GTP_WITH_EXT_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_11_8 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_3_0 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_7_4 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FIELD_NAME_MAP_INIT \ + {"BYTES_11_8", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_11_8},\ + {"BYTES_3_0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_3_0},\ + {"BYTES_7_4", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_7_4},\ + {"gtp_with_ext_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_CODE 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_DA 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_ID 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_OPTION 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_SA 6 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TOS 7 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TTL 9 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_DA 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_SA 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_MACDA 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_MACSA 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_BOS 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_EXP 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_LABEL 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_TTL 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name OPAQUETAG_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_TPID 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_VLAN_TAG 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT \ + {"TPID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_TPID},\ + {"VLAN_TAG", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_VLAN_TAG},\ + {"opaquetag_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ + {"ING_DROP_REASON", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ + {"MIRROR_ON_DROP_OBJ", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ + {"MMU_DROP_CTRL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ + {"SAMPLED_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_OPERATION 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_DATA 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_TAG 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_CFI 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_PCP 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_TPID 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_VID 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_TAG 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID_UPPER 2 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"VN_ID_LOWER_RESERVED2", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2},\ + {"VN_ID_UPPER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID_UPPER},\ + {"vxlan_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FLAGS 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_SPI 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..04a86764bd0d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,173 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 6 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 7 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 8 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0 9 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0 10 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0 11 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0 12 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 13 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 15 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 16 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 17 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 18 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 19 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 20 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 21 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 22 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 23 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 24 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 25 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_15_0 26 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 27 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 28 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 29 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0 30 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 31 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 32 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VFI_15_0 33 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 34 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_FID_COUNT 35 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT 46 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP 3 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT 4 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP 5 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 6 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 7 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT 8 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 9 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 10 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 11 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 12 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 13 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 14 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 15 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 16 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 17 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 18 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 19 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 20 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 21 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 22 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 23 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 24 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 25 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 26 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 27 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 28 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 29 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 30 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 31 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 32 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF 33 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS 34 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS 35 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED 36 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED 37 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 38 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 39 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 40 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 41 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP 42 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 44 +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP 45 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DST_FP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_DISCARD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ + {"L2_SRC_STATIC_MOVE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PE_RPF", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF},\ + {"PE_VID_FWD_MISS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS},\ + {"PE_VID_RPF_MISS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS},\ + {"PKT_ETAG_EXPECTED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED},\ + {"PKT_ETAG_UNEXPECTED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SER_DROP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SVP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"URPF_CHECK_FAILED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..fc064a40e539 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,427 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_nfa_6_5_30_1_1_sf_match_id_info.yml + * for device bcm56880_a0 and variant nfa_6_5_30_1_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG 4 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 5 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN 6 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 7 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 8 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 13 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 14 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 15 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 16 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 17 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 18 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 19 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 20 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 21 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 22 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE 23 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE 24 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE 25 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT 26 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 27 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 28 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 29 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 30 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 31 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 32 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 33 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 34 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 35 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 36 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 37 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 38 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 39 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 40 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 41 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 42 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 43 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 44 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 45 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 46 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 47 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 48 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 49 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 50 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 51 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 52 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 53 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 54 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 55 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG 56 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 57 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN 58 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 59 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 60 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 61 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 62 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 63 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 64 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 65 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 66 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 67 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 68 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 69 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 70 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 71 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 72 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 73 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 74 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE 75 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE 76 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE 77 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT 78 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 79 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 80 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 81 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 82 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 83 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 84 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 85 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 86 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 87 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 88 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 89 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 90 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 91 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 92 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 93 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 94 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 95 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 96 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 97 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 98 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 99 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 100 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 101 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 102 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 103 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 104 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 105 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG 106 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 107 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN 108 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 109 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 110 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 111 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 112 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 113 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 114 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 115 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 116 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 117 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 118 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 119 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 120 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 121 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 122 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 123 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 124 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 125 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 126 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 127 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 128 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 129 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 130 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 131 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 132 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 133 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 134 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 135 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG 136 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 137 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN 138 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 139 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 140 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 141 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 142 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 143 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 144 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 145 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 146 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 147 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 148 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 149 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 150 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 151 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 152 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 153 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 154 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE 155 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE 156 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE 157 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT 158 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 159 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 160 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 161 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 162 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 163 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 164 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 165 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 166 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 167 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 168 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 169 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 170 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 171 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 172 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 173 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 174 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 175 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 176 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 177 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 178 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 179 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 180 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 181 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 182 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 183 +#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT 184 + +#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..5a0497165ae7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h @@ -0,0 +1,96 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T 5 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T 6 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T 7 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T 8 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T 9 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T 10 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T 11 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T 12 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T 13 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T 14 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 15 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 16 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T 17 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T 18 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T 19 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T 20 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T 21 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T 22 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T 23 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T 24 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T 25 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T 26 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T 27 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT 28 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T},\ + {"cpu_composites_0_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"ep_nih_header_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"ethertype_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T},\ + {"generic_loopback_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"icmp_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T},\ + {"ipfix_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"psamp_mirror_on_drop_0_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_1_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ + {"psamp_mirror_on_drop_2_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\ + {"rarp_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T},\ + {"tcp_first_4bytes_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T},\ + {"RXPMD_FLEX_T", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..b7c0fb4f3492 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,592 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_DA 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_ID 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_SA 6 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_DA 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_SA 5 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACDA 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ + {"ING_DROP_REASON", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ + {"MIRROR_ON_DROP_OBJ", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ + {"MMU_DROP_CTRL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ + {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_1_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_2_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR 5 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT 6 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \ + {"EGR_DROP_REASON", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\ + {"EP_COPY_SESSION_INDEX", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\ + {"RESERVED_0", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_2_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT} + + +#endif /* BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..e4fd6a6ccec8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,124 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0 5 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 6 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 7 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 8 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0 9 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 10 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 11 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 12 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 13 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 14 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 15 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0 16 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 17 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 18 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 19 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 20 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 21 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0 22 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 23 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 24 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0 25 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0 26 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 27 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 28 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 29 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 30 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 31 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 32 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0 33 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 34 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0 35 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT 36 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 21 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP 1 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 2 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 3 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 4 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 5 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 6 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 7 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 8 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 9 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 10 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 11 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 12 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 13 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 14 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 15 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 17 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 19 +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP 20 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"IFP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IVXLT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_DISCARD", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ + {"L2_SRC_STATIC_MOVE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_TTL_ERROR", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ + {"MEMBERSHIP_CHECK_FAILED", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"NO_COPY_TO_CPU", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SPANNING_TREE_CHECK_FAILED", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ + {"TRACE_DOP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"VFP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..6d34bc8283a2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,213 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56890_a0_cna_6_5_30_2_0_sf_match_id_info.yml + * for device bcm56890_a0 and variant cna_6_5_30_2_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 2 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 3 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 4 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 5 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 6 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 7 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 8 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 9 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 10 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 11 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 12 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 13 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 14 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 15 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 16 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 17 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 18 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 19 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 20 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 21 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 22 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 23 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 24 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 25 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 26 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 27 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 28 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 29 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 30 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 31 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 32 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 33 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 34 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 35 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 36 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 37 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 38 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 39 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 40 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 41 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 42 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 43 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 44 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 45 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 46 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 47 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 48 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 49 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 50 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 51 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 52 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 53 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 54 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 55 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 56 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 57 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 58 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 59 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 60 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 61 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 62 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 63 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 64 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 65 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 66 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 67 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 68 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 69 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 70 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 71 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 72 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 73 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 74 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 75 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 76 +#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT 77 + +#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..52afc1e47caf --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr.h @@ -0,0 +1,176 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_H +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T 7 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T 10 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T 11 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T 12 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T 13 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T 15 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T 17 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T 18 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T 19 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T 20 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T 21 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T 22 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T 23 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T 24 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T 25 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T 26 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T 27 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T 28 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T 29 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T 30 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T 31 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T 32 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T 33 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T 34 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T 35 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T 36 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T 37 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T 38 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T 39 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T 40 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T 41 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T 42 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T 43 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T 44 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 45 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 46 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T 47 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T 48 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T 49 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T 50 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T 51 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T 52 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T 53 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T 54 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T 55 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T 56 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T 57 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T 58 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T 59 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T 60 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T 61 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T 62 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T 63 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T 64 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T 65 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T 66 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_T 67 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_COUNT 68 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T},\ + {"ethertype_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T},\ + {"gbp_ethernet_shim_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T},\ + {"generic_loopback_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T},\ + {"hg3_base_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T},\ + {"hg3_extension_0_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T},\ + {"hop_by_hop_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T},\ + {"ifa_header_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T},\ + {"ifa_metadata_a_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T},\ + {"ifa_metadata_b_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T},\ + {"ifa_metadata_base_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T},\ + {"igmp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T},\ + {"ioam_e2e_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T},\ + {"ipfix_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T},\ + {"segment_routing_srh_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T},\ + {"segment_routing_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T},\ + {"sflow_shim_0_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T},\ + {"std_segment_id_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T},\ + {"svtag_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T},\ + {"tcp_first_4bytes_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..765cb7355c7b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1361 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_AP 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_CPI 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DEM 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FIN 7 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MPT 9 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_POLL 11 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_STA 13 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_PAD 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_ID 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GBP_ETHERNET_SHIM_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER 5 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \ + {"ETHERTYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\ + {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\ + {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\ + {"SID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\ + {"SUBTYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\ + {"VER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\ + {"gbp_ethernet_shim_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM 13 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"SRC_SUBPORT_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\ + {"START_BYTE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HG3_BASE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_CN 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_CNG 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_ENTROPY 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_L3_ROUTED 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_TC 11 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_VERSION 12 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FID_COUNT 13 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_CN},\ + {"CNG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_CNG},\ + {"ENTROPY", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_ENTROPY},\ + {"EXT_HDR_PRESENT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ + {"HG3_RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ + {"L3_ROUTED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\ + {"MIRROR_COPY", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ + {"RESERVED_ETYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ + {"SYSTEM_DESTINATION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ + {"SYSTEM_DESTINATION_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ + {"SYSTEM_SOURCE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ + {"TC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_TC},\ + {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_VERSION},\ + {"hg3_base_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FID_COUNT} + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +/*! + * \name HG3_EXTENSION_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_SVP 5 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ + {"CLASS_ID_LSB", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ + {"CLASS_ID_MSB", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ + {"DVP_OR_L3_IIF", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ + {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ + {"FORWARDING_DOMAIN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ + {"SVP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\ + {"hg3_extension_0_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_METADATA_A_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_CN 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_CN},\ + {"FWD_HDR_TTL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\ + {"PORT_SPEED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\ + {"ifa_metadata_a_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT} + +/*! + * \name IFA_METADATA_B_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT 6 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\ + {"MMU_STAT_0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\ + {"RESIDENCE_TIME_NANOSEC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\ + {"RX_TIMESTAMP_NANOSEC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_metadata_b_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT} + +/*! + * \name IFA_METADATA_BASE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\ + {"ifa_metadata_base_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IOAM_E2E_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_RESERVED 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_TYPE 6 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \ + {"IOAM_E2E_DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\ + {"IOAM_E2E_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\ + {"IOAM_HDR_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\ + {"NAMESPACE_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\ + {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\ + {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_RESERVED},\ + {"TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_TYPE},\ + {"ioam_e2e_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_DA 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_ID 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_SA 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_DA 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_SA 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_MACDA 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SEGMENT_ROUTING_SRH_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG 6 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS},\ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN},\ + {"LAST_ENTRY", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT},\ + {"TAG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG},\ + {"segment_routing_srh_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT} + +/*! + * \name SEGMENT_ROUTING_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_TAG 6 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN},\ + {"LAST_ENTRY_FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE},\ + {"SEG_LIST", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST},\ + {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT},\ + {"TAG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_TAG},\ + {"segment_routing_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name STD_SEGMENT_ID_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_DATA 0 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_DATA},\ + {"std_segment_id_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT} + +/*! + * \name SVTAG_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_DATA_LWR 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_DATA_UPR 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ + {"DATA_LWR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_DATA_LWR},\ + {"DATA_UPR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_DATA_UPR},\ + {"svtag_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"L5_BYTES_8_9", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\ + {"unknown_l5_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_SPI 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..5e273d4c8081 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,198 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DVP_15_0 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 7 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 8 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 9 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 10 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 11 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 12 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 13 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 14 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 15 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 16 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0 17 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0 18 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 19 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 20 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 21 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 22 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 23 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_8_0 24 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 25 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 26 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 27 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L2_IIF_12_0 28 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L2_OIF_12_0 29 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0 30 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 31 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 32 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0 33 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0 34 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 35 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 36 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 37 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 38 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 39 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0 40 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0 41 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0 42 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0 43 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVP_15_0 44 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 45 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0 46 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0 47 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0 48 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 49 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 50 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 51 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 52 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 53 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_VFI_15_0 54 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 55 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FID_COUNT 56 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 48 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT 2 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 4 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 5 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 6 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 7 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 8 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS 9 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP 10 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 11 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 12 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 13 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 14 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 15 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 16 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 17 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 18 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 19 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 20 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 21 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 22 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 23 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 24 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 25 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 26 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 27 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 28 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 29 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 30 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 31 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 32 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 33 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 34 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 35 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 36 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 37 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 38 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 39 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 40 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SRV6 41 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SVP 42 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 44 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 45 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 46 +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_VFP 47 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DEFAULT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"EM_FT_HPAE_MISS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\ + {"IFP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SER_DROP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SRV6", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SRV6},\ + {"SVP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..834579bbe3a3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,515 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56890_a0_dna_6_5_30_8_0_sf_match_id_info.yml + * for device bcm56890_a0 and variant dna_6_5_30_8_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG 0 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM 1 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 2 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 3 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 4 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 5 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 6 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 7 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 8 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 9 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 10 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 11 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 12 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 13 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 14 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 15 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 16 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 17 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 18 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 19 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 20 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 21 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 22 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 23 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 24 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 25 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 26 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 27 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 28 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 29 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE 30 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 31 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E 32 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 33 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 34 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 35 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 36 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 37 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 38 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 39 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 40 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 41 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 42 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 43 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 44 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 45 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 46 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 47 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 48 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 49 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 50 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 51 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 52 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 53 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 54 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 55 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 56 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 57 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 58 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 59 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 60 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 61 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 62 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 63 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG 64 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM 65 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 66 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 67 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 68 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 69 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 70 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 71 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 72 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 73 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 74 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 75 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 76 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 77 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 78 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 79 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 80 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 81 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 82 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 83 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 84 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 85 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 86 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 87 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 88 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 89 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 90 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 91 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 92 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 93 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE 94 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 95 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E 96 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 97 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 98 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 99 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 100 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 101 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 102 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 103 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 104 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 105 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 106 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 107 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 108 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 109 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 110 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 111 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 112 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 113 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 114 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 115 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 116 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 117 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 118 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 119 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 120 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 121 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 122 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 123 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 124 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG 125 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 126 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 127 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 128 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 129 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 130 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 131 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 132 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 133 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 134 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 135 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 136 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 137 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 138 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 139 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 140 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 141 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 142 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 143 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER 144 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE 145 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 146 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 147 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 148 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 149 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 150 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 151 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 152 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 153 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 154 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 155 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 156 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 157 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 158 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 159 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 160 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 161 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 162 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 163 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG 164 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM 165 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 166 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 167 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 168 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 169 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 170 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 171 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 172 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 173 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 174 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 175 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 176 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 177 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 178 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 179 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 180 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 181 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 182 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 183 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 184 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 185 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 186 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 187 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 188 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 189 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 190 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 191 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 192 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 193 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE 194 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 195 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E 196 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 197 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 198 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 199 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 200 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 201 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 202 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 203 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 204 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 205 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 206 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 207 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 208 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 209 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 210 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 211 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 212 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 213 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 214 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 215 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 216 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 217 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 218 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 219 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 220 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 221 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 222 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 223 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 224 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 225 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 226 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 227 +#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_COUNT 228 + +#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..56e234a36042 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr.h @@ -0,0 +1,180 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_H +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_H + +#include + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T 7 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T 8 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T 9 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T 10 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T 11 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T 12 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T 13 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T 14 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T 15 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T 16 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T 17 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T 18 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T 19 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T 20 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T 21 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T 22 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T 23 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T 24 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T 25 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T 26 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T 27 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T 28 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T 29 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T 30 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T 31 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T 32 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T 33 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T 34 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T 35 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T 36 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T 37 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T 38 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T 39 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T 40 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T 41 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T 42 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T 43 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T 44 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T 45 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 46 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 47 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T 48 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T 49 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T 50 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T 51 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T 52 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T 53 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T 54 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T 55 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T 56 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T 57 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T 58 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T 59 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T 60 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T 61 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T 62 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T 63 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T 64 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T 65 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T 66 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T 67 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T 68 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_T 69 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_COUNT 70 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T},\ + {"authen_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T},\ + {"cntag_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dcn_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T},\ + {"dest_option_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T},\ + {"ethertype_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T},\ + {"gbp_ethernet_shim_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T},\ + {"generic_loopback_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T},\ + {"hg3_base_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T},\ + {"hg3_extension_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T},\ + {"hop_by_hop_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T},\ + {"ifa_header_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T},\ + {"ifa_metadata_a_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T},\ + {"ifa_metadata_b_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T},\ + {"ifa_metadata_base_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T},\ + {"igmp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T},\ + {"ioam_e2e_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T},\ + {"ipfix_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T},\ + {"l2_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"psamp_postcard_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T},\ + {"psamp_postcard_1_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T},\ + {"rarp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T},\ + {"routing_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T},\ + {"segment_routing_srh_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T},\ + {"segment_routing_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T},\ + {"sflow_shim_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T},\ + {"std_segment_id_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T},\ + {"tcp_first_4bytes_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..fdefb32b0dcc --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr_data.h @@ -0,0 +1,1419 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_DATA_H +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_OPERATION 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_DATA 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_AP 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_CPI 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DEM 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DIAG 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FIN 7 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MPT 9 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_POLL 11 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_STA 13 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_VERSION 15 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_RPID 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_TPID 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DCN_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FLAGS 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_NEXT_PROTOCOL 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED0 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED1 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED2 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED3 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED4 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED0},\ + {"RESERVED1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED1},\ + {"RESERVED2", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED2},\ + {"RESERVED3", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED3},\ + {"RESERVED4", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED4},\ + {"dcn_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_PAD 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_SPI 4 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_ID 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GBP_ETHERNET_SHIM_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_SID 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_VER 5 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \ + {"ETHERTYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\ + {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\ + {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\ + {"SID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\ + {"SUBTYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\ + {"VER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\ + {"gbp_ethernet_shim_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM 13 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"SRC_SUBPORT_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\ + {"START_BYTE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FLAGS 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_RESERVED0 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_RESERVED1 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_VNI 4 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_RESERVED 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_VERSION 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HG3_BASE_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_CN 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_CNG 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_ENTROPY 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_L3_ROUTED 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_TC 11 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_VERSION 12 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FID_COUNT 13 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_CN},\ + {"CNG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_CNG},\ + {"ENTROPY", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_ENTROPY},\ + {"EXT_HDR_PRESENT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ + {"HG3_RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ + {"L3_ROUTED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_L3_ROUTED},\ + {"MIRROR_COPY", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ + {"RESERVED_ETYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ + {"SYSTEM_DESTINATION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ + {"SYSTEM_DESTINATION_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ + {"SYSTEM_SOURCE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ + {"TC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_TC},\ + {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_VERSION},\ + {"hg3_base_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FID_COUNT} + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +/*! + * \name HG3_EXTENSION_0_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_SVP 5 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ + {"CLASS_ID_LSB", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ + {"CLASS_ID_MSB", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ + {"DVP_OR_L3_IIF", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ + {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ + {"FORWARDING_DOMAIN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ + {"SVP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_SVP},\ + {"hg3_extension_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_CODE 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_METADATA_A_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_CN 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_PORT_SPEED 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_QUEUE_ID 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FID_COUNT 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_CN},\ + {"FWD_HDR_TTL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\ + {"PORT_SPEED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\ + {"QUEUE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\ + {"ifa_metadata_a_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FID_COUNT} + +/*! + * \name IFA_METADATA_B_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\ + {"MMU_STAT_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\ + {"RESIDENCE_TIME_NANOSEC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\ + {"RX_TIMESTAMP_NANOSEC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_metadata_b_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FID_COUNT} + +/*! + * \name IFA_METADATA_BASE_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR 2 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\ + {"ifa_metadata_base_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IOAM_E2E_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_NAMESPACE_ID 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_RESERVED 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_TYPE 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \ + {"IOAM_E2E_DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\ + {"IOAM_E2E_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\ + {"IOAM_HDR_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\ + {"NAMESPACE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\ + {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\ + {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_RESERVED},\ + {"TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_TYPE},\ + {"ioam_e2e_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_DA 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_ID 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_OPTION 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_SA 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TOS 7 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TTL 9 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_DA 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_SA 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_VERSION 7 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_MACDA 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_MACSA 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_BOS 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_EXP 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_LABEL 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_TTL 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_CNTRL 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FLAGS 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_VERSION 13 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name PSAMP_POSTCARD_0_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_EGRESS_MOD_PORT 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_INGRESS_PORT 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_NS 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_S 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_PSAMP_LENGTH 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_TEMPLATE_ID 5 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_INGRESS_PORT},\ + {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_S},\ + {"PSAMP_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_PSAMP_LENGTH},\ + {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_TEMPLATE_ID},\ + {"psamp_postcard_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT} + +/*! + * \name PSAMP_POSTCARD_1_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_COLOR_IDX_COS_DROPLOC 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_DROP_REASON_CODE 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_0 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_1 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_QUEUE_ID 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_RESERVED_1 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_RESIDENCE_TIME 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_SAMPLED_LENGTH 7 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_VAR_LEN_INDICATOR 8 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT 9 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FIELD_NAME_MAP_INIT \ + {"COLOR_IDX_COS_DROPLOC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_COLOR_IDX_COS_DROPLOC},\ + {"DROP_REASON_CODE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_DROP_REASON_CODE},\ + {"MMU_STAT_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_1},\ + {"QUEUE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_QUEUE_ID},\ + {"RESERVED_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_RESERVED_1},\ + {"RESIDENCE_TIME", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_RESIDENCE_TIME},\ + {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_SAMPLED_LENGTH},\ + {"VAR_LEN_INDICATOR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_VAR_LEN_INDICATOR},\ + {"psamp_postcard_1_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_OPERATION 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_DATA 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_TAG 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_TPID 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SEGMENT_ROUTING_SRH_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS},\ + {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN},\ + {"LAST_ENTRY", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT},\ + {"TAG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG},\ + {"segment_routing_srh_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT} + +/*! + * \name SEGMENT_ROUTING_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_TAG 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN},\ + {"LAST_ENTRY_FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE},\ + {"SEG_LIST", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST},\ + {"SEGMENTS_LEFT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT},\ + {"TAG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_TAG},\ + {"segment_routing_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name STD_SEGMENT_ID_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_DATA 0 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_DATA},\ + {"std_segment_id_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_DST_PORT 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"L5_BYTES_8_9", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\ + {"unknown_l5_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_CFI 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_PCP 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_TPID 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_VID 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FLAGS 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_SPI 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..259def530346 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,192 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ALLOW_NAT_3_0 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DVP_15_0 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 7 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 8 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 9 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 10 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 11 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 12 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 13 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 14 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 15 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 16 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 17 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 18 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 19 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 20 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 21 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 22 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 23 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 24 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L2_IIF_11_0 25 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L2_OIF_11_0 26 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0 27 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 28 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 29 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0 30 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0 31 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 32 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 33 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 34 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 35 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 36 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0 37 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0 38 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0 39 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0 40 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SVP_15_0 41 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 42 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 43 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 44 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 45 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 46 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 47 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_VFI_15_0 48 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 49 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_FID_COUNT 50 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_COUNT 48 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 3 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 4 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 5 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP 6 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT 7 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU 8 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP 9 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 10 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 11 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT 12 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 13 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 14 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 15 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 16 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 17 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 18 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 19 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 20 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 21 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 22 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 23 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 24 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 25 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 26 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 27 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 28 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 29 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 30 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 31 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 32 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 33 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 34 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 35 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 36 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 37 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 38 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP_EPIPE 39 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 40 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SRV6 41 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP 42 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 44 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 45 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 46 +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP 47 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IDEV_CONFIG_TO_CPU", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU},\ + {"IFP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SER_DROP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SER_DROP_EPIPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP_EPIPE},\ + {"SPANNING_TREE_CHECK_FAILED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ + {"SRV6", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SRV6},\ + {"SVP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..edd826cbfda3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,515 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm78800_a0_dna_6_5_30_3_1_sf_match_id_info.yml + * for device bcm78800_a0 and variant dna_6_5_30_3_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG 0 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM 1 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 2 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 3 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 4 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 5 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 6 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 7 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 8 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN 13 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 14 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 15 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 16 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 17 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 18 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 19 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 20 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 21 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 22 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 23 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 24 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 25 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 26 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 27 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 28 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 29 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE 30 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 31 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E 32 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 33 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 34 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 35 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 36 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 37 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 38 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 39 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 40 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 41 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 42 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 43 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 44 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 45 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 46 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 47 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 48 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 49 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 50 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 51 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 52 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 53 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 54 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 55 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 56 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 57 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 58 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 59 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 60 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 61 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 62 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 63 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG 64 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM 65 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 66 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 67 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 68 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 69 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 70 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 71 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 72 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 73 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 74 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 75 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 76 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN 77 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 78 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 79 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 80 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 81 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 82 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 83 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 84 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 85 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 86 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 87 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 88 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 89 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 90 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 91 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 92 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 93 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE 94 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 95 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E 96 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 97 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 98 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 99 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 100 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 101 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 102 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 103 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 104 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 105 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 106 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 107 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 108 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 109 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 110 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 111 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 112 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 113 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 114 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 115 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 116 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 117 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 118 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 119 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 120 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 121 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 122 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 123 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 124 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG 125 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 126 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 127 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 128 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 129 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 130 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 131 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 132 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 133 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 134 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 135 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 136 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 137 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 138 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 139 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 140 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 141 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 142 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 143 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER 144 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE 145 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 146 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 147 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 148 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 149 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 150 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 151 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 152 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 153 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 154 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 155 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 156 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 157 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 158 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 159 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 160 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 161 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 162 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 163 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG 164 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM 165 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 166 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 167 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 168 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 169 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 170 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 171 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 172 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 173 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 174 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 175 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 176 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN 177 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 178 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 179 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 180 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 181 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 182 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 183 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 184 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 185 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 186 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 187 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 188 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 189 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 190 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 191 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 192 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 193 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE 194 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 195 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E 196 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 197 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 198 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 199 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 200 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 201 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 202 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 203 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 204 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 205 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 206 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 207 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 208 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 209 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 210 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 211 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 212 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 213 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 214 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 215 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 216 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 217 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 218 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 219 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 220 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 221 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 222 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 223 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 224 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 225 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 226 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 227 +#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_COUNT 228 + +#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c new file mode 100644 index 000000000000..e1223a59fd50 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c @@ -0,0 +1,203 @@ +/*! \file bcmpkt_lbhdr.c + * + * Loopback header (LBHDR, called LOOPBACK_MH in hardware) access interface. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_lbhdr_fget_t _bd##_lbhdr_fget; +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_lbhdr_fget, +static const bcmpkt_lbhdr_fget_t *lbhdr_fget[] = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_lbhdr_fset_t _bd##_lbhdr_fset; +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_lbhdr_fset, +static const bcmpkt_lbhdr_fset_t *lbhdr_fset[] = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_lbhdr_figet_t _bd##_lbhdr_figet; +#include + +#if 0 +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_lbhdr_figet, +static const bcmpkt_lbhdr_figet_t *lbhdr_figet[] = { + NULL, +#include + NULL +}; +#endif + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_lbhdr_view_info_get, +static void (*view_info_get[])(bcmpkt_pmd_view_info_t *info) = { + NULL, +#include + NULL +}; + +static const shr_enum_map_t field_names[] = +{ + BCMPKT_LBHDR_FIELD_NAME_MAP_INIT +}; + +int +bcmpkt_lbhdr_field_get(bcmdrd_dev_type_t dev_type, uint32_t *lbhdr, + int fid, uint32_t *val) +{ + + if ((lbhdr == NULL) || (val == NULL)) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (fid < 0 || fid >= BCMPKT_LBHDR_FID_COUNT) { + return SHR_E_PARAM; + } + + if (lbhdr_fget[dev_type] == NULL || + lbhdr_fget[dev_type]->fget[fid] == NULL) { + return SHR_E_UNAVAIL; + } + + *val = lbhdr_fget[dev_type]->fget[fid](lbhdr); + + return SHR_E_NONE; +} + +int +bcmpkt_lbhdr_field_set(bcmdrd_dev_type_t dev_type, uint32_t *lbhdr, + int fid, uint32_t val) +{ + + if (lbhdr == NULL) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (fid < 0 || fid >= BCMPKT_LBHDR_FID_COUNT) { + return SHR_E_PARAM; + } + + if (lbhdr_fset[dev_type] == NULL || + lbhdr_fset[dev_type]->fset[fid] == NULL) { + return SHR_E_UNAVAIL; + } + + lbhdr_fset[dev_type]->fset[fid](lbhdr, val); + + return SHR_E_NONE; +} + +int +bcmpkt_lbhdr_field_name_get(int fid, char **name) +{ + + if (name == NULL) { + return SHR_E_PARAM; + } + + if (fid <= BCMPKT_LBHDR_FID_INVALID || + fid >= BCMPKT_LBHDR_FID_COUNT) { + return SHR_E_PARAM; + } + + *name = field_names[fid].name; + + return SHR_E_NONE; +} + +int +bcmpkt_lbhdr_field_id_get(char* name, int *fid) +{ + int i; + + if ((name == NULL) || (fid == NULL)) { + return SHR_E_PARAM; + } + + for (i = BCMPKT_LBHDR_FID_INVALID + 1; i < BCMPKT_LBHDR_FID_COUNT; i++) { + if (sal_strcasecmp(field_names[i].name, name) == 0) { + *fid = field_names[i].val; + return SHR_E_NONE; + } + } + + return SHR_E_NOT_FOUND; +} + +int +bcmpkt_lbhdr_fid_support_get(bcmdrd_dev_type_t dev_type, + bcmpkt_lbhdr_fid_support_t *support) +{ + int i; + bcmpkt_pmd_view_info_t view_info; + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + if (view_info_get[dev_type] == NULL) { + return SHR_E_INTERNAL; + } + if (support == NULL) { + return SHR_E_PARAM; + } + sal_memset(support, 0, sizeof(*support)); + + view_info_get[dev_type](&view_info); + if ((view_info.view_types == NULL) || (view_info.view_infos == NULL)) { + return SHR_E_UNAVAIL; + } + + for (i = BCMPKT_LBHDR_FID_INVALID + 1; i < BCMPKT_LBHDR_FID_COUNT; i++) { + if (view_info.view_infos[i] >= -1) { + SHR_BITSET(support->fbits, i); + } + } + + return SHR_E_NONE; +} + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c new file mode 100644 index 000000000000..10209b8db5b3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c @@ -0,0 +1,412 @@ +/*! \file bcmpkt_rxpmd.c + * + * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_rxpmd_fget_t _bd##_rxpmd_fget; +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_rxpmd_fget, +/*! This sequence should be same as bcmdrd_cm_dev_type_t */ +static const bcmpkt_rxpmd_fget_t *rxpmd_fget[] = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_rxpmd_fset_t _bd##_rxpmd_fset; +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_rxpmd_fset, +/*! This sequence should be same as bcmdrd_cm_dev_type_t */ +static const bcmpkt_rxpmd_fset_t *rxpmd_fset[] = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_rxpmd_figet_t _bd##_rxpmd_figet; +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_rxpmd_figet, +/*! This sequence should be same as bcmdrd_cm_dev_type_t */ +static const bcmpkt_rxpmd_figet_t *rxpmd_figet[] = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_rx_reason_decode, +/*! This sequence should be same as bcmdrd_cm_dev_type_t */ +static void (*reason_fdecode[])(const uint32_t*, bcmpkt_rx_reasons_t*) = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_rx_reason_encode, +static void (*reason_fencode[])(const bcmpkt_rx_reasons_t*, uint32_t*) = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_ep_rx_reason_decode, +/*! This sequence should be same as bcmdrd_cm_dev_type_t */ +static void (*ep_reason_fdecode[])(const uint32_t*, bcmpkt_rx_reasons_t*) = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_ep_rx_reason_encode, +static void (*ep_reason_fencode[])(const bcmpkt_rx_reasons_t*, uint32_t*) = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_rxpmd_view_info_get, +static void (*view_info_get[])(bcmpkt_pmd_view_info_t *) = { + NULL, +#include + NULL +}; + + +static const shr_enum_map_t field_names[] = +{ + BCMPKT_RXPMD_FIELD_NAME_MAP_INIT +}; + +static const shr_enum_map_t reason_names[] = +{ + BCMPKT_REASON_NAME_MAP_INIT +}; + +int +bcmpkt_rxpmd_len_get(bcmdrd_dev_type_t dev_type, uint32_t *len) +{ + + if (len == NULL) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_figet[dev_type] == NULL || + rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_SIZE] == NULL) { + return SHR_E_UNAVAIL; + } + + *len = rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_SIZE](NULL, NULL) * 4; + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_field_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + int fid, uint32_t *val) +{ + + if ((rxpmd == NULL) || (val == NULL)) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (fid < 0 || fid >= BCMPKT_RXPMD_FID_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_fget[dev_type] == NULL || + rxpmd_fget[dev_type]->fget[fid] == NULL) { + return SHR_E_UNAVAIL; + } + + *val = rxpmd_fget[dev_type]->fget[fid](rxpmd); + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_field_set(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + int fid, uint32_t val) +{ + + if (rxpmd == NULL) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (fid < 0 || fid >= BCMPKT_RXPMD_FID_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_fset[dev_type] == NULL || + rxpmd_fset[dev_type]->fset[fid] == NULL) { + return SHR_E_UNAVAIL; + } + + rxpmd_fset[dev_type]->fset[fid](rxpmd, val); + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_mh_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + uint32_t **hg_hdr) +{ + int len; + + if ((rxpmd == NULL) || (hg_hdr == NULL)) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_figet[dev_type] == NULL || + rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_MODULE_HDR] == NULL) { + return SHR_E_UNAVAIL; + } + + len = rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_MODULE_HDR](rxpmd, hg_hdr); + if (len <= 0) { + return SHR_E_INTERNAL; + } + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_flexdata_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + uint32_t **flexdata, uint32_t *len) +{ + + if ((rxpmd == NULL) || (flexdata == NULL) || (len == NULL)) { + return SHR_E_PARAM; + } + + *len = 0; + if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_figet[dev_type] == NULL || + rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_FLEX_DATA] == NULL) { + return SHR_E_UNAVAIL; + } + + *len = rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_FLEX_DATA](rxpmd, flexdata); + if (*len == 0) { + return SHR_E_INTERNAL; + } + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_reasons_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + bcmpkt_rx_reasons_t *reasons) +{ + uint32_t *reason = NULL; + int len; + shr_error_t rv = SHR_E_NONE; + uint32_t reason_type = BCMPKT_RXPMD_REASON_T_FROM_IP; + + if ((rxpmd == NULL) || (reasons == NULL)) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_figet[dev_type] == NULL || + rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_REASON] == NULL) { + return SHR_E_UNAVAIL; + } + + BCMPKT_RX_REASON_CLEAR_ALL(*reasons); + len = rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_REASON](rxpmd, &reason); + if (len <= 0) { + return SHR_E_INTERNAL; + } + + rv = bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_REASON_TYPE, + &reason_type); + if ((rv == SHR_E_NONE) && (reason_type == BCMPKT_RXPMD_REASON_T_FROM_EP)) { + ep_reason_fdecode[dev_type](reason, reasons); + } else { + reason_fdecode[dev_type](reason, reasons); + } + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_reasons_set(bcmdrd_dev_type_t dev_type, + bcmpkt_rx_reasons_t *reasons, uint32_t *rxpmd) +{ + uint32_t *reason = NULL; + int len; + shr_error_t rv = SHR_E_NONE; + uint32_t reason_type = BCMPKT_RXPMD_REASON_T_FROM_IP; + + if ((rxpmd == NULL) || (reasons == NULL)) { + return SHR_E_PARAM; + } + + + if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_figet[dev_type] == NULL || + rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_REASON] == NULL) { + return SHR_E_UNAVAIL; + } + len = rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_REASON](rxpmd, &reason); + if (len <= 0) { + return SHR_E_UNAVAIL; + } + + sal_memset(reason, 0, len * 4); + rv = bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_REASON_TYPE, + (uint32_t *)&reason_type); + if ((rv == SHR_E_NONE) && (reason_type == BCMPKT_RXPMD_REASON_T_FROM_EP)) { + ep_reason_fencode[dev_type](reasons, reason); + } else { + reason_fencode[dev_type](reasons, reason); + } + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_field_name_get(int fid, char **name) +{ + if (name == NULL) { + return SHR_E_PARAM; + } + if (fid <= BCMPKT_RXPMD_FID_INVALID || + fid >= BCMPKT_RXPMD_FID_COUNT) { + return SHR_E_PARAM; + } + + *name = field_names[fid].name; + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_field_id_get(char* name, int *fid) +{ + int i; + + if ((name == NULL) || (fid == NULL)) { + return SHR_E_PARAM; + } + + for (i = BCMPKT_RXPMD_FID_INVALID + 1; i < BCMPKT_RXPMD_FID_COUNT; i++) { + if (sal_strcasecmp(field_names[i].name, name) == 0) { + *fid = field_names[i].val; + return SHR_E_NONE; + } + } + + return SHR_E_NOT_FOUND; +} + +int +bcmpkt_rxpmd_fid_support_get(bcmdrd_dev_type_t dev_type, + bcmpkt_rxpmd_fid_support_t *support) +{ + int i; + bcmpkt_pmd_view_info_t view_info; + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + if (view_info_get[dev_type] == NULL) { + return SHR_E_INTERNAL; + } + if (support == NULL) { + return SHR_E_PARAM; + } + sal_memset(support, 0, sizeof(*support)); + + view_info_get[dev_type](&view_info); + if ((view_info.view_types == NULL) || (view_info.view_infos == NULL)) { + return SHR_E_UNAVAIL; + } + + for (i = BCMPKT_RXPMD_FID_INVALID + 1; i < BCMPKT_RXPMD_FID_COUNT; i++) { + if (view_info.view_infos[i] >= -1) { + SHR_BITSET(support->fbits, i); + } + } + + return SHR_E_NONE; +} + +int +bcmpkt_rx_reason_name_get(int reason, char **name) +{ + + if (name == NULL) { + return SHR_E_PARAM; + } + + if (reason <= BCMPKT_RX_REASON_NONE || + reason > BCMPKT_RX_REASON_COUNT) { + return SHR_E_PARAM; + } + + *name = reason_names[reason].name; + + return SHR_E_NONE; +} + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..50e036f2886a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c @@ -0,0 +1,228 @@ +/*! \file bcmpkt_rxpmd_match_id.c + * + * RX Packet Metadata API to return the RXPMD match id information. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include +#include +#include +#include + +/* Define stub functions for base variant. */ +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ +bcmpkt_rxpmd_match_id_db_info_t * \ +_bc##_rxpmd_match_id_db_info_get(void) {return NULL;} +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ +bcmpkt_rxpmd_match_id_map_info_t * \ +_bc##_rxpmd_match_id_map_info_get(void) {return NULL;} +#include + +/* Array of device variant specific api's */ +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \ + &_bd##_vu##_va##_rxpmd_match_id_db_info_get, +static bcmpkt_rxpmd_match_id_db_info_t * (*rxpmd_match_id_db_info_get[])(void) = { + NULL, +#include + NULL +}; + +/* Array of device variant specific api's */ +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \ + &_bd##_vu##_va##_rxpmd_match_id_map_info_get, +static bcmpkt_rxpmd_match_id_map_info_t * (*rxpmd_match_id_map_info_get[])(void) = { + NULL, +#include + NULL +}; + + +int +bcmpkt_rxpmd_match_id_get(bcmlrd_variant_t variant, + char *name, + uint32_t *match_id) +{ + const bcmpkt_rxpmd_match_id_map_info_t *map_info; + const shr_enum_map_t *id_map = NULL; + uint32_t idx; + + if ((name == NULL) || (match_id == NULL)) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_match_id_map_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + map_info = rxpmd_match_id_map_info_get[variant](); + if (map_info == NULL) { + return SHR_E_UNAVAIL; + } + + id_map = map_info->map; + if (id_map == NULL) { + return SHR_E_UNAVAIL; + } + + idx = 0; + while (idx < map_info->num_entries) { + if (sal_strcasecmp(id_map->name, name) == 0) { + *match_id = id_map->val; + return SHR_E_NONE; + } + idx++; + id_map++; + } + + return SHR_E_UNAVAIL; +} + + +int +bcmpkt_rxpmd_match_id_present(bcmlrd_variant_t variant, + uint32_t *match_id_array, + uint32_t array_len, + uint32_t match_id) +{ + const bcmpkt_rxpmd_match_id_db_t *db; + const bcmpkt_rxpmd_match_id_db_t *db_entry; + const bcmpkt_rxpmd_match_id_db_info_t *db_info; + uint32_t lsb, msb, match_data; + uint32_t start, right_shift; + + if (match_id_array == NULL) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_match_id_db_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + db_info = rxpmd_match_id_db_info_get[variant](); + if (db_info == NULL) { + return SHR_E_UNAVAIL; + } + + db = db_info->db; + if (db == NULL) { + return SHR_E_UNAVAIL; + } + + /* Check to see if db_entry is in the valid range */ + if (match_id >= db_info->num_entries) { + return SHR_E_PARAM; + } + + db_entry = &db[match_id]; + + start = db_entry->match_minbit / 32; + if (start >= array_len) { + return SHR_E_PARAM; + } + + /* Extract the bits for the match_id from the match_id data */ + right_shift = db_entry->match_minbit % 32; + lsb = match_id_array[start] >> right_shift; + + if (start == 1) { + msb = 0; + } else { + msb = match_id_array[start + 1] & ((1 << right_shift) - 1); + msb <<= (32 - right_shift); + } + + /* Mask off the data and see if it matched for the match_id */ + match_data = msb | lsb; + match_data &= db_entry->match_mask; + if (match_data == db_entry->match) { + return SHR_E_NONE; + } + + return SHR_E_NOT_FOUND; +} + +int +bcmpkt_rxpmd_match_id_from_arc_id_present(bcmlrd_variant_t variant, + uint32_t *arc_id_array, + uint32_t array_len, + uint32_t match_id) +{ + uint64_t arc_id; + const bcmpkt_rxpmd_match_id_db_t *db; + const bcmpkt_rxpmd_match_id_db_t *db_entry; + const bcmpkt_rxpmd_match_id_db_info_t *db_info; + + if ((arc_id_array == NULL) || (array_len != 2)) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_match_id_db_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + db_info = rxpmd_match_id_db_info_get[variant](); + if (db_info == NULL) { + return SHR_E_UNAVAIL; + } + + db = db_info->db; + if (db == NULL) { + return SHR_E_UNAVAIL; + } + + /* Check to see if db_entry is in the valid range */ + if (match_id >= db_info->num_entries) { + return SHR_E_PARAM; + } + + db_entry = &db[match_id]; + + if (db_entry->zone_bmp != NULL) { + + arc_id = (((uint64_t)arc_id_array[1] << 32) | arc_id_array[0]); + arc_id = (arc_id & db_entry->arc_id_mask) >> db_entry->zone_minbit; + + /* Check to see if arc id is in the valid range */ + if (arc_id >= db_entry->num_zone_bmp_words * 32) { + return SHR_E_NOT_FOUND; + } + + if (SHR_BITGET(db_entry->zone_bmp, arc_id)) { + return SHR_E_NONE; + } + } + + return SHR_E_NOT_FOUND; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c new file mode 100644 index 000000000000..ea4f41ed999b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c @@ -0,0 +1,256 @@ +/*! \file bcmpkt_txpmd.c + * + * TX Packet MetaData (TXPMD, called SOBMH in hardware) access interface. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include +#include + + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_txpmd_fget_t _bd##_txpmd_fget; +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_txpmd_fget, +static const bcmpkt_txpmd_fget_t *txpmd_fget[] = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_txpmd_fset_t _bd##_txpmd_fset; +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_txpmd_fset, +static const bcmpkt_txpmd_fset_t *txpmd_fset[] = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_txpmd_figet_t _bd##_txpmd_figet; +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_txpmd_figet, +static const bcmpkt_txpmd_figet_t *txpmd_figet[] = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_txpmd_view_info_get, +static void (*view_info_get[])(bcmpkt_pmd_view_info_t *info) = { + NULL, +#include + NULL +}; + +static const shr_enum_map_t field_names[] = +{ + BCMPKT_TXPMD_FIELD_NAME_MAP_INIT +}; + +int +bcmpkt_txpmd_len_get(bcmdrd_dev_type_t dev_type, uint32_t *len) +{ + if (len == NULL) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (txpmd_figet[dev_type] == NULL || + txpmd_figet[dev_type]->fget[BCMPKT_TXPMD_I_SIZE] == NULL) { + return SHR_E_UNAVAIL; + } + + *len = txpmd_figet[dev_type]->fget[BCMPKT_TXPMD_I_SIZE](NULL, NULL) * 4; + + return SHR_E_NONE; +} + +int +bcmpkt_txpmd_field_get(bcmdrd_dev_type_t dev_type, uint32_t *txpmd, + int fid, uint32_t *val) +{ + + if ((txpmd == NULL) || (val == NULL)) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (fid < 0 || fid >= BCMPKT_TXPMD_FID_COUNT) { + return SHR_E_PARAM; + } + + if (txpmd_fget[dev_type] == NULL || + txpmd_fget[dev_type]->fget[fid] == NULL) { + return SHR_E_UNAVAIL; + } + + *val = txpmd_fget[dev_type]->fget[fid](txpmd); + + return SHR_E_NONE; +} + +int +bcmpkt_txpmd_field_set(bcmdrd_dev_type_t dev_type, uint32_t *txpmd, + int fid, uint32_t val) +{ + if (txpmd == NULL) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (fid < 0 || fid >= BCMPKT_TXPMD_FID_COUNT) { + return SHR_E_PARAM; + } + + if (txpmd_fset[dev_type] == NULL || + txpmd_fset[dev_type]->fset[fid] == NULL) { + return SHR_E_UNAVAIL; + } + + txpmd_fset[dev_type]->fset[fid](txpmd, val); + + return SHR_E_NONE; +} + +int +bcmpkt_txpmd_field_name_get(int fid, char **name) +{ + if (name == NULL) { + return SHR_E_PARAM; + } + + if (fid <= BCMPKT_TXPMD_FID_INVALID || + fid >= BCMPKT_TXPMD_FID_COUNT) { + return SHR_E_PARAM; + } + + *name = field_names[fid].name; + + return SHR_E_NONE; +} + +int +bcmpkt_txpmd_field_id_get(char* name, int *fid) +{ + int i; + + if ((name == NULL) || (fid == NULL)) { + return SHR_E_PARAM; + } + + for (i = BCMPKT_TXPMD_FID_INVALID + 1; i < BCMPKT_TXPMD_FID_COUNT; i++) { + if (sal_strcasecmp(field_names[i].name, name) == 0) { + *fid = field_names[i].val; + return SHR_E_NONE; + } + } + + return SHR_E_NOT_FOUND; +} + +int +bcmpkt_txpmd_fid_support_get(bcmdrd_dev_type_t dev_type, + bcmpkt_txpmd_fid_support_t *support) +{ + int i; + bcmpkt_pmd_view_info_t view_info; + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + if (view_info_get[dev_type] == NULL) { + return SHR_E_INTERNAL; + } + if (support == NULL) { + return SHR_E_PARAM; + } + sal_memset(support, 0, sizeof(*support)); + + view_info_get[dev_type](&view_info); + if ((view_info.view_types == NULL) || (view_info.view_infos == NULL)) { + return SHR_E_UNAVAIL; + } + + for (i = BCMPKT_TXPMD_FID_INVALID + 1; i < BCMPKT_TXPMD_FID_COUNT; i++) { + if (view_info.view_infos[i] >= -1) { + SHR_BITSET(support->fbits, i); + } + } + + return SHR_E_NONE; +} + +int +bcmpkt_txpmd_fid_view_get(bcmdrd_dev_type_t dev_type, + int fid, int *view) + +{ + bcmpkt_pmd_view_info_t view_info; + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (view == NULL) { + return SHR_E_PARAM; + } + + if (fid <= BCMPKT_TXPMD_FID_INVALID || + fid >= BCMPKT_TXPMD_FID_COUNT) { + return SHR_E_PARAM; + } + + if (view_info_get[dev_type] == NULL) { + return SHR_E_INTERNAL; + } + + view_info_get[dev_type](&view_info); + if ((view_info.view_types == NULL) || (view_info.view_infos == NULL)) { + return SHR_E_UNAVAIL; + } + *view = view_info.view_infos[fid]; + + return SHR_E_NONE; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c new file mode 100644 index 000000000000..0811bda80f29 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c @@ -0,0 +1,107 @@ +/*! \file bcmpkt_util.c + * + * BCMPKT utility functions. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include +#include +#include + +/*! This sequence should be same as bcmdrd_cm_dev_type_t */ +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + {#_bd, _dv, BCMDRD_DEV_T_##_bd}, +static const struct { + char *dev_name; + uint32_t id; + bcmdrd_dev_type_t dev_type; +} device_types[] = { + {"none", 0, BCMDRD_DEV_T_NONE}, +#include + {"invalid",0, BCMDRD_DEV_T_COUNT} +}; + +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ + {#_bd, #_ve, BCMLRD_VARIANT_T_##_bd##_##_ve}, +static const struct { + char *dev_name; + char *var_name; + bcmlrd_variant_t var_type; +} variant_types[] = { + {"none", "none", BCMLRD_VARIANT_T_NONE}, +#include + {"invalid", "invalid", BCMLRD_VARIANT_T_COUNT} +}; + +bcmdrd_dev_type_t +bcmpkt_util_dev_type_get(const char *dev_name) +{ + int idx; + + for (idx = 0; idx < COUNTOF(device_types); idx++) { + if (sal_strcasecmp(dev_name, device_types[idx].dev_name) == 0) { + return device_types[idx].dev_type; + } + } + return BCMDRD_DEV_T_NONE; +} + +bcmlrd_variant_t +bcmpkt_util_variant_type_get(const char *dev_name, const char *var_name) +{ + int idx; + + for (idx = 0; idx < COUNTOF(variant_types); idx++) { + if (sal_strcasecmp(dev_name, variant_types[idx].dev_name) == 0 && + sal_strcasecmp(var_name, variant_types[idx].var_name) == 0) { + return variant_types[idx].var_type; + } + } + return BCMLRD_VARIANT_T_NONE; +} + +uint32_t +bcmpkt_util_dev_id_get(const bcmdrd_dev_type_t dev_type) +{ + int idx; + + for (idx = 0; idx < COUNTOF(device_types); idx++) { + if (dev_type == device_types[idx].dev_type) { + return device_types[idx].id; + } + } + return BCMDRD_DEV_T_NONE; +} + +void +bcmpkt_util_rcpu_hdr_init(const bcmdrd_dev_type_t dev_type, + bcmpkt_rcpu_hdr_t *rhdr) + +{ + if (rhdr) { + sal_memset(rhdr, 0, sizeof(*rhdr)); + rhdr->tpid = BCMPKT_RCPU_TPID; + rhdr->vlan = BCMPKT_RCPU_VLAN; + rhdr->ethertype = BCMPKT_RCPU_ETYPE; + rhdr->flags = BCMPKT_RCPU_F_MODHDR; + rhdr->signature = bcmpkt_util_dev_id_get(dev_type); + } +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..4c975bc2cbc6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,6760 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56690_a0_dna_6_5_29_0_1_sf_match_id_info.yml + * for device bcm56690_a0 and variant dna_6_5_29_0_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] = +{ + 0x366c, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = +{ + 0x78f0, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = +{ + 0x1fffe, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = +{ + 0xff00, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] = +{ + 0x1e4c8, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[32] = +{ + 0x10, + 0x4000, + 0x2007f8, + 0x0, + 0x0, + 0xfff00000, + 0xffffffff, + 0xffffffff, + 0x1f, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x10000, + 0x4000000, + 0x7f8000, + 0x2, + 0x0, + 0x0, + 0xffffffff, + 0xffffffff, + 0x1ffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[45] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7fe00000, + 0x0, + 0x0, + 0x1ff80, + 0x0, + 0xfe000000, + 0x7, + 0x0, + 0x3ff, + 0x0, + 0xffc0000, + 0x0, + 0x0, + 0x1ff8, + 0x0, + 0xf0000000, + 0x3f, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7fe, + 0x0, + 0x1ff80000, + 0x0, + 0x0, + 0x7fe0, + 0x0, + 0x3ff000, + 0x0, + 0xc0000000, + 0xff, + 0x0, + 0x1ff8000, + 0x0, + 0x0, + 0x3ff00, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[47] = +{ + 0x0, + 0x0, + 0x20000080, + 0x0, + 0x0, + 0x8000010, + 0x4010020, + 0x808020, + 0x802002, + 0x801004, + 0x80080202, + 0x80100200, + 0x8020200, + 0x8010040, + 0x4010020, + 0x1001004, + 0x802004, + 0x40101004, + 0x40080200, + 0x20080100, + 0x808020, + 0x801004, + 0x40401002, + 0x100, + 0x0, + 0x80000, + 0x200, + 0x0, + 0x10000, + 0x10020080, + 0x8020040, + 0x2002008, + 0x1004008, + 0x80202008, + 0x200800, + 0x20200801, + 0x10040080, + 0x10020080, + 0x1004040, + 0x2004010, + 0x1004008, + 0x80200401, + 0x80100400, + 0x8020200, + 0x1004008, + 0x1002008, + 0x100404, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[35] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffffffc0, + 0xffffffff, + 0x7fffff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfffc0000, + 0xffffffff, + 0xffffffff, + 0x7, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[45] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x1ff, + 0x0, + 0x7fe0000, + 0x0, + 0x0, + 0x1ff8, + 0x0, + 0xffc00, + 0x0, + 0xf0000000, + 0x3f, + 0x0, + 0x7fe000, + 0x0, + 0x0, + 0xffc0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1ff800, + 0x0, + 0xe0000000, + 0x7f, + 0x0, + 0x1ff8000, + 0x0, + 0xffc00000, + 0x0, + 0x0, + 0x3ff00, + 0x0, + 0xfe000000, + 0x7, + 0x0, + 0xffc0000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[45] = +{ + 0x0, + 0x0, + 0x400000, + 0x0, + 0x0, + 0x0, + 0x200, + 0x0, + 0x8000000, + 0x0, + 0x800000, + 0x2000, + 0x0, + 0x100000, + 0x0, + 0x0, + 0x40, + 0x0, + 0x800000, + 0x0, + 0x0, + 0x10000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x4, + 0x0, + 0x0, + 0x200000, + 0x0, + 0x0, + 0x80, + 0x0, + 0x2000008, + 0x0, + 0x0, + 0x1, + 0x0, + 0x40000, + 0x0, + 0x0, + 0x8, + 0x0, + 0x10000000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[24] = +{ + 0x1e, + 0x4000, + 0xffe007f8, + 0x3, + 0x800, + 0xfffc00ff, + 0xffffffff, + 0xffffffff, + 0xffffffdf, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0x6fff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[37] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xff000000, + 0xffffffff, + 0x7fffffff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfffffff0, + 0xffffffff, + 0x7ff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[46] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffc00, + 0x0, + 0xf0000000, + 0x3f, + 0x0, + 0x0, + 0x0, + 0x7fe00000, + 0x0, + 0x0, + 0x1ff80, + 0x0, + 0xff000000, + 0x3, + 0x0, + 0x7fe0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffc00000, + 0x0, + 0x0, + 0x3ff00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7fe, + 0x0, + 0x1ff80000, + 0x0, + 0x0, + 0x3ff0, + 0x0, + 0xe0000000, + 0x7f, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0xffffffff, + 0xffffffff, + 0xffff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfffff800, + 0xffffffff, + 0xfffffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[46] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3ff00000, + 0x0, + 0x0, + 0xffc0, + 0x0, + 0xffc000, + 0x0, + 0x80000000, + 0x1ff, + 0x0, + 0x7fe0000, + 0x0, + 0x0, + 0xffc, + 0x0, + 0xf8000000, + 0x1f, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3ff, + 0x0, + 0xffc0000, + 0x0, + 0xfc000000, + 0xf, + 0x0, + 0x1ff800, + 0x0, + 0xe0000000, + 0x7f, + 0x0, + 0xffc000, + 0x0, + 0x0, + 0x1ff80, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[47] = +{ + 0x0, + 0x4000, + 0x800000, + 0x0, + 0x800, + 0x400000, + 0x40200801, + 0x10000401, + 0x20040100, + 0x10050080, + 0x4004000, + 0x5008010, + 0x400010, + 0x400802, + 0x200a01, + 0x20090080, + 0x28040100, + 0x2000080, + 0x2004010, + 0x1005008, + 0x20000400, + 0x10040080, + 0x200a0, + 0x8, + 0x4000000, + 0x0, + 0x8, + 0x800000, + 0x0, + 0x801004, + 0x401402, + 0x40100100, + 0x50080200, + 0x4000100, + 0x8010040, + 0x10050, + 0x802004, + 0xa01004, + 0x90080002, + 0x40100200, + 0x80280, + 0x4010020, + 0x5008020, + 0x400010, + 0x40080200, + 0x200a0100, + 0x8000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[29] = +{ + 0x0, + 0x0, + 0x1200000, + 0x0, + 0x0, + 0x40000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x12, + 0x0, + 0x40000000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[29] = +{ + 0x18, + 0x4000, + 0xffe007f8, + 0x3, + 0x800, + 0x400ff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x18000, + 0x4000000, + 0x7f8000, + 0x3ffe, + 0x800000, + 0x400ff000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[47] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfff80000, + 0xffffffff, + 0xffffffff, + 0xffffffdf, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xfff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0xffffffff, + 0xffffffff, + 0xfffdffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[47] = +{ + 0x0, + 0x0, + 0x40000100, + 0x0, + 0x0, + 0x10000020, + 0x8020040, + 0x1010040, + 0x1004004, + 0x1002008, + 0x100404, + 0x200401, + 0x10040401, + 0x10020080, + 0x8020040, + 0x2002008, + 0x1004008, + 0x80202008, + 0x80100400, + 0x40100200, + 0x1010040, + 0x1002008, + 0x80802004, + 0x200, + 0x0, + 0x100000, + 0x400, + 0x0, + 0x20000, + 0x20040100, + 0x10040080, + 0x4004010, + 0x2008010, + 0x404010, + 0x401001, + 0x40401002, + 0x20080100, + 0x20040100, + 0x2008080, + 0x4008020, + 0x2008010, + 0x400802, + 0x200801, + 0x10040401, + 0x2008010, + 0x2004010, + 0x200808, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[42] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfffe0000, + 0xffffffff, + 0xffffffff, + 0x3, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xe0000000, + 0xffffffff, + 0xffffffff, + 0x3fff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[46] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x1ff, + 0x0, + 0x7fe0000, + 0x0, + 0xfe000000, + 0x7, + 0x0, + 0xffc00, + 0x0, + 0xf0000000, + 0x3f, + 0x0, + 0x7fe000, + 0x0, + 0x0, + 0xffc0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1ff800, + 0x0, + 0xe0000000, + 0x7f, + 0x0, + 0x7fe0, + 0x0, + 0xffc00000, + 0x0, + 0x0, + 0x3ff00, + 0x0, + 0xfe000000, + 0x7, + 0x0, + 0xffc0000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[24] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x2000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[44] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfffffffc, + 0xffffffff, + 0x7ffff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffffc000, + 0xffffffff, + 0x7fffffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[47] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7fe00, + 0x0, + 0xf8000000, + 0x1f, + 0x0, + 0x1ff8, + 0x0, + 0x3ff00000, + 0x0, + 0x0, + 0xffc0, + 0x0, + 0xff800000, + 0x1, + 0x0, + 0x3ff0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7fe00000, + 0x0, + 0x0, + 0x1ff80, + 0x0, + 0x1ff8000, + 0x0, + 0x0, + 0x3ff, + 0x0, + 0xffc0000, + 0x0, + 0x0, + 0x1ff8, + 0x0, + 0xf0000000, + 0x3f, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[47] = +{ + 0x0, + 0x0, + 0xe000038, + 0x0, + 0x0, + 0x3800007, + 0x1c0700e, + 0xe038380e, + 0xc0380e00, + 0xe0380701, + 0x380380e0, + 0x380700e0, + 0x380e0e0, + 0x380701c, + 0xc1c0700e, + 0xc0700701, + 0xc0380e01, + 0x1c070701, + 0x1c0380e0, + 0xe038070, + 0xc038380e, + 0xe0380701, + 0x1c1c0700, + 0x70, + 0x0, + 0x38000, + 0xe0, + 0x0, + 0x7000, + 0x700e038, + 0x8380e01c, + 0x80e00e03, + 0x80701c03, + 0x380e0e03, + 0x700e0380, + 0xe0e0380, + 0x701c038, + 0x700e038, + 0x701c1c, + 0x80e01c07, + 0x70701c03, + 0x380e01c0, + 0x380701c0, + 0x8380e0e0, + 0x80701c03, + 0xc0700e03, + 0x701c1, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[47] = +{ + 0x0, + 0x0, + 0xc000030, + 0x0, + 0x0, + 0x3000006, + 0x180600c, + 0xc030300c, + 0x80300c00, + 0xc0300601, + 0x300300c0, + 0x300600c0, + 0x300c0c0, + 0x3006018, + 0x8180600c, + 0x80600601, + 0x80300c01, + 0x18060601, + 0x180300c0, + 0xc030060, + 0x8030300c, + 0xc0300601, + 0x18180600, + 0x60, + 0x0, + 0x30000, + 0xc0, + 0x0, + 0x6000, + 0x600c030, + 0x300c018, + 0xc00c03, + 0x601803, + 0x300c0c03, + 0x600c0300, + 0xc0c0300, + 0x6018030, + 0x600c030, + 0x601818, + 0xc01806, + 0x60601803, + 0x300c0180, + 0x30060180, + 0x300c0c0, + 0x601803, + 0x80600c03, + 0x60181, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[47] = +{ + 0x0, + 0x0, + 0xf00003c0, + 0x0, + 0x0, + 0x3c000078, + 0x1e0780f0, + 0x3c3c0f0, + 0x3c0f00f, + 0x3c0781e, + 0xc03c0f0f, + 0xc0780f03, + 0x3c0f0f03, + 0x3c0781e0, + 0x1e0780f0, + 0x780781e, + 0x3c0f01e, + 0xe078781e, + 0xe03c0f01, + 0xf03c0781, + 0x3c3c0f0, + 0x3c0781e, + 0xe1e0780f, + 0x781, + 0x0, + 0x3c0000, + 0xf00, + 0x0, + 0x78000, + 0x780f03c0, + 0x3c0f01e0, + 0xf00f03c, + 0x781e03c, + 0xc0f0f03c, + 0x80f03c03, + 0xf0f03c07, + 0x781e03c0, + 0x780f03c0, + 0x781e1e0, + 0xf01e078, + 0x8781e03c, + 0xc0f01e07, + 0xc0781e03, + 0x3c0f0f03, + 0x781e03c, + 0x780f03c, + 0x781e1e, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[24] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x4000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[47] = +{ + 0x0, + 0x0, + 0x400, + 0x1, + 0x0, + 0x40000080, + 0x20080100, + 0x4040100, + 0x4010010, + 0x4008020, + 0x401010, + 0x801004, + 0x40101004, + 0x40080200, + 0x20080100, + 0x8008020, + 0x4010020, + 0x808020, + 0x401002, + 0x400802, + 0x4040101, + 0x4008020, + 0x2008010, + 0x802, + 0x0, + 0x400000, + 0x1000, + 0x0, + 0x80000, + 0x80100400, + 0x40100200, + 0x10010040, + 0x8020040, + 0x1010040, + 0x1004004, + 0x1004008, + 0x80200401, + 0x80100400, + 0x8020200, + 0x10020080, + 0x8020040, + 0x1002008, + 0x802004, + 0x40101004, + 0x8020040, + 0x8010040, + 0x802020, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[47] = +{ + 0x0, + 0x0, + 0x88000220, + 0x0, + 0x0, + 0x22000044, + 0x11044088, + 0x82222088, + 0x2208808, + 0x82204411, + 0x20220888, + 0x20440882, + 0x22088882, + 0x22044110, + 0x11044088, + 0x4404411, + 0x2208811, + 0x10444411, + 0x10220881, + 0x88220441, + 0x2222088, + 0x82204411, + 0x11104408, + 0x441, + 0x0, + 0x220000, + 0x880, + 0x0, + 0x44000, + 0x44088220, + 0x22088110, + 0x8808822, + 0x4411022, + 0x20888822, + 0x40882202, + 0x88882204, + 0x44110220, + 0x44088220, + 0x4411110, + 0x8811044, + 0x44411022, + 0x20881104, + 0x20441102, + 0x22088882, + 0x4411022, + 0x4408822, + 0x441111, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[47] = +{ + 0x0, + 0x0, + 0x0, + 0x2, + 0x800, + 0x400ff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf8000000, + 0xffffffff, + 0xffffffff, + 0xfff, + 0x0, + 0x0, + 0x2000, + 0x800000, + 0x400ff000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffffff80, + 0xffffffff, + 0xffffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[47] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf8000000, + 0x1f, + 0x0, + 0x7fe000, + 0x0, + 0x7fe00000, + 0x0, + 0x0, + 0xffc0, + 0x0, + 0xff000000, + 0x3, + 0x0, + 0x7fe00, + 0x0, + 0x0, + 0xffc, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1ff80, + 0x0, + 0xfe000000, + 0x7, + 0x0, + 0x7fe, + 0x0, + 0xffc0000, + 0x0, + 0x0, + 0x3ff0, + 0x0, + 0x7fe00000, + 0x0, + 0x0, + 0xffc000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[2] = +{ + 0x33033198, + 0xcc66066, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[2] = +{ + 0x44044220, + 0x11088088, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[2] = +{ + 0xffc00000, + 0xffffffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[2] = +{ + 0x0, + 0xfffff800, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[2] = +{ + 0xf80f87c0, + 0x3e1f01f0, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[2] = +{ + 0xfffffffe, + 0xffffffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[2] = +{ + 0x1ff800, + 0x7fe003ff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[2] = +{ + 0xa23a2510, + 0xe8944744, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[13] = +{ + 0x10, + 0x0, + 0x4, + 0x20003df6, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbfdf7c0, + 0x7dfefbfe, + 0xbeff7dff, + 0x7beff7df, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[34] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3df780, + 0x0, + 0x0, + 0x0, + 0xf7de, + 0x0, + 0x0, + 0x78000000, + 0x3df, + 0x0, + 0x0, + 0x7de00000, + 0xf, + 0x0, + 0x0, + 0xf0000000, + 0x7be, + 0x0, + 0x0, + 0xfbc00000, + 0x1e, + 0x0, + 0x0, + 0x0, + 0x1efbc00, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[39] = +{ + 0x0, + 0x0, + 0x0, + 0x40, + 0x0, + 0x8, + 0x0, + 0x0, + 0x2000, + 0x20004000, + 0x10002000, + 0x8001000, + 0x800100, + 0x800100, + 0x400080, + 0x200040, + 0x20004, + 0x20004, + 0x20002, + 0x10002001, + 0x10000000, + 0x8000800, + 0x4000400, + 0x400200, + 0x20, + 0x40008, + 0x20004, + 0x20010002, + 0x20001000, + 0x10001000, + 0x8000800, + 0x800400, + 0x100040, + 0x20002, + 0x80010001, + 0x40008000, + 0x4000800, + 0x41000200, + 0x4444, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[17] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbeff7df, + 0xfdf7fbef, + 0x7efbfdf7, + 0x1efbfdf, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[35] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbc00000, + 0x1e, + 0x0, + 0x0, + 0x7bef0000, + 0x0, + 0x0, + 0x0, + 0x1efbc00, + 0x0, + 0x0, + 0x0, + 0x7bef0, + 0x0, + 0x0, + 0x0, + 0x3df7800, + 0x0, + 0x0, + 0x0, + 0xf7de0, + 0x0, + 0x0, + 0x0, + 0xde000000, + 0xf7, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[35] = +{ + 0x0, + 0x0, + 0x0, + 0x40000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x20, + 0x0, + 0x0, + 0x80000000, + 0x0, + 0x0, + 0x2000000, + 0x2000000, + 0x0, + 0x0, + 0x0, + 0x80000, + 0x0, + 0x0, + 0x0, + 0x4000000, + 0x0, + 0x0, + 0x0, + 0x100000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x100, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[39] = +{ + 0x1e, + 0x0, + 0x4, + 0xe0003df6, + 0xe22fffff, + 0xfbe, + 0x0, + 0x200, + 0x1efb00, + 0xfbfdf7f0, + 0x7dfefbfe, + 0xbeff7dff, + 0x7beff7df, + 0xfbeff7df, + 0xfdf7fbef, + 0x7efbfdf7, + 0x7fefbfdf, + 0xbfefbfdf, + 0xdfefbfef, + 0x7dfefbf7, + 0x7dffffff, + 0xbeffbeff, + 0xdf7fdf7f, + 0xfdf7efbf, + 0xf88bfefb, + 0x7fdf7fbe, + 0xbfefbfdf, + 0xfbf7dfef, + 0xfbff7dfe, + 0x7dff7dfe, + 0xbeffbeff, + 0xfbefdf7f, + 0xbf7dfdf7, + 0xdfefbfef, + 0xeff7dff7, + 0xf7fbeffb, + 0xdf7fbefd, + 0xffe007fb, + 0x7ffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7c000000, + 0xbfefbfdf, + 0xdfefbfef, + 0x7dfefbf7, + 0xf, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[35] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1efbc0, + 0x0, + 0x0, + 0x0, + 0x7bef, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbef00000, + 0x7, + 0x0, + 0x0, + 0x78000000, + 0x3df, + 0x0, + 0x0, + 0x7de00000, + 0xf, + 0x0, + 0x0, + 0x0, + 0xf7de00, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[37] = +{ + 0x0, + 0x0, + 0x0, + 0x180, + 0x0, + 0x30, + 0x0, + 0x0, + 0xc000, + 0xc0018000, + 0x6000c000, + 0x30006000, + 0x3000600, + 0x3000600, + 0x1800300, + 0xc00180, + 0xc0018, + 0xc0018, + 0xc000c, + 0x6000c006, + 0x60000000, + 0x30003000, + 0x18001800, + 0x1800c00, + 0xc0, + 0x180030, + 0xc0018, + 0xc006000c, + 0xc0006000, + 0x60006000, + 0x30003000, + 0x3001800, + 0x600180, + 0xc000c, + 0x60006, + 0x80030003, + 0x18003001, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[21] = +{ + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x7fff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffff0, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x1fe, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3fc0, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x1e3c, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3c780, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x5568, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xaad00, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x79b0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf3600, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[25] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7df00000, + 0xbeffbeff, + 0xdf7fdf7f, + 0xfdf7efbf, + 0x1efb, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[36] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7de00000, + 0xf, + 0x0, + 0x0, + 0x3df78000, + 0x0, + 0x0, + 0xbc000000, + 0x1ef, + 0x0, + 0x0, + 0x0, + 0x3df78, + 0x0, + 0x0, + 0x0, + 0x1efbc00, + 0x0, + 0x0, + 0x0, + 0x7bef0, + 0x0, + 0x0, + 0x0, + 0xef000000, + 0x7b, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[37] = +{ + 0x0, + 0x0, + 0x4, + 0x0, + 0x8000, + 0x0, + 0x0, + 0x200, + 0x0, + 0x800100, + 0x400080, + 0x200050, + 0x20000, + 0x20004, + 0x40010002, + 0x8001, + 0x10000800, + 0x8000800, + 0x4000a00, + 0x400000, + 0x400000, + 0x200020, + 0x140010, + 0x80000008, + 0x20002000, + 0x10001000, + 0xa000800, + 0x400, + 0x800040, + 0x400040, + 0x280020, + 0x10, + 0x1, + 0x4000800, + 0x2000400, + 0x1000280, + 0x100000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[25] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x22f0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x8bc000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata[25] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x2080000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x820000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[10] = +{ + 0x0, + 0x0, + 0x0, + 0x20000000, + 0x20000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x10, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[37] = +{ + 0x0, + 0x0, + 0x0, + 0x100, + 0x0, + 0x20, + 0x0, + 0x0, + 0x8000, + 0x80010000, + 0x40008000, + 0x20004000, + 0x2000400, + 0x2000400, + 0x1000200, + 0x800100, + 0x80010, + 0x80010, + 0x80008, + 0x40008004, + 0x40000000, + 0x20002000, + 0x10001000, + 0x1000800, + 0x80, + 0x100020, + 0x80010, + 0x80040008, + 0x80004000, + 0x40004000, + 0x20002000, + 0x2001000, + 0x400100, + 0x80008, + 0x40004, + 0x20002, + 0x10002001, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[10] = +{ + 0x18, + 0x0, + 0x4, + 0xe0003df6, + 0xe22fffff, + 0xfbe, + 0x0, + 0x200, + 0x1efb00, + 0x10, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbfdf7e0, + 0x7dfefbfe, + 0xbeff7dff, + 0x7beff7df, + 0xfbeff7df, + 0xfdf7fbef, + 0x7efbfdf7, + 0x7fefbfdf, + 0xbfefbfdf, + 0xdfefbfef, + 0x7dfefbf7, + 0x7dffffff, + 0xbeffbeff, + 0xdf7fdf7f, + 0xfdf7efbf, + 0xf88bfefb, + 0x7fdf7fbe, + 0xbfefbfdf, + 0xfbf7dfef, + 0xfbff7dfe, + 0x7dff7dfe, + 0xbeffbeff, + 0xfbefdf7f, + 0xbf7dfdf7, + 0xdfefbfef, + 0xeff7dff7, + 0xf7fbeffb, + 0xdf7fbefd, + 0x3, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffe007f8, + 0xffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffe007f0, + 0xfff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffe007e0, + 0xff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffe007c0, + 0xf, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffe00000, + 0xf, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfc000000, + 0xf, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf8000000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x61800300, + 0x6666, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x82000400, + 0x8888, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[39] = +{ + 0x0, + 0x0, + 0x0, + 0x400, + 0x0, + 0x80, + 0x0, + 0x0, + 0x20000, + 0x40000, + 0x20002, + 0x80010001, + 0x8001000, + 0x8001000, + 0x4000800, + 0x2000400, + 0x200040, + 0x200040, + 0x200020, + 0x20010, + 0x1, + 0x80008001, + 0x40004000, + 0x4002000, + 0x200, + 0x400080, + 0x200040, + 0x100020, + 0x10002, + 0x10002, + 0x80008001, + 0x8004000, + 0x1000400, + 0x200020, + 0x100010, + 0x80008, + 0x40008004, + 0x0, + 0x10000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[29] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf8000000, + 0x7fdf7fbe, + 0xbfefbfdf, + 0xfbf7dfef, + 0xf7dfe, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[36] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7de0, + 0x0, + 0x0, + 0x80000000, + 0x3df7, + 0x0, + 0x0, + 0x1efbc00, + 0x0, + 0x0, + 0x0, + 0xdf780000, + 0x3, + 0x0, + 0x0, + 0xbc000000, + 0x1ef, + 0x0, + 0x0, + 0xbef00000, + 0x7, + 0x0, + 0x0, + 0x0, + 0x7bef00, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x20000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[33] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbe00000, + 0x7dff7dfe, + 0xbeffbeff, + 0xfbefdf7f, + 0x3df7, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[37] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbef00000, + 0x7, + 0x0, + 0x0, + 0x1efbc000, + 0x0, + 0x0, + 0xde000000, + 0xf7, + 0x0, + 0x0, + 0x0, + 0x1efbc, + 0x0, + 0x0, + 0x0, + 0xf7de00, + 0x0, + 0x0, + 0x0, + 0x3df78, + 0x0, + 0x0, + 0x0, + 0xf7800000, + 0x3d, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1[33] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7dc000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[37] = +{ + 0x0, + 0x0, + 0x0, + 0x16, + 0xc00e0000, + 0x2, + 0x0, + 0x0, + 0xb00, + 0xb001600, + 0x5800b00, + 0x2c00580, + 0x2c0058, + 0x2c0058, + 0x16002c, + 0x600b0016, + 0x6000b001, + 0xb000b001, + 0x5800b000, + 0x5800b00, + 0x5800000, + 0x2c002c0, + 0x1600160, + 0x1600b0, + 0xc003800b, + 0x60016002, + 0xb000b001, + 0xb005800, + 0xb000580, + 0x5800580, + 0x2c002c0, + 0x2c0160, + 0xb0058016, + 0x5800b000, + 0x2c005800, + 0x16002c00, + 0x16002c0, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[37] = +{ + 0x0, + 0x0, + 0x0, + 0x14, + 0x800c0000, + 0x2, + 0x0, + 0x0, + 0xa00, + 0xa001400, + 0x5000a00, + 0x2800500, + 0x280050, + 0x280050, + 0x140028, + 0x400a0014, + 0x4000a001, + 0xa000a001, + 0x5000a000, + 0x5000a00, + 0x5000000, + 0x2800280, + 0x1400140, + 0x1400a0, + 0x8003000a, + 0x40014002, + 0xa000a001, + 0xa005000, + 0xa000500, + 0x5000500, + 0x2800280, + 0x280140, + 0xa0050014, + 0x5000a000, + 0x28005000, + 0x14002800, + 0x1400280, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[38] = +{ + 0x0, + 0x0, + 0x0, + 0x1de0, + 0x2200000, + 0x3bc, + 0x0, + 0x0, + 0xef000, + 0xf01de000, + 0x780ef00e, + 0xbc077807, + 0x3bc07783, + 0x3bc07780, + 0x1de03bc0, + 0xef01de0, + 0xef01de, + 0xef01de, + 0x80ef00ef, + 0x780ef077, + 0x78000007, + 0xbc03bc07, + 0xde01de03, + 0x1de0ef01, + 0x880ef0, + 0x1de03bc, + 0xef01de, + 0xf07780ef, + 0xf007780e, + 0x7807780e, + 0xbc03bc07, + 0x3bc1de03, + 0x7781de0, + 0x80ef00ef, + 0xc0778077, + 0xe03bc03b, + 0xde03bc1d, + 0x1, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x40000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[38] = +{ + 0x0, + 0x0, + 0x0, + 0x2000, + 0x0, + 0x400, + 0x0, + 0x0, + 0x100000, + 0x200000, + 0x100010, + 0x80008, + 0x40008004, + 0x40008000, + 0x20004000, + 0x10002000, + 0x1000200, + 0x1000200, + 0x1000100, + 0x100080, + 0x8, + 0x40008, + 0x20004, + 0x20010002, + 0x1000, + 0x2000400, + 0x1000200, + 0x800100, + 0x80010, + 0x80010, + 0x40008, + 0x40020004, + 0x8002000, + 0x1000100, + 0x800080, + 0x400040, + 0x40020, + 0x2, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[37] = +{ + 0x0, + 0x0, + 0x0, + 0x810, + 0x0, + 0x102, + 0x0, + 0x0, + 0x40800, + 0x8081000, + 0x4040804, + 0x2020402, + 0x10202041, + 0x10202040, + 0x8101020, + 0x4080810, + 0x408081, + 0x80408081, + 0x40408040, + 0x4040820, + 0x4000002, + 0x2010202, + 0x81008101, + 0x8104080, + 0x408, + 0x810102, + 0x80408081, + 0x8204040, + 0x8020404, + 0x4020404, + 0x2010202, + 0x10208101, + 0x82040810, + 0x40408040, + 0x20204020, + 0x10102010, + 0x81010208, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[38] = +{ + 0x0, + 0x0, + 0x0, + 0x1000, + 0x0, + 0x200, + 0x0, + 0x0, + 0x80000, + 0x100000, + 0x80008, + 0x40004, + 0x20004002, + 0x20004000, + 0x10002000, + 0x8001000, + 0x800100, + 0x800100, + 0x800080, + 0x80040, + 0x4, + 0x20004, + 0x10002, + 0x10008001, + 0x800, + 0x1000200, + 0x800100, + 0x400080, + 0x40008, + 0x40008, + 0x20004, + 0x20010002, + 0x4001000, + 0x800080, + 0x400040, + 0x200020, + 0x20010, + 0x1, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x800, + 0x0, + 0x200, + 0x1efb00, + 0x10, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xdfefbe00, + 0xeff7dff7, + 0xf7fbeffb, + 0xdf7fbefd, + 0x3, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7bef0000, + 0x0, + 0x0, + 0x0, + 0x1efbc00, + 0x0, + 0x0, + 0x7de00000, + 0xf, + 0x0, + 0x0, + 0xc0000000, + 0x1efb, + 0x0, + 0x0, + 0x0, + 0xf7de0, + 0x0, + 0x0, + 0x80000000, + 0x3df7, + 0x0, + 0x0, + 0x0, + 0xdf780000, + 0x3, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = +{ + 0x4, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = +{ + 0x8, +}; + + +static bcmpkt_rxpmd_match_id_db_t +bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_CNTAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x18, + .match_mask = 0x418, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x10000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x4, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x38, + .match_mask = 0x438, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", + .match = 0x18000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x6, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x810, + .match_mask = 0x3c18, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x18, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x10000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x38, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", + .match = 0x18000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x810, + .match_mask = 0x3c18, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_CNTAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 19, + .arc_id_mask = 0xf80000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 19, + .arc_id_mask = 0xf80000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 19, + .arc_id_mask = 0xf80000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 19, + .arc_id_mask = 0xf80000, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 19, + .arc_id_mask = 0xf80000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 19, + .arc_id_mask = 0xf80000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 32, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 45, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 35, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 45, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 45, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 24, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 46, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 46, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 42, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 46, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 24, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 44, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 24, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_CNTAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 13, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 34, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 17, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 35, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 35, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 35, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x18, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x10000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x38, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 25, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 25, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 25, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 10, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 10, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 33, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", + .match = 0x18000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 33, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x810, + .match_mask = 0x3c18, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_sys_hdr_loopback, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db_info = { + .num_entries = 223, + .db = bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db_info_get(void) { + return &bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map_info = { + .num_entries = 223, + .map = bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map_info_get(void) { + return &bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c new file mode 100644 index 000000000000..7ef51b03e9c3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c @@ -0,0 +1,10552 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56690_a0 and variant dna_6_5_29_0_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[13] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[13] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[13] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[13] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[13] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[13] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[13] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[13] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DEFAULT); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SRV6); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[13] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[13] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[13] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[13] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[13] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[13] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[13] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[13] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[13] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[13] |= (0x1 << 31); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SRV6)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { + reason[12] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_data[] = { + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 288, 303 }, /* Profile 13. */ + { 320, 335 }, /* Profile 14. */ + { 320, 335 }, /* Profile 15. */ + { 320, 335 }, /* Profile 16. */ + { 288, 303 }, /* Profile 17. */ + { 320, 335 }, /* Profile 18. */ + { 320, 335 }, /* Profile 19. */ + { 320, 335 }, /* Profile 20. */ + { 288, 303 }, /* Profile 21. */ + { 320, 335 }, /* Profile 22. */ + { 320, 335 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { 288, 303 }, /* Profile 35. */ + { 320, 335 }, /* Profile 36. */ + { 320, 335 }, /* Profile 37. */ + { 320, 335 }, /* Profile 38. */ + { 288, 303 }, /* Profile 39. */ + { 320, 335 }, /* Profile 40. */ + { 320, 335 }, /* Profile 41. */ + { 320, 335 }, /* Profile 42. */ + { 288, 303 }, /* Profile 43. */ + { 320, 335 }, /* Profile 44. */ + { 320, 335 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "DNAT_CTRL_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 368, 371 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 368, 371 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { 368, 371 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 368, 371 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 368, 371 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { 368, 371 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { 368, 371 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { 368, 371 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { 368, 371 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { 368, 371 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { 368, 371 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { 368, 371 }, /* Profile 44. */ + }, + .profile_cnt = 45, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 48, 63 }, /* Profile 10. */ + { 48, 63 }, /* Profile 11. */ + { 48, 63 }, /* Profile 12. */ + { 48, 63 }, /* Profile 13. */ + { 48, 63 }, /* Profile 14. */ + { 48, 63 }, /* Profile 15. */ + { 48, 63 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { 48, 63 }, /* Profile 21. */ + { 48, 63 }, /* Profile 22. */ + { 48, 63 }, /* Profile 23. */ + { 48, 63 }, /* Profile 24. */ + { 48, 63 }, /* Profile 25. */ + { 48, 63 }, /* Profile 26. */ + { 48, 63 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { 48, 63 }, /* Profile 32. */ + { 48, 63 }, /* Profile 33. */ + { 48, 63 }, /* Profile 34. */ + { 48, 63 }, /* Profile 35. */ + { 48, 63 }, /* Profile 36. */ + { 48, 63 }, /* Profile 37. */ + { 48, 63 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { 48, 63 }, /* Profile 43. */ + { 48, 63 }, /* Profile 44. */ + { 48, 63 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "DVP_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 191 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 208, 223 }, /* Profile 5. */ + { 176, 191 }, /* Profile 6. */ + { 176, 191 }, /* Profile 7. */ + { 208, 223 }, /* Profile 8. */ + { 208, 223 }, /* Profile 9. */ + { 176, 191 }, /* Profile 10. */ + { 176, 191 }, /* Profile 11. */ + { 208, 223 }, /* Profile 12. */ + { 176, 191 }, /* Profile 13. */ + { 176, 191 }, /* Profile 14. */ + { 208, 223 }, /* Profile 15. */ + { 208, 223 }, /* Profile 16. */ + { 176, 191 }, /* Profile 17. */ + { 176, 191 }, /* Profile 18. */ + { 208, 223 }, /* Profile 19. */ + { 208, 223 }, /* Profile 20. */ + { 176, 191 }, /* Profile 21. */ + { 176, 191 }, /* Profile 22. */ + { 208, 223 }, /* Profile 23. */ + { 192, 207 }, /* Profile 24. */ + { 192, 207 }, /* Profile 25. */ + { 224, 239 }, /* Profile 26. */ + { 224, 239 }, /* Profile 27. */ + { 192, 207 }, /* Profile 28. */ + { 192, 207 }, /* Profile 29. */ + { 224, 239 }, /* Profile 30. */ + { 224, 239 }, /* Profile 31. */ + { 192, 207 }, /* Profile 32. */ + { 192, 207 }, /* Profile 33. */ + { 224, 239 }, /* Profile 34. */ + { 192, 207 }, /* Profile 35. */ + { 192, 207 }, /* Profile 36. */ + { 224, 239 }, /* Profile 37. */ + { 224, 239 }, /* Profile 38. */ + { 192, 207 }, /* Profile 39. */ + { 192, 207 }, /* Profile 40. */ + { 224, 239 }, /* Profile 41. */ + { 224, 239 }, /* Profile 42. */ + { 192, 207 }, /* Profile 43. */ + { 192, 207 }, /* Profile 44. */ + { 224, 239 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "EFFECTIVE_TTL_AND_SNAT_CTRL_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + { 144, 159 }, /* Profile 6. */ + { 144, 159 }, /* Profile 7. */ + { 176, 191 }, /* Profile 8. */ + { 176, 191 }, /* Profile 9. */ + { 144, 159 }, /* Profile 10. */ + { 144, 159 }, /* Profile 11. */ + { 176, 191 }, /* Profile 12. */ + { 144, 159 }, /* Profile 13. */ + { 144, 159 }, /* Profile 14. */ + { 176, 191 }, /* Profile 15. */ + { 176, 191 }, /* Profile 16. */ + { 144, 159 }, /* Profile 17. */ + { 144, 159 }, /* Profile 18. */ + { 176, 191 }, /* Profile 19. */ + { 176, 191 }, /* Profile 20. */ + { 144, 159 }, /* Profile 21. */ + { 144, 159 }, /* Profile 22. */ + { 176, 191 }, /* Profile 23. */ + { 160, 175 }, /* Profile 24. */ + { 160, 175 }, /* Profile 25. */ + { 192, 207 }, /* Profile 26. */ + { 192, 207 }, /* Profile 27. */ + { 160, 175 }, /* Profile 28. */ + { 160, 175 }, /* Profile 29. */ + { 192, 207 }, /* Profile 30. */ + { 192, 207 }, /* Profile 31. */ + { 160, 175 }, /* Profile 32. */ + { 160, 175 }, /* Profile 33. */ + { 192, 207 }, /* Profile 34. */ + { 160, 175 }, /* Profile 35. */ + { 160, 175 }, /* Profile 36. */ + { 192, 207 }, /* Profile 37. */ + { 192, 207 }, /* Profile 38. */ + { 160, 175 }, /* Profile 39. */ + { 160, 175 }, /* Profile 40. */ + { 192, 207 }, /* Profile 41. */ + { 192, 207 }, /* Profile 42. */ + { 160, 175 }, /* Profile 43. */ + { 160, 175 }, /* Profile 44. */ + { 192, 207 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + { 288, 303 }, /* Profile 6. */ + { 320, 335 }, /* Profile 7. */ + { 320, 335 }, /* Profile 8. */ + { 320, 335 }, /* Profile 9. */ + { 288, 303 }, /* Profile 10. */ + { 320, 335 }, /* Profile 11. */ + { 320, 335 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 288, 303 }, /* Profile 24. */ + { 320, 335 }, /* Profile 25. */ + { 320, 335 }, /* Profile 26. */ + { 320, 335 }, /* Profile 27. */ + { 288, 303 }, /* Profile 28. */ + { 320, 335 }, /* Profile 29. */ + { 320, 335 }, /* Profile 30. */ + { 320, 335 }, /* Profile 31. */ + { 288, 303 }, /* Profile 32. */ + { 320, 335 }, /* Profile 33. */ + { 320, 335 }, /* Profile 34. */ + }, + .profile_cnt = 35, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 372, 375 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 380, 383 }, /* Profile 4. */ + { 380, 383 }, /* Profile 5. */ + { 372, 375 }, /* Profile 6. */ + { 384, 387 }, /* Profile 7. */ + { 380, 383 }, /* Profile 8. */ + { 380, 383 }, /* Profile 9. */ + { 372, 375 }, /* Profile 10. */ + { 384, 387 }, /* Profile 11. */ + { 380, 383 }, /* Profile 12. */ + { 372, 375 }, /* Profile 13. */ + { 384, 387 }, /* Profile 14. */ + { 380, 383 }, /* Profile 15. */ + { 380, 383 }, /* Profile 16. */ + { 372, 375 }, /* Profile 17. */ + { 384, 387 }, /* Profile 18. */ + { 380, 383 }, /* Profile 19. */ + { 380, 383 }, /* Profile 20. */ + { 372, 375 }, /* Profile 21. */ + { 384, 387 }, /* Profile 22. */ + { 380, 383 }, /* Profile 23. */ + { 372, 375 }, /* Profile 24. */ + { 384, 387 }, /* Profile 25. */ + { 380, 383 }, /* Profile 26. */ + { 380, 383 }, /* Profile 27. */ + { 372, 375 }, /* Profile 28. */ + { 384, 387 }, /* Profile 29. */ + { 380, 383 }, /* Profile 30. */ + { 380, 383 }, /* Profile 31. */ + { 372, 375 }, /* Profile 32. */ + { 384, 387 }, /* Profile 33. */ + { 380, 383 }, /* Profile 34. */ + { 372, 375 }, /* Profile 35. */ + { 384, 387 }, /* Profile 36. */ + { 380, 383 }, /* Profile 37. */ + { 380, 383 }, /* Profile 38. */ + { 372, 375 }, /* Profile 39. */ + { 384, 387 }, /* Profile 40. */ + { 380, 383 }, /* Profile 41. */ + { 380, 383 }, /* Profile 42. */ + { 372, 375 }, /* Profile 43. */ + { 384, 387 }, /* Profile 44. */ + { 380, 383 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 80, 95 }, /* Profile 2. */ + { 80, 95 }, /* Profile 3. */ + { 80, 95 }, /* Profile 4. */ + { 80, 95 }, /* Profile 5. */ + { 80, 95 }, /* Profile 6. */ + { 80, 95 }, /* Profile 7. */ + { 80, 95 }, /* Profile 8. */ + { 80, 95 }, /* Profile 9. */ + { 80, 95 }, /* Profile 10. */ + { 80, 95 }, /* Profile 11. */ + { 80, 95 }, /* Profile 12. */ + { 80, 95 }, /* Profile 13. */ + { 80, 95 }, /* Profile 14. */ + { 80, 95 }, /* Profile 15. */ + { 80, 95 }, /* Profile 16. */ + { 80, 95 }, /* Profile 17. */ + { 80, 95 }, /* Profile 18. */ + { 80, 95 }, /* Profile 19. */ + { 80, 95 }, /* Profile 20. */ + { 80, 95 }, /* Profile 21. */ + { 80, 95 }, /* Profile 22. */ + { 80, 95 }, /* Profile 23. */ + { 80, 95 }, /* Profile 24. */ + { 80, 95 }, /* Profile 25. */ + { 80, 95 }, /* Profile 26. */ + { 80, 95 }, /* Profile 27. */ + { 80, 95 }, /* Profile 28. */ + { 80, 95 }, /* Profile 29. */ + { 80, 95 }, /* Profile 30. */ + { 80, 95 }, /* Profile 31. */ + { 80, 95 }, /* Profile 32. */ + { 80, 95 }, /* Profile 33. */ + { 80, 95 }, /* Profile 34. */ + { 80, 95 }, /* Profile 35. */ + { 80, 95 }, /* Profile 36. */ + { 80, 95 }, /* Profile 37. */ + { 80, 95 }, /* Profile 38. */ + { 80, 95 }, /* Profile 39. */ + { 80, 95 }, /* Profile 40. */ + { 80, 95 }, /* Profile 41. */ + { 80, 95 }, /* Profile 42. */ + { 80, 95 }, /* Profile 43. */ + { 80, 95 }, /* Profile 44. */ + { 80, 95 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + { 48, 63 }, /* Profile 8. */ + { 48, 63 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { 48, 63 }, /* Profile 17. */ + { 48, 63 }, /* Profile 18. */ + { 48, 63 }, /* Profile 19. */ + { 48, 63 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { 48, 63 }, /* Profile 28. */ + { 48, 63 }, /* Profile 29. */ + { 48, 63 }, /* Profile 30. */ + { 48, 63 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { 48, 63 }, /* Profile 39. */ + { 48, 63 }, /* Profile 40. */ + { 48, 63 }, /* Profile 41. */ + { 48, 63 }, /* Profile 42. */ + }, + .profile_cnt = 43, + }, + { + .name = "EP_NIH_HDR_RECIRC_CODE_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 376, 379 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + { 376, 379 }, /* Profile 6. */ + { 388, 391 }, /* Profile 7. */ + { 384, 387 }, /* Profile 8. */ + { 384, 387 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 376, 379 }, /* Profile 13. */ + { 388, 391 }, /* Profile 14. */ + { 384, 387 }, /* Profile 15. */ + { 384, 387 }, /* Profile 16. */ + { 376, 379 }, /* Profile 17. */ + { 388, 391 }, /* Profile 18. */ + { 384, 387 }, /* Profile 19. */ + { 384, 387 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 376, 379 }, /* Profile 24. */ + { 388, 391 }, /* Profile 25. */ + { 384, 387 }, /* Profile 26. */ + { 384, 387 }, /* Profile 27. */ + { 376, 379 }, /* Profile 28. */ + { 388, 391 }, /* Profile 29. */ + { 384, 387 }, /* Profile 30. */ + { 384, 387 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { 376, 379 }, /* Profile 35. */ + { 388, 391 }, /* Profile 36. */ + { 384, 387 }, /* Profile 37. */ + { 384, 387 }, /* Profile 38. */ + { 376, 379 }, /* Profile 39. */ + { 388, 391 }, /* Profile 40. */ + { 384, 387 }, /* Profile 41. */ + { 384, 387 }, /* Profile 42. */ + }, + .profile_cnt = 43, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 144, 159 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { 144, 159 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 144, 159 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { 160, 175 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { 160, 175 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { 160, 175 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { 160, 175 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 160, 175 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { 160, 175 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 160, 175 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { 176, 191 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { 176, 191 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { 176, 191 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { 176, 191 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "EVENT_TRACE_VECTOR_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + { 0, 15 }, /* Profile 5. */ + { 0, 15 }, /* Profile 6. */ + { 0, 15 }, /* Profile 7. */ + { 0, 15 }, /* Profile 8. */ + { 0, 15 }, /* Profile 9. */ + { 0, 15 }, /* Profile 10. */ + { 0, 15 }, /* Profile 11. */ + { 0, 15 }, /* Profile 12. */ + { 0, 15 }, /* Profile 13. */ + { 0, 15 }, /* Profile 14. */ + { 0, 15 }, /* Profile 15. */ + { 0, 15 }, /* Profile 16. */ + { 0, 15 }, /* Profile 17. */ + { 0, 15 }, /* Profile 18. */ + { 0, 15 }, /* Profile 19. */ + { 0, 15 }, /* Profile 20. */ + { 0, 15 }, /* Profile 21. */ + { 0, 15 }, /* Profile 22. */ + { 0, 15 }, /* Profile 23. */ + { 0, 15 }, /* Profile 24. */ + { 0, 15 }, /* Profile 25. */ + { 0, 15 }, /* Profile 26. */ + { 0, 15 }, /* Profile 27. */ + { 0, 15 }, /* Profile 28. */ + { 0, 15 }, /* Profile 29. */ + { 0, 15 }, /* Profile 30. */ + { 0, 15 }, /* Profile 31. */ + { 0, 15 }, /* Profile 32. */ + { 0, 15 }, /* Profile 33. */ + { 0, 15 }, /* Profile 34. */ + { 0, 15 }, /* Profile 35. */ + { 0, 15 }, /* Profile 36. */ + { 0, 15 }, /* Profile 37. */ + { 0, 15 }, /* Profile 38. */ + { 0, 15 }, /* Profile 39. */ + { 0, 15 }, /* Profile 40. */ + { 0, 15 }, /* Profile 41. */ + { 0, 15 }, /* Profile 42. */ + { 0, 15 }, /* Profile 43. */ + { 0, 15 }, /* Profile 44. */ + { 0, 15 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "EVENT_TRACE_VECTOR_31_16", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 16, 31 }, /* Profile 2. */ + { 16, 31 }, /* Profile 3. */ + { 16, 31 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35. */ + { 16, 31 }, /* Profile 36. */ + { 16, 31 }, /* Profile 37. */ + { 16, 31 }, /* Profile 38. */ + { 16, 31 }, /* Profile 39. */ + { 16, 31 }, /* Profile 40. */ + { 16, 31 }, /* Profile 41. */ + { 16, 31 }, /* Profile 42. */ + { 16, 31 }, /* Profile 43. */ + { 16, 31 }, /* Profile 44. */ + { 16, 31 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + { 32, 47 }, /* Profile 6. */ + { 32, 47 }, /* Profile 7. */ + { 32, 47 }, /* Profile 8. */ + { 32, 47 }, /* Profile 9. */ + { 32, 47 }, /* Profile 10. */ + { 32, 47 }, /* Profile 11. */ + { 32, 47 }, /* Profile 12. */ + { 32, 47 }, /* Profile 13. */ + { 32, 47 }, /* Profile 14. */ + { 32, 47 }, /* Profile 15. */ + { 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"I2E_CLASS_ID_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 224, 239 }, /* Profile 4. */ + { 224, 239 }, /* Profile 5. */ + { 192, 207 }, /* Profile 6. */ + { 192, 207 }, /* Profile 7. */ + { 224, 239 }, /* Profile 8. */ + { 224, 239 }, /* Profile 9. */ + { 192, 207 }, /* Profile 10. */ + { 192, 207 }, /* Profile 11. */ + { 224, 239 }, /* Profile 12. */ + { 192, 207 }, /* Profile 13. */ + { 192, 207 }, /* Profile 14. */ + { 224, 239 }, /* Profile 15. */ + { 224, 239 }, /* Profile 16. */ + { 192, 207 }, /* Profile 17. */ + { 192, 207 }, /* Profile 18. */ + { 224, 239 }, /* Profile 19. */ + { 224, 239 }, /* Profile 20. */ + { 192, 207 }, /* Profile 21. */ + { 192, 207 }, /* Profile 22. */ + { 224, 239 }, /* Profile 23. */ + { 208, 223 }, /* Profile 24. */ + { 208, 223 }, /* Profile 25. */ + { 240, 255 }, /* Profile 26. */ + { 240, 255 }, /* Profile 27. */ + { 208, 223 }, /* Profile 28. */ + { 208, 223 }, /* Profile 29. */ + { 240, 255 }, /* Profile 30. */ + { 240, 255 }, /* Profile 31. */ + { 208, 223 }, /* Profile 32. */ + { 208, 223 }, /* Profile 33. */ + { 240, 255 }, /* Profile 34. */ + { 208, 223 }, /* Profile 35. */ + { 208, 223 }, /* Profile 36. */ + { 240, 255 }, /* Profile 37. */ + { 240, 255 }, /* Profile 38. */ + { 208, 223 }, /* Profile 39. */ + { 208, 223 }, /* Profile 40. */ + { 240, 255 }, /* Profile 41. */ + { 240, 255 }, /* Profile 42. */ + { 208, 223 }, /* Profile 43. */ + { 208, 223 }, /* Profile 44. */ + { 240, 255 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "IFP_IOAM_GBP_ACTION_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 371 }, /* Profile 2. */ + { 380, 383 }, /* Profile 3. */ + { 376, 379 }, /* Profile 4. */ + { 376, 379 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*/ + { 368, 371 }, /* Profile 35. */ + { 380, 383 }, /* Profile 36. */ + { 376, 379 }, /* Profile 37. */ + { 376, 379 }, /* Profile 38. */ + { 368, 371 }, /* Profile 39. */ + { 380, 383 }, /* Profile 40. */ + { 376, 379 }, /* Profile 41. */ + { 376, 379 }, /* Profile 42. */ + { 368, 371 }, /* Profile 43. */ + { 380, 383 }, /* Profile 44. */ + { 376, 379 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + { 392, 395 }, /* Profile 6. */ + { 404, 407 }, /* Profile 7. */ + { 400, 403 }, /* Profile 8. */ + { 400, 403 }, /* Profile 9. */ + { 388, 391 }, /* Profile 10. */ + { 400, 403 }, /* Profile 11. */ + { 396, 399 }, /* Profile 12. */ + { 392, 395 }, /* Profile 13. */ + { 404, 407 }, /* Profile 14. */ + { 400, 403 }, /* Profile 15. */ + { 400, 403 }, /* Profile 16. */ + { 392, 395 }, /* Profile 17. */ + { 404, 407 }, /* Profile 18. */ + { 400, 403 }, /* Profile 19. */ + { 400, 403 }, /* Profile 20. */ + { 388, 391 }, /* Profile 21. */ + { 400, 403 }, /* Profile 22. */ + { 396, 399 }, /* Profile 23. */ + { 392, 395 }, /* Profile 24. */ + { 404, 407 }, /* Profile 25. */ + { 400, 403 }, /* Profile 26. */ + { 400, 403 }, /* Profile 27. */ + { 392, 395 }, /* Profile 28. */ + { 404, 407 }, /* Profile 29. */ + { 400, 403 }, /* Profile 30. */ + { 400, 403 }, /* Profile 31. */ + { 388, 391 }, /* Profile 32. */ + { 400, 403 }, /* Profile 33. */ + { 396, 399 }, /* Profile 34. */ + { 392, 395 }, /* Profile 35. */ + { 404, 407 }, /* Profile 36. */ + { 400, 403 }, /* Profile 37. */ + { 400, 403 }, /* Profile 38. */ + { 392, 395 }, /* Profile 39. */ + { 404, 407 }, /* Profile 40. */ + { 400, 403 }, /* Profile 41. */ + { 400, 403 }, /* Profile 42. */ + { 388, 391 }, /* Profile 43. */ + { 400, 403 }, /* Profile 44. */ + { 396, 399 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "ING_TIMESTAMP_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 144, 159 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 144, 159 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 144, 159 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { 144, 159 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { 144, 159 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { 160, 175 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { 160, 175 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { 160, 175 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { 160, 175 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { 160, 175 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { 160, 175 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "ING_TIMESTAMP_31_16", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 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+ { 272, 278 }, /* Profile 43. */ + { 304, 310 }, /* Profile 44. */ + { 304, 310 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 239 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 256, 271 }, /* Profile 4. */ + { 256, 271 }, /* Profile 5. */ + { 224, 239 }, /* Profile 6. */ + { 224, 239 }, /* Profile 7. */ + { 256, 271 }, /* Profile 8. */ + { 256, 271 }, /* Profile 9. */ + { 224, 239 }, /* Profile 10. */ + { 224, 239 }, /* Profile 11. */ + { 256, 271 }, /* Profile 12. */ + { 224, 239 }, /* Profile 13. */ + { 224, 239 }, /* Profile 14. */ + { 256, 271 }, /* Profile 15. */ + { 256, 271 }, /* Profile 16. */ + { 224, 239 }, /* Profile 17. */ + { 224, 239 }, /* Profile 18. */ + { 256, 271 }, /* Profile 19. */ + { 256, 271 }, /* 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BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 416, 419 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + { 404, 407 }, /* Profile 6. */ + { 416, 419 }, /* Profile 7. */ + { 412, 415 }, /* Profile 8. */ + { 412, 415 }, /* Profile 9. */ + { 400, 403 }, /* Profile 10. */ + { 412, 415 }, /* Profile 11. */ + { 408, 411 }, /* Profile 12. */ + { 404, 407 }, /* Profile 13. */ + { 416, 419 }, /* Profile 14. */ + { 412, 415 }, /* Profile 15. */ + { 412, 415 }, /* Profile 16. */ + { 404, 407 }, /* Profile 17. */ + { 416, 419 }, /* Profile 18. */ + { 412, 415 }, /* Profile 19. */ + { 412, 415 }, /* Profile 20. */ + { 400, 403 }, /* Profile 21. */ + { 412, 415 }, /* Profile 22. */ + { 408, 411 }, /* Profile 23. */ + { 404, 407 }, /* Profile 24. */ + { 416, 419 }, /* Profile 25. */ + { 412, 415 }, /* Profile 26. */ + { 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Profile 6. */ + { 372, 375 }, /* Profile 7. */ + { 368, 371 }, /* Profile 8. */ + { 368, 371 }, /* Profile 9. */ + { 352, 355 }, /* Profile 10. */ + { 372, 375 }, /* Profile 11. */ + { 368, 371 }, /* Profile 12. */ + { 352, 355 }, /* Profile 13. */ + { 372, 375 }, /* Profile 14. */ + { 368, 371 }, /* Profile 15. */ + { 368, 371 }, /* Profile 16. */ + { 352, 355 }, /* Profile 17. */ + { 372, 375 }, /* Profile 18. */ + { 368, 371 }, /* Profile 19. */ + { 368, 371 }, /* Profile 20. */ + { 352, 355 }, /* Profile 21. */ + { 372, 375 }, /* Profile 22. */ + { 368, 371 }, /* Profile 23. */ + { 352, 355 }, /* Profile 24. */ + { 372, 375 }, /* Profile 25. */ + { 368, 371 }, /* Profile 26. */ + { 368, 371 }, /* Profile 27. */ + { 352, 355 }, /* Profile 28. */ + { 372, 375 }, /* Profile 29. */ + { 368, 371 }, /* Profile 30. */ + { 368, 371 }, /* Profile 31. */ + { 352, 355 }, /* Profile 32. */ + { 372, 375 }, /* Profile 33. */ + { 368, 371 }, /* Profile 34. */ + { 352, 355 }, /* Profile 35. */ + { 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= BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 272, 287 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { 272, 287 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 272, 287 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 272, 287 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { 272, 287 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { 272, 287 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* 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BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 256, 271 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 256, 271 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { 256, 271 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 256, 271 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 256, 271 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { 256, 271 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { 256, 271 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* 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+ }, + .profile_cnt = 46, + }, + { + .name = "NHOP_INDEX_1_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 319 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + { 336, 351 }, /* Profile 5. */ + { 304, 319 }, /* Profile 6. */ + { 336, 351 }, /* Profile 7. */ + { 336, 351 }, /* Profile 8. */ + { 336, 351 }, /* Profile 9. */ + { 304, 319 }, /* Profile 10. */ + { 336, 351 }, /* Profile 11. */ + { 336, 351 }, /* Profile 12. */ + { 304, 319 }, /* Profile 13. */ + { 336, 351 }, /* Profile 14. */ + { 336, 351 }, /* Profile 15. */ + { 336, 351 }, /* Profile 16. */ + { 304, 319 }, /* Profile 17. */ + { 336, 351 }, /* Profile 18. */ + { 336, 351 }, /* Profile 19. */ + { 336, 351 }, /* Profile 20. */ + { 304, 319 }, /* Profile 21. */ + { 336, 351 }, /* Profile 22. */ + { 336, 351 }, /* Profile 23. */ + { 304, 319 }, /* Profile 24. */ + { 336, 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+ { 404, 407 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 356, 359 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 356, 359 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 356, 359 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 356, 359 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { 356, 359 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { 356, 359 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 356, 359 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367 }, /* Profile 42. */ + { 320, 335 }, /* Profile 43. */ + { 352, 367 }, /* Profile 44. */ + { 352, 367 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 380, 383 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + { 380, 383 }, /* Profile 6. */ + { 392, 395 }, /* Profile 7. */ + { 388, 391 }, /* Profile 8. */ + { 388, 391 }, /* Profile 9. */ + { 376, 379 }, /* Profile 10. */ + { 388, 391 }, /* Profile 11. */ + { 384, 387 }, /* Profile 12. */ + { 380, 383 }, /* Profile 13. */ + { 392, 395 }, /* Profile 14. */ + { 388, 391 }, /* Profile 15. */ + { 388, 391 }, /* Profile 16. */ + { 380, 383 }, /* Profile 17. */ + { 392, 395 }, /* Profile 18. */ + { 388, 391 }, /* Profile 19. */ + { 388, 391 }, /* Profile 20. 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BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + { 384, 387 }, /* Profile 6. */ + { 396, 399 }, /* Profile 7. */ + { 392, 395 }, /* Profile 8. */ + { 392, 395 }, /* Profile 9. */ + { 380, 383 }, /* Profile 10. */ + { 392, 395 }, /* Profile 11. */ + { 388, 391 }, /* Profile 12. */ + { 384, 387 }, /* Profile 13. */ + { 396, 399 }, /* Profile 14. */ + { 392, 395 }, /* Profile 15. */ + { 392, 395 }, /* Profile 16. */ + { 384, 387 }, /* Profile 17. */ + { 396, 399 }, /* Profile 18. */ + { 392, 395 }, /* Profile 19. */ + { 392, 395 }, /* Profile 20. */ + { 380, 383 }, /* Profile 21. */ + { 392, 395 }, /* Profile 22. */ + { 388, 391 }, /* Profile 23. */ + { 384, 387 }, /* Profile 24. */ + { 396, 399 }, /* Profile 25. */ + { 392, 395 }, /* Profile 26. */ + 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404, 407 }, /* Profile 44. */ + { 400, 403 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 96, 111 }, /* Profile 7. */ + { 96, 111 }, /* Profile 8. */ + { 96, 111 }, /* Profile 9. */ + { 96, 111 }, /* Profile 10. */ + { 96, 111 }, /* Profile 11. */ + { 96, 111 }, /* Profile 12. */ + { 96, 111 }, /* Profile 13. */ + { 96, 111 }, /* Profile 14. */ + { 96, 111 }, /* Profile 15. */ + { 96, 111 }, /* Profile 16. */ + { 96, 111 }, /* Profile 17. */ + { 96, 111 }, /* Profile 18. */ + { 96, 111 }, /* Profile 19. */ + { 96, 111 }, /* Profile 20. */ + { 96, 111 }, /* Profile 21. */ + { 96, 111 }, /* Profile 22. */ + { 96, 111 }, /* Profile 23. */ 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Profile 42. */ + { 384, 387 }, /* Profile 43. */ + { 396, 399 }, /* Profile 44. */ + { 392, 395 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "VFI_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { 128, 143 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ + { 128, 143 }, /* Profile 8. */ + { 128, 143 }, /* Profile 9. */ + { 128, 143 }, /* Profile 10. */ + { 128, 143 }, /* Profile 11. */ + { 128, 143 }, /* Profile 12. */ + { 128, 143 }, /* Profile 13. */ + { 128, 143 }, /* Profile 14. */ + { 128, 143 }, /* Profile 15. */ + { 128, 143 }, /* Profile 16. */ + { 128, 143 }, /* Profile 17. */ + { 128, 143 }, /* Profile 18. */ + { 128, 143 }, /* Profile 19. */ + { 128, 143 }, /* Profile 20. */ + { 128, 143 }, /* Profile 21. */ + { 128, 143 }, /* Profile 22. */ + { 128, 143 }, /* Profile 23. */ + { 128, 143 }, /* Profile 24. */ + { 128, 143 }, /* Profile 25. */ + { 128, 143 }, /* Profile 26. */ + { 128, 143 }, /* Profile 27. */ + { 128, 143 }, /* Profile 28. */ + { 128, 143 }, /* Profile 29. */ + { 128, 143 }, /* Profile 30. */ + { 128, 143 }, /* Profile 31. */ + { 128, 143 }, /* Profile 32. */ + { 128, 143 }, /* Profile 33. */ + { 128, 143 }, /* Profile 34. */ + { 128, 143 }, /* Profile 35. */ + { 128, 143 }, /* Profile 36. */ + { 128, 143 }, /* Profile 37. */ + { 128, 143 }, /* Profile 38. */ + { 128, 143 }, /* Profile 39. */ + { 128, 143 }, /* Profile 40. */ + { 128, 143 }, /* Profile 41. */ + { 128, 143 }, /* Profile 42. */ + { 128, 143 }, /* Profile 43. */ + { 128, 143 }, /* Profile 44. */ + { 128, 143 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 360, 363 }, /* Profile 2. */ + { 376, 379 }, /* Profile 3. */ + { 372, 375 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + { 360, 363 }, /* Profile 6. */ + { 376, 379 }, /* Profile 7. */ + { 372, 375 }, /* Profile 8. */ + { 372, 375 }, /* Profile 9. */ + { 360, 363 }, /* Profile 10. */ + { 376, 379 }, /* Profile 11. */ + { 372, 375 }, /* Profile 12. */ + { 360, 363 }, /* Profile 13. */ + { 376, 379 }, /* Profile 14. */ + { 372, 375 }, /* Profile 15. */ + { 372, 375 }, /* Profile 16. */ + { 360, 363 }, /* Profile 17. */ + { 376, 379 }, /* Profile 18. */ + { 372, 375 }, /* Profile 19. */ + { 372, 375 }, /* Profile 20. */ + { 360, 363 }, /* Profile 21. */ + { 376, 379 }, /* Profile 22. */ + { 372, 375 }, /* Profile 23. */ + { 360, 363 }, /* Profile 24. */ + { 376, 379 }, /* Profile 25. */ + { 372, 375 }, /* Profile 26. */ + { 372, 375 }, /* Profile 27. */ + { 360, 363 }, /* Profile 28. */ + { 376, 379 }, /* Profile 29. */ + { 372, 375 }, /* Profile 30. */ + { 372, 375 }, /* Profile 31. */ + { 360, 363 }, /* Profile 32. */ + { 376, 379 }, /* Profile 33. */ + { 372, 375 }, /* Profile 34. */ + { 360, 363 }, /* Profile 35. */ + { 376, 379 }, /* Profile 36. */ + { 372, 375 }, /* Profile 37. */ + { 372, 375 }, /* Profile 38. */ + { 360, 363 }, /* Profile 39. */ + { 376, 379 }, /* Profile 40. */ + { 372, 375 }, /* Profile 41. */ + { 372, 375 }, /* Profile 42. */ + { 360, 363 }, /* Profile 43. */ + { 376, 379 }, /* Profile 44. */ + { 372, 375 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, +};static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_names[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reasons_info = { + .num_reasons = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_names, + .reason_encode = bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_encode, + .reason_decode = bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_arp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_arp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_arp_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_arp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_authen_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_authen_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_authen_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_authen_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_bfd_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_bfd_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_bfd_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_bfd_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_cntag_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_cntag_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_cntag_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_cntag_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_dest_option_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_dest_option_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_dest_option_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_dest_option_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_esp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_esp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_esp_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_esp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_esp_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ethertype_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ethertype_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ethertype_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ethertype_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_frag_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_frag_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_frag_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_frag_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_frag_t_field_data, +}; + + +static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { + bcmpkt_gbp_ethernet_shim_t_ethertype_get, + bcmpkt_gbp_ethernet_shim_t_flags_get, + bcmpkt_gbp_ethernet_shim_t_reserved_get, + bcmpkt_gbp_ethernet_shim_t_sid_get, + bcmpkt_gbp_ethernet_shim_t_subtype_get, + bcmpkt_gbp_ethernet_shim_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { + bcmpkt_gbp_ethernet_shim_t_ethertype_set, + bcmpkt_gbp_ethernet_shim_t_flags_set, + bcmpkt_gbp_ethernet_shim_t_reserved_set, + bcmpkt_gbp_ethernet_shim_t_sid_set, + bcmpkt_gbp_ethernet_shim_t_subtype_set, + bcmpkt_gbp_ethernet_shim_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_src_subport_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_src_subport_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_src_subport_num_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_src_subport_num_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gpe_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gpe_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gpe_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gpe_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_key_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_key_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_key_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_key_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_gre_t_field_data, +}; + + +static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 4, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 4, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 6, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 6, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 31, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 10); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 10, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 15, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 15, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 4); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 2, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_get, + bcmpkt_hg3_base_t_cng_get, + bcmpkt_hg3_base_t_entropy_get, + bcmpkt_hg3_base_t_ext_hdr_present_get, + bcmpkt_hg3_base_t_hg3_reserved_get, + bcmpkt_hg3_base_t_l3_routed_get, + bcmpkt_hg3_base_t_mirror_copy_get, + bcmpkt_hg3_base_t_reserved_etype_get, + bcmpkt_hg3_base_t_system_destination_get, + bcmpkt_hg3_base_t_system_destination_type_get, + bcmpkt_hg3_base_t_system_source_get, + bcmpkt_hg3_base_t_tc_get, + bcmpkt_hg3_base_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_set, + bcmpkt_hg3_base_t_cng_set, + bcmpkt_hg3_base_t_entropy_set, + bcmpkt_hg3_base_t_ext_hdr_present_set, + bcmpkt_hg3_base_t_hg3_reserved_set, + bcmpkt_hg3_base_t_l3_routed_set, + bcmpkt_hg3_base_t_mirror_copy_set, + bcmpkt_hg3_base_t_reserved_etype_set, + bcmpkt_hg3_base_t_system_destination_set, + bcmpkt_hg3_base_t_system_destination_type_set, + bcmpkt_hg3_base_t_system_source_set, + bcmpkt_hg3_base_t_tc_set, + bcmpkt_hg3_base_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_field_data, +}; + + +static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_lsb_get, + bcmpkt_hg3_extension_0_t_class_id_msb_get, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, + bcmpkt_hg3_extension_0_t_flags_get, + bcmpkt_hg3_extension_0_t_forwarding_domain_get, + bcmpkt_hg3_extension_0_t_svp_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_lsb_set, + bcmpkt_hg3_extension_0_t_class_id_msb_set, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, + bcmpkt_hg3_extension_0_t_flags_set, + bcmpkt_hg3_extension_0_t_forwarding_domain_set, + bcmpkt_hg3_extension_0_t_svp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_icmp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_icmp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_icmp_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_icmp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 24); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 2); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 2, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 6); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 6, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_get, + bcmpkt_ifa_flex_md_0_b_t_port_speed_get, + bcmpkt_ifa_flex_md_0_b_t_queue_id_get, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_set, + bcmpkt_ifa_flex_md_0_b_t_port_speed_set, + bcmpkt_ifa_flex_md_0_b_t_queue_id_set, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_get, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_set, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_get, + bcmpkt_ifa_md_base_t_hop_limit_current_length_get, + bcmpkt_ifa_md_base_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_set, + bcmpkt_ifa_md_base_t_hop_limit_current_length_set, + bcmpkt_ifa_md_base_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_get, + bcmpkt_ifa_metadata_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_t_metadata_get, + bcmpkt_ifa_metadata_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_set, + bcmpkt_ifa_metadata_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_t_metadata_set, + bcmpkt_ifa_metadata_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_igmp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_igmp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_igmp_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_igmp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_namespace_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_namespace_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT] = { + bcmpkt_ioam_e2e_t_ioam_e2e_data_get, + bcmpkt_ioam_e2e_t_ioam_e2e_type_get, + bcmpkt_ioam_e2e_t_ioam_hdr_len_get, + bcmpkt_ioam_e2e_t_namespace_id_get, + bcmpkt_ioam_e2e_t_next_protocol_get, + bcmpkt_ioam_e2e_t_reserved_get, + bcmpkt_ioam_e2e_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT] = { + bcmpkt_ioam_e2e_t_ioam_e2e_data_set, + bcmpkt_ioam_e2e_t_ioam_e2e_type_set, + bcmpkt_ioam_e2e_t_ioam_hdr_len_set, + bcmpkt_ioam_e2e_t_namespace_id_set, + bcmpkt_ioam_e2e_t_next_protocol_set, + bcmpkt_ioam_e2e_t_reserved_set, + bcmpkt_ioam_e2e_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ipfix_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ipfix_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ipv4_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ipv4_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ipv6_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ipv6_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_l2_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_l2_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_l2_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_l2_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mpls_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mpls_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mpls_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mpls_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_p_1588_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_p_1588_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_rarp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_rarp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rarp_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_rarp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_routing_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_routing_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_routing_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_routing_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_rspan_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_rspan_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rspan_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_rspan_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_rspan_t_field_data, +}; + + +static int32_t bcmpkt_segment_routing_srh_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_last_entry_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_last_entry_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { + bcmpkt_segment_routing_srh_t_flags_get, + bcmpkt_segment_routing_srh_t_hdr_ext_len_get, + bcmpkt_segment_routing_srh_t_last_entry_get, + bcmpkt_segment_routing_srh_t_next_header_get, + bcmpkt_segment_routing_srh_t_routing_type_get, + bcmpkt_segment_routing_srh_t_segments_left_get, + bcmpkt_segment_routing_srh_t_tag_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { + bcmpkt_segment_routing_srh_t_flags_set, + bcmpkt_segment_routing_srh_t_hdr_ext_len_set, + bcmpkt_segment_routing_srh_t_last_entry_set, + bcmpkt_segment_routing_srh_t_next_header_set, + bcmpkt_segment_routing_srh_t_routing_type_set, + bcmpkt_segment_routing_srh_t_segments_left_set, + bcmpkt_segment_routing_srh_t_tag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_field_data, +}; + + +static int32_t bcmpkt_segment_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_last_entry_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_last_entry_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_seg_list_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_seg_list_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { + bcmpkt_segment_routing_t_hdr_ext_len_get, + bcmpkt_segment_routing_t_last_entry_flags_get, + bcmpkt_segment_routing_t_next_header_get, + bcmpkt_segment_routing_t_routing_type_get, + bcmpkt_segment_routing_t_seg_list_get, + bcmpkt_segment_routing_t_segments_left_get, + bcmpkt_segment_routing_t_tag_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { + bcmpkt_segment_routing_t_hdr_ext_len_set, + bcmpkt_segment_routing_t_last_entry_flags_set, + bcmpkt_segment_routing_t_next_header_set, + bcmpkt_segment_routing_t_routing_type_set, + bcmpkt_segment_routing_t_seg_list_set, + bcmpkt_segment_routing_t_segments_left_set, + bcmpkt_segment_routing_t_tag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_std_segment_id_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_std_segment_id_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { + bcmpkt_std_segment_id_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { + bcmpkt_std_segment_id_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_udp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_udp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_udp_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_udp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, + bcmpkt_unknown_l5_t_l5_bytes_8_9_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, + bcmpkt_unknown_l5_t_l5_bytes_8_9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_vlan_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_vlan_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_vlan_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_vlan_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_vxlan_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_vxlan_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_vxlan_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_vxlan_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_wesp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_wesp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_wesp_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_wesp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56690_a0_dna_6_5_29_0_1_flexhdr_info_list[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_arp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_authen_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_bfd_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_cntag_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_dest_option_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_esp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ethertype_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_frag_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gpe_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_key_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_icmp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_igmp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_l2_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mpls_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_rarp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_routing_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_rspan_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_udp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_vlan_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_vxlan_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_wesp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_info, + .reasons_info = &bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56690_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56690_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56690_a0_dna_6_5_29_0_1_flexhdr_id_map[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56690_a0_dna_6_5_29_0_1_flexhdr_map_get(void) +{ + return bcm56690_a0_dna_6_5_29_0_1_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56690_a0_dna_6_5_29_0_1_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56690_a0_dna_6_5_29_0_1_flexhdr_info_list[hid]; +} + +int bcm56690_a0_dna_6_5_29_0_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 14, + 21, + 22, + 70, +}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..4f381c8b4034 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,1136 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_cna_6_5_30_2_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant cna_6_5_30_2_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 35, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 35, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 37, + .pminbit = 35, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 35, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 7, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 7, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 9, + .pminbit = 7, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 7, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info = { + .num_entries = 77, + .db = bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info_get(void) { + return &bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info = { + .num_entries = 77, + .map = bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info_get(void) { + return &bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_pkt_flexhdr.c new file mode 100644 index 000000000000..e0fd5d917d7c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_pkt_flexhdr.c @@ -0,0 +1,4021 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56780_a0 and variant cna_6_5_30_2_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_field_data[] = { + { + .name = "DROP_CODE_15_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "DVP_15_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + { 320, 335 }, /* Profile 6. */ + { 320, 335 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 135 }, /* Profile 2. */ + { 128, 135 }, /* Profile 3. */ + { 128, 135 }, /* Profile 4. */ + { 128, 135 }, /* Profile 5. */ + { 128, 135 }, /* Profile 6. */ + { 128, 135 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 416, 419 }, /* Profile 2. */ + { 416, 419 }, /* Profile 3. */ + { 416, 419 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + { 384, 387 }, /* Profile 6. */ + { 384, 387 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 175 }, /* Profile 2. */ + { 160, 175 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { 160, 175 }, /* Profile 5. */ + { 160, 175 }, /* Profile 6. */ + { 160, 175 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EP_NIH_HDR_DROP_CODE_15_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + }, + .profile_cnt = 7, + }, + { + .name = "EP_NIH_HDR_RECIRC_CODE_3_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 364, 367 }, /* Profile 5. */ + { 364, 367 }, /* Profile 6. */ + { 364, 367 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 271 }, /* Profile 2. */ + { 256, 271 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 240, 255 }, /* Profile 5. */ + { 240, 255 }, /* Profile 6. */ + }, + .profile_cnt = 7, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 287 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 256, 271 }, /* Profile 5. */ + { 256, 271 }, /* Profile 6. */ + }, + .profile_cnt = 7, + }, + { + .name = "ERSPAN3_GBP_SID_15_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + { 144, 159 }, /* Profile 6. */ + { 144, 159 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EVENT_TRACE_VECTOR_15_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + { 0, 15 }, /* Profile 5. */ + { 0, 15 }, /* Profile 6. */ + { 0, 15 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EVENT_TRACE_VECTOR_31_16", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 16, 31 }, /* Profile 2. */ + { 16, 31 }, /* Profile 3. */ + { 16, 31 }, /* Profile 4. */ + { 16, 31 }, /* Profile 5. */ + { 16, 31 }, /* Profile 6. */ + { 16, 31 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + { 32, 47 }, /* Profile 6. */ + { 32, 47 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 304, 319 }, /* Profile 5. */ + { 304, 319 }, /* Profile 6. */ + { 304, 319 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ING_TIMESTAMP_15_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 256, 271 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 240, 255 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ING_TIMESTAMP_31_16", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 272, 287 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 256, 271 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "INGRESS_PP_PORT_7_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 247 }, /* Profile 2. */ + { 240, 247 }, /* Profile 3. */ + { 240, 247 }, /* Profile 4. */ + { 224, 231 }, /* Profile 5. */ + { 224, 231 }, /* Profile 6. */ + { 224, 231 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 191 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + { 176, 191 }, /* Profile 6. */ + { 176, 191 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + { 372, 375 }, /* Profile 6. */ + { 372, 375 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 360, 363 }, /* Profile 5. */ + { 360, 363 }, /* Profile 6. */ + { 360, 363 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 314 }, /* Profile 2. */ + { 304, 314 }, /* Profile 3. */ + { 304, 314 }, /* Profile 4. */ + { 288, 298 }, /* Profile 5. */ + { 288, 298 }, /* Profile 6. */ + { 288, 298 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 218 }, /* Profile 2. */ + { 208, 218 }, /* Profile 3. */ + { 208, 218 }, /* Profile 4. */ + { 208, 218 }, /* Profile 5. */ + { 208, 218 }, /* Profile 6. */ + { 208, 218 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L2_TUNNEL_SVP_15_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 272, 287 }, /* Profile 5. */ + { 272, 287 }, /* Profile 6. */ + { 272, 287 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 365 }, /* Profile 2. */ + { 352, 365 }, /* Profile 3. */ + { 352, 365 }, /* Profile 4. */ + { 336, 349 }, /* Profile 5. */ + { 336, 349 }, /* Profile 6. */ + { 336, 349 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 237 }, /* Profile 2. */ + { 224, 237 }, /* Profile 3. */ + { 224, 237 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 80, 94 }, /* Profile 2. */ + { 80, 94 }, /* Profile 3. */ + { 80, 94 }, /* Profile 4. */ + { 80, 94 }, /* Profile 5. */ + { 80, 94 }, /* Profile 6. */ + { 80, 94 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "NHOP_INDEX_1_14_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 382 }, /* Profile 2. */ + { 368, 382 }, /* Profile 3. */ + { 368, 382 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 79 }, /* Profile 2. */ + { 64, 79 }, /* Profile 3. */ + { 64, 79 }, /* Profile 4. */ + { 64, 79 }, /* Profile 5. */ + { 64, 79 }, /* Profile 6. */ + { 64, 79 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 368, 371 }, /* Profile 5. */ + { 368, 371 }, /* Profile 6. */ + { 368, 371 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 352, 355 }, /* Profile 5. */ + { 352, 355 }, /* Profile 6. */ + { 352, 355 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + { 112, 127 }, /* Profile 6. */ + { 112, 127 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 380, 383 }, /* Profile 5. */ + { 380, 383 }, /* Profile 6. */ + { 380, 383 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 96, 111 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "TAG_ACTION_CTRL_1_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 409 }, /* Profile 2. */ + { 408, 409 }, /* Profile 3. */ + { 408, 409 }, /* Profile 4. */ + { 376, 377 }, /* Profile 5. */ + { 376, 377 }, /* Profile 6. */ + { 376, 377 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 356, 359 }, /* Profile 5. */ + { 356, 359 }, /* Profile 6. */ + { 356, 359 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "VFI_15_0", + .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + { 192, 207 }, /* Profile 6. */ + { 192, 207 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, +};static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_names[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_names, + .reason_encode = bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_arp_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_arp_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_arp_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_arp_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ethertype_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ethertype_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_ethertype_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_ethertype_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_icmp_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_icmp_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_icmp_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_icmp_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ipfix_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ipfix_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_ipfix_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_ipfix_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ipv4_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ipv4_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_ipv4_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_ipv4_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ipv6_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ipv6_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_ipv6_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_ipv6_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_l2_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_l2_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_l2_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_l2_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get, + bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set, + bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_rarp_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_rarp_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_rarp_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_rarp_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_udp_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_udp_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_udp_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_udp_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_vlan_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_vlan_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_vlan_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_vlan_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_vxlan_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_vxlan_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_vxlan_t_field_data[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_vxlan_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_30_2_0_vxlan_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56780_a0_cna_6_5_30_2_0_flexhdr_info_list[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_arp_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_ethertype_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_icmp_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_ipfix_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_ipv4_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_ipv6_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_l2_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_rarp_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_udp_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_vlan_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_30_2_0_vxlan_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_30_2_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_field_info, + .reasons_info = &bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56780_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56780_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56780_a0_cna_6_5_30_2_0_flexhdr_id_map[] = { + BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56780_a0_cna_6_5_30_2_0_flexhdr_map_get(void) +{ + return bcm56780_a0_cna_6_5_30_2_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56780_a0_cna_6_5_30_2_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56780_a0_cna_6_5_30_2_0_flexhdr_info_list[hid]; +} + +int bcm56780_a0_cna_6_5_30_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 7, + -1, + -1, + 27, +}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..da2f4202ced8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,2564 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_dna_6_5_30_2_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant dna_6_5_30_2_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", + .match = 0x22, + .match_mask = 0x22, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_SVTAG", + .match = 0x20, + .match_mask = 0x22, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", + .match = 0x22, + .match_mask = 0x22, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", + .match = 0x20, + .match_mask = 0x22, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", + .match = 0x22, + .match_mask = 0x22, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SVTAG", + .match = 0x20, + .match_mask = 0x22, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db_info = { + .num_entries = 179, + .db = bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db_info_get(void) { + return &bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map_info = { + .num_entries = 179, + .map = bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map_info_get(void) { + return &bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_pkt_flexhdr.c new file mode 100644 index 000000000000..a66a52e569c3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_pkt_flexhdr.c @@ -0,0 +1,8523 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56780_a0 and variant dna_6_5_30_2_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[13] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[13] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[13] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[13] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[13] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[13] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[13] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[13] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[13] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[13] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[13] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[13] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[13] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[13] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[13] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[13] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[13] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[13] |= (0x1 << 31); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_data[] = { + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 240, 255 }, /* Profile 8. */ + { 224, 239 }, /* Profile 9. */ + { 240, 255 }, /* Profile 10. */ + { 224, 239 }, /* Profile 11. */ + { 240, 255 }, /* Profile 12. */ + { 224, 239 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + { 48, 63 }, /* Profile 8. */ + { 48, 63 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 48, 63 }, /* Profile 12. */ + { 48, 63 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "DVP_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 383 }, /* Profile 2. */ + { 368, 383 }, /* Profile 3. */ + { 368, 383 }, /* Profile 4. */ + { 368, 383 }, /* Profile 5. */ + { 368, 383 }, /* Profile 6. */ + { 368, 383 }, /* Profile 7. */ + { 368, 383 }, /* Profile 8. */ + { 368, 383 }, /* Profile 9. */ + { 368, 383 }, /* Profile 10. */ + { 368, 383 }, /* Profile 11. */ + { 368, 383 }, /* Profile 12. */ + { 368, 383 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 263 }, /* Profile 2. */ + { 240, 247 }, /* Profile 3. */ + { 256, 263 }, /* Profile 4. */ + { 240, 247 }, /* Profile 5. */ + { 256, 263 }, /* Profile 6. */ + { 240, 247 }, /* Profile 7. */ + { 256, 263 }, /* Profile 8. */ + { 240, 247 }, /* Profile 9. */ + { 256, 263 }, /* Profile 10. */ + { 240, 247 }, /* Profile 11. */ + { 256, 263 }, /* Profile 12. */ + { 240, 247 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EGR_MTOP_INDEX_HI_3_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + { 384, 387 }, /* Profile 6. */ + { 384, 387 }, /* Profile 7. */ + { 384, 387 }, /* Profile 8. */ + { 384, 387 }, /* Profile 9. */ + { 384, 387 }, /* Profile 10. */ + { 384, 387 }, /* Profile 11. */ + { 384, 387 }, /* Profile 12. */ + { 384, 387 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 48, 63 }, /* Profile 10. */ + { 48, 63 }, /* Profile 11. */ + }, + .profile_cnt = 12, + }, + { + .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 255 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + { 224, 239 }, /* Profile 5. */ + { 240, 255 }, /* Profile 6. */ + { 224, 239 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + { 404, 407 }, /* Profile 6. */ + { 404, 407 }, /* Profile 7. */ + { 404, 407 }, /* Profile 8. */ + { 404, 407 }, /* Profile 9. */ + { 404, 407 }, /* Profile 10. */ + { 404, 407 }, /* Profile 11. */ + { 404, 407 }, /* Profile 12. */ + { 404, 407 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + { 112, 127 }, /* Profile 6. */ + { 112, 127 }, /* Profile 7. */ + { 112, 127 }, /* Profile 8. */ + { 112, 127 }, /* Profile 9. */ + { 112, 127 }, /* Profile 10. */ + { 112, 127 }, /* Profile 11. */ + { 112, 127 }, /* Profile 12. */ + { 112, 127 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 272, 287 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 288, 303 }, /* Profile 8. */ + { 272, 287 }, /* Profile 9. */ + { 288, 303 }, /* Profile 10. */ + { 272, 287 }, /* Profile 11. */ + }, + .profile_cnt = 12, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 319 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 304, 319 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 304, 319 }, /* Profile 8. */ + { 288, 303 }, /* Profile 9. */ + { 304, 319 }, /* Profile 10. */ + { 288, 303 }, /* Profile 11. */ + }, + .profile_cnt = 12, + }, + { + .name = "EVENT_TRACE_VECTOR_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + { 0, 15 }, /* Profile 5. */ + { 0, 15 }, /* Profile 6. */ + { 0, 15 }, /* Profile 7. */ + { 0, 15 }, /* Profile 8. */ + { 0, 15 }, /* Profile 9. */ + { 0, 15 }, /* Profile 10. */ + { 0, 15 }, /* Profile 11. */ + { 0, 15 }, /* Profile 12. */ + { 0, 15 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EVENT_TRACE_VECTOR_31_16", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 16, 31 }, /* Profile 2. */ + { 16, 31 }, /* Profile 3. */ + { 16, 31 }, /* Profile 4. */ + { 16, 31 }, /* Profile 5. */ + { 16, 31 }, /* Profile 6. */ + { 16, 31 }, /* Profile 7. */ + { 16, 31 }, /* Profile 8. */ + { 16, 31 }, /* Profile 9. */ + { 16, 31 }, /* Profile 10. */ + { 16, 31 }, /* Profile 11. */ + { 16, 31 }, /* Profile 12. */ + { 16, 31 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + { 32, 47 }, /* Profile 6. */ + { 32, 47 }, /* Profile 7. */ + { 32, 47 }, /* Profile 8. */ + { 32, 47 }, /* Profile 9. */ + { 32, 47 }, /* Profile 10. */ + { 32, 47 }, /* Profile 11. */ + { 32, 47 }, /* Profile 12. */ + { 32, 47 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + { 208, 223 }, /* Profile 6. */ + { 192, 207 }, /* Profile 7. */ + { 208, 223 }, /* Profile 8. */ + { 192, 207 }, /* Profile 9. */ + { 208, 223 }, /* Profile 10. */ + { 192, 207 }, /* Profile 11. */ + { 208, 223 }, /* Profile 12. */ + { 192, 207 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "IFP_IOAM_GBP_ACTION_3_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + { 392, 395 }, /* Profile 6. */ + { 392, 395 }, /* Profile 7. */ + { 392, 395 }, /* Profile 8. */ + { 392, 395 }, /* Profile 9. */ + { 392, 395 }, /* Profile 10. */ + { 392, 395 }, /* Profile 11. */ + { 392, 395 }, /* Profile 12. */ + { 392, 395 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 80, 95 }, /* Profile 2. */ + { 80, 95 }, /* Profile 3. */ + { 80, 95 }, /* Profile 4. */ + { 80, 95 }, /* Profile 5. */ + { 80, 95 }, /* Profile 6. */ + { 80, 95 }, /* Profile 7. */ + { 80, 95 }, /* Profile 8. */ + { 80, 95 }, /* Profile 9. */ + { 80, 95 }, /* Profile 10. */ + { 80, 95 }, /* Profile 11. */ + { 80, 95 }, /* Profile 12. */ + { 80, 95 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + { 400, 403 }, /* Profile 6. */ + { 400, 403 }, /* Profile 7. */ + { 400, 403 }, /* Profile 8. */ + { 400, 403 }, /* Profile 9. */ + { 400, 403 }, /* Profile 10. */ + { 400, 403 }, /* Profile 11. */ + { 400, 403 }, /* Profile 12. */ + { 400, 403 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "ING_TIMESTAMP_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 288, 303 }, /* Profile 6. */ + { 272, 287 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 288, 303 }, /* Profile 12. */ + { 272, 287 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "ING_TIMESTAMP_31_16", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 304, 319 }, /* Profile 6. */ + { 288, 303 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 304, 319 }, /* Profile 12. */ + { 288, 303 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "INGRESS_PP_PORT_7_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 231 }, /* Profile 2. */ + { 208, 215 }, /* Profile 3. */ + { 224, 231 }, /* Profile 4. */ + { 208, 215 }, /* Profile 5. */ + { 224, 231 }, /* Profile 6. */ + { 208, 215 }, /* Profile 7. */ + { 224, 231 }, /* Profile 8. */ + { 208, 215 }, /* Profile 9. */ + { 224, 231 }, /* Profile 10. */ + { 208, 215 }, /* Profile 11. */ + { 224, 231 }, /* Profile 12. */ + { 208, 215 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 304, 319 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 304, 319 }, /* Profile 5. */ + { 320, 335 }, /* Profile 6. */ + { 304, 319 }, /* Profile 7. */ + { 320, 335 }, /* Profile 8. */ + { 304, 319 }, /* Profile 9. */ + { 320, 335 }, /* Profile 10. */ + { 304, 319 }, /* Profile 11. */ + { 320, 335 }, /* Profile 12. */ + { 304, 319 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 424, 427 }, /* Profile 2. */ + { 424, 427 }, /* Profile 3. */ + { 424, 427 }, /* Profile 4. */ + { 424, 427 }, /* Profile 5. */ + { 424, 427 }, /* Profile 6. */ + { 424, 427 }, /* Profile 7. */ + { 424, 427 }, /* Profile 8. */ + { 424, 427 }, /* Profile 9. */ + { 424, 427 }, /* Profile 10. */ + { 424, 427 }, /* Profile 11. */ + { 424, 427 }, /* Profile 12. */ + { 424, 427 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + { 388, 391 }, /* Profile 6. */ + { 388, 391 }, /* Profile 7. */ + { 388, 391 }, /* Profile 8. */ + { 388, 391 }, /* Profile 9. */ + { 388, 391 }, /* Profile 10. */ + { 388, 391 }, /* Profile 11. */ + { 388, 391 }, /* Profile 12. */ + { 388, 391 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 202 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 192, 202 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 192, 202 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 192, 202 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 192, 202 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 192, 202 }, /* Profile 12. */ + }, + .profile_cnt = 13, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 336, 346 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 336, 346 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 336, 346 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 336, 346 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { 336, 346 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 336, 346 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 285 }, /* Profile 2. */ + { 256, 269 }, /* Profile 3. */ + { 272, 285 }, /* Profile 4. */ + { 256, 269 }, /* Profile 5. */ + { 272, 285 }, /* Profile 6. */ + { 256, 269 }, /* Profile 7. */ + { 272, 285 }, /* Profile 8. */ + { 256, 269 }, /* Profile 9. */ + { 272, 285 }, /* Profile 10. */ + { 256, 269 }, /* Profile 11. */ + { 272, 285 }, /* Profile 12. */ + { 256, 269 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 365 }, /* Profile 2. */ + { 352, 365 }, /* Profile 3. */ + { 352, 365 }, /* Profile 4. */ + { 352, 365 }, /* Profile 5. */ + { 352, 365 }, /* Profile 6. */ + { 352, 365 }, /* Profile 7. */ + { 352, 365 }, /* Profile 8. */ + { 352, 365 }, /* Profile 9. */ + { 352, 365 }, /* Profile 10. */ + { 352, 365 }, /* Profile 11. */ + { 352, 365 }, /* Profile 12. */ + { 352, 365 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "MPLS_LABEL_DECAP_COUNT_3_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 432, 435 }, /* Profile 2. */ + { 432, 435 }, /* Profile 3. */ + { 432, 435 }, /* Profile 4. */ + { 432, 435 }, /* Profile 5. */ + { 432, 435 }, /* Profile 6. */ + { 432, 435 }, /* Profile 7. */ + { 432, 435 }, /* Profile 8. */ + { 432, 435 }, /* Profile 9. */ + { 432, 435 }, /* Profile 10. */ + { 432, 435 }, /* Profile 11. */ + { 432, 435 }, /* Profile 12. */ + { 432, 435 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 191 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + { 176, 191 }, /* Profile 6. */ + { 176, 191 }, /* Profile 7. */ + { 176, 191 }, /* Profile 8. */ + { 176, 191 }, /* Profile 9. */ + { 176, 191 }, /* Profile 10. */ + { 176, 191 }, /* Profile 11. */ + { 176, 191 }, /* Profile 12. */ + { 176, 191 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "NHOP_INDEX_1_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { 128, 143 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ + { 128, 143 }, /* Profile 8. */ + { 128, 143 }, /* Profile 9. */ + { 128, 143 }, /* Profile 10. */ + { 128, 143 }, /* Profile 11. */ + { 128, 143 }, /* Profile 12. */ + { 128, 143 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 79 }, /* Profile 2. */ + { 64, 79 }, /* Profile 3. */ + { 64, 79 }, /* Profile 4. */ + { 64, 79 }, /* Profile 5. */ + { 64, 79 }, /* Profile 6. */ + { 64, 79 }, /* Profile 7. */ + { 64, 79 }, /* Profile 8. */ + { 64, 79 }, /* Profile 9. */ + { 64, 79 }, /* Profile 10. */ + { 64, 79 }, /* Profile 11. */ + { 64, 79 }, /* Profile 12. */ + { 64, 79 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 428, 431 }, /* Profile 2. */ + { 428, 431 }, /* Profile 3. */ + { 428, 431 }, /* Profile 4. */ + { 428, 431 }, /* Profile 5. */ + { 428, 431 }, /* Profile 6. */ + { 428, 431 }, /* Profile 7. */ + { 428, 431 }, /* Profile 8. */ + { 428, 431 }, /* Profile 9. */ + { 428, 431 }, /* Profile 10. */ + { 428, 431 }, /* Profile 11. */ + { 428, 431 }, /* Profile 12. */ + { 428, 431 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "SVP_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 96, 111 }, /* Profile 7. */ + { 96, 111 }, /* Profile 8. */ + { 96, 111 }, /* Profile 9. */ + { 96, 111 }, /* Profile 10. */ + { 96, 111 }, /* Profile 11. */ + { 96, 111 }, /* Profile 12. */ + { 96, 111 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 416, 419 }, /* Profile 2. */ + { 416, 419 }, /* Profile 3. */ + { 416, 419 }, /* Profile 4. */ + { 416, 419 }, /* Profile 5. */ + { 416, 419 }, /* Profile 6. */ + { 416, 419 }, /* Profile 7. */ + { 416, 419 }, /* Profile 8. */ + { 416, 419 }, /* Profile 9. */ + { 416, 419 }, /* Profile 10. */ + { 416, 419 }, /* Profile 11. */ + { 416, 419 }, /* Profile 12. */ + { 416, 419 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 175 }, /* Profile 2. */ + { 160, 175 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { 160, 175 }, /* Profile 5. */ + { 160, 175 }, /* Profile 6. */ + { 160, 175 }, /* Profile 7. */ + { 160, 175 }, /* Profile 8. */ + { 160, 175 }, /* Profile 9. */ + { 160, 175 }, /* Profile 10. */ + { 160, 175 }, /* Profile 11. */ + { 160, 175 }, /* Profile 12. */ + { 160, 175 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 420, 423 }, /* Profile 2. */ + { 420, 423 }, /* Profile 3. */ + { 420, 423 }, /* Profile 4. */ + { 420, 423 }, /* Profile 5. */ + { 420, 423 }, /* Profile 6. */ + { 420, 423 }, /* Profile 7. */ + { 420, 423 }, /* Profile 8. */ + { 420, 423 }, /* Profile 9. */ + { 420, 423 }, /* Profile 10. */ + { 420, 423 }, /* Profile 11. */ + { 420, 423 }, /* Profile 12. */ + { 420, 423 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + { 144, 159 }, /* Profile 6. */ + { 144, 159 }, /* Profile 7. */ + { 144, 159 }, /* Profile 8. */ + { 144, 159 }, /* Profile 9. */ + { 144, 159 }, /* Profile 10. */ + { 144, 159 }, /* Profile 11. */ + { 144, 159 }, /* Profile 12. */ + { 144, 159 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + { 408, 411 }, /* Profile 6. */ + { 408, 411 }, /* Profile 7. */ + { 408, 411 }, /* Profile 8. */ + { 408, 411 }, /* Profile 9. */ + { 408, 411 }, /* Profile 10. */ + { 408, 411 }, /* Profile 11. */ + { 408, 411 }, /* Profile 12. */ + { 408, 411 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + { 412, 415 }, /* Profile 6. */ + { 412, 415 }, /* Profile 7. */ + { 412, 415 }, /* Profile 8. */ + { 412, 415 }, /* Profile 9. */ + { 412, 415 }, /* Profile 10. */ + { 412, 415 }, /* Profile 11. */ + { 412, 415 }, /* Profile 12. */ + { 412, 415 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "VFI_15_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + { 336, 351 }, /* Profile 6. */ + { 320, 335 }, /* Profile 7. */ + { 336, 351 }, /* Profile 8. */ + { 320, 335 }, /* Profile 9. */ + { 336, 351 }, /* Profile 10. */ + { 320, 335 }, /* Profile 11. */ + { 336, 351 }, /* Profile 12. */ + { 320, 335 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0", + .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 397 }, /* Profile 2. */ + { 396, 397 }, /* Profile 3. */ + { 396, 397 }, /* Profile 4. */ + { 396, 397 }, /* Profile 5. */ + { 396, 397 }, /* Profile 6. */ + { 396, 397 }, /* Profile 7. */ + { 396, 397 }, /* Profile 8. */ + { 396, 397 }, /* Profile 9. */ + { 396, 397 }, /* Profile 10. */ + { 396, 397 }, /* Profile 11. */ + { 396, 397 }, /* Profile 12. */ + { 396, 397 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, +};static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_names[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_names, + .reason_encode = bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_arp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_arp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_arp_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_arp_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_authen_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_authen_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_authen_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_authen_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_bfd_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_bfd_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_bfd_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_bfd_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_cntag_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_cntag_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_cntag_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_cntag_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_dest_option_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_dest_option_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_dest_option_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_dest_option_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_esp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_esp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_esp_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_esp_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_esp_t_field_data, +}; + + +static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_etag_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_get, + bcmpkt_etag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_etag_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_set, + bcmpkt_etag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_etag_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_etag_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_etag_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ethertype_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ethertype_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ethertype_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ethertype_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_frag_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_frag_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_frag_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_frag_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_frag_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gpe_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gpe_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gpe_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gpe_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gre_key_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gre_key_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gre_key_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gre_key_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gre_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gre_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gre_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gre_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_gre_t_field_data, +}; + + +static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 4, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 4, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 6, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 6, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 31, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 10); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 10, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 15, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 15, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 4); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 2, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_get, + bcmpkt_hg3_base_t_cng_get, + bcmpkt_hg3_base_t_entropy_get, + bcmpkt_hg3_base_t_ext_hdr_present_get, + bcmpkt_hg3_base_t_hg3_reserved_get, + bcmpkt_hg3_base_t_l3_routed_get, + bcmpkt_hg3_base_t_mirror_copy_get, + bcmpkt_hg3_base_t_reserved_etype_get, + bcmpkt_hg3_base_t_system_destination_get, + bcmpkt_hg3_base_t_system_destination_type_get, + bcmpkt_hg3_base_t_system_source_get, + bcmpkt_hg3_base_t_tc_get, + bcmpkt_hg3_base_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_set, + bcmpkt_hg3_base_t_cng_set, + bcmpkt_hg3_base_t_entropy_set, + bcmpkt_hg3_base_t_ext_hdr_present_set, + bcmpkt_hg3_base_t_hg3_reserved_set, + bcmpkt_hg3_base_t_l3_routed_set, + bcmpkt_hg3_base_t_mirror_copy_set, + bcmpkt_hg3_base_t_reserved_etype_set, + bcmpkt_hg3_base_t_system_destination_set, + bcmpkt_hg3_base_t_system_destination_type_set, + bcmpkt_hg3_base_t_system_source_set, + bcmpkt_hg3_base_t_tc_set, + bcmpkt_hg3_base_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_field_data, +}; + + +static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_lsb_get, + bcmpkt_hg3_extension_0_t_class_id_msb_get, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, + bcmpkt_hg3_extension_0_t_flags_get, + bcmpkt_hg3_extension_0_t_forwarding_domain_get, + bcmpkt_hg3_extension_0_t_svp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_lsb_set, + bcmpkt_hg3_extension_0_t_class_id_msb_set, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, + bcmpkt_hg3_extension_0_t_flags_set, + bcmpkt_hg3_extension_0_t_forwarding_domain_set, + bcmpkt_hg3_extension_0_t_svp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_icmp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_icmp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_icmp_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_icmp_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 24); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 2); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 2, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 6); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 6, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_get, + bcmpkt_ifa_flex_md_0_b_t_port_speed_get, + bcmpkt_ifa_flex_md_0_b_t_queue_id_get, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_set, + bcmpkt_ifa_flex_md_0_b_t_port_speed_set, + bcmpkt_ifa_flex_md_0_b_t_queue_id_set, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_get, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_set, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_get, + bcmpkt_ifa_md_base_t_hop_limit_current_length_get, + bcmpkt_ifa_md_base_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_set, + bcmpkt_ifa_md_base_t_hop_limit_current_length_set, + bcmpkt_ifa_md_base_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_get, + bcmpkt_ifa_metadata_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_t_metadata_get, + bcmpkt_ifa_metadata_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_set, + bcmpkt_ifa_metadata_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_t_metadata_set, + bcmpkt_ifa_metadata_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_igmp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_igmp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_igmp_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_igmp_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ipfix_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ipfix_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ipfix_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ipfix_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ipv4_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ipv4_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ipv4_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ipv4_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ipv6_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ipv6_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ipv6_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ipv6_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_l2_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_l2_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_l2_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_l2_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mpls_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mpls_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mpls_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mpls_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_p_1588_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_p_1588_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_p_1588_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_p_1588_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_pim_t_hdr_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_4_5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_4_5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_6_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_6_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_pim_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FID_COUNT] = { + bcmpkt_pim_t_hdr_bytes_0_1_get, + bcmpkt_pim_t_hdr_bytes_2_3_get, + bcmpkt_pim_t_hdr_bytes_4_5_get, + bcmpkt_pim_t_hdr_bytes_6_7_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_pim_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FID_COUNT] = { + bcmpkt_pim_t_hdr_bytes_0_1_set, + bcmpkt_pim_t_hdr_bytes_2_3_set, + bcmpkt_pim_t_hdr_bytes_4_5_set, + bcmpkt_pim_t_hdr_bytes_6_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_pim_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_pim_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_pim_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_rarp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_rarp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rarp_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_rarp_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_routing_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_routing_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_routing_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_routing_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_rspan_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_rspan_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rspan_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_rspan_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_rspan_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_svtag_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_get, + bcmpkt_svtag_t_data_upr_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_svtag_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_set, + bcmpkt_svtag_t_data_upr_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_svtag_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_svtag_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_svtag_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_udp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_udp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_udp_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_udp_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_vlan_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_vlan_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_vlan_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_vlan_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_vntag_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_get, + bcmpkt_vntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_vntag_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_set, + bcmpkt_vntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_vntag_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_vntag_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_vntag_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_vxlan_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_vxlan_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_vxlan_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_vxlan_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_wesp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_wesp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_wesp_t_field_data[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_wesp_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_30_2_0_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56780_a0_dna_6_5_30_2_0_flexhdr_info_list[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_arp_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_authen_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_bfd_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_cntag_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_dest_option_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_esp_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_etag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_etag_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_etag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ethertype_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_frag_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gpe_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gre_key_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gre_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_icmp_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_igmp_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ipfix_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ipv4_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ipv6_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_l2_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mpls_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_p_1588_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_pim_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_pim_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_pim_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_rarp_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_routing_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_rspan_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_svtag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_svtag_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_svtag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_udp_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_vlan_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_vntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_vntag_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_vntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_vxlan_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_6_5_30_2_0_wesp_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_30_2_0_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_info, + .reasons_info = &bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56780_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56780_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56780_a0_dna_6_5_30_2_0_flexhdr_id_map[] = { + BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56780_a0_dna_6_5_30_2_0_flexhdr_map_get(void) +{ + return bcm56780_a0_dna_6_5_30_2_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56780_a0_dna_6_5_30_2_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56780_a0_dna_6_5_30_2_0_flexhdr_info_list[hid]; +} + +int bcm56780_a0_dna_6_5_30_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 14, + 21, + 22, + 69, +}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..41eeeee2e12b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,2480 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_hna_6_5_30_6_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant hna_6_5_30_6_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", + .match = 0x40, + .match_mask = 0x60, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_SVTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", + .match = 0x20, + .match_mask = 0x60, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", + .match = 0x40, + .match_mask = 0x60, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", + .match = 0x20, + .match_mask = 0x60, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", + .match = 0x40, + .match_mask = 0x60, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", + .match = 0x20, + .match_mask = 0x60, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", + .match = 0x40, + .match_mask = 0x60, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SVTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", + .match = 0x20, + .match_mask = 0x60, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db_info = { + .num_entries = 173, + .db = bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db_info_get(void) { + return &bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map_info = { + .num_entries = 173, + .map = bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map_info_get(void) { + return &bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_pkt_flexhdr.c new file mode 100644 index 000000000000..75b50b998967 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_pkt_flexhdr.c @@ -0,0 +1,8370 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56780_a0 and variant hna_6_5_30_6_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[13] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[13] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[13] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[13] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[13] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[13] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[13] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[13] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[13] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[13] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[13] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[13] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[13] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[13] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[13] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[13] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[13] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[13] |= (0x1 << 31); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_data[] = { + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 80, 95 }, /* Profile 12. */ + { 80, 95 }, /* Profile 13. */ + { 80, 95 }, /* Profile 14. */ + { 80, 95 }, /* Profile 15. */ + { 80, 95 }, /* Profile 16. */ + { 80, 95 }, /* Profile 17. */ + { 80, 95 }, /* Profile 18. */ + { 80, 95 }, /* Profile 19. */ + { 80, 95 }, /* Profile 20. */ + { 80, 95 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 48, 63 }, /* Profile 10. */ + { 48, 63 }, /* Profile 11. */ + { 48, 63 }, /* Profile 12. */ + { 48, 63 }, /* Profile 13. */ + { 48, 63 }, /* Profile 14. */ + { 48, 63 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { 48, 63 }, /* Profile 20. */ + { 48, 63 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "DVP_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 383 }, /* Profile 2. */ + { 368, 383 }, /* Profile 3. */ + { 368, 383 }, /* Profile 4. */ + { 368, 383 }, /* Profile 5. */ + { 368, 383 }, /* Profile 6. */ + { 368, 383 }, /* Profile 7. */ + { 368, 383 }, /* Profile 8. */ + { 368, 383 }, /* Profile 9. */ + { 368, 383 }, /* Profile 10. */ + { 368, 383 }, /* Profile 11. */ + { 368, 383 }, /* Profile 12. */ + { 368, 383 }, /* Profile 13. */ + { 368, 383 }, /* Profile 14. */ + { 368, 383 }, /* Profile 15. */ + { 368, 383 }, /* Profile 16. */ + { 368, 383 }, /* Profile 17. */ + { 368, 383 }, /* Profile 18. */ + { 368, 383 }, /* Profile 19. */ + { 368, 383 }, /* Profile 20. */ + { 368, 383 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 119 }, /* Profile 2. */ + { 112, 119 }, /* Profile 3. */ + { 112, 119 }, /* Profile 4. */ + { 112, 119 }, /* Profile 5. */ + { 112, 119 }, /* Profile 6. */ + { 112, 119 }, /* Profile 7. */ + { 112, 119 }, /* Profile 8. */ + { 112, 119 }, /* Profile 9. */ + { 112, 119 }, /* Profile 10. */ + { 112, 119 }, /* Profile 11. */ + { 112, 119 }, /* Profile 12. */ + { 112, 119 }, /* Profile 13. */ + { 112, 119 }, /* Profile 14. */ + { 112, 119 }, /* Profile 15. */ + { 112, 119 }, /* Profile 16. */ + { 112, 119 }, /* Profile 17. */ + { 112, 119 }, /* Profile 18. */ + { 112, 119 }, /* Profile 19. */ + { 112, 119 }, /* Profile 20. */ + { 112, 119 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "EGR_MTOP_INDEX_HI_3_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + { 384, 387 }, /* Profile 6. */ + { 384, 387 }, /* Profile 7. */ + { 384, 387 }, /* Profile 8. */ + { 384, 387 }, /* Profile 9. */ + { 384, 387 }, /* Profile 10. */ + { 384, 387 }, /* Profile 11. */ + { 384, 387 }, /* Profile 12. */ + { 384, 387 }, /* Profile 13. */ + { 384, 387 }, /* Profile 14. */ + { 384, 387 }, /* Profile 15. */ + { 384, 387 }, /* Profile 16. */ + { 384, 387 }, /* Profile 17. */ + { 384, 387 }, /* Profile 18. */ + { 384, 387 }, /* Profile 19. */ + { 384, 387 }, /* Profile 20. */ + { 384, 387 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + { 48, 63 }, /* Profile 8. */ + { 48, 63 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 48, 63 }, /* Profile 16. */ + { 48, 63 }, /* Profile 17. */ + { 48, 63 }, /* Profile 18. */ + { 48, 63 }, /* Profile 19. */ + }, + .profile_cnt = 20, + }, + { + .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 80, 95 }, /* Profile 2. */ + { 80, 95 }, /* Profile 3. */ + { 80, 95 }, /* Profile 4. */ + { 80, 95 }, /* Profile 5. */ + { 80, 95 }, /* Profile 6. */ + { 80, 95 }, /* Profile 7. */ + { 80, 95 }, /* Profile 8. */ + { 80, 95 }, /* Profile 9. */ + { 80, 95 }, /* Profile 10. */ + { 80, 95 }, /* Profile 11. */ + }, + .profile_cnt = 12, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + { 392, 395 }, /* Profile 6. */ + { 392, 395 }, /* Profile 7. */ + { 392, 395 }, /* Profile 8. */ + { 392, 395 }, /* Profile 9. */ + { 392, 395 }, /* Profile 10. */ + { 392, 395 }, /* Profile 11. */ + { 392, 395 }, /* Profile 12. */ + { 392, 395 }, /* Profile 13. */ + { 392, 395 }, /* Profile 14. */ + { 392, 395 }, /* Profile 15. */ + { 392, 395 }, /* Profile 16. */ + { 392, 395 }, /* Profile 17. */ + { 392, 395 }, /* Profile 18. */ + { 392, 395 }, /* Profile 19. */ + { 392, 395 }, /* Profile 20. */ + { 392, 395 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { 128, 143 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ + { 128, 143 }, /* Profile 8. */ + { 128, 143 }, /* Profile 9. */ + { 128, 143 }, /* Profile 10. */ + { 128, 143 }, /* Profile 11. */ + { 128, 143 }, /* Profile 12. */ + { 128, 143 }, /* Profile 13. */ + { 128, 143 }, /* Profile 14. */ + { 128, 143 }, /* Profile 15. */ + { 128, 143 }, /* Profile 16. */ + { 128, 143 }, /* Profile 17. */ + { 128, 143 }, /* Profile 18. */ + { 128, 143 }, /* Profile 19. */ + { 128, 143 }, /* Profile 20. */ + { 128, 143 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 271 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 256, 271 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 240, 255 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 256, 271 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 240, 255 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 256, 271 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 240, 255 }, /* Profile 18. */ + }, + .profile_cnt = 19, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 287 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 256, 271 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 272, 287 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 256, 271 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 272, 287 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 256, 271 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 272, 287 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 256, 271 }, /* Profile 18. */ + }, + .profile_cnt = 19, + }, + { + .name = "EVENT_TRACE_VECTOR_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + { 0, 15 }, /* Profile 5. */ + { 0, 15 }, /* Profile 6. */ + { 0, 15 }, /* Profile 7. */ + { 0, 15 }, /* Profile 8. */ + { 0, 15 }, /* Profile 9. */ + { 0, 15 }, /* Profile 10. */ + { 0, 15 }, /* Profile 11. */ + { 0, 15 }, /* Profile 12. */ + { 0, 15 }, /* Profile 13. */ + { 0, 15 }, /* Profile 14. */ + { 0, 15 }, /* Profile 15. */ + { 0, 15 }, /* Profile 16. */ + { 0, 15 }, /* Profile 17. */ + { 0, 15 }, /* Profile 18. */ + { 0, 15 }, /* Profile 19. */ + { 0, 15 }, /* Profile 20. */ + { 0, 15 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "EVENT_TRACE_VECTOR_31_16", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 16, 31 }, /* Profile 2. */ + { 16, 31 }, /* Profile 3. */ + { 16, 31 }, /* Profile 4. */ + { 16, 31 }, /* Profile 5. */ + { 16, 31 }, /* Profile 6. */ + { 16, 31 }, /* Profile 7. */ + { 16, 31 }, /* Profile 8. */ + { 16, 31 }, /* Profile 9. */ + { 16, 31 }, /* Profile 10. */ + { 16, 31 }, /* Profile 11. */ + { 16, 31 }, /* Profile 12. */ + { 16, 31 }, /* Profile 13. */ + { 16, 31 }, /* Profile 14. */ + { 16, 31 }, /* Profile 15. */ + { 16, 31 }, /* Profile 16. */ + { 16, 31 }, /* Profile 17. */ + { 16, 31 }, /* Profile 18. */ + { 16, 31 }, /* Profile 19. */ + { 16, 31 }, /* Profile 20. */ + { 16, 31 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + { 32, 47 }, /* Profile 6. */ + { 32, 47 }, /* Profile 7. */ + { 32, 47 }, /* Profile 8. */ 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240, 255 }, /* Profile 13. */ + { 224, 239 }, /* Profile 14. */ + { 224, 239 }, /* Profile 15. */ + { 240, 255 }, /* Profile 16. */ + { 240, 255 }, /* Profile 17. */ + { 224, 239 }, /* Profile 18. */ + { 224, 239 }, /* Profile 19. */ + { 240, 255 }, /* Profile 20. */ + { 224, 239 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "IFP_IOAM_GBP_ACTION_3_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + { 408, 411 }, /* Profile 6. */ + { 408, 411 }, /* Profile 7. */ + { 408, 411 }, /* Profile 8. */ + { 408, 411 }, /* Profile 9. */ + { 408, 411 }, /* Profile 10. */ + { 408, 411 }, /* Profile 11. */ + { 408, 411 }, /* Profile 12. */ + { 408, 411 }, /* Profile 13. */ + { 408, 411 }, /* Profile 14. */ + { 408, 411 }, /* Profile 15. */ + { 408, 411 }, /* Profile 16. */ + { 408, 411 }, /* Profile 17. */ + { 408, 411 }, /* Profile 18. */ + { 408, 411 }, /* Profile 19. */ + { 408, 411 }, /* Profile 20. */ + { 408, 411 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 239 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 208, 223 }, /* Profile 5. */ + { 224, 239 }, /* Profile 6. */ + { 224, 239 }, /* Profile 7. */ + { 208, 223 }, /* Profile 8. */ + { 208, 223 }, /* Profile 9. */ + { 224, 239 }, /* Profile 10. */ + { 208, 223 }, /* Profile 11. */ + { 224, 239 }, /* Profile 12. */ + { 224, 239 }, /* Profile 13. */ + { 208, 223 }, /* Profile 14. */ + { 208, 223 }, /* Profile 15. */ + { 224, 239 }, /* Profile 16. */ + { 224, 239 }, /* Profile 17. */ + { 208, 223 }, /* Profile 18. */ + { 208, 223 }, /* Profile 19. */ + { 224, 239 }, /* Profile 20. */ + { 208, 223 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 420, 423 }, /* Profile 2. */ + { 420, 423 }, /* Profile 3. */ + { 420, 423 }, /* Profile 4. */ + { 420, 423 }, /* Profile 5. */ + { 420, 423 }, /* Profile 6. */ + { 420, 423 }, /* Profile 7. */ + { 420, 423 }, /* Profile 8. */ + { 420, 423 }, /* Profile 9. */ + { 420, 423 }, /* Profile 10. */ + { 420, 423 }, /* Profile 11. */ + { 420, 423 }, /* Profile 12. */ + { 420, 423 }, /* Profile 13. */ + { 420, 423 }, /* Profile 14. */ + { 420, 423 }, /* Profile 15. */ + { 420, 423 }, /* Profile 16. */ + { 420, 423 }, /* Profile 17. */ + { 420, 423 }, /* Profile 18. */ + { 420, 423 }, /* Profile 19. */ + { 420, 423 }, /* Profile 20. */ + { 420, 423 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "ING_TIMESTAMP_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 256, 271 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 240, 255 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 256, 271 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 240, 255 }, /* Profile 9. */ + { 256, 271 }, /* Profile 10. */ + { 240, 255 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 256, 271 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { 240, 255 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { 256, 271 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 240, 255 }, /* Profile 19. */ + { 256, 271 }, /* Profile 20. */ + { 240, 255 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "ING_TIMESTAMP_31_16", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 256, 271 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 272, 287 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 256, 271 }, /* Profile 9. */ + { 272, 287 }, /* Profile 10. */ + { 256, 271 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 272, 287 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { 256, 271 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { 272, 287 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 256, 271 }, /* Profile 19. */ + { 272, 287 }, /* Profile 20. */ + { 256, 271 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "INGRESS_PP_PORT_7_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 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{ 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 96, 111 }, /* Profile 7. */ + { 96, 111 }, /* Profile 8. */ + { 96, 111 }, /* Profile 9. */ + { 96, 111 }, /* Profile 10. */ + { 96, 111 }, /* Profile 11. */ + { 96, 111 }, /* Profile 12. */ + { 96, 111 }, /* Profile 13. */ + { 96, 111 }, /* Profile 14. */ + { 96, 111 }, /* Profile 15. */ + { 96, 111 }, /* Profile 16. */ + { 96, 111 }, /* Profile 17. */ + { 96, 111 }, /* Profile 18. */ + { 96, 111 }, /* Profile 19. */ + { 96, 111 }, /* Profile 20. */ + { 96, 111 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + { 388, 391 }, /* Profile 6. */ + { 388, 391 }, /* Profile 7. */ + { 388, 391 }, /* Profile 8. */ + { 388, 391 }, /* Profile 9. */ + { 388, 391 }, /* Profile 10. */ + { 388, 391 }, /* Profile 11. */ + { 388, 391 }, /* Profile 12. */ + { 388, 391 }, /* Profile 13. */ + { 388, 391 }, /* Profile 14. */ + { 388, 391 }, /* Profile 15. */ + { 388, 391 }, /* Profile 16. */ + { 388, 391 }, /* Profile 17. */ + { 388, 391 }, /* Profile 18. */ + { 388, 391 }, /* Profile 19. */ + { 388, 391 }, /* Profile 20. */ + { 388, 391 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 424, 427 }, /* Profile 2. */ + { 424, 427 }, /* Profile 3. */ + { 424, 427 }, /* Profile 4. */ + { 424, 427 }, /* Profile 5. */ + { 424, 427 }, /* Profile 6. */ + { 424, 427 }, /* Profile 7. */ + { 424, 427 }, /* Profile 8. */ + { 424, 427 }, /* Profile 9. */ + { 424, 427 }, /* Profile 10. */ + { 424, 427 }, /* Profile 11. */ + { 424, 427 }, /* Profile 12. */ + { 424, 427 }, /* Profile 13. */ + { 424, 427 }, /* Profile 14. */ + { 424, 427 }, /* Profile 15. */ + { 424, 427 }, /* Profile 16. */ + { 424, 427 }, /* Profile 17. */ + { 424, 427 }, /* Profile 18. */ + { 424, 427 }, /* Profile 19. */ + { 424, 427 }, /* Profile 20. */ + { 424, 427 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 170 }, /* Profile 2. */ + { 160, 170 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 160, 170 }, /* Profile 6. */ + { 160, 170 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 160, 170 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 160, 170 }, /* Profile 12. */ + { 160, 170 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 160, 170 }, /* Profile 16. */ + { 160, 170 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { 160, 170 }, /* Profile 20. */ + }, + .profile_cnt = 21, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 336, 346 }, /* Profile 4. */ + { 336, 346 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 336, 346 }, /* Profile 8. */ + { 336, 346 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { 336, 346 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 336, 346 }, /* Profile 14. */ + { 336, 346 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 336, 346 }, /* Profile 18. */ + { 336, 346 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { 336, 346 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 333 }, /* Profile 2. */ + { 320, 333 }, /* Profile 3. */ + { 304, 317 }, /* Profile 4. */ + { 304, 317 }, /* Profile 5. */ + { 320, 333 }, /* Profile 6. */ + { 320, 333 }, /* Profile 7. */ + { 304, 317 }, /* Profile 8. */ + { 304, 317 }, /* Profile 9. */ + { 320, 333 }, /* Profile 10. */ + { 304, 317 }, /* Profile 11. */ + { 320, 333 }, /* Profile 12. */ + { 320, 333 }, /* Profile 13. */ + { 304, 317 }, /* Profile 14. */ + { 304, 317 }, /* Profile 15. */ + { 320, 333 }, /* Profile 16. */ + { 320, 333 }, /* Profile 17. */ + { 304, 317 }, /* Profile 18. */ + { 304, 317 }, /* Profile 19. */ + { 320, 333 }, /* Profile 20. */ + { 304, 317 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 365 }, /* Profile 2. */ + { 352, 365 }, /* Profile 3. */ + { 352, 365 }, /* Profile 4. */ + { 352, 365 }, /* Profile 5. */ + { 352, 365 }, /* Profile 6. */ + { 352, 365 }, /* Profile 7. */ + { 352, 365 }, /* Profile 8. */ + { 352, 365 }, /* Profile 9. */ + { 352, 365 }, /* Profile 10. */ + { 352, 365 }, /* Profile 11. */ + { 352, 365 }, /* Profile 12. */ + { 352, 365 }, /* Profile 13. */ + { 352, 365 }, /* Profile 14. */ + { 352, 365 }, /* Profile 15. */ + { 352, 365 }, /* Profile 16. */ + { 352, 365 }, /* Profile 17. */ + { 352, 365 }, /* Profile 18. */ + { 352, 365 }, /* Profile 19. */ + { 352, 365 }, /* Profile 20. */ + { 352, 365 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + { 144, 159 }, /* Profile 6. */ + { 144, 159 }, /* Profile 7. */ + { 144, 159 }, /* Profile 8. */ + { 144, 159 }, /* Profile 9. */ + { 144, 159 }, /* Profile 10. */ + { 144, 159 }, /* Profile 11. */ + { 144, 159 }, /* Profile 12. */ + { 144, 159 }, /* Profile 13. */ + { 144, 159 }, /* Profile 14. */ + { 144, 159 }, /* Profile 15. */ + { 144, 159 }, /* Profile 16. */ + { 144, 159 }, /* Profile 17. */ + { 144, 159 }, /* Profile 18. */ + { 144, 159 }, /* Profile 19. */ + { 144, 159 }, /* Profile 20. */ + { 144, 159 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "NHOP_INDEX_1_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 319 }, /* Profile 2. */ + { 304, 319 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + { 304, 319 }, /* Profile 6. */ + { 304, 319 }, /* Profile 7. */ + { 288, 303 }, /* Profile 8. */ + { 288, 303 }, /* Profile 9. */ + { 304, 319 }, /* Profile 10. */ + { 288, 303 }, /* Profile 11. */ + { 304, 319 }, /* Profile 12. */ + { 304, 319 }, /* Profile 13. */ + { 288, 303 }, /* Profile 14. */ + { 288, 303 }, /* Profile 15. */ + { 304, 319 }, /* Profile 16. */ + { 304, 319 }, /* Profile 17. */ + { 288, 303 }, /* Profile 18. */ + { 288, 303 }, /* Profile 19. */ + { 304, 319 }, /* Profile 20. */ + { 288, 303 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 79 }, /* Profile 2. */ + { 64, 79 }, /* Profile 3. */ + { 64, 79 }, /* Profile 4. */ + { 64, 79 }, /* Profile 5. */ + { 64, 79 }, /* Profile 6. */ + { 64, 79 }, /* Profile 7. */ + { 64, 79 }, /* Profile 8. */ + { 64, 79 }, /* Profile 9. */ + { 64, 79 }, /* Profile 10. */ + { 64, 79 }, /* Profile 11. */ + { 64, 79 }, /* Profile 12. */ + { 64, 79 }, /* Profile 13. */ + { 64, 79 }, /* Profile 14. */ + { 64, 79 }, /* Profile 15. */ + { 64, 79 }, /* Profile 16. */ + { 64, 79 }, /* Profile 17. */ + { 64, 79 }, /* Profile 18. */ + { 64, 79 }, /* Profile 19. */ + { 64, 79 }, /* Profile 20. */ + { 64, 79 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + { 400, 403 }, /* Profile 6. */ + { 400, 403 }, /* Profile 7. */ + { 400, 403 }, /* Profile 8. */ + { 400, 403 }, /* Profile 9. */ + { 400, 403 }, /* Profile 10. */ + { 400, 403 }, /* Profile 11. */ + { 400, 403 }, /* Profile 12. */ + { 400, 403 }, /* Profile 13. */ + { 400, 403 }, /* Profile 14. */ + { 400, 403 }, /* Profile 15. */ + { 400, 403 }, /* Profile 16. */ + { 400, 403 }, /* Profile 17. */ + { 400, 403 }, /* Profile 18. */ + { 400, 403 }, /* Profile 19. */ + { 400, 403 }, /* Profile 20. */ + { 400, 403 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "SVP_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 272, 287 }, /* Profile 4. */ + { 272, 287 }, /* Profile 5. */ + { 288, 303 }, /* Profile 6. */ + { 288, 303 }, /* Profile 7. */ + { 272, 287 }, /* Profile 8. */ + { 272, 287 }, /* Profile 9. */ + { 288, 303 }, /* Profile 10. */ + { 272, 287 }, /* Profile 11. */ + { 288, 303 }, /* Profile 12. */ + { 288, 303 }, /* Profile 13. */ + { 272, 287 }, /* Profile 14. */ + { 272, 287 }, /* Profile 15. */ + { 288, 303 }, /* Profile 16. */ + { 288, 303 }, /* Profile 17. */ + { 272, 287 }, /* Profile 18. */ + { 272, 287 }, /* Profile 19. */ + { 288, 303 }, /* Profile 20. */ + { 272, 287 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + { 412, 415 }, /* Profile 6. */ + { 412, 415 }, /* Profile 7. */ + { 412, 415 }, /* Profile 8. */ + { 412, 415 }, /* Profile 9. */ + { 412, 415 }, /* Profile 10. */ + { 412, 415 }, /* Profile 11. */ + { 412, 415 }, /* Profile 12. */ + { 412, 415 }, /* Profile 13. */ + { 412, 415 }, /* Profile 14. */ + { 412, 415 }, /* Profile 15. */ + { 412, 415 }, /* Profile 16. */ + { 412, 415 }, /* Profile 17. */ + { 412, 415 }, /* Profile 18. */ + { 412, 415 }, /* Profile 19. */ + { 412, 415 }, /* Profile 20. */ + { 412, 415 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { 208, 223 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + { 208, 223 }, /* Profile 6. */ + { 208, 223 }, /* Profile 7. */ + { 192, 207 }, /* Profile 8. */ + { 192, 207 }, /* Profile 9. */ + { 208, 223 }, /* Profile 10. */ + { 192, 207 }, /* Profile 11. */ + { 208, 223 }, /* Profile 12. */ + { 208, 223 }, /* Profile 13. */ + { 192, 207 }, /* Profile 14. */ + { 192, 207 }, /* Profile 15. */ + { 208, 223 }, /* Profile 16. */ + { 208, 223 }, /* Profile 17. */ + { 192, 207 }, /* Profile 18. */ + { 192, 207 }, /* Profile 19. */ + { 208, 223 }, /* Profile 20. */ + { 192, 207 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 396, 399 }, /* Profile 5. */ + { 396, 399 }, /* Profile 6. */ + { 396, 399 }, /* Profile 7. */ + { 396, 399 }, /* Profile 8. */ + { 396, 399 }, /* Profile 9. */ + { 396, 399 }, /* Profile 10. */ + { 396, 399 }, /* Profile 11. */ + { 396, 399 }, /* Profile 12. */ + { 396, 399 }, /* Profile 13. */ + { 396, 399 }, /* Profile 14. */ + { 396, 399 }, /* Profile 15. */ + { 396, 399 }, /* Profile 16. */ + { 396, 399 }, /* Profile 17. */ + { 396, 399 }, /* Profile 18. */ + { 396, 399 }, /* Profile 19. */ + { 396, 399 }, /* Profile 20. */ + { 396, 399 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + { 192, 207 }, /* Profile 6. */ + { 192, 207 }, /* Profile 7. */ + { 176, 191 }, /* Profile 8. */ + { 176, 191 }, /* Profile 9. */ + { 192, 207 }, /* Profile 10. */ + { 176, 191 }, /* Profile 11. */ + { 192, 207 }, /* Profile 12. */ + { 192, 207 }, /* Profile 13. */ + { 176, 191 }, /* Profile 14. */ + { 176, 191 }, /* Profile 15. */ + { 192, 207 }, /* Profile 16. */ + { 192, 207 }, /* Profile 17. */ + { 176, 191 }, /* Profile 18. */ + { 176, 191 }, /* Profile 19. */ + { 192, 207 }, /* Profile 20. */ + { 176, 191 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 428, 431 }, /* Profile 2. */ + { 428, 431 }, /* Profile 3. */ + { 428, 431 }, /* Profile 4. */ + { 428, 431 }, /* Profile 5. */ + { 428, 431 }, /* Profile 6. */ + { 428, 431 }, /* Profile 7. */ + { 428, 431 }, /* Profile 8. */ + { 428, 431 }, /* Profile 9. */ + { 428, 431 }, /* Profile 10. */ + { 428, 431 }, /* Profile 11. */ + { 428, 431 }, /* Profile 12. */ + { 428, 431 }, /* Profile 13. */ + { 428, 431 }, /* Profile 14. */ + { 428, 431 }, /* Profile 15. */ + { 428, 431 }, /* Profile 16. */ + { 428, 431 }, /* Profile 17. */ + { 428, 431 }, /* Profile 18. */ + { 428, 431 }, /* Profile 19. */ + { 428, 431 }, /* Profile 20. */ + { 428, 431 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 416, 419 }, /* Profile 2. */ + { 416, 419 }, /* Profile 3. */ + { 416, 419 }, /* Profile 4. */ + { 416, 419 }, /* Profile 5. */ + { 416, 419 }, /* Profile 6. */ + { 416, 419 }, /* Profile 7. */ + { 416, 419 }, /* Profile 8. */ + { 416, 419 }, /* Profile 9. */ + { 416, 419 }, /* Profile 10. */ + { 416, 419 }, /* Profile 11. */ + { 416, 419 }, /* Profile 12. */ + { 416, 419 }, /* Profile 13. */ + { 416, 419 }, /* Profile 14. */ + { 416, 419 }, /* Profile 15. */ + { 416, 419 }, /* Profile 16. */ + { 416, 419 }, /* Profile 17. */ + { 416, 419 }, /* Profile 18. */ + { 416, 419 }, /* Profile 19. */ + { 416, 419 }, /* Profile 20. */ + { 416, 419 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "VFI_15_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + { 336, 351 }, /* Profile 6. */ + { 336, 351 }, /* Profile 7. */ + { 320, 335 }, /* Profile 8. */ + { 320, 335 }, /* Profile 9. */ + { 336, 351 }, /* Profile 10. */ + { 320, 335 }, /* Profile 11. */ + { 336, 351 }, /* Profile 12. */ + { 336, 351 }, /* Profile 13. */ + { 320, 335 }, /* Profile 14. */ + { 320, 335 }, /* Profile 15. */ + { 336, 351 }, /* Profile 16. */ + { 336, 351 }, /* Profile 17. */ + { 320, 335 }, /* Profile 18. */ + { 320, 335 }, /* Profile 19. */ + { 336, 351 }, /* Profile 20. */ + { 320, 335 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", + .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + { 404, 407 }, /* Profile 6. */ + { 404, 407 }, /* Profile 7. */ + { 404, 407 }, /* Profile 8. */ + { 404, 407 }, /* Profile 9. */ + { 404, 407 }, /* Profile 10. */ + { 404, 407 }, /* Profile 11. */ + { 404, 407 }, /* Profile 12. */ + { 404, 407 }, /* Profile 13. */ + { 404, 407 }, /* Profile 14. */ + { 404, 407 }, /* Profile 15. */ + { 404, 407 }, /* Profile 16. */ + { 404, 407 }, /* Profile 17. */ + { 404, 407 }, /* Profile 18. */ + { 404, 407 }, /* Profile 19. */ + { 404, 407 }, /* Profile 20. */ + { 404, 407 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, +};static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_names[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_names, + .reason_encode = bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_arp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_arp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_arp_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_arp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_authen_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_authen_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_authen_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_authen_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_bfd_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_bfd_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_bfd_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_bfd_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_cntag_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_cntag_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_cntag_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_cntag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_dest_option_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_dest_option_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_dest_option_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_dest_option_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_esp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_esp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_esp_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_esp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_esp_t_field_data, +}; + + +static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_etag_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_get, + bcmpkt_etag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_etag_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_set, + bcmpkt_etag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_etag_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_etag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_etag_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ethertype_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ethertype_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ethertype_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ethertype_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_frag_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_frag_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_frag_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_frag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_frag_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_svp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, + bcmpkt_generic_loopback_t_svp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, + bcmpkt_generic_loopback_t_svp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gpe_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gpe_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gpe_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gpe_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gre_key_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gre_key_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gre_key_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gre_key_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gre_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gre_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gre_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gre_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_gre_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_icmp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_icmp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_icmp_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_icmp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 24); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 2); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 2, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 6); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 6, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_get, + bcmpkt_ifa_flex_md_0_b_t_port_speed_get, + bcmpkt_ifa_flex_md_0_b_t_queue_id_get, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_set, + bcmpkt_ifa_flex_md_0_b_t_port_speed_set, + bcmpkt_ifa_flex_md_0_b_t_queue_id_set, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_get, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_set, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_get, + bcmpkt_ifa_md_base_t_hop_limit_current_length_get, + bcmpkt_ifa_md_base_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_set, + bcmpkt_ifa_md_base_t_hop_limit_current_length_set, + bcmpkt_ifa_md_base_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_get, + bcmpkt_ifa_metadata_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_t_metadata_get, + bcmpkt_ifa_metadata_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_set, + bcmpkt_ifa_metadata_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_t_metadata_set, + bcmpkt_ifa_metadata_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_igmp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_igmp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_igmp_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_igmp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ipfix_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ipfix_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ipfix_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ipfix_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ipv4_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ipv4_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ipv4_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ipv4_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ipv6_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ipv6_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ipv6_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ipv6_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_l2_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_l2_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_l2_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_l2_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mpls_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mpls_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mpls_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mpls_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_p_1588_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_p_1588_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_p_1588_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_p_1588_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_rarp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_rarp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rarp_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_rarp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_routing_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_routing_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_routing_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_routing_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_rspan_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_rspan_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rspan_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_rspan_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_rspan_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_svtag_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_get, + bcmpkt_svtag_t_data_upr_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_svtag_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_set, + bcmpkt_svtag_t_data_upr_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_svtag_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_svtag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_svtag_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_udp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_udp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_udp_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_udp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_vlan_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_vlan_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_vlan_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_vlan_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_vntag_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_get, + bcmpkt_vntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_vntag_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_set, + bcmpkt_vntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_vntag_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_vntag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_vntag_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_vxlan_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_vxlan_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_vxlan_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_vxlan_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_wesp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_wesp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_wesp_t_field_data[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_wesp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_30_6_0_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56780_a0_hna_6_5_30_6_0_flexhdr_info_list[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_arp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_authen_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_bfd_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_cntag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_dest_option_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_esp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_etag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_etag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_etag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ethertype_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_frag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gpe_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gre_key_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gre_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_icmp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_igmp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ipfix_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ipv4_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ipv6_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_l2_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mpls_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_p_1588_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_rarp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_routing_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_rspan_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_svtag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_svtag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_svtag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_udp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_vlan_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_vntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_vntag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_vntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_vxlan_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_30_6_0_wesp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_30_6_0_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_info, + .reasons_info = &bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56780_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56780_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56780_a0_hna_6_5_30_6_0_flexhdr_id_map[] = { + BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56780_a0_hna_6_5_30_6_0_flexhdr_map_get(void) +{ + return bcm56780_a0_hna_6_5_30_6_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56780_a0_hna_6_5_30_6_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56780_a0_hna_6_5_30_6_0_flexhdr_info_list[hid]; +} + +int bcm56780_a0_hna_6_5_30_6_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 14, + -1, + -1, + 66, +}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..1be0c5ede9cb --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,2494 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_dna_6_5_30_1_1_sf_match_id_info.yml + * for device bcm56880_a0 and variant dna_6_5_30_1_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db_info = { + .num_entries = 174, + .db = bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db_info_get(void) { + return &bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map_info = { + .num_entries = 174, + .map = bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map_info_get(void) { + return &bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_pkt_flexhdr.c new file mode 100644 index 000000000000..5ecea72ca06c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_pkt_flexhdr.c @@ -0,0 +1,7975 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56880_a0 and variant dna_6_5_30_1_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[12] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[12] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[12] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[12] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[12] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[12] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[12] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[12] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[12] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[12] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[12] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[12] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[12] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[12] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[12] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[12] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[12] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[11] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[11] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[11] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[11] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[11] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[11] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[11] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[11] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[11] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[12] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[12] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[12] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[12] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[12] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[12] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[12] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[12] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[12] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[12] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[12] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[12] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[12] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[12] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[12] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[12] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[12] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[12] |= (0x1 << 31); + } + reason[11] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[11] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[11] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[11] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[11] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[11] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[11] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[11] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[11] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[11] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_data[] = { + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 208, 223 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "DVP_15_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 311 }, /* Profile 2. */ + { 304, 311 }, /* Profile 3. */ + { 304, 311 }, /* Profile 4. */ + { 304, 311 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { 208, 223 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 376, 379 }, /* Profile 2. */ + { 376, 379 }, /* Profile 3. */ + { 376, 379 }, /* Profile 4. */ + { 376, 379 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 287 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { 272, 287 }, /* Profile 4. */ + { 272, 287 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EVENT_TRACE_VECTOR_31_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 31 }, /* Profile 2. */ + { 0, 31 }, /* Profile 3. */ + { 0, 31 }, /* Profile 4. */ + { 0, 31 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "IFP_IOAM_GBP_ACTION_3_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 372, 375 }, /* Profile 2. */ + { 372, 375 }, /* Profile 3. */ + { 372, 375 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_TIMESTAMP_31_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 95 }, /* Profile 2. */ + { 64, 95 }, /* Profile 3. */ + { 64, 95 }, /* Profile 4. */ + { 64, 95 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_PP_PORT_7_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 231 }, /* Profile 2. */ + { 224, 231 }, /* Profile 3. */ + { 224, 231 }, /* Profile 4. */ + { 224, 231 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 160, 175 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { 160, 175 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 186 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 176, 186 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 144, 154 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 144, 154 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 253 }, /* Profile 2. */ + { 240, 253 }, /* Profile 3. */ + { 240, 253 }, /* Profile 4. */ + { 240, 253 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 365 }, /* Profile 2. */ + { 352, 365 }, /* Profile 3. */ + { 352, 365 }, /* Profile 4. */ + { 352, 365 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "MPLS_LABEL_DECAP_COUNT_3_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 380, 383 }, /* Profile 2. */ + { 380, 383 }, /* Profile 3. */ + { 380, 383 }, /* Profile 4. */ + { 380, 383 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 175 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "NHOP_INDEX_1_15_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + { 336, 351 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SVP_15_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 271 }, /* Profile 2. */ + { 256, 271 }, /* Profile 3. */ + { 256, 271 }, /* Profile 4. */ + { 256, 271 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 396, 399 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "VFI_15_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0", + .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 369 }, /* Profile 2. */ + { 368, 369 }, /* Profile 3. */ + { 368, 369 }, /* Profile 4. */ + { 368, 369 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, +};static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_names[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reasons_info = { + .num_reasons = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_names, + .reason_encode = bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_encode, + .reason_decode = bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_arp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_arp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_arp_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_arp_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_authen_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_authen_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_authen_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_authen_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_bfd_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_bfd_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_bfd_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_bfd_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_cntag_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_cntag_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_cntag_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_cntag_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont0_get, + bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont1_get, + bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont2_get, + bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont3_get, + bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont4_get, + bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont5_get, + bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont6_get, + bcmpkt_cpu_composites_0_ifa_l2_t_macda_get, + bcmpkt_cpu_composites_0_ifa_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont0_set, + bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont1_set, + bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont2_set, + bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont3_set, + bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont4_set, + bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont5_set, + bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont6_set, + bcmpkt_cpu_composites_0_ifa_l2_t_macda_set, + bcmpkt_cpu_composites_0_ifa_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_dest_option_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_dest_option_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_dest_option_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_dest_option_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_esp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_esp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_esp_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_esp_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_esp_t_field_data, +}; + + +static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_etag_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_get, + bcmpkt_etag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_etag_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_set, + bcmpkt_etag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_etag_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_etag_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_etag_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ethertype_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ethertype_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ethertype_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ethertype_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_frag_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_frag_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_frag_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_frag_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_frag_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gpe_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gpe_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gpe_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gpe_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gre_key_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gre_key_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gre_key_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gre_key_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gre_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gre_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gre_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gre_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_gre_t_field_data, +}; + + +static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 4, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 4, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 6, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 6, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 31, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 10); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 10, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 15, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 15, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 4); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 2, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_get, + bcmpkt_hg3_base_t_cng_get, + bcmpkt_hg3_base_t_entropy_get, + bcmpkt_hg3_base_t_ext_hdr_present_get, + bcmpkt_hg3_base_t_hg3_reserved_get, + bcmpkt_hg3_base_t_l3_routed_get, + bcmpkt_hg3_base_t_mirror_copy_get, + bcmpkt_hg3_base_t_reserved_etype_get, + bcmpkt_hg3_base_t_system_destination_get, + bcmpkt_hg3_base_t_system_destination_type_get, + bcmpkt_hg3_base_t_system_source_get, + bcmpkt_hg3_base_t_tc_get, + bcmpkt_hg3_base_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_set, + bcmpkt_hg3_base_t_cng_set, + bcmpkt_hg3_base_t_entropy_set, + bcmpkt_hg3_base_t_ext_hdr_present_set, + bcmpkt_hg3_base_t_hg3_reserved_set, + bcmpkt_hg3_base_t_l3_routed_set, + bcmpkt_hg3_base_t_mirror_copy_set, + bcmpkt_hg3_base_t_reserved_etype_set, + bcmpkt_hg3_base_t_system_destination_set, + bcmpkt_hg3_base_t_system_destination_type_set, + bcmpkt_hg3_base_t_system_source_set, + bcmpkt_hg3_base_t_tc_set, + bcmpkt_hg3_base_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_field_data, +}; + + +static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_lsb_get, + bcmpkt_hg3_extension_0_t_class_id_msb_get, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, + bcmpkt_hg3_extension_0_t_flags_get, + bcmpkt_hg3_extension_0_t_forwarding_domain_get, + bcmpkt_hg3_extension_0_t_svp_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_lsb_set, + bcmpkt_hg3_extension_0_t_class_id_msb_set, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, + bcmpkt_hg3_extension_0_t_flags_set, + bcmpkt_hg3_extension_0_t_forwarding_domain_set, + bcmpkt_hg3_extension_0_t_svp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_icmp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_icmp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_icmp_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_icmp_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 24); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 2); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 2, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 6); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 6, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_get, + bcmpkt_ifa_flex_md_0_b_t_port_speed_get, + bcmpkt_ifa_flex_md_0_b_t_queue_id_get, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_set, + bcmpkt_ifa_flex_md_0_b_t_port_speed_set, + bcmpkt_ifa_flex_md_0_b_t_queue_id_set, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_get, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_set, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_get, + bcmpkt_ifa_md_base_t_hop_limit_current_length_get, + bcmpkt_ifa_md_base_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_set, + bcmpkt_ifa_md_base_t_hop_limit_current_length_set, + bcmpkt_ifa_md_base_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_get, + bcmpkt_ifa_metadata_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_t_metadata_get, + bcmpkt_ifa_metadata_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_set, + bcmpkt_ifa_metadata_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_t_metadata_set, + bcmpkt_ifa_metadata_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_igmp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_igmp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_igmp_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_igmp_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ipfix_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ipfix_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ipfix_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ipfix_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ipv4_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ipv4_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ipv4_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ipv4_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ipv6_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ipv6_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ipv6_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ipv6_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_l2_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_l2_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_l2_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_l2_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mpls_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mpls_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mpls_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mpls_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_p_1588_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_p_1588_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_p_1588_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_p_1588_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_pim_t_hdr_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_4_5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_4_5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_6_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_6_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_pim_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FID_COUNT] = { + bcmpkt_pim_t_hdr_bytes_0_1_get, + bcmpkt_pim_t_hdr_bytes_2_3_get, + bcmpkt_pim_t_hdr_bytes_4_5_get, + bcmpkt_pim_t_hdr_bytes_6_7_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_pim_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FID_COUNT] = { + bcmpkt_pim_t_hdr_bytes_0_1_set, + bcmpkt_pim_t_hdr_bytes_2_3_set, + bcmpkt_pim_t_hdr_bytes_4_5_set, + bcmpkt_pim_t_hdr_bytes_6_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_pim_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_pim_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_pim_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_rarp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_rarp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rarp_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_rarp_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_routing_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_routing_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_routing_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_routing_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_rspan_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_rspan_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rspan_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_rspan_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_rspan_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_udp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_udp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_udp_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_udp_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_vlan_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_vlan_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_vlan_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_vlan_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_vntag_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_get, + bcmpkt_vntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_vntag_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_set, + bcmpkt_vntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_vntag_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_vntag_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_vntag_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_vxlan_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_vxlan_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_vxlan_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_vxlan_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_wesp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_wesp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_wesp_t_field_data[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_wesp_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_30_1_1_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56880_a0_dna_6_5_30_1_1_flexhdr_info_list[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_arp_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_authen_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_bfd_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_cntag_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_dest_option_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_esp_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_etag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_etag_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_etag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ethertype_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_frag_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gpe_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gre_key_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gre_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_icmp_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_igmp_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ipfix_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ipv4_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ipv6_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_l2_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mpls_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_p_1588_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_pim_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_pim_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_pim_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_rarp_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_routing_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_rspan_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_udp_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_vlan_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_vntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_vntag_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_vntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_vxlan_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_6_5_30_1_1_wesp_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_30_1_1_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_info, + .reasons_info = &bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56880_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56880_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56880_a0_dna_6_5_30_1_1_flexhdr_id_map[] = { + BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56880_a0_dna_6_5_30_1_1_flexhdr_map_get(void) +{ + return bcm56880_a0_dna_6_5_30_1_1_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56880_a0_dna_6_5_30_1_1_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56880_a0_dna_6_5_30_1_1_flexhdr_info_list[hid]; +} + +int bcm56880_a0_dna_6_5_30_1_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 14, + 21, + 22, + 68, +}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..35f0100826ab --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,2410 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_hna_6_5_30_3_0_sf_match_id_info.yml + * for device bcm56880_a0 and variant hna_6_5_30_3_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", + .match = 0x20, + .match_mask = 0x30, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x3f, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 0, + .value = 0x0, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", + .match = 0x10, + .match_mask = 0x30, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", + .match = 0x20, + .match_mask = 0x30, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x3f, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 0, + .value = 0x0, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", + .match = 0x10, + .match_mask = 0x30, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", + .match = 0x20, + .match_mask = 0x30, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x3f, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 0, + .value = 0x0, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", + .match = 0x10, + .match_mask = 0x30, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", + .match = 0x20, + .match_mask = 0x30, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x3f, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 0, + .value = 0x0, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", + .match = 0x10, + .match_mask = 0x30, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db_info = { + .num_entries = 168, + .db = bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db_info_get(void) { + return &bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map_info = { + .num_entries = 168, + .map = bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map_info_get(void) { + return &bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_pkt_flexhdr.c new file mode 100644 index 000000000000..808a69c2b681 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_pkt_flexhdr.c @@ -0,0 +1,7336 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56880_a0 and variant hna_6_5_30_3_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[12] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[12] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[12] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[12] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[12] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[12] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[12] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[12] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[12] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[12] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[12] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[12] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[12] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[12] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[12] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[12] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[12] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[11] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[11] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[11] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[11] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[11] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[11] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[11] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[11] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[11] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + } + if (reason[11] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[12] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[12] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[12] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[12] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[12] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[12] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[12] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[12] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[12] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[12] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[12] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[12] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[12] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[12] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[12] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[12] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[12] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[12] |= (0x1 << 31); + } + reason[11] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[11] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[11] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[11] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[11] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[11] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[11] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[11] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[11] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { + reason[11] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[11] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_data[] = { + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + { 240, 255 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "DVP_15_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 367 }, /* Profile 2. */ + { 352, 367 }, /* Profile 3. */ + { 352, 367 }, /* Profile 4. */ + { 352, 367 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 183 }, /* Profile 2. */ + { 176, 183 }, /* Profile 3. */ + { 176, 183 }, /* Profile 4. */ + { 176, 183 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 255 }, /* Profile 2. */ + { 240, 255 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 372, 375 }, /* Profile 2. */ + { 372, 375 }, /* Profile 3. */ + { 372, 375 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EVENT_TRACE_VECTOR_31_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 31 }, /* Profile 2. */ + { 0, 31 }, /* Profile 3. */ + { 0, 31 }, /* Profile 4. */ + { 0, 31 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "IFP_IOAM_GBP_ACTION_3_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 380, 383 }, /* Profile 2. */ + { 380, 383 }, /* Profile 3. */ + { 380, 383 }, /* Profile 4. */ + { 380, 383 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_PORT_GROUP_ID_3_0_3_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_PORT_GROUP_ID_7_4_3_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_TIMESTAMP_31_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 95 }, /* Profile 2. */ + { 64, 95 }, /* Profile 3. */ + { 64, 95 }, /* Profile 4. */ + { 64, 95 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_PP_PORT_ITAG_PRESERVE_15_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 239 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 224, 239 }, /* Profile 4. */ + { 224, 239 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 122 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 112, 122 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 128, 138 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 128, 138 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 173 }, /* Profile 2. */ + { 160, 173 }, /* Profile 3. */ + { 160, 173 }, /* Profile 4. */ + { 160, 173 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 141 }, /* Profile 2. */ + { 112, 125 }, /* Profile 3. */ + { 128, 141 }, /* Profile 4. */ + { 112, 125 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + { 336, 351 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "NHOP_INDEX_1_15_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { 208, 223 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 208, 223 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SVP_15_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 319 }, /* Profile 2. */ + { 304, 319 }, /* Profile 3. */ + { 304, 319 }, /* Profile 4. */ + { 304, 319 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 287 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { 272, 287 }, /* Profile 4. */ + { 272, 287 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 376, 379 }, /* Profile 2. */ + { 376, 379 }, /* Profile 3. */ + { 376, 379 }, /* Profile 4. */ + { 376, 379 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 271 }, /* Profile 2. */ + { 256, 271 }, /* Profile 3. */ + { 256, 271 }, /* Profile 4. */ + { 256, 271 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 371 }, /* Profile 2. */ + { 368, 371 }, /* Profile 3. */ + { 368, 371 }, /* Profile 4. */ + { 368, 371 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 396, 399 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "VFI_15_0", + .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, +};static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_names[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_names, + .reason_encode = bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_arp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_arp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_arp_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_arp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_authen_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_authen_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_authen_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_authen_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_bfd_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_bfd_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_bfd_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_bfd_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_cntag_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_cntag_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_cntag_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_cntag_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_dest_option_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_dest_option_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_dest_option_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_dest_option_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_esp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_esp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_esp_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_esp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_esp_t_field_data, +}; + + +static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_etag_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_get, + bcmpkt_etag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_etag_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_set, + bcmpkt_etag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_etag_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_etag_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_etag_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ethertype_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ethertype_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ethertype_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ethertype_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_frag_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_frag_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_frag_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_frag_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_frag_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_svp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, + bcmpkt_generic_loopback_t_svp_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, + bcmpkt_generic_loopback_t_svp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gpe_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gpe_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gpe_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gpe_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gre_key_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gre_key_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gre_key_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gre_key_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gre_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gre_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gre_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gre_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_gre_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_icmp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_icmp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_icmp_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_icmp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 24); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 2); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 2, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 6); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 6, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_get, + bcmpkt_ifa_flex_md_0_b_t_port_speed_get, + bcmpkt_ifa_flex_md_0_b_t_queue_id_get, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_set, + bcmpkt_ifa_flex_md_0_b_t_port_speed_set, + bcmpkt_ifa_flex_md_0_b_t_queue_id_set, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_get, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_set, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_get, + bcmpkt_ifa_md_base_t_hop_limit_current_length_get, + bcmpkt_ifa_md_base_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_set, + bcmpkt_ifa_md_base_t_hop_limit_current_length_set, + bcmpkt_ifa_md_base_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_get, + bcmpkt_ifa_metadata_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_t_metadata_get, + bcmpkt_ifa_metadata_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_set, + bcmpkt_ifa_metadata_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_t_metadata_set, + bcmpkt_ifa_metadata_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_igmp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_igmp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_igmp_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_igmp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ipfix_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ipfix_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ipfix_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ipfix_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ipv4_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ipv4_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ipv4_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ipv4_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ipv6_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ipv6_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ipv6_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ipv6_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_l2_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_l2_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_l2_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_l2_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mpls_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mpls_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mpls_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mpls_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_p_1588_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_p_1588_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_p_1588_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_p_1588_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_rarp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_rarp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rarp_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_rarp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_routing_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_routing_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_routing_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_routing_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_rspan_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_rspan_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rspan_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_rspan_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_rspan_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_udp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_udp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_udp_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_udp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_vlan_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_vlan_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_vlan_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_vlan_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_vntag_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_get, + bcmpkt_vntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_vntag_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_set, + bcmpkt_vntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_vntag_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_vntag_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_vntag_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_vxlan_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_vxlan_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_vxlan_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_vxlan_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_wesp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_wesp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_wesp_t_field_data[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_wesp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_30_3_0_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56880_a0_hna_6_5_30_3_0_flexhdr_info_list[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_arp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_authen_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_bfd_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_cntag_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_dest_option_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_esp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_etag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_etag_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_etag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ethertype_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_frag_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gpe_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gre_key_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gre_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_icmp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_igmp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ipfix_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ipv4_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ipv6_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_l2_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mpls_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_p_1588_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_rarp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_routing_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_rspan_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_udp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_vlan_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_vntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_vntag_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_vntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_vxlan_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_30_3_0_wesp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_30_3_0_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_info, + .reasons_info = &bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56880_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56880_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56880_a0_hna_6_5_30_3_0_flexhdr_id_map[] = { + BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56880_a0_hna_6_5_30_3_0_flexhdr_map_get(void) +{ + return bcm56880_a0_hna_6_5_30_3_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56880_a0_hna_6_5_30_3_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56880_a0_hna_6_5_30_3_0_flexhdr_info_list[hid]; +} + +int bcm56880_a0_hna_6_5_30_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 13, + -1, + -1, + 64, +}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..204bc407c6fa --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,2634 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_nfa_6_5_30_1_1_sf_match_id_info.yml + * for device bcm56880_a0 and variant nfa_6_5_30_1_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OPAQUETAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN */ + .name = "EGRESS_PKT_FWD_L2_HDR_RSPAN", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x8, + .match_mask = 0x58, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x418, + .match_mask = 0x658, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x646, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x98, + .match_mask = 0x1d8, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x1006, + .match_mask = 0x3846, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x4, + .match_mask = 0x46, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x204, + .match_mask = 0x646, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x804, + .match_mask = 0x3846, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE", + .match = 0x826, + .match_mask = 0x3866, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3826, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x410, + .match_mask = 0x658, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x10, + .match_mask = 0x58, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x18, + .match_mask = 0x58, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x46, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3866, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x46, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x80, + .match_mask = 0x1d8, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x1000, + .match_mask = 0x3806, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x806, + .match_mask = 0x3866, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_RSPAN", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x8, + .match_mask = 0x58, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x418, + .match_mask = 0x658, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x646, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x98, + .match_mask = 0x1d8, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x1006, + .match_mask = 0x3846, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x4, + .match_mask = 0x46, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x204, + .match_mask = 0x646, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x804, + .match_mask = 0x3846, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE", + .match = 0x826, + .match_mask = 0x3866, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3826, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x410, + .match_mask = 0x658, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x10, + .match_mask = 0x58, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x18, + .match_mask = 0x58, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x46, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3866, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x46, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x80, + .match_mask = 0x1d8, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x1000, + .match_mask = 0x3806, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x806, + .match_mask = 0x3866, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OPAQUETAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN */ + .name = "INGRESS_PKT_INNER_L2_HDR_RSPAN", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x8, + .match_mask = 0x58, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x418, + .match_mask = 0x658, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x646, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x98, + .match_mask = 0x1d8, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3826, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x410, + .match_mask = 0x658, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x10, + .match_mask = 0x58, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x18, + .match_mask = 0x58, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x46, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3866, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x46, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x80, + .match_mask = 0x1d8, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x1000, + .match_mask = 0x3806, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN */ + .name = "INGRESS_PKT_OUTER_L2_HDR_RSPAN", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x8, + .match_mask = 0x58, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x418, + .match_mask = 0x658, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x646, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x98, + .match_mask = 0x1d8, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x1006, + .match_mask = 0x3846, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x4, + .match_mask = 0x46, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x204, + .match_mask = 0x646, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x804, + .match_mask = 0x3846, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE", + .match = 0x826, + .match_mask = 0x3866, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3826, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x410, + .match_mask = 0x658, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x10, + .match_mask = 0x58, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x18, + .match_mask = 0x58, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x46, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3866, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x46, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x80, + .match_mask = 0x1d8, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x1000, + .match_mask = 0x3806, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x806, + .match_mask = 0x3866, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db_info = { + .num_entries = 184, + .db = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db_info_get(void) { + return &bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map_info = { + .num_entries = 184, + .map = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map_info_get(void) { + return &bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_pkt_flexhdr.c new file mode 100644 index 000000000000..712374abd773 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_pkt_flexhdr.c @@ -0,0 +1,7065 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56880_a0 and variant nfa_6_5_30_1_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[12] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[12] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[12] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[12] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[12] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[12] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[12] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[12] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[12] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[12] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[12] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[12] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[12] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[12] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[12] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[12] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[12] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[11] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[11] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[11] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[11] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[11] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[11] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[11] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[11] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[11] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS); + } + if (reason[11] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS); + } + if (reason[11] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF); + } + if (reason[11] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED); + } + if (reason[11] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED); + } + if (reason[11] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[12] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[12] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[12] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[12] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[12] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[12] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[12] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[12] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[12] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[12] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[12] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[12] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[12] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[12] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[12] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[12] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[12] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[12] |= (0x1 << 31); + } + reason[11] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[11] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[11] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[11] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[11] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[11] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[11] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[11] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[11] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS)) { + reason[11] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS)) { + reason[11] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF)) { + reason[11] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED)) { + reason[11] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED)) { + reason[11] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[11] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_data[] = { + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "DVP_15_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 255 }, /* Profile 2. */ + { 240, 255 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + { 240, 255 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 167 }, /* Profile 2. */ + { 144, 151 }, /* Profile 3. */ + { 160, 167 }, /* Profile 4. */ + { 144, 151 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 319 }, /* Profile 2. */ + { 304, 319 }, /* Profile 3. */ + { 304, 319 }, /* Profile 4. */ + { 304, 319 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EVENT_TRACE_VECTOR_31_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 31 }, /* Profile 2. */ + { 0, 31 }, /* Profile 3. */ + { 0, 31 }, /* Profile 4. */ + { 0, 31 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 376, 379 }, /* Profile 2. */ + { 376, 379 }, /* Profile 3. */ + { 376, 379 }, /* Profile 4. */ + { 376, 379 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_ETAG_ACTION_3_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 372, 375 }, /* Profile 2. */ + { 372, 375 }, /* Profile 3. */ + { 372, 375 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_ETAG_PCP_DEI_3_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 371 }, /* Profile 2. */ + { 368, 371 }, /* Profile 3. */ + { 368, 371 }, /* Profile 4. */ + { 368, 371 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_ETAG_VID_16_15_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_TIMESTAMP_31_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 95 }, /* Profile 2. */ + { 64, 95 }, /* Profile 3. */ + { 64, 95 }, /* Profile 4. */ + { 64, 95 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_PP_PORT_7_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 263 }, /* Profile 2. */ + { 256, 263 }, /* Profile 3. */ + { 256, 263 }, /* Profile 4. */ + { 256, 263 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 138 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 128, 138 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 208, 218 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 208, 218 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 365 }, /* Profile 2. */ + { 352, 365 }, /* Profile 3. */ + { 352, 365 }, /* Profile 4. */ + { 352, 365 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 237 }, /* Profile 2. */ + { 224, 237 }, /* Profile 3. */ + { 224, 237 }, /* Profile 4. */ + { 224, 237 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "MPLS_LABEL_DECAP_COUNT_3_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + { 336, 351 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "NHOP_INDEX_1_15_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 191 }, /* Profile 2. */ + { 160, 175 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ + { 160, 175 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SVP_15_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 396, 399 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "T_VLAN_TAG_VALUE_15_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 287 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { 272, 287 }, /* Profile 4. */ + { 272, 287 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 380, 383 }, /* Profile 2. */ + { 380, 383 }, /* Profile 3. */ + { 380, 383 }, /* Profile 4. */ + { 380, 383 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "VFI_15_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", + .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, +};static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_names[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reasons_info = { + .num_reasons = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_names, + .reason_encode = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_encode, + .reason_decode = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_arp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_arp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_arp_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_arp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_authen_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_authen_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_authen_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_authen_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_bfd_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_bfd_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_bfd_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_bfd_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_esp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_esp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_esp_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_esp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_esp_t_field_data, +}; + + +static int32_t bcmpkt_etag_t_pcp_dei_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_etag_t_pcp_dei_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_etag_t_rsrvd0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 30, 2); + + return ret; +} + +static int32_t bcmpkt_etag_t_rsrvd0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_etag_t_rsrvd1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_rsrvd1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_etag_t_svid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_etag_t_svid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_etag_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 14); + + return ret; +} + +static int32_t bcmpkt_etag_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 14, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_etag_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_pcp_dei_get, + bcmpkt_etag_t_rsrvd0_get, + bcmpkt_etag_t_rsrvd1_get, + bcmpkt_etag_t_svid_get, + bcmpkt_etag_t_tpid_get, + bcmpkt_etag_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_etag_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_pcp_dei_set, + bcmpkt_etag_t_rsrvd0_set, + bcmpkt_etag_t_rsrvd1_set, + bcmpkt_etag_t_svid_set, + bcmpkt_etag_t_tpid_set, + bcmpkt_etag_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_etag_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_etag_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_etag_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_frag_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_frag_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_frag_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_frag_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_frag_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gpe_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gpe_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gpe_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gpe_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_vn_id_lower_entropy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_key_t_vn_id_lower_entropy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_key_t_vn_id_upper_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_key_t_vn_id_upper_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_vn_id_lower_entropy_get, + bcmpkt_gre_key_t_vn_id_upper_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_vn_id_lower_entropy_set, + bcmpkt_gre_key_t_vn_id_upper_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gre_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gre_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gre_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gre_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_gre_t_field_data, +}; + + +static int32_t bcmpkt_gtp_12byte_t_bytes_11_8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_12byte_t_bytes_11_8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_12byte_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_12byte_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_12byte_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_12byte_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FID_COUNT] = { + bcmpkt_gtp_12byte_t_bytes_11_8_get, + bcmpkt_gtp_12byte_t_bytes_3_0_get, + bcmpkt_gtp_12byte_t_bytes_7_4_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FID_COUNT] = { + bcmpkt_gtp_12byte_t_bytes_11_8_set, + bcmpkt_gtp_12byte_t_bytes_3_0_set, + bcmpkt_gtp_12byte_t_bytes_7_4_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_field_data, +}; + + +static int32_t bcmpkt_gtp_8byte_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_8byte_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_8byte_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_8byte_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FID_COUNT] = { + bcmpkt_gtp_8byte_t_bytes_3_0_get, + bcmpkt_gtp_8byte_t_bytes_7_4_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FID_COUNT] = { + bcmpkt_gtp_8byte_t_bytes_3_0_set, + bcmpkt_gtp_8byte_t_bytes_7_4_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_field_data, +}; + + +static int32_t bcmpkt_gtp_ext_4byte_t_ext_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_ext_4byte_t_ext_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT] = { + bcmpkt_gtp_ext_4byte_t_ext_hdr_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT] = { + bcmpkt_gtp_ext_4byte_t_ext_hdr_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_field_data, +}; + + +static int32_t bcmpkt_gtp_with_ext_t_bytes_11_8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_with_ext_t_bytes_11_8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_with_ext_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_with_ext_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_with_ext_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_with_ext_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT] = { + bcmpkt_gtp_with_ext_t_bytes_11_8_get, + bcmpkt_gtp_with_ext_t_bytes_3_0_get, + bcmpkt_gtp_with_ext_t_bytes_7_4_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT] = { + bcmpkt_gtp_with_ext_t_bytes_11_8_set, + bcmpkt_gtp_with_ext_t_bytes_3_0_set, + bcmpkt_gtp_with_ext_t_bytes_7_4_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_icmp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_icmp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_icmp_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_icmp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_icmp_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_igmp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_igmp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_igmp_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_igmp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_l2_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_l2_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_l2_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_l2_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mpls_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mpls_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mpls_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mpls_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_mpls_t_field_data, +}; + + +static int32_t bcmpkt_opaquetag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_opaquetag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_opaquetag_t_vlan_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_opaquetag_t_vlan_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FID_COUNT] = { + bcmpkt_opaquetag_t_tpid_get, + bcmpkt_opaquetag_t_vlan_tag_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FID_COUNT] = { + bcmpkt_opaquetag_t_tpid_set, + bcmpkt_opaquetag_t_vlan_tag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_rarp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_rarp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rarp_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_rarp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_routing_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_routing_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_routing_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_routing_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_rspan_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_rspan_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rspan_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_rspan_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_rspan_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_udp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_udp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_udp_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_udp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_vlan_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_vlan_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_vlan_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_vlan_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_vntag_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_get, + bcmpkt_vntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_vntag_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_set, + bcmpkt_vntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_vntag_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_vntag_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_vntag_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_lower_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_lower_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_upper_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_upper_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_vn_id_lower_reserved2_get, + bcmpkt_vxlan_t_vn_id_upper_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_vn_id_lower_reserved2_set, + bcmpkt_vxlan_t_vn_id_upper_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_wesp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_wesp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_wesp_t_field_data[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_wesp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_30_1_1_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56880_a0_nfa_6_5_30_1_1_flexhdr_info_list[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_arp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_authen_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_bfd_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_esp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_etag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_etag_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_etag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_frag_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gpe_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gre_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_icmp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_igmp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_l2_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mpls_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_rarp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_routing_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_rspan_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_udp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_vlan_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_vntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_vntag_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_vntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_wesp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_info, + .reasons_info = &bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56880_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56880_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56880_a0_nfa_6_5_30_1_1_flexhdr_id_map[] = { + BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56880_a0_nfa_6_5_30_1_1_flexhdr_map_get(void) +{ + return bcm56880_a0_nfa_6_5_30_1_1_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56880_a0_nfa_6_5_30_1_1_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56880_a0_nfa_6_5_30_1_1_flexhdr_info_list[hid]; +} + +int bcm56880_a0_nfa_6_5_30_1_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 12, + -1, + -1, + 60, +}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..e881973ef1e1 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,1443 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56890_a0_cna_6_5_30_2_0_sf_match_id_info.yml + * for device bcm56890_a0 and variant cna_6_5_30_2_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = +{ + 0x8, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = +{ + 0xe, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = +{ + 0xc, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[1] = +{ + 0x7fffe, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[1] = +{ + 0x810, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[1] = +{ + 0x3f8, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[1] = +{ + 0x1fc00, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[1] = +{ + 0x20000, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[1] = +{ + 0x3060, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[1] = +{ + 0x2040, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[1] = +{ + 0xc180, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[1] = +{ + 0x40000, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[1] = +{ + 0x10200, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[1] = +{ + 0x8100, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[1] = +{ + 0x28, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[1] = +{ + 0x3e, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[1] = +{ + 0x30, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[1] = +{ + 0x1ffffe, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[1] = +{ + 0x1010, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[1] = +{ + 0x7f8, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[1] = +{ + 0x7f800, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[1] = +{ + 0x80000, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[1] = +{ + 0x6060, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[1] = +{ + 0x4040, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[1] = +{ + 0x38380, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[1] = +{ + 0x100000, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[1] = +{ + 0x40400, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[1] = +{ + 0x10100, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[1] = +{ + 0x20200, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = +{ + 0x8, +}; + + +static bcmpkt_rxpmd_match_id_db_t +bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + .zone_minbit = 10, + .arc_id_mask = 0xc00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + .zone_minbit = 10, + .arc_id_mask = 0xc00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 12, + .zone_minbit = 10, + .arc_id_mask = 0xc00, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + .zone_minbit = 10, + .arc_id_mask = 0xc00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1c, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1c, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 4, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1c, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1c, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback, + + }, + { + /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info = { + .num_entries = 77, + .db = bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info_get(void) { + return &bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info = { + .num_entries = 77, + .map = bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info_get(void) { + return &bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_pkt_flexhdr.c new file mode 100644 index 000000000000..93a8aa7726a5 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_pkt_flexhdr.c @@ -0,0 +1,4021 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56890_a0 and variant cna_6_5_30_2_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_field_data[] = { + { + .name = "DROP_CODE_15_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "DVP_15_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 112, 127 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 343 }, /* Profile 2. */ + { 336, 343 }, /* Profile 3. */ + { 336, 343 }, /* Profile 4. */ + { 304, 311 }, /* Profile 5. */ + { 304, 311 }, /* Profile 6. */ + { 304, 311 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 368, 371 }, /* Profile 5. */ + { 368, 371 }, /* Profile 6. */ + { 368, 371 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 383 }, /* Profile 2. */ + { 368, 383 }, /* Profile 3. */ + { 368, 383 }, /* Profile 4. */ + { 336, 351 }, /* Profile 5. */ + { 336, 351 }, /* Profile 6. */ + { 336, 351 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EP_NIH_HDR_DROP_CODE_15_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 144, 159 }, /* Profile 6. */ + }, + .profile_cnt = 7, + }, + { + .name = "EP_NIH_HDR_RECIRC_CODE_3_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 356, 359 }, /* Profile 5. */ + { 356, 359 }, /* Profile 6. */ + { 356, 359 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { 112, 127 }, /* Profile 6. */ + }, + .profile_cnt = 7, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 175 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + { 128, 143 }, /* Profile 6. */ + }, + .profile_cnt = 7, + }, + { + .name = "ERSPAN3_GBP_SID_15_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 367 }, /* Profile 2. */ + { 352, 367 }, /* Profile 3. */ + { 352, 367 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + { 320, 335 }, /* Profile 6. */ + { 320, 335 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EVENT_TRACE_VECTOR_15_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + { 0, 15 }, /* Profile 5. */ + { 0, 15 }, /* Profile 6. */ + { 0, 15 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EVENT_TRACE_VECTOR_31_16", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 16, 31 }, /* Profile 2. */ + { 16, 31 }, /* Profile 3. */ + { 16, 31 }, /* Profile 4. */ + { 16, 31 }, /* Profile 5. */ + { 16, 31 }, /* Profile 6. */ + { 16, 31 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + { 32, 47 }, /* Profile 6. */ + { 32, 47 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { 208, 223 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + { 176, 191 }, /* Profile 6. */ + { 176, 191 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ING_TIMESTAMP_15_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ING_TIMESTAMP_31_16", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 144, 159 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "INGRESS_PP_PORT_8_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 280 }, /* Profile 2. */ + { 272, 280 }, /* Profile 3. */ + { 272, 280 }, /* Profile 4. */ + { 240, 248 }, /* Profile 5. */ + { 240, 248 }, /* Profile 6. */ + { 240, 248 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 239 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 224, 239 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + { 192, 207 }, /* Profile 6. */ + { 192, 207 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 376, 379 }, /* Profile 5. */ + { 376, 379 }, /* Profile 6. */ + { 376, 379 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 416, 419 }, /* Profile 2. */ + { 416, 419 }, /* Profile 3. */ + { 416, 419 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + { 384, 387 }, /* Profile 6. */ + { 384, 387 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 202 }, /* Profile 2. */ + { 192, 202 }, /* Profile 3. */ + { 192, 202 }, /* Profile 4. */ + { 160, 170 }, /* Profile 5. */ + { 160, 170 }, /* Profile 6. */ + { 160, 170 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 106 }, /* Profile 2. */ + { 80, 90 }, /* Profile 3. */ + { 96, 106 }, /* Profile 4. */ + { 96, 106 }, /* Profile 5. */ + { 80, 90 }, /* Profile 6. */ + { 96, 106 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L2_TUNNEL_SVP_15_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 255 }, /* Profile 2. */ + { 240, 255 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + { 208, 223 }, /* Profile 5. */ + { 208, 223 }, /* Profile 6. */ + { 208, 223 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 269 }, /* Profile 2. */ + { 256, 269 }, /* Profile 3. */ + { 256, 269 }, /* Profile 4. */ + { 224, 237 }, /* Profile 5. */ + { 224, 237 }, /* Profile 6. */ + { 224, 237 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 125 }, /* Profile 2. */ + { 96, 109 }, /* Profile 3. */ + { 112, 125 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 318 }, /* Profile 2. */ + { 304, 318 }, /* Profile 3. */ + { 304, 318 }, /* Profile 4. */ + { 272, 286 }, /* Profile 5. */ + { 272, 286 }, /* Profile 6. */ + { 272, 286 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "NHOP_INDEX_1_14_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 190 }, /* Profile 2. */ + { 160, 174 }, /* Profile 3. */ + { 176, 190 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 79 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 64, 79 }, /* Profile 4. */ + { 64, 79 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + { 64, 79 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + { 372, 375 }, /* Profile 6. */ + { 372, 375 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 360, 363 }, /* Profile 5. */ + { 360, 363 }, /* Profile 6. */ + { 360, 363 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + { 288, 303 }, /* Profile 6. */ + { 288, 303 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 364, 367 }, /* Profile 5. */ + { 364, 367 }, /* Profile 6. */ + { 364, 367 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 256, 271 }, /* Profile 5. */ + { 256, 271 }, /* Profile 6. */ + { 256, 271 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "TAG_ACTION_CTRL_1_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 413 }, /* Profile 2. */ + { 412, 413 }, /* Profile 3. */ + { 412, 413 }, /* Profile 4. */ + { 380, 381 }, /* Profile 5. */ + { 380, 381 }, /* Profile 6. */ + { 380, 381 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 352, 355 }, /* Profile 5. */ + { 352, 355 }, /* Profile 6. */ + { 352, 355 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "VFI_15_0", + .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 80, 95 }, /* Profile 2. */ + { 64, 79 }, /* Profile 3. */ + { 80, 95 }, /* Profile 4. */ + { 80, 95 }, /* Profile 5. */ + { 64, 79 }, /* Profile 6. */ + { 80, 95 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, +};static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_names[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_names, + .reason_encode = bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_arp_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_arp_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_arp_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_arp_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ethertype_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ethertype_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_ethertype_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_ethertype_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_icmp_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_icmp_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_icmp_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_icmp_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ipfix_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ipfix_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_ipfix_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_ipfix_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ipv4_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ipv4_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_ipv4_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_ipv4_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ipv6_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ipv6_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_ipv6_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_ipv6_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_l2_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_l2_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_l2_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_l2_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get, + bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set, + bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_rarp_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_rarp_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_rarp_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_rarp_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_udp_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_udp_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_udp_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_udp_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_vlan_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_vlan_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_vlan_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_vlan_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_vxlan_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_vxlan_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_vxlan_t_field_data[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_vxlan_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_30_2_0_vxlan_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56890_a0_cna_6_5_30_2_0_flexhdr_info_list[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_arp_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_ethertype_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_icmp_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_ipfix_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_ipv4_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_ipv6_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_l2_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_rarp_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_udp_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_vlan_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_30_2_0_vxlan_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_30_2_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_field_info, + .reasons_info = &bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56890_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56890_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56890_a0_cna_6_5_30_2_0_flexhdr_id_map[] = { + BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56890_a0_cna_6_5_30_2_0_flexhdr_map_get(void) +{ + return bcm56890_a0_cna_6_5_30_2_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56890_a0_cna_6_5_30_2_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56890_a0_cna_6_5_30_2_0_flexhdr_info_list[hid]; +} + +int bcm56890_a0_cna_6_5_30_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 7, + -1, + -1, + 27, +}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..e15b2d476da5 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,7279 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56890_a0_dna_6_5_30_8_0_sf_match_id_info.yml + * for device bcm56890_a0 and variant dna_6_5_30_8_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] = +{ + 0x366c, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = +{ + 0x78f0, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = +{ + 0x1fffe, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = +{ + 0xff00, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] = +{ + 0x1e4c8, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] = +{ + 0x10, + 0x400000, + 0x1dd8000, + 0x20, + 0x0, + 0x0, + 0x0, + 0xbfddfddf, + 0xf77fbbfb, + 0xddfddf77, + 0x1, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x400000, + 0x0, + 0x100, + 0x800776, + 0x0, + 0x0, + 0x0, + 0xf77c0000, + 0xefeeff77, + 0x7ddfddfe, + 0x777f7, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde, + 0x0, + 0x0, + 0x7778, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0x0, + 0x3bbc0, + 0x0, + 0x0, + 0x77780, + 0x0, + 0x0, + 0x3bbc0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0xdde00000, + 0x1, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0xde000000, + 0x1d, + 0x0, + 0x0, + 0xeef0, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] = +{ + 0x0, + 0x0, + 0x100000, + 0x1000000, + 0x0, + 0x0, + 0x2000, + 0x100100, + 0x4002002, + 0x10010040, + 0x400400, + 0x10008008, + 0x40040100, + 0x1001000, + 0x40040020, + 0x100100, + 0x4002002, + 0x80080040, + 0x200200, + 0x2002000, + 0x80040040, + 0x200800, + 0x4004002, + 0x80080, + 0x401001, + 0x2001004, + 0x40040020, + 0x800800, + 0x2002, + 0x0, + 0x0, + 0x40, + 0x400, + 0x0, + 0x80000000, + 0x4000000, + 0x80080040, + 0x1001000, + 0x10004004, + 0x200100, + 0x4004002, + 0x40010010, + 0x800400, + 0x4010010, + 0x80080040, + 0x1001000, + 0x8020020, + 0x80000080, + 0x1000800, + 0x20020010, + 0x80080, + 0x2001001, + 0x40040020, + 0x40100100, + 0x800800, + 0x20010010, + 0x80080200, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xff77f77c, + 0xddfeefee, + 0x77f77ddf, + 0x7, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xddf00000, + 0xbfbbfddf, + 0xf77f77fb, + 0x1ddfdd, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde000, + 0x0, + 0x0, + 0x7778000, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0x3bbc0, + 0x0, + 0x0, + 0x3bbc0000, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0xc0000000, + 0x3bb, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0x1dde, + 0x0, + 0x0, + 0x7778, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0x0, + 0xeef0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0xeef0000, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] = +{ + 0x0, + 0x0, + 0x0, + 0x40, + 0x0, + 0x0, + 0x0, + 0x2000000, + 0x0, + 0x0, + 0x8000000, + 0x0, + 0x0, + 0x20000008, + 0x0, + 0x0, + 0x40000, + 0x0, + 0x0, + 0x40000000, + 0x0, + 0x0, + 0x80000000, + 0x0, + 0x0, + 0x0, + 0x400, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x800, + 0x0, + 0x0, + 0x2000, + 0x0, + 0x200000, + 0x8000, + 0x0, + 0x0, + 0x10, + 0x0, + 0x0, + 0x10000, + 0x0, + 0x0, + 0x20000, + 0x0, + 0x0, + 0x10000000, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] = +{ + 0x1e, + 0x400000, + 0x1dd8000, + 0x3ddcafe0, + 0x0, + 0x8000, + 0xc003bb00, + 0xbfddfddf, + 0xf77fbbfb, + 0xddfddf77, + 0xff77f77d, + 0xddfeefee, + 0x77f77ddf, + 0xfddfddff, + 0x77f77fbb, + 0xbfddfddf, + 0xf77fbbfb, + 0xefeeff77, + 0x7fbbfbbe, + 0xfbbfbbe5, + 0xeff77f77, + 0xbfbbeefe, + 0xf77f77fb, + 0xdfeefeef, + 0x7f77ddfd, + 0xfbbfddf7, + 0x77f77fbb, + 0xbeefeeff, + 0x1bbbfb, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfddfddf0, + 0x77f77fbb, + 0x1ddfddf, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77c00000, + 0xfeeff77f, + 0xf77ddfdd, + 0x777, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0xf0000000, + 0xee, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0xeef, + 0x0, + 0x0, + 0x777800, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0x3bbc000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0x3bbc0000, + 0x0, + 0x0, + 0xe0000000, + 0x1dd, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbe000000, + 0xf77fbbfb, + 0xefeeff77, + 0x3bbfbbe, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xefeef800, + 0xfddfddfe, + 0xeefbbfbb, + 0xeef, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3bbc0, + 0x0, + 0x0, + 0xeef00, + 0x0, + 0xc0000000, + 0x3bb, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0x777800, + 0x0, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0xeef0000, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0xe0000000, + 0x1dd, + 0x0, + 0xc0000000, + 0x3bb, + 0x0, + 0x0, + 0x1dde00, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] = +{ + 0x0, + 0x400000, + 0x0, + 0x80, + 0x0, + 0x8000, + 0x0, + 0x8004004, + 0x140080, + 0x400001, + 0x20010010, + 0x500200, + 0x1000004, + 0x80040040, + 0x1001400, + 0x8004000, + 0x100080, + 0x2002801, + 0x4008000, + 0x80080, + 0x2801001, + 0x8000020, + 0x100100, + 0x5002002, + 0x10000040, + 0x80080000, + 0x1001000, + 0x20028, + 0x80, + 0x0, + 0x100, + 0x2000000, + 0x0, + 0x0, + 0x2, + 0x100000, + 0x2002001, + 0x40050, + 0x400100, + 0x8008004, + 0x100140, + 0x1000400, + 0x50020010, + 0x400, + 0x2002001, + 0xa0040040, + 0x800, + 0x2001002, + 0x40040020, + 0x800a00, + 0x4002000, + 0x80080040, + 0x1001400, + 0x4000, + 0x40020020, + 0xa00400, + 0x2000008, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] = +{ + 0x0, + 0x0, + 0x0, + 0xaf00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x78000000, + 0x5, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbc000000, + 0x2, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x15e000, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] = +{ + 0x0, + 0x0, + 0x0, + 0x8800, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x40000000, + 0x4, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x20000000, + 0x2, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x110000, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] = +{ + 0x0, + 0x0, + 0x0, + 0x40020, + 0x0, + 0x0, + 0x40000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x800000, + 0x10, + 0x0, + 0x0, + 0x10000, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] = +{ + 0x18, + 0x400000, + 0x1dd8000, + 0x3ddcafe0, + 0x0, + 0x8000, + 0x4003bb00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x600000, + 0x0, + 0x100, + 0xbf800776, + 0xf772, + 0x0, + 0xec000002, + 0x1000e, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0xbfddfddf, + 0xf77fbbfb, + 0xddfddf77, + 0xff77f77d, + 0xddfeefee, + 0x77f77ddf, + 0xfddfddff, + 0x77f77fbb, + 0xbfddfddf, + 0xf77fbbfb, + 0xefeeff77, + 0x7fbbfbbe, + 0xfbbfbbe5, + 0xeff77f77, + 0xbfbbeefe, + 0xf77f77fb, + 0xdfeefeef, + 0x7f77ddfd, + 0xfbbfddf7, + 0x77f77fbb, + 0xbeefeeff, + 0x3bbfb, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf77e0000, + 0xefeeff77, + 0x7ddfddfe, + 0xddf777f7, + 0xbfbbfddf, + 0xf77f77fb, + 0x77fddfdd, + 0xfeeff77f, + 0xf77ddfdd, + 0xefeeff77, + 0xfddfddfe, + 0xeefbbfbb, + 0xef95feef, + 0xfddfeefe, + 0xbbfbbfdd, + 0xdfeefeef, + 0xfbbfddfd, + 0x77f77fbb, + 0x77ddfddf, + 0xfeefeeff, + 0xbbfddfdd, + 0xefeefbbf, + 0xe, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] = +{ + 0x0, + 0x0, + 0x400000, + 0x4000000, + 0x0, + 0x0, + 0x8000, + 0x400400, + 0x10008008, + 0x40040100, + 0x1001000, + 0x40020020, + 0x100400, + 0x4004001, + 0x100080, + 0x400401, + 0x10008008, + 0x200100, + 0x800802, + 0x8008000, + 0x100100, + 0x802002, + 0x10010008, + 0x200200, + 0x1004004, + 0x8004010, + 0x100080, + 0x2002001, + 0x8008, + 0x0, + 0x0, + 0x100, + 0x1000, + 0x0, + 0x0, + 0x10000002, + 0x200100, + 0x4004002, + 0x40010010, + 0x800400, + 0x10010008, + 0x40040, + 0x2001001, + 0x10040040, + 0x200100, + 0x4004002, + 0x20080080, + 0x200, + 0x4002002, + 0x80080040, + 0x200200, + 0x8004004, + 0x100080, + 0x400401, + 0x2002001, + 0x80040040, + 0x200800, + 0x2, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbbfbbe0, + 0xeff77f77, + 0xbfbbeefe, + 0x3b, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xef800000, + 0xfddfeefe, + 0xbbfbbfdd, + 0xeefeef, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0xdde00000, + 0x1, + 0x0, + 0x777800, + 0x0, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0xde000000, + 0x1d, + 0x0, + 0x0, + 0xeef0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0x77780, + 0x0, + 0xe0000000, + 0x1dd, + 0x0, + 0xc0000000, + 0x3bb, + 0x0, + 0x0, + 0x3bbc00, + 0x0, + 0x0, + 0x777800, + 0x0, + 0x0, + 0xbbc00000, + 0x3, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf77f77c0, + 0xdfeefeef, + 0x7f77ddfd, + 0x77, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xdf000000, + 0xfbbfddfd, + 0x77f77fbb, + 0x1ddfddf, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0x1dde, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0x0, + 0xeef0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0xeef0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0x1dde00, + 0x0, + 0x0, + 0x3bbc00, + 0x0, + 0x0, + 0xbbc00000, + 0x3, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0x0, + 0x3bbc, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] = +{ + 0x0, + 0x0, + 0x58000, + 0x580e00, + 0x0, + 0x0, + 0xb00, + 0xb0058058, + 0x1600b00, + 0x5805816, + 0xc0160160, + 0x5802c02, + 0x16016058, + 0x580580, + 0x1601600b, + 0xb0058058, + 0x1600b00, + 0x2c02c016, + 0x700b00b0, + 0xb00b00, + 0x2c016016, + 0xb00b02c0, + 0x1601600, + 0x5802c02c, + 0x60160580, + 0xb00581, + 0x1601600b, + 0xb02c02c0, + 0xb00, + 0x0, + 0x0, + 0x38000016, + 0x160, + 0x0, + 0x2c000000, + 0x1600000, + 0x2c02c016, + 0x60580580, + 0x5801601, + 0xb00b0058, + 0x81601600, + 0x16005805, + 0x802c0160, + 0x1605805, + 0x2c02c016, + 0x580580, + 0x2c0b00b, + 0x2c01c02c, + 0x805802c0, + 0xb00b005, + 0x5802c02c, + 0xb00580, + 0x1601600b, + 0x16058058, + 0x802c02c0, + 0xb005805, + 0x2c02c0b0, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] = +{ + 0x0, + 0x0, + 0x50000, + 0x500c00, + 0x0, + 0x0, + 0xa00, + 0xa0050050, + 0x1400a00, + 0x5005014, + 0x80140140, + 0x5002802, + 0x14014050, + 0x500500, + 0x1401400a, + 0xa0050050, + 0x1400a00, + 0x28028014, + 0x600a00a0, + 0xa00a00, + 0x28014014, + 0xa00a0280, + 0x1401400, + 0x50028028, + 0x40140500, + 0xa00501, + 0x1401400a, + 0xa0280280, + 0xa00, + 0x0, + 0x0, + 0x30000014, + 0x140, + 0x0, + 0x28000000, + 0x1400000, + 0x28028014, + 0x40500500, + 0x5001401, + 0xa00a0050, + 0x1401400, + 0x14005005, + 0x280140, + 0x1405005, + 0x28028014, + 0x500500, + 0x280a00a, + 0x28018028, + 0x500280, + 0xa00a005, + 0x50028028, + 0xa00500, + 0x1401400a, + 0x14050050, + 0x280280, + 0xa005005, + 0x280280a0, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] = +{ + 0x0, + 0x0, + 0xd80000, + 0xd80a000, + 0x0, + 0x0, + 0x1b000, + 0xd80d80, + 0x3601b01b, + 0xd80d8360, + 0x3603600, + 0xd806c06c, + 0x60360d80, + 0xd80d803, + 0x603601b0, + 0xd80d83, + 0x3601b01b, + 0xc06c0360, + 0x1b01b06, + 0x1b01b005, + 0xc0360360, + 0x1b06c06, + 0x3603601b, + 0x806c06c0, + 0x360d80d, + 0x1b00d836, + 0x603601b0, + 0x6c06c03, + 0x1b01b, + 0x0, + 0x0, + 0x80000360, + 0x3602, + 0x0, + 0xc0000000, + 0x36000006, + 0xc06c0360, + 0xd80d806, + 0xd8036036, + 0x1b00d80, + 0x3603601b, + 0x600d80d8, + 0x6c03603, + 0x360d80d8, + 0xc06c0360, + 0xd80d806, + 0x6c1b01b0, + 0xc01406c0, + 0xd806c06, + 0xb01b00d8, + 0x806c06c1, + 0x1b00d80d, + 0x603601b0, + 0x60d80d83, + 0x6c06c03, + 0xb00d80d8, + 0xc06c1b01, + 0x6, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x100000, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] = +{ + 0x0, + 0x0, + 0x1000000, + 0x10000000, + 0x0, + 0x0, + 0x20000, + 0x1001000, + 0x40020020, + 0x100400, + 0x4004001, + 0x80080, + 0x401001, + 0x10010004, + 0x400200, + 0x1001004, + 0x40020020, + 0x800400, + 0x2002008, + 0x20020000, + 0x400400, + 0x2008008, + 0x40040020, + 0x800800, + 0x4010010, + 0x20010040, + 0x400200, + 0x8008004, + 0x20020, + 0x0, + 0x0, + 0x400, + 0x4000, + 0x0, + 0x0, + 0x40000008, + 0x800400, + 0x10010008, + 0x40040, + 0x2001001, + 0x40040020, + 0x100100, + 0x8004004, + 0x40100100, + 0x800400, + 0x10010008, + 0x80200200, + 0x800, + 0x10008008, + 0x200100, + 0x800802, + 0x20010010, + 0x400200, + 0x1001004, + 0x8008004, + 0x100100, + 0x802002, + 0x8, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] = +{ + 0x0, + 0x0, + 0x840000, + 0x8400000, + 0x0, + 0x0, + 0x10800, + 0x80840840, + 0x21010810, + 0x84084210, + 0x2102100, + 0x84042042, + 0x10210840, + 0x8408402, + 0x10210108, + 0x80840842, + 0x21010810, + 0x20420210, + 0x1081084, + 0x10810800, + 0x20210210, + 0x81084204, + 0x21021010, + 0x40420420, + 0x2108408, + 0x10808421, + 0x10210108, + 0x84204202, + 0x10810, + 0x0, + 0x0, + 0x210, + 0x2100, + 0x0, + 0x20000000, + 0x21000004, + 0x20420210, + 0x8408404, + 0x84021021, + 0x81080840, + 0x21021010, + 0x10084084, + 0x4202102, + 0x21084084, + 0x20420210, + 0x8408404, + 0x42108108, + 0x20000420, + 0x8404204, + 0x8108084, + 0x40420421, + 0x10808408, + 0x10210108, + 0x10840842, + 0x4204202, + 0x8084084, + 0x20421081, + 0x4, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] = +{ + 0x0, + 0x0, + 0x0, + 0x20000000, + 0x0, + 0x8000, + 0x4003bb00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbbe0000, + 0x77f77fbb, + 0xbeefeeff, + 0x3bbfb, + 0x0, + 0x0, + 0x0, + 0x8000, + 0x0, + 0xec000002, + 0x1000e, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfeefeef8, + 0xbbfddfdd, + 0xefeefbbf, + 0xe, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xdde00000, + 0x1, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0x1dde000, + 0x0, + 0x0, + 0x3bbc000, + 0x0, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0x78000000, + 0x77, + 0x0, + 0x0, + 0x3bbc0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77780, + 0x0, + 0x0, + 0x1dde00, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0xeef, + 0x0, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0x1dde000, + 0x0, + 0x0, + 0xef000000, + 0xe, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[4] = +{ + 0x33033198, + 0xcc66066, + 0x198198cc, + 0x6633033, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[4] = +{ + 0x44044220, + 0x11088088, + 0x22022110, + 0x8844044, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[4] = +{ + 0xffc00000, + 0xffffffff, + 0xffe00000, + 0x7fffffff, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[4] = +{ + 0x0, + 0xfffff800, + 0x0, + 0x7ffffc00, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[4] = +{ + 0xf80f87c0, + 0x3e1f01f0, + 0x7c07c3e0, + 0x1f0f80f8, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[4] = +{ + 0xfffffffe, + 0xffffffff, + 0xffffffff, + 0x7fffffff, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[4] = +{ + 0x1ff800, + 0x7fe003ff, + 0x800ffc00, + 0x3ff001ff, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[4] = +{ + 0xa23a2510, + 0xe8944744, + 0x511d1288, + 0x744a23a2, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag[4] = +{ + 0x0, + 0x0, + 0xffffffff, + 0x7fffffff, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[14] = +{ + 0x10, + 0x0, + 0x4, + 0x20003df6, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7c00000, + 0xfbfefbfd, + 0x7dff7dfe, + 0xf7dfbeff, + 0x7bef, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[35] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7800000, + 0x3d, + 0x0, + 0x0, + 0xf7de0000, + 0x0, + 0x0, + 0x0, + 0x3df7800, + 0x0, + 0x0, + 0x0, + 0xbef00000, + 0x7, + 0x0, + 0x0, + 0xf0000000, + 0x7be, + 0x0, + 0x0, + 0xfbc00000, + 0x1e, + 0x0, + 0x0, + 0x0, + 0x1efbc00, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[40] = +{ + 0x0, + 0x0, + 0x0, + 0x40, + 0x0, + 0x80000, + 0x0, + 0x0, + 0x20000000, + 0x40000000, + 0x20002000, + 0x10001000, + 0x1000800, + 0x1000080, + 0x800080, + 0x400040, + 0x40020, + 0x40002, + 0x20002, + 0x20010002, + 0x1000, + 0x8000000, + 0x4000400, + 0x2000200, + 0x200100, + 0x10, + 0x40008, + 0x20004, + 0x20010002, + 0x20001000, + 0x10001000, + 0x8000800, + 0x800400, + 0x100040, + 0x20002, + 0x80010001, + 0x40008000, + 0x4000800, + 0x11111000, + 0x11, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[18] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7df0000, + 0xfbeffbef, + 0xfdf7fdf7, + 0xbfdf7efb, + 0x1ef, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[36] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1efbc0, + 0x0, + 0x0, + 0x0, + 0x7bef, + 0x0, + 0x0, + 0xbc000000, + 0x1ef, + 0x0, + 0x0, + 0x0, + 0x3df78, + 0x0, + 0x0, + 0x0, + 0x3df7800, + 0x0, + 0x0, + 0x0, + 0xf7de0, + 0x0, + 0x0, + 0x0, + 0xde000000, + 0xf7, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[36] = +{ + 0x0, + 0x0, + 0x0, + 0x40000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x200000, + 0x0, + 0x0, + 0x0, + 0x8000, + 0x0, + 0x0, + 0x200, + 0x200, + 0x0, + 0x0, + 0x0, + 0x40000, + 0x0, + 0x0, + 0x0, + 0x4000000, + 0x0, + 0x0, + 0x0, + 0x100000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x100, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[40] = +{ + 0x1e, + 0x0, + 0x4, + 0xe0003df6, + 0xffffffff, + 0xfbef117, + 0x0, + 0x2000000, + 0xfb000000, + 0xf7f0001e, + 0xfbfefbfd, + 0x7dff7dfe, + 0xf7dfbeff, + 0xf7df7bef, + 0xfbeffbef, + 0xfdf7fdf7, + 0xbfdf7efb, + 0xbfdf7fef, + 0xbfefbfef, + 0xfbf7dfef, + 0xffff7dfe, + 0xbeffffff, + 0xdf7fdf7f, + 0xefbfefbf, + 0xfefbf7df, + 0xfc45ff7d, + 0x7fdf7fbe, + 0xbfefbfdf, + 0xfbf7dfef, + 0xfbff7dfe, + 0x7dff7dfe, + 0xbeffbeff, + 0xfbefdf7f, + 0xbf7dfdf7, + 0xdfefbfef, + 0xeff7dff7, + 0xf7fbeffb, + 0xdf7fbefd, + 0xfffffffb, + 0x1ff, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbfdf7c00, + 0xbfefbfef, + 0xfbf7dfef, + 0xf7dfe, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[36] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbc00000, + 0x1e, + 0x0, + 0x0, + 0x7bef0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xdf780000, + 0x3, + 0x0, + 0x0, + 0x78000000, + 0x3df, + 0x0, + 0x0, + 0x7de00000, + 0xf, + 0x0, + 0x0, + 0x0, + 0xf7de00, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[38] = +{ + 0x0, + 0x0, + 0x0, + 0x180, + 0x0, + 0x300000, + 0x0, + 0x0, + 0xc0000000, + 0x80000000, + 0xc000c001, + 0x60006000, + 0x6003000, + 0x6000300, + 0x3000300, + 0x1800180, + 0x1800c0, + 0x18000c, + 0xc000c, + 0xc006000c, + 0x6000, + 0x30000000, + 0x18001800, + 0xc000c00, + 0xc00600, + 0x60, + 0x180030, + 0xc0018, + 0xc006000c, + 0xc0006000, + 0x60006000, + 0x30003000, + 0x3001800, + 0x600180, + 0xc000c, + 0x60006, + 0x80030003, + 0x18003001, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[22] = +{ + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x3fffffff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfff00000, + 0x7ffff, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[22] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x1fffe, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffc00000, + 0x3f, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[22] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x1fe03fc, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7f800000, + 0x3fc0, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[22] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x31999b30, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x66000000, + 0x63333, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[22] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x3de1e3c0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x78000000, + 0x7bc3c, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[26] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbef80000, + 0xdf7fdf7f, + 0xefbfefbf, + 0xfefbf7df, + 0xf7d, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[37] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7de0, + 0x0, + 0x0, + 0x80000000, + 0x3df7, + 0x0, + 0x0, + 0x1efbc00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1efbc, + 0x0, + 0x0, + 0x0, + 0x1efbc00, + 0x0, + 0x0, + 0x0, + 0x7bef0, + 0x0, + 0x0, + 0x0, + 0xef000000, + 0x7b, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[38] = +{ + 0x0, + 0x0, + 0x4, + 0x0, + 0x40000000, + 0x0, + 0x0, + 0x2000000, + 0x0, + 0x1000000, + 0x800080, + 0x500040, + 0x20, + 0x40002, + 0x20002, + 0x80014001, + 0x8000000, + 0x8001000, + 0xa000800, + 0x400, + 0x40, + 0x200000, + 0x100010, + 0xa0008, + 0x40000004, + 0x20001000, + 0x10001000, + 0xa000800, + 0x400, + 0x800040, + 0x400040, + 0x280020, + 0x10, + 0x1, + 0x4000800, + 0x2000400, + 0x1000280, + 0x100000, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[26] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x117, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x45e000, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[26] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x104, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x410000, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[10] = +{ + 0x0, + 0x0, + 0x0, + 0x20000000, + 0x0, + 0x1000, + 0x0, + 0x0, + 0x0, + 0x100000, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[38] = +{ + 0x0, + 0x0, + 0x0, + 0x100, + 0x0, + 0x200000, + 0x0, + 0x0, + 0x80000000, + 0x0, + 0x80008001, + 0x40004000, + 0x4002000, + 0x4000200, + 0x2000200, + 0x1000100, + 0x100080, + 0x100008, + 0x80008, + 0x80040008, + 0x4000, + 0x20000000, + 0x10001000, + 0x8000800, + 0x800400, + 0x40, + 0x100020, + 0x80010, + 0x80040008, + 0x80004000, + 0x40004000, + 0x20002000, + 0x2001000, + 0x400100, + 0x80008, + 0x40004, + 0x20002, + 0x10002001, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[10] = +{ + 0x18, + 0x0, + 0x4, + 0xe0003df6, + 0xffffffff, + 0xfbef117, + 0x0, + 0x2000000, + 0xfb000000, + 0x10001e, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7e00000, + 0xfbfefbfd, + 0x7dff7dfe, + 0xf7dfbeff, + 0xf7df7bef, + 0xfbeffbef, + 0xfdf7fdf7, + 0xbfdf7efb, + 0xbfdf7fef, + 0xbfefbfef, + 0xfbf7dfef, + 0xffff7dfe, + 0xbeffffff, + 0xdf7fdf7f, + 0xefbfefbf, + 0xfefbf7df, + 0xfc45ff7d, + 0x7fdf7fbe, + 0xbfefbfdf, + 0xfbf7dfef, + 0xfbff7dfe, + 0x7dff7dfe, + 0xbeffbeff, + 0xfbefdf7f, + 0xbf7dfdf7, + 0xdfefbfef, + 0xeff7dff7, + 0xf7fbeffb, + 0xdf7fbefd, + 0x3, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[40] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfffffff8, + 0x3f, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[40] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfffffff0, + 0x3, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3fffffe0, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3ffffc0, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3fff80, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3ff00, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3e00, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[40] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x99999800, + 0x19, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[40] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x22222000, + 0x22, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[40] = +{ + 0x0, + 0x0, + 0x0, + 0x400, + 0x0, + 0x800000, + 0x0, + 0x0, + 0x0, + 0x2, + 0x20004, + 0x10002, + 0x10008001, + 0x10000800, + 0x8000800, + 0x4000400, + 0x400200, + 0x400020, + 0x200020, + 0x100020, + 0x10002, + 0x80000000, + 0x40004000, + 0x20002000, + 0x2001000, + 0x100, + 0x400080, + 0x200040, + 0x100020, + 0x10002, + 0x10002, + 0x80008001, + 0x8004000, + 0x1000400, + 0x200020, + 0x100010, + 0x80008, + 0x40008004, + 0x0, + 0x40, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[30] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf8000000, + 0x7fdf7fbe, + 0xbfefbfdf, + 0xfbf7dfef, + 0xf7dfe, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[37] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7de00000, + 0xf, + 0x0, + 0x0, + 0x3df78000, + 0x0, + 0x0, + 0xbc000000, + 0x1ef, + 0x0, + 0x0, + 0x0, + 0xefbc0000, + 0x1, + 0x0, + 0x0, + 0xbc000000, + 0x1ef, + 0x0, + 0x0, + 0xbef00000, + 0x7, + 0x0, + 0x0, + 0x0, + 0x7bef00, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[40] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[34] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbe00000, + 0x7dff7dfe, + 0xbeffbeff, + 0xfbefdf7f, + 0x3df7, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7bef0, + 0x0, + 0x0, + 0xc0000000, + 0x1efb, + 0x0, + 0x0, + 0xf7de00, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7de, + 0x0, + 0x0, + 0x0, + 0xf7de00, + 0x0, + 0x0, + 0x0, + 0x3df78, + 0x0, + 0x0, + 0x0, + 0xf7800000, + 0x3d, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1[34] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7dc000, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[38] = +{ + 0x0, + 0x0, + 0x0, + 0x16, + 0x0, + 0x2c007, + 0x0, + 0x0, + 0xb000000, + 0x16000000, + 0xb000b00, + 0x5800580, + 0x5802c0, + 0x58002c, + 0x2c002c, + 0x160016, + 0xb001600b, + 0xb0016000, + 0xb000b000, + 0xb005800, + 0x580, + 0x2c00000, + 0x1600160, + 0xb000b0, + 0x800b0058, + 0xc001c005, + 0x60016002, + 0xb000b001, + 0xb005800, + 0xb000580, + 0x5800580, + 0x2c002c0, + 0x2c0160, + 0xb0058016, + 0x5800b000, + 0x2c005800, + 0x16002c00, + 0x16002c0, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[38] = +{ + 0x0, + 0x0, + 0x0, + 0x14, + 0x0, + 0x28006, + 0x0, + 0x0, + 0xa000000, + 0x14000000, + 0xa000a00, + 0x5000500, + 0x500280, + 0x500028, + 0x280028, + 0x140014, + 0xa001400a, + 0xa0014000, + 0xa000a000, + 0xa005000, + 0x500, + 0x2800000, + 0x1400140, + 0xa000a0, + 0xa0050, + 0x80018005, + 0x40014002, + 0xa000a001, + 0xa005000, + 0xa000500, + 0x5000500, + 0x2800280, + 0x280140, + 0xa0050014, + 0x5000a000, + 0x28005000, + 0x14002800, + 0x1400280, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[39] = +{ + 0x0, + 0x0, + 0x0, + 0x1de0, + 0x0, + 0x3bc0110, + 0x0, + 0x0, + 0xf0000000, + 0xe000000e, + 0xf00ef01d, + 0x7807780e, + 0x7783bc07, + 0x77803bc0, + 0x3bc03bc0, + 0x1de01de0, + 0x1de0ef0, + 0x1de00ef, + 0xef00ef, + 0xf07780ef, + 0x7780e, + 0xbc000000, + 0xde01de03, + 0xef00ef01, + 0xef07780, + 0x440778, + 0x1de03bc, + 0xef01de, + 0xf07780ef, + 0xf007780e, + 0x7807780e, + 0xbc03bc07, + 0x3bc1de03, + 0x7781de0, + 0x80ef00ef, + 0xc0778077, + 0xe03bc03b, + 0xde03bc1d, + 0x1, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[40] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x100, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[39] = +{ + 0x0, + 0x0, + 0x0, + 0x2000, + 0x0, + 0x4000000, + 0x0, + 0x0, + 0x0, + 0x10, + 0x100020, + 0x80010, + 0x80040008, + 0x80004000, + 0x40004000, + 0x20002000, + 0x2001000, + 0x2000100, + 0x1000100, + 0x800100, + 0x80010, + 0x0, + 0x20004, + 0x10002, + 0x10008001, + 0x800, + 0x2000400, + 0x1000200, + 0x800100, + 0x80010, + 0x80010, + 0x40008, + 0x40020004, + 0x8002000, + 0x1000100, + 0x800080, + 0x400040, + 0x40020, + 0x2, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[38] = +{ + 0x0, + 0x0, + 0x0, + 0x810, + 0x0, + 0x1020000, + 0x0, + 0x0, + 0x8000000, + 0x10000004, + 0x8040808, + 0x4020404, + 0x20410202, + 0x20401020, + 0x10201020, + 0x8100810, + 0x80810408, + 0x80810040, + 0x80408040, + 0x8204040, + 0x20404, + 0x2000000, + 0x81008101, + 0x40804080, + 0x4082040, + 0x204, + 0x810102, + 0x80408081, + 0x8204040, + 0x8020404, + 0x4020404, + 0x2010202, + 0x10208101, + 0x82040810, + 0x40408040, + 0x20204020, + 0x10102010, + 0x81010208, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[39] = +{ + 0x0, + 0x0, + 0x0, + 0x1000, + 0x0, + 0x2000000, + 0x0, + 0x0, + 0x0, + 0x8, + 0x80010, + 0x40008, + 0x40020004, + 0x40002000, + 0x20002000, + 0x10001000, + 0x1000800, + 0x1000080, + 0x800080, + 0x400080, + 0x40008, + 0x0, + 0x10002, + 0x80008001, + 0x8004000, + 0x400, + 0x1000200, + 0x800100, + 0x400080, + 0x40008, + 0x40008, + 0x20004, + 0x20010002, + 0x4001000, + 0x800080, + 0x400040, + 0x200020, + 0x20010, + 0x1, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x8000000, + 0x0, + 0x2000000, + 0xfb000000, + 0x10001e, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xdfefbe00, + 0xeff7dff7, + 0xf7fbeffb, + 0xdf7fbefd, + 0x3, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7bef, + 0x0, + 0x0, + 0xbc000000, + 0x1ef, + 0x0, + 0x0, + 0xf7de0, + 0x0, + 0x0, + 0x0, + 0xe0000000, + 0xf7d, + 0x0, + 0x0, + 0x0, + 0xf7de0, + 0x0, + 0x0, + 0x80000000, + 0x3df7, + 0x0, + 0x0, + 0x0, + 0xdf780000, + 0x3, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = +{ + 0x8, +}; + + +static bcmpkt_rxpmd_match_id_db_t +bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_CNTAG", + .match = 0x100, + .match_mask = 0x180, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x80, + .match_mask = 0x180, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x1ff, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 8, + .minbit = 0, + .value = 0x0, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_SVTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x18, + .match_mask = 0x418, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x10000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x4, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x38, + .match_mask = 0x438, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", + .match = 0x18000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x6, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x810, + .match_mask = 0x3c18, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", + .match = 0x100, + .match_mask = 0x180, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x80, + .match_mask = 0x180, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x1ff, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 0, + .value = 0x0, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x18, + .match_mask = 0x418, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x10000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x4, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x38, + .match_mask = 0x438, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", + .match = 0x18000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x6, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x810, + .match_mask = 0x3c18, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_CNTAG", + .match = 0x100, + .match_mask = 0x180, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 37, + .pminbit = 29, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x1ff, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 8, + .minbit = 0, + .value = 0x0, + .pmaxbit = 37, + .pminbit = 29, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 55, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 42, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 55, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 55, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 45, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 56, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 48, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 56, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 48, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 48, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 51, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 54, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_CNTAG", + .match = 0x100, + .match_mask = 0x180, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x80, + .match_mask = 0x180, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x1ff, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 0, + .value = 0x0, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SVTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 14, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 35, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 40, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 18, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 40, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x18, + .match_mask = 0x418, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 22, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 22, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 22, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x10000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x4, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 22, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x38, + .match_mask = 0x438, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 22, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 26, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 26, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 26, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 10, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 10, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 40, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 40, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 40, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 40, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 40, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 30, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 40, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 34, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", + .match = 0x18000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x6, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 34, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 40, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x810, + .match_mask = 0x3c18, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback, + + }, + { + /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db_info = { + .num_entries = 228, + .db = bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db_info_get(void) { + return &bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map_info = { + .num_entries = 228, + .map = bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map_info_get(void) { + return &bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_pkt_flexhdr.c new file mode 100644 index 000000000000..f969be32b491 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_pkt_flexhdr.c @@ -0,0 +1,11475 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56890_a0 and variant dna_6_5_30_8_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[13] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[13] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[13] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[13] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[13] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[13] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[13] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[13] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SRV6); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[13] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[13] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[13] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[13] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[13] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[13] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[13] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[13] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[13] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[13] |= (0x1 << 31); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SRV6)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { + reason[12] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_data[] = { + { + .name = "BSCAN_CONTROL_DATA_15_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 415 }, /* Profile 2. */ + { 368, 383 }, /* Profile 3. */ + { 400, 415 }, /* Profile 4. */ + { 400, 415 }, /* Profile 5. */ + { 400, 415 }, /* Profile 6. */ + { 400, 415 }, /* Profile 7. */ + { 368, 383 }, /* Profile 8. */ + { 400, 415 }, /* Profile 9. */ + { 400, 415 }, /* Profile 10. */ + { 400, 415 }, /* Profile 11. */ + { 400, 415 }, /* Profile 12. */ + { 368, 383 }, /* Profile 13. */ + { 400, 415 }, /* Profile 14. */ + { 400, 415 }, /* Profile 15. */ + { 400, 415 }, /* Profile 16. */ + { 368, 383 }, /* Profile 17. */ + { 400, 415 }, /* Profile 18. */ + { 400, 415 }, /* Profile 19. */ + { 400, 415 }, /* Profile 20. */ + { 400, 415 }, /* Profile 21. */ + { 368, 383 }, /* Profile 22. */ + { 400, 415 }, /* Profile 23. */ + { 400, 415 }, /* Profile 24. */ + { 400, 415 }, /* Profile 25. */ + { 400, 415 }, /* Profile 26. */ + { 368, 383 }, /* Profile 27. */ + { 400, 415 }, /* Profile 28. */ + { 400, 415 }, /* Profile 29. */ + { 400, 415 }, /* Profile 30. */ + { 368, 383 }, /* Profile 31. */ + { 400, 415 }, /* Profile 32. */ + { 400, 415 }, /* Profile 33. */ + { 400, 415 }, /* Profile 34. */ + { 400, 415 }, /* Profile 35. */ + { 368, 383 }, /* Profile 36. */ + { 400, 415 }, /* Profile 37. */ + { 400, 415 }, /* Profile 38. */ + { 400, 415 }, /* Profile 39. */ + { 400, 415 }, /* Profile 40. */ + { 368, 383 }, /* Profile 41. */ + { 400, 415 }, /* Profile 42. */ + { 400, 415 }, /* Profile 43. */ + { 400, 415 }, /* Profile 44. */ + { 368, 383 }, /* Profile 45. */ + { 400, 415 }, /* Profile 46. */ + { 400, 415 }, /* Profile 47. */ + { 400, 415 }, /* Profile 48. */ + { 400, 415 }, /* Profile 49. */ + { 368, 383 }, /* Profile 50. */ + { 400, 415 }, /* Profile 51. */ + { 400, 415 }, /* Profile 52. */ + { 400, 415 }, /* Profile 53. */ + { 400, 415 }, /* Profile 54. */ + { 368, 383 }, /* Profile 55. */ + { 400, 415 }, /* Profile 56. */ + { 400, 415 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "BSCAN_CONTROL_FLAGS_3_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 476, 479 }, /* Profile 2. */ + { 456, 459 }, /* Profile 3. */ + { 476, 479 }, /* Profile 4. */ + { 476, 479 }, /* Profile 5. */ + { 476, 479 }, /* Profile 6. */ + { 476, 479 }, /* Profile 7. */ + { 456, 459 }, /* Profile 8. */ + { 476, 479 }, /* Profile 9. */ + { 476, 479 }, /* Profile 10. */ + { 476, 479 }, /* Profile 11. */ + { 476, 479 }, /* Profile 12. */ + { 456, 459 }, /* Profile 13. */ + { 476, 479 }, /* Profile 14. */ + { 476, 479 }, /* Profile 15. */ + { 476, 479 }, /* Profile 16. */ + { 456, 459 }, /* Profile 17. */ + { 476, 479 }, /* Profile 18. */ + { 476, 479 }, /* Profile 19. */ + { 476, 479 }, /* Profile 20. */ + { 476, 479 }, /* Profile 21. */ + { 456, 459 }, /* Profile 22. */ + { 476, 479 }, /* Profile 23. */ + { 476, 479 }, /* Profile 24. */ + { 476, 479 }, /* Profile 25. */ + { 476, 479 }, /* Profile 26. */ + { 456, 459 }, /* Profile 27. */ + { 476, 479 }, /* Profile 28. */ + { 476, 479 }, /* Profile 29. */ + { 476, 479 }, /* Profile 30. */ + { 456, 459 }, /* Profile 31. */ + { 476, 479 }, /* Profile 32. */ + { 476, 479 }, /* Profile 33. */ + { 476, 479 }, /* Profile 34. */ + { 476, 479 }, /* Profile 35. */ + { 456, 459 }, /* Profile 36. */ + { 476, 479 }, /* Profile 37. */ + { 476, 479 }, /* Profile 38. */ + { 476, 479 }, /* Profile 39. */ + { 476, 479 }, /* Profile 40. */ + { 456, 459 }, /* Profile 41. */ + { 476, 479 }, /* Profile 42. */ + { 476, 479 }, /* Profile 43. */ + { 476, 479 }, /* Profile 44. */ + { 456, 459 }, /* Profile 45. */ + { 476, 479 }, /* Profile 46. */ + { 476, 479 }, /* Profile 47. */ + { 476, 479 }, /* Profile 48. */ + { 476, 479 }, /* Profile 49. */ + { 456, 459 }, /* Profile 50. */ + { 476, 479 }, /* Profile 51. */ + { 476, 479 }, /* Profile 52. */ + { 476, 479 }, /* Profile 53. */ + { 476, 479 }, /* Profile 54. */ + { 456, 459 }, /* Profile 55. */ + { 476, 479 }, /* Profile 56. */ + { 476, 479 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 336, 351 }, /* Profile 16. */ + { 320, 335 }, /* Profile 17. */ + { 336, 351 }, /* Profile 18. */ + { 352, 367 }, /* Profile 19. */ + { 352, 367 }, /* Profile 20. */ + { 336, 351 }, /* Profile 21. */ + { 320, 335 }, /* Profile 22. */ + { 336, 351 }, /* Profile 23. */ + { 352, 367 }, /* Profile 24. */ + { 352, 367 }, /* Profile 25. */ + { 336, 351 }, /* Profile 26. */ + { 320, 335 }, /* Profile 27. */ + { 336, 351 }, /* Profile 28. */ + { 352, 367 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { 336, 351 }, /* Profile 44. */ + { 320, 335 }, /* Profile 45. */ + { 336, 351 }, /* Profile 46. */ + { 352, 367 }, /* Profile 47. */ + { 352, 367 }, /* Profile 48. */ + { 336, 351 }, /* Profile 49. */ + { 320, 335 }, /* Profile 50. */ + { 336, 351 }, /* Profile 51. */ + { 352, 367 }, /* Profile 52. */ + { 352, 367 }, /* Profile 53. */ + { 336, 351 }, /* Profile 54. */ + { 320, 335 }, /* Profile 55. */ + { 336, 351 }, /* Profile 56. */ + { 352, 367 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "DNAT_CTRL_3_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 420, 423 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 420, 423 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 420, 423 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 420, 423 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 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Profile 52. */ + { -1, -1 }, /* Profile 53. */ + { -1, -1 }, /* Profile 54. */ + { -1, -1 }, /* Profile 55. */ + { 420, 423 }, /* Profile 56. */ + }, + .profile_cnt = 57, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 48, 63 }, /* Profile 12. */ + { 48, 63 }, /* Profile 13. */ + { 48, 63 }, /* Profile 14. */ + { 48, 63 }, /* Profile 15. */ + { 48, 63 }, /* Profile 16. */ + { 48, 63 }, /* Profile 17. */ + { 48, 63 }, /* Profile 18. */ + { 48, 63 }, /* Profile 19. */ + { 48, 63 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, 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Profile 53. */ + { 48, 63 }, /* Profile 54. */ + { 48, 63 }, /* Profile 55. */ + { 48, 63 }, /* Profile 56. */ + { 48, 63 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "DVP_15_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 175 }, /* Profile 2. */ + { 160, 175 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { 160, 175 }, /* Profile 5. */ + { 160, 175 }, /* Profile 6. */ + { 160, 175 }, /* Profile 7. */ + { 160, 175 }, /* Profile 8. */ + { 160, 175 }, /* Profile 9. */ + { 160, 175 }, /* Profile 10. */ + { 160, 175 }, /* Profile 11. */ + { 160, 175 }, /* Profile 12. */ + { 160, 175 }, /* Profile 13. */ + { 160, 175 }, /* Profile 14. */ + { 160, 175 }, /* Profile 15. */ + { 160, 175 }, /* Profile 16. */ + { 160, 175 }, /* Profile 17. */ + { 160, 175 }, /* Profile 18. */ + { 160, 175 }, /* Profile 19. */ + { 160, 175 }, /* Profile 20. */ + { 160, 175 }, /* Profile 21. */ + { 160, 175 }, /* Profile 22. */ + { 160, 175 }, /* Profile 23. */ + { 160, 175 }, /* Profile 24. */ + { 160, 175 }, /* Profile 25. */ + { 160, 175 }, /* Profile 26. */ + { 160, 175 }, /* Profile 27. */ + { 160, 175 }, /* Profile 28. */ + { 160, 175 }, /* Profile 29. */ + { 160, 175 }, /* Profile 30. */ + { 160, 175 }, /* Profile 31. */ + { 160, 175 }, /* Profile 32. */ + { 160, 175 }, /* Profile 33. */ + { 160, 175 }, /* Profile 34. */ + { 160, 175 }, /* Profile 35. */ + { 160, 175 }, /* Profile 36. */ + { 160, 175 }, /* Profile 37. */ + { 160, 175 }, /* Profile 38. */ + { 160, 175 }, /* Profile 39. */ + { 160, 175 }, /* Profile 40. */ + { 160, 175 }, /* Profile 41. */ + { 160, 175 }, /* Profile 42. */ + { 160, 175 }, /* Profile 43. */ + { 160, 175 }, /* Profile 44. */ + { 160, 175 }, /* Profile 45. */ + { 160, 175 }, /* Profile 46. */ + { 160, 175 }, /* Profile 47. */ + { 160, 175 }, /* Profile 48. */ + { 160, 175 }, /* Profile 49. */ + { 160, 175 }, /* Profile 50. */ + { 160, 175 }, /* Profile 51. */ + { 160, 175 }, /* Profile 52. */ + { 160, 175 }, /* Profile 53. */ + { 160, 175 }, /* Profile 54. */ + { 160, 175 }, /* Profile 55. */ + { 160, 175 }, /* Profile 56. */ + { 160, 175 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "EFFECTIVE_TTL_AND_SNAT_CTRL_15_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 80, 95 }, /* Profile 2. */ + { 80, 95 }, /* Profile 3. */ + { 80, 95 }, /* Profile 4. */ + { 80, 95 }, /* Profile 5. */ + { 80, 95 }, /* Profile 6. */ + { 80, 95 }, /* Profile 7. */ + { 80, 95 }, /* Profile 8. */ + { 80, 95 }, /* Profile 9. */ + { 80, 95 }, /* Profile 10. */ + { 80, 95 }, /* Profile 11. */ + { 80, 95 }, /* Profile 12. */ + { 80, 95 }, /* Profile 13. */ + { 80, 95 }, /* Profile 14. */ + { 80, 95 }, /* Profile 15. */ + { 80, 95 }, /* Profile 16. */ + { 80, 95 }, /* Profile 17. */ + { 80, 95 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Profile 49. */ + { 80, 95 }, /* Profile 50. */ + { 80, 95 }, /* Profile 51. */ + { 80, 95 }, /* Profile 52. */ + { 80, 95 }, /* Profile 53. */ + { 80, 95 }, /* Profile 54. */ + { 80, 95 }, /* Profile 55. */ + { 80, 95 }, /* Profile 56. */ + { 80, 95 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + { 352, 367 }, /* Profile 5. */ + { 352, 367 }, /* Profile 6. */ + { 336, 351 }, /* Profile 7. */ + { 320, 335 }, /* Profile 8. */ + { 336, 351 }, /* Profile 9. */ + { 352, 367 }, /* Profile 10. */ + { 352, 367 }, /* Profile 11. */ + { 336, 351 }, /* Profile 12. */ + { 320, 335 }, /* Profile 13. */ + { 336, 351 }, /* Profile 14. */ + { 352, 367 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { 336, 351 }, /* Profile 30. */ + { 320, 335 }, /* Profile 31. */ + { 336, 351 }, /* Profile 32. */ + { 352, 367 }, /* Profile 33. */ + { 352, 367 }, /* Profile 34. */ + { 336, 351 }, /* Profile 35. */ + { 320, 335 }, /* Profile 36. */ + { 336, 351 }, /* Profile 37. */ + { 352, 367 }, /* Profile 38. */ + { 352, 367 }, /* Profile 39. */ + { 336, 351 }, /* Profile 40. */ + { 320, 335 }, /* Profile 41. */ + { 336, 351 }, /* Profile 42. */ + { 352, 367 }, /* Profile 43. */ + }, + .profile_cnt = 44, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 444, 447 }, /* Profile 2. */ + { 420, 423 }, /* Profile 3. */ + { 448, 451 }, /* Profile 4. */ + { 444, 447 }, /* Profile 5. */ + { 444, 447 }, /* Profile 6. */ + { 444, 447 }, /* Profile 7. */ + { 420, 423 }, /* Profile 8. */ + { 448, 451 }, /* Profile 9. */ + { 444, 447 }, /* Profile 10. */ + { 444, 447 }, /* Profile 11. */ + { 444, 447 }, /* Profile 12. */ + { 420, 423 }, /* Profile 13. */ + { 448, 451 }, /* Profile 14. */ + { 444, 447 }, /* Profile 15. */ + { 444, 447 }, /* Profile 16. */ + { 420, 423 }, /* Profile 17. */ + { 448, 451 }, /* Profile 18. */ + { 444, 447 }, /* Profile 19. */ + { 444, 447 }, /* Profile 20. */ + { 444, 447 }, /* Profile 21. */ + { 420, 423 }, /* Profile 22. */ + { 448, 451 }, /* Profile 23. */ + { 444, 447 }, /* Profile 24. */ + { 444, 447 }, /* Profile 25. */ + { 444, 447 }, /* Profile 26. */ + { 420, 423 }, /* Profile 27. */ + { 448, 451 }, /* Profile 28. */ + { 444, 447 }, /* Profile 29. */ + { 444, 447 }, /* Profile 30. */ + { 420, 423 }, /* Profile 31. */ + { 448, 451 }, /* Profile 32. */ + { 444, 447 }, /* Profile 33. */ + { 444, 447 }, /* Profile 34. */ + { 444, 447 }, /* Profile 35. */ + { 420, 423 }, /* Profile 36. */ + { 448, 451 }, /* Profile 37. */ + { 444, 447 }, /* Profile 38. */ + { 444, 447 }, /* Profile 39. */ + { 444, 447 }, /* Profile 40. */ + { 420, 423 }, /* Profile 41. */ + { 448, 451 }, /* Profile 42. */ + { 444, 447 }, /* Profile 43. */ + { 444, 447 }, /* Profile 44. */ + { 420, 423 }, /* Profile 45. */ + { 448, 451 }, /* Profile 46. */ + { 444, 447 }, /* Profile 47. */ + { 444, 447 }, /* Profile 48. */ + { 444, 447 }, /* Profile 49. */ + { 420, 423 }, /* Profile 50. */ + { 448, 451 }, /* Profile 51. */ + { 444, 447 }, /* Profile 52. */ + { 444, 447 }, /* Profile 53. */ + { 444, 447 }, /* Profile 54. */ + { 420, 423 }, /* Profile 55. */ + { 448, 451 }, /* Profile 56. */ + { 444, 447 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { 128, 143 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ + { 128, 143 }, /* Profile 8. */ + { 128, 143 }, /* Profile 9. */ + { 128, 143 }, /* Profile 10. */ + { 128, 143 }, /* Profile 11. */ + { 128, 143 }, /* Profile 12. */ + { 128, 143 }, /* Profile 13. */ + { 128, 143 }, /* Profile 14. */ + { 128, 143 }, /* Profile 15. */ + { 128, 143 }, /* Profile 16. */ + { 128, 143 }, /* Profile 17. */ + { 128, 143 }, /* Profile 18. */ + { 128, 143 }, /* Profile 19. */ + { 128, 143 }, /* Profile 20. */ + { 128, 143 }, /* Profile 21. */ + { 128, 143 }, /* Profile 22. */ + { 128, 143 }, /* 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+ { 128, 143 }, /* Profile 53. */ + { 128, 143 }, /* Profile 54. */ + { 128, 143 }, /* Profile 55. */ + { 128, 143 }, /* Profile 56. */ + { 128, 143 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + { 48, 63 }, /* Profile 8. */ + { 48, 63 }, /* Profile 9. */ + { 48, 63 }, /* Profile 10. */ + { 48, 63 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { 48, 63 }, /* Profile 21. */ + { 48, 63 }, /* Profile 22. */ + { 48, 63 }, /* Profile 23. */ + { 48, 63 }, /* Profile 24. */ + { 48, 63 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { 48, 63 }, /* Profile 35. */ + { 48, 63 }, /* Profile 36. */ + { 48, 63 }, /* Profile 37. */ + { 48, 63 }, /* Profile 38. */ + { 48, 63 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { -1, -1 }, /* Profile 45. */ + { -1, -1 }, /* Profile 46. */ + { -1, -1 }, /* Profile 47. */ + { -1, -1 }, /* Profile 48. */ + { 48, 63 }, /* Profile 49. */ + { 48, 63 }, /* Profile 50. */ + { 48, 63 }, /* Profile 51. */ + { 48, 63 }, /* Profile 52. */ + { 48, 63 }, /* Profile 53. */ + }, + .profile_cnt = 54, + }, + { + .name = "EP_NIH_HDR_RECIRC_CODE_3_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 448, 451 }, /* Profile 2. */ + { 428, 431 }, /* Profile 3. */ + { 452, 455 }, /* Profile 4. */ + { 448, 451 }, /* Profile 5. */ + { 448, 451 }, /* Profile 6. */ + { 448, 451 }, /* Profile 7. */ + { 428, 431 }, /* Profile 8. */ + { 452, 455 }, /* Profile 9. */ + { 448, 451 }, /* Profile 10. */ + { 448, 451 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 448, 451 }, /* Profile 16. */ + { 428, 431 }, /* Profile 17. */ + { 452, 455 }, /* Profile 18. */ + { 448, 451 }, /* Profile 19. */ + { 448, 451 }, /* Profile 20. */ + { 448, 451 }, /* Profile 21. */ + { 428, 431 }, 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}, /* Profile 52. */ + { 448, 451 }, /* Profile 53. */ + }, + .profile_cnt = 54, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 176, 191 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 176, 191 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 176, 191 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { 192, 207 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { 192, 207 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { -1, -1 }, /* Profile 45. */ + { -1, -1 }, /* Profile 46. */ + { 192, 207 }, /* Profile 47. */ + { -1, -1 }, /* Profile 48. */ + { -1, -1 }, /* Profile 49. */ + { -1, -1 }, /* Profile 50. */ + { -1, -1 }, /* Profile 51. */ + { 192, 207 }, /* Profile 52. */ + }, + .profile_cnt = 53, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 192, 207 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 192, 207 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 192, 207 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 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-1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + { 0, 15 }, /* Profile 5. */ + { 0, 15 }, /* Profile 6. */ + { 0, 15 }, /* Profile 7. */ + { 0, 15 }, /* Profile 8. */ + { 0, 15 }, /* Profile 9. */ + { 0, 15 }, /* Profile 10. */ + { 0, 15 }, /* Profile 11. */ + { 0, 15 }, /* Profile 12. */ + { 0, 15 }, /* Profile 13. */ + { 0, 15 }, /* Profile 14. */ + { 0, 15 }, /* Profile 15. */ + { 0, 15 }, /* Profile 16. */ + { 0, 15 }, /* Profile 17. */ + { 0, 15 }, /* Profile 18. */ + { 0, 15 }, /* Profile 19. */ + { 0, 15 }, /* Profile 20. */ + { 0, 15 }, /* Profile 21. */ + { 0, 15 }, /* Profile 22. */ + { 0, 15 }, /* Profile 23. */ + { 0, 15 }, /* Profile 24. */ + { 0, 15 }, /* Profile 25. */ + { 0, 15 }, /* Profile 26. */ + { 0, 15 }, /* Profile 27. */ + { 0, 15 }, /* Profile 28. */ + { 0, 15 }, /* Profile 29. */ + { 0, 15 }, /* Profile 30. */ + { 0, 15 }, /* Profile 31. */ + { 0, 15 }, /* Profile 32. */ + { 0, 15 }, /* Profile 33. */ + { 0, 15 }, /* Profile 34. */ + { 0, 15 }, /* Profile 35. */ + { 0, 15 }, /* Profile 36. */ + { 0, 15 }, /* Profile 37. */ + { 0, 15 }, /* Profile 38. */ + { 0, 15 }, /* Profile 39. */ + { 0, 15 }, /* Profile 40. */ + { 0, 15 }, /* Profile 41. */ + { 0, 15 }, /* Profile 42. */ + { 0, 15 }, /* Profile 43. */ + { 0, 15 }, /* Profile 44. */ + { 0, 15 }, /* Profile 45. */ + { 0, 15 }, /* Profile 46. */ + { 0, 15 }, /* Profile 47. */ + { 0, 15 }, /* Profile 48. */ + { 0, 15 }, /* Profile 49. */ + { 0, 15 }, /* Profile 50. */ + { 0, 15 }, /* Profile 51. */ + { 0, 15 }, /* Profile 52. */ + { 0, 15 }, /* Profile 53. */ + { 0, 15 }, /* Profile 54. */ + { 0, 15 }, /* Profile 55. */ + { 0, 15 }, /* Profile 56. */ + { 0, 15 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "EVENT_TRACE_VECTOR_31_16", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 16, 31 }, /* Profile 2. */ + { 16, 31 }, /* Profile 3. */ + { 16, 31 }, /* Profile 4. */ + { 16, 31 }, /* Profile 5. */ + { 16, 31 }, /* Profile 6. */ + { 16, 31 }, /* Profile 7. */ + { 16, 31 }, /* Profile 8. */ + { 16, 31 }, /* Profile 9. */ + { 16, 31 }, /* Profile 10. */ + { 16, 31 }, /* Profile 11. */ + { 16, 31 }, /* Profile 12. */ + { 16, 31 }, /* Profile 13. */ + { 16, 31 }, /* Profile 14. */ + { 16, 31 }, /* Profile 15. */ + { 16, 31 }, /* Profile 16. */ + { 16, 31 }, /* Profile 17. */ + { 16, 31 }, /* Profile 18. */ + { 16, 31 }, /* Profile 19. */ + { 16, 31 }, /* Profile 20. */ + { 16, 31 }, /* Profile 21. */ + { 16, 31 }, /* Profile 22. */ + { 16, 31 }, /* Profile 23. */ + { 16, 31 }, /* Profile 24. */ + { 16, 31 }, /* Profile 25. */ + { 16, 31 }, /* Profile 26. */ + { 16, 31 }, /* Profile 27. */ + { 16, 31 }, /* Profile 28. */ + { 16, 31 }, /* Profile 29. */ + { 16, 31 }, /* Profile 30. */ + { 16, 31 }, /* Profile 31. */ + { 16, 31 }, /* Profile 32. */ + { 16, 31 }, /* Profile 33. */ + { 16, 31 }, /* Profile 34. */ + { 16, 31 }, /* Profile 35. */ + { 16, 31 }, /* Profile 36. */ + { 16, 31 }, /* Profile 37. */ + { 16, 31 }, /* Profile 38. */ + { 16, 31 }, /* Profile 39. */ + { 16, 31 }, /* Profile 40. */ + { 16, 31 }, /* Profile 41. */ + { 16, 31 }, /* Profile 42. */ + { 16, 31 }, /* Profile 43. */ + { 16, 31 }, /* Profile 44. */ + { 16, 31 }, /* Profile 45. */ + { 16, 31 }, /* Profile 46. */ + { 16, 31 }, /* Profile 47. */ + { 16, 31 }, /* Profile 48. */ + { 16, 31 }, /* Profile 49. */ + { 16, 31 }, /* Profile 50. */ + { 16, 31 }, /* Profile 51. */ + { 16, 31 }, /* Profile 52. */ + { 16, 31 }, /* Profile 53. */ + { 16, 31 }, /* Profile 54. */ + { 16, 31 }, /* Profile 55. */ + { 16, 31 }, /* Profile 56. */ + { 16, 31 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + { 32, 47 }, /* Profile 6. */ + { 32, 47 }, /* Profile 7. */ + { 32, 47 }, /* Profile 8. */ + { 32, 47 }, /* Profile 9. */ + { 32, 47 }, /* Profile 10. */ + { 32, 47 }, /* Profile 11. */ + { 32, 47 }, /* Profile 12. */ + { 32, 47 }, /* Profile 13. */ + { 32, 47 }, /* Profile 14. */ + { 32, 47 }, /* Profile 15. */ + { 32, 47 }, /* Profile 16. */ + { 32, 47 }, /* Profile 17. */ + { 32, 47 }, /* Profile 18. */ + { 32, 47 }, /* Profile 19. */ + { 32, 47 }, /* Profile 20. */ + { 32, 47 }, /* Profile 21. */ + { 32, 47 }, /* Profile 22. */ + { 32, 47 }, /* Profile 23. */ + { 32, 47 }, /* Profile 24. */ + { 32, 47 }, /* Profile 25. */ + { 32, 47 }, /* Profile 26. */ + { 32, 47 }, /* Profile 27. */ + { 32, 47 }, /* Profile 28. */ + { 32, 47 }, /* Profile 29. */ + { 32, 47 }, /* Profile 30. */ + { 32, 47 }, /* Profile 31. */ + { 32, 47 }, /* Profile 32. */ + { 32, 47 }, /* Profile 33. */ + { 32, 47 }, /* Profile 34. */ + { 32, 47 }, /* Profile 35. */ + { 32, 47 }, /* Profile 36. */ + { 32, 47 }, /* Profile 37. */ + { 32, 47 }, /* Profile 38. */ + { 32, 47 }, /* Profile 39. */ + { 32, 47 }, /* Profile 40. */ + { 32, 47 }, /* Profile 41. */ + { 32, 47 }, /* Profile 42. */ + { 32, 47 }, /* Profile 43. */ + { 32, 47 }, /* Profile 44. */ + { 32, 47 }, /* Profile 45. */ + { 32, 47 }, /* Profile 46. */ + { 32, 47 }, /* Profile 47. */ + { 32, 47 }, /* Profile 48. */ + { 32, 47 }, /* Profile 49. */ + { 32, 47 }, /* Profile 50. */ + { 32, 47 }, /* Profile 51. */ + { 32, 47 }, /* Profile 52. */ + { 32, 47 }, /* Profile 53. */ + { 32, 47 }, /* Profile 54. */ + { 32, 47 }, /* Profile 55. */ + { 32, 47 }, /* Profile 56. */ + { 32, 47 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "FLOW_ID_LSB_15_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 399 }, /* Profile 2. */ + { 352, 367 }, /* Profile 3. */ + { 384, 399 }, /* Profile 4. */ + { 384, 399 }, /* Profile 5. */ + { 384, 399 }, /* Profile 6. */ + { 384, 399 }, /* Profile 7. */ + { 352, 367 }, /* Profile 8. */ + { 384, 399 }, /* Profile 9. */ + { 384, 399 }, /* Profile 10. */ + { 384, 399 }, /* Profile 11. */ + { 384, 399 }, /* Profile 12. */ + { 352, 367 }, /* Profile 13. */ + { 384, 399 }, /* Profile 14. */ + { 384, 399 }, /* Profile 15. */ + { 384, 399 }, /* Profile 16. */ + { 352, 367 }, /* Profile 17. */ + { 384, 399 }, /* Profile 18. */ + { 384, 399 }, /* Profile 19. */ + { 384, 399 }, /* Profile 20. */ + { 384, 399 }, /* Profile 21. */ + { 352, 367 }, /* Profile 22. */ + { 384, 399 }, /* Profile 23. */ + { 384, 399 }, /* Profile 24. */ + { 384, 399 }, /* Profile 25. */ + { 384, 399 }, /* Profile 26. */ + { 352, 367 }, /* Profile 27. */ + { 384, 399 }, /* Profile 28. */ + { 384, 399 }, /* Profile 29. */ + { 384, 399 }, /* Profile 30. */ + { 352, 367 }, /* Profile 31. */ + { 384, 399 }, /* Profile 32. */ + { 384, 399 }, /* Profile 33. */ + { 384, 399 }, /* Profile 34. */ + { 384, 399 }, /* Profile 35. */ + { 352, 367 }, /* Profile 36. */ + { 384, 399 }, /* Profile 37. */ + { 384, 399 }, /* Profile 38. */ + { 384, 399 }, /* Profile 39. */ + { 384, 399 }, /* Profile 40. */ + { 352, 367 }, /* Profile 41. */ + { 384, 399 }, /* Profile 42. */ + { 384, 399 }, /* Profile 43. */ + { 384, 399 }, /* Profile 44. */ + { 352, 367 }, /* Profile 45. */ + { 384, 399 }, /* Profile 46. */ + { 384, 399 }, /* Profile 47. */ + { 384, 399 }, /* Profile 48. */ + { 384, 399 }, /* Profile 49. */ + { 352, 367 }, /* Profile 50. */ + { 384, 399 }, /* Profile 51. */ + { 384, 399 }, /* Profile 52. */ + { 384, 399 }, /* Profile 53. */ + { 384, 399 }, /* Profile 54. */ + { 352, 367 }, /* Profile 55. */ + { 384, 399 }, /* Profile 56. */ + { 384, 399 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "FLOW_ID_MSB_3_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 472, 475 }, /* Profile 12. */ + { 452, 455 }, /* Profile 13. */ + { 472, 475 }, /* Profile 14. */ + { 472, 475 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { 472, 475 }, /* Profile 26. */ + { 452, 455 }, /* Profile 27. */ + { 472, 475 }, /* Profile 28. */ + { 472, 475 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { 472, 475 }, /* Profile 40. */ + { 452, 455 }, /* Profile 41. */ + { 472, 475 }, /* Profile 42. */ + { 472, 475 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { -1, -1 }, /* Profile 45. */ + { -1, -1 }, /* Profile 46. */ + { -1, -1 }, /* Profile 47. */ + { -1, -1 }, /* Profile 48. */ + { -1, -1 }, /* Profile 49. */ + { -1, -1 }, /* Profile 50. */ + { -1, -1 }, /* Profile 51. */ + { -1, -1 }, /* Profile 52. */ + { -1, -1 }, /* Profile 53. */ + { 472, 475 }, /* Profile 54. */ + { 452, 455 }, /* Profile 55. */ + { 472, 475 }, /* Profile 56. */ + { 472, 475 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 287 }, /* Profile 2. */ + { 256, 271 }, /* Profile 3. */ + { 272, 287 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + { 288, 303 }, /* Profile 6. */ + { 272, 287 }, /* Profile 7. */ + { 256, 271 }, /* Profile 8. */ + { 272, 287 }, /* Profile 9. */ + { 288, 303 }, /* Profile 10. */ + { 288, 303 }, /* Profile 11. */ + { 272, 287 }, /* Profile 12. */ + { 256, 271 }, /* Profile 13. */ + { 272, 287 }, /* Profile 14. */ + { 288, 303 }, /* Profile 15. */ + { 272, 287 }, /* Profile 16. */ + { 256, 271 }, /* Profile 17. */ + { 272, 287 }, /* Profile 18. */ + { 288, 303 }, /* Profile 19. */ + { 288, 303 }, /* Profile 20. */ + { 272, 287 }, /* Profile 21. */ + { 256, 271 }, /* Profile 22. */ + { 272, 287 }, /* Profile 23. */ + { 288, 303 }, /* Profile 24. */ + { 288, 303 }, /* Profile 25. */ + { 272, 287 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55. */ + { 288, 303 }, /* Profile 56. */ + { 304, 319 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "IFP_IOAM_GBP_ACTION_3_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 440, 443 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 444, 447 }, /* Profile 4. */ + { 440, 443 }, /* Profile 5. */ + { 440, 443 }, /* Profile 6. */ + { 440, 443 }, /* Profile 7. */ + { 408, 411 }, /* Profile 8. */ + { 444, 447 }, /* Profile 9. */ + { 440, 443 }, /* Profile 10. */ + { 440, 443 }, /* Profile 11. */ + { 440, 443 }, /* Profile 12. */ + { 408, 411 }, /* Profile 13. */ + { 444, 447 }, /* Profile 14. */ + { 440, 443 }, /* Profile 15. */ + { 440, 443 }, /* Profile 16. */ + { 408, 411 }, /* Profile 17. */ + { 444, 447 }, /* Profile 18. */ + { 440, 443 }, /* Profile 19. */ + { 440, 443 }, /* Profile 20. */ + { 440, 443 }, /* Profile 21. */ + { 408, 411 }, /* Profile 22. */ + { 444, 447 }, /* Profile 23. */ + { 440, 443 }, /* Profile 24. */ + { 440, 443 }, /* Profile 25. */ + { 440, 443 }, /* Profile 26. */ + { 408, 411 }, /* Profile 27. */ + { 444, 447 }, /* Profile 28. */ + { 440, 443 }, /* Profile 29. */ + { 440, 443 }, /* Profile 30. */ + { 408, 411 }, /* Profile 31. */ + { 444, 447 }, /* Profile 32. */ + { 440, 443 }, /* Profile 33. */ + { 440, 443 }, /* Profile 34. */ + { 440, 443 }, /* Profile 35. */ + { 408, 411 }, /* Profile 36. */ + { 444, 447 }, /* Profile 37. */ + { 440, 443 }, /* Profile 38. */ + { 440, 443 }, /* Profile 39. */ + { 440, 443 }, /* Profile 40. */ + { 408, 411 }, /* Profile 41. */ + { 444, 447 }, /* Profile 42. */ + { 440, 443 }, /* Profile 43. */ + { 440, 443 }, /* Profile 44. */ + { 408, 411 }, /* Profile 45. */ + { 444, 447 }, /* Profile 46. */ + { 440, 443 }, /* Profile 47. */ + { 440, 443 }, /* Profile 48. */ + { 440, 443 }, /* Profile 49. */ + { 408, 411 }, /* Profile 50. */ + { 444, 447 }, /* Profile 51. */ + { 440, 443 }, /* Profile 52. */ + { 440, 443 }, /* Profile 53. */ + { 440, 443 }, /* Profile 54. */ + { 408, 411 }, /* Profile 55. */ + { 444, 447 }, /* Profile 56. */ + { 440, 443 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 420, 423 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 424, 427 }, /* Profile 4. */ + { 420, 423 }, /* Profile 5. */ + { 420, 423 }, /* Profile 6. */ + { 420, 423 }, /* Profile 7. */ + { 388, 391 }, /* Profile 8. */ + { 424, 427 }, /* Profile 9. */ + { 420, 423 }, /* Profile 10. */ + { 420, 423 }, /* Profile 11. */ + { 420, 423 }, /* Profile 12. */ + { 388, 391 }, /* Profile 13. */ + { 424, 427 }, /* Profile 14. */ + { 420, 423 }, /* Profile 15. */ + { 420, 423 }, /* Profile 16. */ + { 388, 391 }, /* Profile 17. */ + { 424, 427 }, /* Profile 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420, 423 }, /* Profile 48. */ + { 420, 423 }, /* Profile 49. */ + { 388, 391 }, /* Profile 50. */ + { 424, 427 }, /* Profile 51. */ + { 420, 423 }, /* Profile 52. */ + { 420, 423 }, /* Profile 53. */ + { 420, 423 }, /* Profile 54. */ + { 388, 391 }, /* Profile 55. */ + { 424, 427 }, /* Profile 56. */ + { 420, 423 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "ING_TIMESTAMP_15_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 176, 191 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { 176, 191 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { 176, 191 }, /* Profile 15. */ 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= BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L2_IIF_12_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 316 }, /* Profile 2. */ + { 288, 300 }, /* Profile 3. */ + { 304, 316 }, /* Profile 4. */ + { 320, 332 }, /* Profile 5. */ + { 320, 332 }, /* Profile 6. */ + { 304, 316 }, /* Profile 7. */ + { 288, 300 }, /* Profile 8. */ + { 304, 316 }, /* Profile 9. */ + { 320, 332 }, /* Profile 10. */ + { 320, 332 }, /* Profile 11. */ + { 304, 316 }, /* Profile 12. */ + { 288, 300 }, /* Profile 13. */ + { 304, 316 }, /* Profile 14. */ + { 320, 332 }, /* Profile 15. */ + { 304, 316 }, /* Profile 16. */ + { 288, 300 }, /* Profile 17. */ + { 304, 316 }, /* Profile 18. */ + { 320, 332 }, /* Profile 19. */ + { 320, 332 }, /* Profile 20. */ + { 304, 316 }, /* Profile 21. */ + { 288, 300 }, /* Profile 22. */ + { 304, 316 }, /* Profile 23. */ + { 320, 332 }, /* Profile 24. */ + { 320, 332 }, /* Profile 25. */ + { 304, 316 }, /* Profile 26. */ + { 288, 300 }, /* Profile 27. */ + { 304, 316 }, /* Profile 28. */ + { 320, 332 }, /* Profile 29. */ + }, + .profile_cnt = 30, + }, + { + .name = "L2_OIF_12_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L2_OIF_12_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* 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188 }, /* Profile 54. */ + { 176, 188 }, /* Profile 55. */ + { 176, 188 }, /* Profile 56. */ + { 176, 188 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "L3_DNAT_INDEX_15_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 208, 223 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 208, 223 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 208, 223 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 208, 223 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 208, 223 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 208, 223 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { 208, 223 }, /* Profile 21. */ + { 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Profile 50. */ + { 320, 333 }, /* Profile 51. */ + { 336, 349 }, /* Profile 52. */ + { 336, 349 }, /* Profile 53. */ + { 320, 333 }, /* Profile 54. */ + { 304, 317 }, /* Profile 55. */ + { 320, 333 }, /* Profile 56. */ + { 336, 349 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 157 }, /* Profile 2. */ + { 144, 157 }, /* Profile 3. */ + { 144, 157 }, /* Profile 4. */ + { 144, 157 }, /* Profile 5. */ + { 144, 157 }, /* Profile 6. */ + { 144, 157 }, /* Profile 7. */ + { 144, 157 }, /* Profile 8. */ + { 144, 157 }, /* Profile 9. */ + { 144, 157 }, /* Profile 10. */ + { 144, 157 }, /* Profile 11. */ + { 144, 157 }, /* Profile 12. */ + { 144, 157 }, /* Profile 13. */ + { 144, 157 }, /* Profile 14. */ + { 144, 157 }, /* Profile 15. */ + { 144, 157 }, /* Profile 16. */ + { 144, 157 }, /* Profile 17. */ + { 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Profile 45. */ + { 368, 383 }, /* Profile 46. */ + { -1, -1 }, /* Profile 47. */ + { -1, -1 }, /* Profile 48. */ + { 368, 383 }, /* Profile 49. */ + { -1, -1 }, /* Profile 50. */ + { 368, 383 }, /* Profile 51. */ + { -1, -1 }, /* Profile 52. */ + { -1, -1 }, /* Profile 53. */ + { 368, 383 }, /* Profile 54. */ + { -1, -1 }, /* Profile 55. */ + { 368, 383 }, /* Profile 56. */ + }, + .profile_cnt = 57, + }, + { + .name = "MAC_DA_23_20_3_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 452, 455 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 452, 455 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 448, 451 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 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Profile 45. */ + { -1, -1 }, /* Profile 46. */ + { -1, -1 }, /* Profile 47. */ + { -1, -1 }, /* Profile 48. */ + { 452, 455 }, /* Profile 49. */ + { -1, -1 }, /* Profile 50. */ + { -1, -1 }, /* Profile 51. */ + { -1, -1 }, /* Profile 52. */ + { -1, -1 }, /* Profile 53. */ + { 448, 451 }, /* Profile 54. */ + }, + .profile_cnt = 55, + }, + { + .name = "MPLS_LABEL_DECAP_COUNT_3_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 468, 471 }, /* Profile 2. */ + { 448, 451 }, /* Profile 3. */ + { 468, 471 }, /* Profile 4. */ + { 468, 471 }, /* Profile 5. */ + { 468, 471 }, /* Profile 6. */ + { 468, 471 }, /* Profile 7. */ + { 448, 451 }, /* Profile 8. */ + { 468, 471 }, /* Profile 9. */ + { 468, 471 }, /* Profile 10. */ + { 468, 471 }, /* Profile 11. */ + { 464, 467 }, /* Profile 12. */ + { 444, 447 }, /* Profile 13. */ + { 464, 467 }, /* Profile 14. */ + { 464, 467 }, /* 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{ 208, 223 }, /* Profile 8. */ + { 224, 239 }, /* Profile 9. */ + { 240, 255 }, /* Profile 10. */ + { 240, 255 }, /* Profile 11. */ + { 224, 239 }, /* Profile 12. */ + { 208, 223 }, /* Profile 13. */ + { 224, 239 }, /* Profile 14. */ + { 240, 255 }, /* Profile 15. */ + { 224, 239 }, /* Profile 16. */ + { 208, 223 }, /* Profile 17. */ + { 224, 239 }, /* Profile 18. */ + { 240, 255 }, /* Profile 19. */ + { 240, 255 }, /* Profile 20. */ + { 224, 239 }, /* Profile 21. */ + { 208, 223 }, /* Profile 22. */ + { 224, 239 }, /* Profile 23. */ + { 240, 255 }, /* Profile 24. */ + { 240, 255 }, /* Profile 25. */ + { 224, 239 }, /* Profile 26. */ + { 208, 223 }, /* Profile 27. */ + { 224, 239 }, /* Profile 28. */ + { 240, 255 }, /* Profile 29. */ + { 240, 255 }, /* Profile 30. */ + { 224, 239 }, /* Profile 31. */ + { 240, 255 }, /* Profile 32. */ + { 256, 271 }, /* Profile 33. */ + { 256, 271 }, /* Profile 34. */ + { 240, 255 }, /* Profile 35. */ + { 224, 239 }, /* Profile 36. */ + { 240, 255 }, /* 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435 }, /* Profile 4. */ + { 428, 431 }, /* Profile 5. */ + { 428, 431 }, /* Profile 6. */ + { 428, 431 }, /* Profile 7. */ + { 396, 399 }, /* Profile 8. */ + { 432, 435 }, /* Profile 9. */ + { 428, 431 }, /* Profile 10. */ + { 428, 431 }, /* Profile 11. */ + { 428, 431 }, /* Profile 12. */ + { 396, 399 }, /* Profile 13. */ + { 432, 435 }, /* Profile 14. */ + { 428, 431 }, /* Profile 15. */ + { 428, 431 }, /* Profile 16. */ + { 396, 399 }, /* Profile 17. */ + { 432, 435 }, /* Profile 18. */ + { 428, 431 }, /* Profile 19. */ + { 428, 431 }, /* Profile 20. */ + { 428, 431 }, /* Profile 21. */ + { 396, 399 }, /* Profile 22. */ + { 432, 435 }, /* Profile 23. */ + { 428, 431 }, /* Profile 24. */ + { 428, 431 }, /* Profile 25. */ + { 428, 431 }, /* Profile 26. */ + { 396, 399 }, /* Profile 27. */ + { 432, 435 }, /* Profile 28. */ + { 428, 431 }, /* Profile 29. */ + { 428, 431 }, /* Profile 30. */ + { 396, 399 }, /* Profile 31. */ + { 432, 435 }, /* Profile 32. */ + { 428, 431 }, /* Profile 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/* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 424, 427 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 424, 427 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 424, 427 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { 424, 427 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { 424, 427 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { 424, 427 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { 424, 427 }, /* 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Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { 432, 435 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { 428, 431 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { 432, 435 }, /* Profile 45. */ + { -1, -1 }, /* Profile 46. */ + { -1, -1 }, /* Profile 47. */ + { -1, -1 }, /* Profile 48. */ + { -1, -1 }, /* Profile 49. */ + { 432, 435 }, /* Profile 50. */ + { -1, -1 }, /* Profile 51. */ + { -1, -1 }, /* Profile 52. */ + { -1, -1 }, /* Profile 53. */ + { -1, -1 }, /* Profile 54. */ + { 428, 431 }, /* Profile 55. */ + }, + .profile_cnt = 56, + }, + { + .name = "SRV6_NEW_GSID_SI_2_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* 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BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 424, 427 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 428, 431 }, /* Profile 4. */ + { 424, 427 }, /* Profile 5. */ + { 424, 427 }, /* Profile 6. */ + { 424, 427 }, /* Profile 7. */ + { 392, 395 }, /* Profile 8. */ + { 428, 431 }, /* Profile 9. */ + { 424, 427 }, /* Profile 10. */ + { 424, 427 }, /* Profile 11. */ + { 424, 427 }, /* Profile 12. */ + { 392, 395 }, /* Profile 13. */ + { 428, 431 }, /* Profile 14. */ + { 424, 427 }, /* Profile 15. */ + { 424, 427 }, /* Profile 16. */ + { 392, 395 }, /* Profile 17. */ + { 428, 431 }, /* Profile 18. */ + { 424, 427 }, /* Profile 19. */ + { 424, 427 }, /* Profile 20. */ + { 424, 427 }, /* Profile 21. */ + { 392, 395 }, /* Profile 22. */ + { 428, 431 }, /* Profile 23. */ + { 424, 427 }, /* Profile 24. */ + { 424, 427 }, /* Profile 25. */ + { 424, 427 }, /* Profile 26. */ + { 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Profile 56. */ + { 424, 427 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "SVTAG_CTRL_PKT_INFO_3_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 472, 475 }, /* Profile 2. */ + { 452, 455 }, /* Profile 3. */ + { 472, 475 }, /* Profile 4. */ + { 472, 475 }, /* Profile 5. */ + { 472, 475 }, /* Profile 6. */ + { 472, 475 }, /* Profile 7. */ + { 452, 455 }, /* Profile 8. */ + { 472, 475 }, /* Profile 9. */ + { 472, 475 }, /* Profile 10. */ + { 472, 475 }, /* Profile 11. */ + { 468, 471 }, /* Profile 12. */ + { 448, 451 }, /* Profile 13. */ + { 468, 471 }, /* Profile 14. */ + { 468, 471 }, /* Profile 15. */ + { 472, 475 }, /* Profile 16. */ + { 452, 455 }, /* Profile 17. */ + { 472, 475 }, /* Profile 18. */ + { 472, 475 }, /* Profile 19. */ + { 472, 475 }, /* Profile 20. */ + { 472, 475 }, /* Profile 21. */ + { 452, 455 }, /* Profile 22. */ + { 472, 475 }, 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}, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 96, 111 }, /* Profile 7. */ + { 96, 111 }, /* Profile 8. */ + { 96, 111 }, /* Profile 9. */ + { 96, 111 }, /* Profile 10. */ + { 96, 111 }, /* Profile 11. */ + { 96, 111 }, /* Profile 12. */ + { 96, 111 }, /* Profile 13. */ + { 96, 111 }, /* Profile 14. */ + { 96, 111 }, /* Profile 15. */ + { 96, 111 }, /* Profile 16. */ + { 96, 111 }, /* Profile 17. */ + { 96, 111 }, /* Profile 18. */ + { 96, 111 }, /* Profile 19. */ + { 96, 111 }, /* Profile 20. */ + { 96, 111 }, /* Profile 21. */ + { 96, 111 }, /* Profile 22. */ + { 96, 111 }, /* Profile 23. */ + { 96, 111 }, /* Profile 24. */ + { 96, 111 }, /* Profile 25. */ + { 96, 111 }, /* Profile 26. */ + { 96, 111 }, /* Profile 27. */ + { 96, 111 }, /* Profile 28. */ + { 96, 111 }, /* Profile 29. */ + { 96, 111 }, /* Profile 30. */ + { 96, 111 }, /* Profile 31. */ + { 96, 111 }, /* Profile 32. */ + { 96, 111 }, /* Profile 33. */ + { 96, 111 }, /* Profile 34. */ + { 96, 111 }, /* Profile 35. */ + { 96, 111 }, /* Profile 36. */ + { 96, 111 }, /* Profile 37. */ + { 96, 111 }, /* Profile 38. */ + { 96, 111 }, /* Profile 39. */ + { 96, 111 }, /* Profile 40. */ + { 96, 111 }, /* Profile 41. */ + { 96, 111 }, /* Profile 42. */ + { 96, 111 }, /* Profile 43. */ + { 96, 111 }, /* Profile 44. */ + { 96, 111 }, /* Profile 45. */ + { 96, 111 }, /* Profile 46. */ + { 96, 111 }, /* Profile 47. */ + { 96, 111 }, /* Profile 48. */ + { 96, 111 }, /* Profile 49. */ + { 96, 111 }, /* Profile 50. */ + { 96, 111 }, /* Profile 51. */ + { 96, 111 }, /* Profile 52. */ + { 96, 111 }, /* Profile 53. */ + { 96, 111 }, /* Profile 54. */ + { 96, 111 }, /* Profile 55. */ + { 96, 111 }, /* Profile 56. */ + { 96, 111 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 456, 459 }, /* Profile 5. */ + { 456, 459 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 456, 459 }, /* Profile 10. */ + { 456, 459 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { 452, 455 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 456, 459 }, /* Profile 19. */ + { 456, 459 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 456, 459 }, /* Profile 24. */ + { 456, 459 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { 452, 455 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { 456, 459 }, /* Profile 33. */ + { 456, 459 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { 456, 459 }, /* Profile 38. */ + { 456, 459 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { 452, 455 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { -1, -1 }, /* Profile 45. */ + { -1, -1 }, /* Profile 46. */ + { 456, 459 }, /* Profile 47. */ + { 456, 459 }, /* Profile 48. */ + { -1, -1 }, /* Profile 49. */ + { -1, -1 }, /* Profile 50. */ + { -1, -1 }, /* Profile 51. */ + { 456, 459 }, /* Profile 52. */ + { 456, 459 }, /* Profile 53. */ + { -1, -1 }, /* Profile 54. */ + { -1, -1 }, /* Profile 55. */ + { -1, -1 }, /* Profile 56. */ + { 452, 455 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 460, 463 }, /* Profile 2. */ + { 440, 443 }, /* Profile 3. */ + { 460, 463 }, /* Profile 4. */ + { 460, 463 }, /* Profile 5. */ + { 460, 463 }, /* Profile 6. */ + { 460, 463 }, /* Profile 7. */ + { 440, 443 }, /* Profile 8. */ + { 460, 463 }, /* Profile 9. */ + { 460, 463 }, /* Profile 10. */ + { 460, 463 }, /* Profile 11. */ + { 456, 459 }, /* Profile 12. */ + { 436, 439 }, /* Profile 13. */ + { 456, 459 }, /* Profile 14. */ + { 456, 459 }, /* Profile 15. */ + { 460, 463 }, /* Profile 16. */ + { 440, 443 }, /* Profile 17. */ + { 460, 463 }, /* Profile 18. */ + { 460, 463 }, /* Profile 19. */ + { 460, 463 }, /* Profile 20. */ + { 460, 463 }, /* Profile 21. */ + { 440, 443 }, /* Profile 22. */ + { 460, 463 }, /* Profile 23. */ + { 460, 463 }, /* Profile 24. */ + { 460, 463 }, /* Profile 25. */ + { 456, 459 }, /* Profile 26. */ + { 436, 439 }, /* Profile 27. */ + { 456, 459 }, /* Profile 28. */ + { 456, 459 }, /* Profile 29. */ + { 460, 463 }, /* Profile 30. */ + { 440, 443 }, /* Profile 31. */ + { 460, 463 }, /* Profile 32. */ + { 460, 463 }, /* Profile 33. */ + { 460, 463 }, /* Profile 34. */ + { 460, 463 }, /* Profile 35. */ + { 440, 443 }, /* Profile 36. */ + { 460, 463 }, /* Profile 37. */ + { 460, 463 }, /* Profile 38. */ + { 460, 463 }, /* Profile 39. */ + { 456, 459 }, /* Profile 40. */ + { 436, 439 }, /* Profile 41. */ + { 456, 459 }, /* Profile 42. */ + { 456, 459 }, /* Profile 43. */ + { 460, 463 }, /* Profile 44. */ + { 440, 443 }, /* Profile 45. */ + { 460, 463 }, /* Profile 46. */ + { 460, 463 }, /* Profile 47. */ + { 460, 463 }, /* Profile 48. */ + { 460, 463 }, /* Profile 49. */ + { 440, 443 }, /* Profile 50. */ + { 460, 463 }, /* Profile 51. */ + { 460, 463 }, /* Profile 52. */ + { 460, 463 }, /* Profile 53. */ + { 456, 459 }, /* Profile 54. */ + { 436, 439 }, /* Profile 55. */ + { 456, 459 }, /* Profile 56. */ + { 456, 459 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "VFI_15_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + { 112, 127 }, /* Profile 6. */ + { 112, 127 }, /* Profile 7. */ + { 112, 127 }, /* Profile 8. */ + { 112, 127 }, /* Profile 9. */ + { 112, 127 }, /* Profile 10. */ + { 112, 127 }, /* Profile 11. */ + { 112, 127 }, /* Profile 12. */ + { 112, 127 }, /* Profile 13. */ + { 112, 127 }, /* Profile 14. */ + { 112, 127 }, /* Profile 15. */ + { 112, 127 }, /* Profile 16. */ + { 112, 127 }, /* Profile 17. */ + { 112, 127 }, /* Profile 18. */ + { 112, 127 }, /* Profile 19. */ + { 112, 127 }, /* Profile 20. */ + { 112, 127 }, /* Profile 21. */ + { 112, 127 }, /* Profile 22. */ + { 112, 127 }, /* Profile 23. */ + { 112, 127 }, /* Profile 24. */ + { 112, 127 }, /* Profile 25. */ + { 112, 127 }, /* Profile 26. */ + { 112, 127 }, /* Profile 27. */ + { 112, 127 }, /* Profile 28. */ + { 112, 127 }, /* Profile 29. */ + { 112, 127 }, /* Profile 30. */ + { 112, 127 }, /* Profile 31. */ + { 112, 127 }, /* Profile 32. */ + { 112, 127 }, /* Profile 33. */ + { 112, 127 }, /* Profile 34. */ + { 112, 127 }, /* Profile 35. */ + { 112, 127 }, /* Profile 36. */ + { 112, 127 }, /* Profile 37. */ + { 112, 127 }, /* Profile 38. */ + { 112, 127 }, /* Profile 39. */ + { 112, 127 }, /* Profile 40. */ + { 112, 127 }, /* Profile 41. */ + { 112, 127 }, /* Profile 42. */ + { 112, 127 }, /* Profile 43. */ + { 112, 127 }, /* Profile 44. */ + { 112, 127 }, /* Profile 45. */ + { 112, 127 }, /* Profile 46. */ + { 112, 127 }, /* Profile 47. */ + { 112, 127 }, /* Profile 48. */ + { 112, 127 }, /* Profile 49. */ + { 112, 127 }, /* Profile 50. */ + { 112, 127 }, /* Profile 51. */ + { 112, 127 }, /* Profile 52. */ + { 112, 127 }, /* Profile 53. */ + { 112, 127 }, /* Profile 54. */ + { 112, 127 }, /* Profile 55. */ + { 112, 127 }, /* Profile 56. */ + { 112, 127 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", + .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 436, 439 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 440, 443 }, /* Profile 4. */ + { 436, 439 }, /* Profile 5. */ + { 436, 439 }, /* Profile 6. */ + { 436, 439 }, /* Profile 7. */ + { 404, 407 }, /* Profile 8. */ + { 440, 443 }, /* Profile 9. */ + { 436, 439 }, /* Profile 10. */ + { 436, 439 }, /* Profile 11. */ + { 436, 439 }, /* Profile 12. */ + { 404, 407 }, /* Profile 13. */ + { 440, 443 }, /* Profile 14. */ + { 436, 439 }, /* Profile 15. */ + { 436, 439 }, /* Profile 16. */ + { 404, 407 }, /* Profile 17. */ + { 440, 443 }, /* Profile 18. */ + { 436, 439 }, /* Profile 19. */ + { 436, 439 }, /* Profile 20. */ + { 436, 439 }, /* Profile 21. */ + { 404, 407 }, /* Profile 22. */ + { 440, 443 }, /* Profile 23. */ + { 436, 439 }, /* Profile 24. */ + { 436, 439 }, /* Profile 25. */ + { 436, 439 }, /* Profile 26. */ + { 404, 407 }, /* Profile 27. */ + { 440, 443 }, /* Profile 28. */ + { 436, 439 }, /* Profile 29. */ + { 436, 439 }, /* Profile 30. */ + { 404, 407 }, /* Profile 31. */ + { 440, 443 }, /* Profile 32. */ + { 436, 439 }, /* Profile 33. */ + { 436, 439 }, /* Profile 34. */ + { 436, 439 }, /* Profile 35. */ + { 404, 407 }, /* Profile 36. */ + { 440, 443 }, /* Profile 37. */ + { 436, 439 }, /* Profile 38. */ + { 436, 439 }, /* Profile 39. */ + { 436, 439 }, /* Profile 40. */ + { 404, 407 }, /* Profile 41. */ + { 440, 443 }, /* Profile 42. */ + { 436, 439 }, /* Profile 43. */ + { 436, 439 }, /* Profile 44. */ + { 404, 407 }, /* Profile 45. */ + { 440, 443 }, /* Profile 46. */ + { 436, 439 }, /* Profile 47. */ + { 436, 439 }, /* Profile 48. */ + { 436, 439 }, /* Profile 49. */ + { 404, 407 }, /* Profile 50. */ + { 440, 443 }, /* Profile 51. */ + { 436, 439 }, /* Profile 52. */ + { 436, 439 }, /* Profile 53. */ + { 436, 439 }, /* Profile 54. */ + { 404, 407 }, /* Profile 55. */ + { 440, 443 }, /* Profile 56. */ + { 436, 439 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, +};static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_names[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_names, + .reason_encode = bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_arp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_arp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_arp_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_arp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_authen_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_authen_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_authen_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_authen_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_bfd_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_bfd_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_bfd_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_bfd_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_cntag_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_cntag_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_cntag_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_cntag_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_dest_option_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_dest_option_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_dest_option_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_dest_option_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_esp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_esp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_esp_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_esp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_esp_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ethertype_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ethertype_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ethertype_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ethertype_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_frag_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_frag_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_frag_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_frag_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_frag_t_field_data, +}; + + +static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { + bcmpkt_gbp_ethernet_shim_t_ethertype_get, + bcmpkt_gbp_ethernet_shim_t_flags_get, + bcmpkt_gbp_ethernet_shim_t_reserved_get, + bcmpkt_gbp_ethernet_shim_t_sid_get, + bcmpkt_gbp_ethernet_shim_t_subtype_get, + bcmpkt_gbp_ethernet_shim_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { + bcmpkt_gbp_ethernet_shim_t_ethertype_set, + bcmpkt_gbp_ethernet_shim_t_flags_set, + bcmpkt_gbp_ethernet_shim_t_reserved_set, + bcmpkt_gbp_ethernet_shim_t_sid_set, + bcmpkt_gbp_ethernet_shim_t_subtype_set, + bcmpkt_gbp_ethernet_shim_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_src_subport_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_src_subport_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_src_subport_num_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_src_subport_num_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gpe_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gpe_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gpe_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gpe_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gre_key_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gre_key_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gre_key_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gre_key_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gre_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gre_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gre_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gre_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_gre_t_field_data, +}; + + +static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 4, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 4, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 6, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 6, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 31, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 10); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 10, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 15, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 15, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 4); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 2, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_get, + bcmpkt_hg3_base_t_cng_get, + bcmpkt_hg3_base_t_entropy_get, + bcmpkt_hg3_base_t_ext_hdr_present_get, + bcmpkt_hg3_base_t_hg3_reserved_get, + bcmpkt_hg3_base_t_l3_routed_get, + bcmpkt_hg3_base_t_mirror_copy_get, + bcmpkt_hg3_base_t_reserved_etype_get, + bcmpkt_hg3_base_t_system_destination_get, + bcmpkt_hg3_base_t_system_destination_type_get, + bcmpkt_hg3_base_t_system_source_get, + bcmpkt_hg3_base_t_tc_get, + bcmpkt_hg3_base_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_set, + bcmpkt_hg3_base_t_cng_set, + bcmpkt_hg3_base_t_entropy_set, + bcmpkt_hg3_base_t_ext_hdr_present_set, + bcmpkt_hg3_base_t_hg3_reserved_set, + bcmpkt_hg3_base_t_l3_routed_set, + bcmpkt_hg3_base_t_mirror_copy_set, + bcmpkt_hg3_base_t_reserved_etype_set, + bcmpkt_hg3_base_t_system_destination_set, + bcmpkt_hg3_base_t_system_destination_type_set, + bcmpkt_hg3_base_t_system_source_set, + bcmpkt_hg3_base_t_tc_set, + bcmpkt_hg3_base_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_field_data, +}; + + +static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_lsb_get, + bcmpkt_hg3_extension_0_t_class_id_msb_get, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, + bcmpkt_hg3_extension_0_t_flags_get, + bcmpkt_hg3_extension_0_t_forwarding_domain_get, + bcmpkt_hg3_extension_0_t_svp_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_lsb_set, + bcmpkt_hg3_extension_0_t_class_id_msb_set, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, + bcmpkt_hg3_extension_0_t_flags_set, + bcmpkt_hg3_extension_0_t_forwarding_domain_set, + bcmpkt_hg3_extension_0_t_svp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_icmp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_icmp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_icmp_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_icmp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 26, 2); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 26, 2, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 24); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 24, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 6); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 6, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 20, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { + bcmpkt_ifa_metadata_a_t_cn_get, + bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_metadata_a_t_lns_device_id_get, + bcmpkt_ifa_metadata_a_t_port_speed_get, + bcmpkt_ifa_metadata_a_t_queue_id_get, + bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { + bcmpkt_ifa_metadata_a_t_cn_set, + bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_metadata_a_t_lns_device_id_set, + bcmpkt_ifa_metadata_a_t_port_speed_set, + bcmpkt_ifa_metadata_a_t_queue_id_set, + bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { + bcmpkt_ifa_metadata_b_t_egress_port_id_get, + bcmpkt_ifa_metadata_b_t_ingress_port_id_get, + bcmpkt_ifa_metadata_b_t_mmu_stat_0_get, + bcmpkt_ifa_metadata_b_t_mmu_stat_1_get, + bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get, + bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get, + bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { + bcmpkt_ifa_metadata_b_t_egress_port_id_set, + bcmpkt_ifa_metadata_b_t_ingress_port_id_set, + bcmpkt_ifa_metadata_b_t_mmu_stat_0_set, + bcmpkt_ifa_metadata_b_t_mmu_stat_1_set, + bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set, + bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set, + bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { + bcmpkt_ifa_metadata_base_t_action_vector_get, + bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_base_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { + bcmpkt_ifa_metadata_base_t_action_vector_set, + bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_base_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_igmp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_igmp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_igmp_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_igmp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_namespace_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_namespace_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = { + bcmpkt_ioam_e2e_t_ioam_e2e_data_get, + bcmpkt_ioam_e2e_t_ioam_e2e_type_get, + bcmpkt_ioam_e2e_t_ioam_hdr_len_get, + bcmpkt_ioam_e2e_t_namespace_id_get, + bcmpkt_ioam_e2e_t_next_protocol_get, + bcmpkt_ioam_e2e_t_reserved_get, + bcmpkt_ioam_e2e_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = { + bcmpkt_ioam_e2e_t_ioam_e2e_data_set, + bcmpkt_ioam_e2e_t_ioam_e2e_type_set, + bcmpkt_ioam_e2e_t_ioam_hdr_len_set, + bcmpkt_ioam_e2e_t_namespace_id_set, + bcmpkt_ioam_e2e_t_next_protocol_set, + bcmpkt_ioam_e2e_t_reserved_set, + bcmpkt_ioam_e2e_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ipfix_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ipfix_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ipfix_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ipfix_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ipv4_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ipv4_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ipv4_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ipv4_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ipv6_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ipv6_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ipv6_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ipv6_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_l2_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_l2_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_l2_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_l2_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mpls_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mpls_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mpls_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mpls_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_p_1588_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_p_1588_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_p_1588_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_p_1588_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_rarp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_rarp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rarp_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_rarp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_routing_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_routing_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_routing_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_routing_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_rspan_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_rspan_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rspan_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_rspan_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_rspan_t_field_data, +}; + + +static int32_t bcmpkt_segment_routing_srh_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_last_entry_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_last_entry_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { + bcmpkt_segment_routing_srh_t_flags_get, + bcmpkt_segment_routing_srh_t_hdr_ext_len_get, + bcmpkt_segment_routing_srh_t_last_entry_get, + bcmpkt_segment_routing_srh_t_next_header_get, + bcmpkt_segment_routing_srh_t_routing_type_get, + bcmpkt_segment_routing_srh_t_segments_left_get, + bcmpkt_segment_routing_srh_t_tag_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { + bcmpkt_segment_routing_srh_t_flags_set, + bcmpkt_segment_routing_srh_t_hdr_ext_len_set, + bcmpkt_segment_routing_srh_t_last_entry_set, + bcmpkt_segment_routing_srh_t_next_header_set, + bcmpkt_segment_routing_srh_t_routing_type_set, + bcmpkt_segment_routing_srh_t_segments_left_set, + bcmpkt_segment_routing_srh_t_tag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_field_data, +}; + + +static int32_t bcmpkt_segment_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_last_entry_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_last_entry_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_seg_list_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_seg_list_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { + bcmpkt_segment_routing_t_hdr_ext_len_get, + bcmpkt_segment_routing_t_last_entry_flags_get, + bcmpkt_segment_routing_t_next_header_get, + bcmpkt_segment_routing_t_routing_type_get, + bcmpkt_segment_routing_t_seg_list_get, + bcmpkt_segment_routing_t_segments_left_get, + bcmpkt_segment_routing_t_tag_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { + bcmpkt_segment_routing_t_hdr_ext_len_set, + bcmpkt_segment_routing_t_last_entry_flags_set, + bcmpkt_segment_routing_t_next_header_set, + bcmpkt_segment_routing_t_routing_type_set, + bcmpkt_segment_routing_t_seg_list_set, + bcmpkt_segment_routing_t_segments_left_set, + bcmpkt_segment_routing_t_tag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_std_segment_id_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_std_segment_id_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { + bcmpkt_std_segment_id_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { + bcmpkt_std_segment_id_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_field_data, +}; + + +static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_svtag_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_get, + bcmpkt_svtag_t_data_upr_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_svtag_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_set, + bcmpkt_svtag_t_data_upr_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_svtag_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_svtag_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_svtag_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_udp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_udp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_udp_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_udp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, + bcmpkt_unknown_l5_t_l5_bytes_8_9_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, + bcmpkt_unknown_l5_t_l5_bytes_8_9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_vlan_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_vlan_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_vlan_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_vlan_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_vxlan_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_vxlan_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_vxlan_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_vxlan_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_wesp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_wesp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_wesp_t_field_data[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_wesp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_30_8_0_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56890_a0_dna_6_5_30_8_0_flexhdr_info_list[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_arp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_authen_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_bfd_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_cntag_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_dest_option_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_esp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ethertype_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_frag_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gpe_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gre_key_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gre_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_icmp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_igmp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ipfix_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ipv4_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ipv6_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_l2_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mpls_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_p_1588_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_rarp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_routing_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_rspan_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_svtag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_svtag_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_svtag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_udp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_vlan_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_vxlan_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_30_8_0_wesp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_30_8_0_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_info, + .reasons_info = &bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56890_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56890_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56890_a0_dna_6_5_30_8_0_flexhdr_id_map[] = { + BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56890_a0_dna_6_5_30_8_0_flexhdr_map_get(void) +{ + return bcm56890_a0_dna_6_5_30_8_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56890_a0_dna_6_5_30_8_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56890_a0_dna_6_5_30_8_0_flexhdr_info_list[hid]; +} + +int bcm56890_a0_dna_6_5_30_8_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 14, + 21, + 22, + 67, +}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..2f34751f8ff6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,7400 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm78800_a0_dna_6_5_30_3_1_sf_match_id_info.yml + * for device bcm78800_a0 and variant dna_6_5_30_3_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] = +{ + 0x366c, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = +{ + 0x78f0, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = +{ + 0x1fffe, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = +{ + 0xff00, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] = +{ + 0x1e4c8, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] = +{ + 0x10, + 0x400000, + 0x1dd8000, + 0x20, + 0x0, + 0x0, + 0x0, + 0xbfddfddf, + 0xf77fbbfb, + 0xddfddf77, + 0x1, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x400000, + 0x0, + 0x100, + 0x800776, + 0x0, + 0x0, + 0x0, + 0xf77c0000, + 0xefeeff77, + 0x7ddfddfe, + 0x777f7, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde, + 0x0, + 0x0, + 0x7778, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0x0, + 0x3bbc0, + 0x0, + 0x0, + 0x77780, + 0x0, + 0x0, + 0x3bbc0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0xdde00000, + 0x1, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0xde000000, + 0x1d, + 0x0, + 0x0, + 0xeef0, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] = +{ + 0x0, + 0x0, + 0x100000, + 0x1000000, + 0x0, + 0x0, + 0x2000, + 0x100100, + 0x4002002, + 0x10010040, + 0x400400, + 0x10008008, + 0x40040100, + 0x1001000, + 0x40040020, + 0x100100, + 0x4002002, + 0x80080040, + 0x200200, + 0x2002000, + 0x80040040, + 0x200800, + 0x4004002, + 0x80080, + 0x401001, + 0x2001004, + 0x40040020, + 0x800800, + 0x2002, + 0x0, + 0x0, + 0x40, + 0x400, + 0x0, + 0x80000000, + 0x4000000, + 0x80080040, + 0x1001000, + 0x10004004, + 0x200100, + 0x4004002, + 0x40010010, + 0x800400, + 0x4010010, + 0x80080040, + 0x1001000, + 0x8020020, + 0x80000080, + 0x1000800, + 0x20020010, + 0x80080, + 0x2001001, + 0x40040020, + 0x40100100, + 0x800800, + 0x20010010, + 0x80080200, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xff77f77c, + 0xddfeefee, + 0x77f77ddf, + 0x7, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xddf00000, + 0xbfbbfddf, + 0xf77f77fb, + 0x1ddfdd, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde000, + 0x0, + 0x0, + 0x7778000, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0x3bbc0, + 0x0, + 0x0, + 0x3bbc0000, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0xc0000000, + 0x3bb, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0x1dde, + 0x0, + 0x0, + 0x7778, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0x0, + 0xeef0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0xeef0000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] = +{ + 0x0, + 0x0, + 0x0, + 0x40, + 0x0, + 0x0, + 0x0, + 0x2000000, + 0x0, + 0x0, + 0x8000000, + 0x0, + 0x0, + 0x20000008, + 0x0, + 0x0, + 0x40000, + 0x0, + 0x0, + 0x40000000, + 0x0, + 0x0, + 0x80000000, + 0x0, + 0x0, + 0x0, + 0x400, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x800, + 0x0, + 0x0, + 0x2000, + 0x0, + 0x200000, + 0x8000, + 0x0, + 0x0, + 0x10, + 0x0, + 0x0, + 0x10000, + 0x0, + 0x0, + 0x20000, + 0x0, + 0x0, + 0x10000000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] = +{ + 0x1e, + 0x400000, + 0x1dd8000, + 0x3ddcafe0, + 0x0, + 0x8000, + 0xc003bb00, + 0xbfddfddf, + 0xf77fbbfb, + 0xddfddf77, + 0xff77f77d, + 0xddfeefee, + 0x77f77ddf, + 0xfddfddff, + 0x77f77fbb, + 0xbfddfddf, + 0xf77fbbfb, + 0xefeeff77, + 0x7fbbfbbe, + 0xfbbfbbe5, + 0xeff77f77, + 0xbfbbeefe, + 0xf77f77fb, + 0xdfeefeef, + 0x7f77ddfd, + 0xfbbfddf7, + 0x77f77fbb, + 0xbeefeeff, + 0x1bbbfb, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfddfddf0, + 0x77f77fbb, + 0x1ddfddf, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77c00000, + 0xfeeff77f, + 0xf77ddfdd, + 0x777, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0xf0000000, + 0xee, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0xeef, + 0x0, + 0x0, + 0x777800, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0x3bbc000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0x3bbc0000, + 0x0, + 0x0, + 0xe0000000, + 0x1dd, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbe000000, + 0xf77fbbfb, + 0xefeeff77, + 0x3bbfbbe, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xefeef800, + 0xfddfddfe, + 0xeefbbfbb, + 0xeef, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3bbc0, + 0x0, + 0x0, + 0xeef00, + 0x0, + 0xc0000000, + 0x3bb, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0x777800, + 0x0, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0xeef0000, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0xe0000000, + 0x1dd, + 0x0, + 0xc0000000, + 0x3bb, + 0x0, + 0x0, + 0x1dde00, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] = +{ + 0x0, + 0x400000, + 0x0, + 0x80, + 0x0, + 0x8000, + 0x0, + 0x8004004, + 0x140080, + 0x400001, + 0x20010010, + 0x500200, + 0x1000004, + 0x80040040, + 0x1001400, + 0x8004000, + 0x100080, + 0x2002801, + 0x4008000, + 0x80080, + 0x2801001, + 0x8000020, + 0x100100, + 0x5002002, + 0x10000040, + 0x80080000, + 0x1001000, + 0x20028, + 0x80, + 0x0, + 0x100, + 0x2000000, + 0x0, + 0x0, + 0x2, + 0x100000, + 0x2002001, + 0x40050, + 0x400100, + 0x8008004, + 0x100140, + 0x1000400, + 0x50020010, + 0x400, + 0x2002001, + 0xa0040040, + 0x800, + 0x2001002, + 0x40040020, + 0x800a00, + 0x4002000, + 0x80080040, + 0x1001400, + 0x4000, + 0x40020020, + 0xa00400, + 0x2000008, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] = +{ + 0x0, + 0x0, + 0x0, + 0xaf00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x78000000, + 0x5, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbc000000, + 0x2, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x15e000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] = +{ + 0x0, + 0x0, + 0x0, + 0x8800, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x40000000, + 0x4, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x20000000, + 0x2, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x110000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] = +{ + 0x0, + 0x0, + 0x0, + 0x40020, + 0x0, + 0x0, + 0x40000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x800000, + 0x10, + 0x0, + 0x0, + 0x10000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] = +{ + 0x18, + 0x400000, + 0x1dd8000, + 0x3ddcafe0, + 0x0, + 0x8000, + 0x4003bb00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x600000, + 0x0, + 0x100, + 0xbf800776, + 0xf772, + 0x0, + 0xec000002, + 0x1000e, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0xbfddfddf, + 0xf77fbbfb, + 0xddfddf77, + 0xff77f77d, + 0xddfeefee, + 0x77f77ddf, + 0xfddfddff, + 0x77f77fbb, + 0xbfddfddf, + 0xf77fbbfb, + 0xefeeff77, + 0x7fbbfbbe, + 0xfbbfbbe5, + 0xeff77f77, + 0xbfbbeefe, + 0xf77f77fb, + 0xdfeefeef, + 0x7f77ddfd, + 0xfbbfddf7, + 0x77f77fbb, + 0xbeefeeff, + 0x3bbfb, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf77e0000, + 0xefeeff77, + 0x7ddfddfe, + 0xddf777f7, + 0xbfbbfddf, + 0xf77f77fb, + 0x77fddfdd, + 0xfeeff77f, + 0xf77ddfdd, + 0xefeeff77, + 0xfddfddfe, + 0xeefbbfbb, + 0xef95feef, + 0xfddfeefe, + 0xbbfbbfdd, + 0xdfeefeef, + 0xfbbfddfd, + 0x77f77fbb, + 0x77ddfddf, + 0xfeefeeff, + 0xbbfddfdd, + 0xefeefbbf, + 0xe, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] = +{ + 0x0, + 0x0, + 0x400000, + 0x4000000, + 0x0, + 0x0, + 0x8000, + 0x400400, + 0x10008008, + 0x40040100, + 0x1001000, + 0x40020020, + 0x100400, + 0x4004001, + 0x100080, + 0x400401, + 0x10008008, + 0x200100, + 0x800802, + 0x8008000, + 0x100100, + 0x802002, + 0x10010008, + 0x200200, + 0x1004004, + 0x8004010, + 0x100080, + 0x2002001, + 0x8008, + 0x0, + 0x0, + 0x100, + 0x1000, + 0x0, + 0x0, + 0x10000002, + 0x200100, + 0x4004002, + 0x40010010, + 0x800400, + 0x10010008, + 0x40040, + 0x2001001, + 0x10040040, + 0x200100, + 0x4004002, + 0x20080080, + 0x200, + 0x4002002, + 0x80080040, + 0x200200, + 0x8004004, + 0x100080, + 0x400401, + 0x2002001, + 0x80040040, + 0x200800, + 0x2, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbbfbbe0, + 0xeff77f77, + 0xbfbbeefe, + 0x3b, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xef800000, + 0xfddfeefe, + 0xbbfbbfdd, + 0xeefeef, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0xdde00000, + 0x1, + 0x0, + 0x777800, + 0x0, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0xde000000, + 0x1d, + 0x0, + 0x0, + 0xeef0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0x77780, + 0x0, + 0xe0000000, + 0x1dd, + 0x0, + 0xc0000000, + 0x3bb, + 0x0, + 0x0, + 0x3bbc00, + 0x0, + 0x0, + 0x777800, + 0x0, + 0x0, + 0xbbc00000, + 0x3, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf77f77c0, + 0xdfeefeef, + 0x7f77ddfd, + 0x77, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xdf000000, + 0xfbbfddfd, + 0x77f77fbb, + 0x1ddfddf, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0x1dde, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0x0, + 0xeef0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0xeef0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0x1dde00, + 0x0, + 0x0, + 0x3bbc00, + 0x0, + 0x0, + 0xbbc00000, + 0x3, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0x0, + 0x3bbc, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] = +{ + 0x0, + 0x0, + 0x58000, + 0x580e00, + 0x0, + 0x0, + 0xb00, + 0xb0058058, + 0x1600b00, + 0x5805816, + 0xc0160160, + 0x5802c02, + 0x16016058, + 0x580580, + 0x1601600b, + 0xb0058058, + 0x1600b00, + 0x2c02c016, + 0x700b00b0, + 0xb00b00, + 0x2c016016, + 0xb00b02c0, + 0x1601600, + 0x5802c02c, + 0x60160580, + 0xb00581, + 0x1601600b, + 0xb02c02c0, + 0xb00, + 0x0, + 0x0, + 0x38000016, + 0x160, + 0x0, + 0x2c000000, + 0x1600000, + 0x2c02c016, + 0x60580580, + 0x5801601, + 0xb00b0058, + 0x81601600, + 0x16005805, + 0x802c0160, + 0x1605805, + 0x2c02c016, + 0x580580, + 0x2c0b00b, + 0x2c01c02c, + 0x805802c0, + 0xb00b005, + 0x5802c02c, + 0xb00580, + 0x1601600b, + 0x16058058, + 0x802c02c0, + 0xb005805, + 0x2c02c0b0, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] = +{ + 0x0, + 0x0, + 0x50000, + 0x500c00, + 0x0, + 0x0, + 0xa00, + 0xa0050050, + 0x1400a00, + 0x5005014, + 0x80140140, + 0x5002802, + 0x14014050, + 0x500500, + 0x1401400a, + 0xa0050050, + 0x1400a00, + 0x28028014, + 0x600a00a0, + 0xa00a00, + 0x28014014, + 0xa00a0280, + 0x1401400, + 0x50028028, + 0x40140500, + 0xa00501, + 0x1401400a, + 0xa0280280, + 0xa00, + 0x0, + 0x0, + 0x30000014, + 0x140, + 0x0, + 0x28000000, + 0x1400000, + 0x28028014, + 0x40500500, + 0x5001401, + 0xa00a0050, + 0x1401400, + 0x14005005, + 0x280140, + 0x1405005, + 0x28028014, + 0x500500, + 0x280a00a, + 0x28018028, + 0x500280, + 0xa00a005, + 0x50028028, + 0xa00500, + 0x1401400a, + 0x14050050, + 0x280280, + 0xa005005, + 0x280280a0, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] = +{ + 0x0, + 0x0, + 0xd80000, + 0xd80a000, + 0x0, + 0x0, + 0x1b000, + 0xd80d80, + 0x3601b01b, + 0xd80d8360, + 0x3603600, + 0xd806c06c, + 0x60360d80, + 0xd80d803, + 0x603601b0, + 0xd80d83, + 0x3601b01b, + 0xc06c0360, + 0x1b01b06, + 0x1b01b005, + 0xc0360360, + 0x1b06c06, + 0x3603601b, + 0x806c06c0, + 0x360d80d, + 0x1b00d836, + 0x603601b0, + 0x6c06c03, + 0x1b01b, + 0x0, + 0x0, + 0x80000360, + 0x3602, + 0x0, + 0xc0000000, + 0x36000006, + 0xc06c0360, + 0xd80d806, + 0xd8036036, + 0x1b00d80, + 0x3603601b, + 0x600d80d8, + 0x6c03603, + 0x360d80d8, + 0xc06c0360, + 0xd80d806, + 0x6c1b01b0, + 0xc01406c0, + 0xd806c06, + 0xb01b00d8, + 0x806c06c1, + 0x1b00d80d, + 0x603601b0, + 0x60d80d83, + 0x6c06c03, + 0xb00d80d8, + 0xc06c1b01, + 0x6, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x100000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] = +{ + 0x0, + 0x0, + 0x1000000, + 0x10000000, + 0x0, + 0x0, + 0x20000, + 0x1001000, + 0x40020020, + 0x100400, + 0x4004001, + 0x80080, + 0x401001, + 0x10010004, + 0x400200, + 0x1001004, + 0x40020020, + 0x800400, + 0x2002008, + 0x20020000, + 0x400400, + 0x2008008, + 0x40040020, + 0x800800, + 0x4010010, + 0x20010040, + 0x400200, + 0x8008004, + 0x20020, + 0x0, + 0x0, + 0x400, + 0x4000, + 0x0, + 0x0, + 0x40000008, + 0x800400, + 0x10010008, + 0x40040, + 0x2001001, + 0x40040020, + 0x100100, + 0x8004004, + 0x40100100, + 0x800400, + 0x10010008, + 0x80200200, + 0x800, + 0x10008008, + 0x200100, + 0x800802, + 0x20010010, + 0x400200, + 0x1001004, + 0x8008004, + 0x100100, + 0x802002, + 0x8, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] = +{ + 0x0, + 0x0, + 0x840000, + 0x8400000, + 0x0, + 0x0, + 0x10800, + 0x80840840, + 0x21010810, + 0x84084210, + 0x2102100, + 0x84042042, + 0x10210840, + 0x8408402, + 0x10210108, + 0x80840842, + 0x21010810, + 0x20420210, + 0x1081084, + 0x10810800, + 0x20210210, + 0x81084204, + 0x21021010, + 0x40420420, + 0x2108408, + 0x10808421, + 0x10210108, + 0x84204202, + 0x10810, + 0x0, + 0x0, + 0x210, + 0x2100, + 0x0, + 0x20000000, + 0x21000004, + 0x20420210, + 0x8408404, + 0x84021021, + 0x81080840, + 0x21021010, + 0x10084084, + 0x4202102, + 0x21084084, + 0x20420210, + 0x8408404, + 0x42108108, + 0x20000420, + 0x8404204, + 0x8108084, + 0x40420421, + 0x10808408, + 0x10210108, + 0x10840842, + 0x4204202, + 0x8084084, + 0x20421081, + 0x4, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] = +{ + 0x0, + 0x0, + 0x0, + 0x20000000, + 0x0, + 0x8000, + 0x4003bb00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbbe0000, + 0x77f77fbb, + 0xbeefeeff, + 0x3bbfb, + 0x0, + 0x0, + 0x0, + 0x8000, + 0x0, + 0xec000002, + 0x1000e, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfeefeef8, + 0xbbfddfdd, + 0xefeefbbf, + 0xe, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xdde00000, + 0x1, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0x1dde000, + 0x0, + 0x0, + 0x3bbc000, + 0x0, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0x78000000, + 0x77, + 0x0, + 0x0, + 0x3bbc0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77780, + 0x0, + 0x0, + 0x1dde00, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0xeef, + 0x0, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0x1dde000, + 0x0, + 0x0, + 0xef000000, + 0xe, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[2] = +{ + 0xcc066330, + 0x66330198, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[2] = +{ + 0x10088440, + 0x88440221, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[3] = +{ + 0xff800000, + 0xffffffff, + 0x7, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[3] = +{ + 0x0, + 0xffffe000, + 0x7, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[3] = +{ + 0xe01f0f80, + 0xf0f807c3, + 0x1, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[3] = +{ + 0xfffffffe, + 0xffffffff, + 0x7, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[3] = +{ + 0x3ff000, + 0xff000ffc, + 0x3, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[3] = +{ + 0x88744a20, + 0x44a21d12, + 0x7, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[15] = +{ + 0x10, + 0x0, + 0x40, + 0x1efd80, + 0x20, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xeff7ef80, + 0xdfefdff7, + 0xbfdfbfef, + 0xeff7efdf, + 0xf7, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[37] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7ef00, + 0x0, + 0x0, + 0x0, + 0x3dfbc00, + 0x0, + 0x0, + 0x0, + 0xf7ef000, + 0x0, + 0x0, + 0x0, + 0xf0000000, + 0xf7e, + 0x0, + 0x0, + 0x0, + 0xf7ef000, + 0x0, + 0x0, + 0x0, + 0x3dfbc000, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7ef000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[42] = +{ + 0x0, + 0x0, + 0x0, + 0x1000, + 0x0, + 0x8000000, + 0x0, + 0x0, + 0x0, + 0x1000, + 0x80008000, + 0x10000, + 0x20001, + 0x80008002, + 0x20000, + 0x40002, + 0x80004, + 0x20008, + 0x80002, + 0x100008, + 0x200020, + 0x80008, + 0x0, + 0x80008, + 0x100010, + 0x200020, + 0x80008, + 0x80000, + 0x100008, + 0x200010, + 0x80020, + 0x200008, + 0x400020, + 0x800040, + 0x200080, + 0x100020, + 0x80004, + 0x100008, + 0x200010, + 0x80020, + 0x44400008, + 0x4444, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dcn[41] = +{ + 0x0, + 0x0, + 0x0, + 0x2000, + 0x0, + 0x10000000, + 0x0, + 0x0, + 0x0, + 0x2000, + 0x10000, + 0x20001, + 0x40002, + 0x10004, + 0x40001, + 0x80004, + 0x100008, + 0x40010, + 0x100004, + 0x200010, + 0x400040, + 0x100010, + 0x0, + 0x100010, + 0x200020, + 0x400040, + 0x100010, + 0x100000, + 0x200010, + 0x400020, + 0x100040, + 0x400010, + 0x800040, + 0x1000080, + 0x400100, + 0x200040, + 0x100008, + 0x200010, + 0x400020, + 0x100040, + 0x10, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[19] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbfdfbe00, + 0x7fbf7fdf, + 0xff7effbf, + 0xbfdfbf7e, + 0x3df, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xef000000, + 0xf7, + 0x0, + 0x0, + 0xbc000000, + 0x3df, + 0x0, + 0x0, + 0xf0000000, + 0xf7e, + 0x0, + 0x0, + 0x0, + 0xf7ef000, + 0x0, + 0x0, + 0x0, + 0xf0000000, + 0xf7e, + 0x0, + 0x0, + 0xc0000000, + 0x3dfb, + 0x0, + 0x0, + 0x0, + 0xf0000000, + 0xf7e, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x40, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x100, + 0x0, + 0x0, + 0x0, + 0x400, + 0x0, + 0x0, + 0x400, + 0x1000, + 0x0, + 0x0, + 0x0, + 0x10000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1000, + 0x0, + 0x0, + 0x0, + 0x4000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[42] = +{ + 0x1e, + 0x0, + 0x40, + 0x1efd80, + 0xffffffe0, + 0x7ee217ff, + 0x1f, + 0x0, + 0x40, + 0x1efd80, + 0xeff7efe0, + 0xdfefdff7, + 0xbfdfbfef, + 0xeff7efdf, + 0xbfdfbef7, + 0x7fbf7fdf, + 0xff7effbf, + 0xbfdfbf7e, + 0xff7effdf, + 0xfefdff7e, + 0xfdfbfdfb, + 0xff7eff7e, + 0xffffffff, + 0xff7eff7e, + 0xfefdfefd, + 0xfdfbfdfb, + 0xff7eff7e, + 0xff7ef885, + 0xfefdff7e, + 0xfdfbfefd, + 0xff7efdfb, + 0xfdfbff7e, + 0xfbf7fdfb, + 0xf7effbf7, + 0xfdfbf7ef, + 0x7efdfdfb, + 0xff7effbf, + 0xfefdff7e, + 0xfdfbfefd, + 0xff7efdfb, + 0xffffef7e, + 0x7ffff, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[22] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xff7ef800, + 0xfefdff7e, + 0xfdfbfdfb, + 0xf7eff7e, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1efde00, + 0x0, + 0x0, + 0x0, + 0x7bf7800, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xe0000000, + 0x1efd, + 0x0, + 0x0, + 0x0, + 0x1efde000, + 0x0, + 0x0, + 0x0, + 0x7bf78000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1efde000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[41] = +{ + 0x0, + 0x0, + 0x0, + 0xc000, + 0x0, + 0x60000000, + 0x0, + 0x0, + 0x0, + 0xc000, + 0x60000, + 0xc0006, + 0x18000c, + 0x60018, + 0x180006, + 0x300018, + 0x600030, + 0x180060, + 0x600018, + 0xc00060, + 0x1800180, + 0x600060, + 0x0, + 0x600060, + 0xc000c0, + 0x1800180, + 0x600060, + 0x600000, + 0xc00060, + 0x18000c0, + 0x600180, + 0x1800060, + 0x3000180, + 0x6000300, + 0x1800600, + 0xc00180, + 0x600030, + 0xc00060, + 0x18000c0, + 0x600180, + 0x60, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[23] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0xffffff80, + 0x3f, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf0000000, + 0x7ffffff, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[23] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x1fffe00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xc0000000, + 0x3fff, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[23] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0xfe03fc00, + 0x1, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x3fc07f, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[23] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x999b3000, + 0x31, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x6333366, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[23] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0xe1e3c000, + 0x3d, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7bc3c78, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[27] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf8000000, + 0xff7eff7e, + 0xfefdfefd, + 0xfdfbfdfb, + 0xf7eff7e, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xde000000, + 0x1ef, + 0x0, + 0x0, + 0x78000000, + 0x7bf, + 0x0, + 0x0, + 0x1efde000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1efde000, + 0x0, + 0x0, + 0x0, + 0xe0000000, + 0x1efd, + 0x0, + 0x0, + 0x80000000, + 0x7bf7, + 0x0, + 0x0, + 0x0, + 0xe0000000, + 0x1efd, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[40] = +{ + 0x0, + 0x0, + 0x40, + 0x0, + 0x0, + 0x40, + 0x0, + 0x0, + 0x40, + 0x0, + 0x2000200, + 0x4000400, + 0x8000a00, + 0x2000000, + 0x8000800, + 0x10001000, + 0x20002800, + 0x8000000, + 0x20002000, + 0xa0004000, + 0x8000, + 0x2000, + 0x20000000, + 0x40002000, + 0xa0004000, + 0x8000, + 0x10002000, + 0x20002000, + 0x40004000, + 0x8000a000, + 0x20000000, + 0x80008000, + 0x10000, + 0x28001, + 0x80000002, + 0x0, + 0x20002000, + 0x40004000, + 0x8000a000, + 0x20000000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[28] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x21780, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xe0000000, + 0x85, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[28] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x20400, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x81, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[11] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x20, + 0x200000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x20, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[41] = +{ + 0x0, + 0x0, + 0x0, + 0x8000, + 0x0, + 0x40000000, + 0x0, + 0x0, + 0x0, + 0x8000, + 0x40000, + 0x80004, + 0x100008, + 0x40010, + 0x100004, + 0x200010, + 0x400020, + 0x100040, + 0x400010, + 0x800040, + 0x1000100, + 0x400040, + 0x0, + 0x400040, + 0x800080, + 0x1000100, + 0x400040, + 0x400000, + 0x800040, + 0x1000080, + 0x400100, + 0x1000040, + 0x2000100, + 0x4000200, + 0x1000400, + 0x800100, + 0x400020, + 0x800040, + 0x1000080, + 0x400100, + 0x40, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[11] = +{ + 0x18, + 0x0, + 0x40, + 0x1efd80, + 0xffffffe0, + 0x7ee217ff, + 0x1f, + 0x0, + 0x40, + 0x1efd80, + 0x20, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[41] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xeff7efc0, + 0xdfefdff7, + 0xbfdfbfef, + 0xeff7efdf, + 0xbfdfbef7, + 0x7fbf7fdf, + 0xff7effbf, + 0xbfdfbf7e, + 0xff7effdf, + 0xfefdff7e, + 0xfdfbfdfb, + 0xff7eff7e, + 0xffffffff, + 0xff7eff7e, + 0xfefdfefd, + 0xfdfbfdfb, + 0xff7eff7e, + 0xff7ef885, + 0xfefdff7e, + 0xfdfbfefd, + 0xff7efdfb, + 0xfdfbff7e, + 0xfbf7fdfb, + 0xf7effbf7, + 0xfdfbf7ef, + 0x7efdfdfb, + 0xff7effbf, + 0xfefdff7e, + 0xfdfbfefd, + 0xff7efdfb, + 0xf7e, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[42] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffffe000, + 0xffff, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[42] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffffc000, + 0xfff, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[42] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffff8000, + 0xff, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[42] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffff0000, + 0xf, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[41] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfffe0000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[41] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffc0000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[41] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf80000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[42] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x66600000, + 0x6666, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[42] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x88800000, + 0x8888, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[42] = +{ + 0x0, + 0x0, + 0x0, + 0x20000, + 0x0, + 0x0, + 0x1, + 0x0, + 0x0, + 0x20000, + 0x100000, + 0x200010, + 0x400020, + 0x100040, + 0x400010, + 0x800040, + 0x1000080, + 0x400100, + 0x1000040, + 0x2000100, + 0x4000400, + 0x1000100, + 0x0, + 0x1000100, + 0x2000200, + 0x4000400, + 0x1000100, + 0x1000000, + 0x2000100, + 0x4000200, + 0x1000400, + 0x4000100, + 0x8000400, + 0x10000800, + 0x4001000, + 0x2000400, + 0x1000080, + 0x2000100, + 0x4000200, + 0x1000400, + 0x100, + 0x10000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[32] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xff7ef800, + 0xfefdff7e, + 0xfdfbfefd, + 0xff7efdfb, + 0xf7e, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3dfbc00, + 0x0, + 0x0, + 0x0, + 0xf7ef000, + 0x0, + 0x0, + 0xc0000000, + 0x3dfb, + 0x0, + 0x0, + 0x0, + 0xc0000000, + 0x3dfb, + 0x0, + 0x0, + 0x0, + 0x3dfbc000, + 0x0, + 0x0, + 0x0, + 0xf7ef0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3dfbc000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[42] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x20000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[36] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfdfbe000, + 0xfbf7fdfb, + 0xf7effbf7, + 0xfdfbf7ef, + 0x3dfb, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[40] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbc000000, + 0x3df, + 0x0, + 0x0, + 0xf0000000, + 0xf7e, + 0x0, + 0x0, + 0x3dfbc000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3dfbc000, + 0x0, + 0x0, + 0x0, + 0xc0000000, + 0x3dfb, + 0x0, + 0x0, + 0x0, + 0xf7ef, + 0x0, + 0x0, + 0x0, + 0xc0000000, + 0x3dfb, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1[36] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1efdc000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[41] = +{ + 0x0, + 0x0, + 0x0, + 0x580, + 0x0, + 0x2c00700, + 0x0, + 0x0, + 0x0, + 0x580, + 0x2c002c00, + 0x58005800, + 0xb000b000, + 0x2c002c00, + 0xb000b000, + 0x60016000, + 0xc002c001, + 0xb000b002, + 0xc002c000, + 0x58002, + 0xc00b000b, + 0x2c002, + 0xc0000000, + 0x8002c002, + 0x58005, + 0xc00b000b, + 0xc002c002, + 0xc002c001, + 0x80058002, + 0xb0005, + 0xc002c00b, + 0xb0002, + 0x16000b, + 0x2c0016, + 0xb002c, + 0x6005800b, + 0xc002c001, + 0x80058002, + 0xb0005, + 0xc002c00b, + 0x2, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[41] = +{ + 0x0, + 0x0, + 0x0, + 0x500, + 0x0, + 0x2800600, + 0x0, + 0x0, + 0x0, + 0x500, + 0x28002800, + 0x50005000, + 0xa000a000, + 0x28002800, + 0xa000a000, + 0x40014000, + 0x80028001, + 0xa000a002, + 0x80028000, + 0x50002, + 0x800a000a, + 0x28002, + 0x80000000, + 0x28002, + 0x50005, + 0x800a000a, + 0x80028002, + 0x80028001, + 0x50002, + 0xa0005, + 0x8002800a, + 0xa0002, + 0x14000a, + 0x280014, + 0xa0028, + 0x4005000a, + 0x80028001, + 0x50002, + 0xa0005, + 0x8002800a, + 0x2, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[41] = +{ + 0x0, + 0x0, + 0x0, + 0xef800, + 0x0, + 0x7c021000, + 0x7, + 0x0, + 0x0, + 0xef800, + 0xc077c000, + 0x80ef8077, + 0x1df00ef, + 0xc077c1df, + 0x1df0077, + 0x3be01df, + 0x77c03be, + 0x1df077c, + 0x77c01df, + 0xef8077c, + 0x1df01df0, + 0x77c077c, + 0x0, + 0x77c077c, + 0xef80ef8, + 0x1df01df0, + 0x77c077c, + 0x77c0084, + 0xef8077c, + 0x1df00ef8, + 0x77c1df0, + 0x1df0077c, + 0x3be01df0, + 0x77c03be0, + 0x1df077c0, + 0xef81df0, + 0x77c03be, + 0xef8077c, + 0x1df00ef8, + 0x77c1df0, + 0x77c, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[42] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x40000, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[41] = +{ + 0x0, + 0x0, + 0x0, + 0x100000, + 0x0, + 0x0, + 0x8, + 0x0, + 0x0, + 0x100000, + 0x800000, + 0x1000080, + 0x2000100, + 0x800200, + 0x2000080, + 0x4000200, + 0x8000400, + 0x2000800, + 0x8000200, + 0x10000800, + 0x20002000, + 0x8000800, + 0x0, + 0x8000800, + 0x10001000, + 0x20002000, + 0x8000800, + 0x8000000, + 0x10000800, + 0x20001000, + 0x8002000, + 0x20000800, + 0x40002000, + 0x80004000, + 0x20008000, + 0x10002000, + 0x8000400, + 0x10000800, + 0x20001000, + 0x8002000, + 0x800, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[41] = +{ + 0x0, + 0x0, + 0x0, + 0x40400, + 0x0, + 0x2000000, + 0x2, + 0x0, + 0x0, + 0x40400, + 0x20202000, + 0x40404020, + 0x80808040, + 0x20202080, + 0x80808020, + 0x1010080, + 0x2020101, + 0x80808202, + 0x2020080, + 0x4040202, + 0x8080808, + 0x2020202, + 0x0, + 0x2020202, + 0x4040404, + 0x8080808, + 0x2020202, + 0x2020000, + 0x4040202, + 0x8080404, + 0x2020808, + 0x8080202, + 0x10100808, + 0x20201010, + 0x8082020, + 0x4040808, + 0x2020101, + 0x4040202, + 0x8080404, + 0x2020808, + 0x202, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[41] = +{ + 0x0, + 0x0, + 0x0, + 0x80000, + 0x0, + 0x0, + 0x4, + 0x0, + 0x0, + 0x80000, + 0x400000, + 0x800040, + 0x1000080, + 0x400100, + 0x1000040, + 0x2000100, + 0x4000200, + 0x1000400, + 0x4000100, + 0x8000400, + 0x10001000, + 0x4000400, + 0x0, + 0x4000400, + 0x8000800, + 0x10001000, + 0x4000400, + 0x4000000, + 0x8000400, + 0x10000800, + 0x4001000, + 0x10000400, + 0x20001000, + 0x40002000, + 0x10004000, + 0x8001000, + 0x4000200, + 0x8000400, + 0x10000800, + 0x4001000, + 0x400, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[41] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x10, + 0x0, + 0x40, + 0x1efd80, + 0x20, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xff7ef800, + 0xfefdff7e, + 0xfdfbfefd, + 0xff7efdfb, + 0xf7e, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[41] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xef000000, + 0xf7, + 0x0, + 0x0, + 0xbc000000, + 0x3df, + 0x0, + 0x0, + 0xf7ef000, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7ef000, + 0x0, + 0x0, + 0x0, + 0xf0000000, + 0xf7e, + 0x0, + 0x0, + 0xc0000000, + 0x3dfb, + 0x0, + 0x0, + 0x0, + 0xf0000000, + 0xf7e, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = +{ + 0x4, +}; + +static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = +{ + 0x8, +}; + + +static bcmpkt_rxpmd_match_id_db_t +bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_CNTAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_DCN", + .match = 0x818, + .match_mask = 0x3c18, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x38, + .match_mask = 0x438, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x10000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x4, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", + .match = 0x18000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x6, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x18, + .match_mask = 0x418, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3818, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x2018, + .match_mask = 0x3c18, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN", + .match = 0x818, + .match_mask = 0x3c18, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x38, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x10000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", + .match = 0x18000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x18, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3818, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x2018, + .match_mask = 0x3c18, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_CNTAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 39, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 55, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 42, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 55, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 55, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 29, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 45, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 56, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 48, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 56, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 48, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 48, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 36, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 36, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 51, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 29, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 54, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x18, + .match_mask = 0x418, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 29, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3818, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_CNTAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 3, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 3, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 3, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 3, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 3, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 3, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 15, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 42, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DCN", + .match = 0x818, + .match_mask = 0x3c18, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dcn, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 19, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 42, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 22, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x38, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 23, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 23, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 23, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x10000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 23, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 23, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 27, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 40, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 28, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 28, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 11, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 11, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 42, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 42, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 42, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 42, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 42, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 42, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 42, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 32, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 42, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 36, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 40, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", + .match = 0x18000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 36, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x18, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 42, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3818, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x2018, + .match_mask = 0x3c18, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_sys_hdr_loopback, + + }, + { + /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db_info = { + .num_entries = 228, + .db = bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db_info_get(void) { + return &bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map_info = { + .num_entries = 228, + .map = bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map_info_get(void) { + return &bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_pkt_flexhdr.c new file mode 100644 index 000000000000..d77e56124704 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_pkt_flexhdr.c @@ -0,0 +1,11476 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm78800_a0 and variant dna_6_5_30_3_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[13] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[13] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[13] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[13] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[13] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[13] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[13] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[13] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SRV6); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP_EPIPE); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[13] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[13] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[13] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[13] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[13] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[13] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[13] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[13] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[13] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[13] |= (0x1 << 31); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SRV6)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP_EPIPE)) { + reason[12] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_data[] = { + { + .name = "ALLOW_NAT_3_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ALLOW_NAT_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 416, 419 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 416, 419 }, /* Profile 4. */ + { 416, 419 }, /* Profile 5. */ + { 416, 419 }, /* Profile 6. */ + { 416, 419 }, /* Profile 7. */ + { 408, 411 }, /* Profile 8. */ + { 416, 419 }, /* Profile 9. */ + { 416, 419 }, /* Profile 10. */ + { 416, 419 }, /* Profile 11. */ + { 412, 415 }, /* Profile 12. */ + { 404, 407 }, /* Profile 13. */ + { 412, 415 }, /* Profile 14. */ + { 412, 415 }, /* Profile 15. */ + { 416, 419 }, /* Profile 16. */ + { 408, 411 }, /* Profile 17. */ + { 416, 419 }, /* Profile 18. */ + { 416, 419 }, /* Profile 19. */ + { 416, 419 }, /* Profile 20. */ + { 416, 419 }, /* Profile 21. */ + { 408, 411 }, /* Profile 22. */ + { 416, 419 }, /* Profile 23. */ + { 416, 419 }, /* Profile 24. */ + { 416, 419 }, /* Profile 25. */ + { 412, 415 }, /* Profile 26. */ + { 404, 407 }, /* Profile 27. */ + { 412, 415 }, /* Profile 28. */ + { 412, 415 }, /* Profile 29. */ + { 416, 419 }, /* Profile 30. */ + { 408, 411 }, /* Profile 31. */ + { 416, 419 }, /* Profile 32. */ + { 416, 419 }, /* Profile 33. */ + { 416, 419 }, /* Profile 34. */ + { 416, 419 }, /* Profile 35. */ + { 408, 411 }, /* Profile 36. */ + { 416, 419 }, /* Profile 37. */ + { 416, 419 }, /* Profile 38. */ + { 416, 419 }, /* Profile 39. */ + { 412, 415 }, /* Profile 40. */ + { 404, 407 }, /* Profile 41. */ + { 412, 415 }, /* Profile 42. */ + { 412, 415 }, /* Profile 43. */ + { 416, 419 }, /* Profile 44. */ + { 408, 411 }, /* Profile 45. */ + { 416, 419 }, /* Profile 46. */ + { 416, 419 }, /* Profile 47. */ + { 416, 419 }, /* Profile 48. */ + { 416, 419 }, /* Profile 49. */ + { 408, 411 }, /* Profile 50. */ + { 416, 419 }, /* Profile 51. */ + { 416, 419 }, /* Profile 52. */ + { 416, 419 }, /* Profile 53. */ + { 412, 415 }, /* Profile 54. */ + { 404, 407 }, /* Profile 55. */ + { 412, 415 }, /* Profile 56. */ + { 412, 415 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 208, 223 }, /* Profile 16. */ + { 192, 207 }, /* Profile 17. */ + { 208, 223 }, /* Profile 18. */ + { 192, 207 }, /* Profile 19. */ + { 192, 207 }, /* Profile 20. */ + { 208, 223 }, /* Profile 21. */ + { 192, 207 }, /* Profile 22. */ + { 208, 223 }, /* Profile 23. */ + { 192, 207 }, /* Profile 24. */ + { 192, 207 }, /* Profile 25. */ + { 208, 223 }, /* Profile 26. */ + { 192, 207 }, /* Profile 27. */ + { 208, 223 }, /* Profile 28. */ + { 192, 207 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { 224, 239 }, /* Profile 44. */ + { 208, 223 }, /* Profile 45. */ + { 224, 239 }, /* Profile 46. */ + { 208, 223 }, /* Profile 47. */ + { 208, 223 }, /* Profile 48. */ + { 224, 239 }, /* Profile 49. */ + { 208, 223 }, /* Profile 50. */ + { 224, 239 }, /* Profile 51. */ + { 208, 223 }, /* Profile 52. */ + { 208, 223 }, /* Profile 53. */ + { 224, 239 }, /* Profile 54. */ + { 208, 223 }, /* Profile 55. */ + { 224, 239 }, /* Profile 56. */ + { 208, 223 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "DNAT_CTRL_3_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 372, 375 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 372, 375 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 368, 371 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 372, 375 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { 372, 375 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { 368, 371 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { 372, 375 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { 372, 375 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { 368, 371 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { -1, -1 }, /* Profile 45. */ + { 372, 375 }, /* Profile 46. */ + { -1, -1 }, /* Profile 47. */ + { -1, -1 }, /* Profile 48. */ + { -1, -1 }, /* Profile 49. */ + { -1, -1 }, /* Profile 50. */ + { 372, 375 }, /* Profile 51. */ + { -1, -1 }, /* Profile 52. */ + { -1, -1 }, /* Profile 53. */ + { -1, -1 }, /* Profile 54. */ + { -1, -1 }, /* Profile 55. */ + { 368, 371 }, /* Profile 56. */ + }, + .profile_cnt = 57, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 48, 63 }, /* Profile 12. */ + { 48, 63 }, /* Profile 13. */ + { 48, 63 }, /* Profile 14. */ + { 48, 63 }, /* Profile 15. */ + { 48, 63 }, /* Profile 16. */ + { 48, 63 }, /* Profile 17. */ + { 48, 63 }, /* Profile 18. */ + { 48, 63 }, /* Profile 19. */ + { 48, 63 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { 48, 63 }, /* Profile 26. */ + { 48, 63 }, /* Profile 27. */ + { 48, 63 }, /* Profile 28. */ + { 48, 63 }, /* Profile 29. */ + { 48, 63 }, /* Profile 30. */ + { 48, 63 }, /* Profile 31. */ + { 48, 63 }, /* Profile 32. */ + { 48, 63 }, /* Profile 33. */ + { 48, 63 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { 48, 63 }, /* Profile 40. */ + { 48, 63 }, /* Profile 41. */ + { 48, 63 }, /* Profile 42. */ + { 48, 63 }, /* Profile 43. */ + { 48, 63 }, /* Profile 44. */ + { 48, 63 }, /* Profile 45. */ + { 48, 63 }, /* Profile 46. */ + { 48, 63 }, /* Profile 47. */ + { 48, 63 }, /* Profile 48. */ + { -1, -1 }, /* Profile 49. */ + { -1, -1 }, /* Profile 50. */ + { -1, -1 }, /* Profile 51. */ + { -1, -1 }, /* Profile 52. */ + { -1, -1 }, /* Profile 53. */ + { 48, 63 }, /* Profile 54. */ + { 48, 63 }, /* Profile 55. */ + { 48, 63 }, /* Profile 56. */ + { 48, 63 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "DVP_15_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 191 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + { 176, 191 }, /* Profile 6. */ + { 176, 191 }, /* Profile 7. */ + { 176, 191 }, /* Profile 8. */ + { 176, 191 }, /* Profile 9. */ + { 176, 191 }, /* Profile 10. */ + { 176, 191 }, /* Profile 11. */ + { 176, 191 }, /* Profile 12. */ + { 176, 191 }, /* Profile 13. */ + { 176, 191 }, /* Profile 14. */ + { 176, 191 }, /* Profile 15. */ + { 176, 191 }, /* Profile 16. */ + { 176, 191 }, /* Profile 17. */ + { 176, 191 }, /* Profile 18. */ + { 176, 191 }, /* Profile 19. */ + { 176, 191 }, /* Profile 20. */ + { 176, 191 }, /* Profile 21. */ + { 176, 191 }, /* Profile 22. */ + { 176, 191 }, /* Profile 23. */ + { 176, 191 }, /* Profile 24. */ + { 176, 191 }, /* Profile 25. */ + { 176, 191 }, /* Profile 26. */ + { 176, 191 }, /* Profile 27. */ + { 176, 191 }, /* Profile 28. */ + { 176, 191 }, /* Profile 29. */ + { 192, 207 }, /* Profile 30. */ + { 192, 207 }, /* Profile 31. */ + { 192, 207 }, /* Profile 32. */ + { 192, 207 }, /* Profile 33. */ + { 192, 207 }, /* Profile 34. */ + { 192, 207 }, /* Profile 35. */ + { 192, 207 }, /* Profile 36. */ + { 192, 207 }, /* Profile 37. */ + { 192, 207 }, /* Profile 38. */ + { 192, 207 }, /* Profile 39. */ + { 192, 207 }, /* Profile 40. */ + { 192, 207 }, /* Profile 41. */ + { 192, 207 }, /* Profile 42. */ + { 192, 207 }, /* Profile 43. */ + { 192, 207 }, /* Profile 44. */ + { 192, 207 }, /* Profile 45. */ + { 192, 207 }, /* Profile 46. */ + { 192, 207 }, /* Profile 47. */ + { 192, 207 }, /* Profile 48. */ + { 192, 207 }, /* Profile 49. */ + { 192, 207 }, /* Profile 50. */ + { 192, 207 }, /* Profile 51. */ + { 192, 207 }, /* Profile 52. */ + { 192, 207 }, /* Profile 53. */ + { 192, 207 }, /* Profile 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BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 380, 383 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + { 388, 391 }, /* Profile 6. */ + { 388, 391 }, /* Profile 7. */ + { 380, 383 }, /* Profile 8. */ + { 392, 395 }, /* Profile 9. */ + { 388, 391 }, /* Profile 10. */ + { 388, 391 }, /* Profile 11. */ + { 384, 387 }, /* Profile 12. */ + { 376, 379 }, /* Profile 13. */ + { 388, 391 }, /* Profile 14. */ + { 384, 387 }, /* Profile 15. */ + { 388, 391 }, /* Profile 16. */ + { 380, 383 }, /* Profile 17. */ + { 392, 395 }, /* Profile 18. */ + { 388, 391 }, /* Profile 19. */ + { 388, 391 }, /* Profile 20. */ + { 388, 391 }, /* Profile 21. */ + { 380, 383 }, /* Profile 22. */ + { 392, 395 }, /* Profile 23. */ + { 388, 391 }, /* Profile 24. */ + { 388, 391 }, /* Profile 25. */ + { 384, 387 }, /* Profile 26. */ + { 376, 379 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56. */ + { 384, 387 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { 128, 143 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ + { 128, 143 }, /* Profile 8. */ + { 128, 143 }, /* Profile 9. */ + { 128, 143 }, /* Profile 10. */ + { 128, 143 }, /* Profile 11. */ + { 128, 143 }, /* Profile 12. */ + { 128, 143 }, /* Profile 13. */ + { 128, 143 }, /* Profile 14. */ + { 128, 143 }, /* Profile 15. */ + { 128, 143 }, /* Profile 16. */ + { 128, 143 }, /* Profile 17. */ + { 128, 143 }, /* Profile 18. */ + { 128, 143 }, /* Profile 19. */ + { 128, 143 }, /* Profile 20. */ + { 128, 143 }, /* Profile 21. */ + { 128, 143 }, /* Profile 22. */ + { 128, 143 }, /* Profile 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128, 143 }, /* Profile 53. */ + { 128, 143 }, /* Profile 54. */ + { 128, 143 }, /* Profile 55. */ + { 128, 143 }, /* Profile 56. */ + { 128, 143 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + { 48, 63 }, /* Profile 8. */ + { 48, 63 }, /* Profile 9. */ + { 48, 63 }, /* Profile 10. */ + { 48, 63 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { 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}, /* Profile 51. */ + { 48, 63 }, /* Profile 52. */ + { 48, 63 }, /* Profile 53. */ + }, + .profile_cnt = 54, + }, + { + .name = "EP_NIH_HDR_RECIRC_CODE_3_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 371 }, /* Profile 2. */ + { 352, 355 }, /* Profile 3. */ + { 368, 371 }, /* Profile 4. */ + { 368, 371 }, /* Profile 5. */ + { 368, 371 }, /* Profile 6. */ + { 368, 371 }, /* Profile 7. */ + { 352, 355 }, /* Profile 8. */ + { 368, 371 }, /* Profile 9. */ + { 368, 371 }, /* Profile 10. */ + { 368, 371 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 368, 371 }, /* Profile 16. */ + { 352, 355 }, /* Profile 17. */ + { 368, 371 }, /* Profile 18. */ + { 368, 371 }, /* Profile 19. */ + { 368, 371 }, /* Profile 20. */ + { 368, 371 }, /* Profile 21. */ + { 352, 355 }, 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}, /* Profile 52. */ + { 368, 371 }, /* Profile 53. */ + }, + .profile_cnt = 54, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 288, 303 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 288, 303 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 288, 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"EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 304, 319 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 304, 319 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 304, 319 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 304, 319 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 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"IFP_IOAM_GBP_ACTION_3_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + { 404, 407 }, /* Profile 6. */ + { 408, 411 }, /* Profile 7. */ + { 400, 403 }, /* Profile 8. */ + { 408, 411 }, /* Profile 9. */ + { 404, 407 }, /* Profile 10. */ + { 404, 407 }, /* Profile 11. */ + { 404, 407 }, /* Profile 12. */ + { 396, 399 }, /* Profile 13. */ + { 404, 407 }, /* Profile 14. */ + { 400, 403 }, /* Profile 15. */ + { 408, 411 }, /* Profile 16. */ + { 400, 403 }, /* Profile 17. */ + { 408, 411 }, /* Profile 18. */ + { 404, 407 }, /* Profile 19. */ + { 404, 407 }, /* Profile 20. */ + { 408, 411 }, /* Profile 21. */ + { 400, 403 }, /* Profile 22. */ + { 408, 411 }, /* Profile 23. */ + { 404, 407 }, /* Profile 24. */ + { 404, 407 }, /* Profile 25. */ + { 404, 407 }, /* Profile 26. */ + { 396, 399 }, /* Profile 27. */ + { 404, 407 }, /* Profile 28. */ + { 400, 403 }, /* Profile 29. */ + { 408, 411 }, /* Profile 30. */ + { 400, 403 }, /* Profile 31. */ + { 408, 411 }, /* Profile 32. */ + { 404, 407 }, /* Profile 33. */ + { 404, 407 }, /* Profile 34. */ + { 408, 411 }, /* Profile 35. */ + { 400, 403 }, /* Profile 36. */ + { 408, 411 }, /* Profile 37. */ + { 404, 407 }, /* Profile 38. */ + { 404, 407 }, /* Profile 39. */ + { 404, 407 }, /* Profile 40. */ + { 396, 399 }, /* Profile 41. */ + { 404, 407 }, /* Profile 42. */ + { 400, 403 }, /* Profile 43. */ + { 408, 411 }, /* Profile 44. */ + { 400, 403 }, /* Profile 45. */ + { 408, 411 }, /* Profile 46. */ + { 404, 407 }, /* Profile 47. */ + { 404, 407 }, /* Profile 48. */ + { 408, 411 }, /* Profile 49. */ + { 400, 403 }, /* Profile 50. */ + { 408, 411 }, /* Profile 51. */ + { 404, 407 }, /* Profile 52. */ + { 404, 407 }, /* Profile 53. */ + { 404, 407 }, /* Profile 54. */ + { 396, 399 }, /* Profile 55. */ + { 404, 407 }, /* Profile 56. */ + { 400, 403 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 372, 375 }, /* Profile 2. */ + { 356, 359 }, /* Profile 3. */ + { 376, 379 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + { 372, 375 }, /* Profile 6. */ + { 372, 375 }, /* Profile 7. */ + { 356, 359 }, /* Profile 8. */ + { 376, 379 }, /* Profile 9. */ + { 372, 375 }, /* Profile 10. */ + { 372, 375 }, /* Profile 11. */ + { 368, 371 }, /* Profile 12. */ + { 352, 355 }, /* Profile 13. */ + { 372, 375 }, /* Profile 14. */ + { 368, 371 }, /* Profile 15. */ + { 372, 375 }, /* Profile 16. */ + { 356, 359 }, /* Profile 17. */ + { 376, 379 }, /* Profile 18. */ + { 372, 375 }, /* Profile 19. */ + { 372, 375 }, /* Profile 20. */ + { 372, 375 }, /* Profile 21. */ + { 356, 359 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"L2_OIF_11_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L2_OIF_11_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* 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}, + .profile_cnt = 58, + }, + { + .name = "L3_DNAT_INDEX_15_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 192, 207 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 192, 207 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 192, 207 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 192, 207 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 192, 207 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 192, 207 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { 192, 207 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { 192, 207 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { 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Profile 56. */ + }, + .profile_cnt = 57, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 365 }, /* Profile 2. */ + { 320, 333 }, /* Profile 3. */ + { 352, 365 }, /* Profile 4. */ + { 352, 365 }, /* Profile 5. */ + { 352, 365 }, /* Profile 6. */ + { 352, 365 }, /* Profile 7. */ + { 320, 333 }, /* Profile 8. */ + { 352, 365 }, /* Profile 9. */ + { 352, 365 }, /* Profile 10. */ + { 352, 365 }, /* Profile 11. */ + { 352, 365 }, /* Profile 12. */ + { 320, 333 }, /* Profile 13. */ + { 352, 365 }, /* Profile 14. */ + { 352, 365 }, /* Profile 15. */ + { 352, 365 }, /* Profile 16. */ + { 320, 333 }, /* Profile 17. */ + { 352, 365 }, /* Profile 18. */ + { 352, 365 }, /* Profile 19. */ + { 352, 365 }, /* Profile 20. */ + { 352, 365 }, /* Profile 21. */ + { 320, 333 }, /* Profile 22. */ + { 352, 365 }, /* Profile 23. */ + { 352, 365 }, /* Profile 24. */ + { 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Profile 54. */ + { 320, 333 }, /* Profile 55. */ + { 352, 365 }, /* Profile 56. */ + { 352, 365 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 173 }, /* Profile 2. */ + { 160, 173 }, /* Profile 3. */ + { 160, 173 }, /* Profile 4. */ + { 160, 173 }, /* Profile 5. */ + { 160, 173 }, /* Profile 6. */ + { 160, 173 }, /* Profile 7. */ + { 160, 173 }, /* Profile 8. */ + { 160, 173 }, /* Profile 9. */ + { 160, 173 }, /* Profile 10. */ + { 160, 173 }, /* Profile 11. */ + { 160, 173 }, /* Profile 12. */ + { 160, 173 }, /* Profile 13. */ + { 160, 173 }, /* Profile 14. */ + { 160, 173 }, /* Profile 15. */ + { 160, 173 }, /* Profile 16. */ + { 160, 173 }, /* Profile 17. */ + { 160, 173 }, /* Profile 18. */ + { 160, 173 }, /* Profile 19. */ + { 160, 173 }, /* Profile 20. */ + { 160, 173 }, /* Profile 21. */ + { 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*/ + { 80, 95 }, /* Profile 32. */ + { 80, 95 }, /* Profile 33. */ + { 80, 95 }, /* Profile 34. */ + { 80, 95 }, /* Profile 35. */ + { 80, 95 }, /* Profile 36. */ + { 80, 95 }, /* Profile 37. */ + { 80, 95 }, /* Profile 38. */ + { 80, 95 }, /* Profile 39. */ + { 80, 95 }, /* Profile 40. */ + { 80, 95 }, /* Profile 41. */ + { 80, 95 }, /* Profile 42. */ + { 80, 95 }, /* Profile 43. */ + { 80, 95 }, /* Profile 44. */ + { 80, 95 }, /* Profile 45. */ + { 80, 95 }, /* Profile 46. */ + { 80, 95 }, /* Profile 47. */ + { 80, 95 }, /* Profile 48. */ + { 80, 95 }, /* Profile 49. */ + { 80, 95 }, /* Profile 50. */ + { 80, 95 }, /* Profile 51. */ + { 80, 95 }, /* Profile 52. */ + { 80, 95 }, /* Profile 53. */ + { 80, 95 }, /* Profile 54. */ + { 80, 95 }, /* Profile 55. */ + { 80, 95 }, /* Profile 56. */ + { 80, 95 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + { 392, 395 }, /* Profile 6. */ + { 396, 399 }, /* Profile 7. */ + { 388, 391 }, /* Profile 8. */ + { 396, 399 }, /* Profile 9. */ + { 392, 395 }, /* Profile 10. */ + { 392, 395 }, /* Profile 11. */ + { 392, 395 }, /* Profile 12. */ + { 384, 387 }, /* Profile 13. */ + { 392, 395 }, /* Profile 14. */ + { 388, 391 }, /* Profile 15. */ + { 396, 399 }, /* Profile 16. */ + { 388, 391 }, /* Profile 17. */ + { 396, 399 }, /* Profile 18. */ + { 392, 395 }, /* Profile 19. */ + { 392, 395 }, /* Profile 20. */ + { 396, 399 }, /* Profile 21. */ + { 388, 391 }, /* Profile 22. */ + { 396, 399 }, /* Profile 23. */ + { 392, 395 }, /* Profile 24. */ + { 392, 395 }, /* Profile 25. */ + { 392, 395 }, /* Profile 26. */ + { 384, 387 }, /* Profile 27. */ + { 392, 395 }, /* Profile 28. */ + { 388, 391 }, /* Profile 29. */ + { 396, 399 }, /* Profile 30. */ + { 388, 391 }, /* Profile 31. */ + { 396, 399 }, /* Profile 32. */ + { 392, 395 }, /* Profile 33. */ + { 392, 395 }, /* Profile 34. */ + { 396, 399 }, /* Profile 35. */ + { 388, 391 }, /* Profile 36. */ + { 396, 399 }, /* Profile 37. */ + { 392, 395 }, /* Profile 38. */ + { 392, 395 }, /* Profile 39. */ + { 392, 395 }, /* Profile 40. */ + { 384, 387 }, /* Profile 41. */ + { 392, 395 }, /* Profile 42. */ + { 388, 391 }, /* Profile 43. */ + { 396, 399 }, /* Profile 44. */ + { 388, 391 }, /* Profile 45. */ + { 396, 399 }, /* Profile 46. */ + { 392, 395 }, /* Profile 47. */ + { 392, 395 }, /* Profile 48. */ + { 396, 399 }, /* Profile 49. */ + { 388, 391 }, /* Profile 50. */ + { 396, 399 }, /* Profile 51. */ + { 392, 395 }, /* Profile 52. */ + { 392, 395 }, /* Profile 53. */ + { 392, 395 }, /* Profile 54. */ + { 384, 387 }, /* Profile 55. */ + { 392, 395 }, /* Profile 56. */ + { 388, 391 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 96, 111 }, /* Profile 7. */ + { 96, 111 }, /* Profile 8. */ + { 96, 111 }, /* Profile 9. */ + { 96, 111 }, /* Profile 10. */ + { 96, 111 }, /* Profile 11. */ + { 96, 111 }, /* Profile 12. */ + { 96, 111 }, /* Profile 13. */ + { 96, 111 }, /* Profile 14. */ + { 96, 111 }, /* Profile 15. */ + { 96, 111 }, /* Profile 16. */ + { 96, 111 }, /* Profile 17. */ + { 96, 111 }, /* Profile 18. */ + { 96, 111 }, /* Profile 19. */ + { 96, 111 }, /* Profile 20. */ + { 96, 111 }, /* Profile 21. */ + { 96, 111 }, /* Profile 22. */ + { 96, 111 }, /* Profile 23. */ + { 96, 111 }, /* Profile 24. */ + { 96, 111 }, /* Profile 25. */ + { 96, 111 }, /* Profile 26. */ + { 96, 111 }, /* Profile 27. */ + { 96, 111 }, /* Profile 28. */ + { 96, 111 }, /* Profile 29. */ + { 96, 111 }, /* Profile 30. */ + { 96, 111 }, /* Profile 31. */ + { 96, 111 }, /* Profile 32. */ + { 96, 111 }, /* Profile 33. */ + { 96, 111 }, /* Profile 34. */ + { 96, 111 }, /* Profile 35. */ + { 96, 111 }, /* Profile 36. */ + { 96, 111 }, /* Profile 37. */ + { 96, 111 }, /* Profile 38. */ + { 96, 111 }, /* Profile 39. */ + { 96, 111 }, /* Profile 40. */ + { 96, 111 }, /* Profile 41. */ + { 96, 111 }, /* Profile 42. */ + { 96, 111 }, /* Profile 43. */ + { 96, 111 }, /* Profile 44. */ + { 96, 111 }, /* Profile 45. */ + { 96, 111 }, /* Profile 46. */ + { 96, 111 }, /* Profile 47. */ + { 96, 111 }, /* Profile 48. */ + { 96, 111 }, /* Profile 49. */ + { 96, 111 }, /* Profile 50. */ + { 96, 111 }, /* Profile 51. */ + { 96, 111 }, /* Profile 52. */ + { 96, 111 }, /* Profile 53. */ + { 96, 111 }, /* Profile 54. */ + { 96, 111 }, /* Profile 55. */ + { 96, 111 }, /* Profile 56. */ + { 96, 111 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + { 412, 415 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 412, 415 }, /* Profile 10. */ + { 412, 415 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { 408, 411 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 412, 415 }, /* Profile 19. */ + { 412, 415 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 412, 415 }, /* Profile 24. */ + { 412, 415 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { 408, 411 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { 412, 415 }, /* Profile 33. */ + { 412, 415 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { 412, 415 }, /* Profile 38. */ + { 412, 415 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { 408, 411 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { -1, -1 }, /* Profile 45. */ + { -1, -1 }, /* Profile 46. */ + { 412, 415 }, /* Profile 47. */ + { 412, 415 }, /* Profile 48. */ + { -1, -1 }, /* Profile 49. */ + { -1, -1 }, /* Profile 50. */ + { -1, -1 }, /* Profile 51. */ + { 412, 415 }, /* Profile 52. */ + { 412, 415 }, /* Profile 53. */ + { -1, -1 }, /* Profile 54. */ + { -1, -1 }, /* Profile 55. */ + { -1, -1 }, /* Profile 56. */ + { 408, 411 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + { 408, 411 }, /* Profile 6. */ + { 412, 415 }, /* Profile 7. */ + { 404, 407 }, /* Profile 8. */ + { 412, 415 }, /* Profile 9. */ + { 408, 411 }, /* Profile 10. */ + { 408, 411 }, /* Profile 11. */ + { 408, 411 }, /* Profile 12. */ + { 400, 403 }, /* Profile 13. */ + { 408, 411 }, /* Profile 14. */ + { 404, 407 }, /* Profile 15. */ + { 412, 415 }, /* Profile 16. */ + { 404, 407 }, /* Profile 17. */ + { 412, 415 }, /* Profile 18. */ + { 408, 411 }, /* Profile 19. */ + { 408, 411 }, /* Profile 20. */ + { 412, 415 }, /* Profile 21. */ + { 404, 407 }, /* Profile 22. */ + { 412, 415 }, /* Profile 23. */ + { 408, 411 }, /* Profile 24. */ + { 408, 411 }, /* Profile 25. */ + { 408, 411 }, /* Profile 26. */ + { 400, 403 }, /* Profile 27. */ + { 408, 411 }, /* Profile 28. */ + { 404, 407 }, /* Profile 29. */ + { 412, 415 }, /* Profile 30. */ + { 404, 407 }, /* Profile 31. */ + { 412, 415 }, /* Profile 32. */ + { 408, 411 }, /* Profile 33. */ + { 408, 411 }, /* Profile 34. */ + { 412, 415 }, /* Profile 35. */ + { 404, 407 }, /* Profile 36. */ + { 412, 415 }, /* Profile 37. */ + { 408, 411 }, /* Profile 38. */ + { 408, 411 }, /* Profile 39. */ + { 408, 411 }, /* Profile 40. */ + { 400, 403 }, /* Profile 41. */ + { 408, 411 }, /* Profile 42. */ + { 404, 407 }, /* Profile 43. */ + { 412, 415 }, /* Profile 44. */ + { 404, 407 }, /* Profile 45. */ + { 412, 415 }, /* Profile 46. */ + { 408, 411 }, /* Profile 47. */ + { 408, 411 }, /* Profile 48. */ + { 412, 415 }, /* Profile 49. */ + { 404, 407 }, /* Profile 50. */ + { 412, 415 }, /* Profile 51. */ + { 408, 411 }, /* Profile 52. */ + { 408, 411 }, /* Profile 53. */ + { 408, 411 }, /* Profile 54. */ + { 400, 403 }, /* Profile 55. */ + { 408, 411 }, /* Profile 56. */ + { 404, 407 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "VFI_15_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + { 112, 127 }, /* Profile 6. */ + { 112, 127 }, /* Profile 7. */ + { 112, 127 }, /* Profile 8. */ + { 112, 127 }, /* Profile 9. */ + { 112, 127 }, /* Profile 10. */ + { 112, 127 }, /* Profile 11. */ + { 112, 127 }, /* Profile 12. */ + { 112, 127 }, /* Profile 13. */ + { 112, 127 }, /* Profile 14. */ + { 112, 127 }, /* Profile 15. */ + { 112, 127 }, /* Profile 16. */ + { 112, 127 }, /* Profile 17. */ + { 112, 127 }, /* Profile 18. */ + { 112, 127 }, /* Profile 19. */ + { 112, 127 }, /* Profile 20. */ + { 112, 127 }, /* Profile 21. */ + { 112, 127 }, /* Profile 22. */ + { 112, 127 }, /* Profile 23. */ + { 112, 127 }, /* Profile 24. */ + { 112, 127 }, /* Profile 25. */ + { 112, 127 }, /* Profile 26. */ + { 112, 127 }, /* Profile 27. */ + { 112, 127 }, /* Profile 28. */ + { 112, 127 }, /* Profile 29. */ + { 112, 127 }, /* Profile 30. */ + { 112, 127 }, /* Profile 31. */ + { 112, 127 }, /* Profile 32. */ + { 112, 127 }, /* Profile 33. */ + { 112, 127 }, /* Profile 34. */ + { 112, 127 }, /* Profile 35. */ + { 112, 127 }, /* Profile 36. */ + { 112, 127 }, /* Profile 37. */ + { 112, 127 }, /* Profile 38. */ + { 112, 127 }, /* Profile 39. */ + { 112, 127 }, /* Profile 40. */ + { 112, 127 }, /* Profile 41. */ + { 112, 127 }, /* Profile 42. */ + { 112, 127 }, /* Profile 43. */ + { 112, 127 }, /* Profile 44. */ + { 112, 127 }, /* Profile 45. */ + { 112, 127 }, /* Profile 46. */ + { 112, 127 }, /* Profile 47. */ + { 112, 127 }, /* Profile 48. */ + { 112, 127 }, /* Profile 49. */ + { 112, 127 }, /* Profile 50. */ + { 112, 127 }, /* Profile 51. */ + { 112, 127 }, /* Profile 52. */ + { 112, 127 }, /* Profile 53. */ + { 112, 127 }, /* Profile 54. */ + { 112, 127 }, /* Profile 55. */ + { 112, 127 }, /* Profile 56. */ + { 112, 127 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", + .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 380, 383 }, /* Profile 2. */ + { 364, 367 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 380, 383 }, /* Profile 5. */ + { 380, 383 }, /* Profile 6. */ + { 380, 383 }, /* Profile 7. */ + { 364, 367 }, /* Profile 8. */ + { 384, 387 }, /* Profile 9. */ + { 380, 383 }, /* Profile 10. */ + { 380, 383 }, /* Profile 11. */ + { 376, 379 }, /* Profile 12. */ + { 360, 363 }, /* Profile 13. */ + { 380, 383 }, /* Profile 14. */ + { 376, 379 }, /* Profile 15. */ + { 380, 383 }, /* Profile 16. */ + { 364, 367 }, /* Profile 17. */ + { 384, 387 }, /* Profile 18. */ + { 380, 383 }, /* Profile 19. */ + { 380, 383 }, /* Profile 20. */ + { 380, 383 }, /* Profile 21. */ + { 364, 367 }, /* Profile 22. */ + { 384, 387 }, /* Profile 23. */ + { 380, 383 }, /* Profile 24. */ + { 380, 383 }, /* Profile 25. */ + { 376, 379 }, /* Profile 26. */ + { 360, 363 }, /* Profile 27. */ + { 380, 383 }, /* Profile 28. */ + { 376, 379 }, /* Profile 29. */ + { 380, 383 }, /* Profile 30. */ + { 364, 367 }, /* Profile 31. */ + { 384, 387 }, /* Profile 32. */ + { 380, 383 }, /* Profile 33. */ + { 380, 383 }, /* Profile 34. */ + { 380, 383 }, /* Profile 35. */ + { 364, 367 }, /* Profile 36. */ + { 384, 387 }, /* Profile 37. */ + { 380, 383 }, /* Profile 38. */ + { 380, 383 }, /* Profile 39. */ + { 376, 379 }, /* Profile 40. */ + { 360, 363 }, /* Profile 41. */ + { 380, 383 }, /* Profile 42. */ + { 376, 379 }, /* Profile 43. */ + { 380, 383 }, /* Profile 44. */ + { 364, 367 }, /* Profile 45. */ + { 384, 387 }, /* Profile 46. */ + { 380, 383 }, /* Profile 47. */ + { 380, 383 }, /* Profile 48. */ + { 380, 383 }, /* Profile 49. */ + { 364, 367 }, /* Profile 50. */ + { 384, 387 }, /* Profile 51. */ + { 380, 383 }, /* Profile 52. */ + { 380, 383 }, /* Profile 53. */ + { 376, 379 }, /* Profile 54. */ + { 360, 363 }, /* Profile 55. */ + { 380, 383 }, /* Profile 56. */ + { 376, 379 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, +};static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_names[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reasons_info = { + .num_reasons = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_names, + .reason_encode = bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_encode, + .reason_decode = bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_arp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_arp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_arp_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_arp_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_authen_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_authen_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_authen_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_authen_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_bfd_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_bfd_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_bfd_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_bfd_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_cntag_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_cntag_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_cntag_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_cntag_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dcn_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dcn_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dcn_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_dcn_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_dcn_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dcn_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dcn_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_dcn_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_dcn_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dcn_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dcn_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dcn_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dcn_t_reserved4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_dcn_t_reserved4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_dcn_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FID_COUNT] = { + bcmpkt_dcn_t_flags_get, + bcmpkt_dcn_t_next_protocol_get, + bcmpkt_dcn_t_reserved0_get, + bcmpkt_dcn_t_reserved1_get, + bcmpkt_dcn_t_reserved2_get, + bcmpkt_dcn_t_reserved3_get, + bcmpkt_dcn_t_reserved4_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_dcn_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FID_COUNT] = { + bcmpkt_dcn_t_flags_set, + bcmpkt_dcn_t_next_protocol_set, + bcmpkt_dcn_t_reserved0_set, + bcmpkt_dcn_t_reserved1_set, + bcmpkt_dcn_t_reserved2_set, + bcmpkt_dcn_t_reserved3_set, + bcmpkt_dcn_t_reserved4_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_dcn_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_dcn_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_dcn_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_dest_option_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_dest_option_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_dest_option_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_dest_option_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_esp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_esp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_esp_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_esp_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_esp_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ethertype_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ethertype_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ethertype_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ethertype_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_frag_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_frag_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_frag_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_frag_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_frag_t_field_data, +}; + + +static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { + bcmpkt_gbp_ethernet_shim_t_ethertype_get, + bcmpkt_gbp_ethernet_shim_t_flags_get, + bcmpkt_gbp_ethernet_shim_t_reserved_get, + bcmpkt_gbp_ethernet_shim_t_sid_get, + bcmpkt_gbp_ethernet_shim_t_subtype_get, + bcmpkt_gbp_ethernet_shim_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { + bcmpkt_gbp_ethernet_shim_t_ethertype_set, + bcmpkt_gbp_ethernet_shim_t_flags_set, + bcmpkt_gbp_ethernet_shim_t_reserved_set, + bcmpkt_gbp_ethernet_shim_t_sid_set, + bcmpkt_gbp_ethernet_shim_t_subtype_set, + bcmpkt_gbp_ethernet_shim_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_src_subport_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_src_subport_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_src_subport_num_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_src_subport_num_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gpe_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gpe_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gpe_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gpe_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gre_key_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gre_key_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gre_key_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gre_key_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gre_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gre_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gre_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gre_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_gre_t_field_data, +}; + + +static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 4, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 4, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 6, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 6, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 31, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 10); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 10, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 15, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 15, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 4); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 2, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_get, + bcmpkt_hg3_base_t_cng_get, + bcmpkt_hg3_base_t_entropy_get, + bcmpkt_hg3_base_t_ext_hdr_present_get, + bcmpkt_hg3_base_t_hg3_reserved_get, + bcmpkt_hg3_base_t_l3_routed_get, + bcmpkt_hg3_base_t_mirror_copy_get, + bcmpkt_hg3_base_t_reserved_etype_get, + bcmpkt_hg3_base_t_system_destination_get, + bcmpkt_hg3_base_t_system_destination_type_get, + bcmpkt_hg3_base_t_system_source_get, + bcmpkt_hg3_base_t_tc_get, + bcmpkt_hg3_base_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_set, + bcmpkt_hg3_base_t_cng_set, + bcmpkt_hg3_base_t_entropy_set, + bcmpkt_hg3_base_t_ext_hdr_present_set, + bcmpkt_hg3_base_t_hg3_reserved_set, + bcmpkt_hg3_base_t_l3_routed_set, + bcmpkt_hg3_base_t_mirror_copy_set, + bcmpkt_hg3_base_t_reserved_etype_set, + bcmpkt_hg3_base_t_system_destination_set, + bcmpkt_hg3_base_t_system_destination_type_set, + bcmpkt_hg3_base_t_system_source_set, + bcmpkt_hg3_base_t_tc_set, + bcmpkt_hg3_base_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_field_data, +}; + + +static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_lsb_get, + bcmpkt_hg3_extension_0_t_class_id_msb_get, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, + bcmpkt_hg3_extension_0_t_flags_get, + bcmpkt_hg3_extension_0_t_forwarding_domain_get, + bcmpkt_hg3_extension_0_t_svp_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_lsb_set, + bcmpkt_hg3_extension_0_t_class_id_msb_set, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, + bcmpkt_hg3_extension_0_t_flags_set, + bcmpkt_hg3_extension_0_t_forwarding_domain_set, + bcmpkt_hg3_extension_0_t_svp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_icmp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_icmp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_icmp_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_icmp_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 26, 2); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 26, 2, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 24); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 24, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 6); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 6, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 20, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { + bcmpkt_ifa_metadata_a_t_cn_get, + bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_metadata_a_t_lns_device_id_get, + bcmpkt_ifa_metadata_a_t_port_speed_get, + bcmpkt_ifa_metadata_a_t_queue_id_get, + bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { + bcmpkt_ifa_metadata_a_t_cn_set, + bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_metadata_a_t_lns_device_id_set, + bcmpkt_ifa_metadata_a_t_port_speed_set, + bcmpkt_ifa_metadata_a_t_queue_id_set, + bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { + bcmpkt_ifa_metadata_b_t_egress_port_id_get, + bcmpkt_ifa_metadata_b_t_ingress_port_id_get, + bcmpkt_ifa_metadata_b_t_mmu_stat_0_get, + bcmpkt_ifa_metadata_b_t_mmu_stat_1_get, + bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get, + bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get, + bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { + bcmpkt_ifa_metadata_b_t_egress_port_id_set, + bcmpkt_ifa_metadata_b_t_ingress_port_id_set, + bcmpkt_ifa_metadata_b_t_mmu_stat_0_set, + bcmpkt_ifa_metadata_b_t_mmu_stat_1_set, + bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set, + bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set, + bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { + bcmpkt_ifa_metadata_base_t_action_vector_get, + bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_base_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { + bcmpkt_ifa_metadata_base_t_action_vector_set, + bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_base_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_igmp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_igmp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_igmp_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_igmp_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_namespace_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_namespace_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FID_COUNT] = { + bcmpkt_ioam_e2e_t_ioam_e2e_data_get, + bcmpkt_ioam_e2e_t_ioam_e2e_type_get, + bcmpkt_ioam_e2e_t_ioam_hdr_len_get, + bcmpkt_ioam_e2e_t_namespace_id_get, + bcmpkt_ioam_e2e_t_next_protocol_get, + bcmpkt_ioam_e2e_t_reserved_get, + bcmpkt_ioam_e2e_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FID_COUNT] = { + bcmpkt_ioam_e2e_t_ioam_e2e_data_set, + bcmpkt_ioam_e2e_t_ioam_e2e_type_set, + bcmpkt_ioam_e2e_t_ioam_hdr_len_set, + bcmpkt_ioam_e2e_t_namespace_id_set, + bcmpkt_ioam_e2e_t_next_protocol_set, + bcmpkt_ioam_e2e_t_reserved_set, + bcmpkt_ioam_e2e_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ipfix_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ipfix_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ipfix_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ipfix_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ipv4_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ipv4_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ipv4_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ipv4_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ipv6_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ipv6_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ipv6_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ipv6_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_l2_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_l2_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_l2_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_l2_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mpls_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mpls_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mpls_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mpls_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_p_1588_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_p_1588_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_p_1588_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_p_1588_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_psamp_postcard_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_psamp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_psamp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT] = { + bcmpkt_psamp_postcard_0_t_egress_mod_port_get, + bcmpkt_psamp_postcard_0_t_ingress_port_get, + bcmpkt_psamp_postcard_0_t_obs_time_ns_get, + bcmpkt_psamp_postcard_0_t_obs_time_s_get, + bcmpkt_psamp_postcard_0_t_psamp_length_get, + bcmpkt_psamp_postcard_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT] = { + bcmpkt_psamp_postcard_0_t_egress_mod_port_set, + bcmpkt_psamp_postcard_0_t_ingress_port_set, + bcmpkt_psamp_postcard_0_t_obs_time_ns_set, + bcmpkt_psamp_postcard_0_t_obs_time_s_set, + bcmpkt_psamp_postcard_0_t_psamp_length_set, + bcmpkt_psamp_postcard_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_drop_reason_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_drop_reason_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_residence_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_residence_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT] = { + bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_get, + bcmpkt_psamp_postcard_1_t_drop_reason_code_get, + bcmpkt_psamp_postcard_1_t_mmu_stat_0_get, + bcmpkt_psamp_postcard_1_t_mmu_stat_1_get, + bcmpkt_psamp_postcard_1_t_queue_id_get, + bcmpkt_psamp_postcard_1_t_reserved_1_get, + bcmpkt_psamp_postcard_1_t_residence_time_get, + bcmpkt_psamp_postcard_1_t_sampled_length_get, + bcmpkt_psamp_postcard_1_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT] = { + bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_set, + bcmpkt_psamp_postcard_1_t_drop_reason_code_set, + bcmpkt_psamp_postcard_1_t_mmu_stat_0_set, + bcmpkt_psamp_postcard_1_t_mmu_stat_1_set, + bcmpkt_psamp_postcard_1_t_queue_id_set, + bcmpkt_psamp_postcard_1_t_reserved_1_set, + bcmpkt_psamp_postcard_1_t_residence_time_set, + bcmpkt_psamp_postcard_1_t_sampled_length_set, + bcmpkt_psamp_postcard_1_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_rarp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_rarp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rarp_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_rarp_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_routing_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_routing_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_routing_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_routing_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_rspan_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_rspan_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rspan_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_rspan_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_rspan_t_field_data, +}; + + +static int32_t bcmpkt_segment_routing_srh_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_last_entry_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_last_entry_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { + bcmpkt_segment_routing_srh_t_flags_get, + bcmpkt_segment_routing_srh_t_hdr_ext_len_get, + bcmpkt_segment_routing_srh_t_last_entry_get, + bcmpkt_segment_routing_srh_t_next_header_get, + bcmpkt_segment_routing_srh_t_routing_type_get, + bcmpkt_segment_routing_srh_t_segments_left_get, + bcmpkt_segment_routing_srh_t_tag_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { + bcmpkt_segment_routing_srh_t_flags_set, + bcmpkt_segment_routing_srh_t_hdr_ext_len_set, + bcmpkt_segment_routing_srh_t_last_entry_set, + bcmpkt_segment_routing_srh_t_next_header_set, + bcmpkt_segment_routing_srh_t_routing_type_set, + bcmpkt_segment_routing_srh_t_segments_left_set, + bcmpkt_segment_routing_srh_t_tag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_field_data, +}; + + +static int32_t bcmpkt_segment_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_last_entry_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_last_entry_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_seg_list_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_seg_list_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { + bcmpkt_segment_routing_t_hdr_ext_len_get, + bcmpkt_segment_routing_t_last_entry_flags_get, + bcmpkt_segment_routing_t_next_header_get, + bcmpkt_segment_routing_t_routing_type_get, + bcmpkt_segment_routing_t_seg_list_get, + bcmpkt_segment_routing_t_segments_left_get, + bcmpkt_segment_routing_t_tag_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { + bcmpkt_segment_routing_t_hdr_ext_len_set, + bcmpkt_segment_routing_t_last_entry_flags_set, + bcmpkt_segment_routing_t_next_header_set, + bcmpkt_segment_routing_t_routing_type_set, + bcmpkt_segment_routing_t_seg_list_set, + bcmpkt_segment_routing_t_segments_left_set, + bcmpkt_segment_routing_t_tag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_std_segment_id_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_std_segment_id_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { + bcmpkt_std_segment_id_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { + bcmpkt_std_segment_id_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_udp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_udp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_udp_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_udp_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, + bcmpkt_unknown_l5_t_l5_bytes_8_9_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, + bcmpkt_unknown_l5_t_l5_bytes_8_9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_vlan_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_vlan_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_vlan_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_vlan_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_vxlan_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_vxlan_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_vxlan_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_vxlan_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_wesp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_wesp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_wesp_t_field_data[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_wesp_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_30_3_1_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm78800_a0_dna_6_5_30_3_1_flexhdr_info_list[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_arp_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_authen_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_bfd_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_cntag_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_dcn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_dcn_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_dcn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_dest_option_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_esp_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ethertype_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_frag_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gpe_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gre_key_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gre_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_icmp_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_igmp_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ipfix_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ipv4_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ipv6_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_l2_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mpls_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_p_1588_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_rarp_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_routing_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_rspan_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_udp_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_vlan_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_vxlan_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_dna_6_5_30_3_1_wesp_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_30_3_1_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_info, + .reasons_info = &bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reasons_info, + .flex_common_fget = bcm78800_a0_rxpmd_flex_fget, + .flex_common_fset = bcm78800_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm78800_a0_dna_6_5_30_3_1_flexhdr_id_map[] = { + BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm78800_a0_dna_6_5_30_3_1_flexhdr_map_get(void) +{ + return bcm78800_a0_dna_6_5_30_3_1_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm78800_a0_dna_6_5_30_3_1_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm78800_a0_dna_6_5_30_3_1_flexhdr_info_list[hid]; +} + +int bcm78800_a0_dna_6_5_30_3_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 15, + 22, + 23, + 69, +}; diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild new file mode 100644 index 000000000000..684e67081621 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild @@ -0,0 +1,40 @@ +# -*- Kbuild -*- +# +# Linux Generic Netlink module. +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# +# Enable Kernel PMD +KNETCB_CPPFLAGS += -DKPMD + +obj-m := linux_bcmgenl.o + +ccflags-y := $(KNETCB_CPPFLAGS) $(LKM_CFLAGS) \ + $(SDK_PMD_KFLAGS) \ + -I$(SDK)/shr/include \ + -I$(SDK)/bcmdrd/include \ + -I$(SDK)/bcmltd/include \ + -I$(SDK)/bcmlrd/include \ + -I$(SDK)/linux/include \ + -I$(SDK)/linux/include/kernel \ + -I$(SDK)/linux/knet/include \ + -I$(SDK)/linux/knet \ + -I$(SDK)/linux/bcmgenl + +linux_bcmgenl-y := $(SDK_PMD_KOBJS) \ + bcmgenl_packet.o \ + bcmgenl_psample.o \ + bcmgenl.o diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile new file mode 100644 index 000000000000..f5f4740fc390 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile @@ -0,0 +1,54 @@ +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# +# Linux KNET BCMGENL module. +# + +# Include PMD library by default +ifneq (0,$(KPMD)) + +# Kernel module source directory +KMODDIR = $(CURDIR) + +# Avoid creating links in original kernel module source directory +GENDIR = $(KMODDIR)/generated +ifneq ($(OUTPUT_DIR),) +GENDIR = $(OUTPUT_DIR)/knet/generated/bcmgenl +endif +bcmgenl: kpmd + $(MAKE) -C $(GENDIR) all + +# SDK make helper for stand-alone PMD kernel module +include $(SDK)/make/kpmd.mk + +distclean:: + rm -rf $(GENDIR) + +endif # KPMD + +include Kbuild + +ifeq ($(KERNELRELEASE),) + +MOD_NAME = linux_bcmgenl + +include $(SDK)/make/lkm.mk + +endif + +.PHONY: bcmgenl distclean + +distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c new file mode 100644 index 000000000000..3f0dca9ef716 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c @@ -0,0 +1,808 @@ +/*! \file bcmgenl.c + * + * BCMGENL module entry. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include +#include +#include +#include + +#ifdef KPMD +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#endif /* KPMD */ + +#include + +/*! \cond */ +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("BCMGENL Module"); +MODULE_LICENSE("GPL"); +/*! \endcond */ + +/*! driver proc entry root */ +static struct proc_dir_entry *bcmgenl_proc_root = NULL; + +#ifdef GENL_DEBUG +/*! \cond */ +static int debug = 0; +MODULE_PARAM(debug, int, 0); +MODULE_PARM_DESC(debug, "Debug level (default 0)"); +/*! \endcond */ +#endif /* GENL_DEBUG */ + +#ifndef KPMD +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + BCMDRD_DEV_T_##_bd, +/*! Enumeration for all base device types. */ +typedef enum { + BCMDRD_DEV_T_NONE = 0, +/*! \cond */ +#include +/*! \endcond */ + BCMDRD_DEV_T_COUNT +} bcmdrd_dev_type_t; + +/*! Create enumeration values from list of supported variants. */ +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ + BCMLRD_VARIANT_T_##_bd##_##_ve, + +/*! Enumeration for all device variants. */ +typedef enum bcmlrd_variant_e { + BCMLRD_VARIANT_T_NONE = 0, +/*! \cond */ +#include +/*! \endcond */ + BCMLRD_VARIANT_T_COUNT +} bcmlrd_variant_t; +#endif /* !KPMD */ + +typedef struct ngknetcb_dev_s { + bool initialized; + bcmdrd_dev_type_t dev_type; + bcmlrd_variant_t var_type; +} ngknetcb_dev_t; + +static ngknetcb_dev_t cb_dev[NUM_PDMA_DEV_MAX]; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + {#_bd, BCMDRD_DEV_T_##_bd}, +static const struct { + char *name; + bcmdrd_dev_type_t dev; +} device_types[] = { + {"device_none", BCMDRD_DEV_T_NONE}, +#include + {"device_count", BCMDRD_DEV_T_COUNT} +}; + +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ + {#_bd, #_ve, BCMLRD_VARIANT_T_##_bd##_##_ve}, +static const struct { + char *dev_name; + char *var_name; + bcmlrd_variant_t var; +} variant_types[] = { + {"device_none", "variant_none", BCMLRD_VARIANT_T_NONE}, +#include + {"device_count", "variant_count", BCMLRD_VARIANT_T_COUNT} +}; + +#ifdef KPMD +/* + Change this structure to reflect the match_ids of interest. + This is an example of how it can be used. +*/ +typedef struct cb_match_id_s { + int egress_pkt_fwd_l2_hdr_etag; + int egress_pkt_fwd_l2_hdr_l2; + int ingress_pkt_inner_l2_hdr_l2; + int ingress_pkt_fwd_l2_hdr_etag; + int ingress_pkt_outer_l2_hdr_itag; + int ingress_pkt_outer_l2_hdr_otag; +} cb_match_id_t; + +static cb_match_id_t match_id; + +struct name_value_pair_s { + char *name; + int value; +}; + +static struct name_value_pair_s rxpmd_info[] = { + BCMPKT_RXPMD_FIELD_NAME_MAP_INIT +}; + +static const shr_enum_map_t reason_names[] = +{ + BCMPKT_REASON_NAME_MAP_INIT +}; + +static void +print_all_rxpmd_fields( + bcmdrd_dev_type_t dev_type, + const uint8_t *rxpmd) +{ + int rv, fid; + bcmpkt_rxpmd_fid_support_t support; + uint32_t val; + + printk("\n[RX metadata information]:\n"); + bcmpkt_rxpmd_fid_support_get(dev_type, &support); + + BCMPKT_RXPMD_FID_SUPPORT_ITER(support, fid) { + rv = bcmpkt_rxpmd_field_get + (dev_type, (uint32_t *)rxpmd, fid, &val); + if (rv == 0) { + printk(" %-26s = %10d [0x%X]\n", rxpmd_info[fid].name, val, val); + } + } +} + +static void +print_all_rxpmd_flex_fields( + bcmdrd_dev_type_t dev_type, + bcmlrd_variant_t var_type, + const uint8_t *rxpmd, + uint32_t *rxpmd_flex) +{ + int rv, fid; + int flex_profile = -1; + bcmpkt_flex_field_info_t rxpmd_flex_info; + uint32_t hid, val; + + rv = bcmpkt_rxpmd_field_get(dev_type, (uint32_t *)rxpmd, + BCMPKT_RXPMD_MPB_FLEX_DATA_TYPE, &val); + if (rv < 0) { + return; + } + flex_profile = (int)val; + + rv = bcmpkt_flexhdr_header_id_get(var_type, "RXPMD_FLEX_T", &hid); + if (rv < 0) { + return; + } + + rv = bcmpkt_flexhdr_field_info_get(var_type, hid, &rxpmd_flex_info); + if (rv < 0) { + return; + } + + printk("\n[RX metadata flex information]:\n"); + for (fid = BCMPKT_FID_INVALID + 1; fid < rxpmd_flex_info.num_fields; fid++) { + rv = bcmpkt_flexhdr_field_get(var_type, hid, rxpmd_flex, flex_profile, fid, &val); + if (rv == 0 && val != 0) { + printk(" %-34s = %10d [0x%X]\n", rxpmd_flex_info.info[fid].name, val, val); + } + } +} + +static void +print_all_rx_reason(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd) +{ + int reason, rv; + bcmpkt_rx_reasons_t reasons; + + if (rxpmd) { + BCMPKT_RX_REASON_CLEAR_ALL(reasons); + rv = bcmpkt_rxpmd_reasons_get(dev_type, rxpmd, &reasons); + if (rv == 0) { + BCMPKT_RX_REASON_ITER(reasons, reason) { + printk(" %s\n", reason_names[reason].name); + } + } + } +} + +static void +print_all_rx_flex_reason(bcmlrd_variant_t variant, uint32_t *rxpmd_flex) +{ + int reason, reason_num = 0, rv; + bcmpkt_bitmap_t reasons; + char *name; + uint32_t val; + + if (rxpmd_flex == NULL) { + return; + } + + rv = bcmpkt_rxpmd_flex_reason_max_get(variant, &val); + if (rv < 0) { + return; + } + reason_num = (int)val; + + rv = bcmpkt_rxpmd_flex_reasons_get(variant, rxpmd_flex, &reasons); + if (rv == 0) { + for (reason = 0; reason < reason_num; reason++) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(reasons, reason)) { + rv = bcmpkt_rxpmd_flex_reason_name_get(variant, reason, &name); + if (!rv) { + printk(" %s\n", name); + } + } + } + } +} + +#endif /* KPMD */ + +#ifdef GENL_DEBUG +static void +dump_buffer(uint8_t *data, int size) +{ + const char *const to_hex = "0123456789ABCDEF"; + int i; + char buffer[128]; + char *buffer_ptr; + int addr = 0; + + buffer_ptr = buffer; + if (data && size != 0) { + for (i = 0; i < size; i++) { + *buffer_ptr++ = ' '; + *buffer_ptr++ = to_hex[(data[i] >> 4) & 0xF]; + *buffer_ptr++ = to_hex[data[i] & 0xF]; + if (((i % 16) == 15) || (i == size - 1)) { + *buffer_ptr = '\0'; + buffer_ptr = buffer; + printk(KERN_INFO "%04X %s\n", addr, buffer); + addr = i + 1; + } + } + } +} + +static void +dump_pmd(uint8_t *pmd, int len) +{ + if (debug & GENL_DBG_LVL_PDMP) { + printk(KERN_INFO "[PMD (%d bytes)]:\n", len); + dump_buffer(pmd, len); + } +} + +void dump_skb(struct sk_buff *skb) +{ + if (skb && (skb->len != 0)) { + printk(KERN_INFO "[SKB (%d bytes)]:\n", skb->len); + dump_buffer(skb->data, skb->len); + } +} + +void dump_bcmgenl_pkt(bcmgenl_pkt_t *bcmgenl_pkt) +{ + printk(KERN_INFO" %-20s = 0x%p\n", "Network namespace", bcmgenl_pkt->netns); + printk(KERN_INFO" %-20s = %d\n", "ing_pp_port", bcmgenl_pkt->meta.ing_pp_port); + printk(KERN_INFO" %-20s = %d\n", "src_port", bcmgenl_pkt->meta.src_port); + printk(KERN_INFO" %-20s = %d\n", "dst_port", bcmgenl_pkt->meta.dst_port); + printk(KERN_INFO" %-20s = %d\n", "dst_port_type", bcmgenl_pkt->meta.dst_port_type); + printk(KERN_INFO" %-20s = %d\n", "tag_status", bcmgenl_pkt->meta.tag_status); + printk(KERN_INFO" %-20s = 0x%x\n", "proto", bcmgenl_pkt->meta.proto); + printk(KERN_INFO" %-20s = %d\n", "vlan", bcmgenl_pkt->meta.vlan); + printk(KERN_INFO" %-20s = %s\n", "sample_type", + (bcmgenl_pkt->meta.sample_type == SAMPLE_TYPE_NONE ? "Not sampled" : + (bcmgenl_pkt->meta.sample_type == SAMPLE_TYPE_INGRESS ? + "Ingress sampled" : "Egress sampled"))); +} +#endif /* GENL_DEBUG */ + +/* + * The function get_tag_status() returns the tag status. + * 0 = Untagged + * 1 = Single inner-tag + * 2 = Single outer-tag + * 3 = Double tagged. + * -1 = Unsupported type + */ +static int +get_tag_status(uint32_t dev_type, uint32_t variant, void *rxpmd) +{ + int rv; + const char *tag_type[4] = { + "Untagged", + "Inner Tagged", + "Outer Tagged", + "Double Tagged" + }; + int tag_status = -1; + bcmpkt_rxpmd_fid_support_t support; + uint32_t val = 0; + + bcmpkt_rxpmd_fid_support_get(dev_type, &support); + + if (BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_ING_TAG_TYPE)) { + rv = bcmpkt_rxpmd_field_get(dev_type, (uint32_t *)rxpmd, + BCMPKT_RXPMD_ING_TAG_TYPE, &val); + /* Tomahawk4 family */ + + /* + * Indicates the incoming tag status (INCOMING_TAG_STATUS): + * For single tag device: + * 0: untagged, 1: tagged + * For double tag device: + * 0: untagged, 1: single inner-tag, 2: single outer-tag, 3: double tagged + */ + if (SHR_SUCCESS(rv)) { + tag_status = val; + } + } else if (BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_MATCH_ID_LO) && + BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_MATCH_ID_HI)) { + /* Trident4 family. */ + + uint32_t match_id_data[2]; + bool itag = false, otag = false; + + bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_MATCH_ID_LO, + &match_id_data[0]); + bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_MATCH_ID_HI, + &match_id_data[1]); + rv = bcmpkt_rxpmd_match_id_present(variant, match_id_data, 2, + match_id.ingress_pkt_outer_l2_hdr_itag); + if (SHR_SUCCESS(rv)) { + itag = true; + } + rv = bcmpkt_rxpmd_match_id_present(variant, match_id_data, 2, + match_id.ingress_pkt_outer_l2_hdr_otag); + if (SHR_SUCCESS(rv)) { + otag = true; + } + if (itag && otag) { + tag_status = 3; + } else if (itag) { + tag_status = 1; + } else if (otag) { + tag_status = 2; + } else { + tag_status = 0; + } + } +#ifdef GENL_DEBUG + if (debug & GENL_DBG_LVL_VERB) { + if (tag_status != -1) { + if (tag_status == 0) { + printk(" Incoming frame untagged\n"); + } else { + printk(" Incoming frame tagged: %s\n", tag_type[tag_status]); + } + } else { + printk(" Unsupported tag type\n"); + } + } +#endif /* GENL_DEBUG */ + return tag_status; +} + +static int +dstport_get(void *raw_hg_hdr) +{ + /* + * The bit positions of dest port field is fixed on TH4/TH5. + * directly use HIGIG2_DST_PORT_MGIDLf_GET to get dest port. + */ + int dstport = 0; + const HIGIG2_t *const higig2 = (HIGIG2_t *)raw_hg_hdr; + + if (HIGIG2_MCSTf_GET(*higig2)) { + dstport = 0; + } else { + dstport = HIGIG2_DST_PORT_MGIDLf_GET(*higig2); + } + return dstport; +} + +static int +dstport_type_get(void *raw_hg_hdr) +{ + /* + * The bit positions of multicast field is fixed on TH4/TH5. + * directly use HIGIG2_MCSTf_GET to get dest port. + */ + const HIGIG2_t *const higig2 = (HIGIG2_t *)raw_hg_hdr; + + if (HIGIG2_MCSTf_GET(*higig2)) { + return DSTPORT_TYPE_MC; + } + return DSTPORT_TYPE_NONE; +} + +static bool +is_cpu_port(uint32_t dev_id, uint32_t port) +{ + if (((dev_id == 0xb880) && (port == 160)) || + ((dev_id == 0xb780) && (port == 80)) || + ((dev_id == 0xb690) && (port == 80)) || + ((dev_id == 0xb890) && (port == 272)) || + ((dev_id == 0xf800) && (port == 176))) { + /* + * SYSTEM_DESTINATION_15_0 = 0 is reserved and not used for CPU port on + * Trident 4/5 families. + * e.g TD4X11 map system port of CPU to {modid : 160} + */ + return true; + } + return false; +} + +int +bcmgenl_pkt_package( + int dev, + struct sk_buff *skb, + bcmgenl_info_t *bcmgenl_info, + bcmgenl_pkt_t *bcmgenl_pkt) +{ + int unit, rv, rv2; + struct ngknet_callback_desc *cbd; + uint8_t *pkt; + uint32_t dev_type = 0; + bcmlrd_variant_t var_type; + uint32_t *rxpmd = NULL; + uint32_t *rxpmd_flex = NULL; + uint32_t rxpmd_flex_len = 0; + uint32_t hid, val = 0; + int flex_profile = -1; + int fid; + uint32_t *mh = NULL; + int reason, reason_num = 0; + bcmpkt_bitmap_t reasons; + bcmpkt_rx_reasons_t rx_reasons; + char *name; + + if (!skb || !bcmgenl_info || !bcmgenl_pkt) { + return SHR_E_PARAM; + } + cbd = NGKNET_SKB_CB(skb); + unit = cbd->dinfo->dev_no; + pkt = cbd->pmd + cbd->pmd_len; + rxpmd = (uint32_t *)cbd->pmd; + + memset(&bcmgenl_pkt->meta, 0, sizeof(bcmgenl_packet_meta_t)); + + bcmgenl_pkt->meta.proto = (uint16_t) ((pkt[12] << 8) | pkt[13]); + bcmgenl_pkt->meta.vlan = (uint16_t) ((pkt[14] << 8) | pkt[15]); + + bcmgenl_pkt->netns = bcmgenl_info->netns; + + if (cb_dev[unit].initialized) { +#ifdef KPMD + dev_type = cb_dev[unit].dev_type; + var_type = cb_dev[unit].var_type; + + /* Get tag status */ + bcmgenl_pkt->meta.tag_status = get_tag_status(dev_type, var_type, (void *)rxpmd); + + /* Get sampling reason */ + BCMPKT_RX_REASON_CLEAR_ALL(reasons); + rv = bcmpkt_rxpmd_reasons_get(dev_type, rxpmd, &rx_reasons); + bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_NONE; + if (SHR_SUCCESS(rv)) { + if ((BCMPKT_RX_REASON_GET(rx_reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) || + (BCMPKT_RX_REASON_GET(rx_reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC))){ + bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_INGRESS; + } else if ((BCMPKT_RX_REASON_GET(rx_reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) || + (BCMPKT_RX_REASON_GET(rx_reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST))) { + bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_EGRESS; + } + } + + /* Get Module header's pointer */ + rv = bcmpkt_rxpmd_mh_get(dev_type, rxpmd, &mh); + if (SHR_SUCCESS(rv)) { + /* Get dst_port and dst_port_type */ + bcmgenl_pkt->meta.dst_port = dstport_get((void *)mh); + bcmgenl_pkt->meta.dst_port_type = dstport_type_get((void *)mh); + } + + /* Get src port */ + rv = bcmpkt_rxpmd_field_get + (dev_type, rxpmd, BCMPKT_RXPMD_SRC_PORT_NUM, &val); + if (SHR_SUCCESS(rv)) { + bcmgenl_pkt->meta.src_port = val; + } + rv = bcmpkt_rxpmd_flexdata_get + (dev_type, rxpmd, &rxpmd_flex, &rxpmd_flex_len); + if (SHR_FAILURE(rv) && (rv != SHR_E_UNAVAIL)) { + GENL_DBG_VERB("Failed to detect RXPMD_FLEX.\n"); + } else { + if (rxpmd_flex_len) { + /* Get sampling reason from flex reasons */ + rv = bcmpkt_rxpmd_flex_reason_max_get(var_type, &val); + rv2 = bcmpkt_rxpmd_flex_reasons_get(var_type, rxpmd_flex, &reasons); + if (SHR_SUCCESS(rv) || SHR_SUCCESS(rv2)) { + bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_NONE; + reason_num = (int)val; + for (reason = 0; reason < reason_num; reason++) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(reasons, reason)) { + rv = bcmpkt_rxpmd_flex_reason_name_get(var_type, reason, &name); + if (SHR_SUCCESS(rv)) { + if (strcmp(name, "MIRROR_SAMPLER_SAMPLED") == 0) { + bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_INGRESS; + break; + } else if (strcmp(name, "MIRROR_SAMPLER_EGR_SAMPLED") == 0) { + bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_EGRESS; + break; + } + } + } + } + } + + /* Get hid of RXPMD_FLEX_T */ + if (bcmpkt_flexhdr_header_id_get(var_type, + "RXPMD_FLEX_T", &hid)) { + rv = SHR_E_UNAVAIL; + } + + if (SHR_FAILURE(rv) || + bcmpkt_rxpmd_field_get(dev_type, (uint32_t *)rxpmd, + BCMPKT_RXPMD_MPB_FLEX_DATA_TYPE, &val)) { + rv = SHR_E_UNAVAIL; + } + flex_profile = (int)val; + + rv2 = SHR_E_NONE; + /* Get fid of INGRESS_PP_PORT_7_0 */ + if (SHR_FAILURE(rv) || + bcmpkt_flexhdr_field_id_get(var_type, hid, + "INGRESS_PP_PORT_7_0", + &fid) || + bcmpkt_flexhdr_field_get(var_type, hid, + rxpmd_flex, + flex_profile, + fid, &val)) { + rv2 = SHR_E_UNAVAIL; + } + if (SHR_SUCCESS(rv) || SHR_SUCCESS(rv2)) { + bcmgenl_pkt->meta.ing_pp_port = val; + } + + /* Get dst_port and dst_port_type */ + rv2 = bcmpkt_rxpmd_field_get + (dev_type, rxpmd, BCMPKT_RXPMD_MULTICAST, &val); + if (SHR_SUCCESS(rv2)) { + bcmgenl_pkt->meta.dst_port_type = + (val == 1 ? DSTPORT_TYPE_MC : DSTPORT_TYPE_NONE); + } + if (bcmgenl_pkt->meta.dst_port_type == DSTPORT_TYPE_MC) { + bcmgenl_pkt->meta.dst_port = 0; + } else { + rv2 = SHR_E_NONE; + /* Get fid of SYSTEM_DESTINATION_15_0 */ + if (SHR_FAILURE(rv) || + bcmpkt_flexhdr_field_id_get(var_type, hid, + "SYSTEM_DESTINATION_15_0", + &fid) || + bcmpkt_flexhdr_field_get(var_type, hid, + rxpmd_flex, + flex_profile, + fid, &val)) { + rv2 = SHR_E_UNAVAIL; + } + if (SHR_SUCCESS(rv) || SHR_SUCCESS(rv2)) { + if (is_cpu_port(cbd->dinfo->dev_id, val)) { + val = 0; + } + bcmgenl_pkt->meta.dst_port = val; + } + } + + rv2 = SHR_E_NONE; + /* Get fid of ING_TIMESTAMP_31_0 */ + if (SHR_FAILURE(rv) || + bcmpkt_flexhdr_field_id_get(var_type, hid, + "ING_TIMESTAMP_31_0", + &fid) || + bcmpkt_flexhdr_field_get(var_type, hid, + rxpmd_flex, + flex_profile, + fid, &val)) { + rv2 = SHR_E_UNAVAIL; + } + if (SHR_SUCCESS(rv) || SHR_SUCCESS(rv2)) { + bcmgenl_pkt->meta.timestamp = val; + } + } + } +#endif /* KPMD */ + } +#ifdef GENL_DEBUG + if (debug & GENL_DBG_LVL_PDMP) { + if (cb_dev[unit].initialized) { + printk("bcmgenl_pkt_package for dev %d:", cbd->dinfo->dev_no); + printk("type_str:%s dev_id: 0x%x variant: %s\n", + cbd->dinfo->type_str, cbd->dinfo->dev_id, variant_types[var_type].var_name); + printk("dev_type: %d\n", dev_type); + printk("variant: %d\n", var_type); + + print_all_rxpmd_fields(dev_type, (void *)rxpmd); + if (rxpmd_flex_len) { + print_all_rxpmd_flex_fields(dev_type, var_type, (void *)rxpmd, rxpmd_flex); + printk("\n[RX flex reasons]:\n"); + print_all_rx_flex_reason(var_type, rxpmd_flex); + } else { + printk("\n[RX reasons]:\n"); + print_all_rx_reason(dev_type, (void *)rxpmd); + } + + if (cbd->pmd_len != 0) { + dump_pmd(cbd->pmd, cbd->pmd_len); + } + printk("\n[Packet raw data (%d)]:\n", cbd->pkt_len); + dump_buffer(pkt, cbd->pkt_len); + } + dump_bcmgenl_pkt(bcmgenl_pkt); + } +#endif /* GENL_DEBUG */ + return SHR_E_NONE; +} + +#ifdef KPMD +/* + Initialize the desired match_ids for use later in the code. +*/ +static void +init_match_ids(int unit) +{ + uint32_t val; + + match_id.egress_pkt_fwd_l2_hdr_etag = -1; + match_id.egress_pkt_fwd_l2_hdr_l2 = -1; + match_id.ingress_pkt_inner_l2_hdr_l2 = -1; + match_id.ingress_pkt_fwd_l2_hdr_etag = -1; + match_id.ingress_pkt_outer_l2_hdr_itag = -1; + match_id.ingress_pkt_outer_l2_hdr_otag = -1; + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "EGRESS_PKT_FWD_L2_HDR_ETAG", &val) == 0) { + match_id.egress_pkt_fwd_l2_hdr_etag = val; + GENL_DBG_VERB("EGRESS_PKT_FWD_L2_HDR_ETAG: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "EGRESS_PKT_FWD_L2_HDR_L2", &val) == 0) { + match_id.egress_pkt_fwd_l2_hdr_l2 = val; + GENL_DBG_VERB("EGRESS_PKT_FWD_L2_HDR_L2: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "INGRESS_PKT_INNER_L2_HDR_L2", &val) == 0) { + match_id.ingress_pkt_inner_l2_hdr_l2 = val; + GENL_DBG_VERB("INGRESS_PKT_INNER_L2_HDR_L2: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "INGRESS_PKT_FWD_L2_HDR_ETAG", &val) == 0) { + match_id.ingress_pkt_fwd_l2_hdr_etag = val; + GENL_DBG_VERB("INGRESS_PKT_FWD_L2_HDR_ETAG: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "INGRESS_PKT_OUTER_L2_HDR_ITAG", &val) == 0) { + match_id.ingress_pkt_outer_l2_hdr_itag = val; + GENL_DBG_VERB("INGRESS_PKT_OUTER_L2_HDR_ITAG: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "INGRESS_PKT_OUTER_L2_HDR_OTAG", &val) == 0) { + match_id.ingress_pkt_outer_l2_hdr_otag = val; + GENL_DBG_VERB("INGRESS_PKT_OUTER_L2_HDR_OTAG: %d\n", val); + } +} +#endif /* KPMD */ + +/*! + * \brief Device Initialization Callback. + * + * The device initialization callback allows an external module to + * perform device-specific initialization in preparation for Tx and Rx + * packet processing. + * + * \param [in] dinfo Device information. + * + */ +static void +init_cb(ngknet_dev_info_t *dinfo) +{ + int unit; + bcmdrd_dev_type_t dt; + bcmlrd_variant_t var; + unit = dinfo->dev_no; + + if ((unsigned int)unit >= NUM_PDMA_DEV_MAX) { + return; + } + + for (dt = 0; dt < BCMDRD_DEV_T_COUNT; dt++) { + if (!strcasecmp(dinfo->type_str, device_types[dt].name)) { + cb_dev[unit].dev_type = dt; + break; + } + } + + for (var = 0; var < BCMLRD_VARIANT_T_COUNT; var++) { + if ((!strcasecmp(dinfo->type_str, variant_types[var].dev_name)) && + (!strcasecmp(dinfo->var_str, variant_types[var].var_name))) { + cb_dev[unit].var_type = var; + break; + } + } +#ifdef GENL_DEBUG + if (debug & GENL_DBG_LVL_VERB) { + printk("init_cb unit %d, dev %s dev_id: 0x%x variant %s\n", + dinfo->dev_no, dinfo->type_str, dinfo->dev_id, dinfo->var_str); + printk("dev_type: %d\n", cb_dev[unit].dev_type); + printk("variant: %d\n", cb_dev[unit].var_type); + } +#endif /* GENL_DEBUG */ + cb_dev[unit].initialized = true; +#ifdef KPMD + init_match_ids(unit); +#endif /* KPMD */ +} + +static int +bcmgenl_proc_cleanup(void) +{ + remove_proc_entry(BCMGENL_PROCFS_PATH, NULL); + remove_proc_entry(BCM_PROCFS_NAME, NULL); + return 0; +} + +static int +bcmgenl_proc_init(void) +{ + /* initialize proc files (for bcmgenl) */ + proc_mkdir(BCM_PROCFS_NAME, NULL); + bcmgenl_proc_root = proc_mkdir(BCMGENL_PROCFS_PATH, NULL); + return 0; +} + +static int __init +bcmgenl_init_module(void) +{ + ngknet_dev_init_cb_register(init_cb); + + bcmgenl_proc_init(); +#if 0 + bcmgenl_packet_init(); +#endif + bcmgenl_psample_init(); + + return 0; +} + +static void __exit +bcmgenl_exit_module(void) +{ + ngknet_dev_init_cb_unregister(init_cb); +#if 0 + bcmgenl_packet_cleanup(); +#endif + bcmgenl_psample_cleanup(); + bcmgenl_proc_cleanup(); +} + +module_init(bcmgenl_init_module); +module_exit(bcmgenl_exit_module); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h new file mode 100644 index 000000000000..aa4adc24d28d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h @@ -0,0 +1,180 @@ +/*! \file bcmgenl.h + * + * BCMGENL module entry. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMGENL_H +#define BCMGENL_H + +#include +#include +#include + +/*! Max length of proc path */ +#define PROCFS_MAX_PATH 1024 + +/*! Module information */ +#define BCMGENL_MODULE_NAME "linux_bcmgenl" +/*! Use similar path to SDK6 genl psample path */ +#define BCM_PROCFS_NAME "bcm" +#define BCMGENL_PROCFS_NAME "genl" +#define BCMGENL_PROCFS_PATH (BCM_PROCFS_NAME "/" BCMGENL_PROCFS_NAME) + +/*! set GENL_DEBUG for debug info */ +#define GENL_DEBUG +#define GENL_DBG_LVL_VERB 0x0001 +#define GENL_DBG_LVL_PDMP 0x0002 +#define GENL_DBG_LVL_WARN 0x0004 + +#ifdef GENL_DEBUG +#define GENL_DBG_VERB(...) if (debug & GENL_DBG_LVL_VERB) printk (__VA_ARGS__); +#define GENL_DBG_PDMP(...) if (debug & GENL_DBG_LVL_PDMP) printk (__VA_ARGS__); +#define GENL_DBG_WARN(...) if (debug & GENL_DBG_LVL_WARN) printk (__VA_ARGS__); +#else +#define GENL_DBG_VERB(...) +#define GENL_DBG_PDMP(...) +#define GENL_DBG_WARN(...) +#endif /* GENL_DEBUG */ + +typedef struct { + uint8_t cmic_type; + uint8_t dcb_type; + uint8_t dcb_size; + uint8_t pkt_hdr_size; + uint32_t cdma_channels; +} knet_hw_info_t; + +/*! generic netlink data per interface */ +typedef struct { + struct list_head list; + struct net_device *dev; + uint16_t id; + uint32_t port; + uint16_t vlan; + uint16_t qnum; + uint32_t sample_rate; /* sFlow sample rate */ + uint32_t sample_size; /* sFlow sample size */ +} bcmgenl_netif_t; + +/*! generic netlink interface info */ +typedef struct { + struct list_head netif_list; + int netif_count; + knet_hw_info_t hw; + struct net *netns; + spinlock_t lock; +} bcmgenl_info_t; + +/*! Destination port type */ +#define DSTPORT_TYPE_NONE 0 +#define DSTPORT_TYPE_DISCARD 1 +#define DSTPORT_TYPE_MC 2 + +/*! Sampling type */ +#define SAMPLE_TYPE_NONE 0 +#define SAMPLE_TYPE_INGRESS 1 +#define SAMPLE_TYPE_EGRESS 2 + +/*! generic netlink packet metadata */ +typedef struct bcmgenl_packet_meta_s { + int ing_pp_port; + int src_port; + int dst_port; + int dst_port_type; /* Destination port type */ + uint32_t trunk_id; + uint64_t timestamp; + /* + * Tag status + * 0x0(Untagged) + * 0x1(Single inner-tag) + * 0x2(Single outer-tag) + * 0x3(Double tagged) + */ + int tag_status; + uint16_t proto; + uint16_t vlan; + int sample_type; /* Sampling type */ +} bcmgenl_packet_meta_t; + +/*! generic netlink packet info */ +typedef struct bcmgenl_pkt_s { + struct net *netns; /* net namespace */ + bcmgenl_packet_meta_t meta; +} bcmgenl_pkt_t; + +/*! + * \brief Dump skb buffer. + * + * \param [in] skb socket buffer. + */ +void dump_skb(struct sk_buff *skb); + +/*! + * \brief Dump generic netlink packet. + * + * \param [in] bcmgenl_pkt generic netlink packet. + */ +void dump_bcmgenl_pkt(bcmgenl_pkt_t *bcmgenl_pkt); + +/*! + * \brief Package packet to Generic Netlink packet format. + * + * \param [in] dev NGKNET device structure point. + * \param [in] skb socket buffer. + * \param [in] pkt packet data buffer. + * \param [in] pkt_meta packet metadata buffer. + * \param [in] bcmgenl_info Generic Netlink interface information + * structure point. + * \param [out] bcmgenl_pkt Generic Netlink packet information + * structure point. + * + * \retval SHR_E_NONE No errors. + * \retval SHR_E_XXXX Operation failed. + */ +extern int +bcmgenl_pkt_package( + int dev, + struct sk_buff *skb, + bcmgenl_info_t *bcmgenl_info, + bcmgenl_pkt_t *bcmgenl_pkt); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,17,0) +/* last should be static or global */ +#define bcmgenl_limited_gprintk(last, ...) { \ + struct timeval tv; \ + do_gettimeofday(&tv); \ + if (tv.tv_sec != last) { \ + printk(__VA_ARGS__); \ + last = tv.tv_sec; \ + } \ +} +#else +/* last should be static or global */ +#define bcmgenl_limited_gprintk(last, ...) { \ + struct timespec64 ts; \ + ktime_get_real_ts64(&ts); \ + if (ts.tv_sec != last) { \ + printk(__VA_ARGS__); \ + last = ts.tv_sec; \ + } \ +} +#endif /* KERNEL_VERSION(3,17,0) */ + +#endif /* BCMGENL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c new file mode 100644 index 000000000000..4d097e7d052a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c @@ -0,0 +1,821 @@ +/*! \file bcmgenl_packet.c + * + * BCMGENL packet callback module. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include + +#include +#include +#include +#include +#include +#if 0 +/*! \cond */ +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("BCMGENL Module"); +MODULE_LICENSE("GPL"); +/*! \endcond */ + +#include +#include +#include + +#define BCMGENL_PACKET_NAME GENL_PACKET_NAME + +#ifdef GENL_DEBUG +static int debug; +#endif /* GENL_DEBUG */ + +#define BCMGENL_PACKET_QLEN_DFLT 1024 +static int bcmgenl_packet_qlen = BCMGENL_PACKET_QLEN_DFLT; +MODULE_PARAM(bcmgenl_packet_qlen, int, 0); +MODULE_PARM_DESC(bcmgenl_packet_qlen, "generic cb queue length (default 1024 buffers)"); + +#define FCS_SZ 4 + +static bcmgenl_info_t g_bcmgenl_packet_info = {{0}}; + +/* Maintain sampled pkt statistics */ +typedef struct bcmgenl_packet_stats_s { + unsigned long pkts_f_packet_cb; + unsigned long pkts_f_packet_mod; + unsigned long pkts_f_handled; + unsigned long pkts_f_pass_through; + unsigned long pkts_f_tag_checked; + unsigned long pkts_f_tag_stripped; + unsigned long pkts_f_dst_mc; + unsigned long pkts_f_src_cpu; + unsigned long pkts_f_dst_cpu; + unsigned long pkts_c_qlen_cur; + unsigned long pkts_c_qlen_hi; + unsigned long pkts_d_qlen_max; + unsigned long pkts_d_no_mem; + unsigned long pkts_d_not_ready; + unsigned long pkts_d_metadata; + unsigned long pkts_d_skb; + unsigned long pkts_d_skb_cbd; + unsigned long pkts_d_meta_srcport; + unsigned long pkts_d_meta_dstport; + unsigned long pkts_d_invalid_size; +} bcmgenl_packet_stats_t; +static bcmgenl_packet_stats_t g_bcmgenl_packet_stats = {0}; + +typedef struct genl_packet_meta_s { + int in_ifindex; + int out_ifindex; + unsigned int context; +} genl_packet_meta_t; + +typedef struct genl_pkt_s { + struct list_head list; + struct net *netns; + genl_packet_meta_t meta; + struct sk_buff *skb; +} genl_pkt_t; + +typedef struct bcmgenl_packet_work_s { + struct list_head pkt_list; + struct work_struct wq; + spinlock_t lock; +} bcmgenl_packet_work_t; +static bcmgenl_packet_work_t g_bcmgenl_packet_work = {{0}}; + +/* driver proc entry root */ +static struct proc_dir_entry *bcmgenl_packet_proc_root = NULL; + +static bcmgenl_netif_t * +bcmgenl_packet_netif_lookup_by_ifindex(int ifindex) __attribute__ ((unused)); +static bcmgenl_netif_t * +bcmgenl_packet_netif_lookup_by_ifindex(int ifindex) +{ + struct list_head *list; + bcmgenl_netif_t *bcmgenl_netif = NULL; + unsigned long flags; + + /* look for ifindex from list of available net_devices */ + spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags); + list_for_each(list, &g_bcmgenl_packet_info.netif_list) { + bcmgenl_netif = (bcmgenl_netif_t*)list; + if (bcmgenl_netif->dev->ifindex == ifindex) { + spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags); + return bcmgenl_netif; + } + } + spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags); + return (NULL); +} + +static bcmgenl_netif_t * +bcmgenl_packet_netif_lookup_by_port(int port) +{ + struct list_head *list; + bcmgenl_netif_t *bcmgenl_netif = NULL; + unsigned long flags; + + /* look for port from list of available net_devices */ + spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags); + list_for_each(list, &g_bcmgenl_packet_info.netif_list) { + bcmgenl_netif = (bcmgenl_netif_t*)list; + if (bcmgenl_netif->port == port) { + spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags); + return bcmgenl_netif; + } + } + spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags); + return (NULL); +} + +static int +bcmgenl_packet_generic_meta_get(bcmgenl_pkt_t *bcmgenl_pkt, genl_packet_meta_t *genl_packet_meta) +{ + int srcport, dstport, dstport_type; + int src_ifindex = 0, dst_ifindex = 0; + bcmgenl_netif_t *bcmgenl_netif = NULL; + + if (!bcmgenl_pkt || !genl_packet_meta) { + GENL_DBG_WARN("%s: bcmgenl_pkt or genl_packet_meta is NULL\n", __func__); + return (-1); + } + + /* get src and dst ports */ + srcport = bcmgenl_pkt->meta.src_port; + dstport = bcmgenl_pkt->meta.dst_port; + dstport_type = bcmgenl_pkt->meta.dst_port_type; + if ((srcport == -1) || (dstport == -1)) { + GENL_DBG_WARN("%s: invalid srcport %d or dstport %d\n", __func__, srcport, dstport); + return (-1); + } + + /* find src port netif (no need to lookup CPU port) */ + if (srcport != 0) { + if ((bcmgenl_netif = bcmgenl_packet_netif_lookup_by_port(srcport))) { + src_ifindex = bcmgenl_netif->dev->ifindex; + } else { + src_ifindex = -1; + g_bcmgenl_packet_stats.pkts_d_meta_srcport++; + GENL_DBG_VERB("%s: could not find srcport(%d)\n", __func__, srcport); + } + } else { + g_bcmgenl_packet_stats.pkts_f_src_cpu++; + } + + /* set generic dst type for MC pkts */ + if (dstport_type == DSTPORT_TYPE_MC) { + g_bcmgenl_packet_stats.pkts_f_dst_mc++; + } else if (dstport != 0) { + /* find dst port netif for UC pkts (no need to lookup CPU port) */ + if ((bcmgenl_netif = bcmgenl_packet_netif_lookup_by_port(dstport))) { + dst_ifindex = bcmgenl_netif->dev->ifindex; + } else { + dst_ifindex = -1; + g_bcmgenl_packet_stats.pkts_d_meta_dstport++; + GENL_DBG_VERB("%s: could not find dstport(%d)\n", __func__, dstport); + } + } else if (dstport == 0) { + g_bcmgenl_packet_stats.pkts_f_dst_cpu++; + } + + GENL_DBG_VERB + ("%s: srcport %d, dstport %d, src_ifindex %d, dst_ifindex %d\n", + __func__, srcport, dstport, src_ifindex, dst_ifindex); + + memset(genl_packet_meta, 0, sizeof(genl_packet_meta_t)); + genl_packet_meta->in_ifindex = src_ifindex; + genl_packet_meta->out_ifindex = dst_ifindex; + return (0); +} + +static struct sk_buff * +bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt) +{ + int rv = 0, dev_no, pkt_len; + const struct ngknet_callback_desc *cbd = NULL; + ngknet_filter_t *match_filt = NULL; + unsigned long flags; + bcmgenl_pkt_t bcmgenl_pkt; + genl_pkt_t *generic_pkt; + bool strip_tag = false; + struct sk_buff *skb_generic_pkt; + static uint32_t last_drop, last_alloc, last_skb; + uint8_t *pkt; + + if (!skb) { + GENL_DBG_WARN("%s: skb is NULL\n", __func__); + g_bcmgenl_packet_stats.pkts_d_skb++; + return (NULL); + } + cbd = NGKNET_SKB_CB(skb); + match_filt = cbd->filt; + + if (!cbd || !match_filt) { + GENL_DBG_WARN("%s: cbd(0x%p) or match_filt(0x%p) is NULL\n", + __func__, cbd, match_filt); + g_bcmgenl_packet_stats.pkts_d_skb_cbd++; + return (skb); + } + + /* check if this packet is from the same filter */ + if (!match_filt || + (match_filt->dest_type != NGKNET_FILTER_DEST_T_CB) || + (strncmp(match_filt->desc, BCMGENL_PACKET_NAME, NGKNET_FILTER_DESC_MAX) != 0)) { + return (skb); + } + dev_no = cbd->dinfo->dev_no; + pkt = cbd->pmd + cbd->pmd_len; + pkt_len = cbd->pkt_len; + + GENL_DBG_VERB + ("pkt size %d, match_filt->dest_id %d\n", + pkt_len, match_filt->dest_id); + GENL_DBG_VERB + ("filter user data: 0x%08x\n", *(uint32_t *)match_filt->user_data); + GENL_DBG_VERB + ("filter_cb for dev %d: %s\n", dev_no, cbd->dinfo->type_str); + g_bcmgenl_packet_stats.pkts_f_packet_cb++; + + /* Adjust original pkt_len to remove 4B FCS */ + if (pkt_len < FCS_SZ) { + g_bcmgenl_packet_stats.pkts_d_invalid_size++; + goto FILTER_CB_PKT_HANDLED; + } else { + pkt_len -= FCS_SZ; + } + + if (g_bcmgenl_packet_stats.pkts_c_qlen_cur >= bcmgenl_packet_qlen) { + g_bcmgenl_packet_stats.pkts_d_qlen_max++; + last_drop = 0; + bcmgenl_limited_gprintk + (last_drop, "%s: tail drop due to max qlen %d reached: %lu\n", + __func__, bcmgenl_packet_qlen, + g_bcmgenl_packet_stats.pkts_d_qlen_max); + goto FILTER_CB_PKT_HANDLED; + } + + if ((generic_pkt = kmalloc(sizeof(genl_pkt_t), GFP_ATOMIC)) == NULL) { + g_bcmgenl_packet_stats.pkts_d_no_mem++; + last_alloc = 0; + bcmgenl_limited_gprintk + (last_alloc, "%s: failed to alloc generic mem for pkt: %lu\n", + __func__, g_bcmgenl_packet_stats.pkts_d_no_mem); + goto FILTER_CB_PKT_HANDLED; + } + /* get packet metadata */ + rv = bcmgenl_pkt_package(dev_no, skb, + &g_bcmgenl_packet_info, + &bcmgenl_pkt); + if (rv < 0) { + GENL_DBG_WARN("%s: Could not parse pkt metadata\n", __func__); + g_bcmgenl_packet_stats.pkts_d_metadata++; + goto FILTER_CB_PKT_HANDLED; + } + + GENL_DBG_VERB + ("%s: netns 0x%p, src_port %d, dst_port %d, dst_port_type %x\n", + __func__, + bcmgenl_pkt.netns, + bcmgenl_pkt.meta.src_port, + bcmgenl_pkt.meta.dst_port, + bcmgenl_pkt.meta.dst_port_type); + + /* generic_pkt start */ + generic_pkt->netns = bcmgenl_pkt.netns; + + /* get generic_pkt generic metadata */ + rv = bcmgenl_packet_generic_meta_get(&bcmgenl_pkt, &generic_pkt->meta); + if (rv < 0) { + GENL_DBG_WARN("%s: Could not parse pkt metadata\n", __func__); + g_bcmgenl_packet_stats.pkts_d_metadata++; + goto FILTER_CB_PKT_HANDLED; + } + generic_pkt->meta.context = *(uint32_t *)cbd->filt->user_data; + + if (pkt_len >= 16) { + uint16_t proto = bcmgenl_pkt.meta.proto; + uint16_t vlan = bcmgenl_pkt.meta.vlan; + strip_tag = (vlan == 0xFFF) && + ((proto == 0x8100) || (proto == 0x88a8) || + (proto == 0x9100)); + if (strip_tag) { + pkt_len -= 4; + } + g_bcmgenl_packet_stats.pkts_f_tag_checked++; + } + + if ((skb_generic_pkt = dev_alloc_skb(pkt_len)) == NULL) + { + g_bcmgenl_packet_stats.pkts_d_no_mem++; + last_skb = 0; + bcmgenl_limited_gprintk + (last_skb, "%s: failed to alloc generic mem for pkt skb: %lu\n", + __func__, g_bcmgenl_packet_stats.pkts_d_no_mem); + goto FILTER_CB_PKT_HANDLED; + } + + /* setup skb by copying packet content */ + if (strip_tag) { + memcpy(skb_generic_pkt->data, pkt, 12); + memcpy(skb_generic_pkt->data + 12, pkt + 16, pkt_len - 12); + g_bcmgenl_packet_stats.pkts_f_tag_stripped++; + } else { + memcpy(skb_generic_pkt->data, pkt, pkt_len); + } + skb_put(skb_generic_pkt, pkt_len); + skb_generic_pkt->len = pkt_len; + generic_pkt->skb = skb_generic_pkt; + if (debug & GENL_DBG_LVL_PDMP) { + dump_skb(skb_generic_pkt); + } + /* generic_pkt end */ + + spin_lock_irqsave(&g_bcmgenl_packet_work.lock, flags); + list_add_tail(&generic_pkt->list, &g_bcmgenl_packet_work.pkt_list); + + g_bcmgenl_packet_stats.pkts_c_qlen_cur++; + if (g_bcmgenl_packet_stats.pkts_c_qlen_cur > + g_bcmgenl_packet_stats.pkts_c_qlen_hi) { + g_bcmgenl_packet_stats.pkts_c_qlen_hi = + g_bcmgenl_packet_stats.pkts_c_qlen_cur; + } + + schedule_work(&g_bcmgenl_packet_work.wq); + spin_unlock_irqrestore(&g_bcmgenl_packet_work.lock, flags); + + /* + * expected rv values: + * -ve for error + * 0 for passthrough + * 1 for packet handled + * + */ + + /* Set rv to packet handled */ + rv = 1; + +FILTER_CB_PKT_HANDLED: + if (rv == 1) { + g_bcmgenl_packet_stats.pkts_f_handled++; + /* Not sending to network protocol stack */ + dev_kfree_skb_any(skb); + skb = NULL; + } else { + g_bcmgenl_packet_stats.pkts_f_pass_through++; + } + return skb; +} + +static void +bcmgenl_packet_task(struct work_struct *work) +{ + bcmgenl_packet_work_t *packet_work = + container_of(work, bcmgenl_packet_work_t, wq); + unsigned long flags; + struct list_head *list_ptr, *list_next; + genl_pkt_t *pkt; + + spin_lock_irqsave(&packet_work->lock, flags); + list_for_each_safe(list_ptr, list_next, &packet_work->pkt_list) { + /* dequeue pkt from list */ + pkt = list_entry(list_ptr, genl_pkt_t, list); + list_del(list_ptr); + g_bcmgenl_packet_stats.pkts_c_qlen_cur--; + spin_unlock_irqrestore(&packet_work->lock, flags); + + /* send generic_pkt to generic netlink */ + if (pkt) { + GENL_DBG_VERB + ("%s: netns 0x%p, in_ifindex %d, out_ifindex %d, context 0x%08x\n", + __func__, + pkt->netns, + pkt->meta.in_ifindex, + pkt->meta.out_ifindex, + pkt->meta.context); + genl_packet_send_packet(pkt->netns, + pkt->skb, + pkt->meta.in_ifindex, + pkt->meta.out_ifindex, + pkt->meta.context); + g_bcmgenl_packet_stats.pkts_f_packet_mod++; + + dev_kfree_skb_any(pkt->skb); + kfree(pkt); + } + spin_lock_irqsave(&packet_work->lock, flags); + } + spin_unlock_irqrestore(&packet_work->lock, flags); +} + +static int +bcmgenl_packet_netif_create_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif) +{ + bool found; + struct list_head *list; + bcmgenl_netif_t *new_netif, *lbcmgenl_netif; + unsigned long flags; + + if (!dinfo) { + GENL_DBG_WARN("%s: dinfo is NULL\n", __func__); + return (-1); + } + if (netif->id == 0) { + GENL_DBG_WARN("%s: netif->id == 0 is not a valid interface ID\n", __func__); + return (-1); + } + if ((new_netif = kmalloc(sizeof(bcmgenl_netif_t), GFP_ATOMIC)) == NULL) { + GENL_DBG_WARN("%s: failed to alloc psample mem for netif '%s'\n", + __func__, netif->name); + return (-1); + } + + spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags); + new_netif->dev = dinfo->vdev[netif->id]; + new_netif->id = netif->id; + new_netif->port = netif->port; + new_netif->vlan = netif->vlan; + + /* insert netif sorted by ID similar to ngknet_netif_create() */ + found = false; + list_for_each(list, &g_bcmgenl_packet_info.netif_list) { + lbcmgenl_netif = (bcmgenl_netif_t *)list; + if (netif->id < lbcmgenl_netif->id) { + found = true; + break; + } + } + + if (found) { + /* Replace previously removed interface */ + list_add_tail(&new_netif->list, &lbcmgenl_netif->list); + } else { + /* No holes - add to end of list */ + list_add_tail(&new_netif->list, &g_bcmgenl_packet_info.netif_list); + } + g_bcmgenl_packet_info.netif_count++; + spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags); + + GENL_DBG_VERB + ("%s: added netlink packet netif '%s'\n", __func__, netif->name); + return (0); +} + +static int +bcmgenl_packet_netif_destroy_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif) +{ + bool found = false; + struct list_head *list; + bcmgenl_netif_t *lbcmgenl_netif; + unsigned long flags; + + if (!dinfo || !netif) { + GENL_DBG_WARN("%s: dinfo or netif is NULL\n", __func__); + return (-1); + } + + if (g_bcmgenl_packet_info.netif_count == 0) { + GENL_DBG_WARN("%s: no netif is created\n", __func__); + return (0); + } + spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags); + + list_for_each(list, &g_bcmgenl_packet_info.netif_list) { + lbcmgenl_netif = (bcmgenl_netif_t *)list; + if (netif->id == lbcmgenl_netif->id) { + found = true; + list_del(&lbcmgenl_netif->list); + GENL_DBG_VERB + ("%s: removing generic netif '%s'\n", __func__, netif->name); + kfree(lbcmgenl_netif); + g_bcmgenl_packet_info.netif_count--; + break; + } + } + + spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags); + + if (!found) { + GENL_DBG_WARN("%s: netif ID %d not found!\n", __func__, netif->id); + return (-1); + } + return (0); +} + +/* + * map Proc Read Entry + */ +static int +bcmgenl_packet_proc_map_show(struct seq_file *m, void *v) +{ + struct list_head *list; + bcmgenl_netif_t *bcmgenl_netif; + unsigned long flags; + + seq_printf(m, " Interface logical port ifindex\n"); + seq_printf(m, "------------- ------------ -------\n"); + spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags); + + list_for_each(list, &g_bcmgenl_packet_info.netif_list) { + bcmgenl_netif = (bcmgenl_netif_t*)list; + seq_printf(m, " %-14s %-14d %d\n", + bcmgenl_netif->dev->name, + bcmgenl_netif->port, + bcmgenl_netif->dev->ifindex); + } + + spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags); + return 0; +} + +static int +bcmgenl_packet_proc_map_open(struct inode * inode, struct file * file) +{ + return single_open(file, bcmgenl_packet_proc_map_show, NULL); +} + +static struct proc_ops bcmgenl_packet_proc_map_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bcmgenl_packet_proc_map_open, + .proc_read = seq_read, + .proc_write = NULL, + .proc_lseek = seq_lseek, + .proc_release = single_release, +}; + +static int +bcmgenl_packet_proc_stats_show(struct seq_file *m, void *v) +{ + seq_printf(m, "BCM KNET %s Callback Stats\n", BCMGENL_PACKET_NAME); + seq_printf(m, " DCB type %d\n", g_bcmgenl_packet_info.hw.dcb_type); + seq_printf(m, " pkts filter generic cb %10lu\n", g_bcmgenl_packet_stats.pkts_f_packet_cb); + seq_printf(m, " pkts sent to generic module %10lu\n", g_bcmgenl_packet_stats.pkts_f_packet_mod); + seq_printf(m, " pkts handled by generic cb %10lu\n", g_bcmgenl_packet_stats.pkts_f_handled); + seq_printf(m, " pkts pass through %10lu\n", g_bcmgenl_packet_stats.pkts_f_pass_through); + seq_printf(m, " pkts with vlan tag checked %10lu\n", g_bcmgenl_packet_stats.pkts_f_tag_checked); + seq_printf(m, " pkts with vlan tag stripped %10lu\n", g_bcmgenl_packet_stats.pkts_f_tag_stripped); + seq_printf(m, " pkts with mc destination %10lu\n", g_bcmgenl_packet_stats.pkts_f_dst_mc); + seq_printf(m, " pkts with cpu source %10lu\n", g_bcmgenl_packet_stats.pkts_f_src_cpu); + seq_printf(m, " pkts with cpu destination %10lu\n", g_bcmgenl_packet_stats.pkts_f_dst_cpu); + seq_printf(m, " pkts current queue length %10lu\n", g_bcmgenl_packet_stats.pkts_c_qlen_cur); + seq_printf(m, " pkts high queue length %10lu\n", g_bcmgenl_packet_stats.pkts_c_qlen_hi); + seq_printf(m, " pkts drop max queue length %10lu\n", g_bcmgenl_packet_stats.pkts_d_qlen_max); + seq_printf(m, " pkts drop no memory %10lu\n", g_bcmgenl_packet_stats.pkts_d_no_mem); + seq_printf(m, " pkts drop generic not ready %10lu\n", g_bcmgenl_packet_stats.pkts_d_not_ready); + seq_printf(m, " pkts drop metadata parse error %10lu\n", g_bcmgenl_packet_stats.pkts_d_metadata); + seq_printf(m, " pkts drop skb error %10lu\n", g_bcmgenl_packet_stats.pkts_d_skb); + seq_printf(m, " pkts drop skb cbd error %10lu\n", g_bcmgenl_packet_stats.pkts_d_skb_cbd); + seq_printf(m, " pkts with invalid src port %10lu\n", g_bcmgenl_packet_stats.pkts_d_meta_srcport); + seq_printf(m, " pkts with invalid dst port %10lu\n", g_bcmgenl_packet_stats.pkts_d_meta_dstport); + seq_printf(m, " pkts with invalid orig pkt sz %10lu\n", g_bcmgenl_packet_stats.pkts_d_invalid_size); + return 0; +} + +static int +bcmgenl_packet_proc_stats_open(struct inode * inode, struct file * file) +{ + return single_open(file, bcmgenl_packet_proc_stats_show, NULL); +} + +/* + * generic stats Proc Write Entry + * + * Syntax: + * write any value to clear stats + */ +static ssize_t +bcmgenl_packet_proc_stats_write( + struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + int qlen_cur = 0; + unsigned long flags; + + spin_lock_irqsave(&g_bcmgenl_packet_work.lock, flags); + qlen_cur = g_bcmgenl_packet_stats.pkts_c_qlen_cur; + memset(&g_bcmgenl_packet_stats, 0, sizeof(bcmgenl_packet_stats_t)); + g_bcmgenl_packet_stats.pkts_c_qlen_cur = qlen_cur; + spin_unlock_irqrestore(&g_bcmgenl_packet_work.lock, flags); + + return count; +} + +static struct proc_ops bcmgenl_packet_proc_stats_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bcmgenl_packet_proc_stats_open, + .proc_read = seq_read, + .proc_write = bcmgenl_packet_proc_stats_write, + .proc_lseek = seq_lseek, + .proc_release = single_release, +}; + +/* + * generic debug Proc Read Entry + */ +static int +bcmgenl_packet_proc_debug_show(struct seq_file *m, void *v) +{ + seq_printf(m, "BCM KNET %s Callback Config\n", BCMGENL_PACKET_NAME); + seq_printf(m, " debug: 0x%x\n", debug); + seq_printf(m, " cmic_type: %d\n", g_bcmgenl_packet_info.hw.cmic_type); + seq_printf(m, " dcb_type: %d\n", g_bcmgenl_packet_info.hw.dcb_type); + seq_printf(m, " dcb_size: %d\n", g_bcmgenl_packet_info.hw.dcb_size); + seq_printf(m, " pkt_hdr_size: %d\n", g_bcmgenl_packet_info.hw.pkt_hdr_size); + seq_printf(m, " cdma_channels: %d\n", g_bcmgenl_packet_info.hw.cdma_channels); + seq_printf(m, " netif_count: %d\n", g_bcmgenl_packet_info.netif_count); + seq_printf(m, " queue length: %d\n", bcmgenl_packet_qlen); + + return 0; +} + +static int +bcmgenl_packet_proc_debug_open(struct inode * inode, struct file * file) +{ + return single_open(file, bcmgenl_packet_proc_debug_show, NULL); +} + +/* + * generic debug Proc Write Entry + * + * Syntax: + * debug= + * + * Where corresponds to the debug module parameter. + * + * Examples: + * debug=0x1 + */ +static ssize_t +bcmgenl_packet_proc_debug_write( + struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + char debug_str[40]; + char *ptr; + + if (count > sizeof(debug_str)) { + count = sizeof(debug_str) - 1; + debug_str[count] = '\0'; + } + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + if ((ptr = strstr(debug_str, "debug=")) != NULL) { + ptr += 6; + debug = simple_strtol(ptr, NULL, 0); + } else { + GENL_DBG_WARN("Warning: unknown configuration setting\n"); + } + + return count; +} + +static struct proc_ops bcmgenl_packet_proc_debug_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bcmgenl_packet_proc_debug_open, + .proc_read = seq_read, + .proc_write = bcmgenl_packet_proc_debug_write, + .proc_lseek = seq_lseek, + .proc_release = single_release, +}; + +static int +genl_cb_proc_cleanup(void) +{ + remove_proc_entry("stats", bcmgenl_packet_proc_root); + remove_proc_entry("debug", bcmgenl_packet_proc_root); + remove_proc_entry("map" , bcmgenl_packet_proc_root); + + proc_remove(bcmgenl_packet_proc_root); + return 0; +} + +static int +genl_cb_proc_init(void) +{ + char packet_procfs_path[PROCFS_MAX_PATH]; + struct proc_dir_entry *entry; + + /* create procfs for generic */ + snprintf(packet_procfs_path, PROCFS_MAX_PATH, "%s/%s", + BCMGENL_PROCFS_PATH, BCMGENL_PACKET_NAME); + bcmgenl_packet_proc_root = proc_mkdir(packet_procfs_path, NULL); + + /* create procfs for generic stats */ + PROC_CREATE(entry, "stats", 0666, bcmgenl_packet_proc_root, + &bcmgenl_packet_proc_stats_file_ops); + if (entry == NULL) { + printk("%s: Unable to create procfs entry '/procfs/%s/stats'\n", + __func__, packet_procfs_path); + return -1; + } + + /* create procfs for getting netdev mapping */ + PROC_CREATE(entry, "map", 0666, bcmgenl_packet_proc_root, + &bcmgenl_packet_proc_map_file_ops); + if (entry == NULL) { + printk("%s: Unable to create procfs entry '/procfs/%s/map'\n", + __func__, packet_procfs_path); + return -1; + } + + /* create procfs for debug log */ + PROC_CREATE(entry, "debug", 0666, bcmgenl_packet_proc_root, + &bcmgenl_packet_proc_debug_file_ops); + if (entry == NULL) { + printk("%s: Unable to create procfs entry '/procfs/%s/debug'\n", + __func__, packet_procfs_path); + return -1; + } + return 0; +} + +static int +genl_cb_cleanup(void) +{ + genl_pkt_t *pkt; + + cancel_work_sync(&g_bcmgenl_packet_work.wq); + + while (!list_empty(&g_bcmgenl_packet_work.pkt_list)) { + pkt = list_entry(g_bcmgenl_packet_work.pkt_list.next, + genl_pkt_t, list); + list_del(&pkt->list); + dev_kfree_skb_any(pkt->skb); + kfree(pkt); + } + + return 0; +} + +static int +genl_cb_init(void) +{ + /* clear data structs */ + memset(&g_bcmgenl_packet_stats, 0, sizeof(bcmgenl_packet_stats_t)); + memset(&g_bcmgenl_packet_info, 0, sizeof(bcmgenl_info_t)); + memset(&g_bcmgenl_packet_work, 0, sizeof(bcmgenl_packet_work_t)); + + /* setup bcmgenl_packet_info struct */ + INIT_LIST_HEAD(&g_bcmgenl_packet_info.netif_list); + spin_lock_init(&g_bcmgenl_packet_info.lock); + + /* setup generic work queue */ + spin_lock_init(&g_bcmgenl_packet_work.lock); + INIT_LIST_HEAD(&g_bcmgenl_packet_work.pkt_list); + INIT_WORK(&g_bcmgenl_packet_work.wq, bcmgenl_packet_task); + + /* get net namespace */ + g_bcmgenl_packet_info.netns = get_net_ns_by_pid(current->pid); + if (!g_bcmgenl_packet_info.netns) { + GENL_DBG_WARN("%s: Could not get network namespace for pid %d\n", + __func__, current->pid); + return (-1); + } + GENL_DBG_VERB + ("%s: current->pid %d, netns 0x%p\n", + __func__, current->pid, g_bcmgenl_packet_info.netns); + return 0; +} + +int bcmgenl_packet_cleanup(void) +{ + ngknet_netif_create_cb_unregister(bcmgenl_packet_netif_create_cb); + ngknet_netif_destroy_cb_unregister(bcmgenl_packet_netif_destroy_cb); + ngknet_filter_cb_unregister(bcmgenl_packet_filter_cb); + genl_cb_cleanup(); + genl_cb_proc_cleanup(); + return 0; +} + +int bcmgenl_packet_init(void) +{ + ngknet_netif_create_cb_register(bcmgenl_packet_netif_create_cb); + ngknet_netif_destroy_cb_register(bcmgenl_packet_netif_destroy_cb); + ngknet_filter_cb_register_by_name + (bcmgenl_packet_filter_cb, BCMGENL_PACKET_NAME); + + genl_cb_proc_init(); + return genl_cb_init(); +} + +EXPORT_SYMBOL(bcmgenl_packet_cleanup); +EXPORT_SYMBOL(bcmgenl_packet_init); +#endif diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h new file mode 100644 index 000000000000..b403ca40c545 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h @@ -0,0 +1,29 @@ +/*! \file bcmgenl_packet.h + * + * BCMGENL packet module. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMGENL_PACKET_H +#define BCMGENL_PACKET_H + +extern int bcmgenl_packet_init(void); +extern int bcmgenl_packet_cleanup(void); + +#endif /* BCMGENL_PACKET_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c new file mode 100644 index 000000000000..90060e69d821 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c @@ -0,0 +1,1125 @@ +/*! \file bcmgenl_psample.c + * + * BCMGENL psample callback module. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include + +#include +#include +#include +#include +#include + +/*! \cond */ +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("BCMGENL Module"); +MODULE_LICENSE("GPL"); +/*! \endcond */ + +#include +#include +#if BCMGENL_PSAMPLE_SUPPORT + +#include +#define BCMGENL_PSAMPLE_NAME PSAMPLE_GENL_NAME + +#ifdef GENL_DEBUG +static int debug; +#endif /* GENL_DEBUG */ + +#define FCS_SZ 4 + +#define PSAMPLE_PKT_HANDLED (1) +/* These below need to match incoming enum values */ +#define PSAMPLE_FILTER_TAG_STRIP 0 +#define PSAMPLE_FILTER_TAG_KEEP 1 +#define PSAMPLE_FILTER_TAG_ORIGINAL 2 +#define PSAMPLE_RATE_DFLT 1 +#define PSAMPLE_SIZE_DFLT 128 + +static int psample_size = PSAMPLE_SIZE_DFLT; +MODULE_PARAM(psample_size, int, 0); +MODULE_PARM_DESC(psample_size, +"psample pkt size (default 128 bytes)"); + +#define BCMGENL_PSAMPLE_QLEN_DFLT 1024 +static int bcmgenl_psample_qlen = BCMGENL_PSAMPLE_QLEN_DFLT; +MODULE_PARAM(bcmgenl_psample_qlen, int, 0); +MODULE_PARM_DESC(bcmgenl_psample_qlen, "psample queue length (default 1024 buffers)"); + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) +static inline void +bcmgenl_sample_packet(struct psample_group *group, struct sk_buff *skb, + u32 trunc_size, int in_ifindex, int out_ifindex, + u32 sample_rate) +{ + struct psample_metadata md = {}; + + md.trunc_size = trunc_size; + md.in_ifindex = in_ifindex; + md.out_ifindex = out_ifindex; + psample_sample_packet(group, skb, sample_rate, &md); +} +#else +#define bcmgenl_sample_packet psample_sample_packet +#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) */ + +static bcmgenl_info_t g_bcmgenl_psample_info = {{0}}; + +/* Maintain sampled pkt statistics */ +typedef struct psample_stats_s { + unsigned long pkts_f_psample_cb; + unsigned long pkts_f_psample_mod; + unsigned long pkts_f_handled; + unsigned long pkts_f_pass_through; + unsigned long pkts_f_tag_checked; + unsigned long pkts_f_tag_stripped; + unsigned long pkts_f_dst_mc; + unsigned long pkts_f_dst_cpu; + unsigned long pkts_c_qlen_cur; + unsigned long pkts_c_qlen_hi; + unsigned long pkts_d_qlen_max; + unsigned long pkts_d_no_mem; + unsigned long pkts_d_no_group; + unsigned long pkts_d_sampling_disabled; + unsigned long pkts_d_not_ready; + unsigned long pkts_d_metadata; + unsigned long pkts_d_skb; + unsigned long pkts_d_skb_cbd; + unsigned long pkts_d_meta_srcport; + unsigned long pkts_d_meta_dstport; + unsigned long pkts_d_invalid_size; + unsigned long pkts_d_psample_only; +} bcmgenl_psample_stats_t; +static bcmgenl_psample_stats_t g_bcmgenl_psample_stats = {0}; + +typedef struct psample_meta_s { + int trunc_size; + int src_ifindex; + int dst_ifindex; + int sample_rate; + int sample_type; +} psample_meta_t; + +typedef struct psample_pkt_s { + struct list_head list; + psample_meta_t meta; + struct sk_buff *skb; + struct psample_group *group; +} psample_pkt_t; + +typedef struct bcmgenl_psample_work_s { + struct list_head pkt_list; + struct work_struct wq; + spinlock_t lock; +} bcmgenl_psample_work_t; +static bcmgenl_psample_work_t g_bcmgenl_psample_work = {{0}}; + +/* driver proc entry root */ +static struct proc_dir_entry *psample_proc_root = NULL; + +static bcmgenl_netif_t * +psample_netif_lookup_by_ifindex(int ifindex) __attribute__ ((unused)); +static bcmgenl_netif_t * +psample_netif_lookup_by_ifindex(int ifindex) +{ + struct list_head *list; + bcmgenl_netif_t *bcmgenl_netif = NULL; + unsigned long flags; + + /* look for ifindex from list of available net_devices */ + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + bcmgenl_netif = (bcmgenl_netif_t*)list; + if (bcmgenl_netif->dev->ifindex == ifindex) { + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + return bcmgenl_netif; + } + } + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + return (NULL); +} + +static bcmgenl_netif_t * +psample_netif_lookup_by_port(int port) +{ + struct list_head *list; + bcmgenl_netif_t *bcmgenl_netif = NULL; + unsigned long flags; + + /* look for port from list of available net_devices */ + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + bcmgenl_netif = (bcmgenl_netif_t*)list; + if (bcmgenl_netif->port == port) { + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + return bcmgenl_netif; + } + } + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + return (NULL); +} + +static int +bcmgenl_psample_meta_get(struct sk_buff *skb, bcmgenl_pkt_t *bcmgenl_pkt, psample_meta_t *sflow_meta) +{ + int srcport, dstport, dstport_type; + int src_ifindex = 0, dst_ifindex = 0; + int sample_rate = 1; + int sample_size = PSAMPLE_SIZE_DFLT; + bcmgenl_netif_t *psample_netif = NULL; + const struct ngknet_callback_desc *cbd; + + if (!skb || !sflow_meta) { + printk("%s: skb or sflow_meta is NULL\n", __func__); + return (-1); + } + cbd = NGKNET_SKB_CB(skb); + + /* get src and dst ports */ + srcport = bcmgenl_pkt->meta.src_port; + dstport = bcmgenl_pkt->meta.dst_port; + dstport_type = bcmgenl_pkt->meta.dst_port_type; + if ((srcport == -1) || (dstport == -1)) { + GENL_DBG_WARN("%s: invalid srcport %d or dstport %d\n", __func__, srcport, dstport); + return (-1); + } + + /* find src port netif */ + if ((psample_netif = psample_netif_lookup_by_port(srcport))) { + src_ifindex = psample_netif->dev->ifindex; + sample_rate = psample_netif->sample_rate; + sample_size = psample_netif->sample_size; + } else { + g_bcmgenl_psample_stats.pkts_d_meta_srcport++; + GENL_DBG_VERB("%s: could not find psample netif for src dev %s (ifidx %d)\n", + __func__, cbd->net_dev->name, src_ifindex); + } + + /* + * Identify these packets uniquely. + * 1) Packet forwarded over front panel port = dst_ifindex + * 2) Packet dropped in forwarding and sampled = 0xffff + * 3) else CPU destination = 0 + */ + + /* set generic dst type for MC pkts */ + if (dstport_type == DSTPORT_TYPE_MC) { + g_bcmgenl_psample_stats.pkts_f_dst_mc++; + } else if ((dstport != 0) && + (psample_netif = psample_netif_lookup_by_port(dstport))) { + /* find dst port netif for UC pkts (no need to lookup CPU port) */ + dst_ifindex = psample_netif->dev->ifindex; + } else if (bcmgenl_pkt->meta.sample_type != SAMPLE_TYPE_NONE) { + dst_ifindex = 0xffff; + g_bcmgenl_psample_stats.pkts_d_psample_only++; + } else if (dstport == 0) { + dst_ifindex = 0; + g_bcmgenl_psample_stats.pkts_f_dst_cpu++; + } else { + g_bcmgenl_psample_stats.pkts_d_meta_dstport++; + GENL_DBG_VERB("%s: could not find dstport(%d)\n", __func__, dstport); + } + GENL_DBG_VERB + ("Sample type %s", + (bcmgenl_pkt->meta.sample_type == SAMPLE_TYPE_NONE ? "Not sampled" : + bcmgenl_pkt->meta.sample_type == SAMPLE_TYPE_INGRESS ? + "Ingress sampled" : "Egress sampled")); + GENL_DBG_VERB + ("%s: srcport %d, dstport %d, src_ifindex %d, dst_ifindex %d\n", + __func__, srcport, dstport, src_ifindex, dst_ifindex); + + memset(sflow_meta, 0, sizeof(psample_meta_t)); + sflow_meta->src_ifindex = src_ifindex; + sflow_meta->dst_ifindex = dst_ifindex; + sflow_meta->trunc_size = sample_size; + sflow_meta->sample_rate = sample_rate; + sflow_meta->sample_type = bcmgenl_pkt->meta.sample_type; + return (0); +} + +static struct sk_buff * +bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt) +{ + int rv = 0, dev_no, pkt_len; + const struct ngknet_callback_desc *cbd = NULL; + ngknet_filter_t *match_filt = NULL; + psample_meta_t meta; + bcmgenl_pkt_t bcmgenl_pkt; + bool strip_tag = false; + static uint32_t last_drop, last_alloc, last_skb; + uint8_t *pkt; + struct psample_group *group; + + if (!skb) { + GENL_DBG_WARN("%s: skb is NULL\n", __func__); + g_bcmgenl_psample_stats.pkts_d_skb++; + return (NULL); + } + cbd = NGKNET_SKB_CB(skb); + match_filt = cbd->filt; + + if (!cbd || !match_filt) { + GENL_DBG_WARN("%s: cbd(0x%p) or match_filt(0x%p) is NULL\n", + __func__, cbd, match_filt); + g_bcmgenl_psample_stats.pkts_d_skb_cbd++; + return (skb); + } + + /* check if this packet is sampled packet (from sample filter) */ + if (!match_filt || + (match_filt->dest_type != NGKNET_FILTER_DEST_T_CB) || + (strncmp(match_filt->desc, BCMGENL_PSAMPLE_NAME, NGKNET_FILTER_DESC_MAX) != 0)) { + return (skb); + } + dev_no = cbd->dinfo->dev_no; + pkt = cbd->pmd + cbd->pmd_len; + pkt_len = cbd->pkt_len; + + GENL_DBG_VERB + ("pkt size %d, match_filt->dest_id %d\n", + pkt_len, match_filt->dest_id); + GENL_DBG_VERB + ("filter user data: 0x%08x\n", *(uint32_t *)match_filt->user_data); + GENL_DBG_VERB + ("filter_cb for dev %d: %s\n", dev_no, cbd->dinfo->type_str); + g_bcmgenl_psample_stats.pkts_f_psample_cb++; + + /* Adjust original pkt_len to remove 4B FCS */ + if (pkt_len < FCS_SZ) { + g_bcmgenl_psample_stats.pkts_d_invalid_size++; + goto PSAMPLE_FILTER_CB_PKT_HANDLED; + } else { + pkt_len -= FCS_SZ; + } + + /* get psample group info. psample genetlink group ID passed in match_filt->dest_id */ + group = psample_group_get(g_bcmgenl_psample_info.netns, match_filt->dest_id); + if (!group) { + printk("%s: Could not find psample genetlink group %d\n", __func__, match_filt->dest_id); + g_bcmgenl_psample_stats.pkts_d_no_group++; + goto PSAMPLE_FILTER_CB_PKT_HANDLED; + } + /* get packet metadata */ + rv = bcmgenl_pkt_package(dev_no, skb, + &g_bcmgenl_psample_info, + &bcmgenl_pkt); + if (rv < 0) { + GENL_DBG_WARN("%s: Could not parse pkt metadata\n", __func__); + g_bcmgenl_psample_stats.pkts_d_metadata++; + goto PSAMPLE_FILTER_CB_PKT_HANDLED; + } + + GENL_DBG_VERB + ("%s: netns 0x%p, src_port %d, dst_port %d, dst_port_type %x\n", + __func__, + bcmgenl_pkt.netns, + bcmgenl_pkt.meta.src_port, + bcmgenl_pkt.meta.dst_port, + bcmgenl_pkt.meta.dst_port_type); + + /* get psample metadata */ + rv = bcmgenl_psample_meta_get(skb, &bcmgenl_pkt, &meta); + if (rv < 0) { + GENL_DBG_WARN("%s: Could not parse pkt metadata\n", __func__); + g_bcmgenl_psample_stats.pkts_d_metadata++; + goto PSAMPLE_FILTER_CB_PKT_HANDLED; + } + + if (pkt_len >= 16) { + uint16_t proto = bcmgenl_pkt.meta.proto; + uint16_t vlan = bcmgenl_pkt.meta.vlan; + strip_tag = (vlan == 0xFFF) && + ((proto == 0x8100) || (proto == 0x88a8) || + (proto == 0x9100)); + if (SAMPLE_TYPE_NONE != bcmgenl_pkt.meta.sample_type && + ((proto == 0x8100) || (proto == 0x88a8) || (proto == 0x9100))) { + if (PSAMPLE_FILTER_TAG_ORIGINAL == cbd->filt->user_data[0]) { + if (bcmgenl_pkt.meta.tag_status < 0) { + g_bcmgenl_psample_stats.pkts_f_tag_checked++; + } else if (bcmgenl_pkt.meta.tag_status < 2){ + strip_tag = 1; + } + } else if (PSAMPLE_FILTER_TAG_STRIP == cbd->filt->user_data[0]) { + strip_tag = 1; + } + } + if (strip_tag) { + pkt_len -= 4; + } + g_bcmgenl_psample_stats.pkts_f_tag_checked++; + } + + /* Account for padding in libnl used by psample */ + if (meta.trunc_size >= pkt_len) { + meta.trunc_size = pkt_len; + } + GENL_DBG_VERB + ("%s: trunc_size %d, sample_rate %d " + "src_ifindex %d, dst_ifindex %d\n", + __func__, meta.trunc_size, meta.sample_rate, + meta.src_ifindex, meta.dst_ifindex); + GENL_DBG_VERB + ("%s: group 0x%x\n", __func__, group->group_num); + + /* drop if configured sample rate is 0 */ + if (meta.sample_rate > 0) { + unsigned long flags; + psample_pkt_t *psample_pkt; + struct sk_buff *skb_psample; + + if (g_bcmgenl_psample_stats.pkts_c_qlen_cur >= bcmgenl_psample_qlen) { + g_bcmgenl_psample_stats.pkts_d_qlen_max++; + last_drop = 0; + bcmgenl_limited_gprintk + (last_drop, "%s: tail drop due to max qlen %d reached: %lu\n", + __func__, bcmgenl_psample_qlen, + g_bcmgenl_psample_stats.pkts_d_qlen_max); + goto PSAMPLE_FILTER_CB_PKT_HANDLED; + } + + if ((psample_pkt = kmalloc(sizeof(psample_pkt_t), GFP_ATOMIC)) == NULL) { + g_bcmgenl_psample_stats.pkts_d_no_mem++; + last_alloc = 0; + bcmgenl_limited_gprintk + (last_alloc, "%s: failed to alloc generic mem for pkt: %lu\n", + __func__, g_bcmgenl_psample_stats.pkts_d_no_mem); + goto PSAMPLE_FILTER_CB_PKT_HANDLED; + } + + /* psample_pkt start */ + memcpy(&psample_pkt->meta, &meta, sizeof(psample_meta_t)); + psample_pkt->group = group; + if ((skb_psample = dev_alloc_skb(meta.trunc_size)) == NULL) { + g_bcmgenl_psample_stats.pkts_d_no_mem++; + last_skb = 0; + bcmgenl_limited_gprintk + (last_skb, "%s: failed to alloc generic mem for pkt skb: %lu\n", + __func__, g_bcmgenl_psample_stats.pkts_d_no_mem); + goto PSAMPLE_FILTER_CB_PKT_HANDLED; + } + + /* setup skb to point to pkt */ + if (strip_tag) { + memcpy(skb_psample->data, pkt, 12); + memcpy(skb_psample->data + 12, pkt + 16, meta.trunc_size - 12); + g_bcmgenl_psample_stats.pkts_f_tag_stripped++; + } else { + memcpy(skb_psample->data, pkt, meta.trunc_size); + } + skb_put(skb_psample, meta.trunc_size); + skb_psample->len = pkt_len; + psample_pkt->skb = skb_psample; + if (debug & GENL_DBG_LVL_PDMP) { + dump_skb(skb_psample); + } + /* psample_pkt end */ + + spin_lock_irqsave(&g_bcmgenl_psample_work.lock, flags); + list_add_tail(&psample_pkt->list, &g_bcmgenl_psample_work.pkt_list); + + g_bcmgenl_psample_stats.pkts_c_qlen_cur++; + if (g_bcmgenl_psample_stats.pkts_c_qlen_cur > g_bcmgenl_psample_stats.pkts_c_qlen_hi) { + g_bcmgenl_psample_stats.pkts_c_qlen_hi = g_bcmgenl_psample_stats.pkts_c_qlen_cur; + } + + schedule_work(&g_bcmgenl_psample_work.wq); + spin_unlock_irqrestore(&g_bcmgenl_psample_work.lock, flags); + } else { + g_bcmgenl_psample_stats.pkts_d_sampling_disabled++; + } + +PSAMPLE_FILTER_CB_PKT_HANDLED: + if (bcmgenl_pkt.meta.sample_type != SAMPLE_TYPE_NONE) { + g_bcmgenl_psample_stats.pkts_f_handled++; + /* Not sending to network protocol stack */ + dev_kfree_skb_any(skb); + skb = NULL; + } else { + g_bcmgenl_psample_stats.pkts_f_pass_through++; + } + return skb; +} + +static void +bcmgenl_psample_task(struct work_struct *work) +{ + bcmgenl_psample_work_t *psample_work = + container_of(work, bcmgenl_psample_work_t, wq); + unsigned long flags; + struct list_head *list_ptr, *list_next; + psample_pkt_t *pkt; + + spin_lock_irqsave(&psample_work->lock, flags); + list_for_each_safe(list_ptr, list_next, &psample_work->pkt_list) { + /* dequeue pkt from list */ + pkt = list_entry(list_ptr, psample_pkt_t, list); + list_del(list_ptr); + g_bcmgenl_psample_stats.pkts_c_qlen_cur--; + spin_unlock_irqrestore(&psample_work->lock, flags); + + /* send generic_pkt to generic netlink */ + if (pkt) { + GENL_DBG_VERB + ("%s: trunc_size %d, sample_rate %d," + "src_ifindex %d, dst_ifindex %d\n", + __func__, pkt->meta.trunc_size, pkt->meta.sample_rate, + pkt->meta.src_ifindex, pkt->meta.dst_ifindex); + GENL_DBG_VERB + ("%s: group 0x%x\n", __func__, pkt->group->group_num); + bcmgenl_sample_packet(pkt->group, + pkt->skb, + pkt->meta.trunc_size, + pkt->meta.src_ifindex, + pkt->meta.dst_ifindex, + pkt->meta.sample_rate); + g_bcmgenl_psample_stats.pkts_f_psample_mod++; + + dev_kfree_skb_any(pkt->skb); + kfree(pkt); + } + spin_lock_irqsave(&psample_work->lock, flags); + } + spin_unlock_irqrestore(&psample_work->lock, flags); +} + +static int +bcmgenl_psample_netif_create_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif) +{ + bool found; + struct list_head *list; + bcmgenl_netif_t *new_netif, *lbcmgenl_netif; + unsigned long flags; + + if (!dinfo) { + GENL_DBG_WARN("%s: dinfo is NULL\n", __func__); + return (-1); + } + if (netif->id == 0) { + GENL_DBG_WARN("%s: netif->id == 0 is not a valid interface ID\n", __func__); + return (-1); + } + if ((new_netif = kmalloc(sizeof(bcmgenl_netif_t), GFP_ATOMIC)) == NULL) { + GENL_DBG_WARN("%s: failed to alloc psample mem for netif '%s'\n", + __func__, netif->name); + return (-1); + } + + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + new_netif->dev = dinfo->vdev[netif->id]; + new_netif->id = netif->id; + new_netif->port = netif->port; + new_netif->vlan = netif->vlan; + new_netif->sample_rate = PSAMPLE_RATE_DFLT; + new_netif->sample_size = PSAMPLE_SIZE_DFLT; + + /* insert netif sorted by ID similar to ngknet_netif_create() */ + found = false; + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + lbcmgenl_netif = (bcmgenl_netif_t*)list; + if (netif->id < lbcmgenl_netif->id) { + found = true; + break; + } + } + + if (found) { + /* Replace previously removed interface */ + list_add_tail(&new_netif->list, &lbcmgenl_netif->list); + } else { + /* No holes - add to end of list */ + list_add_tail(&new_netif->list, &g_bcmgenl_psample_info.netif_list); + } + g_bcmgenl_psample_info.netif_count++; + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + + GENL_DBG_VERB + ("%s: added netlink psample netif '%s'\n", __func__, netif->name); + return (0); +} + +static int +bcmgenl_psample_netif_destroy_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif) +{ + bool found = false; + struct list_head *list; + bcmgenl_netif_t *lbcmgenl_netif; + unsigned long flags; + + if (!dinfo || !netif) { + GENL_DBG_WARN("%s: dinfo or netif is NULL\n", __func__); + return (-1); + } + if (g_bcmgenl_psample_info.netif_count == 0) { + GENL_DBG_WARN("%s: no netif is created\n", __func__); + return (0); + } + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + lbcmgenl_netif = (bcmgenl_netif_t *)list; + if (netif->id == lbcmgenl_netif->id) { + found = true; + list_del(&lbcmgenl_netif->list); + GENL_DBG_VERB + ("%s: removing psample netif '%s'\n", __func__, netif->name); + kfree(lbcmgenl_netif); + g_bcmgenl_psample_info.netif_count--; + break; + } + } + + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + + if (!found) { + GENL_DBG_WARN("%s: netif ID %d not found!\n", __func__, netif->id); + return (-1); + } + return (0); +} + +/* + * psample rate Proc Read Entry + */ +static int +bcmgenl_psample_proc_rate_show(struct seq_file *m, void *v) +{ + struct list_head *list; + bcmgenl_netif_t *psample_netif; + unsigned long flags; + + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + psample_netif = (bcmgenl_netif_t*)list; + seq_printf(m, " %-14s %d\n", psample_netif->dev->name, psample_netif->sample_rate); + } + + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + + return 0; +} + +static int +bcmgenl_psample_proc_rate_open(struct inode * inode, struct file * file) +{ + return single_open(file, bcmgenl_psample_proc_rate_show, NULL); +} + +/* + * psample rate Proc Write Entry + * + * Syntax: + * = + * + * Where is a virtual network interface name. + * + * Examples: + * eth4=1000 + */ +static ssize_t +bcmgenl_psample_proc_rate_write( + struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + bool found; + struct list_head *list; + bcmgenl_netif_t *psample_netif; + char sample_str[40], *ptr, *newline; + unsigned long flags; + + + if (count > sizeof(sample_str)) { + count = sizeof(sample_str) - 1; + sample_str[count] = '\0'; + } + if (copy_from_user(sample_str, buf, count)) { + return -EFAULT; + } + sample_str[count] = 0; + newline = strchr(sample_str, '\n'); + if (newline) { + /* Chop off the trailing newline */ + *newline = '\0'; + } + + if ((ptr = strchr(sample_str, '=')) == NULL && + (ptr = strchr(sample_str, ':')) == NULL) { + printk("Error: Pkt sample rate syntax not recognized: '%s'\n", + sample_str); + return count; + } + *ptr++ = 0; + + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + + found = false; + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + psample_netif = (bcmgenl_netif_t*)list; + if (strcmp(psample_netif->dev->name, sample_str) == 0) { + psample_netif->sample_rate = simple_strtol(ptr, NULL, 10); + found = true; + break; + } + } + + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + + if (!found) { + printk("Warning: Failed setting psample rate on unknown network" + "interface: '%s'\n", sample_str); + } + return count; +} + +struct proc_ops bcmgenl_psample_proc_rate_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bcmgenl_psample_proc_rate_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = bcmgenl_psample_proc_rate_write, + .proc_release = single_release, +}; + +/* + * psample size Proc Read Entry + */ +static int +bcmgenl_psample_proc_size_show(struct seq_file *m, void *v) +{ + struct list_head *list; + bcmgenl_netif_t *psample_netif; + unsigned long flags; + + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + psample_netif = (bcmgenl_netif_t*)list; + seq_printf(m, " %-14s %d\n", psample_netif->dev->name, psample_netif->sample_size); + } + + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + return 0; +} + +static int +bcmgenl_psample_proc_size_open(struct inode * inode, struct file * file) +{ + return single_open(file, bcmgenl_psample_proc_size_show, NULL); +} + +/* + * psample size Proc Write Entry + * + * Syntax: + * = + * + * Where is a virtual network interface name. + * + * Examples: + * eth4=128 + */ +static ssize_t +bcmgenl_psample_proc_size_write( + struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + bool found; + struct list_head *list; + bcmgenl_netif_t *bcmgenl_netif; + char sample_str[40], *ptr, *newline; + unsigned long flags; + + if (count > sizeof(sample_str)) { + count = sizeof(sample_str) - 1; + sample_str[count] = '\0'; + } + if (copy_from_user(sample_str, buf, count)) { + return -EFAULT; + } + sample_str[count] = 0; + newline = strchr(sample_str, '\n'); + if (newline) { + /* Chop off the trailing newline */ + *newline = '\0'; + } + + if ((ptr = strchr(sample_str, '=')) == NULL && + (ptr = strchr(sample_str, ':')) == NULL) { + printk("Error: Pkt sample size syntax not recognized: '%s'\n", sample_str); + return count; + } + *ptr++ = 0; + + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + + found = false; + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + bcmgenl_netif = (bcmgenl_netif_t*)list; + if (strcmp(bcmgenl_netif->dev->name, sample_str) == 0) { + bcmgenl_netif->sample_size = simple_strtol(ptr, NULL, 10); + found = true; + break; + } + } + + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + + if (!found) { + printk("Warning: Failed setting psample size on unknown network interface: '%s'\n", sample_str); + } + return count; +} + +struct proc_ops bcmgenl_psample_proc_size_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bcmgenl_psample_proc_size_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = bcmgenl_psample_proc_size_write, + .proc_release = single_release, +}; + +/* + * psample map Proc Read Entry + */ +static int +bcmgenl_psample_proc_map_show(struct seq_file *m, void *v) +{ + struct list_head *list; + bcmgenl_netif_t *bcmgenl_netif; + unsigned long flags; + + seq_printf(m, " Interface logical port ifindex\n"); + seq_printf(m, "------------- ------------ -------\n"); + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + bcmgenl_netif = (bcmgenl_netif_t*)list; + seq_printf(m, " %-14s %-14d %d\n", + bcmgenl_netif->dev->name, + bcmgenl_netif->port, + bcmgenl_netif->dev->ifindex); + } + + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + return 0; +} + +static int +bcmgenl_psample_proc_map_open(struct inode * inode, struct file * file) +{ + return single_open(file, bcmgenl_psample_proc_map_show, NULL); +} + +struct proc_ops bcmgenl_psample_proc_map_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bcmgenl_psample_proc_map_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = NULL, + .proc_release = single_release, +}; + +/* + * psample debug Proc Read Entry + */ +static int +bcmgenl_psample_proc_debug_show(struct seq_file *m, void *v) +{ + seq_printf(m, "BCM KNET %s Callback Config\n", BCMGENL_PSAMPLE_NAME); + seq_printf(m, " debug: 0x%x\n", debug); + seq_printf(m, " netif_count: %d\n", g_bcmgenl_psample_info.netif_count); + seq_printf(m, " queue length: %d\n", bcmgenl_psample_qlen); + + return 0; +} + +static int +bcmgenl_psample_proc_debug_open(struct inode * inode, struct file * file) +{ + return single_open(file, bcmgenl_psample_proc_debug_show, NULL); +} + +/* + * psample debug Proc Write Entry + * + * Syntax: + * debug= + * + * Where corresponds to the debug module parameter. + * + * Examples: + * debug=0x1 + */ +static ssize_t +bcmgenl_psample_proc_debug_write( + struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + char debug_str[40]; + char *ptr; + + if (count > sizeof(debug_str)) { + count = sizeof(debug_str) - 1; + debug_str[count] = '\0'; + } + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + if ((ptr = strstr(debug_str, "debug=")) != NULL) { + ptr += 6; + debug = simple_strtol(ptr, NULL, 0); + } else { + GENL_DBG_WARN("Warning: unknown configuration setting\n"); + } + + return count; +} + +struct proc_ops bcmgenl_psample_proc_debug_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bcmgenl_psample_proc_debug_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = bcmgenl_psample_proc_debug_write, + .proc_release = single_release, +}; + +static int +bcmgenl_psample_proc_stats_show(struct seq_file *m, void *v) +{ + seq_printf(m, "BCM KNET %s Callback Stats\n", BCMGENL_PSAMPLE_NAME); + seq_printf(m, " pkts filter psample cb %10lu\n", g_bcmgenl_psample_stats.pkts_f_psample_cb); + seq_printf(m, " pkts sent to psample module %10lu\n", g_bcmgenl_psample_stats.pkts_f_psample_mod); + seq_printf(m, " pkts handled by psample %10lu\n", g_bcmgenl_psample_stats.pkts_f_handled); + seq_printf(m, " pkts pass through %10lu\n", g_bcmgenl_psample_stats.pkts_f_pass_through); + seq_printf(m, " pkts with vlan tag checked %10lu\n", g_bcmgenl_psample_stats.pkts_f_tag_checked); + seq_printf(m, " pkts with vlan tag stripped %10lu\n", g_bcmgenl_psample_stats.pkts_f_tag_stripped); + seq_printf(m, " pkts with mc destination %10lu\n", g_bcmgenl_psample_stats.pkts_f_dst_mc); + seq_printf(m, " pkts current queue length %10lu\n", g_bcmgenl_psample_stats.pkts_c_qlen_cur); + seq_printf(m, " pkts high queue length %10lu\n", g_bcmgenl_psample_stats.pkts_c_qlen_hi); + seq_printf(m, " pkts drop max queue length %10lu\n", g_bcmgenl_psample_stats.pkts_d_qlen_max); + seq_printf(m, " pkts drop no memory %10lu\n", g_bcmgenl_psample_stats.pkts_d_no_mem); + seq_printf(m, " pkts drop no psample group %10lu\n", g_bcmgenl_psample_stats.pkts_d_no_group); + seq_printf(m, " pkts drop sampling disabled %10lu\n", g_bcmgenl_psample_stats.pkts_d_sampling_disabled); + seq_printf(m, " pkts drop psample not ready %10lu\n", g_bcmgenl_psample_stats.pkts_d_not_ready); + seq_printf(m, " pkts drop metadata parse error %10lu\n", g_bcmgenl_psample_stats.pkts_d_metadata); + seq_printf(m, " pkts drop skb error %10lu\n", g_bcmgenl_psample_stats.pkts_d_skb); + seq_printf(m, " pkts drop skb cbd error %10lu\n", g_bcmgenl_psample_stats.pkts_d_skb_cbd); + seq_printf(m, " pkts with invalid src port %10lu\n", g_bcmgenl_psample_stats.pkts_d_meta_srcport); + seq_printf(m, " pkts with invalid dst port %10lu\n", g_bcmgenl_psample_stats.pkts_d_meta_dstport); + seq_printf(m, " pkts with invalid orig pkt sz %10lu\n", g_bcmgenl_psample_stats.pkts_d_invalid_size); + seq_printf(m, " pkts with psample only reason %10lu\n", g_bcmgenl_psample_stats.pkts_d_psample_only); + return 0; +} + +static int +bcmgenl_psample_proc_stats_open(struct inode * inode, struct file * file) +{ + return single_open(file, bcmgenl_psample_proc_stats_show, NULL); +} + +/* + * psample stats Proc Write Entry + * + * Syntax: + * write any value to clear stats + */ +static ssize_t +bcmgenl_psample_proc_stats_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + int qlen_cur = 0; + unsigned long flags; + + spin_lock_irqsave(&g_bcmgenl_psample_work.lock, flags); + qlen_cur = g_bcmgenl_psample_stats.pkts_c_qlen_cur; + memset(&g_bcmgenl_psample_stats, 0, sizeof(bcmgenl_psample_stats_t)); + g_bcmgenl_psample_stats.pkts_c_qlen_cur = qlen_cur; + spin_unlock_irqrestore(&g_bcmgenl_psample_work.lock, flags); + + return count; +} +struct proc_ops bcmgenl_psample_proc_stats_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bcmgenl_psample_proc_stats_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = bcmgenl_psample_proc_stats_write, + .proc_release = single_release, +}; + +static int +psample_cb_proc_cleanup(void) +{ + remove_proc_entry("stats", psample_proc_root); + remove_proc_entry("rate", psample_proc_root); + remove_proc_entry("size", psample_proc_root); + remove_proc_entry("debug", psample_proc_root); + remove_proc_entry("map" , psample_proc_root); + + proc_remove(psample_proc_root); + return 0; +} + +static int +psample_cb_proc_init(void) +{ + char psample_procfs_path[PROCFS_MAX_PATH]; + struct proc_dir_entry *entry; + + /* create procfs for psample */ + snprintf(psample_procfs_path, PROCFS_MAX_PATH, "%s/%s", + BCMGENL_PROCFS_PATH, BCMGENL_PSAMPLE_NAME); + psample_proc_root = proc_mkdir(psample_procfs_path, NULL); + + /* create procfs for psample stats */ + PROC_CREATE(entry, "stats", 0666, psample_proc_root, + &bcmgenl_psample_proc_stats_file_ops); + if (entry == NULL) { + printk("%s: Unable to create procfs entry '/procfs/%s/stats'\n", + __func__, psample_procfs_path); + return -1; + } + + /* create procfs for setting sample rates */ + PROC_CREATE(entry, "rate", 0666, psample_proc_root, + &bcmgenl_psample_proc_rate_file_ops); + if (entry == NULL) { + printk("%s: Unable to create procfs entry '/procfs/%s/rate'\n", + __func__, psample_procfs_path); + return -1; + } + + /* create procfs for setting sample size */ + PROC_CREATE(entry, "size", 0666, psample_proc_root, + &bcmgenl_psample_proc_size_file_ops); + if (entry == NULL) { + printk("%s: Unable to create procfs entry '/procfs/%s/size'\n", + __func__, psample_procfs_path); + return -1; + } + + /* create procfs for getting netdev mapping */ + PROC_CREATE(entry, "map", 0666, psample_proc_root, + &bcmgenl_psample_proc_map_file_ops); + if (entry == NULL) { + printk("%s: Unable to create procfs entry '/procfs/%s/map'\n", + __func__, psample_procfs_path); + return -1; + } + + /* create procfs for debug log */ + PROC_CREATE(entry, "debug", 0666, psample_proc_root, + &bcmgenl_psample_proc_debug_file_ops); + if (entry == NULL) { + printk("%s: Unable to create procfs entry '/procfs/%s/debug'\n", + __func__, psample_procfs_path); + return -1; + } + return 0; +} + +static int +psample_cb_cleanup(void) +{ + psample_pkt_t *pkt; + + cancel_work_sync(&g_bcmgenl_psample_work.wq); + + while (!list_empty(&g_bcmgenl_psample_work.pkt_list)) { + pkt = list_entry(g_bcmgenl_psample_work.pkt_list.next, + psample_pkt_t, list); + list_del(&pkt->list); + dev_kfree_skb_any(pkt->skb); + kfree(pkt); + } + + return 0; +} + +static int +psample_cb_init(void) +{ + /* clear data structs */ + memset(&g_bcmgenl_psample_stats, 0, sizeof(bcmgenl_psample_stats_t)); + memset(&g_bcmgenl_psample_info, 0, sizeof(bcmgenl_info_t)); + memset(&g_bcmgenl_psample_work, 0, sizeof(bcmgenl_psample_work_t)); + + /* setup psample_info struct */ + INIT_LIST_HEAD(&g_bcmgenl_psample_info.netif_list); + spin_lock_init(&g_bcmgenl_psample_info.lock); + + /* setup psample work queue */ + spin_lock_init(&g_bcmgenl_psample_work.lock); + INIT_LIST_HEAD(&g_bcmgenl_psample_work.pkt_list); + INIT_WORK(&g_bcmgenl_psample_work.wq, bcmgenl_psample_task); + + /* get net namespace */ + g_bcmgenl_psample_info.netns = get_net_ns_by_pid(current->pid); + if (!g_bcmgenl_psample_info.netns) { + GENL_DBG_WARN("%s: Could not get network namespace for pid %d\n", + __func__, current->pid); + return (-1); + } + GENL_DBG_VERB + ("%s: current->pid %d, netns 0x%p, sample_size %d\n", + __func__, current->pid, g_bcmgenl_psample_info.netns, psample_size); + return 0; +} + +int bcmgenl_psample_cleanup(void) +{ + ngknet_netif_create_cb_unregister(bcmgenl_psample_netif_create_cb); + ngknet_netif_destroy_cb_unregister(bcmgenl_psample_netif_destroy_cb); + ngknet_filter_cb_unregister(bcmgenl_psample_filter_cb); + + psample_cb_cleanup(); + psample_cb_proc_cleanup(); + return 0; +} + +int bcmgenl_psample_init(void) +{ + ngknet_netif_create_cb_register(bcmgenl_psample_netif_create_cb); + ngknet_netif_destroy_cb_register(bcmgenl_psample_netif_destroy_cb); + ngknet_filter_cb_register_by_name + (bcmgenl_psample_filter_cb, BCMGENL_PSAMPLE_NAME); + psample_cb_proc_init(); + return psample_cb_init(); +} +#else +int bcmgenl_psample_cleanup(void) +{ + return 0; +} + +int bcmgenl_psample_init(void) +{ + return 0; +} +#endif /* BCMGENL_PSAMPLE_SUPPORT */ +EXPORT_SYMBOL(bcmgenl_psample_cleanup); +EXPORT_SYMBOL(bcmgenl_psample_init); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h new file mode 100644 index 000000000000..43f8ba9ae9a1 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h @@ -0,0 +1,35 @@ +/*! \file bcmgenl_psample.h + * + * BCMGENL psample module. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMGENL_PSAMPLE_H +#define BCMGENL_PSAMPLE_H + +#include + +#ifndef BCMGENL_PSAMPLE_SUPPORT +#define BCMGENL_PSAMPLE_SUPPORT (IS_ENABLED(CONFIG_PSAMPLE)) +#endif /* BCMGENL_PSAMPLE_SUPPORT */ + +extern int bcmgenl_psample_init(void); +extern int bcmgenl_psample_cleanup(void); + +#endif /* BCMGENL_PSAMPLE_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild index 7b444f5097f4..a566a8837897 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild @@ -6,7 +6,7 @@ # builds of the NGBDE kernel module, for example, using a different # default DMA pool size or turning off MSI interrupts. # -# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. +# Copyright 2018-2024 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or @@ -19,12 +19,13 @@ # GNU General Public License for more details. # # A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder.$ +# be found in the LICENSES folder. # obj-m := linux_ngbde.o ccflags-y := $(LKM_CFLAGS) $(NGBDE_CFLAGS) \ + $(LKM_BUILD_INFO) \ -I$(SDK)/linux/include \ -I$(SDK)/linux/bde \ -I$(SDK)/bcmdrd/include diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile index f4401e62dc5e..8c60bc94caf9 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile @@ -1,5 +1,5 @@ # -# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. +# Copyright 2018-2024 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or @@ -12,7 +12,7 @@ # GNU General Public License for more details. # # A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder.$ +# be found in the LICENSES folder. # # Linux kernel BDE module. # diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h index 5d3339ad74ef..b4f18f7c2e03 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef NGBDE_H @@ -48,7 +48,7 @@ #define NGBDE_NUM_IRQ_REGS_MAX 16 /*! Maximum number of IRQ lines (MSI vectors) per device. */ -#define NGBDE_NUM_IRQS_MAX 1 +#define NGBDE_NUM_IRQS_MAX 16 /*! * Maximum number of interrupt controller registers which may be @@ -135,17 +135,26 @@ typedef struct ngbde_irq_reg_s { /*! Mask identifying the register bits owned by the kernel mode driver. */ uint32_t kmask; + /*! Mask identifying the register bits owned by the user mode driver. */ + uint32_t umask; + } ngbde_irq_reg_t; /*! - * \name Interrupt ACK register access flags. - * \anchor NGBDE_INTR_ACK_F_xxx + * \name Interrupt ACK register domains. + * \anchor NGBDE_INTR_ACK_IO_xxx */ /*! \{ */ -/*! ACK registers resides in PCI bridge I/O window. */ -#define NGBDE_INTR_ACK_F_PAXB (1 << 0) +/*! ACK registers reside in the default device I/O window. */ +#define NGBDE_INTR_ACK_IO_DEV 0 + +/*! ACK registers reside in the interrupt controller I/O window. */ +#define NGBDE_INTR_ACK_IO_INTR 1 + +/*! ACK registers reside in the PCI bridge I/O window. */ +#define NGBDE_INTR_ACK_IO_PAXB 2 /*! \} */ @@ -161,15 +170,18 @@ typedef struct ngbde_irq_reg_s { */ typedef struct ngbde_intr_ack_reg_s { - /*! Ack register offset. */ + /*! ACK register information is valid. */ + bool ack_valid; + + /*! ACK register domain (\ref NGBDE_INTR_ACK_IO_xxx). */ + uint32_t ack_domain; + + /*! ACK register offset. */ uint32_t ack_reg; - /*! Ack value. */ + /*! ACK value. */ uint32_t ack_val; - /*! Flags to indicate ack_reg resides in PCI bridge window. */ - uint32_t flags; - } ngbde_intr_ack_reg_t; /*! @@ -220,17 +232,17 @@ typedef struct ngbde_intr_ctrl_s { /*! Flag to wake up user mode interrupt thread. */ atomic_t run_user_thread; - /*! Primary interrupt handler. */ + /*! Optional interrupt handler. */ ngbde_isr_f isr_func; - /*! Context for primary interrupt handler. */ + /*! Context for optional kernel interrupt handler. */ void *isr_data; - /*! Secondary interrupt handler. */ - ngbde_isr_f isr2_func; + /*! Run kernel mode interrupt handler for this interrupt line. */ + bool run_kernel_isr; - /*! Context for secondary interrupt handler. */ - void *isr2_data; + /*! Run user mode interrupt handler for this interrupt line. */ + bool run_user_isr; } ngbde_intr_ctrl_t; @@ -317,6 +329,24 @@ typedef struct ngbde_dmapool_s { } ngbde_dmapool_t; +/*! + * \name MSI interrupt support. + * \anchor NGBDE_MSI_T_xxx + */ + +/*! \{ */ + +/*! Use legacy interrupts. */ +#define NGBDE_MSI_T_NONE 0 + +/*! Use MSI interrupts. */ +#define NGBDE_MSI_T_MSI 1 + +/*! Use MSI-X interrupts. */ +#define NGBDE_MSI_T_MSIX 2 + +/*! \} */ + /*! Switch device descriptor. */ struct ngbde_dev_s { @@ -341,7 +371,13 @@ struct ngbde_dev_s { /*! Interrupt line associated with this device. */ int irq_line; - /*! Use MSI interrupts with this device. */ + /*! Number of available interrupt lines (typically MSI vectors). */ + int irq_max; + + /*! Number of active interrupt lines (typically MSI vectors). */ + int active_irqs; + + /*! Use MSI interrupts with this device (\ref NGBDE_MSI_T_xxx). */ int use_msi; /*! Non-zero if device was removed. */ @@ -445,6 +481,39 @@ ngbde_dma_init(void); extern void ngbde_dma_cleanup(void); +/*! + * \brief Allocate interrupt lines. + * + * This function will update irq_max member in the device descriptor + * with the number of interrupt lines actually allocated. + * + * No action is taken if a kernel ISR is already active (e.g. after a + * warm-boot). + * + * \param [in] kdev Device number. + * \param [in] num_irq Number of interrupt lines wanted. + * + * \return Number of allocated interrupt lines or -1 if error. + */ +extern int +ngbde_intr_alloc(int kdev, unsigned int num_irq); + +/*! + * \brief Free interrupt lines. + * + * Free interrupt lines previously allocated via \ref + * ngbde_intr_alloc. + * + * No action is taken if a kernel ISR is still active. + * + * \param [in] kdev Device number. + * + * \retval 0 No errors + * \retval -1 Something went wrong. + */ +extern int +ngbde_intr_free(int kdev); + /*! * \brief Connect to hardware interrupt handler. * diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c index 6e15855034c0..92a5911b5b05 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include @@ -31,7 +31,7 @@ MODULE_PARM_DESC(dma_debug, /*! Default size of of DMA memory pools (in MB). */ #ifndef DMAPOOL_SIZE_DEFAULT -#define DMAPOOL_SIZE_DEFAULT 16 +#define DMAPOOL_SIZE_DEFAULT 32 #endif /*! Default number of DMA memory pools per device. */ @@ -41,7 +41,7 @@ MODULE_PARM_DESC(dma_debug, static int dma_size = DMAPOOL_SIZE_DEFAULT; module_param(dma_size, int, S_IRUSR); MODULE_PARM_DESC(dma_size, -"Size of of DMA memory pools in MB (default 16 MB)."); +"Size of of DMA memory pools in MB (default 32 MB)."); /*! \endcond */ /*! \cond */ @@ -244,7 +244,7 @@ ngbde_dmamem_free(ngbde_dmamem_t *dmamem) dmamem->size, DMA_BIDIRECTIONAL); } ngbde_pgmem_free(dmamem->vaddr); - memset(dmamem, 0, sizeof(*dmamem)); // nosemgrep + memset(dmamem, 0, sizeof(*dmamem)); break; case NGBDE_DMA_T_NONE: /* Nothing to free */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c index 99ced831e015..46f25974edf9 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c @@ -5,7 +5,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -18,7 +18,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c index 5d68fa92abe2..460a7228f68e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include @@ -29,6 +29,21 @@ MODULE_PARM_DESC(intr_debug, "Interrupt debug output enable (default 0)."); /*! \endcond */ +/*! + * \brief Shared register write. + * + * This function is used for writing to registers where the calling + * context only owns a subset of bits within the register. + * + * \param [in] sd Software device information. + * \param [in] ic Interrupt control information. + * \param [in] reg_offs Shared register address offset. + * \param [in] reg_val Shared register value. + * \param [in] shr_mask Register bits owned by this context. + * + * \retval 0 No errors. + * \retval -1 Unknown shared register. + */ static int ngbde_intr_shared_write32(struct ngbde_dev_s *sd, struct ngbde_intr_ctrl_s *ic, uint32_t reg_offs, uint32_t reg_val, uint32_t shr_mask) @@ -86,59 +101,65 @@ ngbde_user_isr(ngbde_intr_ctrl_t *ic) int idx; int active_interrupts = 0; uint32_t stat = 0, mask = 0; - uint32_t kmask; - /* Check if any enabled interrupts are active */ - for (idx = 0; idx < ic->num_regs; idx++) { - ngbde_irq_reg_t *ir = &ic->regs[idx]; + if (intr_debug >= 2) { + printk("INTR: Run user ISR (%d)\n", ic->irq_vect); + } - /* Get mask of all kernel interrupt sources for this register address */ - kmask = ir->kmask; + /* + * If this interrupt vector is shared between user mode and kernel + * mode, then we want to avoid invoking the user mode handler if + * only kernel mode interrupts are active. + */ + if (ic->run_kernel_isr) { + /* Check if any enabled user mode interrupts are active */ + for (idx = 0; idx < ic->num_regs; idx++) { + ngbde_irq_reg_t *ir = &ic->regs[idx]; - stat = NGBDE_IOREAD32(&ic->iomem[ir->status_reg]); - if (!ir->status_is_masked) { - /* Get enabled interrupts by applying mask register */ - mask = NGBDE_IOREAD32(&ic->iomem[ir->mask_reg]); - stat &= mask; - } - if (stat & ~kmask) { - active_interrupts = 1; - break; + stat = NGBDE_IOREAD32(&ic->iomem[ir->status_reg]); + if (!ir->status_is_masked) { + /* Get enabled interrupts by applying mask register */ + mask = NGBDE_IOREAD32(&ic->iomem[ir->mask_reg]); + stat &= mask; + } + if (stat & ir->umask) { + active_interrupts = 1; + break; + } } - } - /* No active interrupts to service */ - if (!active_interrupts) { - return 0; + /* No active user mode interrupts to service */ + if (!active_interrupts) { + return 0; + } } - /* Disable (mask off) all interrupts */ + /* Disable (mask off) all user mode interrupts */ for (idx = 0; idx < ic->num_regs; idx++) { ngbde_irq_reg_t *ir = &ic->regs[idx]; + struct ngbde_dev_s *sd; - /* Get mask of all kernel interrupt sources for this register address */ - kmask = ir->kmask; - - if (kmask == 0xffffffff) { + if (ir->umask == 0) { /* Kernel driver owns all interrupts in this register */ continue; } if (ir->mask_w1tc) { - /* Clear all interrupt bits which are not in kmask */ - NGBDE_IOWRITE32(~kmask, &ic->iomem[ir->mask_reg]); + /* Clear all interrupt mask bits owned by this user mode ISR */ + NGBDE_IOWRITE32(ir->umask, &ic->iomem[ir->mask_reg]); continue; } - if (kmask) { - /* Synchronized write */ - struct ngbde_dev_s *sd = ngbde_swdev_get(ic->kdev); - if (ngbde_intr_shared_write32(sd, ic, ir->mask_reg, 0, ~kmask) < 0) { - printk(KERN_WARNING - "%s: Failed to write shared register for device %d\n", - MOD_NAME, ic->kdev); - /* Fall back to normal write to ensure interrupts are masked */ - NGBDE_IOWRITE32(0, &ic->iomem[ir->mask_reg]); - } - } else { + if (ir->umask == 0xffffffff) { + /* Direct write when all bits are owned by this user mode ISR */ + NGBDE_IOWRITE32(0, &ic->iomem[ir->mask_reg]); + continue; + } + /* Synchronized write when some bits are owned by another ISR */ + sd = ngbde_swdev_get(ic->kdev); + if (ngbde_intr_shared_write32(sd, ic, ir->mask_reg, 0, ir->umask) < 0) { + printk(KERN_WARNING + "%s: Failed to write shared register for device %d\n", + MOD_NAME, ic->kdev); + /* Fall back to normal write to ensure interrupts are masked */ NGBDE_IOWRITE32(0, &ic->iomem[ir->mask_reg]); } } @@ -162,6 +183,10 @@ ngbde_user_isr(ngbde_intr_ctrl_t *ic) static int ngbde_kernel_isr(ngbde_intr_ctrl_t *ic) { + if (intr_debug >= 2) { + printk("INTR: Run kernel ISR (%d)\n", ic->irq_vect); + } + if (ic->isr_func) { return ic->isr_func(ic->isr_data); } @@ -169,28 +194,39 @@ ngbde_kernel_isr(ngbde_intr_ctrl_t *ic) } /*! - * \brief Interrupt handler for kernel driver. + * \brief Update interrupt dispatcher. * - * Typically used by the EDK driver. + * Check which interrupts handlers (kernel/user) should be invoked for + * this interrupt line. * * \param [in] ic Interrupt control information. * - * \retval 1 One or more kernel mode interrupts occurred. - * \retval 0 No kernel mode interrupts occurred. + * \retval 0 */ static int -ngbde_kernel_isr2(ngbde_intr_ctrl_t *ic) +ngbde_intr_dispatch_update(ngbde_intr_ctrl_t *ic) { - if (ic->isr2_func) { - return ic->isr2_func(ic->isr2_data); + struct ngbde_irq_reg_s *ir; + unsigned int idx; + uint32_t umask = 0; + uint32_t kmask = 0; + + for (idx = 0; idx < ic->num_regs; idx++) { + ir = &ic->regs[idx]; + umask |= ir->umask; + kmask |= ir->kmask; } + + ic->run_user_isr = (umask != 0); + ic->run_kernel_isr = (kmask != 0); + return 0; } /*! - * \brief Acknowledge interrupt + * \brief Acknowledge interrupt. * - * \param [in] data Interrupt control information + * \param [in] ic Interrupt control information. * * \retval 0 */ @@ -200,8 +236,11 @@ ngbde_intr_ack(ngbde_intr_ctrl_t *ic) struct ngbde_dev_s *sd = ngbde_swdev_get(ic->kdev); struct ngbde_intr_ack_reg_s *ar = &ic->intr_ack; - if (sd->use_msi) { - if (ar->flags & NGBDE_INTR_ACK_F_PAXB) { + if (sd->use_msi && ar->ack_valid) { + if (intr_debug >= 2) { + printk("INTR: ACK interrupt vector %d\n", ic->irq_vect); + } + if (ar->ack_domain == NGBDE_INTR_ACK_IO_PAXB) { ngbde_paxb_write32(sd, ar->ack_reg, ar->ack_val); } else { ngbde_pio_write32(sd, ar->ack_reg, ar->ack_val); @@ -229,18 +268,118 @@ ngbde_isr(int irq_num, void *data) struct ngbde_intr_ctrl_s *ic = (struct ngbde_intr_ctrl_s *)data; irqreturn_t rv = IRQ_NONE; + if (intr_debug >= 2) { + printk("INTR: Process interrupt vector %d\n", ic->irq_vect); + } + + if (ic->run_user_isr) { + if (ngbde_user_isr(ic)) { + rv = IRQ_HANDLED; + } + } + + if (ic->run_kernel_isr) { + if (ngbde_kernel_isr(ic)) { + rv = IRQ_HANDLED; + } + } + ngbde_intr_ack(ic); - if (ngbde_kernel_isr2(ic)) { - rv = IRQ_HANDLED; + return rv; +} + +int +ngbde_intr_alloc(int kdev, unsigned int num_irq) +{ + struct ngbde_dev_s *sd; + unsigned long irq_types; + int irq, vect; + + if (intr_debug) { + printk("INTR: Request %d interrupts\n", num_irq); } - if (ngbde_user_isr(ic)) { - rv = IRQ_HANDLED; + + sd = ngbde_swdev_get(kdev); + if (!sd) { + return -1; } - if (ngbde_kernel_isr(ic)) { - rv = IRQ_HANDLED; + + if (num_irq == 0) { + return -1; } - return rv; + + if (sd->active_irqs) { + if (intr_debug) { + printk("INTR: Skip reallocating active interrupts\n"); + } + return sd->irq_max; + } + + if (sd->irq_max > 0) { + if (intr_debug) { + printk("INTR: Interrupts already allocated\n"); + } + return sd->irq_max; + } + + /* Use new API if available (Linux 4.8 and newer) */ + irq_types = PCI_IRQ_LEGACY; + if (sd->use_msi) { + irq_types |= PCI_IRQ_MSI; + if (sd->use_msi == NGBDE_MSI_T_MSIX) { + irq_types |= PCI_IRQ_MSIX; + } else { + /* Only allow one IRQ line if not MSI-X */ + num_irq = 1; + } + } + sd->irq_max = pci_alloc_irq_vectors(sd->pci_dev, 1, num_irq, irq_types); + if (sd->irq_max < 1) { + printk(KERN_WARNING "%s: Failed to allocate IRQs for device %d\n", + MOD_NAME, kdev); + return -1; + } + if (intr_debug) { + printk("INTR: Allocated %d interrupt vector(s)\n", sd->irq_max); + } + for (irq = 0; irq < sd->irq_max; irq++) { + vect = pci_irq_vector(sd->pci_dev, irq); + if (intr_debug) { + printk("INTR: Interrupt vector %d = %d\n", irq, vect); + } + sd->intr_ctrl[irq].irq_vect = vect; + } + + return sd->irq_max; +} + +int +ngbde_intr_free(int kdev) +{ + struct ngbde_dev_s *sd; + + if (intr_debug) { + printk("INTR: Free interrupts\n"); + } + + sd = ngbde_swdev_get(kdev); + if (!sd) { + return -1; + } + + if (sd->active_irqs) { + if (intr_debug) { + printk("INTR: Skip freeing active interrupts\n"); + } + return 0; + } + + pci_free_irq_vectors(sd->pci_dev); + + sd->irq_max = 0; + + return 0; } int @@ -250,6 +389,10 @@ ngbde_intr_connect(int kdev, unsigned int irq_num) struct ngbde_intr_ctrl_s *ic; unsigned long irq_flags; + if (intr_debug) { + printk("INTR: Interrupt connect (%d)\n", irq_num); + } + sd = ngbde_swdev_get(kdev); if (!sd) { return -1; @@ -262,56 +405,63 @@ ngbde_intr_connect(int kdev, unsigned int irq_num) ic = &sd->intr_ctrl[irq_num]; if (ic->irq_active) { + if (intr_debug) { + printk("INTR: Interrupt already connected (%d)\n", irq_num); + } return 0; } - if (sd->irq_line >= 0) { - if (sd->pio_mem == NULL) { - printk(KERN_WARNING "%s: No memory-mapped I/O for device %d\n", - MOD_NAME, kdev); + if (sd->irq_line < 0) { + printk(KERN_WARNING "%s: No IRQ line for device %d\n", + MOD_NAME, kdev); + return -1; + } + + if (sd->pio_mem == NULL) { + printk(KERN_WARNING "%s: No memory-mapped I/O for device %d\n", + MOD_NAME, kdev); + return -1; + } + + /* + * Check for old application that does not support interrupt line + * allocation. + */ + if (sd->irq_max == 0) { + ngbde_intr_alloc(kdev, 1); + if (sd->irq_max == 0) { return -1; } - ic->kdev = kdev; - ic->iomem = sd->pio_mem; - if (sd->iio_mem) { - if (intr_debug) { - printk("INTR: Using dedicated interrupt controller\n"); - } - ic->iomem = sd->iio_mem; - } - init_waitqueue_head(&ic->user_thread_wq); - atomic_set(&ic->run_user_thread, 0); - irq_flags = IRQF_SHARED; - ic->irq_vect = sd->irq_line; + } - /* - * The pci_enable_msi function must be called after enabling - * BAR0_PAXB_OARR_FUNC0_MSI_PAGE, otherwise, MSI interrupts - * cannot be triggered! - */ - if (sd->use_msi) { - if (pci_enable_msi(sd->pci_dev) == 0) { - irq_flags = 0; - ic->irq_vect = sd->pci_dev->irq; - if (intr_debug) { - printk("INTR: Enabled MSI interrupts\n"); - } - } else { - printk(KERN_WARNING "%s: Failed to enable MSI for device %d\n", - MOD_NAME, kdev); - sd->use_msi = 0; - } - } + if (sd->active_irqs >= sd->irq_max) { + printk(KERN_WARNING "%s: Too many IRQs for device %d\n", + MOD_NAME, kdev); + return -1; + } + + ic->kdev = kdev; + ic->iomem = sd->pio_mem; + if (sd->iio_mem) { if (intr_debug) { - printk("INTR: Request IRQ %d\n", ic->irq_vect); + printk("INTR: Using dedicated interrupt controller\n"); } - if (request_irq(ic->irq_vect, ngbde_isr, irq_flags, MOD_NAME, ic) < 0) { - printk(KERN_WARNING "%s: Could not get IRQ %d for device %d\n", - MOD_NAME, ic->irq_vect, kdev); - return -1; - } - ic->irq_active = 1; + ic->iomem = sd->iio_mem; } + init_waitqueue_head(&ic->user_thread_wq); + atomic_set(&ic->run_user_thread, 0); + irq_flags = IRQF_SHARED; + + if (intr_debug) { + printk("INTR: Request IRQ %d\n", ic->irq_vect); + } + if (request_irq(ic->irq_vect, ngbde_isr, irq_flags, MOD_NAME, ic) < 0) { + printk(KERN_WARNING "%s: Could not get IRQ %d for device %d\n", + MOD_NAME, ic->irq_vect, kdev); + return -1; + } + ic->irq_active = 1; + sd->active_irqs++; return 0; } @@ -322,6 +472,10 @@ ngbde_intr_disconnect(int kdev, unsigned int irq_num) struct ngbde_dev_s *sd; struct ngbde_intr_ctrl_s *ic; + if (intr_debug) { + printk("INTR: Interrupt disconnect (%d)\n", irq_num); + } + sd = ngbde_swdev_get(kdev); if (!sd) { return -1; @@ -331,6 +485,10 @@ ngbde_intr_disconnect(int kdev, unsigned int irq_num) return -1; } + if (sd->active_irqs == 0) { + return -1; + } + ic = &sd->intr_ctrl[irq_num]; if (!ic->irq_active) { @@ -345,10 +503,13 @@ ngbde_intr_disconnect(int kdev, unsigned int irq_num) if (ic->irq_vect >= 0) { free_irq(ic->irq_vect, ic); - if (sd->use_msi) { - pci_disable_msi(sd->pci_dev); - } - ic->irq_active = 0; + } + + ic->irq_active = 0; + sd->active_irqs--; + + if (sd->active_irqs == 0 && sd->irq_max == 1) { + ngbde_intr_free(kdev); } return 0; @@ -366,6 +527,7 @@ ngbde_intr_cleanup(void) for (irq_num = 0; irq_num < NGBDE_NUM_IRQS_MAX; irq_num++) { ngbde_intr_disconnect(idx, irq_num); } + ngbde_intr_free(idx); } } @@ -390,9 +552,15 @@ ngbde_intr_wait(int kdev, unsigned int irq_num) return 0; } + if (intr_debug >= 2) { + printk("INTR: User wait for interrupt (%d)\n", ic->irq_vect); + } wait_event_interruptible(ic->user_thread_wq, atomic_read(&ic->run_user_thread) != 0); atomic_set(&ic->run_user_thread, 0); + if (intr_debug >= 2) { + printk("INTR: User process interrupt (%d)\n", ic->irq_vect); + } return 0; } @@ -485,11 +653,14 @@ ngbde_intr_reg_add(int kdev, unsigned int irq_num, ir->mask_reg == ireg->mask_reg) { if (ir->kmask != ireg->kmask && ireg->kmask_valid) { ir->kmask = ireg->kmask; + ir->umask = ireg->umask; if (intr_debug) { - printk("INTR: Updating interrupt register " - "0x%08x/0x%08x (0x%08x)\n", - ir->status_reg, ir->mask_reg, ir->kmask); + printk("INTR: Updated interrupt register " + "0x%08x/0x%08x [u:0x%08x,k:0x%08x] (%d)\n", + ir->status_reg, ir->mask_reg, + ir->umask, ir->kmask, irq_num); } + ngbde_intr_dispatch_update(ic); } return 0; } @@ -502,13 +673,14 @@ ngbde_intr_reg_add(int kdev, unsigned int irq_num, } ir = &ic->regs[ic->num_regs++]; - memcpy(ir, ireg, sizeof (*ir)); - if (intr_debug) { - printk("INTR: Adding interrupt register 0x%08x/0x%08x (0x%08x)\n", - ir->status_reg, ir->mask_reg, ir->kmask); + printk("INTR: Added interrupt register " + "0x%08x/0x%08x [u:0x%08x,k:0x%08x] (%d)\n", + ir->status_reg, ir->mask_reg, + ir->umask, ir->kmask, irq_num); } + ngbde_intr_dispatch_update(ic); return ic->num_regs; } @@ -542,8 +714,8 @@ ngbde_intr_ack_reg_add(int kdev, unsigned int irq_num, memcpy(ar, ackreg, sizeof (*ar)); if (intr_debug) { - printk("INTR: Adding interrupt ACK register 0x%08x/0x%08x (0x%08x)\n", - ar->ack_reg, ar->ack_val, ar->flags); + printk("INTR: Adding interrupt ACK register 0x%08x/0x%08x[%d] (%d)\n", + ar->ack_reg, ar->ack_val, ar->ack_domain, irq_num); } return 0; diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c index f83857f6edcc..0c8482c9d772 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include @@ -35,6 +35,7 @@ ngbde_ioctl(struct file *file, unsigned int cmd, unsigned long arg) unsigned int num_swdev; unsigned int rsrc_type, rsrc_idx; unsigned int irq_num, intr_cmd; + int rv; uint32_t mreg, mval; if (copy_from_user(&ioc, (void *)arg, sizeof(ioc))) { @@ -46,6 +47,7 @@ ngbde_ioctl(struct file *file, unsigned int cmd, unsigned long arg) switch (cmd) { case NGBDE_IOC_MOD_INFO: ioc.op.mod_info.version = NGBDE_IOC_VERSION; + ioc.op.mod_info.compat = NGBDE_COMPAT_IRQ_INIT; break; case NGBDE_IOC_PROBE_INFO: ngbde_swdev_get_all(NULL, &num_swdev); @@ -61,9 +63,6 @@ ngbde_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ioc.op.dev_info.device_id = swdev->device_id; ioc.op.dev_info.revision = swdev->revision; ioc.op.dev_info.model = swdev->model; - if (swdev->use_msi) { - ioc.op.dev_info.flags |= NGBDE_DEV_F_MSI; - } break; case NGBDE_IOC_PHYS_ADDR: swdev = ngbde_swdev_get(ioc.devid); @@ -156,17 +155,29 @@ ngbde_ioctl(struct file *file, unsigned int cmd, unsigned long arg) irq_num = ioc.op.irq_reg_add.irq_num; ireg.status_reg = ioc.op.irq_reg_add.status_reg; ireg.mask_reg = ioc.op.irq_reg_add.mask_reg; + ireg.umask = 0; ireg.kmask = 0; ireg.kmask_valid = false; - if (ioc.op.irq_reg_add.flags & NGBDE_DEV_IRQ_REG_F_KMASK) { + if (ioc.op.irq_reg_add.flags & NGBDE_IRQ_REG_F_KMASK) { ireg.kmask = ioc.op.irq_reg_add.kmask; ireg.kmask_valid = true; } - if (ioc.op.irq_reg_add.flags & NGBDE_DEV_IRQ_REG_F_MASKED) { + if (ioc.op.irq_reg_add.flags & NGBDE_IRQ_REG_F_UMASK) { + ireg.umask = ioc.op.irq_reg_add.umask; + } else { + /* + * Assign non-kernel bits to user mode driver. Note that + * this functionality is intended to provide backward + * compatibility. + */ + ireg.umask = ~ioc.op.irq_reg_add.kmask; + } + ireg.status_is_masked = false; + if (ioc.op.irq_reg_add.flags & NGBDE_IRQ_REG_F_MASKED) { ireg.status_is_masked = true; } ireg.mask_w1tc = false; - if (ioc.op.irq_reg_add.flags & NGBDE_DEV_IRQ_REG_F_W1TC) { + if (ioc.op.irq_reg_add.flags & NGBDE_IRQ_REG_F_W1TC) { ireg.mask_w1tc = true; } if (ngbde_intr_reg_add(ioc.devid, irq_num, &ireg) < 0) { @@ -176,11 +187,15 @@ ngbde_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ioc.rc = NGBDE_IOC_FAIL; } break; - case NGBDE_IOC_INTR_ACK_REG_ADD: - irq_num = ioc.op.intr_ack_reg_add.irq_num; - ackreg.ack_reg = ioc.op.intr_ack_reg_add.ack_reg; - ackreg.ack_val = ioc.op.intr_ack_reg_add.ack_val; - ackreg.flags = ioc.op.intr_ack_reg_add.flags; + case NGBDE_IOC_IACK_REG_ADD: + irq_num = ioc.op.iack_reg_add.irq_num; + ackreg.ack_valid = true; + ackreg.ack_domain = NGBDE_INTR_ACK_IO_DEV; + if (ioc.op.iack_reg_add.flags & NGBDE_IACK_REG_F_PAXB) { + ackreg.ack_domain = NGBDE_INTR_ACK_IO_PAXB; + } + ackreg.ack_reg = ioc.op.iack_reg_add.ack_reg; + ackreg.ack_val = ioc.op.iack_reg_add.ack_val; if (ngbde_intr_ack_reg_add(ioc.devid, irq_num, &ackreg) < 0) { printk(KERN_WARNING "%s: Unable to add interrupt ack register\n", @@ -199,6 +214,14 @@ ngbde_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ioc.rc = NGBDE_IOC_FAIL; } break; + case NGBDE_IOC_IRQ_INIT: + rv = ngbde_intr_alloc(ioc.devid, ioc.op.irq_init.irq_max); + if (rv < 0) { + ioc.rc = NGBDE_IOC_FAIL; + } else { + ioc.op.irq_init.irq_max = rv; + } + break; case NGBDE_IOC_PIO_WIN_MAP: swdev = ngbde_swdev_get(ioc.devid); if (!swdev) { diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c index 10f221642c3d..bf3eb1b07233 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c @@ -8,7 +8,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -21,7 +21,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include @@ -50,7 +50,7 @@ iproc_cmicd_probe(struct platform_device *pldev) uint32_t size; void *base_address; uint32_t dev_rev_id; - struct ngbde_dev_s ngbde_dev, *nd = &ngbde_dev; + struct ngbde_dev_s *nd = NULL; struct resource *memres, *irqres; memres = platform_get_resource(pldev, IORESOURCE_MEM, 0); @@ -71,6 +71,10 @@ iproc_cmicd_probe(struct platform_device *pldev) return -1; } + nd = kmalloc(sizeof(*nd), GFP_KERNEL); + if (nd == NULL) { + return -ENOMEM; + } memset(nd, 0, sizeof(*nd)); nd->pci_dev = NULL; /* No PCI bus */ nd->dma_dev = &pldev->dev; @@ -99,6 +103,8 @@ iproc_cmicd_probe(struct platform_device *pldev) } rv = ngbde_swdev_add(nd); + kfree(nd); + return rv; } diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c index 506231054b7d..fed0d9b2a3db 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include @@ -315,57 +315,6 @@ ngbde_kapi_intr_disconnect(int kdev, unsigned int irq_num) EXPORT_SYMBOL(ngbde_kapi_intr_disconnect); /*! \endcond */ -int -ngbde_kapi_intr2_connect(int kdev, unsigned int irq_num, - int (*isr_func)(void *), void *isr_data) -{ - struct ngbde_dev_s *sd; - struct ngbde_intr_ctrl_s *ic; - - sd = ngbde_swdev_get(kdev); - if (!sd) { - return -1; - } - - if (irq_num >= NGBDE_NUM_IRQS_MAX) { - return -1; - } - - ic = &sd->intr_ctrl[irq_num]; - ic->isr2_func = isr_func; - ic->isr2_data = isr_data; - - return 0; -} -/*! \cond */ -EXPORT_SYMBOL(ngbde_kapi_intr2_connect); -/*! \endcond */ - -int -ngbde_kapi_intr2_disconnect(int kdev, unsigned int irq_num) -{ - struct ngbde_dev_s *sd; - struct ngbde_intr_ctrl_s *ic; - - sd = ngbde_swdev_get(kdev); - if (!sd) { - return -1; - } - - if (irq_num >= NGBDE_NUM_IRQS_MAX) { - return -1; - } - - ic = &sd->intr_ctrl[irq_num]; - ic->isr2_func = NULL; - ic->isr2_data = NULL; - - return 0; -} -/*! \cond */ -EXPORT_SYMBOL(ngbde_kapi_intr2_disconnect); -/*! \endcond */ - int ngbde_kapi_intr_mask_write(int kdev, unsigned int irq_num, uint32_t status_reg, uint32_t mask_val) diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c index 38a60867b719..bc6895072cba 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include @@ -180,6 +180,12 @@ ngbde_pio_base_match(unsigned long paddr) * The function below provides a backdoor to mapping the DMA pool to * user space via the BDE device file. */ +static const struct vm_operations_struct ngbde_vma_ops = { +#ifdef CONFIG_HAVE_IOREMAP_PROT + .access = generic_access_phys, +#endif +}; + static int ngbde_mmap(struct file *filp, struct vm_area_struct *vma) { @@ -212,6 +218,9 @@ ngbde_mmap(struct file *filp, struct vm_area_struct *vma) return -EINVAL; } + /* Support debug access to the mapping (works for PGMEM DMA only) */ + vma->vm_ops = &ngbde_vma_ops; + if (map_noncached) { vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); } diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c index 376062d348d5..ed45c2c67ddb 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c @@ -5,7 +5,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -18,7 +18,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c index f74ccf5a4377..5fdd71ba56ab 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,16 +17,16 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include /*! \cond */ -static int use_msi = 1; +static int use_msi = NGBDE_MSI_T_MSI; module_param(use_msi, int, S_IRUSR); MODULE_PARM_DESC(use_msi, -"Use MSI interrupts if supported by the kernel (default 1)."); +"Use MSI (1) or MSI-X (2) interrupts if supported by the kernel (default 1)."); /*! \endcond */ /*! \cond */ @@ -61,7 +61,7 @@ pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *ent) int bdx; int cmic_bar = 0; uint8_t rev; - struct ngbde_dev_s ngbde_dev, *nd = &ngbde_dev; + struct ngbde_dev_s *nd = NULL; int bus_no = pci_dev->bus ? pci_dev->bus->number : 0; int slot_no = PCI_SLOT(pci_dev->devfn); @@ -75,6 +75,10 @@ pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *ent) pci_dev->vendor, pci_dev->device); } + nd = kmalloc(sizeof(*nd), GFP_KERNEL); + if (nd == NULL) { + return -ENOMEM; + } memset(nd, 0, sizeof(*nd)); nd->pci_dev = pci_dev; nd->dma_dev = &pci_dev->dev; @@ -128,15 +132,8 @@ pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *ent) spin_lock_init(&nd->lock); - /* Determine MSI configuration by enabling MSI on the device */ + /* Get MSI configuration preference from module parameter */ nd->use_msi = use_msi; - if (nd->use_msi) { - if (pci_enable_msi(nd->pci_dev) == 0) { - pci_disable_msi(nd->pci_dev); - } else { - nd->use_msi = 0; - } - } rv = ngbde_swdev_add(nd); @@ -151,6 +148,8 @@ pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *ent) } } + kfree(nd); + return rv; } diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c index ec6b369780a8..348909edb113 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c @@ -31,7 +31,7 @@ * likely these requests are to succeed. */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -44,7 +44,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c index cfcc97a94e49..a1e430da0e28 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c @@ -5,7 +5,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -18,7 +18,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c index 6fd02ebd3d4b..a7cc964eb9fc 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include @@ -26,7 +26,7 @@ static int proc_show(struct seq_file *m, void *v) { struct ngbde_dev_s *swdev; - unsigned int num_swdev, idx; + unsigned int num_swdev, idx, irq; struct ngbde_dmamem_s *dmamem; unsigned int pool; unsigned int dma_pools; @@ -35,16 +35,23 @@ proc_show(struct seq_file *m, void *v) ngbde_swdev_get_all(&swdev, &num_swdev); seq_printf(m, "Broadcom Device Enumerator (%s)\n", MOD_NAME); - +#ifdef LKM_BUILD_INFO + seq_printf(m, "%s\n", LKM_BUILD_INFO); +#endif seq_printf(m, "Found %d switch device(s):\n", num_swdev); for (idx = 0; idx < num_swdev; idx++) { if (swdev->inactive) { seq_printf(m, "%d:removed\n", idx); continue; } - seq_printf(m, "%d:%04x:%04x:%02x,%s(%d)\n", idx, + seq_printf(m, "%d:%04x:%04x:%02x,%s(%d", idx, swdev->vendor_id, swdev->device_id, swdev->revision, - swdev->use_msi ? "MSI" : "IRQ", swdev->irq_line); + swdev->use_msi ? "MSI" : "IRQ", + swdev->intr_ctrl[0].irq_vect); + for (irq = 1; irq < swdev->irq_max; irq++) { + seq_printf(m, ",%d", swdev->intr_ctrl[irq].irq_vect); + } + seq_printf(m, ")\n"); } seq_printf(m, "DMA pools:\n"); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c index a6fedc2c4a30..ee0532db3da2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild new file mode 100644 index 000000000000..c0b31433648c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild @@ -0,0 +1,13 @@ +# -*- Kbuild -*- +# +# Linux Netlink channel for general packet I/O module. +# +# $Copyright: (c) 2024 Broadcom. +# Broadcom Proprietary and Confidential. All rights reserved.$ +# + +obj-m := genl-packet.o + +ccflags-y := $(LKM_CFLAGS) \ + -I$(SDK)/linux/include/lkm \ + -I$(SDK)/linux/include/kernel diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile new file mode 100644 index 000000000000..f4e3cfbb07f9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile @@ -0,0 +1,20 @@ +# +# $Copyright: (c) 2024 Broadcom. +# Broadcom Proprietary and Confidential. All rights reserved.$ +# +# Linux Netlink channel for general packet I/O module. +# + +include Kbuild + +ifeq ($(KERNELRELEASE),) + +MOD_NAME = genl-packet + +include $(SDK)/make/lkm.mk + +endif + +.PHONY: distclean + +distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/genl-packet.c b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/genl-packet.c new file mode 100644 index 000000000000..141edc6d7603 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/genl-packet.c @@ -0,0 +1,118 @@ +/* + * net/genl-packet/genl-packet.c - Netlink channel for general packetIO + * Copyright (c) 2021 Google, based on psample.c (originally written by + * Yotam Gigi ) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include + +#define GENL_PACKET_MAX_PACKET_SIZE 0xffff + +/* multicast groups */ +enum genl_packet_multicast_groups { + GENL_PACKET_MCGRP_PACKET, +}; + +static const struct genl_multicast_group genl_packet_mcgrps[] = { + [GENL_PACKET_MCGRP_PACKET] = { .name = GENL_PACKET_MCGRP_NAME }, +}; + +static struct genl_family genl_packet_family = { + .name = GENL_PACKET_NAME, + .version = GENL_PACKET_VERSION, + .maxattr = GENL_PACKET_ATTR_MAX, + .netnsok = true, + .module = THIS_MODULE, + .mcgrps = genl_packet_mcgrps, + .n_mcgrps = ARRAY_SIZE(genl_packet_mcgrps), +}; + +void genl_packet_send_packet(struct net *net, struct sk_buff *skb, + int in_ifindex, int out_ifindex, unsigned int context) +{ + struct sk_buff *nl_skb; + int data_len; + int meta_len; + void *data; + int ret; + + /* Metalength is sum of netlink message sizes of in_ifindex + out_ifindex + + * context */ + meta_len = nla_total_size(sizeof(s16)) + + nla_total_size(sizeof(s16)) + + nla_total_size(sizeof(u32)); + + data_len = skb->len; + if (meta_len + nla_total_size(data_len) > GENL_PACKET_MAX_PACKET_SIZE) + data_len = GENL_PACKET_MAX_PACKET_SIZE - meta_len - NLA_HDRLEN + - NLA_ALIGNTO; + if (data_len <= 0) + return; + + nl_skb = genlmsg_new(meta_len + nla_total_size(data_len), GFP_ATOMIC); + if (unlikely(!nl_skb)) + return; + + data = genlmsg_put(nl_skb, 0, 0, &genl_packet_family, 0, + GENL_PACKET_CMD_PACKET); + if (unlikely(!data)) + goto error; + + ret = nla_put_s16(nl_skb, GENL_PACKET_ATTR_IIFINDEX, in_ifindex); + if (unlikely(ret < 0)) + goto error; + + ret = nla_put_s16(nl_skb, GENL_PACKET_ATTR_OIFINDEX, out_ifindex); + if (unlikely(ret < 0)) + goto error; + + ret = nla_put_u32(nl_skb, GENL_PACKET_ATTR_CONTEXT, context); + if (unlikely(ret < 0)) + goto error; + + if (data_len > 0) { + int nla_len = nla_total_size(data_len); + struct nlattr *nla; + + nla = (struct nlattr *)skb_put(nl_skb, nla_len); + nla->nla_type = GENL_PACKET_ATTR_DATA; + nla->nla_len = nla_attr_size(data_len); + + if (skb_copy_bits(skb, 0, nla_data(nla), data_len)) + goto error; + } + + genlmsg_end(nl_skb, data); + genlmsg_multicast_netns(&genl_packet_family, net, nl_skb, 0, + GENL_PACKET_MCGRP_PACKET, GFP_ATOMIC); + + return; +error: + pr_err_ratelimited("Could not create genl_packet message\n"); + nlmsg_free(nl_skb); +} +EXPORT_SYMBOL_GPL(genl_packet_send_packet); + +static int __init genl_packet_module_init(void) +{ + return genl_register_family(&genl_packet_family); +} + +static void __exit genl_packet_module_exit(void) +{ + genl_unregister_family(&genl_packet_family); +} + +module_init(genl_packet_module_init); +module_exit(genl_packet_module_exit); + +MODULE_AUTHOR("Google"); +MODULE_DESCRIPTION("netlink channel for genl_packet"); +MODULE_LICENSE("GPL v2"); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/README b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/README new file mode 100644 index 000000000000..dd6ab429db66 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/README @@ -0,0 +1,8 @@ +This directory is mainly for the header files which are planned +for upstreaming to the mainline kernels. +The header files can be placed in the simulated kernel include path +created in this directory. + +The directory (include/kernel) can be added to the include path (-I) +when compiling the associated source files such that the standard Linux path +can be used in the source files. \ No newline at end of file diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/net/genl-packet.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/net/genl-packet.h new file mode 100644 index 000000000000..48db3895db3e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/net/genl-packet.h @@ -0,0 +1,9 @@ +#ifndef __NET_GENL_PACKET_H +#define __NET_GENL_PACKET_H + +#include + +extern void genl_packet_send_packet(struct net *net, struct sk_buff *skb, + int in_ifindex, int out_ifindex, unsigned int context); + +#endif /* __NET_GENL_PACKET_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/uapi/linux/genl-packet.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/uapi/linux/genl-packet.h new file mode 100644 index 000000000000..e57442117f85 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/uapi/linux/genl-packet.h @@ -0,0 +1,24 @@ +#ifndef __UAPI_GENL_PACKET_H +#define __UAPI_GENL_PACKET_H + +enum { + /* packet metadata */ + GENL_PACKET_ATTR_IIFINDEX, + GENL_PACKET_ATTR_OIFINDEX, + GENL_PACKET_ATTR_CONTEXT, + GENL_PACKET_ATTR_DATA, + + __GENL_PACKET_ATTR_MAX +}; + +enum genl_packet_command { + GENL_PACKET_CMD_PACKET, +}; + +/* Can be overridden at runtime by module option */ +#define GENL_PACKET_ATTR_MAX (__GENL_PACKET_ATTR_MAX - 1) + +#define GENL_PACKET_MCGRP_NAME "packets" +#define GENL_PACKET_NAME "genl_packet" +#define GENL_PACKET_VERSION 1 +#endif /* __UAPI_GENL_PACKET_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h index 4da4ab985e96..bf838dd5856d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h @@ -1,10 +1,10 @@ /*! \file lkm.h * - * + * Linux compatibility macros. * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef LKM_H @@ -138,4 +138,36 @@ static inline void page_ref_dec(struct page *page) } #endif +#ifndef PCI_IRQ_LEGACY +/* Emulate new IRQ API if not available */ +#define PCI_IRQ_LEGACY (1 << 0) +#define PCI_IRQ_MSI (1 << 1) +#define PCI_IRQ_MSIX (1 << 2) +static inline int +pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs, + unsigned int max_vecs, unsigned int flags) +{ + /* We do not attempt to support MSI-X via old API */ + if (flags & PCI_IRQ_MSI) { + if (pci_enable_msi(dev) == 0) { + return 1; + } + } + if (flags & PCI_IRQ_LEGACY) { + return 1; + } + return 0; +} +static inline void +pci_free_irq_vectors(struct pci_dev *dev) +{ + pci_disable_msi(dev); +} +static inline int +pci_irq_vector(struct pci_dev *dev, unsigned int nr) +{ + return dev->irq; +} +#endif + #endif /* LKM_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h index 1a3b94f0ad5d..e6f65b3af8e4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h @@ -9,7 +9,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -22,7 +22,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef NGBDE_IOCTL_H @@ -80,7 +80,10 @@ #define NGBDE_IOC_PAXB_WIN_MAP _IOW(NGBDE_IOC_MAGIC, 9, __u64) /*! Add interrupt ACK register for kernel to control. */ -#define NGBDE_IOC_INTR_ACK_REG_ADD _IOW(NGBDE_IOC_MAGIC, 10, __u64) +#define NGBDE_IOC_IACK_REG_ADD _IOW(NGBDE_IOC_MAGIC, 10, __u64) + +/*! Initialize kernel interrupt driver. */ +#define NGBDE_IOC_IRQ_INIT _IOW(NGBDE_IOC_MAGIC, 11, __u64) /*! \} */ @@ -91,38 +94,18 @@ #define NGBDE_IOC_FAIL ((__u32)-1) /*! - * \name Device flags. - * \anchor NGBDE_DEV_F_xxx + * \name Compatibility features. + * + * This allows user mode applications to work with both current and + * older kernel modules. + * + * \anchor NGBDE_COMPAT_xxx */ /*! \{ */ -/*! Message-signaled interrupts, PCI interrupts are operating in MSI mode. */ -#define NGBDE_DEV_F_MSI (1 << 0) - -/*! \} */ - -/*! - * \name Interrupt control commands. - * \anchor NGBDE_ICTL_xxx - */ - -/*! \{ */ - -/*! Connect interrupt handler. */ -#define NGBDE_ICTL_INTR_CONN 0 - -/*! Disconnect interrupt handler. */ -#define NGBDE_ICTL_INTR_DISC 1 - -/*! Wait for interrupt. */ -#define NGBDE_ICTL_INTR_WAIT 2 - -/*! Force waiting thread to return. */ -#define NGBDE_ICTL_INTR_STOP 3 - -/*! Clear list of interrupt status/mask registers. */ -#define NGBDE_ICTL_REGS_CLR 4 +/*! Support for IRQ_INIT IOCTL command. */ +#define NGBDE_COMPAT_IRQ_INIT (1 << 0) /*! \} */ @@ -131,6 +114,9 @@ struct ngbde_ioc_mod_info_s { /*! IOCTL version used by kernel module. */ __u16 version; + + /*! Compatibility options (\ref NGBDE_COMPAT_xxx). */ + __u16 compat; }; /*! Probing results. */ @@ -140,13 +126,31 @@ struct ngbde_ioc_probe_info_s { __u16 num_swdev; }; +/*! + * \name Bus types. + * \anchor NGBDE_DEV_BT_xxx + */ + +/*! \{ */ + +/*! PCI bus. */ +#define NGBDE_DEV_BT_PCI 0 + +/*! ARM AXI bus. */ +#define NGBDE_DEV_BT_AXI 1 + +/*! \} */ + /*! Device information. */ struct ngbde_ioc_dev_info_s { - /*! Device type. */ - __u16 type; + /*! Device type (currently unused). */ + __u8 device_type; + + /*! Bus type (\ref NGBDE_DEV_BT_xxx). */ + __u8 bus_type; - /*! Device flags (\ref NGBDE_DEV_F_xxx). */ + /*! Device flags (currently unused). */ __u16 flags; /*! Vendor ID (typically the PCI vendor ID). */ @@ -215,42 +219,89 @@ struct ngbde_ioc_phys_addr_s { __u32 size; }; -/*! Interrupt control operation */ +/*! + * Initialize kernel interrupt driver. + * + * The user mode driver will provide the number of desired interrupt + * lines, and the kernel mode driver will respond with the actual + * number of interrupt lines available (which may be a smaller + * number). + */ +struct ngbde_ioc_irq_init_s { + + /*! Maximum number of interrupt lines per device. */ + __u32 irq_max; +}; + +/*! + * \name Interrupt control commands. + * \anchor NGBDE_ICTL_xxx + */ + +/*! \{ */ + +/*! Connect interrupt handler. */ +#define NGBDE_ICTL_INTR_CONN 0 + +/*! Disconnect interrupt handler. */ +#define NGBDE_ICTL_INTR_DISC 1 + +/*! Wait for interrupt. */ +#define NGBDE_ICTL_INTR_WAIT 2 + +/*! Force waiting interrupt thread to return. */ +#define NGBDE_ICTL_INTR_STOP 3 + +/*! Clear list of interrupt status/mask registers. */ +#define NGBDE_ICTL_REGS_CLR 4 + +/*! \} */ + +/*! Interrupt control operation. */ struct ngbde_ioc_intr_ctrl_s { /*! Interrupt instance for this device. */ __u32 irq_num; - /*! Interrupt control command. */ + /*! Interrupt control command (see \ref NGBDE_ICTL_xxx). */ __u32 cmd; }; /*! * \name Interrupt register access flags. - * \anchor NGBDE_DEV_IRQ_REG_F_xxx + * \anchor NGBDE_IRQ_REG_F_xxx */ /*! \{ */ /*! IRQ register is of type "write 1 to clear". */ -#define NGBDE_DEV_IRQ_REG_F_W1TC (1 << 0) +#define NGBDE_IRQ_REG_F_W1TC (1 << 0) /*! IRQ status register is a bitwise AND of mask and raw status. */ -#define NGBDE_DEV_IRQ_REG_F_MASKED (1 << 1) +#define NGBDE_IRQ_REG_F_MASKED (1 << 1) /*! - * Indicates that the kmask value is valid. This is mainly to - * distinguish a mask value of zero from the mask value being - * uninitialized, as this matters during a warm boot. + * Indicates that the interrupts in the kmask field should be handled + * by the kernel (typically the KNET kernel network driver). The + * remaining interrupts in the interrupt register (if any) will be + * handled by the user mode interrupt driver, except if \ref + * NGBDE_IRQ_REG_F_UMASK is set, in which case the remaining + * interrupts in the kmask will be ignored. */ -#define NGBDE_DEV_IRQ_REG_F_KMASK (1 << 2) +#define NGBDE_IRQ_REG_F_KMASK (1 << 2) + +/*! + * Indicates that the interrupts in the umask field should be handled + * by the user mode interrupt handler. + */ +#define NGBDE_IRQ_REG_F_UMASK (1 << 3) /*! \} */ /*! Add interrupt register information. */ struct ngbde_ioc_irq_reg_add_s { - /*! Interrupt instance for this device. */ + /*! Interrupt line associated with these registers. */ __u32 irq_num; /*! Interrupt status register address offset. */ @@ -259,27 +310,40 @@ struct ngbde_ioc_irq_reg_add_s { /*! Interrupt mask register address offset. */ __u32 mask_reg; - /*! Interrupt mask for interrupts handled by the kernel. */ + /*! + * Indicates which kernel mode interrupts in the interrupt + * registers that are associated with this interrupt line (\c + * irq_num). Note that the \ref NGBDE_IRQ_REG_F_xxx flags may + * affect how this value is interpreted. + */ __u32 kmask; - /*! Flags for special handling (\ref NGBDE_DEV_IRQ_REG_F_xxx). */ + /*! Flags for special handling (\ref NGBDE_IRQ_REG_F_xxx). */ __u32 flags; + + /*! + * Indicates which user mode interrupts in the interrupt registers + * that are associated with this interrupt line (\c irq_num). Note + * that the \ref NGBDE_IRQ_REG_F_xxx flags may affect how this + * value is interpreted. + */ + __u32 umask; }; /*! * \name Interrupt ACK register access flags. - * \anchor NGBDE_DEV_INTR_ACK_F_xxx + * \anchor NGBDE_IACK_REG_F_xxx */ /*! \{ */ /*! ACK registers resides in PCI bridge I/O window. */ -#define NGBDE_DEV_INTR_ACK_F_PAXB (1 << 0) +#define NGBDE_IACK_REG_F_PAXB (1 << 0) /*! \} */ /*! Add interrupt ACK register information. */ -struct ngbde_ioc_intr_ack_reg_add_s { +struct ngbde_ioc_iack_reg_add_s { /*! Interrupt instance for this device. */ __u32 irq_num; @@ -287,10 +351,10 @@ struct ngbde_ioc_intr_ack_reg_add_s { /*! Interrupt ACK register address offset. */ __u32 ack_reg; - /*! Interrupt ACK value. */ + /*! Interrupt ACK register value to write. */ __u32 ack_val; - /*! Flags to indicate ack_reg resides in PCI bridge window. */ + /*! Interrupt ACK register access flags (\ref NGBDE_IACK_REG_F_xxx). */ __u32 flags; }; @@ -335,14 +399,17 @@ union ngbde_ioc_op_s { /*! Get a physical memory address associated with a switch device. */ struct ngbde_ioc_phys_addr_s phys_addr; - /*! Interrupt control command (see \ref NGBDE_ICTL_xxx). */ + /*! Get information about interrupt capabilities. */ + struct ngbde_ioc_irq_init_s irq_init; + + /*! Interrupt control command. */ struct ngbde_ioc_intr_ctrl_s intr_ctrl; /*! Add interrupt status/mask register for kernel to control. */ struct ngbde_ioc_irq_reg_add_s irq_reg_add; /*! Add interrupt ACK register for kernel to control. */ - struct ngbde_ioc_intr_ack_reg_add_s intr_ack_reg_add; + struct ngbde_ioc_iack_reg_add_s iack_reg_add; /*! Write to a shared interrupt mask register. */ struct ngbde_ioc_irq_mask_wr_s irq_mask_wr; @@ -362,6 +429,7 @@ typedef struct ngbde_ioc_cmd_s { /*! IOCTL operation. */ union ngbde_ioc_op_s op; + } ngbde_ioc_cmd_t; #endif /* NGBDE_IOCTL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h index 98a148711aaa..d6cc403ab9da 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h @@ -6,7 +6,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -19,7 +19,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef NGBDE_KAPI_H @@ -262,34 +262,6 @@ ngbde_kapi_intr_connect(int kdev, unsigned int irq_num, extern int ngbde_kapi_intr_disconnect(int kdev, unsigned int irq_num); -/*! - * \brief Install secondary interrupt handler. - * - * Optionally allow a different process to handle one or more user - * mode interrupts. - * - * \param [in] kdev Device number. - * \param [in] irq_num Interrupt number (MSI vector). - * \param [in] isr_func Interrupt handler function. - * \param [in] isr_data Interrupt handler context. - * - * \retval 0 No errors - */ -extern int -ngbde_kapi_intr2_connect(int kdev, unsigned int irq_num, - int (*isr_func)(void *), void *isr_data); - -/*! - * \brief Uninstall secondary interrupt handler. - * - * \param [in] kdev Device number. - * \param [in] irq_num Interrupt number (MSI vector). - * - * \retval 0 No errors - */ -extern int -ngbde_kapi_intr2_disconnect(int kdev, unsigned int irq_num); - /*! * \brief Write shared interrupt mask register. * diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h index 05063d3207b0..9f6573c1a9c0 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h @@ -9,7 +9,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -22,7 +22,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef NGEDK_IOCTL_H @@ -43,7 +43,7 @@ /*! Maximum number of mHosts supported per switch device. */ #ifndef MCS_NUM_UC -#define MCS_NUM_UC 4 +#define MCS_NUM_UC 6 #endif /*! diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h new file mode 100644 index 000000000000..b850b7413ffb --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h @@ -0,0 +1,39 @@ +/*! \file ngedk_kapi.h + * + * NGEDK kernel API. + * + * This file is intended for use by other kernel modules relying on the NGEDK. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef NGEDK_KAPI_H +#define NGEDK_KAPI_H + +/*! + * \brief Converts physical address to virtual address. + * + * \param [in] paddr physical address. + * + * \retval void * Corresponding virtual address. + */ +extern void * +ngedk_dmamem_map_p2v(dma_addr_t paddr); + +#endif /* NGEDK_KAPI_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h index 1c6ec921c0aa..72415a6643ee 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h @@ -9,7 +9,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -22,7 +22,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef NGKNET_DEV_H @@ -104,6 +104,8 @@ #define NGKNET_NETIF_F_ADD_TAG (1U << 1) /*! Bind network interface to Rx channel */ #define NGKNET_NETIF_F_BIND_CHAN (1U << 2) +/*! Create network interface with specified ID */ +#define NGKNET_NETIF_F_WITH_ID (1U << 3) /*! * \brief Network interface description. @@ -147,6 +149,9 @@ typedef struct ngknet_netif_s { /*! User data gotten back through callbacks */ uint8_t user_data[NGKNET_NETIF_USER_DATA]; + + /*! Network interface port */ + uint32_t port; } ngknet_netif_t; /*! @@ -298,15 +303,21 @@ typedef struct ngknet_dev_info_s { /*! Device number (from BDE) */ int dev_no; + /*! Device ID */ + uint32_t dev_id; + /*! Device type string */ char type_str[NGKNET_DEV_NAME_MAX]; /*! Device variant string */ char var_str[NGKNET_DEV_NAME_MAX]; + + /*! Virtual network devices, pointer to ngknet_dev.vdev[] */ + struct net_device **vdev; } ngknet_dev_info_t; /*! - * \brief Device configure structure. + * \brief Device configuration structure. */ typedef struct ngknet_dev_cfg_s { /*! Device name */ @@ -338,6 +349,11 @@ typedef struct ngknet_dev_cfg_s { /*! Base network interface */ ngknet_netif_t base_netif; + + /*! Configuration flags */ + uint32_t flags; + /*! Rx polling for single queue */ +#define NGKNET_RX_POLL_SQ (1 << 0) } ngknet_dev_cfg_t; /*! @@ -368,6 +384,9 @@ typedef struct ngknet_chan_cfg_s { #define NGKNET_RX_CHAN 0 /*! Tx channel */ #define NGKNET_TX_CHAN 1 + + /*! Pipe specified for Rx/Tx */ + int pipe; } ngknet_chan_cfg_t; /*! @@ -404,8 +423,8 @@ struct ngknet_rcpu_hdr { /*! Packet data length */ uint16_t data_len; - /*! Reserved must be 0 */ - uint16_t rsvd0; + /*! Header profile */ + uint16_t hdr_prof; /*! packet meta data length */ uint8_t meta_len; @@ -414,7 +433,7 @@ struct ngknet_rcpu_hdr { uint8_t queue_id; /*! Reserved must be 0 */ - uint16_t rsvd1; + uint16_t rsvd; }; /*! RCPU Rx operation */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h index ad1614f8110c..1cdba1c93123 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h @@ -9,7 +9,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -22,7 +22,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef NGKNET_IOCTL_H diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h index 878a065ba39b..fd6a7db90ae3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h @@ -6,7 +6,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -19,7 +19,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef NGKNET_KAPI_H @@ -49,28 +49,41 @@ struct ngknet_callback_desc { /*! Packet data length */ int pkt_len; + + /*! Network device */ + struct net_device *net_dev; }; /*! SKB callback data */ #define NGKNET_SKB_CB(_skb) ((struct ngknet_callback_desc *)_skb->cb) +/*! + * PHC specific private data + */ +struct ngknet_ptp_data { + /*! Physical port */ + int phy_port; + + /*! HW timestamp Tx type */ + int hwts_tx_type; +}; + /*! TX/RX callback init */ typedef void (*ngknet_dev_init_cb_f)(ngknet_dev_info_t *dinfo); /*! Handle Rx packet */ typedef struct sk_buff * -(*ngknet_rx_cb_f)(struct net_device *dev, struct sk_buff *skb); +(*ngknet_rx_cb_f)(struct sk_buff *skb); /*! Handle Tx packet */ typedef struct sk_buff * (*ngknet_tx_cb_f)(struct sk_buff *skb); -#if 0 /*! Handle Netif callback */ typedef int (*ngknet_netif_cb_f)(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif); -#endif + /*! Handle Filter callback */ typedef struct sk_buff * (*ngknet_filter_cb_f)(struct sk_buff *skb, ngknet_filter_t **filt); @@ -95,9 +108,9 @@ typedef int typedef int (*ngknet_ptp_dev_ctrl_cb_f)(ngknet_dev_info_t *dinfo, int cmd, char *data, int len); -/*! Netif callback */ +/*! PTP RX Preprocessing */ typedef int -(*ngknet_netif_cb_f)(struct net_device *dev); +(*ngknet_ptp_rx_pre_process_cb_f)(struct sk_buff *skb, uint32_t *cust_hdr_len); /*! * \brief Register TX/RX callback device initialization callback function. @@ -225,6 +238,17 @@ ngknet_netif_destroy_cb_unregister(ngknet_netif_cb_f netif_cb); extern int ngknet_filter_cb_register(ngknet_filter_cb_f filter_cb); +/*! + * \brief Register filter callback by name. + * + * \param [in] filter_cb Filter callback function. + * \param [in] desc Filter description. + * + * \retval SHR_E_NONE No errors. + */ +extern int +ngknet_filter_cb_register_by_name(ngknet_filter_cb_f filter_cb, const char *desc); + /*! * \brief Unregister filter callback. * @@ -375,5 +399,25 @@ ngknet_ptp_dev_ctrl_cb_register(ngknet_ptp_dev_ctrl_cb_f ptp_dev_ctrl_cb); extern int ngknet_ptp_dev_ctrl_cb_unregister(ngknet_ptp_dev_ctrl_cb_f ptp_dev_ctrl_cb); +/*! + * \brief Register PTP RX pre processing callback. + * + * \param [in] ptp_rx_pre_process_cb RX pre processing callback function. + * + * \retval SHR_E_NONE No errors. + */ +extern int +ngknet_ptp_rx_pre_process_cb_register(ngknet_ptp_rx_pre_process_cb_f ptp_rx_pre_process_cb); + +/*! + * \brief Unregister PTP RX pre processing callback. + * + * \param [in] ptp_rx_pre_process_cb RX pre processing callback function. + * + * \retval SHR_E_NONE No errors. + */ +extern int +ngknet_ptp_rx_pre_process_cb_unregister(ngknet_ptp_rx_pre_process_cb_f ptp_rx_pre_process_cb); + #endif /* NGKNET_KAPI_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h new file mode 100644 index 000000000000..3ce5b6b15b3c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h @@ -0,0 +1,43 @@ +/*! \file ngptpclock_ioctl.h + * + * NGPTPCLOCK I/O control definitions. + * + * This file is intended for use in both kernel mode and user mode. + * + * IMPORTANT! + * All shared structures must be properly 64-bit aligned. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef NGPTPCLOCK_IOCTL_H +#define NGPTPCLOCK_IOCTL_H + +/* Module Information */ +#define NGPTPCLOCK_MODULE_NAME "linux_ngptpclock" + +/*! + * \brief PTP hardware clock driver commands + */ +/*! Initialize PTP hardware clock driver module */ +#define NGPTPCLOCK_HW_INIT 0 +/*! Clean up PTP hardware clock driver module */ +#define NGPTPCLOCK_HW_CLEANUP 1 + +#endif /* NGPTPCLOCK_IOCTL_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild index a23e587b1d45..89610dd2b44d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild @@ -2,7 +2,7 @@ # # Linux KNET module. # -# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. +# Copyright 2018-2024 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or @@ -15,7 +15,7 @@ # GNU General Public License for more details. # # A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder.$ +# be found in the LICENSES folder. # obj-m := linux_ngknet.o @@ -39,6 +39,7 @@ linux_ngknet-y := $(CHIP_OBJS) \ bcmcnet_cmicx_pdma_rxtx.o \ bcmcnet_cmicr_pdma_hw.o \ bcmcnet_cmicr_pdma_rxtx.o \ + bcmcnet_cmicr2_pdma_rxtx.o \ bcmcnet_core.o \ bcmcnet_dev.o \ bcmcnet_rxtx.o \ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile index f13702ac92fd..930479743f7b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile @@ -1,5 +1,5 @@ # -# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. +# Copyright 2018-2024 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or @@ -12,7 +12,7 @@ # GNU General Public License for more details. # # A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder.$ +# be found in the LICENSES folder. # # Linux KNET module. # @@ -78,8 +78,9 @@ mklinks: -ln -s $(SRCIDIR)/bcmcnet_rxtx.h $(DSTIDIR) $(R) -ln -s $(SRCIDIR)/bcmcnet_cmicd.h $(DSTIDIR) $(R) -ln -s $(SRCIDIR)/bcmcnet_cmicx.h $(DSTIDIR) $(R) - -ln -s $(SRCIDIR)/bcmcnet_cmicr.h $(DSTIDIR) $(R) -ln -s $(SRCIDIR)/bcmcnet_cmicr_acc.h $(DSTIDIR) $(R) + -ln -s $(SRCIDIR)/bcmcnet_cmicr.h $(DSTIDIR) $(R) + -ln -s $(SRCIDIR)/bcmcnet_cmicr2.h $(DSTIDIR) $(R) -ln -s $(CNETDIR)/chip/*/*attach.c $(GENDIR) $(R) -ln -s $(CNETDIR)/hmi/cmicd/*.c $(GENDIR) $(R) -ln -s $(CNETDIR)/hmi/cmicx/*.c $(GENDIR) $(R) diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c index 362c6e156e2b..5aac177bc9aa 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include @@ -251,19 +251,8 @@ ngknet_rx_buf_mode(struct pdma_dev *dev, struct pdma_rx_queue *rxq) { uint32_t len, order; - switch (ngknet_page_buffer_mode_get()) { - case 0: - /* Forced SKB mode */ + if (ngknet_page_buffer_mode_get() == 0) { return PDMA_BUF_MODE_SKB; - case 1: - /* Forced page mode */ - break; - default: /* -1 */ - /* Select buffer mode based on system capability */ - if (kal_support_paged_skb() == 0) { - return PDMA_BUF_MODE_SKB; - } - break; } len = dev->rx_ph_size ? rxq->buf_size : rxq->buf_size + PDMA_RXB_META; @@ -327,12 +316,7 @@ ngknet_tx_buf_free(struct pdma_dev *dev, struct pdma_tx_queue *txq, } dma_unmap_single(kdev->dev, pbuf->dma, pbuf->len, DMA_TO_DEVICE); - if (skb_shinfo(pbuf->skb)->tx_flags & SKBTX_IN_PROGRESS) { - skb_queue_tail(&kdev->ptp_tx_queue, pbuf->skb); - schedule_work(&kdev->ptp_tx_work); - } else { - dev_kfree_skb_any(pbuf->skb); - } + dev_kfree_skb_any(pbuf->skb); pbuf->dma = 0; pbuf->len = 0; diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h index e8d5a69dc4f6..6777b3cb5589 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef NGKNET_BUFF_H diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c index 04d1540a270b..2766758d2c69 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,13 +17,51 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ +#include "ngknet_main.h" #include "ngknet_callback.h" +#include "ngknet_extra.h" static struct ngknet_callback_ctrl callback_ctrl; +void +ngknet_callback_init(struct ngknet_dev *devs) +{ + INIT_LIST_HEAD(&callback_ctrl.netif_create_cb_list); + INIT_LIST_HEAD(&callback_ctrl.netif_destroy_cb_list); + INIT_LIST_HEAD(&callback_ctrl.filter_cb_list); + callback_ctrl.devs = devs; +} + +void +ngknet_callback_cleanup(void) +{ + netif_cb_t *netif_cb; + filter_cb_t *filter_cb; + + /* Destroy any create/destroy netif which is not unregistered */ + while (!list_empty(&callback_ctrl.netif_create_cb_list)) { + netif_cb = list_entry(callback_ctrl.netif_create_cb_list.next, + netif_cb_t, list); + list_del(&netif_cb->list); + kfree(netif_cb); + } + while (!list_empty(&callback_ctrl.netif_destroy_cb_list)) { + netif_cb = list_entry(callback_ctrl.netif_destroy_cb_list.next, + netif_cb_t, list); + list_del(&netif_cb->list); + kfree(netif_cb); + } + while (!list_empty(&callback_ctrl.filter_cb_list)) { + filter_cb = list_entry(callback_ctrl.filter_cb_list.next, + filter_cb_t, list); + list_del(&filter_cb->list); + kfree(filter_cb); + } +} + int ngknet_callback_control_get(struct ngknet_callback_ctrl **cbc) { @@ -105,10 +143,24 @@ ngknet_tx_cb_unregister(ngknet_tx_cb_f tx_cb) int ngknet_netif_create_cb_register(ngknet_netif_cb_f netif_cb) { - if (callback_ctrl.netif_create_cb != NULL) { + struct list_head *list; + netif_cb_t *netif_create_cb; + + if (netif_cb == NULL) { + return -1; + } + list_for_each(list, &callback_ctrl.netif_create_cb_list) { + netif_create_cb = list_entry(list, netif_cb_t, list); + if (netif_create_cb->cb == netif_cb) { + return -1; + } + } + netif_create_cb = kmalloc(sizeof(*netif_create_cb), GFP_KERNEL); + if (netif_create_cb == NULL) { return -1; } - callback_ctrl.netif_create_cb = netif_cb; + netif_create_cb->cb = netif_cb; + list_add_tail(&netif_create_cb->list, &callback_ctrl.netif_create_cb_list); return 0; } @@ -116,10 +168,25 @@ ngknet_netif_create_cb_register(ngknet_netif_cb_f netif_cb) int ngknet_netif_create_cb_unregister(ngknet_netif_cb_f netif_cb) { - if (netif_cb == NULL || callback_ctrl.netif_create_cb != netif_cb) { + struct list_head *list, *list_next; + netif_cb_t *netif_create_cb; + int found = 0; + + if (netif_cb == NULL) { return -1; } - callback_ctrl.netif_create_cb = NULL; + list_for_each_safe(list, list_next, &callback_ctrl.netif_create_cb_list) { + netif_create_cb = list_entry(list, netif_cb_t, list); + if (netif_create_cb->cb == netif_cb) { + found = 1; + list_del(list); + break; + } + } + if (!found) { + return -1; + } + kfree(netif_create_cb); return 0; } @@ -127,10 +194,24 @@ ngknet_netif_create_cb_unregister(ngknet_netif_cb_f netif_cb) int ngknet_netif_destroy_cb_register(ngknet_netif_cb_f netif_cb) { - if (callback_ctrl.netif_destroy_cb != NULL) { + struct list_head *list; + netif_cb_t *netif_destroy_cb; + + if (netif_cb == NULL) { + return -1; + } + list_for_each(list, &callback_ctrl.netif_destroy_cb_list) { + netif_destroy_cb = list_entry(list, netif_cb_t, list); + if (netif_destroy_cb->cb == netif_cb) { + return -1; + } + } + netif_destroy_cb = kmalloc(sizeof(*netif_destroy_cb), GFP_KERNEL); + if (netif_destroy_cb == NULL) { return -1; } - callback_ctrl.netif_destroy_cb = netif_cb; + netif_destroy_cb->cb = netif_cb; + list_add_tail(&netif_destroy_cb->list, &callback_ctrl.netif_destroy_cb_list); return 0; } @@ -138,10 +219,25 @@ ngknet_netif_destroy_cb_register(ngknet_netif_cb_f netif_cb) int ngknet_netif_destroy_cb_unregister(ngknet_netif_cb_f netif_cb) { - if (netif_cb == NULL || callback_ctrl.netif_destroy_cb != netif_cb) { + struct list_head *list, *list_next; + netif_cb_t *netif_destroy_cb; + int found = 0; + + if (netif_cb == NULL) { return -1; } - callback_ctrl.netif_destroy_cb = NULL; + list_for_each_safe(list, list_next, &callback_ctrl.netif_destroy_cb_list) { + netif_destroy_cb = list_entry(list, netif_cb_t, list); + if (netif_destroy_cb->cb == netif_cb) { + found = 1; + list_del(list); + break; + } + } + if (!found) { + return -1; + } + kfree(netif_destroy_cb); return 0; } @@ -157,14 +253,113 @@ ngknet_filter_cb_register(ngknet_filter_cb_f filter_cb) return 0; } +int +ngknet_filter_cb_register_by_name(ngknet_filter_cb_f filter_cb, const char *desc) +{ + struct ngknet_dev *dev; + struct list_head *list; + struct filt_ctrl *fc = NULL; + filter_cb_t *fcb; + unsigned long flags; + int idx; + + if (filter_cb == NULL || desc == NULL) { + return -1; + } + if (desc[0] == '\0' || strlen(desc) >= NGKNET_FILTER_DESC_MAX) { + return -1; + } + + list_for_each(list, &callback_ctrl.filter_cb_list) { + fcb = list_entry(list, filter_cb_t, list); + if (strcmp(fcb->desc, desc) == 0) { + return -1; + } + } + fcb = kmalloc(sizeof(*fcb), GFP_KERNEL); + if (fcb == NULL) { + return -1; + } + fcb->cb = filter_cb; + strcpy(fcb->desc, desc); + list_add_tail(&fcb->list, &callback_ctrl.filter_cb_list); + + /* Check if any existing filter matches the registered name */ + for (idx = 0; idx < NUM_PDMA_DEV_MAX; idx++) { + dev = &callback_ctrl.devs[idx]; + if (!(dev->flags & NGKNET_DEV_ACTIVE) || + list_empty(&dev->filt_list)) { + continue; + } + spin_lock_irqsave(&dev->lock, flags); + list_for_each(list, &dev->filt_list) { + fc = (struct filt_ctrl *)list; + if (fc && + fc->filt.dest_type == NGKNET_FILTER_DEST_T_CB && + fc->filt.desc[0] != '\0') { + if (strcmp(fc->filt.desc, desc) == 0) { + fc->filter_cb = filter_cb; + } + } + } + spin_unlock_irqrestore(&dev->lock, flags); + } + return 0; +} + int ngknet_filter_cb_unregister(ngknet_filter_cb_f filter_cb) { - if (filter_cb == NULL || callback_ctrl.filter_cb != filter_cb) { + struct ngknet_dev *dev; + struct list_head *list, *list2; + struct filt_ctrl *fc = NULL; + filter_cb_t *fcb; + unsigned long flags; + int found = 0, idx; + + if (filter_cb == NULL) { return -1; } - callback_ctrl.filter_cb = NULL; + /* Check if the any existing filter-specific callback matches */ + + /* Remove from list */ + list_for_each_safe(list, list2, &callback_ctrl.filter_cb_list) { + fcb = list_entry(list, filter_cb_t, list); + if (fcb->cb == filter_cb) { + found = 1; + list_del(&fcb->list); + kfree(fcb); + break; + } + } + /* Check if the callback is set to filters */ + if (found) { + for (idx = 0; idx < NUM_PDMA_DEV_MAX; idx++) { + dev = &callback_ctrl.devs[idx]; + if (!(dev->flags & NGKNET_DEV_ACTIVE) || + list_empty(&dev->filt_list)) { + continue; + } + spin_lock_irqsave(&dev->lock, flags); + list_for_each(list, &dev->filt_list) { + fc = (struct filt_ctrl *)list; + if (fc && + fc->filt.dest_type == NGKNET_FILTER_DEST_T_CB && + fc->filter_cb == filter_cb) { + fc->filter_cb = NULL; + } + } + spin_unlock_irqrestore(&dev->lock, flags); + } + } + + if (!found && filter_cb != callback_ctrl.filter_cb) { + return -1; + } + if (!found || filter_cb == callback_ctrl.filter_cb) { + callback_ctrl.filter_cb = NULL; + } return 0; } @@ -329,6 +524,29 @@ ngknet_ptp_dev_ctrl_cb_unregister(ngknet_ptp_dev_ctrl_cb_f ptp_dev_ctrl_cb) return 0; } +int +ngknet_ptp_rx_pre_process_cb_register(ngknet_ptp_rx_pre_process_cb_f ptp_rx_pre_process_cb) +{ + if (callback_ctrl.ptp_rx_pre_process_cb != NULL) { + return -1; + } + callback_ctrl.ptp_rx_pre_process_cb = ptp_rx_pre_process_cb; + + return 0; +} + +int +ngknet_ptp_rx_pre_process_cb_unregister(ngknet_ptp_rx_pre_process_cb_f ptp_rx_pre_process_cb) +{ + if (ptp_rx_pre_process_cb == NULL || + callback_ctrl.ptp_rx_pre_process_cb != ptp_rx_pre_process_cb) { + return -1; + } + callback_ctrl.ptp_rx_pre_process_cb = NULL; + + return 0; +} + EXPORT_SYMBOL(ngknet_dev_init_cb_register); EXPORT_SYMBOL(ngknet_dev_init_cb_unregister); EXPORT_SYMBOL(ngknet_rx_cb_register); @@ -340,6 +558,7 @@ EXPORT_SYMBOL(ngknet_netif_create_cb_unregister); EXPORT_SYMBOL(ngknet_netif_destroy_cb_register); EXPORT_SYMBOL(ngknet_netif_destroy_cb_unregister); EXPORT_SYMBOL(ngknet_filter_cb_register); +EXPORT_SYMBOL(ngknet_filter_cb_register_by_name); EXPORT_SYMBOL(ngknet_filter_cb_unregister); EXPORT_SYMBOL(ngknet_ptp_rx_config_set_cb_register); EXPORT_SYMBOL(ngknet_ptp_rx_config_set_cb_unregister); @@ -355,4 +574,6 @@ EXPORT_SYMBOL(ngknet_ptp_phc_index_get_cb_register); EXPORT_SYMBOL(ngknet_ptp_phc_index_get_cb_unregister); EXPORT_SYMBOL(ngknet_ptp_dev_ctrl_cb_register); EXPORT_SYMBOL(ngknet_ptp_dev_ctrl_cb_unregister); +EXPORT_SYMBOL(ngknet_ptp_rx_pre_process_cb_register); +EXPORT_SYMBOL(ngknet_ptp_rx_pre_process_cb_unregister); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h index c330c106817f..04b06500c792 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef NGKNET_CALLBACK_H @@ -25,6 +25,24 @@ #include +typedef struct netif_cb_s { + /*! List head */ + struct list_head list; + + /*! Handle Netif creation or destruction */ + ngknet_netif_cb_f cb; +} netif_cb_t; + +typedef struct filter_cb_s { + /*! List head */ + struct list_head list; + + char desc[NGKNET_FILTER_DESC_MAX]; + + /*! Handle Filter callback */ + ngknet_filter_cb_f cb; +} filter_cb_t; + /*! * \brief NGKNET callback control. */ @@ -38,11 +56,14 @@ struct ngknet_callback_ctrl { /*! Handle Tx packet */ ngknet_tx_cb_f tx_cb; - /*! Handle Netif creation */ - ngknet_netif_cb_f netif_create_cb; + /*! Netif creation list */ + struct list_head netif_create_cb_list; - /*! Handle Netif destruction */ - ngknet_netif_cb_f netif_destroy_cb; + /*! Netif destruction list */ + struct list_head netif_destroy_cb_list; + + /*! Filter callback list */ + struct list_head filter_cb_list; /*! Handle filter callback */ ngknet_filter_cb_f filter_cb; @@ -67,8 +88,29 @@ struct ngknet_callback_ctrl { /*! PTP device control */ ngknet_ptp_dev_ctrl_cb_f ptp_dev_ctrl_cb; + + /*! PTP Rx pre processing */ + ngknet_ptp_rx_pre_process_cb_f ptp_rx_pre_process_cb; + + /*! Devices */ + struct ngknet_dev *devs; }; +/*! + * \brief Initialize callback control. + * + * \param [in] devs Devices array. + */ +extern void +ngknet_callback_init(struct ngknet_dev *devs); + +/*! + * \brief Cleanup callback control. + * + */ +extern void +ngknet_callback_cleanup(void); + /*! * \brief Get callback control. * @@ -80,4 +122,3 @@ extern int ngknet_callback_control_get(struct ngknet_callback_ctrl **cbc); #endif /* NGKNET_CALLBACK_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h index 6292494bc92d..5d738cabc098 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef NGKNET_DEP_H diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c index 3bf2dbfdc5ef..78b619a28a34 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include @@ -45,10 +45,12 @@ #include #include +#include #include #include "ngknet_main.h" #include "ngknet_extra.h" #include "ngknet_callback.h" +#include "ngknet_ptp.h" /*! Defalut Rx tick for Rx rate limit control. */ #define NGKNET_EXTRA_RATE_LIMIT_DEFAULT_RX_TICK 10 @@ -61,6 +63,7 @@ ngknet_filter_create(struct ngknet_dev *dev, ngknet_filter_t *filter) struct filt_ctrl *fc = NULL; struct list_head *list = NULL; ngknet_filter_t *filt = NULL; + filter_cb_t *filter_cb; unsigned long flags; int num, id, done = 0; @@ -81,6 +84,11 @@ ngknet_filter_create(struct ngknet_dev *dev, ngknet_filter_t *filter) return SHR_E_UNAVAIL; } + fc = kzalloc(sizeof(*fc), GFP_KERNEL); + if (!fc) { + return SHR_E_MEMORY; + } + spin_lock_irqsave(&dev->lock, flags); num = (long)dev->fc[0]; @@ -91,15 +99,10 @@ ngknet_filter_create(struct ngknet_dev *dev, ngknet_filter_t *filter) } if (id > NUM_FILTER_MAX) { spin_unlock_irqrestore(&dev->lock, flags); + kfree(fc); return SHR_E_RESOURCE; } - fc = kzalloc(sizeof(*fc), GFP_KERNEL); - if (!fc) { - spin_unlock_irqrestore(&dev->lock, flags); - return SHR_E_MEMORY; - } - dev->fc[id] = fc; num += id == (num + 1) ? 1 : 0; dev->fc[0] = (void *)(long)num; @@ -107,6 +110,18 @@ ngknet_filter_create(struct ngknet_dev *dev, ngknet_filter_t *filter) memcpy(&fc->filt, filter, sizeof(fc->filt)); fc->filt.id = id; + /* Check for filter-specific callback */ + if (filter->dest_type == NGKNET_FILTER_DEST_T_CB && + filter->desc[0] != '\0') { + list_for_each(list, &dev->cbc->filter_cb_list) { + filter_cb = list_entry(list, filter_cb_t, list); + if (strcmp(filter->desc, filter_cb->desc) == 0) { + fc->filter_cb = filter_cb->cb; + break; + } + } + } + list_for_each(list, &dev->filt_list) { filt = &((struct filt_ctrl *)list)->filt; if (filt->flags & NGKNET_FILTER_F_MATCH_CHAN) { @@ -248,22 +263,26 @@ ngknet_filter_get_next(struct ngknet_dev *dev, ngknet_filter_t *filter) } int -ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_device **ndev, - struct net_device **mndev, struct sk_buff **mskb) +ngknet_rx_pkt_filter(struct ngknet_dev *dev, + struct sk_buff **oskb, struct net_device **ndev, + struct sk_buff **mskb, struct net_device **mndev) { - struct pkt_buf *pkb = (struct pkt_buf *)skb->data; + struct sk_buff *skb = *oskb, *mirror_skb = NULL; struct net_device *dest_ndev = NULL, *mirror_ndev = NULL; - struct sk_buff *mirror_skb = NULL; struct ngknet_private *priv = NULL; struct filt_ctrl *fc = NULL; struct list_head *list = NULL; - ngknet_filter_t scratch, *filt = NULL, *filt_cb = NULL; + ngknet_filter_t scratch, *filt = NULL; + struct pkt_buf *pkb = (struct pkt_buf *)skb->data; uint8_t *oob = &pkb->data, *data = NULL; uint16_t tpid; unsigned long flags; int wsize; int chan_id; - int rv, idx, match = 0,match_cb = 0; + int rv, idx, match = 0; + int eth_offset = 0; + int cust_hdr_len = 0; + ngknet_filter_cb_f filter_cb; rv = bcmcnet_pdma_dev_queue_to_chan(&dev->pdma_dev, pkb->pkh.queue_id, PDMA_Q_RX, &chan_id); @@ -285,7 +304,7 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_dev if (list_empty(&dev->filt_list)) { spin_unlock_irqrestore(&dev->lock, flags); - return SHR_E_NONE; + return SHR_E_NO_HANDLER; } list_for_each(list, &dev->filt_list) { @@ -311,11 +330,6 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_dev } } if (idx == wsize) { - if (NGKNET_FILTER_DEST_T_CB == filt->dest_type) { - match_cb = 1; - filt_cb = filt; - continue; - } match = 1; break; } @@ -326,7 +340,8 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_dev if (filt->dest_type == NGKNET_FILTER_DEST_T_CB) { struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data; - if (!dev->cbc->filter_cb) { + filter_cb = fc->filter_cb ? fc->filter_cb : dev->cbc->filter_cb; + if (!filter_cb) { spin_unlock_irqrestore(&dev->lock, flags); return SHR_E_UNAVAIL; } @@ -335,10 +350,19 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_dev cbd->pmd_len = pkh->meta_len; cbd->pkt_len = pkh->data_len; cbd->filt = filt; - skb = dev->cbc->filter_cb(skb, &filt); - if (!skb || !filt) { + skb = filter_cb(skb, &filt); + if (!skb) { + *oskb = NULL; spin_unlock_irqrestore(&dev->lock, flags); - return SHR_E_UNAVAIL; + return SHR_E_NONE; + } + if (skb != *oskb) { + *oskb = skb; + pkb = (struct pkt_buf *)skb->data; + } + if (!filt) { + spin_unlock_irqrestore(&dev->lock, flags); + return SHR_E_NO_HANDLER; } } switch (filt->dest_type) { @@ -361,40 +385,41 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_dev case NGKNET_FILTER_DEST_T_VNET: pkb->pkh.attrs |= PDMA_RX_TO_VNET; spin_unlock_irqrestore(&dev->lock, flags); - return SHR_E_NO_HANDLER; + return SHR_E_NONE; case NGKNET_FILTER_DEST_T_NULL: default: spin_unlock_irqrestore(&dev->lock, flags); - return SHR_E_UNAVAIL; + return SHR_E_NO_HANDLER; } } spin_unlock_irqrestore(&dev->lock, flags); if (!dest_ndev) { - return SHR_E_NONE; + return SHR_E_NO_HANDLER; } else { *ndev = dest_ndev; } + /* PTP Rx Pre processing */ + if (priv->hwts_rx_filter) { + ngknet_ptp_rx_pre_process(dest_ndev, skb, &cust_hdr_len); + } + if (filt->flags & NGKNET_FILTER_F_STRIP_TAG) { pkb->pkh.attrs |= PDMA_RX_STRIP_TAG; - data = skb->data + PKT_HDR_SIZE + pkb->pkh.meta_len; + eth_offset = PKT_HDR_SIZE + pkb->pkh.meta_len + cust_hdr_len; + data = skb->data + eth_offset; tpid = data[12] << 8 | data[13]; if (tpid == ETH_P_8021Q || tpid == ETH_P_8021AD) { pkb->pkh.data_len -= VLAN_HLEN; - memmove(skb->data + VLAN_HLEN, skb->data, - PKT_HDR_SIZE + pkb->pkh.meta_len + 2 * ETH_ALEN); + memmove(skb->data + VLAN_HLEN, skb->data, eth_offset + 2 * ETH_ALEN); skb_pull(skb, VLAN_HLEN); } } if (dev->cbc->rx_cb) { NGKNET_SKB_CB(skb)->filt = filt; - /* Add callback filter if matched */ - if (priv) { - priv->filt_cb = match_cb? filt_cb : NULL; - } } if (filt->mirror_type == NGKNET_FILTER_DEST_T_NETIF) { diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h index 1dbeb8094a88..3cf955e47e79 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,12 +17,14 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef NGKNET_EXTRA_H #define NGKNET_EXTRA_H +#include + /*! * \brief Filter control. */ @@ -38,6 +40,9 @@ struct filt_ctrl { /*! Filter description */ ngknet_filter_t filt; + + /*! Filter callback */ + ngknet_filter_cb_f filter_cb; }; /*! @@ -104,16 +109,18 @@ ngknet_filter_get_next(struct ngknet_dev *dev, ngknet_filter_t *filter); * \brief Filter packet. * * \param [in] dev Device structure point. - * \param [in] skb Rx packet SKB. - * \param [out] mndev Mirror network interface. - * \param [out] mskb Mirror Rx packet SKB. + * \param [in] oskb Rx packet SKB. + * \param [out] ndev Network interface. + * \param [out] mskb Mirrored Rx packet SKB. + * \param [out] mndev Mirrored network interface. * * \retval Matched network interface. * \retval NULL No matched network interface. */ extern int -ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_device **ndev, - struct net_device **mndev, struct sk_buff **mskb); +ngknet_rx_pkt_filter(struct ngknet_dev *dev, + struct sk_buff **oskb, struct net_device **ndev, + struct sk_buff **mskb, struct net_device **mndev); /*! * \brief Rx rate limit control. diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c index 56d3f2371b47..cd2cbe3a31fe 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h index 14475167d7e8..bbda4df0a774 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef NGKNET_LINUX_H @@ -34,6 +34,37 @@ #define MODULE_PARAM(n, t, p) module_param(n, t, p) +/* + * The eth_hw_addr_set was added in Linux 5.15, but later backported + * to various longterm releases, so we need a more advanced check with + * the option to override the default. + */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)) +#define KERNEL_HAS_ETH_HW_ADDR_SET 1 +#endif +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,11,0) && \ + LINUX_VERSION_CODE >= KERNEL_VERSION(5,10,188)) +#define KERNEL_HAS_ETH_HW_ADDR_SET 1 +#endif +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,5,0) && \ + LINUX_VERSION_CODE >= KERNEL_VERSION(5,4,251)) +#define KERNEL_HAS_ETH_HW_ADDR_SET 1 +#endif +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,20,0) && \ + LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,291)) +#define KERNEL_HAS_ETH_HW_ADDR_SET 1 +#endif +#ifndef KERNEL_HAS_ETH_HW_ADDR_SET +#define KERNEL_HAS_ETH_HW_ADDR_SET 0 +#endif + +#if (KERNEL_HAS_ETH_HW_ADDR_SET == 0) +static inline void +eth_hw_addr_set(struct net_device *dev, const u8 *addr) +{ + memcpy(dev->dev_addr, addr, ETH_ALEN); +} +#endif #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)) #define NGKNET_ETHTOOL_LINK_SETTINGS 1 @@ -186,16 +217,6 @@ kal_copy_to_user(void __user *to, const void *from, return copy_to_user(to, from, len); } -static inline int -kal_support_paged_skb(void) -{ -#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,4,0) - return 1; -#else - return 0; -#endif -} - /*! * System abstraction */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c index 040466751e8d..d17e88d1c042 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ /* @@ -93,6 +93,26 @@ #include "ngknet_callback.h" #include "ngknet_ptp.h" +/* FIXME: SAI_FIXUP */ +#if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */ +#define NGKNET_IOC_SVTAG_SET (SIOCDEVPRIVATE + 0) +#define NGKNET_IOC_SVTAG_MAGIC 0x53565447 /* "SVTG" */ +#define NGKNET_NETIF_F_DEL_SVTAG (1U << 15) /* Remove SVTAG from the RX packets */ +#define NGKNET_NETIF_F_ADD_SVTAG (1U << 14) /* Insert SVTAG into the TX packets */ + +/* Enum to define SVTAG packet type */ +#define NGKNET_SVTAG_PKTYPE_NONMACSEC 0 /* Unsecure data packet (Untag Control Port packet) */ +#define NGKNET_SVTAG_PKTYPE_MACSEC 1 /* Secure data packet (Tag Controlled Port packet) */ +#define NGKNET_SVTAG_PKTYPE_KAY 2 /* KaY Frame (KaY Uncontrolled Port packet) */ + +/* Struct for SVTAG ioctl */ +struct ifru_svtag { + uint32_t magic; + uint32_t flags; + uint8_t svtag[4]; +}; +#endif + /*! \cond */ MODULE_AUTHOR("Broadcom Corporation"); MODULE_DESCRIPTION("Network Device Driver Module"); @@ -124,42 +144,42 @@ MODULE_PARM_DESC(mac_addr, static int default_mtu = 1500; MODULE_PARAM(default_mtu, int, 0); MODULE_PARM_DESC(default_mtu, -"Default MTU for NGKNET network interfaces (default 1500)"); +"MTU size for KNET network interfaces (default 1500)"); /*! \endcond */ /*! \cond */ static int rx_buffer_size = RX_BUF_SIZE_DFLT; MODULE_PARAM(rx_buffer_size, int, 0); MODULE_PARM_DESC(rx_buffer_size, -"Default size of RX packet buffers (default 9216)"); +"RX packet buffer size in bytes (default 9216)"); /*! \endcond */ /*! \cond */ static int rx_rate_limit = -1; MODULE_PARAM(rx_rate_limit, int, 0); MODULE_PARM_DESC(rx_rate_limit, -"Rx rate limit (pps, default -1 no limit)"); +"Rx rate limit in packets per second (default -1 for no limit)"); /*! \endcond */ /*! \cond */ static int tx_polling = 0; MODULE_PARAM(tx_polling, int, 0); MODULE_PARM_DESC(tx_polling, -"Tx polling mode (default 0 in interrupt mode)"); +"Enable Tx poll mode (default 0 for interrupt mode)"); /*! \endcond */ /*! \cond */ static int rx_batching = 0; MODULE_PARAM(rx_batching, int, 0); MODULE_PARM_DESC(rx_batching, -"Rx batching mode (default 0 in single fill mode)"); +"Enable Rx batch fill mode (default 0 for single fill mode)"); /*! \endcond */ /*! \cond */ -static int page_buffer_mode = -1; +static int page_buffer_mode = 0; MODULE_PARAM(page_buffer_mode, int, 0); -MODULE_PARM_DESC(rx_batching, -"Page buffer mode (default -1 do not override, 0 forced disable, 1 forced enable)"); +MODULE_PARM_DESC(page_buffer_mode, +"Enable SKB page buffer mode (default 0 for legacy SKB mode)"); /*! \endcond */ typedef int (*drv_ops_attach)(struct pdma_dev *dev); @@ -346,11 +366,9 @@ ngknet_rx_frame_process(struct net_device *ndev, struct sk_buff **oskb) struct ngknet_rcpu_hdr *rch = (struct ngknet_rcpu_hdr *)skb->data; struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data; uint8_t meta_len = pkh->meta_len; - - /* Do Rx timestamping */ - if (priv->hwts_rx_filter) { - ngknet_ptp_rx_hwts_set(ndev, skb); - } +#if SAI_FIXUP && KNET_SVTAG_HOTFIX + int offset; +#endif /* Remove FCS from packet length */ skb_trim(skb, skb->len - ETH_FCS_LEN); @@ -380,14 +398,39 @@ ngknet_rx_frame_process(struct net_device *ndev, struct sk_buff **oskb) skb_pull(skb, PKT_HDR_SIZE + meta_len); } - /* Check to ensure ngknet_callback_desc struct fits in sk_buff->cb */ + /* Do Rx timestamping */ + if (priv->hwts_rx_filter) { + ngknet_ptp_rx_hwts_set(ndev, skb); + } + + /* Check to ensure ngknet_callback_desc struct fits in sk_buff->cb */ BUILD_BUG_ON(sizeof(struct ngknet_callback_desc) > sizeof(skb->cb)); +#if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */ + /* Strip SVTAG from the packets injected by the MACSEC block */ + if (priv->netif.flags & NGKNET_NETIF_F_DEL_SVTAG) { + /* Strip SVTAG (4 bytes) */ + if (priv->netif.flags & NGKNET_NETIF_F_RCPU_ENCAP) { + offset = PKT_HDR_SIZE + meta_len + 2*ETH_ALEN; + memmove(skb->data + offset, skb->data + offset + 4, skb->len - offset - 4); + skb_trim(skb, skb->len - 4); + pkh->data_len -= 4; + rch->data_len = htons(pkh->data_len); + } else { + offset = 2*ETH_ALEN; + memmove(skb->data + offset, skb->data + offset + 4, skb->len - offset - 4); + skb_trim(skb, skb->len - 4); + pkh->data_len -= 4; + } + } +#endif /* Optional callback handle */ if (dev->cbc->rx_cb) { struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); cbd->dinfo = &dev->dev_info; cbd->netif = &priv->netif; + cbd->net_dev = priv->net_dev; + if (priv->netif.flags & NGKNET_NETIF_F_RCPU_ENCAP) { cbd->pmd = skb->data + PKT_HDR_SIZE; cbd->pkt_len = ntohs(rch->data_len); @@ -396,7 +439,7 @@ ngknet_rx_frame_process(struct net_device *ndev, struct sk_buff **oskb) cbd->pkt_len = pkh->data_len; } cbd->pmd_len = meta_len; - skb = dev->cbc->rx_cb(ndev, skb); + skb = dev->cbc->rx_cb(skb); if (!skb) { *oskb = NULL; return SHR_E_UNAVAIL; @@ -429,19 +472,17 @@ ngknet_netif_recv(struct net_device *ndev, struct sk_buff *skb) { struct ngknet_private *priv = netdev_priv(ndev); struct ngknet_dev *dev = priv->bkn_dev; - struct pdma_dev *pdev = &dev->pdma_dev; struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data; - struct napi_struct *napi = NULL; uint16_t proto; - int chan_id, gi, qi, skb_len; int rv; /* Handle one incoming packet */ rv = ngknet_rx_frame_process(ndev, &skb); + if (!skb) { + return SHR_E_NONE; + } if (SHR_FAILURE(rv)) { - if (!skb) { - return SHR_E_NONE; - } + return rv; } DBG_VERB(("Rx packet sent up to ndev%d (%d bytes).\n", @@ -468,26 +509,11 @@ ngknet_netif_recv(struct net_device *ndev, struct sk_buff *skb) skb_record_rx_queue(skb, pkh->queue_id); - rv = bcmcnet_pdma_dev_queue_to_chan(pdev, pkh->queue_id, PDMA_Q_RX, &chan_id); - if (SHR_FAILURE(rv)) { - return rv; - } - - gi = chan_id / pdev->grp_queues; - if (pdev->flags & PDMA_GROUP_INTR) { - napi = (struct napi_struct *)pdev->ctrl.grp[gi].intr_hdl[0].priv; - } else { - qi = pkh->queue_id; - napi = (struct napi_struct *)pdev->ctrl.grp[gi].intr_hdl[qi].priv; - } - - /* FIXME: File CSP on KASAN warning on use-after-free in ngknet_netif_recv */ - skb_len = skb->len; - napi_gro_receive(napi, skb); /* Update accounting */ priv->stats.rx_packets++; - priv->stats.rx_bytes += skb_len; + priv->stats.rx_bytes += skb->len; + netif_receive_skb(skb); /* Rate limit */ if (rx_rate_limit >= 0) { @@ -529,9 +555,15 @@ ngknet_frame_recv(struct pdma_dev *pdev, int queue, void *buf) DBG_NDEV(("Valid virtual network devices: %ld.\n", (long)dev->vdev[0])); /* Go through the filters */ - rv = ngknet_rx_pkt_filter(dev, skb, &ndev, &mndev, &mskb); - if (SHR_FAILURE(rv) || !ndev) { - return SHR_E_FAIL; + rv = ngknet_rx_pkt_filter(dev, &skb, &ndev, &mskb, &mndev); + if (!skb) { + return SHR_E_NONE; + } + if (SHR_FAILURE(rv)) { + dev_kfree_skb_any(skb); + return SHR_E_NONE; + } else if (!ndev) { + return SHR_E_NO_HANDLER; } /* Populate header, checksum status, VLAN, and protocol */ @@ -539,7 +571,7 @@ ngknet_frame_recv(struct pdma_dev *pdev, int queue, void *buf) if (!netif_carrier_ok(ndev) || SHR_FAILURE(ngknet_netif_recv(ndev, skb))) { priv->stats.rx_dropped++; - rv = SHR_E_UNAVAIL; + dev_kfree_skb_any(skb); } spin_lock_irqsave(&dev->lock, flags); @@ -623,6 +655,7 @@ ngknet_ptp_tx_config(struct net_device *ndev, struct sk_buff *skb) { struct ngknet_private *priv = netdev_priv(ndev); struct ngknet_dev *dev = priv->bkn_dev; + uint64_t *tx_ts = (uint64_t *)skb->cb; int rv; if (priv->netif.type == NGKNET_NETIF_T_PORT) { @@ -634,6 +667,16 @@ ngknet_ptp_tx_config(struct net_device *ndev, struct sk_buff *skb) return SHR_E_UNAVAIL; } + /* For 1step meta_set will populate the TX timestamp for + * the required PTP packets (i.e. DELAY_REQ), only in such + * case we should schedule ptp_tx_work for the TX timestamp + * to be sent back on the socket. + */ + if (priv->hwts_tx_type == HWTSTAMP_TX_ONESTEP_SYNC && + *tx_ts == 0) { + return SHR_E_NONE; + } + skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; if (priv->hwts_tx_type == HWTSTAMP_TX_ONESTEP_SYNC) { @@ -731,6 +774,7 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb) return SHR_E_MEMORY; } skb_shinfo(nskb)->tx_flags = skb_shinfo(skb)->tx_flags; + nskb->sk = skb->sk; skb = nskb; } skb_push(skb, PKT_HDR_SIZE + meta_len); @@ -771,6 +815,7 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb) return SHR_E_MEMORY; } skb_shinfo(nskb)->tx_flags = skb_shinfo(skb)->tx_flags; + nskb->sk = skb->sk; skb = nskb; } skb_push(skb, VLAN_HLEN); @@ -784,7 +829,44 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb) pkh->data_len += VLAN_HLEN; tag_len = VLAN_HLEN; } +#if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */ + /* XGS MACSEC: Add SVTAG (Secure Vlan TAG) */ + if (priv->netif.flags & NGKNET_NETIF_F_ADD_SVTAG) { + uint16_t ether_type = 0; + static const uint16_t mgmt_et = 0x888e; + static const uint8_t mgmt_dst[] = {0x01, 0x80, 0xc2, 0x00, 0x00, 0x03}; + copy_len = PKT_HDR_SIZE + pkh->meta_len + 2 * ETH_ALEN; + if (skb_header_cloned(skb) || skb_headroom(skb) < VLAN_HLEN) { + nskb = skb_copy_expand(skb, VLAN_HLEN, 0, GFP_ATOMIC); + if (!nskb) { + return SHR_E_MEMORY; + } + skb_shinfo(nskb)->tx_flags = skb_shinfo(skb)->tx_flags; + nskb->sk = skb->sk; + skb = nskb; + } + skb_push(skb, VLAN_HLEN); + memmove(skb->data, skb->data + VLAN_HLEN, copy_len); + pkh = (struct pkt_hdr *)skb->data; + data = skb->data + PKT_HDR_SIZE + pkh->meta_len; + ether_type = ((uint8_t)data[16] << 8) | (uint8_t)data[17]; + data[12] = priv->svtag[0]; + data[13] = priv->svtag[1]; + if (mgmt_et == ether_type && !memcmp(mgmt_dst, data, 6)) { + if (priv->svtag[2]) + data[14] = NGKNET_SVTAG_PKTYPE_KAY << 2; + else + data[14] = NGKNET_SVTAG_PKTYPE_NONMACSEC << 2; + } else { + data[14] = priv->svtag[2]; /* secured if configured */ + } + data[15] = priv->svtag[3]; + pkh->data_len += VLAN_HLEN; + tag_len += VLAN_HLEN; + printk(KERN_DEBUG "ether_type: %04x, pktype %d, subport %d\n", ether_type, (data[14] >> 2) & 0xf, data[15]); + } +#endif /* Optional callback handle */ if (dev->cbc->tx_cb) { struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); @@ -965,28 +1047,30 @@ ngknet_poll(struct napi_struct *napi, int budget) DBG_NAPI(("Scheduled NAPI on queue %d.\n", hdl->queue)); - kih->napi_resched = 0; kih->napi_pending = 0; if (pdev->flags & PDMA_GROUP_INTR) { work_done = bcmcnet_group_poll(pdev, hdl->group, budget); } else { + if (!kih->napi_resched) { + bcmcnet_queue_intr_ack(pdev, hdl); + } work_done = bcmcnet_queue_poll(pdev, hdl, budget); } if (work_done < budget) { + kih->napi_resched = 0; napi_complete(napi); if (kih->napi_pending && napi_schedule_prep(napi)) { + kih->napi_resched = 1; __napi_schedule(napi); return work_done; } spin_lock_irqsave(&dev->lock, flags); - if (!kih->napi_resched) { - if (pdev->flags & PDMA_GROUP_INTR) { - bcmcnet_group_intr_enable(pdev, hdl->group); - } else { - bcmcnet_queue_intr_enable(pdev, hdl); - } + if (pdev->flags & PDMA_GROUP_INTR) { + bcmcnet_group_intr_enable(pdev, hdl->group); + } else { + bcmcnet_queue_intr_enable(pdev, hdl); } spin_unlock_irqrestore(&dev->lock, flags); } @@ -1004,6 +1088,7 @@ ngknet_isr(void *isr_data) struct pdma_dev *pdev = &dev->pdma_dev; struct intr_handle *hdl = NULL; struct napi_struct *napi = NULL; + unsigned long bm_queue; unsigned long flags; int gi, qi; int iv = 0; @@ -1012,7 +1097,11 @@ ngknet_isr(void *isr_data) if (!pdev->ctrl.grp[gi].attached) { continue; } + bm_queue = pdev->ctrl.grp[gi].bm_rxq | pdev->ctrl.grp[gi].bm_txq; for (qi = 0; qi < pdev->grp_queues; qi++) { + if (!(pdev->flags & PDMA_GROUP_INTR) && !(1 << qi & bm_queue)) { + continue; + } hdl = &pdev->ctrl.grp[gi].intr_hdl[qi]; if (pdev->flags & PDMA_GROUP_INTR) { if (!bcmcnet_group_intr_check(pdev, gi)) { @@ -1056,26 +1145,27 @@ ngknet_isr(void *isr_data) static void ngknet_dev_hnet_work(struct pdma_dev *pdev) { - struct ngknet_dev *dev = (struct ngknet_dev *)pdev->priv; struct intr_handle *hdl = NULL; struct napi_struct *napi = NULL; struct ngknet_intr_handle *kih = NULL; - unsigned long flags; + unsigned long bm_queue; int gi, qi; for (gi = 0; gi < pdev->num_groups; gi++) { if (!pdev->ctrl.grp[gi].attached) { continue; } + bm_queue = pdev->ctrl.grp[gi].bm_rxq | pdev->ctrl.grp[gi].bm_txq; for (qi = 0; qi < pdev->grp_queues; qi++) { + if (!(pdev->flags & PDMA_GROUP_INTR) && !(1 << qi & bm_queue)) { + continue; + } hdl = &pdev->ctrl.grp[gi].intr_hdl[qi]; napi = (struct napi_struct *)hdl->priv; kih = (struct ngknet_intr_handle *)napi; kih->napi_pending = 1; if (napi_schedule_prep(napi)) { - spin_lock_irqsave(&dev->lock, flags); kih->napi_resched = 1; - spin_unlock_irqrestore(&dev->lock, flags); local_bh_disable(); __napi_schedule(napi); local_bh_enable(); @@ -1134,8 +1224,10 @@ ngknet_dev_vnet_wake(struct pdma_dev *pdev) { struct ngknet_dev *dev = (struct ngknet_dev *)pdev->priv; - atomic_set(&dev->vnet_active, 1); - wake_up_interruptible(&dev->vnet_wq); + if (atomic_read(&dev->vnet_active) != 1) { + atomic_set(&dev->vnet_active, 1); + wake_up_interruptible(&dev->vnet_wq); + } return SHR_E_NONE; } @@ -1463,6 +1555,20 @@ ngknet_do_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd) struct hwtstamp_config config; int rv; +#if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */ + if (cmd == NGKNET_IOC_SVTAG_SET) { + struct ifru_svtag req; + + if (copy_from_user(&req, ifr->ifr_data, sizeof(req))) + return -EFAULT; + if (ntohl(req.magic) != NGKNET_IOC_SVTAG_MAGIC) + return -EINVAL; + priv->netif.flags &= ~(NGKNET_NETIF_F_ADD_SVTAG | NGKNET_NETIF_F_DEL_SVTAG); + priv->netif.flags |= req.flags & (NGKNET_NETIF_F_ADD_SVTAG | NGKNET_NETIF_F_DEL_SVTAG); + memcpy(priv->svtag, req.svtag, 4); + return 0; + } else +#endif if (cmd == SIOCSHWTSTAMP) { if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) { return -EFAULT; @@ -1692,7 +1798,7 @@ ngknet_ndev_init(ngknet_netif_t *netif, struct net_device **nd) ndev->ethtool_ops = &ngknet_ethtool_ops; /* Network device name */ - if (netif->name && *netif->name) { + if (netif->name[0] != '\0') { strncpy(ndev->name, netif->name, IFNAMSIZ - 1); } @@ -1708,7 +1814,9 @@ ngknet_ndev_init(ngknet_netif_t *netif, struct net_device **nd) ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX; - ndev->features = ndev->hw_features | NETIF_F_HIGHDMA; + ndev->features = NETIF_F_RXCSUM | + NETIF_F_HIGHDMA | + NETIF_F_HW_VLAN_CTAG_RX; /* Register the kernel network device */ rv = register_netdev(ndev); @@ -1777,7 +1885,6 @@ ngknet_pdev_init(struct ngknet_dev *dev) pdev->sys_p2v = ngknet_sys_p2v; pdev->sys_v2p = ngknet_sys_v2p; - pdev->flags |= PDMA_GROUP_INTR; if (tx_polling) { pdev->flags |= PDMA_TX_POLLING; } @@ -1827,7 +1934,7 @@ ngknet_dev_info_get(int dn) dev->dev_info.dev_no = dn; strlcpy(dev->dev_info.type_str, drv_ops[dev->pdma_dev.dev_type]->drv_desc, sizeof(dev->dev_info.type_str)); - + dev->dev_info.vdev = dev->vdev; return SHR_E_NONE; } @@ -2062,8 +2169,10 @@ ngknet_netif_create(struct ngknet_dev *dev, ngknet_netif_t *netif) struct net_device *ndev = NULL; struct ngknet_private *priv = NULL; unsigned long flags; - int num, id; + uint16_t id, num; int rv; + struct list_head *list; + netif_cb_t *netif_create_cb; switch (netif->type) { case NGKNET_NETIF_T_VLAN: @@ -2100,20 +2209,39 @@ ngknet_netif_create(struct ngknet_dev *dev, ngknet_netif_t *netif) spin_lock_irqsave(&dev->lock, flags); num = (long)dev->vdev[0]; - for (id = 1; id < num + 1; id++) { - if (!dev->vdev[id]) { - break; + id = netif->id; + if (netif->flags & NGKNET_NETIF_F_WITH_ID) { + if (id == 0 || id > NUM_VDEV_MAX) { + rv = SHR_E_PARAM; + } else { + /* ID assignment is specifed by user. */ + if (dev->vdev[id]) { + DBG_WARN(("ID %d is already in use\n", id)); + rv = SHR_E_BUSY; + } + } + } else { + /* Automatic ID assignment. */ + for (id = 1; id < num + 1; id++) { + if (!dev->vdev[id]) { + break; + } + } + if (id > NUM_VDEV_MAX) { + rv = SHR_E_RESOURCE; } } - if (id > NUM_VDEV_MAX) { + if (SHR_FAILURE(rv)) { spin_unlock_irqrestore(&dev->lock, flags); unregister_netdev(ndev); free_netdev(ndev); - return SHR_E_RESOURCE; + return rv; } dev->vdev[id] = ndev; - num += id == (num + 1) ? 1 : 0; + if (id > num) { + num = id; + } dev->vdev[0] = (struct net_device *)(long)num; spin_unlock_irqrestore(&dev->lock, flags); @@ -2133,8 +2261,9 @@ ngknet_netif_create(struct ngknet_dev *dev, ngknet_netif_t *netif) } /* Optional netif create callback handle */ - if (dev->cbc->netif_create_cb) { - if (dev->cbc->netif_create_cb(ndev)) { + list_for_each(list, &dev->cbc->netif_create_cb_list) { + netif_create_cb = list_entry(list, netif_cb_t, list); + if (netif_create_cb->cb(&dev->dev_info, &priv->netif)) { DBG_WARN(("Network interface callback (create) failed for '%s'\n", ndev->name)); } @@ -2153,6 +2282,8 @@ ngknet_netif_destroy(struct ngknet_dev *dev, int id) struct ngknet_private *priv = NULL; unsigned long flags; int num; + struct list_head *list; + netif_cb_t *netif_destroy_cb; DECLARE_WAITQUEUE(wait, current); if (id <= 0 || id > NUM_VDEV_MAX) { @@ -2198,8 +2329,9 @@ ngknet_netif_destroy(struct ngknet_dev *dev, int id) remove_wait_queue(&dev->wq, &wait); /* Optional netif destroy callback handle */ - if (dev->cbc->netif_destroy_cb) { - if (dev->cbc->netif_destroy_cb(ndev)) { + list_for_each(list, &dev->cbc->netif_destroy_cb_list) { + netif_destroy_cb = list_entry(list, netif_cb_t, list); + if (netif_destroy_cb->cb(&dev->dev_info, &priv->netif)) { DBG_WARN(("Network interface callback (destroy) failed for '%s'\n", ndev->name)); } @@ -2355,6 +2487,8 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) return 0; } + memset(&iod, 0, sizeof(iod)); + switch (cmd) { case NGKNET_VERSION_GET: DBG_CMD(("NGKNET_VERSION_GET\n")); @@ -2416,6 +2550,7 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ioc.rc = SHR_E_PARAM; break; } + dev->dev_info.dev_id = pdev->dev_id; pdev->ctrl.bm_grp = dev_cfg->bm_grp; for (gi = 0; gi < NUM_GRP_MAX; gi++) { if (1 << gi & dev_cfg->bm_grp) { @@ -2426,6 +2561,10 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) } pdev->rx_ph_size = dev_cfg->rx_ph_size; pdev->tx_ph_size = dev_cfg->tx_ph_size; + pdev->flags |= PDMA_GROUP_INTR; + if (dev_cfg->flags & NGKNET_RX_POLL_SQ) { + pdev->flags &= ~PDMA_GROUP_INTR; + } pdev->mode = dev_cfg->mode; if (pdev->mode != DEV_MODE_KNET && pdev->mode != DEV_MODE_HNET) { pdev->mode = DEV_MODE_KNET; @@ -2496,6 +2635,7 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) if (chan_cfg->chan_ctrl & NGKNET_HDR_BYTE_SWAP) { pdev->ctrl.grp[gi].que_ctrl[qi] |= PDMA_HDR_BYTE_SWAP; } + pdev->ctrl.grp[gi].pipe[qi] = chan_cfg->pipe; break; case NGKNET_QUEUE_QUERY: DBG_CMD(("NGKNET_QUEUE_QUERY\n")); @@ -2520,6 +2660,7 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) } else { chan_cfg->rx_buf_size = 0; } + chan_cfg->pipe = pdev->ctrl.grp[gi].pipe[qi]; if (kal_copy_to_user((void *)(unsigned long)ioc.op.data.buf, chan_cfg, ioc.op.data.len, sizeof(*chan_cfg))) { return -EFAULT; @@ -2561,8 +2702,10 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ioc.rc = SHR_E_UNAVAIL; break; } - atomic_set(&dev->hnet_active, 1); - wake_up_interruptible(&dev->hnet_wq); + if (atomic_read(&dev->hnet_active) != 1) { + atomic_set(&dev->hnet_active, 1); + wake_up_interruptible(&dev->hnet_wq); + } break; case NGKNET_DEV_VNET_DOCK: DBG_CMD(("NGKNET_DEV_VNET_DOCK\n")); @@ -2818,6 +2961,9 @@ ngknet_init_module(void) /* Initialize Rx rate limit */ ngknet_rx_rate_limit_init(ngknet_devices); + /* Initialize Callback control */ + ngknet_callback_init(ngknet_devices); + return 0; } @@ -2826,6 +2972,9 @@ ngknet_exit_module(void) { int idx; + /* Cleanup Callback control */ + ngknet_callback_cleanup(); + /* Cleanup Rx rate limit */ ngknet_rx_rate_limit_cleanup(); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h index e31d4bb257ab..ddff0430155f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef NGKNET_MAIN_H @@ -58,6 +58,11 @@ #define DBG_RATE(_s) do { if (debug & DBG_LVL_RATE) printk _s; } while (0) #define DBG_LINK(_s) do { if (debug & DBG_LVL_LINK) printk _s; } while (0) + +/* FIXME: SAI_FIXUP */ +#define SAI_FIXUP 1 +#define KNET_SVTAG_HOTFIX 1 + /*! * Device description */ @@ -80,7 +85,7 @@ struct ngknet_dev { /*! PDMA device */ struct pdma_dev pdma_dev; - /*! Virtual network devices, 0 is reserved for valid number of devices. */ + /*! Virtual network devices, 0 is used for max ID number. */ struct net_device *vdev[NUM_VDEV_MAX + 1]; /*! Virtual network devices bound to queue */ @@ -166,8 +171,10 @@ struct ngknet_private { /* Link settings */ struct ethtool_link_settings link_settings; #endif - /*! Matched callback filter */ - struct ngknet_filter_s *filt_cb; +#if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */ + /* ! MACSEC SVTAG */ + uint8_t svtag[4]; +#endif }; /*! diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c index ad3aefe83b32..37ce61fcc3a9 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h index f6df80fe7064..e1eb263909e5 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef NGKNET_PROCFS_H diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c index eaec51a9800f..37920eb9fac6 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #include "ngknet_callback.h" @@ -95,19 +95,11 @@ ngknet_ptp_tx_hwts_get(struct net_device *ndev, struct sk_buff *skb, uint64_t *t { struct ngknet_private *priv = netdev_priv(ndev); struct ngknet_dev *dev = priv->bkn_dev; - struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); - struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data; if (!dev->cbc->ptp_tx_hwts_get_cb) { return SHR_E_UNAVAIL; } - cbd->dinfo = &dev->dev_info; - cbd->netif = &priv->netif; - cbd->pmd = skb->data + PKT_HDR_SIZE; - cbd->pmd_len = pkh->meta_len; - cbd->pkt_len = pkh->data_len; - /* * The callback should get timestamp value for a Tx packet and return * by the parameter . @@ -130,11 +122,14 @@ ngknet_ptp_tx_meta_set(struct net_device *ndev, struct sk_buff *skb) struct ngknet_dev *dev = priv->bkn_dev; struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data; + struct ngknet_ptp_data *pd = (struct ngknet_ptp_data *)priv->netif.user_data; if (!dev->cbc->ptp_tx_meta_set_cb) { return SHR_E_UNAVAIL; } + /* First 4bytes of user_data already has phy_port */ + pd->hwts_tx_type = priv->hwts_tx_type; cbd->dinfo = &dev->dev_info; cbd->netif = &priv->netif; cbd->pmd = skb->data + PKT_HDR_SIZE; @@ -187,3 +182,32 @@ ngknet_ptp_dev_ctrl(struct ngknet_dev *dev, int cmd, char *data, int len) return dev->cbc->ptp_dev_ctrl_cb(&dev->dev_info, cmd, data, len); } +extern int +ngknet_ptp_rx_pre_process(struct net_device *ndev, struct sk_buff *skb, + uint32_t *cust_hdr_len) +{ + struct ngknet_private *priv = netdev_priv(ndev); + struct ngknet_dev *dev = priv->bkn_dev; + struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); + struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data; + + if (!dev->cbc->ptp_rx_pre_process_cb) { + return SHR_E_UNAVAIL; + } + + cbd->dinfo = &dev->dev_info; + cbd->netif = &priv->netif; + cbd->pmd = skb->data + PKT_HDR_SIZE; + cbd->pmd_len = pkh->meta_len; + cbd->pkt_len = pkh->data_len; + + /* + * The callback should get custom header length return by the parameter + * . + * Some parameters have been consolidated to SKB as above. They can be + * achieved by NGKNET_SKB_CB(skb). Specially more private paramters are + * in NGKNET_SKB_CB(skb)->dinfo or NGKNET_SKB_CB(skb)->netif->user_data + * such as dev_type, phys_port and so on. + */ + return dev->cbc->ptp_rx_pre_process_cb(skb, cust_hdr_len); +} diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h index c365a8d8d0e7..77946aa2061b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef NGKNET_PTP_H @@ -107,5 +107,21 @@ ngknet_ptp_phc_index_get(struct net_device *ndev, int *index); extern int ngknet_ptp_dev_ctrl(struct ngknet_dev *dev, int cmd, char *data, int len); +/*! + * \brief PTP Rx pre-process to get custom header length. + * + * If the RX PTP packet is timestamped by the HW and requires + * timestamp processing then, this function can be used + * to get the custom/system header length encapsulated by the FW. + * + * \param [in] dev NGKNET device structure point. + * \param [in] skb Rx packet SKB. + * \param [out] Custom header length. + * + * \retval SHR_E_NONE No errors. + */ +extern int +ngknet_ptp_rx_pre_process(struct net_device *ndev, struct sk_buff *skb, uint32_t *cust_hdr_len); + #endif /* NGKNET_PTP_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild index 0469855c7dfd..d8ed4c27468e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild @@ -2,7 +2,7 @@ # # Linux KNET Callback module. # -# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. +# Copyright 2018-2024 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or @@ -15,14 +15,9 @@ # GNU General Public License for more details. # # A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder.$ +# be found in the LICENSES folder. # -ifeq ($(BUILD_PSAMPLE),1) -PSAMPLE_CFLAGS=-DPSAMPLE_SUPPORT -PSAMPLE_CB_OBJS=psample-cb.o -endif - ifneq ($(OUTPUT_DIR),) INCLUDES := -I$(OUTPUT_DIR)/knet/generated/include -I$(OUTPUT_DIR)/knet/generated endif @@ -40,9 +35,8 @@ ccflags-y := $(KNETCB_CPPFLAGS) $(LKM_CFLAGS) \ -I$(SDK)/linux/knet \ -I$(SDK)/linux/knet/generated/include \ -I$(SDK)/linux/knet/generated \ - $(INCLUDES) \ - $(PSAMPLE_CFLAGS) \ + $(INCLUDES) + linux_ngknetcb-y := $(SDK_PMD_KOBJS) \ - ngknetcb_main.o \ - $(PSAMPLE_CB_OBJS) + ngknetcb_main.o diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile index b23af7ed4e86..89829f06b537 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile @@ -1,5 +1,5 @@ # -# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. +# Copyright 2018-2024 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or @@ -12,28 +12,32 @@ # GNU General Public License for more details. # # A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder.$ +# be found in the LICENSES folder. # # Linux KNET Callback module. # -ifdef KPMD +# Include PMD library by default +ifneq (0,$(KPMD)) -BCMPKTDIR = $(SDK)/bcmpkt -KPMDDIR = $(SDK)/linux/knetcb -SHRDIR = $(SDK)/shr +# Kernel module source directory +KMODDIR = $(CURDIR) -.PHONY: mklinks rmlinks - -knetcb: mklinks - $(MAKE) all +# Avoid creating links in original kernel module source directory +GENDIR = $(KMODDIR)/generated +ifneq ($(OUTPUT_DIR),) +GENDIR = $(OUTPUT_DIR)/knet/generated/knetcb +endif +knetcb: kpmd + $(MAKE) -C $(GENDIR) all # SDK make helper for stand-alone PMD kernel module include $(SDK)/make/kpmd.mk -distclean:: rmlinks +distclean:: + rm -rf $(GENDIR) -endif #KPMD +endif # KPMD include Kbuild diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c index 0cfe939ac5fc..f7501cf2962f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c @@ -3,13 +3,12 @@ * NGKNET Callback module entry. */ /* - * $Copyright: (c) 2022 Broadcom. + * $Copyright: (c) 2024 Broadcom. * Broadcom Proprietary and Confidential. All rights reserved.$ */ #include #include -#include "psample-cb.h" #include "bcmcnet/bcmcnet_core.h" /*! \cond */ MODULE_AUTHOR("Broadcom Corporation"); @@ -97,6 +96,18 @@ dev_id_get(char* dev_type) { dev_id = 0xb993; } + else if (0== strcmp(dev_type, "bcm78900_b0")) + { + dev_id = 0xf900; + } + else if (0== strcmp(dev_type, "bcm78905_a0")) + { + dev_id = 0xf905; + } + else if (0== strcmp(dev_type, "bcm78800_a0")) + { + dev_id = 0xf800; + } return dev_id; } @@ -126,7 +137,7 @@ get_tag_status(char* dev_type, char* dev_var, void *meta) } #endif - if ((0xb880 == dev_id ) || (0xb780 == dev_id)) + if ((0xb880 == dev_id ) || (0xb780 == dev_id) || (0xf800 == dev_id)) { /* Field BCM_PKTIO_RXPMD_MATCH_ID_LO has tag status in RX PMD */ fd_index = 2; @@ -134,7 +145,8 @@ get_tag_status(char* dev_type, char* dev_var, void *meta) match_id_minbit = (dev_id == 0xb780) ? 2 : 1; outer_l2_hdr = (valptr[fd_index] >> match_id_minbit & 0xFF); outer_tag_match = (((dev_id == 0xb780) && - ((strncmp(dev_var, "DNA_", 4)) == 0)) ? 0x8 : 0x10); + (((strncmp(dev_var, "DNA_", 4)) == 0)|| + ((strncmp(dev_var, "HNA_", 4)) == 0))) ? 0x8 : 0x10); if (outer_l2_hdr & 0x1) { #ifdef KNET_CB_DEBUG if (debug & 0x1) { @@ -177,7 +189,8 @@ get_tag_status(char* dev_type, char* dev_var, void *meta) } } else if ((dev_id == 0xb990)|| (dev_id == 0xb996) || - (dev_id == 0xb999)|| (dev_id == 0xb993)) + (dev_id == 0xb999)|| (dev_id == 0xb993) || + (dev_id == 0xf900)|| (dev_id == 0xf905)) { fd_index = 9; valptr = (uint32_t *)meta; @@ -186,8 +199,14 @@ get_tag_status(char* dev_type, char* dev_var, void *meta) * says there's a tag, then we don't want to strip. * Otherwise, we do. */ - outer_l2_hdr = (valptr[fd_index] >> 13) & 3; - + if ((dev_id == 0xf900) || (dev_id == 0xf905)) + { + outer_l2_hdr = (valptr[fd_index]) & 1; + } + else + { + outer_l2_hdr = (valptr[fd_index] >> 13) & 3; + } if (outer_l2_hdr) { tag_status = 2; @@ -351,12 +370,9 @@ strip_tag_tx_cb(struct sk_buff *skb) } static struct sk_buff * -ngknet_rx_cb(struct net_device *dev, struct sk_buff *skb) +ngknet_rx_cb(struct sk_buff *skb) { skb = strip_tag_rx_cb(skb); -#ifdef PSAMPLE_SUPPORT - skb = psample_rx_cb(dev, skb); -#endif return skb; } @@ -367,26 +383,6 @@ ngknet_tx_cb(struct sk_buff *skb) return skb; } -static int -ngknet_netif_create_cb(struct net_device *dev) -{ - int retv = 0; -#ifdef PSAMPLE_SUPPORT - retv = psample_netif_create_cb(dev); -#endif - return retv; -} - -static int -ngknet_netif_destroy_cb(struct net_device *dev) -{ - int retv = 0; -#ifdef PSAMPLE_SUPPORT - retv = psample_netif_destroy_cb(dev); -#endif - return retv; -} - /*! * Generic module functions */ @@ -480,25 +476,12 @@ ngknetcb_init_module(void) ngknet_rx_cb_register(ngknet_rx_cb); ngknet_tx_cb_register(ngknet_tx_cb); -#ifdef PSAMPLE_SUPPORT - psample_init(); -#endif - - ngknet_netif_create_cb_register(ngknet_netif_create_cb); - ngknet_netif_destroy_cb_register(ngknet_netif_destroy_cb); return 0; } static void __exit ngknetcb_exit_module(void) { - ngknet_netif_create_cb_unregister(ngknet_netif_create_cb); - ngknet_netif_destroy_cb_unregister(ngknet_netif_destroy_cb); - -#ifdef PSAMPLE_SUPPORT - psample_cleanup(); -#endif - ngknet_rx_cb_unregister(ngknet_rx_cb); ngknet_tx_cb_unregister(ngknet_tx_cb); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.c b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.c deleted file mode 100755 index bdd116434611..000000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.c +++ /dev/null @@ -1,974 +0,0 @@ -/* - * Copyright 2017-2022 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - */ -/* - * $Id: psample_cb.c $ - * $Copyright: (c) 2019 Broadcom Corp. - * All Rights Reserved.$ - */ - -/* - * Driver for call-back functions for Linux KNET driver. - * - * This code is used to integrate packet sampling KNET callback to - * the psample infra for sending sampled pkts to userspace sflow - * applications such as Host Sflow (https://github.com/sflow/host-sflow) - * using genetlink interfaces. - * - * The module can be built from the standard Linux user mode target - * directories using the following command (assuming bash), e.g. - * - * cd $SDK/systems/linux/user/ - * make BUILD_KNET_CB=1 - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include "psample-cb.h" -#include "ngknet_main.h" - -#define PSAMPLE_CB_DBG -#ifdef PSAMPLE_CB_DBG -extern int debug; -#define PSAMPLE_CB_DBG_LVL_VERB (0x1) -#define PSAMPLE_CB_DBG_LVL_PMD (0x2) -#define PSAMPLE_CB_DBG_PRINT(...) if (debug & PSAMPLE_CB_DBG_LVL_VERB) { printk(__VA_ARGS__); } -#define PSAMPLE_CB_PMD_PRINT(...) if (debug & PSAMPLE_CB_DBG_LVL_PMD) { printk(__VA_ARGS__); } -#else -#define PSAMPLE_CB_DBG_PRINT(...) -#define PSAMPLE_CB_PMD_PRINT(...) -#endif - -#define FCS_SZ 4 -#define PSAMPLE_NLA_PADDING 4 -#define PSAMPLE_PKT_HANDLED (1) - -#define PSAMPLE_RATE_DFLT 1 -#define PSAMPLE_SIZE_DFLT 128 -static int psample_size = PSAMPLE_SIZE_DFLT; -module_param(psample_size, int, 0); -MODULE_PARM_DESC(psample_size, -"psample pkt size (default 128 bytes)"); - -#define PSAMPLE_QLEN_DFLT 1024 -static int psample_qlen = PSAMPLE_QLEN_DFLT; -module_param(psample_qlen, int, 0); -MODULE_PARM_DESC(psample_qlen, -"psample queue length (default 1024 buffers)"); - -#if !IS_ENABLED(CONFIG_PSAMPLE) -inline struct -psample_group *psample_group_get(struct net *net, u32 group_num) -{ - return NULL; -} -#endif - -/* driver proc entry root */ -static struct proc_dir_entry *psample_proc_root = NULL; -static struct proc_dir_entry *knet_cb_proc_root = NULL; - -/* psample general info */ -typedef struct { - struct list_head netif_list; - int netif_count; - struct net *netns; - spinlock_t lock; - int dcb_type; -} psample_info_t; -static psample_info_t g_psample_info = {0}; - -/* Maintain sampled pkt statistics */ -typedef struct psample_stats_s { - unsigned long pkts_f_psample_cb; - unsigned long pkts_f_psample_mod; - unsigned long pkts_f_handled; - unsigned long pkts_f_pass_through; - unsigned long pkts_f_dst_mc; - unsigned long pkts_c_qlen_cur; - unsigned long pkts_c_qlen_hi; - unsigned long pkts_d_qlen_max; - unsigned long pkts_d_no_mem; - unsigned long pkts_d_no_group; - unsigned long pkts_d_sampling_disabled; - unsigned long pkts_d_not_ready; - unsigned long pkts_d_metadata; - unsigned long pkts_d_skb; - unsigned long pkts_d_skb_cbd; - unsigned long pkts_d_meta_srcport; - unsigned long pkts_d_meta_dstport; - unsigned long pkts_d_invalid_size; -} psample_stats_t; -static psample_stats_t g_psample_stats = {0}; - -typedef struct psample_meta_s { - int trunc_size; - int src_ifindex; - int dst_ifindex; - int sample_rate; -} psample_meta_t; - -typedef struct psample_pkt_s { - struct list_head list; - struct psample_group *group; - psample_meta_t meta; - struct sk_buff *skb; -} psample_pkt_t; - -typedef struct psample_work_s { - struct list_head pkt_list; - struct work_struct wq; - spinlock_t lock; -} psample_work_t; -static psample_work_t g_psample_work = {0}; - -static psample_netif_t* -psample_netif_lookup_by_ifindex(int ifindex) -{ - struct list_head *list; - psample_netif_t *psample_netif = NULL; - unsigned long flags; - - /* look for port from list of available net_devices */ - spin_lock_irqsave(&g_psample_info.lock, flags); - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (psample_netif->dev->ifindex == ifindex) { - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return psample_netif; - } - } - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return (NULL); -} - -static psample_netif_t* -psample_netif_lookup_by_port(int port) __attribute__ ((unused)); -static psample_netif_t* -psample_netif_lookup_by_port(int port) -{ - struct list_head *list; - psample_netif_t *psample_netif = NULL; - unsigned long flags; - - /* look for port from list of available net_devices */ - spin_lock_irqsave(&g_psample_info.lock, flags); - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (psample_netif->port == port) { - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return psample_netif; - } - } - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return (NULL); -} - -static int -psample_meta_get(struct sk_buff *skb, psample_meta_t *sflow_meta) -{ - int src_ifindex = 0; - int sample_rate = 1; - int sample_size = PSAMPLE_SIZE_DFLT; - psample_netif_t *psample_netif = NULL; - const struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); - ngknet_netif_t *netif = cbd->netif; - memset(sflow_meta, 0, sizeof(psample_meta_t)); - - /* find src port */ - if ((psample_netif = psample_netif_lookup_by_ifindex(netif->id))) { - src_ifindex = psample_netif->dev->ifindex; - sample_rate = psample_netif->sample_rate; - sample_size = psample_netif->sample_size; - } else { - g_psample_stats.pkts_d_meta_srcport++; - PSAMPLE_CB_DBG_PRINT("%s: could not find psample netif for src dev %s (ifidx %d)\n", - __func__, netif->name, netif->id); - } - - sflow_meta->src_ifindex = src_ifindex; - sflow_meta->trunc_size = sample_size; - sflow_meta->sample_rate = sample_rate; - return (0); -} - -static void -psample_task(struct work_struct *work) -{ - psample_work_t *psample_work = container_of(work, psample_work_t, wq); - unsigned long flags; - struct list_head *list_ptr, *list_next; - psample_pkt_t *pkt; - - spin_lock_irqsave(&psample_work->lock, flags); - list_for_each_safe(list_ptr, list_next, &psample_work->pkt_list) { - /* dequeue pkt from list */ - pkt = list_entry(list_ptr, psample_pkt_t, list); - list_del(list_ptr); - g_psample_stats.pkts_c_qlen_cur--; - spin_unlock_irqrestore(&psample_work->lock, flags); - - /* send to psample */ - if (pkt) { -#if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \ - (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR)) - struct psample_metadata md = {0}; - md.trunc_size = pkt->meta.trunc_size; - md.in_ifindex = pkt->meta.src_ifindex; - md.out_ifindex = pkt->meta.dst_ifindex; -#endif - PSAMPLE_CB_DBG_PRINT("%s: group 0x%x, trunc_size %d, src_ifdx 0x%x, dst_ifdx 0x%x, sample_rate %d\n", - __func__, pkt->group->group_num, - pkt->meta.trunc_size, pkt->meta.src_ifindex, - pkt->meta.dst_ifindex, pkt->meta.sample_rate); - -#if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \ - (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR)) - psample_sample_packet(pkt->group, - pkt->skb, - pkt->meta.sample_rate, - &md); -#else - psample_sample_packet(pkt->group, - pkt->skb, - pkt->meta.trunc_size, - pkt->meta.src_ifindex, - pkt->meta.dst_ifindex, - pkt->meta.sample_rate); -#endif - g_psample_stats.pkts_f_psample_mod++; - - dev_kfree_skb_any(pkt->skb); - kfree(pkt); - } - spin_lock_irqsave(&psample_work->lock, flags); - } - spin_unlock_irqrestore(&psample_work->lock, flags); -} - -struct sk_buff* -psample_rx_cb(struct net_device *dev, struct sk_buff *skb) -{ - struct psample_group *group; - psample_meta_t meta; - int rv = 0, size; - const struct ngknet_callback_desc *cbd = NULL; - const struct ngknet_private *netif = NULL; - const struct ngknet_filter_s *filt = NULL; - const struct ngknet_filter_s *filt_src = NULL; - - if (!skb) { - printk("%s: skb is NULL\n", __func__); - g_psample_stats.pkts_d_skb++; - return (NULL); - } - cbd = NGKNET_SKB_CB(skb); - netif = netdev_priv(dev); - filt_src = cbd->filt; - filt = netif->filt_cb; - - if (!cbd || !netif || !filt_src) { - printk("%s: cbd(0x%p) or priv(0x%p) or filter src(0x%p) is NULL\n", - __func__, cbd, netif, filt_src); - g_psample_stats.pkts_d_skb_cbd++; - return (skb); - } - - /* Enable PMD output in dmesg: "echo "debug=0x2" > /proc/bcm/knet-cb/psample/debug" - * Use bshell cmd "pmddecode rxpmd ..." to decode pkt metadata - */ - if (debug & PSAMPLE_CB_DBG_LVL_PMD) { - char str[128]; - int i, len = cbd->pmd_len > 128? 128 : cbd->pmd_len; - PSAMPLE_CB_PMD_PRINT("PMD (%d bytes): %s\n", - cbd->pmd_len, skb->dev->name); - for (i=0; ipmd+i))); - if ((i & 0x1c) == 0x1c) { - sprintf(&str[strlen(str)], "\n"); - printk(str); - continue; - } - } - if ((i & 0x1f) != 0) { - sprintf(&str[strlen(str)], "\n"); - PSAMPLE_CB_PMD_PRINT(str); - } - } - - /* check if this packet is sampled packet (from sample filter) */ - if (!filt || - (NGKNET_FILTER_DEST_T_CB != filt->dest_type) || - (strncmp(filt->desc, PSAMPLE_CB_NAME, NGKNET_FILTER_DESC_MAX) != 0)) { - return (skb); - } - - PSAMPLE_CB_DBG_PRINT("%s: src dev %s, pkt size %d, filt->dest_id %d\n", - __func__, skb->dev->name, cbd->pkt_len, filt->dest_id); - g_psample_stats.pkts_f_psample_cb++; - - /* get psample group info. psample genetlink group ID passed in filt->dest_id */ - group = psample_group_get(g_psample_info.netns, filt->dest_id); - if (!group) { - printk("%s: Could not find psample genetlink group %d\n", __func__, filt->dest_id); - g_psample_stats.pkts_d_no_group++; - goto PSAMPLE_FILTER_CB_PKT_HANDLED; - } - - /* get psample metadata */ - rv = psample_meta_get(skb, &meta); - if (rv < 0) { - printk("%s: Could not parse pkt metadata\n", __func__); - g_psample_stats.pkts_d_metadata++; - goto PSAMPLE_FILTER_CB_PKT_HANDLED; - } - - /* Adjust original pkt size to remove 4B FCS */ - size = cbd->pkt_len; - if (size < FCS_SZ) { - g_psample_stats.pkts_d_invalid_size++; - goto PSAMPLE_FILTER_CB_PKT_HANDLED; - } else { - size -= FCS_SZ; - } - - /* Account for padding in libnl used by psample */ - if (meta.trunc_size >= size) { - meta.trunc_size = size - PSAMPLE_NLA_PADDING; - } - - PSAMPLE_CB_DBG_PRINT("%s: group 0x%x, trunc_size %d, src_ifdx 0x%x, dst_ifdx 0x%x, sample_rate %d\n", - __func__, group->group_num, meta.trunc_size, meta.src_ifindex, meta.dst_ifindex, meta.sample_rate); - - /* drop if configured sample rate is 0 */ - if (meta.sample_rate > 0) { - unsigned long flags; - psample_pkt_t *psample_pkt; - struct sk_buff *skb_psample; - - if (g_psample_stats.pkts_c_qlen_cur >= psample_qlen) { - printk("%s: tail drop due to max qlen %d reached\n", __func__, psample_qlen); - g_psample_stats.pkts_d_qlen_max++; - goto PSAMPLE_FILTER_CB_PKT_HANDLED; - } - - if ((psample_pkt = kmalloc(sizeof(psample_pkt_t), GFP_ATOMIC)) == NULL) { - printk("%s: failed to alloc psample mem for pkt\n", __func__); - g_psample_stats.pkts_d_no_mem++; - goto PSAMPLE_FILTER_CB_PKT_HANDLED; - } - memcpy(&psample_pkt->meta, &meta, sizeof(psample_meta_t)); - psample_pkt->group = group; - - if ((skb_psample = dev_alloc_skb(meta.trunc_size)) == NULL) { - printk("%s: failed to alloc psample mem for pkt skb\n", __func__); - g_psample_stats.pkts_d_no_mem++; - goto PSAMPLE_FILTER_CB_PKT_HANDLED; - } - - /* setup skb to point to pkt */ - memcpy(skb_psample->data, skb->data, meta.trunc_size); - skb_put(skb_psample, meta.trunc_size); - skb_psample->len = meta.trunc_size; - psample_pkt->skb = skb_psample; - - spin_lock_irqsave(&g_psample_work.lock, flags); - list_add_tail(&psample_pkt->list, &g_psample_work.pkt_list); - - g_psample_stats.pkts_c_qlen_cur++; - if (g_psample_stats.pkts_c_qlen_cur > g_psample_stats.pkts_c_qlen_hi) { - g_psample_stats.pkts_c_qlen_hi = g_psample_stats.pkts_c_qlen_cur; - } - - schedule_work(&g_psample_work.wq); - spin_unlock_irqrestore(&g_psample_work.lock, flags); - } else { - g_psample_stats.pkts_d_sampling_disabled++; - } - -PSAMPLE_FILTER_CB_PKT_HANDLED: - g_psample_stats.pkts_f_pass_through++; - return skb; -} - -int -psample_netif_create_cb(struct net_device *dev) -{ - int found; - struct list_head *list; - psample_netif_t *psample_netif, *lpsample_netif; - unsigned long flags; - struct ngknet_private *netif = NULL; - - if (!dev) { - printk("%s: net_device is NULL\n", __func__); - return (-1); - } - netif = netdev_priv(dev); - - if ((psample_netif = kmalloc(sizeof(psample_netif_t), GFP_ATOMIC)) == NULL) { - printk("%s: failed to alloc psample mem for netif '%s'\n", - __func__, dev->name); - return (-1); - } - - spin_lock_irqsave(&g_psample_info.lock, flags); - - psample_netif->dev = dev; - psample_netif->id = netif->netif.id; - /*Application has encoded the port in netif user data 0 & 1 */ - if (netif->netif.type == NGKNET_NETIF_T_PORT) - { - psample_netif->port = netif->netif.user_data[0]; - psample_netif->port |= netif->netif.user_data[1] << 8; - } - psample_netif->vlan = netif->netif.vlan; - psample_netif->sample_rate = PSAMPLE_RATE_DFLT; - psample_netif->sample_size = PSAMPLE_SIZE_DFLT; - printk("\r\n Type %d vlan %d", netif->netif.type, psample_netif->vlan); - /* insert netif sorted by ID similar to bkn_knet_netif_create() */ - found = 0; - list_for_each(list, &g_psample_info.netif_list) { - lpsample_netif = (psample_netif_t*)list; - if (netif->netif.id < lpsample_netif->id) { - found = 1; - g_psample_info.netif_count++; - break; - } - } - - if (found) { - /* Replace previously removed interface */ - list_add_tail(&psample_netif->list, &lpsample_netif->list); - } else { - /* No holes - add to end of list */ - list_add_tail(&psample_netif->list, &g_psample_info.netif_list); - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - - PSAMPLE_CB_DBG_PRINT("%s: added psample netif '%s'\n", __func__, dev->name); - return (0); -} - -int -psample_netif_destroy_cb(struct net_device *dev) -{ - int found; - struct list_head *list; - psample_netif_t *psample_netif; - unsigned long flags; - struct ngknet_private *netif = NULL; - - if (!dev) { - printk("%s: net_device is NULL\n", __func__); - return (-1); - } - netif = netdev_priv(dev); - - spin_lock_irqsave(&g_psample_info.lock, flags); - - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (netif->netif.id == psample_netif->id) { - found = 1; - list_del(&psample_netif->list); - PSAMPLE_CB_DBG_PRINT("%s: removing psample netif '%s'\n", __func__, dev->name); - kfree(psample_netif); - g_psample_info.netif_count--; - break; - } - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - - if (!found) { - return (-1); - } - return (0); -} - -/* - * psample rate Proc Read Entry - */ -static int -psample_proc_rate_show(struct seq_file *m, void *v) -{ - struct list_head *list; - psample_netif_t *psample_netif; - unsigned long flags; - - spin_lock_irqsave(&g_psample_info.lock, flags); - - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - seq_printf(m, " %-14s %d\n", psample_netif->dev->name, psample_netif->sample_rate); - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - - return 0; -} - -static int -psample_proc_rate_open(struct inode * inode, struct file * file) -{ - return single_open(file, psample_proc_rate_show, NULL); -} - -/* - * psample rate Proc Write Entry - * - * Syntax: - * = - * - * Where is a virtual network interface name. - * - * Examples: - * eth4=1000 - */ -static ssize_t -psample_proc_rate_write(struct file *file, const char *buf, - size_t count, loff_t *loff) -{ - int found; - struct list_head *list; - psample_netif_t *psample_netif; - char sample_str[40], *ptr, *newline; - unsigned long flags; - - - if (count > sizeof(sample_str)) { - count = sizeof(sample_str) - 1; - sample_str[count] = '\0'; - } - if (copy_from_user(sample_str, buf, count)) { - return -EFAULT; - } - sample_str[count] = 0; - newline = strchr(sample_str, '\n'); - if (newline) { - /* Chop off the trailing newline */ - *newline = '\0'; - } - - if ((ptr = strchr(sample_str, '=')) == NULL && - (ptr = strchr(sample_str, ':')) == NULL) { - printk("Error: Pkt sample rate syntax not recognized: '%s'\n", sample_str); - return count; - } - *ptr++ = 0; - - spin_lock_irqsave(&g_psample_info.lock, flags); - - found = 0; - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (strcmp(psample_netif->dev->name, sample_str) == 0) { - psample_netif->sample_rate = simple_strtol(ptr, NULL, 10); - // TODO MLI@BRCM - check valid sample rate - found = 1; - break; - } - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - - if (!found) { - printk("Warning: Failed setting psample rate on unknown network interface: '%s'\n", sample_str); - } - return count; -} - -struct proc_ops psample_proc_rate_file_ops = { - PROC_OWNER(THIS_MODULE) - .proc_open = psample_proc_rate_open, - .proc_read = seq_read, - .proc_lseek = seq_lseek, - .proc_write = psample_proc_rate_write, - .proc_release = single_release, -}; - -/* - * psample size Proc Read Entry - */ -static int -psample_proc_size_show(struct seq_file *m, void *v) -{ - struct list_head *list; - psample_netif_t *psample_netif; - unsigned long flags; - - spin_lock_irqsave(&g_psample_info.lock, flags); - - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - seq_printf(m, " %-14s %d\n", psample_netif->dev->name, psample_netif->sample_size); - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return 0; -} - -static int -psample_proc_size_open(struct inode * inode, struct file * file) -{ - return single_open(file, psample_proc_size_show, NULL); -} - -/* - * psample size Proc Write Entry - * - * Syntax: - * = - * - * Where is a virtual network interface name. - * - * Examples: - * eth4=128 - */ -static ssize_t -psample_proc_size_write(struct file *file, const char *buf, - size_t count, loff_t *loff) -{ - int found; - struct list_head *list; - psample_netif_t *psample_netif; - char sample_str[40], *ptr, *newline; - unsigned long flags; - - if (count > sizeof(sample_str)) { - count = sizeof(sample_str) - 1; - sample_str[count] = '\0'; - } - if (copy_from_user(sample_str, buf, count)) { - return -EFAULT; - } - sample_str[count] = 0; - newline = strchr(sample_str, '\n'); - if (newline) { - /* Chop off the trailing newline */ - *newline = '\0'; - } - - if ((ptr = strchr(sample_str, '=')) == NULL && - (ptr = strchr(sample_str, ':')) == NULL) { - printk("Error: Pkt sample size syntax not recognized: '%s'\n", sample_str); - return count; - } - *ptr++ = 0; - - spin_lock_irqsave(&g_psample_info.lock, flags); - - found = 0; - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (strcmp(psample_netif->dev->name, sample_str) == 0) { - psample_netif->sample_size = simple_strtol(ptr, NULL, 10); - // TODO MLI@BRCM - check valid sample size - found = 1; - break; - } - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - - if (!found) { - printk("Warning: Failed setting psample size on unknown network interface: '%s'\n", sample_str); - } - return count; -} - -struct proc_ops psample_proc_size_file_ops = { - PROC_OWNER(THIS_MODULE) - .proc_open = psample_proc_size_open, - .proc_read = seq_read, - .proc_lseek = seq_lseek, - .proc_write = psample_proc_size_write, - .proc_release = single_release, -}; - -/* - * psample map Proc Read Entry - */ -static int -psample_proc_map_show(struct seq_file *m, void *v) -{ - struct list_head *list; - psample_netif_t *psample_netif; - unsigned long flags; - - seq_printf(m, " Interface logical port ifindex\n"); - seq_printf(m, "------------- ------------ -------\n"); - spin_lock_irqsave(&g_psample_info.lock, flags); - - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - seq_printf(m, " %-14s %-14d %d\n", - psample_netif->dev->name, - psample_netif->port, - psample_netif->dev->ifindex); - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return 0; -} - -static int -psample_proc_map_open(struct inode * inode, struct file * file) -{ - return single_open(file, psample_proc_map_show, NULL); -} - -struct proc_ops psample_proc_map_file_ops = { - PROC_OWNER(THIS_MODULE) - .proc_open = psample_proc_map_open, - .proc_read = seq_read, - .proc_lseek = seq_lseek, - .proc_write = NULL, - .proc_release = single_release, -}; - -/* - * psample debug Proc Read Entry - */ -static int -psample_proc_debug_show(struct seq_file *m, void *v) -{ - seq_printf(m, "BCM KNET %s Callback Config\n", PSAMPLE_CB_NAME); - seq_printf(m, " debug: 0x%x\n", debug); - seq_printf(m, " dcb_type: %d\n", g_psample_info.dcb_type); - seq_printf(m, " netif_count: %d\n", g_psample_info.netif_count); - seq_printf(m, " queue length: %d\n", psample_qlen); - - return 0; -} - -static int -psample_proc_debug_open(struct inode * inode, struct file * file) -{ - return single_open(file, psample_proc_debug_show, NULL); -} - -/* - * psample debug Proc Write Entry - * - * Syntax: - * debug= - * - * Where corresponds to the debug module parameter. - * - * Examples: - * debug=0x1 - */ -static ssize_t -psample_proc_debug_write(struct file *file, const char *buf, - size_t count, loff_t *loff) -{ - char debug_str[40]; - char *ptr; - - if (count > sizeof(debug_str)) { - count = sizeof(debug_str) - 1; - debug_str[count] = '\0'; - } - if (copy_from_user(debug_str, buf, count)) { - return -EFAULT; - } - - if ((ptr = strstr(debug_str, "debug=")) != NULL) { - ptr += 6; - debug = simple_strtol(ptr, NULL, 0); - } else { - printk("Warning: unknown configuration setting\n"); - } - - return count; -} - -struct proc_ops psample_proc_debug_file_ops = { - PROC_OWNER(THIS_MODULE) - .proc_open = psample_proc_debug_open, - .proc_read = seq_read, - .proc_lseek = seq_lseek, - .proc_write = psample_proc_debug_write, - .proc_release = single_release, -}; - -static int -psample_proc_stats_show(struct seq_file *m, void *v) -{ - seq_printf(m, "BCM KNET %s Callback Stats\n", PSAMPLE_CB_NAME); - seq_printf(m, " DCB type %d\n", g_psample_info.dcb_type); - seq_printf(m, " pkts filter psample cb %10lu\n", g_psample_stats.pkts_f_psample_cb); - seq_printf(m, " pkts sent to psample module %10lu\n", g_psample_stats.pkts_f_psample_mod); - seq_printf(m, " pkts handled by psample %10lu\n", g_psample_stats.pkts_f_handled); - seq_printf(m, " pkts pass through %10lu\n", g_psample_stats.pkts_f_pass_through); - seq_printf(m, " pkts with mc destination %10lu\n", g_psample_stats.pkts_f_dst_mc); - seq_printf(m, " pkts current queue length %10lu\n", g_psample_stats.pkts_c_qlen_cur); - seq_printf(m, " pkts high queue length %10lu\n", g_psample_stats.pkts_c_qlen_hi); - seq_printf(m, " pkts drop max queue length %10lu\n", g_psample_stats.pkts_d_qlen_max); - seq_printf(m, " pkts drop no memory %10lu\n", g_psample_stats.pkts_d_no_mem); - seq_printf(m, " pkts drop no psample group %10lu\n", g_psample_stats.pkts_d_no_group); - seq_printf(m, " pkts drop sampling disabled %10lu\n", g_psample_stats.pkts_d_sampling_disabled); - seq_printf(m, " pkts drop psample not ready %10lu\n", g_psample_stats.pkts_d_not_ready); - seq_printf(m, " pkts drop metadata parse error %10lu\n", g_psample_stats.pkts_d_metadata); - seq_printf(m, " pkts drop skb error %10lu\n", g_psample_stats.pkts_d_skb); - seq_printf(m, " pkts drop skb cbd error %10lu\n", g_psample_stats.pkts_d_skb_cbd); - seq_printf(m, " pkts with invalid src port %10lu\n", g_psample_stats.pkts_d_meta_srcport); - seq_printf(m, " pkts with invalid dst port %10lu\n", g_psample_stats.pkts_d_meta_dstport); - seq_printf(m, " pkts with invalid orig pkt sz %10lu\n", g_psample_stats.pkts_d_invalid_size); - return 0; -} - -static int -psample_proc_stats_open(struct inode * inode, struct file * file) -{ - return single_open(file, psample_proc_stats_show, NULL); -} - -/* - * psample stats Proc Write Entry - * - * Syntax: - * write any value to clear stats - */ -static ssize_t -psample_proc_stats_write(struct file *file, const char *buf, - size_t count, loff_t *loff) -{ - int qlen_cur = 0; - unsigned long flags; - - spin_lock_irqsave(&g_psample_work.lock, flags); - qlen_cur = g_psample_stats.pkts_c_qlen_cur; - memset(&g_psample_stats, 0, sizeof(psample_stats_t)); - g_psample_stats.pkts_c_qlen_cur = qlen_cur; - spin_unlock_irqrestore(&g_psample_work.lock, flags); - - return count; -} -struct proc_ops psample_proc_stats_file_ops = { - PROC_OWNER(THIS_MODULE) - .proc_open = psample_proc_stats_open, - .proc_read = seq_read, - .proc_lseek = seq_lseek, - .proc_write = psample_proc_stats_write, - .proc_release = single_release, -}; - -int psample_cleanup(void) -{ - cancel_work_sync(&g_psample_work.wq); - remove_proc_entry("stats", psample_proc_root); - remove_proc_entry("rate", psample_proc_root); - remove_proc_entry("size", psample_proc_root); - remove_proc_entry("debug", psample_proc_root); - remove_proc_entry("map" , psample_proc_root); - remove_proc_entry("psample", knet_cb_proc_root); - remove_proc_entry("bcm/knet-cb", NULL); - remove_proc_entry("bcm", NULL); - return 0; -} - -int psample_init(void) -{ - #define PROCFS_MAX_PATH 1024 - char psample_procfs_path[PROCFS_MAX_PATH]; - struct proc_dir_entry *entry; - - /* initialize proc files (for ngknet) */ - proc_mkdir("bcm", NULL); - - /* create procfs for psample */ - snprintf(psample_procfs_path, PROCFS_MAX_PATH, "bcm/knet-cb"); - knet_cb_proc_root = proc_mkdir(psample_procfs_path, NULL); - snprintf(psample_procfs_path, PROCFS_MAX_PATH, "%s/%s", psample_procfs_path, PSAMPLE_CB_NAME); - psample_proc_root = proc_mkdir(psample_procfs_path, NULL); - - /* create procfs for psample stats */ - PROC_CREATE(entry, "stats", 0666, psample_proc_root, &psample_proc_stats_file_ops); - if (entry == NULL) { - printk("%s: Unable to create procfs entry '/procfs/%s/stats'\n", __func__, psample_procfs_path); - return -1; - } - - /* create procfs for setting sample rates */ - PROC_CREATE(entry, "rate", 0666, psample_proc_root, &psample_proc_rate_file_ops); - if (entry == NULL) { - printk("%s: Unable to create procfs entry '/procfs/%s/rate'\n", __func__, psample_procfs_path); - return -1; - } - - /* create procfs for setting sample size */ - PROC_CREATE(entry, "size", 0666, psample_proc_root, &psample_proc_size_file_ops); - if (entry == NULL) { - printk("%s: Unable to create procfs entry '/procfs/%s/size'\n", __func__, psample_procfs_path); - return -1; - } - - /* create procfs for getting netdev mapping */ - PROC_CREATE(entry, "map", 0666, psample_proc_root, &psample_proc_map_file_ops); - if (entry == NULL) { - printk("%s: Unable to create procfs entry '/procfs/%s/map'\n", __func__, psample_procfs_path); - return -1; - } - - /* create procfs for debug log */ - PROC_CREATE(entry, "debug", 0666, psample_proc_root, &psample_proc_debug_file_ops); - if (entry == NULL) { - printk("%s: Unable to create procfs entry '/procfs/%s/debug'\n", __func__, psample_procfs_path); - return -1; - } - - /* clear data structs */ - memset(&g_psample_stats, 0, sizeof(psample_stats_t)); - memset(&g_psample_info, 0, sizeof(psample_info_t)); - memset(&g_psample_work, 0, sizeof(psample_work_t)); - - /* FIXME: How to get DCB type from NGKNET? */ - //g_psample_info.dcb_type - - /* setup psample_info struct */ - INIT_LIST_HEAD(&g_psample_info.netif_list); - spin_lock_init(&g_psample_info.lock); - - /* setup psample work queue */ - spin_lock_init(&g_psample_work.lock); - INIT_LIST_HEAD(&g_psample_work.pkt_list); - INIT_WORK(&g_psample_work.wq, psample_task); - - /* get net namespace */ - g_psample_info.netns = get_net_ns_by_pid(current->pid); - if (!g_psample_info.netns) { - printk("%s: Could not get network namespace for pid %d\n", __func__, current->pid); - return (-1); - } - PSAMPLE_CB_DBG_PRINT("%s: current->pid %d, netns 0x%p, sample_size %d\n", __func__, - current->pid, g_psample_info.netns, psample_size); - - - return 0; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.h b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.h deleted file mode 100755 index d89c5f4178bb..000000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Copyright 2022 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - */ -/* - * $Id: psample_cb.h $ - * $Copyright: (c) 2019 Broadcom Corp. - * All Rights Reserved.$ - */ -#ifndef __PSAMPLE_CB_H__ -#define __PSAMPLE_CB_H__ - -#include -#include - -//#define PSAMPLE_SUPPORT 1 // TODO: MLI@BRCM - Add this as part of conditional in Makefile -#define PSAMPLE_CB_NAME "psample" - -extern int -psample_init(void); - -extern int -psample_cleanup(void); - -extern struct sk_buff* -psample_rx_cb(struct net_device *dev, struct sk_buff *skb); - -/* psample data per interface */ -typedef struct { - struct list_head list; - struct net_device *dev; - uint16_t id; - uint16_t port; - uint16_t vlan; - uint16_t qnum; - uint32_t sample_rate; - uint32_t sample_size; -} psample_netif_t; - -extern int -psample_netif_create_cb(struct net_device *dev); - -extern int -psample_netif_destroy_cb(struct net_device *dev); - -#endif /* __PSAMPLE_CB_H__ */ diff --git a/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk b/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk new file mode 100644 index 000000000000..cc89a930e037 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk @@ -0,0 +1,181 @@ +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# +# Helper makefile for building stand-alone PMD kernel module +# + +# SDK make utilities +include $(SDK)/make/makeutils.mk + +# SDK source directories +SHRDIR = $(SDK)/shr +BCMPKTDIR = $(SDK)/bcmpkt +BCMPKTIDIR = $(BCMPKTDIR)/include/bcmpkt + +# Create links locally if no GENDIR was specified +ifeq (,$(GENDIR)) +GENDIR = $(KMODDIR) +endif + +# +# Suppress symlink error messages. +# +# Note that we do not use "ln -f" as this may cause failures if +# multiple builds are done in parallel on the same source tree. +# +R = 2>/dev/null + +mklinks: config + mkdir -p $(GENDIR) + -ln -s $(BCMPKTDIR)/chip/*/*lbhdr.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/chip/*/*rxpmd.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/chip/*/*rxpmd_field.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/chip/*/*txpmd.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/lbpmd/bcmpkt_lbhdr.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/rxpmd/bcmpkt_rxpmd.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/rxpmd/bcmpkt_rxpmd_match_id.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/txpmd/bcmpkt_txpmd.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/flexhdr/bcmpkt_flexhdr.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/include/bcmpkt/bcmpkt_flexhdr_field.h $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/xfcr/*/*/*.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/ltt_stub/*/*/*/*.c $(GENDIR) $(R) + -ln -s $(SHRDIR)/bitop/shr_bitop_range_clear.c $(GENDIR) $(R) + -ln -s $(KMODDIR)/*.[ch] $(GENDIR) $(R) + -ln -s $(KMODDIR)/Makefile $(GENDIR) $(R) + -ln -s $(KMODDIR)/Kbuild $(GENDIR) $(R) + +rmlinks: + -rm -f $(GENDIR)/bcm* + -rm -f $(GENDIR)/shr* + +# FLTG tools directory (not present in GPL package) +FLTG_DIR := $(SDK)/tools/fltg + +# GPL release does not contain FLTG tools +ifneq (,$(wildcard $(FLTG_DIR))) +HAS_FLTG := 1 +endif + +# File indicating that the FLTG build is complete +FLTG_DONE := $(FLTG_DIR)/generated/ltt.sum + +# If not GPL, check that FLTG files have been generated +config: +ifeq (1,$(HAS_FLTG)) + @echo Updating SDK configuration for PMD library + $(MAKE) -C $(SDK) config +endif + +# If not GPL, extract default variant name +ifeq (1,$(HAS_FLTG)) +include $(SDK)/make/defvar.mk +endif + +kpmd: mklinks + +distclean:: rmlinks + +.PHONY: mklinks rmlinks config kpmd distclean + +ALL_CHIPS := $(subst $(BCMPKTDIR)/chip/,,$(wildcard $(BCMPKTDIR)/chip/bcm*)) +VAR_CHIPS := $(subst $(BCMPKTDIR)/xfcr/,,$(wildcard $(BCMPKTDIR)/xfcr/bcm*)) + +# Set options for partial build support. Note that this will define +# both SDK_CHIPS_UC and SDK_VARIANTS_UC, which are used below. +include $(SDK)/make/partial.mk + +# Set PMD_CHIPS and VARIANT_DIRS +ifdef SDK_CHIPS +PMD_CHIPS := $(call var_lc,$(SDK_CHIPS_UC)) +ifdef SDK_VARIANTS +# Both SDK_CHIPS and SDK_VARIANTS +SDK_VARIANTS_LC := $(call var_lc,$(SDK_VARIANTS_UC)) +TMP_ALL_VAR_DIRS = $(foreach K, $(PMD_CHIPS),$(filter-out $(SDK_VARIANTS_LC),\ + $(wildcard $(BCMPKTDIR)/xfcr/$(K)/*))) +VARIANT_DIRS := $(foreach K, $(PMD_CHIPS),$(foreach V, $(SDK_VARIANTS_LC),\ + $(findstring $(BCMPKTDIR)/xfcr/$K/$V,$(TMP_ALL_VAR_DIRS)))) +else +# SDK_CHIPS only +VARIANT_DIRS := $(foreach K, $(PMD_CHIPS),\ + $(wildcard $(BCMPKTDIR)/xfcr/$(K)/* -type d)) +# If SDK_VARIANTS is not defined but SDK_CHIPS is defined, we want all +# variants for the chips so set SDK_VARIANTS for the partial build to +# work correctly. +SDK_VARIANTS_SPC := $(foreach D, $(VARIANT_DIRS),$(lastword $(subst /, ,$D))) +SDK_VARIANTS_LC := $(call var_lc,$(SDK_VARIANTS_SPC)) +SDK_VARIANTS := $(SDK_VARIANTS_LC) +endif # SDK_VARIANTS +else +# Neither SDK_VARIANTS or SDK_CHIPS +PMD_CHIPS := $(ALL_CHIPS) +VARIANT_DIRS := $(foreach K, $(filter $(VAR_CHIPS),$(PMD_CHIPS)),\ + $(wildcard $(BCMPKTDIR)/xfcr/$(K)/* -type d)) +endif # SDK_CHIPS + +ifdef SDK_CHIPS +KNETCB_CPPFLAGS := -DKPMD $(SDK_CPPFLAGS) +endif + +ifdef SDK_VARIANTS +override KNETCB_CPPFLAGS := -DKPMD $(SDK_CPPFLAGS) +endif + +KNETCB_CPPFLAGS += -DKPMD +export KNETCB_CPPFLAGS + +PMD_FLEX_CHIPS := $(filter $(PMD_CHIPS),$(sort $(foreach D, $(VARIANT_DIRS), \ + $(lastword $(filter-out $(lastword $(subst /, ,$D)),$(subst /, ,$D)))))) + +CHIP_SRCS := $(addsuffix _pkt_lbhdr.c,$(PMD_CHIPS)) +CHIP_SRCS += $(addsuffix _pkt_rxpmd.c,$(PMD_CHIPS)) +ifneq (,$(PMD_FLEX_CHIPS)) +CHIP_SRCS += $(addsuffix _pkt_rxpmd_field.c,$(PMD_FLEX_CHIPS)) +endif +CHIP_SRCS += $(addsuffix _pkt_txpmd.c,$(PMD_CHIPS)) + +VARIANTS := $(subst /,_, $(subst $(BCMPKTDIR)/xfcr/,,$(sort $(VARIANT_DIRS)))) +CHIP_SRCS += $(addsuffix _pkt_flexhdr.c,$(VARIANTS)) +CHIP_SRCS += $(addsuffix _bcmpkt_rxpmd_match_id.c,$(VARIANTS)) + +ifneq (,$(wildcard $(BCMPKTDIR)/ltt_stub/*)) +STUB_DIRS := $(sort $(shell find $(BCMPKTDIR)/ltt_stub -mindepth 3 -type d)) +endif +ifneq (,$(STUB_DIRS)) +STUB_VARS := $(subst /,_, $(subst $(BCMPKTDIR)/ltt_stub/generated/,,$(sort $(STUB_DIRS)))) +CHIP_SRCS += $(addsuffix _pkt_flexhdr.c,$(STUB_VARS)) +CHIP_SRCS += $(addsuffix _bcmpkt_rxpmd_match_id.c,$(STUB_VARS)) +endif + +CHIP_OBJS ?= $(patsubst %.c, %.o, $(CHIP_SRCS)) + +SDK_PMD_KFLAGS := -DSAL_LINUX \ + -I$(SDK)/sal/include \ + -I$(SDK)/bcmltd/include \ + -I$(SDK)/bcmlrd/include \ + -I$(SDK)/bcmdrd/include \ + -I$(SDK)/bcmpkt/include +export SDK_PMD_KFLAGS + +COMMON_SRCS := bcmpkt_lbhdr.c +COMMON_SRCS += bcmpkt_rxpmd.c +COMMON_SRCS += bcmpkt_rxpmd_match_id.c +COMMON_SRCS += bcmpkt_txpmd.c +COMMON_SRCS += bcmpkt_flexhdr.c +COMMON_SRCS += shr_bitop_range_clear.c + +SDK_PMD_KOBJS ?= $(patsubst %.c, %.o, $(COMMON_SRCS) $(CHIP_SRCS)) +export SDK_PMD_KOBJS diff --git a/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk b/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk index f565514a1123..2e892414637c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk +++ b/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk @@ -1,5 +1,5 @@ # -# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. +# Copyright 2018-2024 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or @@ -12,7 +12,7 @@ # GNU General Public License for more details. # # A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder.$ +# be found in the LICENSES folder. # # Shared makefile include for building Linux kernel modules. # @@ -36,7 +36,11 @@ ifneq ($(LKM_BLDDIR),) # output as we want it. # MDIR := $(LKM_BLDDIR) -MSRCS := $(patsubst %.o,%.c,$($(MOD_NAME)-y)) +MOBJS := $($(MOD_NAME)-y) +ifeq (,$(MOBJS)) +MOBJS := $(obj-m) +endif +MSRCS := $(patsubst %.o,%.c,$(MOBJS)) MSRCS += Makefile Kbuild BSRCS := $(addprefix $(PWD)/,$(MSRCS)) else diff --git a/platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk b/platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk new file mode 100644 index 000000000000..303b831080d7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk @@ -0,0 +1,42 @@ +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# +# Various make utility functions. +# + +ifneq (1,MAKEUTILS) +MAKEUTILS := 1 + +# Change comma-separated list to space-separated list +comma = , +empty = +space = $(empty) $(empty) +spc_sep = $(subst $(comma),$(space),$1) +comma_sep = $(subst $(space),$(comma),$1) + +# Convert chip name to uppercase +chip_uc = $(subst a,A,$(subst b,B,$(subst c,C,$(subst m,M,$1)))) + +# Convert chip name to lowercase +chip_lc = $(subst A,a,$(subst B,b,$(subst C,c,$(subst M,m,$1)))) + +# Convert chip variant name to uppercase +var_uc = $(shell echo $1 | tr a-z A-Z) + +# Convert chip variant name to lowercase +var_lc = $(shell echo $1 | tr A-Z a-z) + +endif diff --git a/platform/broadcom/saibcm-modules/sdklt/make/partial.mk b/platform/broadcom/saibcm-modules/sdklt/make/partial.mk new file mode 100644 index 000000000000..5291f705b56f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/make/partial.mk @@ -0,0 +1,65 @@ +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# +# SDK partial build support +# + +include $(SDK)/make/makeutils.mk + +# +# If SDK_CHIPS is defined, then exclude any chip which is not part of +# this list. Note that bond-option chips must be added via SDK_SKUS +# separately if needed. +# +ifneq (,$(SDK_CHIPS)) +# Create space-separated uppercase version of chip list +SDK_CHIPS_SPC := $(call spc_sep,$(SDK_CHIPS)) +SDK_CHIPS_UC := $(call chip_uc,$(SDK_CHIPS_SPC)) +endif +ifneq (,$(SDK_SKUS)) +# Create space-separated uppercase version of SKU list +SDK_SKUS_SPC := $(call spc_sep,$(SDK_SKUS)) +SDK_SKUS_UC := $(call chip_uc,$(SDK_SKUS_SPC)) +endif + +# +# If SDK_VARIANTS is defined, then exclude any chip variant which is +# not part of this list. +# +ifneq (,$(SDK_VARIANTS)) +# Create space-separated uppercase version of chip variant list +SDK_VARIANTS_SPC := $(call spc_sep,$(SDK_VARIANTS)) +SDK_VARIANTS_UC := $(call var_uc,$(SDK_VARIANTS_SPC)) +endif + +ifneq (,$(SDK_CHIPS)) +CHIP_CPPFLAGS := CHIP_DEFAULT=0 $(addsuffix =1,$(SDK_CHIPS_UC) $(SDK_SKUS_UC)) +CHIP_CPPFLAGS := $(addprefix -DBCMDRD_CONFIG_INCLUDE_,$(CHIP_CPPFLAGS)) +TMP_CPPFLAGS := $(filter-out $(CHIP_CPPFLAGS),$(SDK_CPPFLAGS)) +override SDK_CPPFLAGS := $(TMP_CPPFLAGS) $(CHIP_CPPFLAGS) +ifdef SDK_VARIANTS +VAR_CPPFLAGS := VARIANT_DEFAULT=0 +VAR_CPPFLAGS += $(foreach C,$(SDK_CHIPS_UC),$(addprefix $(C)_,$(addsuffix =1,$(SDK_VARIANTS_UC)))) +VAR_CPPFLAGS := $(addprefix -DBCMLTD_CONFIG_INCLUDE_,$(VAR_CPPFLAGS)) +TMP_CPPFLAGS := $(filter-out $(VAR_CPPFLAGS),$(SDK_CPPFLAGS)) +override SDK_CPPFLAGS := $(TMP_CPPFLAGS) $(VAR_CPPFLAGS) +endif # SDK_VARIANTS +else +# If SDK_VARIANTS is defined, but SDK_CHIPS is not. +ifneq (,$(SDK_VARIANTS)) +$(error 'Specifying SDK_VARIANTS requires a non-empty SDK_CHIPS') +endif # SDK_VARIANTS +endif # SDK_CHIPS diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h new file mode 100644 index 000000000000..f892de4364d3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h @@ -0,0 +1,268 @@ +/*! \file sal_libc.h + * + * STandard C functions. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef SAL_LIBC_H +#define SAL_LIBC_H + +#include + +/* System MUST supply stdarg.h */ +#ifndef SAL_LINUX +#include +#endif + +/*! + * \cond SAL_STDC + * + * Standard C library functions. + */ + +#ifndef sal_memcmp +extern int sal_memcmp(const void *s1, const void *s2, size_t cnt); +#endif + +#ifndef sal_memcpy +extern void *sal_memcpy(void *dest, const void *src, size_t cnt); +#endif + +#ifndef sal_memset +extern void *sal_memset(void *dest, int c, size_t cnt); +#endif + +#ifndef sal_memmove +extern void *sal_memmove(void *dest, const void *src, size_t cnt); +#endif + +#ifndef sal_strcpy +extern char *sal_strcpy(char *dest, const char *src); +#endif + +#ifndef sal_strncpy +extern char *sal_strncpy(char *dest, const char *src, size_t cnt); +#endif + +#ifndef sal_strlen +extern size_t sal_strlen(const char *str); +#endif + +#ifndef sal_strcmp +extern int sal_strcmp(const char *dest, const char *src); +#endif + +#ifndef sal_strncmp +extern int sal_strncmp(const char *dest, const char *src, size_t cnt); +#endif + +#ifndef sal_strchr +extern char *sal_strchr(const char *dest, int c); +#endif + +#ifndef sal_strrchr +extern char *sal_strrchr(const char *dest, int c); +#endif + +#ifndef sal_strstr +extern char *sal_strstr(const char *dest, const char *src); +#endif + +#ifndef sal_strcat +extern char *sal_strcat(char *dest, const char *src); +#endif + +#ifndef sal_strncat +extern char *sal_strncat(char *dest, const char *src, size_t cnt); +#endif + +/* ANSI/ISO ctype.h */ + +#ifndef sal_tolower +extern char sal_tolower(char c); +#endif + +#ifndef sal_toupper +extern char sal_toupper(char c); +#endif + +#ifndef sal_isspace +extern int sal_isspace(int c); +#endif + +#ifndef sal_isupper +extern int sal_isupper(int c); +#endif + +#ifndef sal_islower +extern int sal_islower(int c); +#endif + +#ifndef sal_isalpha +extern int sal_isalpha(int c); +#endif + +#ifndef sal_isdigit +extern int sal_isdigit(int c); +#endif + +#ifndef sal_isalnum +extern int sal_isalnum(int c); +#endif + +#ifndef sal_isxdigit +extern int sal_isxdigit(int c); +#endif + +/* ANSI/ISO stdlib.h */ + +#ifndef sal_strtol +extern long sal_strtol(const char *s, char **end, int base); +#endif + +#ifndef sal_strtoul +extern unsigned long sal_strtoul(const char *s, char **end, int base); +#endif + +#ifndef sal_strtoll +extern long long sal_strtoll(const char *s, char **end, int base); +#endif + +#ifndef sal_strtoull +extern unsigned long long sal_strtoull(const char *s, char **end, int base); +#endif + +#ifndef sal_atoi +extern int sal_atoi(const char *s); +#endif + +#ifndef sal_abs +extern int sal_abs(int j); +#endif + +#ifndef RAND_MAX +#define RAND_MAX 32767 +#endif + +#ifndef sal_rand +extern int sal_rand(void); +#endif + +#ifndef sal_srand +extern void sal_srand(unsigned seed); +#endif + +#ifndef sal_qsort +extern void sal_qsort(void *arr, size_t numel, + size_t elsz, int (*cmpfn)(const void *, const void *)); +#endif + +#ifndef sal_bsearch +extern void *sal_bsearch(const void *el, const void *arr, size_t numel, + size_t elsz, int (*cmpfn)(const void *, const void *)); +#endif + +/* ANSI/ISO stdio.h */ + +#ifndef sal_vsnprintf +extern int sal_vsnprintf(char *buf, size_t bufsz, const char *fmt, va_list ap); +#endif + +#ifndef sal_vsprintf +extern int sal_vsprintf(char *buf, const char *fmt, va_list ap); +#endif + +#ifndef sal_snprintf +extern int sal_snprintf(char *buf, size_t bufsz, const char *fmt, ...); +#endif + +#ifndef sal_sprintf +extern int sal_sprintf(char *buf, const char *fmt, ...); +#endif + + +/* Non-standard ANSI/ISO functions */ + +#ifndef sal_strcasecmp +extern int sal_strcasecmp(const char *dest, const char *src); +#endif + +#ifndef sal_strncasecmp +extern int sal_strncasecmp(const char *dest, const char *src, size_t cnt); +#endif + +#ifndef sal_strlcpy +extern size_t sal_strlcpy(char *dest, const char *src, size_t cnt); +#endif + +#ifndef sal_strupr +extern void sal_strupr(char *s); +#endif + +#ifndef sal_strlwr +extern void sal_strlwr(char *s); +#endif + +#ifndef sal_strnchr +extern char *sal_strnchr(const char *dest, int c, size_t cnt); +#endif + +#ifndef sal_strtok_r +extern char *sal_strtok_r(char *s1, const char *delim, char **s2); +#endif + +#ifndef sal_strcasestr +extern char *sal_strcasestr(const char *dest, const char *src); +#endif + +/*! + * End of standard C library functions. + * + * \endcond + */ + +/* Special SAL library functions */ + +#ifndef sal_ctoi +/*! + * \brief Convert a string to an int type. + * + * Similar to atoi, but in addition to 0x it also reconizes prefix 0b + * for binary numbers (e.g. 0b10010) and 0 for octal numbers + * (e.g. 0347). + * + * If not NULL, the \c end pointer will be updated with the address of + * the first invalid character in the string. The functionality of \c + * end is similar to that of standard C \c strtol. + * + * \param [in] s Input string, + * \param [out] end Pointer to first invalid character in \c s. + * + * \return Parsed integer value of input string. + */ +extern int sal_ctoi(const char *s, char **end); +#endif + + +/*! Internal marker used by sal_vsnprintf. */ +#ifndef SAL_VSNPRINTF_X_INF +#define SAL_VSNPRINTF_X_INF 0x7ff0 +#endif + +#endif /* SAL_LIBC_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h new file mode 100644 index 000000000000..83c3c3df6a35 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h @@ -0,0 +1,181 @@ +/*! \file sal_linux.h + * + * Convenience file for mapping SAL C library functions to Linux. + * + * The main purpose of this file is to allow shared SDK source files + * to be used for building Linux kernel modules. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef SAL_LINUX_H +#define SAL_LINUX_H + +#if !defined(SAL_CONFIG_H) || !defined(SAL_LINUX) + +/* + * If we get here it means that some file other than sal_config.h + * included this file before sal_config.h did. + */ +#error sal_linux.h file cannot be included by regular source files + +#else + + +/*! + * \cond SAL_LINUX + */ + +#include + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)) +/* Use built-in version */ +#include +#else +/* Borrow from compiler */ +#include +#endif + +#include +#define SAL_CONFIG_DEFINE_SIZE_T 0 +#define SAL_CONFIG_DEFINE_UINT8_T 0 +#define SAL_CONFIG_DEFINE_UINT16_T 0 +#define SAL_CONFIG_DEFINE_UINT32_T 0 +#define SAL_CONFIG_DEFINE_UINT64_T 0 +#define SAL_CONFIG_DEFINE_UINTPTR_T 0 +#define SAL_CONFIG_DEFINE_INT8_T 0 +#define SAL_CONFIG_DEFINE_INT16_T 0 +#define SAL_CONFIG_DEFINE_INT32_T 0 +#define SAL_CONFIG_DEFINE_INT64_T 0 +#define SAL_CONFIG_DEFINE_PRIu32 0 +#define SAL_CONFIG_DEFINE_PRId32 0 +#define SAL_CONFIG_DEFINE_PRIx32 0 +#define SAL_CONFIG_DEFINE_PRIu64 0 +#define SAL_CONFIG_DEFINE_PRId64 0 +#define SAL_CONFIG_DEFINE_PRIx64 0 +#define SAL_CONFIG_DEFINE_BOOL_T 0 +#define SAL_CONFIG_DEFINE_DMA_ADDR_T 0 + +#include +#ifndef sal_memcmp +#define sal_memcmp memcmp +#endif +#ifndef sal_memcpy +#define sal_memcpy memcpy +#endif +#ifndef sal_memset +#define sal_memset memset +#endif +#ifndef sal_memmove +#define sal_memmove memmove +#endif +#ifndef sal_strcpy +#define sal_strcpy strcpy +#endif +#ifndef sal_strncpy +#define sal_strncpy strncpy +#endif +#ifndef sal_strlen +#define sal_strlen strlen +#endif +#ifndef sal_strcmp +#define sal_strcmp strcmp +#endif +#ifndef sal_strncmp +#define sal_strncmp strncmp +#endif +#ifndef sal_strchr +#define sal_strchr strchr +#endif +#ifndef sal_strrchr +#define sal_strrchr strrchr +#endif +#ifndef sal_strstr +#define sal_strstr strstr +#endif +#ifndef sal_strcat +#define sal_strcat strcat +#endif +#ifndef sal_strncat +#define sal_strncat strncat +#endif +#ifndef sal_strcasecmp +#define sal_strcasecmp strcasecmp +#endif +#ifndef sal_strncasecmp +#define sal_strncasecmp strncasecmp +#endif + +#include +#ifndef sal_tolower +#define sal_tolower tolower +#endif +#ifndef sal_toupper +#define sal_toupper toupper +#endif +#ifndef sal_isspace +#define sal_isspace isspace +#endif +#ifndef sal_isupper +#define sal_isupper isupper +#endif +#ifndef sal_islower +#define sal_islower islower +#endif +#ifndef sal_isalpha +#define sal_isalpha isalpha +#endif +#ifndef sal_isdigit +#define sal_isdigit isdigit +#endif +#ifndef sal_isalnum +#define sal_isalnum isalnum +#endif +#ifndef sal_isxdigit +#define sal_isxdigit isxdigit +#endif + +#include +#ifndef sal_vsnprintf +#define sal_vsnprintf vsnprintf +#endif +#ifndef sal_vsprintf +#define sal_vsprintf vsprintf +#endif +#ifndef sal_snprintf +#define sal_snprintf snprintf +#endif +#ifndef sal_sprintf +#define sal_sprintf sprintf +#endif + +/*! + * \endcond + */ + +#endif /* SAL_CONFIG_H */ + +#else + +/* + * If we get here it means that some file other than sal_config.h + * included this file after sal_config.h already included it once. + */ +#error sal_linux.h file cannot be included by regular source files + +#endif /* SAL_LINUX_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h new file mode 100644 index 000000000000..40ef6a27b269 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h @@ -0,0 +1,154 @@ +/*! \file sal_types.h + * + * Basic types and convenience macros. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef SAL_TYPES_H +#define SAL_TYPES_H + +#include + +/*! + * \cond SAL_TYPES + */ + +#if SAL_CONFIG_DEFINE_UINT8_T == 1 +typedef SAL_CONFIG_TYPE_UINT8_T uint8_t; +#endif + +#if SAL_CONFIG_DEFINE_UINT16_T == 1 +typedef SAL_CONFIG_TYPE_UINT16_T uint16_t; +#endif + +#if SAL_CONFIG_DEFINE_UINT32_T == 1 +typedef SAL_CONFIG_TYPE_UINT32_T uint32_t; +#endif + +#if SAL_CONFIG_DEFINE_UINT64_T == 1 +typedef SAL_CONFIG_TYPE_UINT64_T uint64_t; +#endif + +#if SAL_CONFIG_DEFINE_UINTPTR_T == 1 +typedef SAL_CONFIG_TYPE_UINTPTR_T uintptr_t; +#endif + +#if SAL_CONFIG_DEFINE_INT8_T == 1 +typedef SAL_CONFIG_TYPE_INT8_T int8_t; +#endif + +#if SAL_CONFIG_DEFINE_INT16_T == 1 +typedef SAL_CONFIG_TYPE_INT16_T int16_t; +#endif + +#if SAL_CONFIG_DEFINE_INT32_T == 1 +typedef SAL_CONFIG_TYPE_INT32_T int32_t; +#endif + +#if SAL_CONFIG_DEFINE_INT64_T == 1 +typedef SAL_CONFIG_TYPE_INT64_T int64_t; +#endif + +#if SAL_CONFIG_DEFINE_SIZE_T == 1 +typedef SAL_CONFIG_TYPE_SIZE_T size_t; +#endif + +#if SAL_CONFIG_DEFINE_BOOL_T == 1 +typedef SAL_CONFIG_TYPE_BOOL_T bool; +#endif + +#if SAL_CONFIG_DEFINE_DMA_ADDR_T == 1 +typedef SAL_CONFIG_TYPE_DMA_ADDR_T dma_addr_t; +#endif + +#if SAL_CONFIG_DEFINE_PRIu32 == 1 +#define PRIu32 SAL_CONFIG_MACRO_PRIu32 +#endif + +#if SAL_CONFIG_DEFINE_PRId32 == 1 +#define PRId32 SAL_CONFIG_MACRO_PRId32 +#endif + +#if SAL_CONFIG_DEFINE_PRIx32 == 1 +#define PRIx32 SAL_CONFIG_MACRO_PRIx32 +#endif + +#if SAL_CONFIG_DEFINE_PRIu64 == 1 +#define PRIu64 SAL_CONFIG_MACRO_PRIu64 +#endif + +#if SAL_CONFIG_DEFINE_PRId64 == 1 +#define PRId64 SAL_CONFIG_MACRO_PRId64 +#endif + +#if SAL_CONFIG_DEFINE_PRIx64 == 1 +#define PRIx64 SAL_CONFIG_MACRO_PRIx64 +#endif + +#ifndef offsetof +#define offsetof(_s, _m) ((unsigned long)&(((_s *)0)->_m)) +#endif + +#ifndef NULL +#define NULL (void*)0 +#endif + +#ifndef STATIC +#define STATIC static +#endif + +#ifndef VOLATILE +#define VOLATILE volatile +#endif + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +#ifndef COUNTOF +#define COUNTOF(ary) ((int) (sizeof(ary) / sizeof((ary)[0]))) +#endif + +#ifndef COMPILER_REFERENCE +#define COMPILER_REFERENCE(_a) ((void)(_a)) +#endif + +/*! + * Compiler attribute keyword. + * + * We use this only for enhanced code validation, so it does not need + * to be fully portable. + */ +#ifndef SAL_ATTR +# if defined(__GNUC__) && !defined(__PEDANTIC__) +# define SAL_ATTR(_a) __attribute__(_a) +# else +# define SAL_ATTR(_a) +# endif +#endif + +/*! + * \endcond + */ + +#endif /* SAL_TYPES_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h new file mode 100644 index 000000000000..fc7bd1bb87d6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h @@ -0,0 +1,254 @@ +/*! \file sal_config.h + * + * Broadcom System Abstraction Layer (SAL) configuration + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef SAL_CONFIG_H +#define SAL_CONFIG_H + +/* + * Include system config file if specified: + */ +#ifdef SAL_INCLUDE_CUSTOM_CONFIG +#include +#endif + +/* + * Optionally use Linux C library and header files: + */ +#ifdef SAL_LINUX +#include +/* Linux implies no standard C (see below) */ +#ifndef SAL_NO_STDC +#define SAL_NO_STDC +#endif +#endif + +/* + * Use standard C library and header files by default: + */ +#ifndef SAL_NO_STDC +#include +#endif + +/*! + * \cond SAL_CONFIG + */ + +/* Type uint8_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_UINT8_T +#define SAL_CONFIG_DEFINE_UINT8_T 1 +#endif + +/* Default type definition for uint8_t */ +#ifndef SAL_CONFIG_TYPE_UINT8_T +#define SAL_CONFIG_TYPE_UINT8_T unsigned char +#endif + +/* Type uint16_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_UINT16_T +#define SAL_CONFIG_DEFINE_UINT16_T 1 +#endif + +/* Default type definition for uint16_t */ +#ifndef SAL_CONFIG_TYPE_UINT16_T +#define SAL_CONFIG_TYPE_UINT16_T unsigned short +#endif + +/* Type uint32_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_UINT32_T +#define SAL_CONFIG_DEFINE_UINT32_T 1 +#endif + +/* Default type definition for uint32_t */ +#ifndef SAL_CONFIG_TYPE_UINT32_T +#define SAL_CONFIG_TYPE_UINT32_T unsigned int +#endif + +/* Type uint64_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_UINT64_T +#define SAL_CONFIG_DEFINE_UINT64_T 1 +#endif + +/* Default type definition for uint64_t */ +#ifndef SAL_CONFIG_TYPE_UINT64_T +#define SAL_CONFIG_TYPE_UINT64_T unsigned long long +#endif + +/* Type uintptr_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_UINTPTR_T +#define SAL_CONFIG_DEFINE_UINTPTR_T 1 +#endif + +/* Default type definition for uintptr_t */ +#ifndef SAL_CONFIG_TYPE_UINTPTR_T +#define SAL_CONFIG_TYPE_UINTPTR_T unsigned long long +#endif + +/* Type int8_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_INT8_T +#define SAL_CONFIG_DEFINE_INT8_T 1 +#endif + +/* Default type definition for int8_t */ +#ifndef SAL_CONFIG_TYPE_INT8_T +#define SAL_CONFIG_TYPE_INT8_T signed char +#endif + +/* Type int16_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_INT16_T +#define SAL_CONFIG_DEFINE_INT16_T 1 +#endif + +/* Default type definition for int16_t */ +#ifndef SAL_CONFIG_TYPE_INT16_T +#define SAL_CONFIG_TYPE_INT16_T signed short +#endif + +/* Type int32_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_INT32_T +#define SAL_CONFIG_DEFINE_INT32_T 1 +#endif + +/* Default type definition for int32_t */ +#ifndef SAL_CONFIG_TYPE_INT32_T +#define SAL_CONFIG_TYPE_INT32_T signed int +#endif + +/* Type int64_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_INT64_T +#define SAL_CONFIG_DEFINE_INT64_T 1 +#endif + +/* Default type definition for int64_t */ +#ifndef SAL_CONFIG_TYPE_INT64_T +#define SAL_CONFIG_TYPE_INT64_T signed long long +#endif + +/* Type size_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_SIZE_T +#define SAL_CONFIG_DEFINE_SIZE_T 1 +#endif + +/* Default type definition for size_t */ +#ifndef SAL_CONFIG_TYPE_SIZE_T +#define SAL_CONFIG_TYPE_SIZE_T unsigned int +#endif + +/* Type bool is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_BOOL_T +#define SAL_CONFIG_DEFINE_BOOL_T 1 +#endif + +/* Default type definition for bool */ +#ifndef SAL_CONFIG_TYPE_BOOL_T +#define SAL_CONFIG_TYPE_BOOL_T enum { false = 0, true = 1 } +#endif + +/* Type dma_addr_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_DMA_ADDR_T +#define SAL_CONFIG_DEFINE_DMA_ADDR_T 1 +#endif + +/* Default type definition for dma_addr_t */ +#ifndef SAL_CONFIG_TYPE_DMA_ADDR_T +#define SAL_CONFIG_TYPE_DMA_ADDR_T unsigned int +#endif + +/* Formatting macro SAL_PRIu32 is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_PRIu32 +#define SAL_CONFIG_DEFINE_PRIu32 1 +#endif + +/* Default definition for formatting macro SAL_PRIu32 */ +#ifndef SAL_CONFIG_MACRO_PRIu32 +#define SAL_CONFIG_MACRO_PRIu32 "u" +#endif + +/* Formatting macro SAL_PRId32 is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_PRId32 +#define SAL_CONFIG_DEFINE_PRId32 1 +#endif + +/* Default definition for formatting macro SAL_PRId32 */ +#ifndef SAL_CONFIG_MACRO_PRId32 +#define SAL_CONFIG_MACRO_PRId32 "d" +#endif + +/* Formatting macro SAL_PRIx32 is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_PRIx32 +#define SAL_CONFIG_DEFINE_PRIx32 1 +#endif + +/* Default definition for formatting macro SAL_PRIx32 */ +#ifndef SAL_CONFIG_MACRO_PRIx32 +#define SAL_CONFIG_MACRO_PRIx32 "x" +#endif + +/* Formatting macro SAL_PRIu64 is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_PRIu64 +#define SAL_CONFIG_DEFINE_PRIu64 1 +#endif + +/* Default definition for formatting macro SAL_PRIu64 */ +#ifndef SAL_CONFIG_MACRO_PRIu64 +#define SAL_CONFIG_MACRO_PRIu64 "llu" +#endif + +/* Formatting macro SAL_PRId64 is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_PRId64 +#define SAL_CONFIG_DEFINE_PRId64 1 +#endif + +/* Default definition for formatting macro SAL_PRId64 */ +#ifndef SAL_CONFIG_MACRO_PRId64 +#define SAL_CONFIG_MACRO_PRId64 "lld" +#endif + +/* Formatting macro SAL_PRIx64 is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_PRIx64 +#define SAL_CONFIG_DEFINE_PRIx64 1 +#endif + +/* Default definition for formatting macro SAL_PRIx64 */ +#ifndef SAL_CONFIG_MACRO_PRIx64 +#define SAL_CONFIG_MACRO_PRIx64 "llx" +#endif + +/* Assert macro is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_ASSERT +#define SAL_CONFIG_DEFINE_ASSERT 1 +#endif + +/* Default definition for assert macro */ +#ifndef SAL_CONFIG_MACRO_ASSERT +#define SAL_CONFIG_MACRO_ASSERT SAL_ASSERT_DEFAULT +#endif + +/* Memory Barrier if necessary */ +#ifndef SAL_CONFIG_MEMORY_BARRIER +#define SAL_CONFIG_MEMORY_BARRIER ; +#endif + +/*! + * \endcond + */ + +#endif /* SAL_CONFIG_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c b/platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c new file mode 100644 index 000000000000..8a6d345941c9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c @@ -0,0 +1,79 @@ +/*! \file shr_bitop_range_clear.c + * + * Bit array operations. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include + +/*! + * INTERNAL USE ONLY. + * + * Same as shr_bitop_range_clear, but for a single SHR_BITDCL. + */ +static inline void +shr_bitop_range_clear_one_bitdcl(SHR_BITDCL *a, int offs, int n) +{ + SHR_BITDCL mask = ~0; + + mask >>= (SHR_BITWID - n); + mask <<= offs; + *a &= ~mask; +} + +/*! + * \brief Clear range of bits in a bit array. + * + * INTERNAL USE ONLY. + * + * Refer to \ref SHR_BITCLR_RANGE macro. + */ +void +shr_bitop_range_clear(SHR_BITDCL *a, int offs, int n) +{ + SHR_BITDCL *pa; + int woffs, wremain; + + if (n <= 0) { + return; + } + + pa = a + (offs / SHR_BITWID); + + woffs = offs % SHR_BITWID; + + if (woffs != 0) { + wremain = SHR_BITWID - woffs; + if (n <= wremain) { + shr_bitop_range_clear_one_bitdcl(pa, woffs, n); + return; + } + shr_bitop_range_clear_one_bitdcl(pa, woffs, wremain); + n -= wremain; + ++pa; + } + while (n >= SHR_BITWID) { + *(pa++) = 0; + n -= SHR_BITWID; + } + + if (n > 0) { + shr_bitop_range_clear_one_bitdcl(pa, 0, n); + } +} diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h new file mode 100644 index 000000000000..f62a6f3b8a77 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h @@ -0,0 +1,411 @@ +/*! \file shr_bitop.h + * + * Bit array library. + * + * The macros provided by this library allows the user to declare and + * operate on bit arrays of arbitrary size. + * + * In addition to macros for setting, clearing and testing individual + * bits, there are macros for performing various operations on ranges + * of bits within one or between two bit arrays. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef SHR_BITOP_H +#define SHR_BITOP_H + +#include + +/*! + * Base type for bit arrays. This type is essentially a block of bits, + * and each block contains \ref SHR_BITWID bits. + */ +#define SHR_BITDCL uint32_t + +/*! + * Number of bits in a bit array base type (\ref SHR_BITDCL). An + * applcation should normally not care about the size of the bit + * array base type. + */ +#define SHR_BITWID 32 + +/*! \cond */ +/* + *-------------------------------------------------------------------------- + * + * The following functions and macros should not be called directly. + */ +extern void +shr_bitop_range_clear(SHR_BITDCL *a, int offs, int n); + +extern void +shr_bitop_range_set(SHR_BITDCL *a, int offs, int n); + +extern void +shr_bitop_range_copy(SHR_BITDCL *a1, int offs1, const SHR_BITDCL *a2, + int offs2, int n); + +extern int +shr_bitop_range_null(const SHR_BITDCL *a, + int offs, int n); + +extern int +shr_bitop_range_eq(const SHR_BITDCL *a1, const SHR_BITDCL *a2, + int offs, int n); + +extern void +shr_bitop_range_count(const SHR_BITDCL *a, + int offs, int n, int *count); + +extern void +shr_bitop_range_and(const SHR_BITDCL *a1, const SHR_BITDCL *a2, + int offs, int n, SHR_BITDCL *dest); + +extern void +shr_bitop_range_or(const SHR_BITDCL *a1, const SHR_BITDCL *a2, + int offs, int n, SHR_BITDCL *dest); + +extern void +shr_bitop_range_xor(const SHR_BITDCL *a1, const SHR_BITDCL *a2, + int offs, int n, SHR_BITDCL *dest); + +extern void +shr_bitop_range_remove(const SHR_BITDCL *a1, const SHR_BITDCL *a2, + int offs, int n, SHR_BITDCL *dest); + +extern void +shr_bitop_range_negate(const SHR_BITDCL *a1, + int offs, int n, SHR_BITDCL *dest); + +extern int +shr_bitop_str_decode(const char *str, SHR_BITDCL *dest, int max_bitdcl); + +/*! + * Number of SHR_BITDCLs needed to contain _max bits, i.e. the \ref + * SHR_BITWID-aligned number of bits needed to support _max bits. + */ +#define SHRi_BITDCLSIZE(_max) \ + (((_max) + SHR_BITWID - 1) / SHR_BITWID) + +/*! + * Generic operation macro on bit array _a, with bit _b. Used for + * public set/clear/test macros. + */ +#define SHRi_BITOP(_a, _b, _op) \ + (((_a)[(_b) / SHR_BITWID]) _op (1U << ((_b) % SHR_BITWID))) + +/* + * End of internal functions and macros. + *-------------------------------------------------------------------------- + */ +/*! \endcond */ + +/*! + * Size in bytes of a bit array containing _max bits. + * + * This size is useful when calling malloc, memcpy, etc. + */ +#define SHR_BITALLOCSIZE(_max) \ + (SHRi_BITDCLSIZE(_max) * sizeof (SHR_BITDCL)) + +/*! + * Declare bit array _name of size _max bits. + * + * Used for declaring a bit array on the stack (or as a static). + * + * For example, to declare an array containing 80 bits: + * + * \code{.c} + * void my_func(void) + * { + * SHR_BITDCLNAME(my_bit_array, 80); + * ... + * } + * \endcode + */ +#define SHR_BITDCLNAME(_name, _max) \ + SHR_BITDCL _name[SHRi_BITDCLSIZE(_max)] + +/*! + * \brief Test if a bit is set in a bit array. + * + * \param [in] _a Bit array to operate on + * \param [in] _b Bit number to test (first is 0) + * + * \return 0 if not set, otherwise non-zero. + */ +#define SHR_BITGET(_a, _b) \ + SHRi_BITOP(_a, _b, &) + +/*! + * \brief Set a bit in a bit array. + * + * \param [in] _a Bit array to operate on + * \param [in] _b Bit number to set (first is 0) + * + * \return Nothing + */ +#define SHR_BITSET(_a, _b) \ + SHRi_BITOP(_a, _b, |=) + +/*! + * \brief Clear a bit in a bit array. + * + * \param [in] _a Bit array to operate on + * \param [in] _b Bit number to clear (first is 0) + * + * \return Nothing + */ +#define SHR_BITCLR(_a, _b) \ + SHRi_BITOP(_a, _b, &= ~) + +/*! + * \brief Iterate over bits in bit array. + * + * Used to perform a specific action for all the bits which are set in + * a bit array. + * + * Example: + * + * \code{.c} + * #define MAX_BITS 80 + * + * static SHR_BITDCLNAME(my_bit_array, MAX_BITS); + * + * void my_biterator(void) + * { + * int bitnum; + * + * SHR_BIT_ITER(my_bit_array, MAX_BITS, bitnum) { + * printf("Bit number %d is set\n", bitnum); + * } + * } + * \endcode + * + * \param [in] _a Bit array to iterate over + * \param [in] _max Number of bits to iterate over (starting from 0) + * \param [in] _b Iterator variable (should be same type as _max) + */ +#define SHR_BIT_ITER(_a, _max, _b) \ + for ((_b) = 0; (_b) < (_max); (_b)++) \ + if ((_a)[(_b) / SHR_BITWID] == 0) \ + (_b) += (SHR_BITWID - 1); \ + else if (SHR_BITGET((_a), (_b))) + +/*! + * \brief Set range of bits in a bit array. + * + * This macro sets a specified range of bits within a bit array. + * + * \param [in] _a Bit array in which to set bits + * \param [in] _offs Offset (in bits) into the array + * \param [in] _n Number of bits to clear + * + * \return Nothing + */ +#define SHR_BITSET_RANGE(_a, _offs, _n) \ + (shr_bitop_range_set(_a, _offs, _n)) + +/*! + * \brief Clear range of bits in a bit array. + * + * This macro clears a specified range of bits within a bit array. + * + * \param [in] _a Bit array in which to clear bits + * \param [in] _offs Offset (in bits) into the array + * \param [in] _n Number of bits to clear + * + * \return Nothing + */ +#define SHR_BITCLR_RANGE(_a, _offs, _n) \ + (shr_bitop_range_clear(_a, _offs, _n)) + +/*! + * \brief Copy a range of bits between two bit arrays. + * + * This macro copies a range of bits from one bit array to + * another. The bit range may reside at different offsets within the + * source and destination bit arrays. + * + * If source and destination are within the same bit array, then the + * ranges must not overlap. + * + * \param [in] _a1 Destination bit array + * \param [in] _offs1 Offset (in bits) in destination bit array + * \param [in] _a2 Source bit array + * \param [in] _offs2 Offset (in bits) in source bit array + * \param [in] _n Number of bits to copy + * + * \return Nothing + */ +#define SHR_BITCOPY_RANGE(_a1, _offs1, _a2, _offs2, _n) \ + (shr_bitop_range_copy(_a1, _offs1, _a2, _offs2, _n)) + +/*! + * \brief Perform bitwise AND for a range of bits in two bit arrays. + * + * The destination bit array may the same as one of the source bit + * arrays. + * + * \param [in] _a1 First source bit array + * \param [in] _a2 Second source bit array + * \param [in] _offs Offset (in bits) in bit array + * \param [in] _n Number of bits to operate on + * \param [in] _dest Destination bit array + * + * \return Nothing + */ +#define SHR_BITAND_RANGE(_a1, _a2, _offs, _n, _dest) \ + (shr_bitop_range_and(_a1, _a2, _offs, _n, _dest)) + +/*! + * \brief Perform bitwise OR for a range of bits in two bit arrays. + * + * This macro performs a logical AND operation between each bit of a + * specified range of bits within two bit arrays. + * + * The destination bit array may the same as one of the source bit + * arrays. + * + * \param [in] _a1 First bit array for operation + * \param [in] _a2 Second bit array for operation + * \param [in] _offs Offset (in bits) into the arrays + * \param [in] _n Number of bits to operate on + * \param [in] _dest Destination bit array + * + * \return Nothing + */ +#define SHR_BITOR_RANGE(_a1, _a2, _offs, _n, _dest) \ + (shr_bitop_range_or(_a1, _a2, _offs, _n, _dest)) + +/*! + * \brief Perform bitwise XOR operation on bit arrays. + * + * This macro performs a logical XOR operation between each bit of a + * specified range of bits within two bit arrays. + * + * The destination bit array may the same as one of the source bit + * arrays. + * + * \param [in] _a1 First bit array for operation + * \param [in] _a2 Second bit array for operation + * \param [in] _offs Offset (in bits) into the arrays + * \param [in] _n Number of bits to operate on + * \param [in] _dest Destination bit array + * + * \return Nothing + */ +#define SHR_BITXOR_RANGE(_a1, _a2, _offs, _n, _dest) \ + (shr_bitop_range_xor(_a1, _a2, _offs, _n, _dest)) + +/*! + * \brief Clear select bits in a bit array. + * + * This macro clears bits within a specified range of bits in a bit + * array. Only the bits which are set in the supplied mask bit array + * will be cleared, i.e. any bit not set in the mask (or outside the + * range) are unaffected. + * + * The destination bit array may the same as the source bit array. + * + * \param [in] _a1 Source bit array + * \param [in] _a2 Mask bit array + * \param [in] _offs Offset (in bits) into the arrays + * \param [in] _n Number of bits to operate on + * \param [in] _dest Destination bit array + * + * \return Nothing + */ +#define SHR_BITREMOVE_RANGE(_a1, _a2, _offs, _n, _dest) \ + (shr_bitop_range_remove(_a1, _a2, _offs, _n, _dest)) + +/*! + * \brief Negate a range of bits in a bit array. + * + * This operation is essentially the same as performing an XOR with a + * bit array consisting of all 1s. + * + * \param [in] _a Source bit array + * \param [in] _offs Offset (in bits) into the array + * \param [in] _n Number of bits to negate + * \param [in] _dest Destination bit array + */ +#define SHR_BITNEGATE_RANGE(_a, _offs, _n, _dest) \ + (shr_bitop_range_negate(_a, _offs, _n, _dest)) + +/*! + * \brief Test if bits are cleared in a bit array. + * + * + * + * \param [in] _a Source bit array + * \param [in] _offs Offset (in bits) into the array + * \param [in] _n Number of bits to negate + * + * \return 1 if all bits in range are cleared, otherwise 0. + */ +#define SHR_BITNULL_RANGE(_a, _offs, _n) \ + (shr_bitop_range_null(_a, _offs, _n)) + +/*! + * \brief Test if two bit array bit ranges are equal. + * + * This macro compares a range of bits at the same offset within two + * bit arrays. + * + * \param [in] _a1 First bit array + * \param [in] _a2 Second bit array + * \param [in] _offs Offset (in bits) into the arrays + * \param [in] _n Number of bits to compare + * + * \return 1 if all bits in range are equal, otherwise 0. + */ +#define SHR_BITEQ_RANGE(_a1, _a2, _offs, _n) \ + (shr_bitop_range_eq(_a1, _a2, _offs, _n)) + +/*! + * \brief Count the number of bits set in a range of bits in a bit array. + * + * This macro counts the number of bits that are set in a range of \c + * _n bits starting at offset \c _offs within bit array \c _a. + * + * \param [in] _a Bit array. + * \param [out] _count Number of bits set within specified range. + * \param [in] _offs Offset into the bit array. + * \param [in] _n Number of bits to check. + */ +#define SHR_BITCOUNT_RANGE(_a, _count, _offs, _n) \ + shr_bitop_range_count(_a, _offs, _n, &(_count)) + +/*! + * \brief Decode a string in hex format into a bitmap. + * + * The string can be more than 32 bits worth of data if it is in hex + * format (0x...). If not hex, it is treated as a 32 bit value. + * + * \param [in] _str String to decode. + * \param [out] _a Bit array where to store decoded data. + * \param [in] _max Size of output bit array in bits. + * + * \retval 0 No errors + */ +#define SHR_BITSTR_DECODE(_str, _a, _max) \ + shr_bitop_str_decode(_str, _a, SHRi_BITDCLSIZE(_max)) + +#endif /* SHR_BITOP_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h index 702e6317f5f0..70b015a5cd07 100644 --- a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h +++ b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -17,7 +17,7 @@ * GNU General Public License for more details. * * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ + * be found in the LICENSES folder. */ #ifndef SHR_ERROR_H diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h new file mode 100644 index 000000000000..eef71e1a67b2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h @@ -0,0 +1,161 @@ +/*! \file shr_types.h + * + * Shared data types. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef SHR_TYPES_H +#define SHR_TYPES_H + +#include + +/*! IPv4 header version. */ +#define SHR_IPV4_VERSION 4 + +/*! IPv4 header length in bytes. */ +#define SHR_IPV4_HEADER_LENGTH 20 + +/*! IPv4 header length in 32-bit words. */ +#define SHR_IPV4_HDR_WLEN 5 + +/*! IPv4 Address length. */ +#define SHR_IPV4_ADDR_LEN 4 + +/*! IPv6 header version. */ +#define SHR_IPV6_VERSION 6 + +/*! IPv6 header length in bytes. */ +#define SHR_IPV6_HEADER_LENGTH 40 + +/*! IPv6 Address length. */ +#define SHR_IPV6_ADDR_LEN 16 + +/*! L2 header EthertType for IPv4. */ +#define SHR_L2_ETYPE_IPV4 0x0800 + +/*! L2 header ether type for IPv6. */ +#define SHR_L2_ETYPE_IPV6 0x86dd + +/*! L2 header ether type for MPLS unicast. */ +#define SHR_L2_ETYPE_MPLS_UNICAST 0x8847 + +/*! L2 ether type length. */ +#define SHR_L2_ETYPE_LEN 2 + +/*! IP protocol number of UDP. */ +#define SHR_IP_PROTO_UDP 17 + +/*! IP protocol number of IPV4 (IPv4 in IP encapsulation). */ +#define SHR_IP_PROTO_IPV4 4 + +/*! IP protocol number of IPV6 (IPv6 in IP encapsulation). */ +#define SHR_IP_PROTO_IPV6 41 + +/*! IP protocol number of GRE (Generic Routing Encapsulation). */ +#define SHR_IP_PROTO_GRE 47 + +/*! UDP header length */ +#define SHR_UDP_HDR_LEN 8 + +/*! Initial UDP Payload length. */ +#define SHR_UDP_PAYLOAD_LEN 0x10 + +/*! Length of L2 CRC. */ +#define SHR_L2_CRC_LEN 4 + +/*! Ethernet MAC address length. */ +#define SHR_MAC_ADDR_LEN 6 + +/*! VLAN header length. */ +#define SHR_VLAN_HDR_LEN 4 + +/*! Generic Routing Encapsulation (GRE) header length. */ +#define SHR_GRE_HDR_LEN 4 + +/*! Length of the MPLS header. */ +#define SHR_MPLS_HDR_LEN 4 + +/*! MPLS Associated Channel Header (ACH) length. */ +#define SHR_MPLS_ACH_LEN 4 + +/*! Length of the MPLS label. */ +#define SHR_MPLS_LABEL_LEN 3 + +/*! IPFIX header length */ +#define SHR_IPFIX_HDR_LEN 16 + +/*! Initial IPFIX Timestamp */ +#define SHR_IPFIX_INITIAL_TIMESTAMP 0 + +/*! Initial IPFIX Sequence Number */ +#define SHR_IPFIX_INITIAL_SEQNUM 0 + +/*! Port number type. */ +typedef uint16_t shr_port_t; + +/*! Ethernet MAC address type. */ +typedef uint8_t shr_mac_t[SHR_MAC_ADDR_LEN]; + +/*! Check if Ethernet MAC address is a multicast address. */ +#define SHR_MAC_IS_MCAST(_mac) \ + (_mac[0] & 0x1) + +/*! Check if Ethernet MAC address is all zeros. */ +#define SHR_MAC_IS_ZERO(_mac) \ + (((_mac)[0] | (_mac)[1] | (_mac)[2] | \ + (_mac)[3] | (_mac)[4] | (_mac)[5]) == 0) + +/*! Virtual eXtensible Local Area Network(VxLAN) header length. */ +#define SHR_VXLAN_HDR_LEN 8 + +/*! VxLAN Network Identifier(VNID) length. */ +#define SHR_VXLAN_VNID_LEN 3 + +/*! VxLAN Network Identifier type. */ +typedef uint32_t shr_vxlan_vnid_t; + +/*! IPv4 address type. */ +typedef uint32_t shr_ip_t; + +/*! IPv6 address type. */ +typedef uint8_t shr_ip6_t[SHR_IPV6_ADDR_LEN]; + +/*! + * \brief Enum string map entry. + * + * This type is intended for mapping enum values to strings, e.g. when + * an enum value needs to be printed on the console. + * + * The complete enum map will be an array of this type, i.e. with one + * entry per enum value. + * + * The type can also be used directly for CLI commands which take an + * enum value as a parameter. + */ +typedef struct shr_enum_map_s { + + /*! Enum name. */ + char *name; + + /*! Enum value. */ + int val; + +} shr_enum_map_t; + +#endif /* SHR_TYPES_H */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h index fa8849eb2bf7..e9d769869f96 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h @@ -1,5 +1,7 @@ -/* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. +/*********************************************************************** + * + * $Id: linux-bde.h,v 1.24 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,13 +24,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/*********************************************************************** - * - * $Id: linux-bde.h,v 1.24 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * * * Linux Broadcom Device Enumerators * @@ -174,6 +172,7 @@ extern int linux_bde_destroy(ibde_t* bde); extern int linux_bde_instance_attach(unsigned int dev_mask,unsigned int dma_size); extern int linux_bde_instance_config(linux_bde_device_bitmap_t dev_mask,unsigned int dma_size); #endif +extern int linux_bde_get_pci_info(int d, uint32 *bus, uint32 *slot, uint32 *func); #ifdef __KERNEL__ @@ -244,7 +243,6 @@ extern int lkbde_dev_state_set(int d, uint32 state); extern int lkbde_dev_instid_get(int d, uint32 *instid); extern int lkbde_dev_instid_set(int d, uint32 instid); - /* * Return none-zero if the SDK instance with the given instance ID * manages the given device. @@ -263,6 +261,7 @@ extern linux_bde_device_bitmap_t* lkbde_get_inst_devs(uint32 inst_id); */ extern int lkbde_irq_mask_set(int d, uint32 addr, uint32 mask, uint32 fmask); extern int lkbde_irq_mask_get(int d, uint32 *mask, uint32 *fmask); +extern int lkbde_irq_status_get(int d, uint32_t addr, uint32 *status); #ifdef BCM_SAND_SUPPORT extern int lkbde_cpu_write(int d, uint32 addr, uint32 *buf); @@ -273,6 +272,19 @@ extern int lkbde_cpu_pci_register(int d); extern int lkbde_intr_cb_register(int d, int (*intr_pending)(void*), void *intr_pending_data); + +/* + * Get the PCI bus number, bus slot and function for a PCI device. + */ +extern int lkbde_get_dev_pci_info(int d, uint32_t *bus, + uint32_t *slot, uint32_t *func); + +#ifdef INCLUDE_SRAM_DMA +#ifdef SRAM_DMA_NEEDS_KERNEL_APIS +extern void _update_apis_for_sram_dma(); +#endif +extern void lkbde_get_sram_dma_info(unsigned d, uint32 *sram_start, uint32 *sram_size); +#endif /* INCLUDE_SRAM_DMA */ /* * This flag must be OR'ed onto the device number when calling * interrupt_connect/disconnect and irq_mask_set functions from diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h index c2730c140b6e..d69ad43207cd 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h @@ -1,5 +1,7 @@ -/* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. +/*********************************************************************** + * + * $Id: linux_dma.h,v 1.24 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,13 +24,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/*********************************************************************** - * - * $Id: linux_dma.h,v 1.24 Broadcom SDK $ - * $Copyright: (c) 2016 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * * **********************************************************************/ @@ -75,6 +73,11 @@ extern void *_p2l(int d, sal_paddr_t paddr); extern int _dma_pool_allocated(void); extern int _dma_mmap(struct file *filp, struct vm_area_struct *vma); +#ifdef INCLUDE_SRAM_DMA +/* A mode to use SRAM for DMA for some systems where the CPU has no PCIe connection to the device */ +extern int use_sram_for_dma; +#endif /* INCLUDE_SRAM_DMA */ + #endif /* __KERNEL__ */ #endif /* __LINUX_DMA_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h index 15d496ff623d..232bbfa83e70 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: mpool.h,v 1.2 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: mpool.h,v 1.2 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * */ #ifndef __MPOOL_H__ diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile index 1c3e94815c4e..72f390e10a40 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile @@ -1,33 +1,31 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.18 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # # Makefile for Linux kernel BDE # @@ -88,6 +86,7 @@ module: $(KMODULE) # is not created and all action is done in systems/bde/linux/kernel # $(KMODULE): $(SRCS_COMPOSING) + mkdir -p $(BLDDIR) rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) rm -f $(BLDDIR)/*.c rm -f $(BLDDIR)/*.o @@ -127,14 +126,14 @@ $(KMODULE): $(MODULE) mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko + +include $(SDK)/make/Make.depend # } endif kernel_libs: $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared -include $(SDK)/make/Make.depend - # Make.depend is before clean:: so that Make.depend's clean:: runs first. clean:: diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c index 0fc8b63437b7..1a7786b1f89b 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c @@ -1,17 +1,30 @@ /* - * Copyright 2017 Broadcom - * + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as * published by the Free Software Foundation (the "GPL"). - * + * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License version 2 (GPLv2) for more details. - * + * * You should have received a copy of the GNU General Public License * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * */ /* @@ -21,7 +34,6 @@ #include #include #include -#include #include #include #include @@ -54,6 +66,14 @@ | (((_x) & 0x00ff0000) >> 8) \ | (((_x) & 0x0000ff00) << 8) \ | (((_x) & 0x000000ff) << 24)) +#define CMIC_SWAP64(_x) ((((_x) & 0xff000000) >> 24) \ + | (((_x) & 0x00ff0000) >> 8) \ + | (((_x) & 0x0000ff00) << 8) \ + | (((_x) & 0x000000ff) << 24) \ + | (((_x) & 0xff00000000000000UL) >> 24) \ + | (((_x) & 0x00ff000000000000UL) >> 8) \ + | (((_x) & 0x0000ff0000000000UL) << 8) \ + | (((_x) & 0x000000ff00000000UL) << 24)) #endif /* defined(CMIC_SOFT_BYTE_SWAP) */ #define PCI_USE_INT_NONE (-1) @@ -183,6 +203,12 @@ LKM_MOD_PARAM(dma_lock, "i", int, (S_IRUGO | S_IWUSR)); MODULE_PARM_DESC(dma_lock, "Simulation of stuck interrupts."); +/* Additional configurations for PCI bridges */ +static int pci_bridge_setup = 1; +LKM_MOD_PARAM(pci_bridge_setup, "i", int, (S_IRUGO | S_IWUSR)); +MODULE_PARM_DESC(pci_bridge_setup, +"Additional PCI bridge configurations in initialization (default yes)."); + /* Compatibility */ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30)) #define _ISR_RET irqreturn_t @@ -360,6 +386,10 @@ typedef struct bde_ctrl_s { uint32 stuck_interrupts; /* Number of stuck interrupts detected */ uint32 no_intr_isr_ticks; /* Number of ISR ticks without interrupt occurred */ struct timer_list isr_tick; /* Timer tick to prevent stuck interrupt */ +#ifdef INCLUDE_SRAM_DMA + uint32 dev_sram_dma_start; /* start address of device SRAM used for DMA */ + uint32 dev_sram_dma_size; /* size in bytes of device SRAM used for DMA */ +#endif /* INCLUDE_SRAM_DMA */ } bde_ctrl_t; static bde_ctrl_t _devices[LINUX_BDE_MAX_DEVICES]; @@ -577,7 +607,12 @@ _bde_add_device(void) _devices[i] = tmp_dev; } - _dma_per_device_init(_switch_ndevices-1); +#ifdef INCLUDE_SRAM_DMA + if (!use_sram_for_dma || (_devices[_switch_ndevices-1].dev_type & BDE_USER_DEV_TYPE) == 0) +#endif /* INCLUDE_SRAM_DMA */ + { + _dma_per_device_init(_switch_ndevices-1); + } } /* Initialize device locks */ @@ -627,50 +662,6 @@ _eb_device_create(resource_size_t paddr, int irq, int rd_hw, int wr_hw) return 0; } -#ifdef BCM_SAND_SUPPORT - -#include - -static int -sand_device_create(void) -{ -#ifndef __DUNE_LINUX_BCM_CPU_PCIE__ - bde_ctrl_t* ctrl; - - ctrl = _devices; /* on petra, take first device */ - - - ctrl->dev_type |= BDE_PCI_DEV_TYPE | BDE_SWITCH_DEV_TYPE; - ctrl->pci_device = NULL; /* No PCI bus */ - - /* Map in the device */ /* not realy map anything */ - ctrl->bde_dev.base_address = (sal_vaddr_t)ioremap(0x40000000, 0x100000); - ctrl->iowin[0].addr = 0x40000000; - ctrl->iowin[0].size = 0x100000; - - ctrl->iLine = 0; - ctrl->isr = NULL; - ctrl->isr_data = NULL; - - ctrl->bde_dev.device = BCM88950_DEVICE_ID; - ctrl->bde_dev.rev = BCM88950_A0_REV_ID; -#endif - - /* Map CPU regs */ -#ifdef __DUNE_WRX_BCM_CPU__ - cpu_address = ioremap(0x18000000, 0x4000000); -#elif defined(__DUNE_GTO_BCM_CPU__) - cpu_address = ioremap(0xe0000000, 0x100000); -#endif - -#ifndef __DUNE_LINUX_BCM_CPU_PCIE__ - _bde_add_device(); -#endif - - return 0; -} -#endif /* BCM_SAND_SUPPORT */ - #ifdef IPROC_CMICD static void iproc_cmicd_get_irqres(ibde_dev_t bde_dev, struct resource *res_irq) @@ -1437,6 +1428,10 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, BCM56671_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56672_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56675_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53650_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53651_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53652_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53653_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56568_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56670_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56760_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, @@ -1673,6 +1668,22 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, BCM8884D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM8884E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM8884F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88810_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88811_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88812_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88813_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88814_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88815_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88816_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88817_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88818_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88819_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8881A_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8881B_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8881C_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8881D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8881E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8881F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM88830_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM88831_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM88832_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, @@ -1690,8 +1701,42 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, BCM8883E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM8883F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, #ifdef BCM_DNX3_SUPPORT - { BROADCOM_VENDOR_ID, BCM88860_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88870_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START + 1, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START + 2, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START + 3, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START + 4, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START + 5, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, #endif #endif /* BCM_DNX_SUPPORT */ #ifdef BCM_DFE_SUPPORT @@ -1728,38 +1773,26 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, BCM8879D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM8879F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, #ifdef BCM_DNXF3_SUPPORT - { BROADCOM_VENDOR_ID, BCM88910_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88911_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88912_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88913_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88914_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88915_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88916_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88917_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88918_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88919_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8891A_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8891B_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8891C_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8891D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8891E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8891F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88920_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88921_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88922_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88923_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88924_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88925_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88926_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88927_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88928_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88929_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8892A_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8892B_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8892C_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8892D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8892E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8892F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, #endif #endif { BROADCOM_VENDOR_ID, BCM56860_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, @@ -2577,7 +2610,7 @@ _pci_probe(struct pci_dev *dev, const struct pci_device_id *ent) dev->vendor, dev->device); } - /* FIXME: "workarounds" previously called "total h_acks" */ + /* * These are workarounds to get around some existing * kernel problems :( @@ -2876,7 +2909,6 @@ _pci_probe(struct pci_dev *dev, const struct pci_device_id *ent) if (debug >= 1) gprintk("PCI resource len 8MB\n"); } - #ifdef LINUX_BDE_DMA_DEVICE_SUPPORT ctrl->dma_dev = &dev->dev; #endif @@ -2887,7 +2919,39 @@ _pci_probe(struct pci_dev *dev, const struct pci_device_id *ent) (unsigned long)ctrl->bde_dev.base_address, (unsigned long)ctrl->bde_dev.base_address1); } - if (rescan) { /* map IOMMU for re-probed devices */ +#ifdef INCLUDE_SRAM_DMA + /* Check if the device should use SRAM for DMA, if so configure the SRAM to be used */ + if (use_sram_for_dma) { +#ifdef BCM_DNXF3_SUPPORT + switch (dev->device & DNXC_DEVID_FAMILY_MASK) { + case RAMON2_DEVICE_ID: /* Mark the device as user type if SRAM mode RM2/3 */ + case RAMON3_DEVICE_ID: + /* Check if we can use RTS using ICFG_RTS_STRAPS, has to be done after PCIe is enabled. */ + if ((shbde_iproc_pci_read(&ctrl->shbde, (void *)ctrl->bde_dev.base_address1, 0x2920034) & 2) != 0) { + ctrl->dev_sram_dma_start = 0x38100000; + ctrl->dev_sram_dma_size = 0x400000; /* 4MB */ + } else { /* Use free M0SSQ SRAM */ + ctrl->dev_sram_dma_start = 0x2070000; + ctrl->dev_sram_dma_size = 0x10000; /* 64KB */ + } + ctrl->dev_type |= BDE_USER_DEV_TYPE; /* Mark as user defined access for BDE handling access to BARs */ + if (debug >= 4) { + gprintk("PCI device 0x%x:0x%x using SRAM DMA at 0x%x size 0x%x dev_type=0x%x dev=%u\n", dev->vendor, dev->device, + ctrl->dev_sram_dma_start, ctrl->dev_sram_dma_size, ctrl->dev_type, (unsigned)(ctrl - _devices)); + } + break; + default: + break; + } +#endif /* BCM_DNXF3_SUPPORT */ + } +#endif /* INCLUDE_SRAM_DMA */ + + if (rescan /* map IOMMU for re-probed devices */ +#ifdef INCLUDE_SRAM_DMA + && (!use_sram_for_dma || (_devices[rescan_idx].dev_type & BDE_USER_DEV_TYPE) == 0) +#endif /* INCLUDE_SRAM_DMA */ + ) { _dma_per_device_init(rescan_idx); } @@ -3219,8 +3283,10 @@ _init(void) } #ifdef CONFIG_PCI - /* Note: PCI-PCI bridge uses results from pci_register_driver */ - p2p_bridge(); + /* Note: PCI-PCI bridge uses results from pci_register_driver */ + if (pci_bridge_setup) { + p2p_bridge(); + } #endif #ifdef BCM_METROCORE_LOCAL_BUS @@ -3235,11 +3301,6 @@ _init(void) #endif #endif /* BCM_ICS */ - -#ifdef BCM_SAND_SUPPORT - sand_device_create(); -#endif - /* * Probe for EB Bus devices. */ @@ -3343,10 +3404,15 @@ _pprint(struct seq_file *m) pprintf(m, "Broadcom Device Enumerator (%s)\n", LINUX_KERNEL_BDE_NAME); +#ifdef LKM_BUILD_INFO + pprintf(m, "%s\n", LKM_BUILD_INFO); +#endif + pprintf(m, "Module parameters:\n"); pprintf(m, "\tmaxpayload=%d\n", maxpayload); pprintf(m, "\tusemsi=%d\n", usemsi); pprintf(m, "\tisrtickms=%d\n", isrtickms); + pprintf(m, "\tpci_bridge_setup=%d\n", pci_bridge_setup); _dma_pprint(m); @@ -3432,6 +3498,7 @@ _pprint(struct seq_file *m) } return 0; } + /* * Some kernels are configured to prevent mapping of kernel RAM memory * into user space via the /dev/mem device. @@ -3439,6 +3506,16 @@ _pprint(struct seq_file *m) * The function below provides a backdoor to map IO and DMA memory to * user space via the BDE device file. */ +static +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)) +const +#endif +struct vm_operations_struct bde_vma_ops = { +#ifdef CONFIG_HAVE_IOREMAP_PROT + .access = generic_access_phys, +#endif +}; + static int _bde_mmap(struct file *filp, struct vm_area_struct *vma) { @@ -3463,6 +3540,9 @@ _bde_mmap(struct file *filp, struct vm_area_struct *vma) } } + /* Support debug access to the mapping */ + vma->vm_ops = &bde_vma_ops; + if (pio_range_valid) { vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); @@ -3703,6 +3783,45 @@ _write(int d, uint32_t addr, uint32_t data) } +static uint64 +_read64(int d, uint32_t addr) +{ + uint64_t data; + if (!VALID_DEVICE(d)) { + data = (uint64_t)-1; + return *(uint64 *)&data; + } + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + data = (uint64_t)-1; + return *(uint64 *)&data; + } + + data = ((VOL uint64_t *)_devices[d].bde_dev.base_address)[addr / 8]; +#if defined(CMIC_SOFT_BYTE_SWAP) + data = CMIC_SWAP64(data); +#endif + return *(uint64 *)&data; +} + +static void +_write64(int d, uint32_t addr, uint64 data) +{ + if (!VALID_DEVICE(d) || !(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + return; + } + +#if defined(CMIC_SOFT_BYTE_SWAP) + data = CMIC_SWAP64(data); +#endif + + ((VOL uint64 *)_devices[d].bde_dev.base_address)[addr / 8] = data; +#ifdef KEYSTONE + /* Enforce PCIe transaction ordering. Commit the write transaction */ + __asm__ __volatile__("sync"); +#endif +} + static void _run_isrs(bde_ctrl_t *ctrl) { @@ -3865,7 +3984,8 @@ _interrupt_connect(int d, #endif { #if defined(IPROC_CMICD) && defined(CONFIG_OF) - if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) { + if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE) && + (ctrl->pci_device == NULL)) { int i, j; for (i = 0; i < IHOST_CMICX_MAX_INTRS; i++) { if (!iproc_cmicx_irqs[i]) { @@ -4008,7 +4128,8 @@ _interrupt_disconnect(int d) #endif #endif #if defined(IPROC_CMICD) && defined(CONFIG_OF) - if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) { + if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE) && + (ctrl->pci_device == NULL)) { int i; for (i = 0; i < IHOST_CMICX_MAX_INTRS; i++) { if (!iproc_cmicx_irqs[i]) { @@ -4072,7 +4193,7 @@ _iproc_read(int d, uint32_t addr) return -1; } - if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type)) && (_devices[d].dev_type & BDE_USER_DEV_TYPE) == 0) { return -1; } @@ -4095,7 +4216,7 @@ _iproc_write(int d, uint32_t addr, uint32_t data) return -1; } - if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type)) && (_devices[d].dev_type & BDE_USER_DEV_TYPE) == 0) { return -1; } @@ -4303,7 +4424,7 @@ lkbde_cpu_pci_register(int d) case BCM88562_DEVICE_ID: case BCM88661_DEVICE_ID: case BCM88664_DEVICE_ID: - /* Fix bar 0 address */ /* FIXME: write full phy address */ + /* Fix bar 0 address */ pci_write_config_byte(ctrl->pci_device, 0x12, 0x10); pci_write_config_byte(ctrl->pci_device, 0x13, 0x60); @@ -4332,13 +4453,15 @@ lkbde_cpu_pci_register(int d) case J2X_DEVICE_ID: #ifdef BCM_DNX3_SUPPORT case JERICHO3_DEVICE_ID: - case Q4_DEVICE_ID: + case J3AI_DEVICE_ID: + case Q3D_DEVICE_ID: #endif #endif #ifdef BCM_DNXF_SUPPORT case BCM88790_DEVICE_ID: #ifdef BCM_DNXF3_SUPPORT - case BCM88920_DEVICE_ID: + case RAMON2_DEVICE_ID: + case RAMON3_DEVICE_ID: #endif #endif /* @@ -4430,6 +4553,8 @@ static ibde_t _ibde = { .iproc_read = _iproc_read, .iproc_write = _iproc_write, .get_cmic_ver = _get_cmic_ver, + .read64 = _read64, + .write64 = _write64, }; /* @@ -4669,6 +4794,40 @@ lkbde_dev_instid_get(int d, uint32 *instid) return 0; } + +/* + * Function: lkbde_get_dev_pci_info + * + * Purpose: + * Get the PCI bus number, bus slot, and function for a PCI device. + * Returns: + * 0 on success, -1 on error. + */ +int +lkbde_get_dev_pci_info(int d, uint32_t *bus, uint32_t *slot, uint32_t *func) +{ + bde_ctrl_t *ctrl; + + if (!VALID_DEVICE(d)) { + return -1; + } + + ctrl = _devices + d; + + if (ctrl->dev_type & BDE_PCI_DEV_TYPE) { + struct pci_dev *device = ctrl->pci_device; + if (bus) + *bus = device->bus->number; + if (slot) + *slot = PCI_SLOT(device->devfn); + if (func) + *func = PCI_FUNC(device->devfn); + return 0; + } else { + return -1; + } +} + /* * When a secondary interrupt handler is installed this function * is used for synchronizing hardware access to the IRQ mask @@ -4752,6 +4911,36 @@ lkbde_irq_mask_get(int d, uint32_t *mask, uint32_t *fmask) return 0; } +int +lkbde_irq_status_get(int d, uint32_t addr, uint32 *status) +{ + bde_ctrl_t *ctrl; + int iproc_reg; + unsigned long flags; + + iproc_reg = d & LKBDE_IPROC_REG; + d &= ~LKBDE_IPROC_REG; + + if (!VALID_DEVICE(d)) { + return -1; + } + + ctrl = _devices + d; + + /* Lock is required to synchronize access from user space */ + spin_lock_irqsave(&ctrl->lock, flags); + + if (iproc_reg) { + *status = _iproc_read(d, addr); + } else { + *status = _read(d, addr); + } + + spin_unlock_irqrestore(&ctrl->lock, flags); + + return 0; +} + int lkbde_get_num_devices(int type) { @@ -4808,6 +4997,72 @@ lkbde_intr_cb_register(int d, return 0; } +#ifdef INCLUDE_SRAM_DMA + +#ifdef SRAM_DMA_NEEDS_KERNEL_APIS +/* implementation of BDE APIs for DMA SRAM mode */ + +static int +_sinval_sram(int d, void *ptr, int length) +{ + return 0; +} + +static int +_sflush_sram(int d, void *ptr, int length) +{ + return 0; +} + +/* In SRAM DMA there are no virtual addresses. + * We assume the CPU cannot access the SRAM directly, even if it is mapped to a BAR window. + * Therfore p2l and l2p should not be called. + * If they are called, we will return the input value, + * possibly except if it is not in the SRAM address range used for DMA. + */ + +static void * +_p2l_sram(int d, sal_paddr_t paddr) +{ + uint32 dev_sram_dma_start = _devices[d].dev_sram_dma_start; + uint32 dev_sram_dma_size = _devices[d].dev_sram_dma_size; + if (paddr < dev_sram_dma_start || paddr >= dev_sram_dma_start + dev_sram_dma_size) { + gprintk("Error: SRAM address translation called for %p which is outside SRAM range %u-%u\n", + (void*)paddr, dev_sram_dma_start, dev_sram_dma_start +dev_sram_dma_size - 1); + return 0; + } + return (void *)paddr; +} + +static sal_paddr_t +_l2p_sram(int d, void *vaddr) +{ + return (sal_paddr_t)_p2l_sram(d, (sal_paddr_t)vaddr); +} + +/* upate BDE API handles for SRAM DMA */ +void _update_apis_for_sram_dma() +{ + _ibde.sinval = _sinval_sram; + _ibde.sflush = _sflush_sram; + _ibde.l2p = _l2p_sram; + _ibde.p2l = _p2l_sram; +}; +#endif /* SRAM_DMA_NEEDS_KERNEL_APIS */ + +/* return the (currently single) DMA buffer pool size for SRAM DMA mode, must only be called in this mode */ +void +lkbde_get_sram_dma_info(unsigned d, uint32 *sram_start, uint32 *sram_size) +{ + if (d < _ndevices) { + *sram_start = _devices[d].dev_sram_dma_start; + *sram_size = _devices[d].dev_sram_dma_size; + } else { + *sram_start = *sram_size = 0; + } +} +#endif /* INCLUDE_SRAM_DMA */ + /* * Export functions */ @@ -4820,6 +5075,7 @@ LKM_EXPORT_SYM(lkbde_get_hw_dev); LKM_EXPORT_SYM(lkbde_get_dma_dev); LKM_EXPORT_SYM(lkbde_irq_mask_set); LKM_EXPORT_SYM(lkbde_irq_mask_get); +LKM_EXPORT_SYM(lkbde_irq_status_get); LKM_EXPORT_SYM(lkbde_get_dev_phys_hi); LKM_EXPORT_SYM(lkbde_dev_state_set); LKM_EXPORT_SYM(lkbde_dev_state_get); @@ -4833,3 +5089,7 @@ LKM_EXPORT_SYM(lkbde_cpu_pci_register); LKM_EXPORT_SYM(lkbde_is_dev_managed_by_instance); LKM_EXPORT_SYM(lkbde_get_inst_devs); LKM_EXPORT_SYM(lkbde_intr_cb_register); +LKM_EXPORT_SYM(lkbde_get_dev_pci_info); +#ifdef INCLUDE_SRAM_DMA +LKM_EXPORT_SYM(lkbde_get_sram_dma_info); +#endif /* INCLUDE_SRAM_DMA */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c index bdb8d121b8c3..9d1772adbdb2 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: linux_dma.c,v 1.414 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: linux_dma.c,v 1.414 Broadcom SDK $ - * $Copyright: (c) 2016 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * * * Linux Kernel BDE DMA memory allocation * @@ -70,6 +68,8 @@ * The module parameter dmasize=0M enables this allocation mode, however if * DMA memory is requested from a user mode application, a private memory * pool will be created and used irrespectively. + * dmasize=sram may be used with some device, with no direct PCIe connection + * between the CPU and device, for using iproc SRAM for DMA. */ #include @@ -93,11 +93,9 @@ #if _SIMPLE_MEMORY_ALLOCATION_ #include -#if defined(CONFIG_CMA) && defined(CONFIG_CMA_SIZE_MBYTES) -#define DMA_MAX_ALLOC_SIZE (CONFIG_CMA_SIZE_MBYTES * 1024 * 1024) -#else +#ifndef CONFIG_CMA #define DMA_MAX_ALLOC_SIZE (1 << (MAX_ORDER - 1 + PAGE_SHIFT)) /* Maximum size the kernel can allocate in one allocation */ -#endif +#endif /* !CONFIG_CMA */ #endif /* _SIMPLE_MEMORY_ALLOCATION_ */ #if _SIMPLE_MEMORY_ALLOCATION_ == 1 @@ -290,6 +288,13 @@ static phys_addr_t _cpu_pbase = 0; */ static phys_addr_t _dma_pbase = 0; +#ifdef INCLUDE_SRAM_DMA +/* If the value is none-zero, device types that support it will use SRAM for DMA. + * This is for systems where the CPU has no PCIe connection to the device, + * and where customers implement some proxy the connects to the device */ +int use_sram_for_dma = 0; +#endif /* INCLUDE_SRAM_DMA */ + /* states of the DMA pool: */ /* not initialized */ @@ -787,7 +792,7 @@ _mpool_free(void) } /* unmap bus address for all devices */ - /* TODO SDK-235729 skip removed devices */ + if (_use_dma_mapping) { int i, ndevices; ndevices = BDE_NUM_DEVICES(BDE_SWITCH_DEVICES); @@ -883,12 +888,14 @@ _mpool_alloc(size_t size) switch (dmaalloc) { #if _SIMPLE_MEMORY_ALLOCATION_ case ALLOC_TYPE_API: { +#ifndef CONFIG_CMA /* The allocation will be performed together with the mapping to the first device */ if (size > DMA_MAX_ALLOC_SIZE) { gprintk("Will allocate 0x%lx bytes instead of 0x%lx bytes.\n", (unsigned long)DMA_MAX_ALLOC_SIZE, (unsigned long)size); _dma_mem_size = DMA_MAX_ALLOC_SIZE; } +#endif /* !CONFIG_CMA */ if (nodevices == 1) { /* With no devices, allocate immediately mapping to the null device */ _dma_pool_alloc_state = DMA_POOL_INITIALIZED; @@ -1072,15 +1079,34 @@ void _dma_init(void) /* dmasize, himem and himemaddr kernel module argument parsing */ if (dmasize) { - if ((dmasize[strlen(dmasize)-1] & ~0x20) == 'M') { - _dma_mem_size = simple_strtoul(dmasize, NULL, 0); - _dma_mem_size *= ONE_MB; - } else { - gprintk("DMA memory size must be specified as e.g. dmasize=8M\n"); - } - if (_dma_mem_size & (_dma_mem_size-1)) { - gprintk("dmasize must be a power of 2 (1M, 2M, 4M, 8M etc.)\n"); - _dma_mem_size = 0; +#ifdef INCLUDE_SRAM_DMA + if (!strncasecmp(dmasize, "sram", 4) && (dmasize[4] == '\0' || dmasize[4] == ',')) { + use_sram_for_dma = 1; /* set SRAM DMA mode */ + if (dma_debug >= 1) { + gprintk("SRAM DMA mode\n"); + } +#ifdef SRAM_DMA_NEEDS_KERNEL_APIS + _update_apis_for_sram_dma(); +#endif + if (dmasize[4] == '\0') { + dmasize +=4; + } else { + dmasize +=5; + } + + } +#endif /* INCLUDE_SRAM_DMA */ + if (*dmasize != '\0') { + if ((dmasize[strlen(dmasize)-1] & ~0x20) == 'M') { + _dma_mem_size = simple_strtoul(dmasize, NULL, 0); + _dma_mem_size *= ONE_MB; + } else { + gprintk("DMA memory size must be specified as e.g. dmasize=8M\n"); + } + if (_dma_mem_size & (_dma_mem_size-1)) { + gprintk("dmasize must be a power of 2 (1M, 2M, 4M, 8M etc.)\n"); + _dma_mem_size = 0; + } } } @@ -1190,7 +1216,7 @@ _l2p(int d, void *vaddr) } return 0; } - /* TODO will not work with IOMMU */ + return ((sal_paddr_t)virt_to_bus(vaddr)); } @@ -1206,7 +1232,7 @@ _p2l(int d, sal_paddr_t paddr) } return (void *)(vaddr + (sal_vaddr_t)(paddr - _dma_pbase)); } - /* TODO will not work with IOMMU */ + return bus_to_virt(paddr); } @@ -1264,7 +1290,7 @@ _sinval(int d, void *ptr, int length) #if defined(dma_cache_wback_inv) dma_cache_wback_inv((unsigned long)ptr, length); #else - /* FIXME: need proper function to replace dma_cache_sync */ + dma_sync_single_for_cpu(NULL, (unsigned long)ptr, length, DMA_BIDIRECTIONAL); #endif return 0; @@ -1276,7 +1302,7 @@ _sflush(int d, void *ptr, int length) #if defined(dma_cache_wback_inv) dma_cache_wback_inv((unsigned long)ptr, length); #else - /* FIXME: need proper function to replace dma_cache_sync */ + dma_sync_single_for_cpu(NULL, (unsigned long)ptr, length, DMA_BIDIRECTIONAL); #endif @@ -1304,7 +1330,7 @@ _dma_pprint(struct seq_file *m) pprintf(m, "\thimem=%s\n", himem); pprintf(m, "\thimemaddr=%s\n", himemaddr); pprintf(m, "DMA Memory (%s): %d bytes, %d used, %d free%s\n", - (_use_himem) ? "high" : "kernel", + (_use_himem) ? "high" : dmaalloc ? "kernel-api" : "kernel-chunk", (_dma_vbase) ? _dma_mem_size : 0, (_dma_vbase) ? mpool_usage(_dma_pool) : 0, (_dma_vbase) ? _dma_mem_size - mpool_usage(_dma_pool) : 0, diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c index dd003e1f9297..5d0f6a1a7529 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2014 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * * */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h index ef4b49dc2124..68b9669c9661 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2014 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * * */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c b/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c index 4c2db5e4de6c..0cdad662f992 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: mpool.c,v 1.18 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: mpool.c,v 1.18 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * */ #include diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile index 633475c2590e..444d72c4ebd1 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile @@ -1,33 +1,31 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- -# $Id: Makefile,v 1.1 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Id: Makefile,v 1.13 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # LOCALDIR = systems/bde/linux/user/kernel @@ -40,42 +38,93 @@ include $(SDK)/make/Make.config LIBS = $(LIBDIR)/libkern.a -ifneq ($(kernel_version),2_4) KERNEL_MODULE_DIR = kernel_module - THIS_MOD_NAME := linux-user-bde MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko +build: module $(KMODULE) -build: kernel_libs $(MODULE) $(KMODULE) -else -MODULE = $(LIBDIR)/linux-user-bde.o - -build: kernel_libs $(MODULE) -endif +ifeq (1,$(NO_PRECOMPILED_MODULE)) +# { +# +# For 'NO_PRECOMPILED_MODULE', the first kernel compilation is done +# in systems/bde/linux/user/kernel (and not in systems/bde/linux/user/kernel/kernel_module, +# which is not even created). +# KBUILD_EXTRA_SYMBOLS exports the symbols created on the first module compilation to +# all other module compilations. +# +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../kernel/Module.symvers +export KBUILD_EXTRA_SYMBOLS +# +# These are the objects which need to be compiled, in the kernel, to +# created the module object file. +# +SRCS_COMPOSING = $(THIS_MOD_NAME).c ../../../../linux/kernel/modules/shared/gmodule.c +OBJECTS_COMPOSING = "$(THIS_MOD_NAME)-file.o gmodule.o" +# +# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/bde/linux/user/kernel/kernel_module' +# is not created and all action is done in systems/bde/linux/user/kernel +# +module: $(KMODULE) +# +# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/bde/linux/kernel/kernel_module' +# is not created and all action is done in systems/bde/linux/kernel +# +$(KMODULE): $(SRCS_COMPOSING) + mkdir -p $(BLDDIR) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + rm -f $(BLDDIR)/*.c + rm -f $(BLDDIR)/*.o + rm -f $(BLDDIR)/*.ko + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/Makefile + cp ./*.c $(BLDDIR)/ + cp ./*.h $(BLDDIR)/ + cp ../../../../linux/kernel/modules/shared/*.c $(BLDDIR)/ + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/Module.symvers + # + # We change here the name of the 'base' file since, it seems, the module-creation + # mechanism does not add symbols when the name of one of the files is the same as + # the name of the module itself. + # + mv $(BLDDIR)/$(THIS_MOD_NAME).c $(BLDDIR)/$(THIS_MOD_NAME)-file.c + MOD_OBJS=$(OBJECTS_COMPOSING) MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR) $(THIS_MOD_NAME).ko LOC_BLDDIR=$(BLDDIR) LOC_SRCDIR=$(PWD) +# } +else +# { KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../kernel/kernel_module/Module.symvers +export KBUILD_EXTRA_SYMBOLS -$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) +module: $(MODULE) + +# +# This is for the compilation of the 'precompiled' object. We keep it +# here for compatibility. +# +$(MODULE): $(BLDDIR)/.tree $(BOBJS) kernel_libs $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ -ifneq ($(kernel_version),2_4) + $(KMODULE): $(MODULE) rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers - MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko + MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko + +include $(SDK)/make/Make.depend +# } endif kernel_libs: $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared -include $(SDK)/make/Make.depend - # Make.depend is before clean:: so that Make.depend's clean:: runs first. clean:: $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared $@ $(RM) $(BOBJS) $(MODULE) + $(RM) $(BLDDIR)/$(KERNEL_MODULE_DIR) + +distclean:: .PHONY: build kernel_libs diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c index deff8954665b..4d0929c86afd 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c @@ -1,17 +1,30 @@ /* - * Copyright 2017 Broadcom - * + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as * published by the Free Software Foundation (the "GPL"). - * + * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License version 2 (GPLv2) for more details. - * + * * You should have received a copy of the GNU General Public License * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * */ /* @@ -21,8 +34,6 @@ #include #include -#include -#include #include #include #include "linux-user-bde.h" @@ -72,12 +83,12 @@ MODULE_LICENSE("GPL"); #define INTC_INTR_REG_NUM (8) #define PAXB_INTRCLR_DELAY_REG_NUM (16) -/* -TODO:HX5 -The INTR base address values are changed for HX5, -hence making new #defines so runtime decisions can -be made. -*/ + + + + + + #define PAXB_0_PAXB_IC_INTRCLR_0 (0x180123a0) #define PAXB_0_PAXB_IC_INTRCLR_1 (0x180123a4) #define PAXB_0_PAXB_IC_INTRCLR_MODE_0 (0x180123a8) @@ -122,12 +133,18 @@ be made. #define CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_DELAY_REG0 (0x0292C3b0) #define CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_DELAY_BASE (CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_DELAY_REG0) #define CMICX_GEN2_PAXB_0_PCIE_ERROR_STATUS (0x0292C024) -#define CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_REG0 (0x0292D100) +#define CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_REG0 (0x0292d150) #define CMICX_GEN2_PAXB_0_INTC_INTR_STATUS_REG0 (0x0292D1A0) #define CMICX_GEN2_PAXB_0_INTC_INTR_RAW_STATUS_REG0 (0x0292D178) +#define CMICX_GEN2_PAXB_0_INTC_SET_INTR_ENABLE_REG0 (0x0292d100) +#define CMICX_GEN2_PAXB_0_INTC_CLEAR_INTR_ENABLE_REG0 (0x0292d128) + #define CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_BASE (CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_REG0) #define CMICX_GEN2_PAXB_0_INTC_INTR_STATUS_BASE (CMICX_GEN2_PAXB_0_INTC_INTR_STATUS_REG0) #define CMICX_GEN2_PAXB_0_INTC_INTR_RAW_STATUS_BASE (CMICX_GEN2_PAXB_0_INTC_INTR_RAW_STATUS_REG0) +#define CMICX_GEN2_PAXB_0_INTC_INTR_SET_ENABLE_BASE (CMICX_GEN2_PAXB_0_INTC_SET_INTR_ENABLE_REG0) +#define CMICX_GEN2_PAXB_0_INTC_INTR_CLEAR_ENABLE_BASE (CMICX_GEN2_PAXB_0_INTC_CLEAR_INTR_ENABLE_REG0) + #define CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0 5 #define CMICX_GEN2_INTC_PDMA_INTR_REG_IND_1 6 @@ -154,9 +171,10 @@ be made. #define HX5_IHOST_INTR_STATUS_MAP_NUM (INTC_INTR_REG_NUM * (sizeof(uint32))) #define IRQ_BIT(intr) (intr % (sizeof(uint32)*8)) #define IRQ_MASK_INDEX(intr) (intr / (sizeof(uint32)*8)) -#define HX5_SW_PROG_INTR_PRIORITY 73 -#define INTR_SW_PROG_INTR_BITPOS (1 << IRQ_BIT(HX5_SW_PROG_INTR_PRIORITY)) -#define INTC_SW_PROG_INTR_REG_IND IRQ_MASK_INDEX(HX5_SW_PROG_INTR_PRIORITY) +#define P19_SW_PROG_INTR_IRQ 69 +#define HX5_SW_PROG_INTR_IRQ 73 +#define INTR_SW_PROG_INTR_BITPOS (1 << IRQ_BIT(ihost_sw_prog_intr_num)) +#define INTC_SW_PROG_INTR_REG_IND IRQ_MASK_INDEX(ihost_sw_prog_intr_num) #define HX5_CHIP_INTR_LOW_PRIORITY 119 #define INTR_LOW_PRIORITY_BITPOS (1 << IRQ_BIT(HX5_CHIP_INTR_LOW_PRIORITY)) #define INTC_LOW_PRIORITY_INTR_REG_IND IRQ_MASK_INDEX(HX5_CHIP_INTR_LOW_PRIORITY) @@ -198,6 +216,7 @@ be made. static uint32 *ihost_intr_status_base = NULL; static uint32 *ihost_intr_enable_base = NULL; +static int ihost_sw_prog_intr_num = HX5_SW_PROG_INTR_IRQ; /* Module parameter for Interruptible timeout */ static int intr_timeout = 0; @@ -228,6 +247,8 @@ typedef void (*isr_f)(void *); typedef struct _intr_regs_s { uint32 intc_intr_status_base; uint32 intc_intr_enable_base; + uint32 intc_intr_set_enable_base; + uint32 intc_intr_clear_enable_base; uint32 intc_intr_raw_status_base; uint32 intc_intr_clear_0; uint32 intc_intr_clear_1; @@ -339,7 +360,7 @@ static _dma_pool_t _dma_pool; * Returns: * Nothing */ -static void +static void _cmic_interrupt(bde_ctrl_t *ctrl) { int d; @@ -650,6 +671,7 @@ _cmicx_gen2_interrupt(bde_ctrl_t *ctrl) uint32 stat, iena, mask, fmask; int active_interrupts = 0; bde_inst_resource_t *res; + uint32 intrs = 0; intr_count++; d = (((uint8 *)ctrl - (uint8 *)_devices) / sizeof (bde_ctrl_t)); @@ -664,25 +686,55 @@ _cmicx_gen2_interrupt(bde_ctrl_t *ctrl) } lkbde_irq_mask_get(d, &mask, &fmask); - for (ind = 0; ind < CMICX_GEN2_INTC_INTR_REG_NUM; ind++) { - IPROC_READ(d, ctrl->intr_regs.intc_intr_status_base + 4 * ind, stat); - if (stat == 0) { - continue; + + if (fmask) { + /* + * Packet DMA occupies 8 - 31 bits on IPROC_IRQ_BASE5, KNET only uses 8 - 23 bits for CMC0 currently + * Prioritizing IPROC_IRQ_BASE5 when ONLY Packet DMA interrupts are raised + */ + IPROC_READ(d, ctrl->intr_regs.intc_intr_status_base + 4 * CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0, stat); + IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0, iena); + intrs = stat & iena; + if (intrs && (intrs == (intrs & fmask))) { + IPROC_WRITE(d, ctrl->intr_regs.intc_intr_clear_enable_base + (4 * CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0), 0xFFFFFFFF); + IPROC_WRITE(d, ctrl->intr_regs.intc_intr_set_enable_base + (4 * CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0), 0x0); + + for (ind = 0; ind < CMICX_GEN2_INTC_INTR_REG_NUM; ind++) { + if (ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0) { + continue; + } + IPROC_READ(d, ctrl->intr_regs.intc_intr_status_base + 4 * ind, stat); + IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * ind, iena); + if (stat & iena) { + active_interrupts = 1; + break; + } + } + if (!active_interrupts) { + /** only KNET interrupt asserted */ + return; + } + } else if (intrs) { + active_interrupts = 1; } + } - if (fmask) { - /** Packet DMA 8 - 31 bits on IPROC_IRQ_BASE5 */ - if ((ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0) && !(stat & 0xFF)) { + /** check left interrupts */ + if (!active_interrupts) { + for (ind = 0; ind < CMICX_GEN2_INTC_INTR_REG_NUM; ind++) { + /** skip packetDMA */ + if (fmask && (ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0)) { continue; - } else if ((ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_1) && !(stat & 0xFFFFFF00)) { - /** Packet DMA 0 - 7 bits on IPROC_IRQ_BASE6 */ + } + IPROC_READ(d, ctrl->intr_regs.intc_intr_status_base + 4 * ind, stat); + if (stat == 0) { continue; } - } - IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * ind, iena); - if (stat & iena) { - active_interrupts = 1; - break; + IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * ind, iena); + if (stat & iena) { + active_interrupts = 1; + break; + } } } @@ -696,19 +748,11 @@ _cmicx_gen2_interrupt(bde_ctrl_t *ctrl) * enumerates the interrupts to be serviced */ for (ind = 0; ind < CMICX_GEN2_INTC_INTR_REG_NUM; ind++) { - if (fmask) { - /** TODO? change by KNET */ - if (ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0) { - IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * ind, iena); - IPROC_WRITE(d, ctrl->intr_regs.intc_intr_enable_base + (4 * ind), iena & ((fmask & 0xFFFFFF) << 8)); - continue; - } else if (ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_1) { - IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * ind, iena); - IPROC_WRITE(d, ctrl->intr_regs.intc_intr_enable_base + (4 * ind), iena & ((fmask & 0xFF) << 24)); - continue; - } + if (fmask && (intrs == (intrs & fmask)) && ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0) { + continue; } - IPROC_WRITE(d, ctrl->intr_regs.intc_intr_enable_base + (4 * ind), 0); + IPROC_WRITE(d, ctrl->intr_regs.intc_intr_clear_enable_base + (4 * ind), 0xFFFFFFFF); + IPROC_WRITE(d, ctrl->intr_regs.intc_intr_set_enable_base + (4 * ind), 0); } /* Notify */ @@ -1024,7 +1068,7 @@ _cmicd_interrupt(bde_ctrl_t *ctrl) /* The actual interrupt handler of ethernet devices */ -static void +static void _ether_interrupt(bde_ctrl_t *ctrl) { SSOC_WRITEL(0, ctrl->ba + 0x024/4); @@ -1047,6 +1091,9 @@ static struct _intr_mode_s { { (isr_f)_cmicd_interrupt, "CMICd" }, { (isr_f)_cmicd_cmc0_interrupt, "CMICd CMC0" }, { (isr_f)_cmicx_interrupt, "CMICx" }, +#ifdef NEED_CMICX_GEN2_INTERRUPT + { (isr_f)_cmicx_gen2_interrupt, "CMICx Gen2" }, +#endif { NULL, NULL } }; @@ -1082,10 +1129,24 @@ _intr_regs_init(bde_ctrl_t *ctrl, int flag) ctrl->intr_regs.intc_intr_clear_delay_base = HX5_PAXB_0_PAXB_IC_INTRCLR_DELAY_BASE; ctrl->intr_regs.intc_intr_pcie_err_status = HX5_PAXB_0_PCIE_ERROR_STATUS; ctrl->intr_regs.intc_intr_nof_regs = INTC_INTR_REG_NUM; + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + switch (ctrl->devid) { + case BCM53650_DEVICE_ID: + case BCM53651_DEVICE_ID: + case BCM53652_DEVICE_ID: + case BCM53653_DEVICE_ID: + ihost_sw_prog_intr_num = P19_SW_PROG_INTR_IRQ; + break; + default: + break; + } + } } else if (flag == 2){ ctrl->intr_regs.intc_intr_status_base = CMICX_GEN2_PAXB_0_INTC_INTR_STATUS_BASE; ctrl->intr_regs.intc_intr_raw_status_base = CMICX_GEN2_PAXB_0_INTC_INTR_RAW_STATUS_BASE; ctrl->intr_regs.intc_intr_enable_base = CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_BASE; + ctrl->intr_regs.intc_intr_set_enable_base = CMICX_GEN2_PAXB_0_INTC_INTR_SET_ENABLE_BASE; + ctrl->intr_regs.intc_intr_clear_enable_base = CMICX_GEN2_PAXB_0_INTC_INTR_CLEAR_ENABLE_BASE; ctrl->intr_regs.intc_intr_clear_0 = CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_0; ctrl->intr_regs.intc_intr_clear_1 = CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_1; ctrl->intr_regs.intc_intr_clear_mode_0 = CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_MODE_0; @@ -1227,6 +1288,10 @@ _devices_init(int d) case BCM56175_DEVICE_ID: case BCM56176_DEVICE_ID: case BCM53642_DEVICE_ID: + case BCM53650_DEVICE_ID: + case BCM53651_DEVICE_ID: + case BCM53652_DEVICE_ID: + case BCM53653_DEVICE_ID: ctrl->isr = (isr_f)_cmicx_interrupt; if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { if (!ihost_intr_enable_base) { @@ -1259,7 +1324,7 @@ _devices_init(int d) } else { ctrl->isr = (isr_f)_cmic_interrupt; if ((ctrl->dev_type & BDE_256K_REG_SPACE) && -#ifdef BCM_PETRA_SUPPORT /* FIXME remove code when hardware design is fixed */ +#ifdef BCM_PETRA_SUPPORT ctrl->devid != 0x1234 && #endif readl(ctrl->ba + CMICE_DEV_REV_ID) == 0) { @@ -1291,11 +1356,13 @@ _devices_init(int d) #ifdef BCM_DNX3_SUPPORT case JERICHO3_DEVICE_ID: - case Q4_DEVICE_ID: + case J3AI_DEVICE_ID: + + case Q3D_DEVICE_ID: #endif #ifdef BCM_DNXF3_SUPPORT - case BCM88910_DEVICE_ID: - case BCM88920_DEVICE_ID: + case RAMON2_DEVICE_ID: + case RAMON3_DEVICE_ID: #endif #if defined(BCM_DNX3_SUPPORT) || defined(BCM_DNXF3_SUPPORT) ctrl->isr = (isr_f)_cmicx_gen2_interrupt; @@ -1438,6 +1505,9 @@ _pprint(struct seq_file *m) uint32 state, instid; pprintf(m, "Broadcom Device Enumerator (%s)\n", LINUX_USER_BDE_NAME); +#ifdef LKM_BUILD_INFO + pprintf(m, "%s\n", LKM_BUILD_INFO); +#endif for (idx = 0; idx < user_bde->num_devices(BDE_ALL_DEVICES); idx++) { name = _intr_mode_str(_devices[idx].isr); if (name == NULL) { @@ -1477,7 +1547,7 @@ _pprint(struct seq_file *m) } #ifdef BCM_INSTANCE_SUPPORT -/* +/* * Allocate the DMA resource from DMA pool * Parameter : * dma_size (IN): allocate dma_size in MB @@ -1527,7 +1597,7 @@ _dma_resource_get(unsigned inst_id, phys_addr_t *cpu_pbase, phys_addr_t *dma_pba /* * Checks if we have the instance in _bde_inst_resource. If not, return LUBDE_SUCCESS==0 (considered a new instance). * If it exists with the same dmasize, return 1 (It is considered already in use) - * Otherwise if the device with the same index of the resource, has resource/instance index 0, return LUBDE_SUCCESS==0. (bug) + * Otherwise if the device with the same index of the resource, has resource/instance index 0, return LUBDE_SUCCESS==0. (error) * Otherwise return LUBDE_FAIL==-1 (It is considered to exist with a different dmasize). */ static int @@ -1544,7 +1614,7 @@ _instance_validate(unsigned int inst_id, unsigned int dmasize, linux_bde_device_ } if (res->is_active == 0) { - /* FIXME SDK-250746 check that the devices are not used by another active instance */ + return LUBDE_SUCCESS; } @@ -1612,7 +1682,7 @@ _instance_attach(unsigned int inst_id, unsigned int dma_size, linux_bde_device_b _bde_inst_resource->is_active = 0; /*_bde_inst_resource->dev will not be used when _bde_inst_resource->is_active == 0 */ } - + /* Validate the resource with inst_devices */ exist = _instance_validate(inst_id, dma_size, inst_devices); @@ -1655,7 +1725,7 @@ _instance_attach(unsigned int inst_id, unsigned int dma_size, linux_bde_device_b if (previous_inst_id == BDE_DEV_INST_ID_INVALID) { lkbde_dev_instid_set(i, inst_id); } - } /* TODO handle the case where the device is marked belonging to a different instance */ + } } } spin_unlock(&bde_resource_lock); @@ -1694,7 +1764,7 @@ _edk_instance_attach(unsigned int inst_id, unsigned int dma_size) * Returns: * 0 on success, <0 on error */ -static int +static int _ioctl(unsigned int cmd, unsigned long arg) { lubde_ioctl_t io; @@ -1708,9 +1778,9 @@ _ioctl(unsigned int cmd, unsigned long arg) if (copy_from_user(&io, (void *)arg, sizeof(io))) { return -EFAULT; } - + io.rc = LUBDE_SUCCESS; - + switch(cmd) { case LUBDE_VERSION: io.d0 = KBDE_VERSION; @@ -1768,7 +1838,7 @@ _ioctl(unsigned int cmd, unsigned long arg) break; case LUBDE_GET_DMA_INFO: inst_id = io.dev; - if (_bde_multi_inst){ + if (_bde_multi_inst) { if (_dma_resource_get(inst_id, &cpu_pbase, &dma_pbase, &size)) { io.rc = LUBDE_FAIL; } @@ -1796,6 +1866,19 @@ _ioctl(unsigned int cmd, unsigned long arg) io.d3 = 0; #endif break; + +#ifdef INCLUDE_SRAM_DMA + case LUBDE_GET_DEV_DMA_INFO: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + lkbde_get_sram_dma_info(io.dev, &io.dx.dw[1], &io.dx.dw[0]); + if (io.dx.dw[0] == 0) { + io.rc = LUBDE_FAIL; + } + break; +#endif /* INCLUDE_SRAM_DMA */ + case LUBDE_ENABLE_INTERRUPTS: if (!VALID_DEVICE(io.dev)) { return -EINVAL; @@ -1829,10 +1912,10 @@ _ioctl(unsigned int cmd, unsigned long arg) } } else { /* Process ethernet device interrupt */ - /* FIXME: for multiple chips */ + if (!_devices[io.dev].enabled) { user_bde->interrupt_connect(io.dev, - (void(*)(void *))_ether_interrupt, + (void(*)(void *))_ether_interrupt, _devices+io.dev); _devices[io.dev].enabled = 1; } @@ -1880,7 +1963,7 @@ _ioctl(unsigned int cmd, unsigned long arg) if (_devices[io.dev].dev_type & BDE_SWITCH_DEV_TYPE) { res = &_bde_inst_resource[_devices[io.dev].inst]; #ifdef BDE_LINUX_NON_INTERRUPTIBLE - wait_event_timeout(res->intr_wq, + wait_event_timeout(res->intr_wq, atomic_read(&res->intr) != 0, 100); #else @@ -1913,21 +1996,22 @@ _ioctl(unsigned int cmd, unsigned long arg) atomic_read(&res->intr) != 0); } #endif - /* - * Even if we get multiple interrupts, we + + /* + * Even if we get multiple interrupts, we * only run the interrupt handler once. */ atomic_set(&res->intr, 0); } else { #ifdef BDE_LINUX_NON_INTERRUPTIBLE - wait_event_timeout(_ether_interrupt_wq, + wait_event_timeout(_ether_interrupt_wq, atomic_read(&_ether_interrupt_has_taken_place) != 0, 100); #else - wait_event_interruptible(_ether_interrupt_wq, + wait_event_interruptible(_ether_interrupt_wq, atomic_read(&_ether_interrupt_has_taken_place) != 0); #endif - /* + /* * Even if we get multiple interrupts, we * only run the interrupt handler once. */ @@ -1983,14 +2067,21 @@ _ioctl(unsigned int cmd, unsigned long arg) /* CMICx device */ if (_devices[io.dev].isr == (isr_f)_cmicx_interrupt) { io.rc = lkbde_irq_mask_set(io.dev + LKBDE_IPROC_REG, io.d0, io.d1, 0); - } else { + } +#ifdef NEED_CMICX_GEN2_INTERRUPT + else if (_devices[io.dev].isr == (isr_f)_cmicx_gen2_interrupt) + { + io.rc = lkbde_irq_mask_set(io.dev | LKBDE_IPROC_REG, io.d0, io.d1, 0); + } +#endif + else { io.rc = lkbde_irq_mask_set(io.dev, io.d0, io.d1, 0); } break; case LUBDE_SPI_READ_REG: if (user_bde->spi_read(io.dev, io.d0, io.dx.buf, io.d1) == -1) { io.rc = LUBDE_FAIL; - } + } break; case LUBDE_SPI_WRITE_REG: if (user_bde->spi_write(io.dev, io.d0, io.dx.buf, io.d1) == -1) { @@ -2055,9 +2146,6 @@ _ioctl(unsigned int cmd, unsigned long arg) iounmap(mapaddr); } else { io.d1 = user_bde->iproc_read(io.dev, io.d0); - if (io.d1 == -1) { - io.rc = LUBDE_FAIL; - } } break; case LUBDE_IPROC_WRITE_REG: @@ -2081,6 +2169,38 @@ _ioctl(unsigned int cmd, unsigned long arg) case LUBDE_REPROBE: io.rc = _device_reprobe(); break; + case LUBDE_GET_DEVICE_PCI_INFO: + if (_devices[io.dev].dev_type & BDE_PCI_DEV_TYPE) { + if (lkbde_get_dev_pci_info(io.dev, &io.d0, &io.d1, &io.d2) < 0) + io.rc = LUBDE_FAIL; + } else { + io.rc = LUBDE_FAIL; + } + break; + case LUBDE_BAR2_READ32: + io.d1 = user_bde->read(io.dev, io.d0); + break; + case LUBDE_BAR2_WRITE32: + if (user_bde->write(io.dev, io.d0, io.d1) == -1) { + io.rc = LUBDE_FAIL; + } + break; + case LUBDE_BAR2_READ64: + { + uint64_t data; + data = user_bde->read64(io.dev, io.d0); + io.d1 = (uint32_t)data; + io.d2 = (uint32_t)(data >> 32); + } + break; + case LUBDE_BAR2_WRITE64: + { + uint64_t val; + val = ((uint64_t)io.d2 << 32) | (uint64_t)io.d1; + user_bde->write64(io.dev, io.d0, val); + } + break; + default: gprintk("Error: Invalid ioctl (%08x)\n", cmd); io.rc = LUBDE_FAIL; @@ -2097,15 +2217,15 @@ _ioctl(unsigned int cmd, unsigned long arg) /* Workaround for broken Busybox/PPC insmod */ static char _modname[] = LINUX_USER_BDE_NAME; -static gmodule_t _gmodule = +static gmodule_t _gmodule = { - .name = LINUX_USER_BDE_NAME, - .major = LINUX_USER_BDE_MAJOR, - .init = _init, - .cleanup = _cleanup, - .pprint = _pprint, + .name = LINUX_USER_BDE_NAME, + .major = LINUX_USER_BDE_MAJOR, + .init = _init, + .cleanup = _cleanup, + .pprint = _pprint, .ioctl = _ioctl, -}; +}; gmodule_t* gmodule_get(void) diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h index 4bd4b746c521..ebc2e6b5e6c2 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: linux-user-bde.h,v 1.23 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: linux-user-bde.h,v 1.23 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * */ #ifndef __LINUX_USER_BDE_H__ @@ -80,6 +78,9 @@ typedef struct { #define LUBDE_GET_DEVICE_TYPE _IO(LUBDE_MAGIC, 12) #define LUBDE_SPI_READ_REG _IO(LUBDE_MAGIC, 13) #define LUBDE_SPI_WRITE_REG _IO(LUBDE_MAGIC, 14) +#ifdef INCLUDE_SRAM_DMA +#define LUBDE_GET_DEV_DMA_INFO _IO(LUBDE_MAGIC, 18) +#endif #define LUBDE_READ_REG_16BIT_BUS _IO(LUBDE_MAGIC, 19) #define LUBDE_WRITE_REG_16BIT_BUS _IO(LUBDE_MAGIC, 20) #define LUBDE_GET_BUS_FEATURES _IO(LUBDE_MAGIC, 21) @@ -99,11 +100,16 @@ typedef struct { #define LUBDE_WAIT_FOR_EDK_INTERRUPT _IO(LUBDE_MAGIC, 35) #define LUBDE_ATTACH_EDK_INSTANCE _IO(LUBDE_MAGIC, 36) #define LUBDE_GET_EDK_DMA_INFO _IO(LUBDE_MAGIC, 37) +#define LUBDE_GET_DEVICE_PCI_INFO _IO(LUBDE_MAGIC, 38) +#define LUBDE_BAR2_READ32 _IO(LUBDE_MAGIC, 39) +#define LUBDE_BAR2_WRITE32 _IO(LUBDE_MAGIC, 40) +#define LUBDE_BAR2_READ64 _IO(LUBDE_MAGIC, 41) +#define LUBDE_BAR2_WRITE64 _IO(LUBDE_MAGIC, 42) #define LUBDE_SEM_OP_CREATE 1 #define LUBDE_SEM_OP_DESTROY 2 -#define LUBDE_SEM_OP_TAKE 3 + #define LUBDE_SEM_OP_TAKE 3 #define LUBDE_SEM_OP_GIVE 4 #define LUBDE_SUCCESS 0 diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h index 2d0651191fbb..33e6a46a1109 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2014 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * * */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h index 4b71b8f16ee3..47520de407b4 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2014 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * * */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h index a51dd2ac6f5f..170d6ef42986 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2015 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * * */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h index a0b88494823f..738de9b503fa 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2014 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * * */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c index ca8024c78a32..29334c997a9b 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2014 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * * */ @@ -349,7 +347,7 @@ shbde_iproc_pci_read(shbde_hal_t *shbde, void *iproc_regs, unsigned int addr) { unsigned int subwin_base; - void *reg; + void *reg = 0; shbde_iproc_config_t *icfg = &shbde->icfg; if (!iproc_regs) { @@ -359,16 +357,29 @@ shbde_iproc_pci_read(shbde_hal_t *shbde, void *iproc_regs, /* Sub-window size is 0x1000 (4K) */ subwin_base = (addr & ~0xfff); - if((icfg->cmic_ver >= 4) && - ((subwin_base == 0x10230000) || (subwin_base == 0x18012000))) { - /* Route the PAXB register through IMAP0_2 */ - reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff)); - } else if((icfg->cmic_ver >= 4) && - ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) { - /* Route the INTC block access through IMAP0_6 */ - reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff)); + if (icfg->iproc_ver >= 20) { + if (subwin_base == 0x292c000) { + /* Route PAXB register through IMAP0_2 */ + reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff)); + } else if (subwin_base == 0x292d000) { + /* Route INTC register through IMAP0_6 */ + reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff)); + } } else { - /* Update base address for sub-window 7 */ + if((icfg->cmic_ver >= 4) && + ((subwin_base == 0x10230000) || (subwin_base == 0x18012000))) { + /* Route the PAXB register through IMAP0_2 */ + reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff)); + } else if((icfg->cmic_ver >= 4) && + ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) { + /* Route the INTC block access through IMAP0_6 */ + reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff)); + } + } + + /* Not found fixed sub-window, reuse the sub-window 7 */ + if (0 == reg) { + /* Update base address for sub-window 7 */ subwin_base |= 1; /* Valid bit */ reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_7); iproc32_write(shbde, reg, subwin_base); @@ -400,7 +411,7 @@ shbde_iproc_pci_write(shbde_hal_t *shbde, void *iproc_regs, unsigned int addr, unsigned int data) { unsigned int subwin_base; - void *reg; + void *reg = 0; shbde_iproc_config_t *icfg = &shbde->icfg; if (!iproc_regs) { @@ -410,16 +421,29 @@ shbde_iproc_pci_write(shbde_hal_t *shbde, void *iproc_regs, /* Sub-window size is 0x1000 (4K) */ subwin_base = (addr & ~0xfff); - if((icfg->cmic_ver >= 4) && - ((subwin_base == 0x10230000) || (subwin_base == 0x18012000))) { - /* Route the PAXB register through IMAP0_2 */ - reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff)); - } else if((icfg->cmic_ver >= 4) && - ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) { - /* Route the INTC block access through IMAP0_6 */ - reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff)); + if (icfg->iproc_ver >= 20) { + if (subwin_base == 0x292c000) { + /* Route PAXB register through IMAP0_2 */ + reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff)); + } else if (subwin_base == 0x292d000) { + /* Route INTC register through IMAP0_6 */ + reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff)); + } } else { - /* Update base address for sub-window 7 */ + if((icfg->cmic_ver >= 4) && + ((subwin_base == 0x10230000) || (subwin_base == 0x18012000))) { + /* Route the PAXB register through IMAP0_2 */ + reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff)); + } else if((icfg->cmic_ver >= 4) && + ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) { + /* Route the INTC block access through IMAP0_6 */ + reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff)); + } + } + + /* Not found fixed sub-window */ + if (0 == reg) { + /* Update base address for sub-window 7 */ subwin_base |= 1; /* Valid bit */ reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_7); iproc32_write(shbde, reg, subwin_base); diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c index 1e38eb024adc..1684a1965b53 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2015 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * * */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c index 8e64b475a41f..6fa9f43bfee2 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2014 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * * */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile index b599580ae861..769935066a84 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile @@ -1,33 +1,31 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.10 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # # Makefile for SOC SAL support # diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile new file mode 100644 index 000000000000..b491fd1db5db --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile @@ -0,0 +1,93 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.3 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# +LOCALDIR = systems/linux/kernel/modules/bcm-genl + +include ${SDK}/make/Make.config + +LIBS = $(LIBDIR)/libkern.a + +ifndef DCBDIR +DCBDIR = $(SDK)/systems/linux/kernel/modules/dcb +# $(error 'The $$DCBDIR variable is not set') +endif +ifeq (1,$(NO_PRECOMPILED_MODULE)) +$(error 'DCB_LIB build is not supported if NO_PRECOMPILED_MODULE=1') +endif +LIBS += $(LIBDIR)/libdcb.a +CFLAGS += -DDCBLIB_SUPPORT -I$(DCBDIR)/include +ifeq (1,$(BUILD_GENL_PACKET)) +CFLAGS += -I${SDK}/systems/linux/kernel/modules/include/kernel +endif + +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := linux-bcm-genl +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +# BCM Network Device +# { +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../bcm-knet/kernel_module/Module.symvers +ifeq (1,$(BUILD_GENL_PACKET)) +KBUILD_EXTRA_SYMBOLS += ${BLDDIR}/../genl-packet/kernel_module/Module.symvers +endif +export KBUILD_EXTRA_SYMBOLS + +build: $(MODULE) $(KMODULE) +# +# This is for the compilation of the 'precompiled' object. We keep it +# here for compatibility. +# +$(LIBDIR)/libdcb.a: + $(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) \ + KADD_CFLAGS="-I${SDK}/systems/linux/kernel/modules/include $(KFLAGS) -D$(ENDIAN)" \ + CROSS_COMPILE=$(CROSS_COMPILE) + +$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ + +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko +# } + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. + +include ${SDK}/make/Make.depend + +clean:: + $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o + $(RM) $(BOBJS) $(MODULE) + $(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) clean + +.PHONY: build diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c new file mode 100644 index 000000000000..6cd8aa0ec4c3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c @@ -0,0 +1,200 @@ +/* + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + */ + +/* + * Middle-driver for communication between Linux KNET driver and + * drivers support Generic Netlink channel. + * + * This code is used to provide the device information. + * This driver is built with the DCB library as the helper for parsing + * the RX packet meta data from the Linux KNET driver filter call-back function. + * The environment DCBDIR must be set to indicate the directroy of the DCB + * library. + */ + +#include /* Must be included first */ +#include +#include +#include + +#include + +#include "bcm-genl-dev.h" + +/* Module header Op-Codes */ +#define SOC_HIGIG_OP_CPU 0x00 /* CPU Frame */ +#define SOC_HIGIG_OP_UC 0x01 /* Unicast Frame */ +#define SOC_HIGIG_OP_BC 0x02 /* Broadcast or DLF frame */ +#define SOC_HIGIG_OP_MC 0x03 /* Multicast Frame */ +#define SOC_HIGIG_OP_IPMC 0x04 /* IP Multicast Frame */ + +static dcb_handle_t g_dcb_hdl[LINUX_BDE_MAX_DEVICES]; + +static dcb_handle_t * +dcb_handle_get(int dev_no) +{ + uint16_t dev_id; + uint8_t rev_id; + dcb_handle_t *dcbh; + + if (dev_no >= LINUX_BDE_MAX_DEVICES || dev_no < 0) { + return NULL; + } + + dcbh = &g_dcb_hdl[dev_no]; + if (DCB_OP(dcbh) == NULL) { + if (bkn_hw_device_get(dev_no, &dev_id, &rev_id) < 0) { + return NULL; + } + if (dcb_handle_init(dcbh, dev_id, rev_id) != DCB_OK) { + gprintk("%s: dev id 0x%04x rev id 0x%02x is not supported\n", + __func__, dev_id, rev_id); + return NULL; + } + } + + return DCB_OP(dcbh) ? dcbh : NULL; +} + +int +bcmgenl_dev_pktmeta_rx_srcport_get(int dev_no, void *pkt_meta, + uint32_t *srcport) +{ + dcb_handle_t *dcbh = dcb_handle_get(dev_no); + + if (dcbh == NULL || srcport == NULL) { + return -1; + } + + *srcport = DCB_RX_SRCPORT_GET(dcbh, pkt_meta); + + return 0; +} + +int +bcmgenl_dev_pktmeta_rx_dstport_get(int dev_no, void *pkt_meta, + bool *mcast, uint32_t *dstport) +{ + dcb_handle_t *dcbh = dcb_handle_get(dev_no); + uint32_t opc; + + if (dcbh == NULL || mcast == NULL || dstport == NULL) { + return -1; + } + + opc = DCB_RX_OPCODE_GET(dcbh, pkt_meta); + *mcast = (opc == SOC_HIGIG_OP_CPU || opc == SOC_HIGIG_OP_UC) ? 0 : 1; + if (*mcast) { + *dstport = 0; + } else { + *dstport = DCB_RX_DESTPORT_GET(dcbh, pkt_meta); + } + + return 0; +} + +int +bcmgenl_dev_pktmeta_rx_reason_get(int dev_no, void *pkt_meta, uint64_t *reason) +{ + dcb_handle_t *dcbh = dcb_handle_get(dev_no); + + if (dcbh == NULL || reason == NULL) { + return -1; + } + + *reason = (uint64_t)DCB_RX_REASON_HI_GET(dcbh, pkt_meta) << 32; + *reason |= DCB_RX_REASON_GET(dcbh, pkt_meta); + + return 0; +} + +int +bcmgenl_dev_rx_reason_sample_source_get(int dev_no, uint64_t *val) +{ + dcb_handle_t *dcbh = dcb_handle_get(dev_no); + soc_rx_reason_t *map; + int idx = 0; + + if (dcbh == NULL || val == NULL) { + return -1; + } + *val = 0; + + if (DCB_TYPE(dcbh) == 38) { + /* Rx reason for SampleSouce is an encoded value (3) in bits [17:16] */ + *val = 0x30000; + } else { + map = DCB_OP(dcbh)->rx_reason_maps[0]; + do { + if (map[idx] == socRxReasonSampleSource) { + *val = (uint64_t)1 << idx; + break; + } + } while (map[++idx] != socRxReasonInvalid); + } + + if (*val == 0) { + gprintk("%s: No rx reasone sample source for dcb type %d\n", + __func__, DCB_TYPE(dcbh)); + return -1; + } + return 0; +} + +int +bcmgenl_dev_dcb_info_get(int dev_no, int *dcb_type, int *dcb_size) +{ + dcb_handle_t *dcbh = dcb_handle_get(dev_no); + + if (dcbh == NULL) { + return -1; + } + + if (dcb_type) { + *dcb_type = DCB_TYPE(dcbh); + } + if (dcb_size) { + *dcb_size = DCB_SIZE(dcbh); + } + + return 0; +} + +int +bcmgenl_dev_init(void) +{ + memset(g_dcb_hdl, 0, sizeof(g_dcb_hdl)); + return 0; +} + +int +bcmgenl_dev_cleanup(void) +{ + return 0; +} diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h new file mode 100644 index 000000000000..80494346ca3c --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h @@ -0,0 +1,56 @@ +/* + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + */ + +#ifndef __BCM_GENL_DEV_H__ +#define __BCM_GENL_DEV_H__ + +extern int +bcmgenl_dev_pktmeta_rx_srcport_get(int dev_no, void *pkt_meta, + uint32_t *srcport); + +extern int +bcmgenl_dev_pktmeta_rx_dstport_get(int dev_no, void *pkt_meta, + bool *mcast, uint32_t *dstport); + +extern int +bcmgenl_dev_pktmeta_rx_reason_get(int dev_no, void *pkt_meta, uint64_t *reason); + +extern int +bcmgenl_dev_rx_reason_sample_source_get(int dev_no, uint64_t *val); + +extern int +bcmgenl_dev_dcb_info_get(int dev_no, int *dcb_type, int *dcb_size); + +extern int +bcmgenl_dev_init(void); + +extern int +bcmgenl_dev_cleanup(void); + +#endif /* __BCM_GENL_DEV_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c new file mode 100644 index 000000000000..18a967ee148b --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c @@ -0,0 +1,294 @@ +/* + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + */ + +/* + * Middle-driver for communication between Linux KNET driver and + * drivers support Generic Netlink channel. + * + * This code is to handle the NET interfaces from the create and destroy + * call-back functios of Linux KNET driver. + */ + +#include /* Must be included first */ +#include +#include +#include +#include +#include +#include +#include "bcm-genl-netif.h" + +/* generic netlink interface info */ +typedef struct { + struct list_head netif_list; + int netif_count; + spinlock_t lock; +} genl_netif_info_t; +static genl_netif_info_t g_netif_info; + +typedef struct { + struct list_head list; + bcmgenl_netif_t netif; +} genl_netif_t; + +static uint32 g_sample_rate; +static uint32 g_sample_size; + +static int +knet_netif_create_cb(struct net_device *dev, int dev_no, kcom_netif_t *netif) +{ + int found = 0; + struct list_head *list_ptr; + genl_netif_t *genl_netif, *lgenl_netif; + bcmgenl_netif_t *bcmgenl_netif; + unsigned long flags; + + if ((genl_netif = kmalloc(sizeof(genl_netif_t), GFP_ATOMIC)) == NULL) { + gprintk("%s: failed to alloc genl-netif memory for netif '%s'\n", + __func__, dev->name); + return -1; + } + + bcmgenl_netif = &genl_netif->netif; + bcmgenl_netif->dev = dev; + bcmgenl_netif->id = netif->id; + bcmgenl_netif->port = netif->port; + bcmgenl_netif->vlan = netif->vlan; + bcmgenl_netif->qnum = netif->qnum; + bcmgenl_netif->sample_rate = g_sample_rate; + bcmgenl_netif->sample_size = g_sample_size; + + /* insert netif sorted by ID similar to bkn_knet_netif_create() */ + spin_lock_irqsave(&g_netif_info.lock, flags); + + list_for_each(list_ptr, &g_netif_info.netif_list) { + lgenl_netif = list_entry(list_ptr, genl_netif_t, list); + bcmgenl_netif = &lgenl_netif->netif; + if (netif->id < bcmgenl_netif->id) { + found = 1; + break; + } + } + if (found) { + /* Replace previously removed interface */ + list_add_tail(&genl_netif->list, &lgenl_netif->list); + } else { + /* No holes - add to end of list */ + list_add_tail(&genl_netif->list, &g_netif_info.netif_list); + } + g_netif_info.netif_count++; + + spin_unlock_irqrestore(&g_netif_info.lock, flags); + + return 0; +} + +static int +knet_netif_destroy_cb(struct net_device *dev, int dev_no, kcom_netif_t *netif) +{ + int found = 0; + struct list_head *list_ptr, *list_next; + genl_netif_t *genl_netif; + bcmgenl_netif_t *bcmgenl_netif; + unsigned long flags; + + if (!netif || !dev) { + gprintk("%s: netif or net_device is NULL\n", __func__); + return -1; + } + + spin_lock_irqsave(&g_netif_info.lock, flags); + list_for_each_safe(list_ptr, list_next, &g_netif_info.netif_list) { + genl_netif = list_entry(list_ptr, genl_netif_t, list); + bcmgenl_netif = &genl_netif->netif; + if (netif->id == bcmgenl_netif->id) { + found = 1; + list_del(list_ptr); + g_netif_info.netif_count--; + break; + } + } + spin_unlock_irqrestore(&g_netif_info.lock, flags); + + if (!found) { + gprintk("%s: netif ID %d not found!\n", __func__, netif->id); + return -1; + } + kfree(genl_netif); + return 0; +} + +int +bcmgenl_netif_search(char *dev_name, + bcmgenl_netif_search_f cb, void *cb_data) +{ + struct list_head *list_ptr; + genl_netif_t *genl_netif; + bcmgenl_netif_t *bcmgenl_netif; + unsigned long flags; + int rv; + int cnt = 0; + + if (cb == NULL) { + return -1; + } + + spin_lock_irqsave(&g_netif_info.lock, flags); + list_for_each(list_ptr, &g_netif_info.netif_list) { + genl_netif = list_entry(list_ptr, genl_netif_t, list); + bcmgenl_netif = &genl_netif->netif; + if (dev_name && strcmp(bcmgenl_netif->dev->name, dev_name) != 0) { + continue; + } + rv = cb(cb_data, bcmgenl_netif); + if (rv < 0) { + spin_unlock_irqrestore(&g_netif_info.lock, flags); + return rv; + } + cnt++; + } + spin_unlock_irqrestore(&g_netif_info.lock, flags); + + return cnt; +} + +int +bcmgenl_netif_num_get(void) +{ + int num = 0; + unsigned long flags; + + spin_lock_irqsave(&g_netif_info.lock, flags); + num = g_netif_info.netif_count; + spin_unlock_irqrestore(&g_netif_info.lock, flags); + + return num; +} + +int +bcmgenl_netif_get_by_ifindex(int ifindex, bcmgenl_netif_t *bcmgenl_netif) +{ + struct list_head *list_ptr; + genl_netif_t *genl_netif; + bcmgenl_netif_t *netif; + unsigned long flags; + + if (bcmgenl_netif == NULL) { + return -1; + } + + /* look for port from list of available net_devices */ + spin_lock_irqsave(&g_netif_info.lock, flags); + list_for_each(list_ptr, &g_netif_info.netif_list) { + genl_netif = list_entry(list_ptr, genl_netif_t, list); + netif = &genl_netif->netif; + if (netif->dev->ifindex == ifindex) { + memcpy(bcmgenl_netif, netif, sizeof(*bcmgenl_netif)); + spin_unlock_irqrestore(&g_netif_info.lock, flags); + return 0; + } + } + spin_unlock_irqrestore(&g_netif_info.lock, flags); + + return -1; +} + +int +bcmgenl_netif_get_by_port(int port, bcmgenl_netif_t *bcmgenl_netif) +{ + struct list_head *list_ptr; + genl_netif_t *genl_netif; + bcmgenl_netif_t *netif; + unsigned long flags; + + if (bcmgenl_netif == NULL) { + return -1; + } + + /* look for port from list of available net_devices */ + spin_lock_irqsave(&g_netif_info.lock, flags); + list_for_each(list_ptr, &g_netif_info.netif_list) { + genl_netif = list_entry(list_ptr, genl_netif_t, list); + netif = &genl_netif->netif; + if (netif->port == port) { + memcpy(bcmgenl_netif, netif, sizeof(bcmgenl_netif_t)); + spin_unlock_irqrestore(&g_netif_info.lock, flags); + return 0; + } + } + spin_unlock_irqrestore(&g_netif_info.lock, flags); + + return -1; +} + +int +bcmgenl_netif_default_sample_set(int sample_rate, int sample_size) +{ + if (sample_rate >= 0) { + g_sample_rate = sample_rate; + } + if (sample_size >= 0) { + g_sample_size = sample_size; + } + + return 0; +} + +int +bcmgenl_netif_init(void) +{ + memset(&g_netif_info, 0, sizeof(genl_netif_info_t)); + + INIT_LIST_HEAD(&g_netif_info.netif_list); + spin_lock_init(&g_netif_info.lock); + + bkn_netif_create_cb_register(knet_netif_create_cb); + bkn_netif_destroy_cb_register(knet_netif_destroy_cb); + + return 0; +} + +int +bcmgenl_netif_cleanup(void) +{ + genl_netif_t *genl_netif; + + bkn_netif_create_cb_unregister(knet_netif_create_cb); + bkn_netif_destroy_cb_unregister(knet_netif_destroy_cb); + + while (!list_empty(&g_netif_info.netif_list)) { + genl_netif = list_entry(g_netif_info.netif_list.next, + genl_netif_t, list); + list_del(&genl_netif->list); + kfree(genl_netif); + } + + return 0; +} + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h new file mode 100644 index 000000000000..75bdeada6377 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h @@ -0,0 +1,70 @@ +/* + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + */ + +#ifndef __BCM_GENL_NETIF_H__ +#define __BCM_GENL_NETIF_H__ + +#include + +/* generic netlink data per interface */ +typedef struct { + struct net_device *dev; + unsigned short id; + unsigned short port; + unsigned short vlan; + unsigned short qnum; + unsigned int sample_rate; + unsigned int sample_size; +} bcmgenl_netif_t; + +typedef int +(*bcmgenl_netif_search_f)(void *cb_data, bcmgenl_netif_t *bcmgenl_netif); + +extern int +bcmgenl_netif_search(char *dev_name, bcmgenl_netif_search_f cb, void *cb_data); + +extern int +bcmgenl_netif_num_get(void); + +extern int +bcmgenl_netif_get_by_ifindex(int ifindex, bcmgenl_netif_t *bcmgenl_netif); + +extern int +bcmgenl_netif_get_by_port(int port, bcmgenl_netif_t *bcmgenl_netif); + +extern int +bcmgenl_netif_default_sample_set(int sample_rate, int sample_size); + +extern int +bcmgenl_netif_init(void); + +extern int +bcmgenl_netif_cleanup(void); + +#endif /* __BCM_GENL_NETIF_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c new file mode 100644 index 000000000000..2e8744440f45 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c @@ -0,0 +1,660 @@ +/* + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + */ + +/* + * Middle-driver for communication between Linux KNET driver and + * drivers support Generic Netlink channel. + * + * This code is used to integrate packet from KNET Rx filter + * call-back function to the genl_packet driver from Google + * for sending packets to userspace applications using Generic Netlink + * interfaces. + * + * This driver is also built with the DCB library as the helper for parsing + * the RX packet meta data from the Linux KNET driver filter call-back function. + * The environment DCBDIR must be set to indicate the directroy of the DCB + * library. + */ +#ifdef BUILD_GENL_PACKET +#include /* Must be included first */ +#include +#include +#include +#include +#include +#include +#include +#include +#ifndef LINUX_HAS_MONOTONIC_TIME +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,17,0) +#include +#define LINUX_HAS_MONOTONIC_TIME +#endif +#endif +#include +#include +#include +#include "bcm-genl-packet.h" +#include "bcm-genl-dev.h" +#include "bcm-genl-netif.h" + +#define GENL_CB_DBG +#ifdef GENL_CB_DBG +static int debug; + +#define DBG_LVL_PRINT 0x1 +#define DBG_LVL_PDMP 0x2 +#define GENL_CB_DBG_PRINT(...) \ + if (debug & DBG_LVL_PRINT) { \ + gprintk(__VA_ARGS__); \ + } +#else +#define GENL_CB_DBG_PRINT(...) +#endif + +/* last should be static or global */ +#ifdef LINUX_HAS_MONOTONIC_TIME +#define genl_limited_gprintk(last, ...) { \ + struct timespec64 tv; \ + ktime_get_ts64(&tv); \ + if (tv.tv_sec != last) { \ + gprintk(__VA_ARGS__); \ + last = tv.tv_sec; \ + } \ +} +#else +#define genl_limited_gprintk(last, ...) { \ + struct timeval tv; \ + do_gettimeofday(&tv); \ + if (tv.tv_sec != last) { \ + gprintk(__VA_ARGS__); \ + last = tv.tv_sec; \ + } \ +} +#endif + +#define FCS_SZ 4 + +#define GENL_QLEN_DFLT 1024 +static int genl_qlen = GENL_QLEN_DFLT; +LKM_MOD_PARAM(genl_qlen, "i", int, 0); +MODULE_PARM_DESC(genl_qlen, +"generic cb queue length (default 1024 buffers)"); + +/* driver proc entry root */ +static struct proc_dir_entry *genl_proc_root = NULL; +static char genl_procfs_path[80]; + +/* generic general info */ +typedef struct { + struct net *netns; +} genl_info_t; +static genl_info_t g_genl_info = {0}; + +/* Maintain sampled pkt statistics */ +typedef struct genl_stats_s { + unsigned long pkts_f_genl_cb; + unsigned long pkts_f_genl_mod; + unsigned long pkts_f_handled; + unsigned long pkts_f_tag_stripped; + unsigned long pkts_f_dst_mc; + unsigned long pkts_f_src_cpu; + unsigned long pkts_f_dst_cpu; + unsigned long pkts_c_qlen_cur; + unsigned long pkts_c_qlen_hi; + unsigned long pkts_d_qlen_max; + unsigned long pkts_d_no_mem; + unsigned long pkts_d_not_ready; + unsigned long pkts_d_metadata; + unsigned long pkts_d_meta_srcport; + unsigned long pkts_d_meta_dstport; + unsigned long pkts_d_invalid_size; +} genl_stats_t; +static genl_stats_t g_genl_stats = {0}; + +typedef struct genl_meta_s { + int src_ifindex; + int dst_ifindex; + uint32 user_data; +} genl_meta_t; + +typedef struct genl_pkt_s { + struct list_head list; + struct net *netns; + genl_meta_t meta; + struct sk_buff *skb; +} genl_pkt_t; + +typedef struct genl_work_s { + struct list_head pkt_list; + struct work_struct wq; + spinlock_t lock; +} genl_work_t; +static genl_work_t g_genl_work; + +static int +genl_meta_srcport_get(int dev_no, void *pkt_meta) +{ + uint32_t p; + + if (bcmgenl_dev_pktmeta_rx_srcport_get(dev_no, pkt_meta, &p) < 0) { + return -1; + } + + return p; +} + +static int +genl_meta_dstport_get(int dev_no, void *pkt_meta, bool *is_mcast) +{ + bool mcast; + uint32_t p; + + if (bcmgenl_dev_pktmeta_rx_dstport_get(dev_no, pkt_meta, &mcast, &p) < 0) { + return -1; + } + if (is_mcast) { + *is_mcast = mcast; + } + + return p; +} + +static int +genl_meta_get(int dev_no, kcom_filter_t *kf, void *pkt_meta, + genl_meta_t *genl_meta) +{ + bool mcast = false; + int srcport, dstport; + int src_ifindex = 0; + int dst_ifindex = 0; + bcmgenl_netif_t bcmgenl_netif; + +#ifdef GENL_CB_DBG + if (debug & 0x1) { + int i=0; + uint8_t *meta = (uint8_t*)pkt_meta; + GENL_CB_DBG_PRINT("%s: generic pkt metadata\n", __func__); + for (i=0; i<64; i+=16) { + GENL_CB_DBG_PRINT("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", + meta[i+0], meta[i+1], meta[i+2], meta[i+3], meta[i+4], meta[i+5], meta[i+6], meta[i+7], + meta[i+8], meta[i+9], meta[i+10], meta[i+11], meta[i+12], meta[i+13], meta[i+14], meta[i+15]); + } + } +#endif + + /* parse pkt metadata for src and dst ports */ + srcport = genl_meta_srcport_get(dev_no, pkt_meta); + dstport = genl_meta_dstport_get(dev_no, pkt_meta, &mcast); + if (srcport == -1 || dstport == -1) { + gprintk("%s: invalid srcport %d or dstport %d\n", __func__, srcport, dstport); + return -1; + } + + /* find src port netif (no need to lookup CPU port) */ + if (srcport != 0) { + if (bcmgenl_netif_get_by_port(srcport, &bcmgenl_netif) == 0) { + src_ifindex = bcmgenl_netif.dev->ifindex; + } else { + src_ifindex = -1; + g_genl_stats.pkts_d_meta_srcport++; + GENL_CB_DBG_PRINT("%s: could not find srcport(%d)\n", __func__, srcport); + } + } else { + g_genl_stats.pkts_f_src_cpu++; + } + + /* set generic dst type for MC pkts */ + if (mcast) { + g_genl_stats.pkts_f_dst_mc++; + /* find dst port netif for UC pkts (no need to lookup CPU port) */ + } else if (dstport != 0) { + if (bcmgenl_netif_get_by_port(dstport, &bcmgenl_netif) == 0) { + dst_ifindex = bcmgenl_netif.dev->ifindex; + } else { + g_genl_stats.pkts_d_meta_dstport++; + GENL_CB_DBG_PRINT("%s: could not find dstport(%d)\n", __func__, dstport); + } + } else if (dstport == 0) { + dst_ifindex = 0; + g_genl_stats.pkts_f_dst_cpu++; + } + + GENL_CB_DBG_PRINT("%s: dstport %d, src_ifindex 0x%x, dst_ifindex 0x%x\n", + __func__, dstport, src_ifindex, dst_ifindex); + + genl_meta->src_ifindex = src_ifindex; + genl_meta->dst_ifindex = dst_ifindex; + return 0; +} + +static void dump_pkt(struct sk_buff *skb) +{ + int idx; + char str[128]; + uint8_t *data = skb->data; + + for (idx = 0; idx < skb->len; idx++) { + if ((idx & 0xf) == 0) { + sprintf(str, "%04x: ", idx); + } + if ((idx & 0xf) == 8) { + sprintf(&str[strlen(str)], "- "); + } + sprintf(&str[strlen(str)], "%02x ", data[idx]); + if ((idx & 0xf) == 0xf) { + sprintf(&str[strlen(str)], "\n"); + gprintk(str); + } + } + if ((idx & 0xf) != 0) { + sprintf(&str[strlen(str)], "\n"); + gprintk(str); + } +} + +static void +genl_task(struct work_struct *work) +{ + genl_work_t *genl_work = container_of(work, genl_work_t, wq); + unsigned long flags; + struct list_head *list_ptr, *list_next; + genl_pkt_t *pkt; + + spin_lock_irqsave(&genl_work->lock, flags); + list_for_each_safe(list_ptr, list_next, &genl_work->pkt_list) { + /* dequeue pkt from list */ + pkt = list_entry(list_ptr, genl_pkt_t, list); + list_del(list_ptr); + g_genl_stats.pkts_c_qlen_cur--; + spin_unlock_irqrestore(&genl_work->lock, flags); + + /* send to genl */ + if (pkt) { + GENL_CB_DBG_PRINT("%s: netns 0x%p, src_ifdx 0x%x, dst_ifdx 0x%x\n", + __func__, pkt->netns, pkt->meta.src_ifindex, + pkt->meta.dst_ifindex); + + if (debug & DBG_LVL_PDMP) { + dump_pkt(pkt->skb); + } + + genl_packet_send_packet(pkt->netns, + pkt->skb, + pkt->meta.src_ifindex, + pkt->meta.dst_ifindex, + pkt->meta.user_data); + g_genl_stats.pkts_f_genl_mod++; + + dev_kfree_skb_any(pkt->skb); + kfree(pkt); + } + spin_lock_irqsave(&genl_work->lock, flags); + } + spin_unlock_irqrestore(&genl_work->lock, flags); +} + +static int +genl_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta, + int chan, kcom_filter_t *kf) +{ + genl_meta_t meta; + int rv = 0; + unsigned long flags; + genl_pkt_t *genl_pkt; + struct sk_buff *skb; + bool strip_tag = false; + static uint32_t last_drop = 0; + static uint32_t last_alloc = 0; + static uint32_t last_skb_fail = 0; + + GENL_CB_DBG_PRINT("%s: pkt size %d, kf->dest_id %d, kf->cb_user_data %d\n", + __func__, size, kf->dest_id, kf->cb_user_data); + + g_genl_stats.pkts_f_genl_cb++; + + /* get generic metadata */ + rv = genl_meta_get(dev_no, kf, pkt_meta, &meta); + if (rv < 0) { + gprintk("%s: Could not parse pkt metadata\n", __func__); + g_genl_stats.pkts_d_metadata++; + goto GENL_FILTER_CB_PKT_HANDLED; + } + + meta.user_data = kf->cb_user_data; + + /* Adjust original pkt size to remove 4B FCS */ + if (size < FCS_SZ) { + g_genl_stats.pkts_d_invalid_size++; + goto GENL_FILTER_CB_PKT_HANDLED; + } else { + size -= FCS_SZ; + } + + GENL_CB_DBG_PRINT("%s: netns 0x%p, src_ifdx 0x%x, dst_ifdx 0x%x, user_data %d\n", + __func__, g_genl_info.netns, meta.src_ifindex, meta.dst_ifindex, meta.user_data); + + if (g_genl_stats.pkts_c_qlen_cur >= genl_qlen) { + g_genl_stats.pkts_d_qlen_max++; + genl_limited_gprintk(last_drop, + "%s: tail drop due to max qlen %d reached: %lu\n", + __func__, genl_qlen, g_genl_stats.pkts_d_qlen_max); + goto GENL_FILTER_CB_PKT_HANDLED; + } + + if ((genl_pkt = kmalloc(sizeof(genl_pkt_t), GFP_ATOMIC)) == NULL) + { + g_genl_stats.pkts_d_no_mem++; + genl_limited_gprintk(last_alloc, "%s: failed to alloc generic mem for pkt: %lu\n", __func__, g_genl_stats.pkts_d_no_mem); + goto GENL_FILTER_CB_PKT_HANDLED; + } + memcpy(&genl_pkt->meta, &meta, sizeof(genl_meta_t)); + genl_pkt->netns = g_genl_info.netns; + + if (size >= 16) { + uint16_t vlan_proto = (uint16_t) ((pkt[12] << 8) | pkt[13]); + uint16_t vlan = (uint16_t) ((pkt[14] << 8) | pkt[15]); + strip_tag = ((vlan_proto == 0x8100) || (vlan_proto == 0x88a8) || (vlan_proto == 0x9100)) + && (vlan == 0xFFF); + } + + if (strip_tag) { + size -= 4; + } + + if ((skb = dev_alloc_skb(size)) == NULL) + { + g_genl_stats.pkts_d_no_mem++; + genl_limited_gprintk(last_skb_fail, "%s: failed to alloc generic mem for pkt skb: %lu\n", __func__, g_genl_stats.pkts_d_no_mem); + goto GENL_FILTER_CB_PKT_HANDLED; + } + + /* setup skb by copying packet content */ + if(strip_tag) { + memcpy(skb->data, pkt, 12); + memcpy(skb->data + 12, pkt + 16, size - 12); + g_genl_stats.pkts_f_tag_stripped++; + } else { + memcpy(skb->data, pkt, size); + } + + skb_put(skb, size); + skb->len = size; + genl_pkt->skb = skb; + + spin_lock_irqsave(&g_genl_work.lock, flags); + list_add_tail(&genl_pkt->list, &g_genl_work.pkt_list); + + g_genl_stats.pkts_c_qlen_cur++; + if (g_genl_stats.pkts_c_qlen_cur > g_genl_stats.pkts_c_qlen_hi) + { + g_genl_stats.pkts_c_qlen_hi = g_genl_stats.pkts_c_qlen_cur; + } + + schedule_work(&g_genl_work.wq); + spin_unlock_irqrestore(&g_genl_work.lock, flags); + + /* expected rv values: + * -ve for error + * 0 for passthrough + * 1 for packet handled + * */ + + /* Set rv to packet handled */ + rv = 1; + +GENL_FILTER_CB_PKT_HANDLED: + g_genl_stats.pkts_f_handled++; + return rv; +} + +/* + * generic debug Proc Read Entry + */ +static int +genl_proc_debug_show(struct seq_file *m, void *v) +{ + seq_printf(m, "BCM KNET %s Callback Config\n", GENL_PACKET_NAME); + seq_printf(m, " debug: 0x%x\n", debug); + seq_printf(m, " netif_count: %d\n", bcmgenl_netif_num_get()); + seq_printf(m, " queue length: %d\n", genl_qlen); + + return 0; +} + +static int +genl_proc_debug_open(struct inode * inode, struct file * file) +{ + return single_open(file, genl_proc_debug_show, NULL); +} + +/* + * generic debug Proc Write Entry + * + * Syntax: + * debug= + * + * Where corresponds to the debug module parameter. + * + * Examples: + * debug=0x1 + */ +static ssize_t +genl_proc_debug_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + char debug_str[40]; + char *ptr; + + if (count > sizeof(debug_str)) { + count = sizeof(debug_str) - 1; + debug_str[count] = '\0'; + } + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + if ((ptr = strstr(debug_str, "debug=")) != NULL) { + ptr += 6; + debug = simple_strtol(ptr, NULL, 0); + } else { + gprintk("Warning: unknown configuration setting\n"); + } + + return count; +} + +struct proc_ops genl_proc_debug_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = genl_proc_debug_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = genl_proc_debug_write, + .proc_release = single_release, +}; + +static int +genl_proc_stats_show(struct seq_file *m, void *v) +{ + seq_printf(m, "BCM KNET %s Callback Stats\n", GENL_PACKET_NAME); + seq_printf(m, " pkts filter generic cb %10lu\n", g_genl_stats.pkts_f_genl_cb); + seq_printf(m, " pkts sent to generic module %10lu\n", g_genl_stats.pkts_f_genl_mod); + seq_printf(m, " pkts handled by generic cb %10lu\n", g_genl_stats.pkts_f_handled); + seq_printf(m, " pkts with vlan tag stripped %10lu\n", g_genl_stats.pkts_f_tag_stripped); + seq_printf(m, " pkts with mc destination %10lu\n", g_genl_stats.pkts_f_dst_mc); + seq_printf(m, " pkts with cpu source %10lu\n", g_genl_stats.pkts_f_src_cpu); + seq_printf(m, " pkts with cpu destination %10lu\n", g_genl_stats.pkts_f_dst_cpu); + seq_printf(m, " pkts current queue length %10lu\n", g_genl_stats.pkts_c_qlen_cur); + seq_printf(m, " pkts high queue length %10lu\n", g_genl_stats.pkts_c_qlen_hi); + seq_printf(m, " pkts drop max queue length %10lu\n", g_genl_stats.pkts_d_qlen_max); + seq_printf(m, " pkts drop no memory %10lu\n", g_genl_stats.pkts_d_no_mem); + seq_printf(m, " pkts drop generic not ready %10lu\n", g_genl_stats.pkts_d_not_ready); + seq_printf(m, " pkts drop metadata parse error %10lu\n", g_genl_stats.pkts_d_metadata); + seq_printf(m, " pkts with invalid src port %10lu\n", g_genl_stats.pkts_d_meta_srcport); + seq_printf(m, " pkts with invalid dst port %10lu\n", g_genl_stats.pkts_d_meta_dstport); + seq_printf(m, " pkts with invalid orig pkt sz %10lu\n", g_genl_stats.pkts_d_invalid_size); + return 0; +} + +static int +genl_proc_stats_open(struct inode * inode, struct file * file) +{ + return single_open(file, genl_proc_stats_show, NULL); +} + +/* + * generic stats Proc Write Entry + * + * Syntax: + * write any value to clear stats + */ +static ssize_t +genl_proc_stats_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + int qlen_cur = 0; + unsigned long flags; + + spin_lock_irqsave(&g_genl_work.lock, flags); + qlen_cur = g_genl_stats.pkts_c_qlen_cur; + memset(&g_genl_stats, 0, sizeof(genl_stats_t)); + g_genl_stats.pkts_c_qlen_cur = qlen_cur; + spin_unlock_irqrestore(&g_genl_work.lock, flags); + + return count; +} +struct proc_ops genl_proc_stats_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = genl_proc_stats_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = genl_proc_stats_write, + .proc_release = single_release, +}; + +static int +genl_cb_proc_init(char *procfs_path) +{ + struct proc_dir_entry *entry; + + if (procfs_path == NULL || procfs_path[0] == '\0') { + return 0; + } + + /* create procfs for generic */ + snprintf(genl_procfs_path, sizeof(genl_procfs_path) - 1, + "%s/%s", procfs_path, GENL_PACKET_NAME); + genl_proc_root = proc_mkdir(genl_procfs_path, NULL); + + /* create procfs for generic stats */ + PROC_CREATE(entry, "stats", 0666, genl_proc_root, + &genl_proc_stats_file_ops); + if (entry == NULL) { + return -1; + } + + /* create procfs for debug log */ + PROC_CREATE(entry, "debug", 0666, genl_proc_root, &genl_proc_debug_file_ops); + if (entry == NULL) { + return -1; + } + + return 0; +} + +static int +genl_cb_proc_cleanup(void) +{ + if (genl_proc_root) { + remove_proc_entry("stats", genl_proc_root); + remove_proc_entry("debug", genl_proc_root); + remove_proc_entry(genl_procfs_path, NULL); + genl_proc_root = NULL; + } + return 0; +} + +static int +genl_cb_cleanup(void) +{ + genl_pkt_t *pkt; + + cancel_work_sync(&g_genl_work.wq); + + while (!list_empty(&g_genl_work.pkt_list)) { + pkt = list_entry(g_genl_work.pkt_list.next, genl_pkt_t, list); + list_del(&pkt->list); + dev_kfree_skb_any(pkt->skb); + kfree(pkt); + } + + return 0; +} + +static int +genl_cb_init(void) +{ + /* clear data structs */ + memset(&g_genl_stats, 0, sizeof(genl_stats_t)); + memset(&g_genl_work, 0, sizeof(genl_work_t)); + + /* setup generic work queue */ + spin_lock_init(&g_genl_work.lock); + INIT_LIST_HEAD(&g_genl_work.pkt_list); + INIT_WORK(&g_genl_work.wq, genl_task); + + /* get net namespace */ + g_genl_info.netns = get_net_ns_by_pid(current->pid); + if (!g_genl_info.netns) { + gprintk("%s: Could not get network namespace for pid %d\n", + __func__, current->pid); + return -1; + } + GENL_CB_DBG_PRINT("%s: current->pid %d, netns 0x%p\n", __func__, + current->pid, g_genl_info.netns); + + return 0; +} + +int bcmgenl_packet_cleanup(void) +{ + genl_cb_cleanup(); + genl_cb_proc_cleanup(); + bkn_filter_cb_unregister(genl_filter_cb); + return 0; +} + +int +bcmgenl_packet_init(char *procfs_path) +{ + bkn_filter_cb_register_by_name(genl_filter_cb, GENL_PACKET_NAME); + genl_cb_proc_init(procfs_path); + return genl_cb_init(); +} +#endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h new file mode 100644 index 000000000000..624782845087 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h @@ -0,0 +1,39 @@ +/* + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + */ + +#ifndef __BCM_GENL_PACKET_H__ +#define __BCM_GENL_PACKET_H__ + +extern int +bcmgenl_packet_init(char *procfs_path); + +extern int +bcmgenl_packet_cleanup(void); + +#endif /* __BCM_GENL_PACKET_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c similarity index 52% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.c rename to platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c index 38c5bee6f848..25da4decc789 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.c +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c @@ -1,41 +1,51 @@ /* - * Copyright 2017-2019 Broadcom - * + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as * published by the Free Software Foundation (the "GPL"). - * + * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License version 2 (GPLv2) for more details. - * + * * You should have received a copy of the GNU General Public License * version 2 (GPLv2) along with this source code. - */ -/* - * $Id: psample_cb.c $ - * $Copyright: (c) 2019 Broadcom Corp. - * All Rights Reserved.$ + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * */ /* - * Driver for call-back functions for Linux KNET driver. - * - * This code is used to integrate packet sampling KNET callback to - * the psample infra for sending sampled pkts to userspace sflow - * applications such as Host Sflow (https://github.com/sflow/host-sflow) - * using genetlink interfaces. - * - * The module can be built from the standard Linux user mode target - * directories using the following command (assuming bash), e.g. + * Middle-driver for communication between Linux KNET driver and + * drivers support Generic Netlink channel. * - * cd $SDK/systems/linux/user/ - * make BUILD_KNET_CB=1 + * This code is used to integrate packet sampling from KNET Rx filter + * call-back function to the psample infra (kernel/linux/net/psample) + * for sending sampled packets to userspace sflow applications such as + * Host Sflow (https://github.com/sflow/host-sflow) using Generic Netlink + * interfaces. * + * This driver is also built with the DCB library as the helper for parsing + * the RX packet meta data from the Linux KNET driver filter call-back function. + * The environment DCBDIR must be set to indicate the directroy of the DCB + * library. */ + #include /* Must be included first */ +#include #include #include #include @@ -43,12 +53,16 @@ #include #include #include +#include "bcm-genl-psample.h" +#include "bcm-genl-dev.h" +#include "bcm-genl-netif.h" +#if BCMGENL_PSAMPLE_SUPPORT #include -#include "psample-cb.h" +#include #define PSAMPLE_CB_DBG -#ifdef PSAMPLE_CB_DBG -extern int debug; +#ifdef PSAMPLE_CB_DBG +static int debug; #define PSAMPLE_CB_DBG_PRINT(...) \ if (debug & 0x1) { \ gprintk(__VA_ARGS__); \ @@ -57,31 +71,6 @@ extern int debug; #define PSAMPLE_CB_DBG_PRINT(...) #endif -/* HIGIG2 header fields */ -#define SOC_HIGIG_SOP (0xfb) -#define SOC_HIGIG_START(x) ((x[0] >> 24) & 0xff) -#define SOC_HIGIG_DSTPORT(x) ((x[1] >> 11) & 0x1f) -#define SOC_HIGIG_SRCPORT(x) ((x[1] >> 16) & 0x1f) -#define SOC_HIGIG2_SOP (0xfb) //0xfc - TODO: how can we differentiate between Higig and higig2? -#define SOC_HIGIG2_START(x) ((x[0] >> 24) & 0xff) -#define SOC_HIGIG2_IS_MC(x) ((x[0] >> 20) & 0x1) -#define SOC_HIGIG2_DSTPORT(x) ((x[0] >> 0) & 0xff) -#define SOC_HIGIG2_SRCPORT(x) ((x[1] >> 16) & 0xff) -#define SOC_DCB32_HG_OFFSET (6) - -/* sFlow v5 datagram dst ifindex field type - * dst ifindex encoding bits [31:30] - */ -#define DSTPORT_TYPE_DISCARD 1 -#define DSTPORT_TYPE_MC 2 - -#define DSTPORT_TYPE_OFFSET 30 -#define DSTPORT_TYPE_MASK 0x3 -#define DSTPORT_TYPE_CLR(_dst) (_dst &= ~(DSTPORT_TYPE_MASK << DSTPORT_TYPE_OFFSET)) -#define DSTPORT_TYPE_SET(_dst,_type) (_dst |= ((_type & DSTPORT_TYPE_MASK) << DSTPORT_TYPE_OFFSET)) -#define DSTPORT_TYPE_GET(_dst) ((_dst >> DSTPORT_TYPE_OFFSET) & DSTPORT_TYPE_MASK) -#define DSTPORT_GET(_dst) (_dst & ~(DSTPORT_TYPE_MASK << DSTPORT_TYPE_OFFSET)) - #define FCS_SZ 4 #define PSAMPLE_NLA_PADDING 4 @@ -98,27 +87,23 @@ LKM_MOD_PARAM(psample_qlen, "i", int, 0); MODULE_PARM_DESC(psample_qlen, "psample queue length (default 1024 buffers)"); -#if !IS_ENABLED(CONFIG_PSAMPLE) -inline struct -psample_group *psample_group_get(struct net *net, u32 group_num) -{ - return NULL; -} -#endif - /* driver proc entry root */ static struct proc_dir_entry *psample_proc_root = NULL; -static struct proc_dir_entry *knet_cb_proc_root = NULL; +static char psample_procfs_path[80]; /* psample general info */ -typedef struct { - struct list_head netif_list; - int netif_count; - knet_hw_info_t hw; +typedef struct psample_info_s { struct net *netns; - spinlock_t lock; + struct list_head group_list; + uint64_t rx_reason_sample_source[LINUX_BDE_MAX_DEVICES]; } psample_info_t; -static psample_info_t g_psample_info = {0}; +static psample_info_t g_psample_info; + +typedef struct psample_group_data_s { + struct list_head list; + struct psample_group *group; + uint32_t group_num; +} psample_group_data_t; /* Maintain sampled pkt statistics */ typedef struct psample_stats_s { @@ -139,7 +124,7 @@ typedef struct psample_stats_s { unsigned long pkts_d_meta_dstport; unsigned long pkts_d_invalid_size; } psample_stats_t; -static psample_stats_t g_psample_stats = {0}; +static psample_stats_t g_psample_stats; typedef struct psample_meta_s { int trunc_size; @@ -160,186 +145,108 @@ typedef struct psample_work_s { struct work_struct wq; spinlock_t lock; } psample_work_t; -static psample_work_t g_psample_work = {0}; +static psample_work_t g_psample_work; -static psample_netif_t* -psample_netif_lookup_by_port(int unit, int port) +static struct psample_group * +psample_group_get_from_list(uint32_t grp_num) { - struct list_head *list; - psample_netif_t *psample_netif = NULL; - unsigned long flags; + struct list_head *list_ptr; + psample_group_data_t *grp; - /* look for port from list of available net_devices */ - spin_lock_irqsave(&g_psample_info.lock, flags); - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (psample_netif->port == port) { - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return psample_netif; + list_for_each(list_ptr, &g_psample_info.group_list) { + grp = list_entry(list_ptr, psample_group_data_t, list); + if (grp->group_num == grp_num) { + return grp->group; } } - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return (NULL); -} - -static int -psample_info_get (int unit, psample_info_t *psample_info) -{ - int rv = 0; - if (!psample_info) { - gprintk("%s: psample_info is NULL\n", __func__); - return (-1); - } - /* get hw info */ - rv = bkn_hw_info_get(unit, &psample_info->hw); - if (rv < 0) { - gprintk("%s: failed to get hw info\n", __func__); - return (-1); + if ((grp = kmalloc(sizeof(psample_group_data_t), GFP_ATOMIC)) == NULL) { + return NULL; + } + grp->group = psample_group_get(g_psample_info.netns, grp_num); + if (grp->group == NULL) { + kfree(grp); + return NULL; } + grp->group_num = grp_num; + list_add_tail(&grp->list, &g_psample_info.group_list); - PSAMPLE_CB_DBG_PRINT("%s: DCB type %d\n", - __func__, psample_info->hw.dcb_type); - return (0); + return grp->group; } static int -psample_meta_srcport_get(uint8_t *pkt, void *pkt_meta) +psample_meta_srcport_get(int dev_no, void *pkt_meta) { - int srcport = 0; - uint32_t *metadata = (uint32_t*)pkt_meta; - - switch(g_psample_info.hw.dcb_type) { - case 36: /* TD3 */ - case 38: /* TH3 */ - break; - case 32: /* TH1/TH2 */ - case 26: /* TD2 */ - case 23: /* HX4 */ - metadata += SOC_DCB32_HG_OFFSET; - default: - break; - } + uint32_t p; - if (SOC_HIGIG2_START(metadata) == SOC_HIGIG2_SOP) - { - srcport = SOC_HIGIG2_SRCPORT(metadata); - } - else if (SOC_HIGIG_START(metadata) == SOC_HIGIG_SOP) - { - srcport = SOC_HIGIG_SRCPORT(metadata); - } - else - { - PSAMPLE_CB_DBG_PRINT("%s: Could not detect metadata sop type: 0x%02x (w[0]: 0x%04x)\n", __func__, - SOC_HIGIG_START(metadata), metadata[0]); + if (bcmgenl_dev_pktmeta_rx_srcport_get(dev_no, pkt_meta, &p) < 0) { return -1; } - return srcport; + + return p; } static int -psample_meta_dstport_get(uint8_t *pkt, void *pkt_meta) +psample_meta_dstport_get(int dev_no, void *pkt_meta, bool *is_mcast) { - int dstport = 0; - uint32_t *metadata = (uint32_t*)pkt_meta; - - switch(g_psample_info.hw.dcb_type) { - case 36: /* TD3 */ - case 38: /* TH3 */ - break; - case 32: /* TH1/TH2 */ - case 26: /* TD2 */ - case 23: /* HX4 */ - default: - metadata += SOC_DCB32_HG_OFFSET; - break; + bool mcast; + uint32_t p; + + if (bcmgenl_dev_pktmeta_rx_dstport_get(dev_no, pkt_meta, &mcast, &p) < 0) { + return -1; } - - if (SOC_HIGIG2_START(metadata) == SOC_HIGIG2_SOP) - { - if (SOC_HIGIG2_IS_MC(metadata)) - { - DSTPORT_TYPE_CLR(dstport); - DSTPORT_TYPE_SET(dstport, DSTPORT_TYPE_MC); - } - else - { - dstport = SOC_HIGIG2_DSTPORT(metadata); - } - } - else if (SOC_HIGIG_START(metadata) == SOC_HIGIG_SOP) - { - dstport = SOC_HIGIG_DSTPORT(metadata); - } - else - { - PSAMPLE_CB_DBG_PRINT("%s: Could not detect metadata sop type: 0x%02x (w[0]: 0x%04x)\n", __func__, - SOC_HIGIG_START(metadata), metadata[0]); - return (-1); + if (is_mcast) { + *is_mcast = mcast; } - return dstport; + + return p; } static int -psample_meta_sample_reason(uint8_t *pkt, void *pkt_meta) +psample_meta_sample_reason(int dev_no, void *pkt_meta) { - uint32_t *metadata = (uint32_t*)pkt_meta; - uint32_t reason = 0; - uint32_t reason_hi = 0; - uint32_t sample_rx_reason_mask = 0; - - /* Sample Pkt reason code (bcmRxReasonSampleSource) */ - switch(g_psample_info.hw.dcb_type) { - case 36: /* TD3 */ - case 38: /* TH3 */ - reason_hi = *(metadata + 4); - reason = *(metadata + 5); - sample_rx_reason_mask = (1 << 3); - break; - case 32: /* TH1/TH2 */ - case 26: /* TD2 */ - case 23: /* HX4 */ - default: - reason_hi = *(metadata + 2); - reason = *(metadata + 3); - sample_rx_reason_mask = (1 << 5); - break; + uint64_t rx_reason; + uint64_t *exp_reason = &g_psample_info.rx_reason_sample_source[dev_no]; + + if (bcmgenl_dev_pktmeta_rx_reason_get(dev_no, pkt_meta, &rx_reason) < 0) { + return 0; + } + if (*exp_reason == 0) { + if (bcmgenl_dev_rx_reason_sample_source_get(dev_no, exp_reason) < 0) { + return 0; + } } - - PSAMPLE_CB_DBG_PRINT("%s: DCB%d sample_rx_reason_mask: 0x%08x, reason: 0x%08x, reason_hi: 0x%08x\n", - __func__, g_psample_info.hw.dcb_type, sample_rx_reason_mask, reason, reason_hi); /* Check if only sample reason code is set. * If only sample reason code, then consume pkt. - * If other reason codes exist, then pkt should be + * If other reason codes exist, then pkt should be * passed through to Linux network stack. */ - if ((reason & ~sample_rx_reason_mask) || reason_hi) { - return 0; /* multiple reasons set, pass through */ + if ((rx_reason & *exp_reason) == *exp_reason) { + return 1; } - - /* only sample rx reason set, consume pkt */ - return (1); + return 0; } static int -psample_meta_get(int unit, uint8_t *pkt, void *pkt_meta, psample_meta_t *sflow_meta) +psample_meta_get(int dev_no, kcom_filter_t *kf, void *pkt_meta, + psample_meta_t *sflow_meta) { - int srcport, dstport, dstport_type; + bool mcast = false; + int srcport, dstport; int src_ifindex = 0; int dst_ifindex = 0; int sample_rate = 1; int sample_size = PSAMPLE_SIZE_DFLT; - psample_netif_t *psample_netif = NULL; + bcmgenl_netif_t bcmgenl_netif; #ifdef PSAMPLE_CB_DBG if (debug & 0x1) { int i=0; - uint8_t *meta = (uint8_t*)pkt_meta; + uint8_t *meta = (uint8_t *)pkt_meta; PSAMPLE_CB_DBG_PRINT("%s: psample pkt metadata\n", __func__); for (i=0; i<64; i+=16) { - PSAMPLE_CB_DBG_PRINT("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", + PSAMPLE_CB_DBG_PRINT("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", meta[i+0], meta[i+1], meta[i+2], meta[i+3], meta[i+4], meta[i+5], meta[i+6], meta[i+7], meta[i+8], meta[i+9], meta[i+10], meta[i+11], meta[i+12], meta[i+13], meta[i+14], meta[i+15]); } @@ -347,52 +254,46 @@ psample_meta_get(int unit, uint8_t *pkt, void *pkt_meta, psample_meta_t *sflow_m #endif /* parse pkt metadata for src and dst ports */ - srcport = psample_meta_srcport_get(pkt, pkt_meta); - dstport = psample_meta_dstport_get(pkt, pkt_meta); + srcport = psample_meta_srcport_get(dev_no, pkt_meta); + dstport = psample_meta_dstport_get(dev_no, pkt_meta, &mcast); if ((srcport == -1) || (dstport == -1)) { gprintk("%s: invalid srcport %d or dstport %d\n", __func__, srcport, dstport); - return (-1); + return -1; } /* find src port netif (no need to lookup CPU port) */ if (srcport != 0) { - if ((psample_netif = psample_netif_lookup_by_port(unit, srcport))) { - src_ifindex = psample_netif->dev->ifindex; - sample_rate = psample_netif->sample_rate; - sample_size = psample_netif->sample_size; + if (bcmgenl_netif_get_by_port(srcport, &bcmgenl_netif) == 0) { + src_ifindex = bcmgenl_netif.dev->ifindex; + sample_rate = bcmgenl_netif.sample_rate; + sample_size = bcmgenl_netif.sample_size; } else { g_psample_stats.pkts_d_meta_srcport++; PSAMPLE_CB_DBG_PRINT("%s: could not find srcport(%d)\n", __func__, srcport); } } - dstport_type = DSTPORT_TYPE_GET(dstport); - dstport = DSTPORT_GET(dstport); - /* set sFlow dst type for MC pkts */ - if (dstport_type == DSTPORT_TYPE_MC) { - DSTPORT_TYPE_SET(dst_ifindex, DSTPORT_TYPE_MC); + if (mcast) { g_psample_stats.pkts_f_dst_mc++; - /* find dst port netif for UC pkts (no need to lookup CPU port) */ } else if (dstport != 0) { - if ((psample_netif = psample_netif_lookup_by_port(unit, dstport))) { - dst_ifindex = psample_netif->dev->ifindex; + if (bcmgenl_netif_get_by_port(dstport, &bcmgenl_netif) == 0) { + dst_ifindex = bcmgenl_netif.dev->ifindex; } else { g_psample_stats.pkts_d_meta_dstport++; PSAMPLE_CB_DBG_PRINT("%s: could not find dstport(%d)\n", __func__, dstport); } } - PSAMPLE_CB_DBG_PRINT("%s: srcport %d, dstport %d, src_ifindex 0x%x, dst_ifindex 0x%x, trunc_size %d, sample_rate %d\n", - __func__, srcport, dstport, src_ifindex, dst_ifindex, sample_size, sample_rate); + PSAMPLE_CB_DBG_PRINT("%s: dstport %d, src_ifindex 0x%x, dst_ifindex 0x%x\n", + __func__, dstport, src_ifindex, dst_ifindex); sflow_meta->src_ifindex = src_ifindex; sflow_meta->dst_ifindex = dst_ifindex; sflow_meta->trunc_size = sample_size; sflow_meta->sample_rate = sample_rate; - - return (0); + return 0; } static void @@ -424,15 +325,14 @@ psample_task(struct work_struct *work) __func__, pkt->group->group_num, pkt->meta.trunc_size, pkt->meta.src_ifindex, pkt->meta.dst_ifindex, pkt->meta.sample_rate); - #if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \ (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR)) - psample_sample_packet(pkt->group, + psample_sample_packet(pkt->group, pkt->skb, pkt->meta.sample_rate, &md); #else - psample_sample_packet(pkt->group, + psample_sample_packet(pkt->group, pkt->skb, pkt->meta.trunc_size, pkt->meta.src_ifindex, @@ -449,30 +349,20 @@ psample_task(struct work_struct *work) spin_unlock_irqrestore(&psample_work->lock, flags); } -int -psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta, +static int +psample_filter_cb(uint8_t *pkt, int size, int dev_no, void *pkt_meta, int chan, kcom_filter_t *kf) { - struct psample_group *group; + struct psample_group *group = NULL; psample_meta_t meta; int rv = 0; - static int info_get = 0; - - if (!info_get) { - rv = psample_info_get (dev_no, &g_psample_info); - if (rv < 0) { - gprintk("%s: failed to get psample info\n", __func__); - goto PSAMPLE_FILTER_CB_PKT_HANDLED; - } - info_get = 1; - } PSAMPLE_CB_DBG_PRINT("%s: pkt size %d, kf->dest_id %d, kf->cb_user_data %d\n", __func__, size, kf->dest_id, kf->cb_user_data); g_psample_stats.pkts_f_psample_cb++; /* get psample group info. psample genetlink group ID passed in kf->dest_id */ - group = psample_group_get(g_psample_info.netns, kf->dest_id); + group = psample_group_get_from_list(kf->dest_id); if (!group) { gprintk("%s: Could not find psample genetlink group %d\n", __func__, kf->cb_user_data); g_psample_stats.pkts_d_no_group++; @@ -480,7 +370,7 @@ psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta, } /* get psample metadata */ - rv = psample_meta_get(dev_no, pkt, pkt_meta, &meta); + rv = psample_meta_get(dev_no, kf, pkt_meta, &meta); if (rv < 0) { gprintk("%s: Could not parse pkt metadata\n", __func__); g_psample_stats.pkts_d_metadata++; @@ -532,7 +422,7 @@ psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta, /* setup skb to point to pkt */ memcpy(skb->data, pkt, meta.trunc_size); skb_put(skb, meta.trunc_size); - skb->len = meta.trunc_size; + skb->len = size; psample_pkt->skb = skb; spin_lock_irqsave(&g_psample_work.lock, flags); @@ -551,7 +441,7 @@ psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta, PSAMPLE_FILTER_CB_PKT_HANDLED: /* if sample reason only, consume pkt. else pass through */ - rv = psample_meta_sample_reason(pkt, pkt_meta); + rv = psample_meta_sample_reason(dev_no, pkt_meta); if (rv) { g_psample_stats.pkts_f_handled++; } else { @@ -560,110 +450,23 @@ psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta, return rv; } -int -psample_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev) -{ - int found; - struct list_head *list; - psample_netif_t *psample_netif, *lpsample_netif; - unsigned long flags; - - if ((psample_netif = kmalloc(sizeof(psample_netif_t), GFP_ATOMIC)) == NULL) { - gprintk("%s: failed to alloc psample mem for netif '%s'\n", - __func__, dev->name); - return (-1); - } - - spin_lock_irqsave(&g_psample_info.lock, flags); - - psample_netif->dev = dev; - psample_netif->id = netif->id; - psample_netif->port = netif->port; - psample_netif->vlan = netif->vlan; - psample_netif->qnum = netif->qnum; - psample_netif->sample_rate = PSAMPLE_RATE_DFLT; - psample_netif->sample_size = PSAMPLE_SIZE_DFLT; - - /* insert netif sorted by ID similar to bkn_knet_netif_create() */ - found = 0; - list_for_each(list, &g_psample_info.netif_list) { - lpsample_netif = (psample_netif_t*)list; - if (netif->id < lpsample_netif->id) { - found = 1; - g_psample_info.netif_count++; - break; - } - } - - if (found) { - /* Replace previously removed interface */ - list_add_tail(&psample_netif->list, &lpsample_netif->list); - } else { - /* No holes - add to end of list */ - list_add_tail(&psample_netif->list, &g_psample_info.netif_list); - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - - PSAMPLE_CB_DBG_PRINT("%s: added psample netif '%s'\n", __func__, dev->name); - return (0); -} - -int -psample_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev) -{ - int found; - struct list_head *list; - psample_netif_t *psample_netif; - unsigned long flags; - - if (!netif || !dev) { - gprintk("%s: netif or net_device is NULL\n", __func__); - return (-1); - } - - spin_lock_irqsave(&g_psample_info.lock, flags); - - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (netif->id == psample_netif->id) { - found = 1; - list_del(&psample_netif->list); - PSAMPLE_CB_DBG_PRINT("%s: removing psample netif '%s'\n", __func__, dev->name); - kfree(psample_netif); - g_psample_info.netif_count--; - break; - } - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - - if (!found) { - gprintk("%s: netif ID %d not found!\n", __func__, netif->id); - return (-1); - } - return (0); -} - /* * psample rate Proc Read Entry */ static int -psample_proc_rate_show(struct seq_file *m, void *v) +proc_rate_show(void *cb_data, bcmgenl_netif_t *netif) { - struct list_head *list; - psample_netif_t *psample_netif; - unsigned long flags; - - spin_lock_irqsave(&g_psample_info.lock, flags); + struct seq_file *m = (struct seq_file *)cb_data; - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - seq_printf(m, " %-14s %d\n", psample_netif->dev->name, psample_netif->sample_rate); - } + seq_printf(m, " %-14s %d\n", + netif->dev->name, netif->sample_rate); + return 0; +} - spin_unlock_irqrestore(&g_psample_info.lock, flags); - +static int +psample_proc_rate_show(struct seq_file *m, void *v) +{ + bcmgenl_netif_search(NULL, proc_rate_show, (void *)m); return 0; } @@ -684,16 +487,21 @@ psample_proc_rate_open(struct inode * inode, struct file * file) * Examples: * eth4=1000 */ +static int +proc_rate_write(void *cb_data, bcmgenl_netif_t *netif) +{ + uint32 sample_rate = (uint32)(uintptr_t)cb_data; + + netif->sample_rate = sample_rate; + return 0; +} + static ssize_t psample_proc_rate_write(struct file *file, const char *buf, - size_t count, loff_t *loff) + size_t count, loff_t *loff) { - int found; - struct list_head *list; - psample_netif_t *psample_netif; + int netif_cnt; char sample_str[40], *ptr, *newline; - unsigned long flags; - if (count > sizeof(sample_str)) { count = sizeof(sample_str) - 1; @@ -716,24 +524,13 @@ psample_proc_rate_write(struct file *file, const char *buf, } *ptr++ = 0; - spin_lock_irqsave(&g_psample_info.lock, flags); - - found = 0; - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (strcmp(psample_netif->dev->name, sample_str) == 0) { - psample_netif->sample_rate = simple_strtol(ptr, NULL, 10); - // TODO MLI@BRCM - check valid sample rate - found = 1; - break; - } + netif_cnt = bcmgenl_netif_search(sample_str, proc_rate_write, + (void *)(uintptr_t)simple_strtol(ptr, NULL, 10)); + if (netif_cnt <= 0) { + gprintk("Warning: Failed setting psample rate on " + "unknown network interface: '%s'\n", sample_str); } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - if (!found) { - gprintk("Warning: Failed setting psample rate on unknown network interface: '%s'\n", sample_str); - } return count; } @@ -750,20 +547,18 @@ struct proc_ops psample_proc_rate_file_ops = { * psample size Proc Read Entry */ static int -psample_proc_size_show(struct seq_file *m, void *v) +proc_size_show(void *cb_data, bcmgenl_netif_t *netif) { - struct list_head *list; - psample_netif_t *psample_netif; - unsigned long flags; - - spin_lock_irqsave(&g_psample_info.lock, flags); + struct seq_file *m = (struct seq_file *)cb_data; - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - seq_printf(m, " %-14s %d\n", psample_netif->dev->name, psample_netif->sample_size); - } + seq_printf(m, " %-14s %d\n", netif->dev->name, netif->sample_size); + return 0; +} - spin_unlock_irqrestore(&g_psample_info.lock, flags); +static int +psample_proc_size_show(struct seq_file *m, void *v) +{ + bcmgenl_netif_search(NULL, proc_size_show, (void *)m); return 0; } @@ -784,15 +579,21 @@ psample_proc_size_open(struct inode * inode, struct file * file) * Examples: * eth4=128 */ +static int +proc_size_write(void *cb_data, bcmgenl_netif_t *netif) +{ + uint32 sample_size = (uint32)(uintptr_t)cb_data; + + netif->sample_size = sample_size; + return 0; +} + static ssize_t psample_proc_size_write(struct file *file, const char *buf, size_t count, loff_t *loff) { - int found; - struct list_head *list; - psample_netif_t *psample_netif; + int netif_cnt; char sample_str[40], *ptr, *newline; - unsigned long flags; if (count > sizeof(sample_str)) { count = sizeof(sample_str) - 1; @@ -815,24 +616,13 @@ psample_proc_size_write(struct file *file, const char *buf, } *ptr++ = 0; - spin_lock_irqsave(&g_psample_info.lock, flags); - - found = 0; - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (strcmp(psample_netif->dev->name, sample_str) == 0) { - psample_netif->sample_size = simple_strtol(ptr, NULL, 10); - // TODO MLI@BRCM - check valid sample size - found = 1; - break; - } + netif_cnt = bcmgenl_netif_search(sample_str, proc_size_write, + (void *)(uintptr_t)simple_strtol(ptr, NULL, 10)); + if (netif_cnt <= 0) { + gprintk("Warning: Failed setting psample size on " + "unknown network interface: '%s'\n", sample_str); } - spin_unlock_irqrestore(&g_psample_info.lock, flags); - - if (!found) { - gprintk("Warning: Failed setting psample size on unknown network interface: '%s'\n", sample_str); - } return count; } @@ -845,61 +635,15 @@ struct proc_ops psample_proc_size_file_ops = { .proc_release = single_release, }; -/* - * psample map Proc Read Entry - */ -static int -psample_proc_map_show(struct seq_file *m, void *v) -{ - struct list_head *list; - psample_netif_t *psample_netif; - unsigned long flags; - - seq_printf(m, " Interface logical port ifindex\n"); - seq_printf(m, "------------- ------------ -------\n"); - spin_lock_irqsave(&g_psample_info.lock, flags); - - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - seq_printf(m, " %-14s %-14d %d\n", - psample_netif->dev->name, - psample_netif->port, - psample_netif->dev->ifindex); - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return 0; -} - -static int -psample_proc_map_open(struct inode * inode, struct file * file) -{ - return single_open(file, psample_proc_map_show, NULL); -} - -struct proc_ops psample_proc_map_file_ops = { - PROC_OWNER(THIS_MODULE) - .proc_open = psample_proc_map_open, - .proc_read = seq_read, - .proc_lseek = seq_lseek, - .proc_write = NULL, - .proc_release = single_release, -}; - /* * psample debug Proc Read Entry */ static int psample_proc_debug_show(struct seq_file *m, void *v) { - seq_printf(m, "BCM KNET %s Callback Config\n", PSAMPLE_CB_NAME); + seq_printf(m, "BCM KNET %s Callback Config\n", PSAMPLE_GENL_NAME); seq_printf(m, " debug: 0x%x\n", debug); - seq_printf(m, " cmic_type: %d\n", g_psample_info.hw.cmic_type); - seq_printf(m, " dcb_type: %d\n", g_psample_info.hw.dcb_type); - seq_printf(m, " dcb_size: %d\n", g_psample_info.hw.dcb_size); - seq_printf(m, " pkt_hdr_size: %d\n", g_psample_info.hw.pkt_hdr_size); - seq_printf(m, " cdma_channels: %d\n", g_psample_info.hw.cdma_channels); - seq_printf(m, " netif_count: %d\n", g_psample_info.netif_count); + seq_printf(m, " netif_count: %d\n", bcmgenl_netif_num_get()); seq_printf(m, " queue length: %d\n", psample_qlen); return 0; @@ -959,8 +703,7 @@ struct proc_ops psample_proc_debug_file_ops = { static int psample_proc_stats_show(struct seq_file *m, void *v) { - seq_printf(m, "BCM KNET %s Callback Stats\n", PSAMPLE_CB_NAME); - seq_printf(m, " DCB type %d\n", g_psample_info.hw.dcb_type); + seq_printf(m, "BCM KNET %s Callback Stats\n", PSAMPLE_GENL_NAME); seq_printf(m, " pkts filter psample cb %10lu\n", g_psample_stats.pkts_f_psample_cb); seq_printf(m, " pkts sent to psample module %10lu\n", g_psample_stats.pkts_f_psample_mod); seq_printf(m, " pkts handled by psample %10lu\n", g_psample_stats.pkts_f_handled); @@ -1007,6 +750,7 @@ psample_proc_stats_write(struct file *file, const char *buf, return count; } + struct proc_ops psample_proc_stats_file_ops = { PROC_OWNER(THIS_MODULE) .proc_open = psample_proc_stats_open, @@ -1016,74 +760,101 @@ struct proc_ops psample_proc_stats_file_ops = { .proc_release = single_release, }; -int psample_cleanup(void) -{ - cancel_work_sync(&g_psample_work.wq); - remove_proc_entry("stats", psample_proc_root); - remove_proc_entry("rate", psample_proc_root); - remove_proc_entry("size", psample_proc_root); - remove_proc_entry("debug", psample_proc_root); - remove_proc_entry("map" , psample_proc_root); - remove_proc_entry("psample", knet_cb_proc_root); - remove_proc_entry("bcm/knet-cb", NULL); - return 0; -} - -int psample_init(void) +static int +psample_proc_init(char *procfs_path) { - #define PROCFS_MAX_PATH 1024 - #define PSAMPLE_PROCFS_PATH "bcm/knet-cb" - char psample_procfs_path[PROCFS_MAX_PATH]; struct proc_dir_entry *entry; - /* create procfs for psample */ - knet_cb_proc_root = proc_mkdir(PSAMPLE_PROCFS_PATH, NULL); - snprintf(psample_procfs_path, sizeof(psample_procfs_path), "%s/%s", PSAMPLE_PROCFS_PATH, PSAMPLE_CB_NAME); + if (procfs_path == NULL || procfs_path[0] == '\0') { + return 0; + } + + /* Initialize proc files for psample */ + snprintf(psample_procfs_path, sizeof(psample_procfs_path) - 1, + "%s/%s", procfs_path, PSAMPLE_GENL_NAME); psample_proc_root = proc_mkdir(psample_procfs_path, NULL); /* create procfs for psample stats */ - PROC_CREATE(entry, "stats", 0666, psample_proc_root, &psample_proc_stats_file_ops); + PROC_CREATE(entry, "stats", 0666, psample_proc_root, + &psample_proc_stats_file_ops); if (entry == NULL) { - gprintk("%s: Unable to create procfs entry '/procfs/%s/stats'\n", __func__, psample_procfs_path); return -1; } /* create procfs for setting sample rates */ - PROC_CREATE(entry, "rate", 0666, psample_proc_root, &psample_proc_rate_file_ops); + PROC_CREATE(entry, "rate", 0666, psample_proc_root, + &psample_proc_rate_file_ops); if (entry == NULL) { - gprintk("%s: Unable to create procfs entry '/procfs/%s/rate'\n", __func__, psample_procfs_path); return -1; } /* create procfs for setting sample size */ - PROC_CREATE(entry, "size", 0666, psample_proc_root, &psample_proc_size_file_ops); + PROC_CREATE(entry, "size", 0666, psample_proc_root, + &psample_proc_size_file_ops); if (entry == NULL) { - gprintk("%s: Unable to create procfs entry '/procfs/%s/size'\n", __func__, psample_procfs_path); return -1; } - /* create procfs for getting netdev mapping */ - PROC_CREATE(entry, "map", 0666, psample_proc_root, &psample_proc_map_file_ops); + /* create procfs for debug log */ + PROC_CREATE(entry, "debug", 0666, psample_proc_root, + &psample_proc_debug_file_ops); if (entry == NULL) { - gprintk("%s: Unable to create procfs entry '/procfs/%s/map'\n", __func__, psample_procfs_path); return -1; } - /* create procfs for debug log */ - PROC_CREATE(entry, "debug", 0666, psample_proc_root, &psample_proc_debug_file_ops); - if (entry == NULL) { - gprintk("%s: Unable to create procfs entry '/procfs/%s/debug'\n", __func__, psample_procfs_path); - return -1; + return 0; +} + +static int +psample_proc_cleanup(void) +{ + if (psample_proc_root) { + remove_proc_entry("stats", psample_proc_root); + remove_proc_entry("rate", psample_proc_root); + remove_proc_entry("size", psample_proc_root); + remove_proc_entry("debug", psample_proc_root); + remove_proc_entry(psample_procfs_path, NULL); + psample_proc_root = NULL; } + return 0; +} +static int +psample_cleanup(void) +{ + psample_pkt_t *pkt; + psample_group_data_t *grp; + + cancel_work_sync(&g_psample_work.wq); + + while (!list_empty(&g_psample_work.pkt_list)) { + pkt = list_entry(g_psample_work.pkt_list.next, psample_pkt_t, list); + list_del(&pkt->list); + dev_kfree_skb_any(pkt->skb); + kfree(pkt); + } + + while (!list_empty(&g_psample_info.group_list)) { + grp = list_entry(g_psample_info.group_list.next, + psample_group_data_t, list); + list_del(&grp->list); + psample_group_put(grp->group); + kfree(grp); + } + + return 0; +} + +static int +psample_init(void) +{ /* clear data structs */ memset(&g_psample_stats, 0, sizeof(psample_stats_t)); memset(&g_psample_info, 0, sizeof(psample_info_t)); memset(&g_psample_work, 0, sizeof(psample_work_t)); /* setup psample_info struct */ - INIT_LIST_HEAD(&g_psample_info.netif_list); - spin_lock_init(&g_psample_info.lock); + INIT_LIST_HEAD(&g_psample_info.group_list); /* setup psample work queue */ spin_lock_init(&g_psample_work.lock); @@ -1093,12 +864,46 @@ int psample_init(void) /* get net namespace */ g_psample_info.netns = get_net_ns_by_pid(current->pid); if (!g_psample_info.netns) { - gprintk("%s: Could not get network namespace for pid %d\n", __func__, current->pid); - return (-1); + gprintk("%s: Could not get network namespace for pid %d\n", + __func__, current->pid); + return -1; } - PSAMPLE_CB_DBG_PRINT("%s: current->pid %d, netns 0x%p, sample_size %d\n", __func__, - current->pid, g_psample_info.netns, psample_size); + PSAMPLE_CB_DBG_PRINT("%s: current->pid %d, netns 0x%p, sample_size %d\n", + __func__, + current->pid, g_psample_info.netns, psample_size); + + return 0; +} + +int bcmgenl_psample_cleanup(void) +{ + psample_cleanup(); + psample_proc_cleanup(); + bkn_filter_cb_unregister(psample_filter_cb); + return 0; +} + +int +bcmgenl_psample_init(char *procfs_path) +{ + bkn_filter_cb_register_by_name(psample_filter_cb, PSAMPLE_GENL_NAME); + bcmgenl_netif_default_sample_set(PSAMPLE_RATE_DFLT, PSAMPLE_SIZE_DFLT); + psample_proc_init(procfs_path); + return psample_init(); +} +#else + +int +bcmgenl_psample_init(char *procfs_path) +{ + return 0; +} +int +bcmgenl_psample_cleanup(void) +{ return 0; } + +#endif /* BCMGENL_PSAMPLE_SUPPORT */ diff --git a/platform/broadcom/saibcm-modules/include/sal/core/sync.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h similarity index 63% rename from platform/broadcom/saibcm-modules/include/sal/core/sync.h rename to platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h index 03fd2facc907..93fae98c479d 100644 --- a/platform/broadcom/saibcm-modules/include/sal/core/sync.h +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h @@ -1,5 +1,5 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,28 +22,24 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: sync.h,v 1.1 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * */ -#ifndef _SAL_SYNC_H -#define _SAL_SYNC_H +#ifndef __BCM_GENL_PSAMPLE_H__ +#define __BCM_GENL_PSAMPLE_H__ + +#include -typedef struct sal_sem_s{ - char sal_opaque_type; -} *sal_sem_t; +#ifndef BCMGENL_PSAMPLE_SUPPORT +#define BCMGENL_PSAMPLE_SUPPORT (IS_ENABLED(CONFIG_PSAMPLE)) +#endif -#define sal_sem_FOREVER (-1) -#define sal_sem_BINARY 1 -#define sal_sem_COUNTING 0 +extern int +bcmgenl_psample_init(char *procfs_path); -sal_sem_t sal_sem_create(char *desc, int binary, int initial_count); -void sal_sem_destroy(sal_sem_t b); -int sal_sem_take(sal_sem_t b, int usec); -int sal_sem_give(sal_sem_t b); +extern int +bcmgenl_psample_cleanup(void); -#endif /* !_SAL_SYNC_H */ +#endif /* __BCM_GENL_PSAMPLE_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c new file mode 100644 index 000000000000..0c889958a220 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c @@ -0,0 +1,254 @@ +/* + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + */ + +/* + * Middle-driver for communication between Linux KNET driver and + * drivers support Generic Netlink channel. + * + * This driver utilizes the NETIF and RX filter call-back functions + * of Linux KNET driver to trasform the RX filter packets to Generic Netlink + * packets for application usage. + * + * Current supported Generic Netlink kernel modules are: + * + * - psample module in kernel/linux/net/psample + * + * Filter call-back function is registered for recevieing KNET filter + * created with description name 'psample'. + * + * - genl_packet module from Google + * + * Filter call-back function is registered for recevieing KNET filter + * created with description name 'genl_packet'. + * + * This driver is also built with the DCB library as the helper for parsing + * the RX packet meta data from the Linux KNET driver filter call-back function. + * The environment DCBDIR must be set to indicate the directroy of the DCB + * library. + * + * The module can be built from the standard Linux user mode target + * directories using the following command (assuming bash), e.g. + * + * cd $SDK/systems/linux/user/gto-2_6 + * BUILD_BCM_GENL=1 make -s mod + * + */ + +#include /* Must be included first */ +#include +#include "bcm-genl-dev.h" +#include "bcm-genl-netif.h" +#include "bcm-genl-psample.h" +#include "bcm-genl-packet.h" + +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("Broadcom Linux KNET Call-Back Driver for GenLink"); +MODULE_LICENSE("GPL"); + +int debug; +LKM_MOD_PARAM(debug, "i", int, 0); +MODULE_PARM_DESC(debug, +"Debug level (default 0)"); + +/* Module Information */ +#define MODULE_MAJOR 0 +#define MODULE_NAME "linux-bcm-genl" + +#define BCMGENL_PROCFS_PATH "bcm/genl" + +/* driver proc entry root */ +static struct proc_dir_entry *bcmgenl_proc_root = NULL; + +/* + * dev Proc Read Entry + */ +static int +proc_dev_show(struct seq_file *m, void *v) +{ + int dev_no; + int dcb_type, dcb_size; + + for (dev_no = 0; dev_no < LINUX_BDE_MAX_DEVICES; dev_no++) { + if (bcmgenl_dev_dcb_info_get(dev_no, &dcb_type, &dcb_size) == 0) { + seq_printf(m, "Device number %d:\n", dev_no); + seq_printf(m, " dcb_type: %d\n", dcb_type); + seq_printf(m, " dcb_size: %d\n", dcb_size); + } + } + return 0; +} + +static int +proc_dev_open(struct inode *inode, struct file *file) +{ + return single_open(file, proc_dev_show, NULL); +} + +struct proc_ops proc_dev_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = proc_dev_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = NULL, + .proc_release = single_release, +}; + +/* + * netif Proc Read Entry + */ +static int +netif_show(void *cb_data, bcmgenl_netif_t *netif) +{ + struct seq_file *m = (struct seq_file *)cb_data; + + seq_printf(m, " %-14s %-14d %d\n", + netif->dev->name, netif->port, netif->dev->ifindex); + return 0; +} + +static int +proc_netif_show(struct seq_file *m, void *v) +{ + if (bcmgenl_netif_num_get() == 0) { + seq_printf(m, "No interfaces are available\n"); + return 0; + } + seq_printf(m, " Interface logical port ifindex\n"); + seq_printf(m, "------------- ------------ -------\n"); + bcmgenl_netif_search(NULL, netif_show, (void *)m); + return 0; +} + +static int +proc_netif_open(struct inode *inode, struct file *file) +{ + return single_open(file, proc_netif_show, NULL); +} + +struct proc_ops proc_netif_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = proc_netif_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = NULL, + .proc_release = single_release, +}; + +static int +bcmgenl_proc_init(void) +{ + struct proc_dir_entry *entry; + + /* Initialize proc files */ + bcmgenl_proc_root = proc_mkdir(BCMGENL_PROCFS_PATH, NULL); + + /* create procfs for getting netdev mapping */ + PROC_CREATE(entry, "netif", 0666, bcmgenl_proc_root, &proc_netif_file_ops); + if (entry == NULL) { + return -1; + } + + /* create procfs for generic stats */ + PROC_CREATE(entry, "dev", 0666, bcmgenl_proc_root, &proc_dev_file_ops); + if (entry == NULL) { + return -1; + } + + return 0; +} + +static int +bcmgenl_proc_cleanup(void) +{ + remove_proc_entry("netif", bcmgenl_proc_root); + remove_proc_entry("dev", bcmgenl_proc_root); + remove_proc_entry(BCMGENL_PROCFS_PATH, NULL); + return 0; +} + +/* + * Get statistics. + * % cat /proc/linux-bcm-genl + */ +static int +_pprint(struct seq_file *m) +{ + pprintf(m, "Broadcom Linux KNET Call-Back: genlink\n"); + + return 0; +} + +static int +_cleanup(void) +{ + bcmgenl_psample_cleanup(); +#ifdef BUILD_GENL_PACKET + bcmgenl_packet_cleanup(); +#endif + + bcmgenl_netif_cleanup(); + bcmgenl_dev_cleanup(); + + bcmgenl_proc_cleanup(); + + return 0; +} + +static int +_init(void) +{ + bcmgenl_proc_init(); + + bcmgenl_dev_init(); + bcmgenl_netif_init(); + + bcmgenl_psample_init(BCMGENL_PROCFS_PATH); +#ifdef BUILD_GENL_PACKET + bcmgenl_packet_init(BCMGENL_PROCFS_PATH); +#endif + return 0; +} + +static gmodule_t _gmodule = { + name: MODULE_NAME, + major: MODULE_MAJOR, + init: _init, + cleanup: _cleanup, + pprint: _pprint, + ioctl: NULL, + open: NULL, + close: NULL, +}; + +gmodule_t* +gmodule_get(void) +{ + EXPORT_NO_SYMBOLS; + return &_gmodule; +} diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile index d42798e737db..95abb3e994ba 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile @@ -1,33 +1,31 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.3 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # LOCALDIR = systems/linux/kernel/modules/bcm-knet @@ -68,6 +66,7 @@ OBJECTS_COMPOSING = "bcm-knet.o gmodule.o" build: $(KMODULE) $(KMODULE): $(SRCS_COMPOSING) + mkdir -p $(BLDDIR) rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) rm -f $(BLDDIR)/*.c rm -f $(BLDDIR)/*.o @@ -96,13 +95,12 @@ $(KMODULE): $(MODULE) mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers - MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko -# } -endif + MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko # Make.depend is before clean:: so that Make.depend's clean:: runs first. - include ${SDK}/make/Make.depend +# } +endif clean:: $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c index a45acfe2ffc8..98d5592d5f73 100755 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c @@ -1,17 +1,30 @@ /* - * Copyright 2017 Broadcom - * + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as * published by the Free Software Foundation (the "GPL"). - * + * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License version 2 (GPLv2) for more details. - * + * * You should have received a copy of the GNU General Public License * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * */ /* @@ -143,12 +156,12 @@ LKM_MOD_PARAM(num_rx_prio, "i", int, 0); MODULE_PARM_DESC(num_rx_prio, "Number of filter priorities per Rx DMA channel"); -static int rx_rate[8] = { 100000, 100000, 100000, 100000, 100000, 100000, 100000, 0 }; +static int rx_rate[16] = { 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000}; LKM_MOD_PARAM_ARRAY(rx_rate, "1-4i", int, NULL, 0); MODULE_PARM_DESC(rx_rate, "Rx rate in packets per second (default 100000)"); -static int rx_burst[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; +static int rx_burst[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; LKM_MOD_PARAM_ARRAY(rx_burst, "1-4i", int, NULL, 0); MODULE_PARM_DESC(rx_burst, "Rx rate burst maximum in packets (default rx_rate/10)"); @@ -173,11 +186,7 @@ MODULE_PARM_DESC(mirror_local, /* * Force to add one layer of VLAN tag to untagged packets on Dune devices */ -#if defined(SAI_FIXUP) && defined(BCM_DNX_SUPPORT) /* SONIC-16195 CS9129167 - Change the default to NOT add tag */ -static int force_tagged = 0; -#else static int force_tagged = 1; -#endif LKM_MOD_PARAM(force_tagged, "i", int, 0); MODULE_PARM_DESC(force_tagged, "Always tagged with VLAN tag with spceified VID or VSI(default 1)"); @@ -306,20 +315,61 @@ static int napi_weight = 0; /* Compatibility */ +#ifndef DMA_BIT_MASK +#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) +#endif + #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)) #define NETDEV_UPDATE_TRANS_START_TIME(dev) dev->trans_start = jiffies #else #define NETDEV_UPDATE_TRANS_START_TIME(dev) netif_trans_update(dev) #endif +/* + * The eth_hw_addr_set was added in Linux 5.15, but later backported + * to various longterm releases, so we need a more advanced check with + * the option to override the default. + */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)) +#define KERNEL_HAS_ETH_HW_ADDR_SET 1 +#endif +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,11,0) && \ + LINUX_VERSION_CODE >= KERNEL_VERSION(5,10,188)) +#define KERNEL_HAS_ETH_HW_ADDR_SET 1 +#endif +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,5,0) && \ + LINUX_VERSION_CODE >= KERNEL_VERSION(5,4,251)) +#define KERNEL_HAS_ETH_HW_ADDR_SET 1 +#endif +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,20,0) && \ + LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,291)) +#define KERNEL_HAS_ETH_HW_ADDR_SET 1 +#endif +#ifndef KERNEL_HAS_ETH_HW_ADDR_SET +#define KERNEL_HAS_ETH_HW_ADDR_SET 0 +#endif + +#if (KERNEL_HAS_ETH_HW_ADDR_SET == 0) +static inline void eth_hw_addr_set(struct net_device *dev, const u8 *addr) +{ + memcpy(dev->dev_addr, addr, ETH_ALEN); +} +#endif + #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) #define skb_copy_to_linear_data(_skb, _pkt, _len) \ eth_copy_and_sum(_skb, _pkt, _len, 0) struct napi_struct { int not_used; }; -#define netif_napi_add(_dev, _napi, _poll, _weight) do { \ +#define bkn_netif_napi_add(_dev, _napi, _poll, _weight) do { \ (_dev)->poll = _poll; \ (_dev)->weight = _weight; \ } while(0) +#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5,19,0)) +#define bkn_netif_napi_add(_dev, _napi, _poll, _weight) \ + netif_napi_add(_dev, _napi, _poll, _weight) +#else +#define bkn_netif_napi_add(_dev, _napi, _poll, _weight) \ + netif_napi_add_weight(_dev, _napi, _poll, _weight) #endif #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) @@ -509,6 +559,12 @@ static inline void bkn_skb_tx_timestamp(struct sk_buff *skb) #define BKN_NETDEV_TX_BUSY 1 #endif +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)) +#define NDO_IOCTL ndo_eth_ioctl +#else +#define NDO_IOCTL ndo_do_ioctl +#endif + /* * Get a 16-bit value from packet offset * _data Pointer to packet @@ -536,6 +592,7 @@ static inline void bkn_skb_tx_timestamp(struct sk_buff *skb) #define PKT_TX_HDR_SIZE 16 static volatile int module_initialized; +static volatile int module_reload; static ibde_t *kernel_bde = NULL; @@ -560,11 +617,16 @@ typedef struct bkn_dcb_chain_s { #define MAX_TX_DCBS 64 #define MAX_RX_DCBS 64 -#define NUM_DMA_CHAN 8 -#define NUM_RX_CHAN 7 +#define NUM_DMA_CHAN 16 +#define NUM_CMICX_DMA_CHAN 8 +#define NUM_CMICR_DMA_CHAN 16 +#define NUM_RX_CHAN 15 +#define NUM_CMICR_RX_CHAN 15 #define NUM_CMICX_RX_CHAN 7 #define NUM_CMICM_RX_CHAN 3 +#define DEFAULT_RX_RATE 100000 + #define FCS_SZ 4 #define TAG_SZ 4 @@ -628,7 +690,9 @@ typedef struct bkn_switch_info_s { uint32_t poll_channels; /* Channels for polling */ uint32_t unet_channels; /* User network channels */ uint32_t inst_id; /* Instance id of this device */ - uint32_t device_id; /* Device ID, like 0x8675 for Jericho A0, 0x */ + uint32_t base_id; /* Device (family) ID, like 0x8675 for Jericho A0, 0x */ + uint16_t dev_id; /* Device ID */ + uint8_t rev_id; /* Revision ID */ int evt_idx; /* Event queue index for this device*/ int basedev_suspended; /* Base device suspended */ int pcie_link_status; /* This flag is used to indicate PCIE Link status, 0 for up and 1 for down */ @@ -738,7 +802,6 @@ typedef struct bkn_switch_info_s { #define BKN_DNX_FTMH_ASE_TYPE_MSB 47 #define BKN_DNX_FTMH_ASE_TYPE_NOF_BITS 1 #define BKN_DNX_FTMH_ASE_TYPE_OAM 0 - /* TSH */ #define BKN_DNX_TSH_SIZE 4 /* PPH */ @@ -769,6 +832,8 @@ typedef struct bkn_switch_info_s { #define BKN_DNX_INTERNAL_12_FHEI_SIZE_NOF_BITS 2 #define BKN_DNX_INTERNAL_12_LIF_EXT_TYPE_MSB 80 #define BKN_DNX_INTERNAL_12_LIF_EXT_TYPE_NOF_BITS 3 +#define BKN_DNX_INTERNAL_12_PARSING_START_OFFSET_MSB 83 +#define BKN_DNX_INTERNAL_12_PARSING_START_OFFSET_NOF_BITS 7 /* PPH.FHEI_TYPE */ #define BKN_DNX_INTERNAL_FHEI_TYPE_SZ0 1 #define BKN_DNX_INTERNAL_FHEI_TYPE_SZ1 2 @@ -795,9 +860,13 @@ typedef struct bkn_switch_info_s { #define BKN_DNX_UDH_DATA_TYPE_3_MSB 6 #define BKN_DNX_UDH_DATA_TYPE_3_NOF_BITS 2 #define BKN_DNX_UDH_BASE_SIZE 1 - /* TOD SECOND header */ #define BKN_DNX_TOD_SECOND_SIZE 4 +/* OIBIH */ +#define BKN_DNX_OIBIH_SIZE 14 +#define BKN_DNX_OIBIH_OAM_PDU_OFFSET_MSB 104 +#define BKN_DNX_OIBIH_OAM_PDU_OFFSET_NOF_BITS 8 + #define BKN_DPP_HDR_MAX_SIZE 40 /* PTCH_2 */ @@ -895,6 +964,7 @@ typedef struct bkn_dune_system_header_info_s { uint32_t source_sys_port_aggregate; /* Source System port*/ } ftmh; struct { + uint32_t parsing_start_offset; uint32_t forward_domain; uint32_t trap_qualifier; uint32_t trap_id; @@ -977,6 +1047,7 @@ typedef struct bkn_filter_s { int dev_no; unsigned long hits; kcom_filter_t kf; + knet_filter_cb_f cb; } bkn_filter_t; @@ -1018,8 +1089,22 @@ static knet_hw_tstamp_ptp_clock_index_cb_f knet_hw_tstamp_ptp_clock_index_cb = N static knet_hw_tstamp_rx_time_upscale_cb_f knet_hw_tstamp_rx_time_upscale_cb = NULL; static knet_hw_tstamp_rx_pre_process_cb_f knet_hw_tstamp_rx_pre_process_cb = NULL; static knet_hw_tstamp_ioctl_cmd_cb_f knet_hw_tstamp_ioctl_cmd_cb = NULL; -static knet_netif_cb_f knet_netif_create_cb = NULL; -static knet_netif_cb_f knet_netif_destroy_cb = NULL; +static knet_hw_tstamp_ptp_transport_get_cb_f knet_hw_tstamp_ptp_transport_get_cb = NULL; + +typedef struct bkn_netif_cb_s { + struct list_head list; + knet_netif_cb_f cb; +} bkn_netif_cb_t; +LIST_HEAD(netif_create_cb_list); +LIST_HEAD(netif_destroy_cb_list); + +typedef struct bkn_filter_cb_s { + struct list_head list; + char desc[KCOM_FILTER_DESC_MAX]; + knet_filter_cb_f cb; +} bkn_filter_cb_t; +LIST_HEAD(filter_cb_list); + /* * Thread management */ @@ -1105,6 +1190,31 @@ bkn_sleep(int clicks) /* CMICx interrupts reserved for kernel handler */ #define CMICX_TXRX_IRQ_MASK 0xffffffff +/* CMICR registers */ +#define CMICR_CMC_BASE 0x00000000 +#define CMICR_DMA_CTRLr (CMICR_CMC_BASE + 0x00003100) +#define CMICR_DMA_STATr (CMICR_CMC_BASE + 0x00003114) +#define CMICR_DMA_DESC_HIr (CMICR_CMC_BASE + 0x00003108) +#define CMICR_DMA_DESC_LOr (CMICR_CMC_BASE + 0x00003104) +#define CMICR_DMA_HALT_HIr (CMICR_CMC_BASE + 0x00003110) +#define CMICR_DMA_HALT_LOr (CMICR_CMC_BASE + 0x0000310c) +#define CMICR_INTR_STATr (CMICR_CMC_BASE + 0x00003118) +#define CMICR_INTR_ENABr (CMICR_CMC_BASE + 0x0000311C) +#define CMICR_INTR_CLRr (CMICR_CMC_BASE + 0x00003120) + +/* + * PAXB_0_INTC_SET_INTR_ENABLE_REG5r sets interrupt enable bit for interrupts 191 down to 160 + * Packet DMA interrupt enable bit is [168 : 199], here bit [168 : 183] is considered because it is assumed that only cmc0 + */ +#define PAXB_0_INTC_SET_INTR_ENABLE_REG5r 0x0292D114 +#define PAXB_0_INTC_INTR_RAW_STATUS_REG5r 0x0292D18C + + +/* CMICR interrupts reserved for kernel handler */ +#define CMICR_TXRX_IRQ_MASK 0xffff00 + + +#define DEV_IS_CMICR(_sinfo) ((_sinfo)->cmic_type == 'r') #define DEV_IS_CMICX(_sinfo) ((_sinfo)->cmic_type == 'x') #define DEV_IS_CMICM(_sinfo) ((_sinfo)->cmic_type == 'm') #define DEV_IS_CMIC(_sinfo) ((_sinfo)->cmic_type != 0) @@ -1145,6 +1255,14 @@ bkn_sleep(int clicks) #define CMICX_DS_CMC_DMA_CHAIN_DONE (0x00000001) #define CMICX_DS_CMC_DMA_ACTIVE (0x00000002) +#define CMICR_DS_CHAIN_DONE_INTR (0x00000001) +#define CMICR_DS_DESC_DONE_INTR (0x00000002) +#define CMICR_DS_DESC_CONTROLLED_INTR (0x00000004) +#define CMICR_DS_INTR_COALESCING_INTR (0x00000008) + +#define CMICR_DS_CMC_DMA_CHAIN_DONE (0x00000001) +#define CMICR_DS_CMC_DMA_ACTIVE (0x00000002) + #define DMA_TO_BUS_HI(dma) ((dma) | sinfo->dma_hi) #define BUS_TO_DMA_HI(bus) ((bus) & ~sinfo->dma_hi) @@ -1163,10 +1281,23 @@ bkn_sleep(int clicks) #define CMICX_DC_CMC_CTRLD_INT (0x00000080) #define CMICX_DC_CMC_CONTINUOUS (0x00000100) +#define CMICR_DC_CMC_DIRECTION (0x00000001) +#define CMICR_DC_CMC_ENABLE (0x00000002) +#define CMICR_DC_CMC_ABORT (0x00000004) +#define CMICR_DC_CMC_CTRLD_INT (0x00000080) +#define CMICR_DC_CMC_CONTINUOUS (0x00000100) +#define CMICR_DC_CHAIN_DONE_INTR_ENABLE (0x00000001) +#define CMICR_DC_DESC_DONE_INTR_ENABLE (0x00000002) +#define CMICR_DC_DESC_CONTROLLED_INTR_ENABLE (0x00000004) +#define CMICR_DC_INTR_COALESCING_INTR_ENABLE (0x00000008) + + /* Minimum packet header size for protect underflow. */ #define CMICX_PKT_HDR_SIZE_MIN 8 /* CMICX minimum packet header size for protect underflow. */ #define CMICX_DCB_SIZE_MIN 16 +/* CMICR minimum packet header size for protect underflow. */ +#define CMICR_DCB_SIZE_MIN 16 /* Minimum packet header size for protect underflow. */ #define DCB_SIZE_MIN 20 /* Maximum packet raw data size for filter validation. */ @@ -1176,7 +1307,7 @@ static void dev_read32(bkn_switch_info_t *sinfo, uint32_t address, uint32_t *value) { /* Devices id started with 0x8 is always from DNX devices */ - if ((sinfo->device_id & 0x8000) == 0x8000) { + if ((sinfo->base_id & 0x8000) == 0x8000) { if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) { /* Bypass register access when PCIE Link is down */ return; @@ -1190,7 +1321,7 @@ static void dev_write32(bkn_switch_info_t *sinfo, uint32_t address, uint32_t value) { /* Devices id started with 0x8 is always from DNX devices */ - if ((sinfo->device_id & 0x8000) == 0x8000) { + if ((sinfo->base_id & 0x8000) == 0x8000) { if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) { /* Bypass register access when PCIE Link is down */ return; @@ -1318,7 +1449,7 @@ static inline void xgs_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) { /* Devices id started with 0x8 is always from DNX devices */ - if ((sinfo->device_id & 0x8000) == 0x8000) { + if ((sinfo->base_id & 0x8000) == 0x8000) { if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) { /* Bypass hw access when PCIE Link is down */ return; @@ -1498,7 +1629,7 @@ xgsm_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) uint32_t ctrld_mask = 0; /* Devices id started with 0x8 is always from DNX devices */ - if ((sinfo->device_id & 0x8000) == 0x8000) { + if ((sinfo->base_id & 0x8000) == 0x8000) { if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) { /* Bypass hw access when PCIE Link is down */ return; @@ -1729,7 +1860,7 @@ xgsx_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) uint32_t fmask = CMICX_TXRX_IRQ_MASK; /* Devices id started with 0x8 is always from DNX devices */ - if ((sinfo->device_id & 0x8000) == 0x8000) { + if ((sinfo->base_id & 0x8000) == 0x8000) { if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) { /* Bypass hw access when PCIE Link is down */ return; @@ -1801,10 +1932,258 @@ xgsx_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw) } } +static inline void +xgsr_dma_chain_clear(bkn_switch_info_t *sinfo, int chan) +{ + uint32_t ctrl = 0; + uint32_t stat = 0; + + /* Disabing DMA clears chain done */ + dev_read32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, &ctrl); + ctrl &= ~(CMICR_DC_CMC_ENABLE | CMICR_DC_CMC_ABORT); + dev_write32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, ctrl); + + stat = CMICR_DS_CHAIN_DONE_INTR; + dev_write32(sinfo, CMICR_INTR_CLRr + 0x80 * chan, stat); + + MEMORY_BARRIER; + + /* Flush write buffer */ + dev_read32(sinfo, CMICR_INTR_CLRr + 0x80 * chan, &stat); + + MEMORY_BARRIER; +} + +static inline void +xgsr_dma_desc_clear(bkn_switch_info_t *sinfo, int chan) +{ + uint32_t stat = 0; + + if (CDMA_CH(sinfo, chan)) { + stat = CMICR_DS_DESC_CONTROLLED_INTR; + } else { + stat = CMICR_DS_DESC_DONE_INTR; + } + dev_write32(sinfo, CMICR_INTR_CLRr + 0x80 * chan, stat); + + MEMORY_BARRIER; + + /* Flush write buffer */ + dev_read32(sinfo, CMICR_INTR_CLRr + 0x80 * chan, &stat); + + MEMORY_BARRIER; +} + +static int +xgsr_dma_chan_clear(bkn_switch_info_t *sinfo, int chan) +{ + xgsr_dma_chain_clear(sinfo, chan); + xgsr_dma_desc_clear(sinfo, chan); + + return 0; +} + +static inline void +xgsr_cdma_halt_set(bkn_switch_info_t *sinfo, int chan) +{ + dev_write32(sinfo, CMICR_DMA_HALT_LOr + 0x80 * chan, + sinfo->halt_addr[chan]); + dev_write32(sinfo, CMICR_DMA_HALT_HIr + 0x80 * chan, + DMA_TO_BUS_HI(sinfo->halt_addr[chan] >> 32)); + + MEMORY_BARRIER; +} + +static int +xgsr_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir) +{ + uint32_t ctrl = 0; + + dev_read32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, &ctrl); + ctrl &= ~CMICR_DC_CMC_DIRECTION; + if (dir) { + ctrl |= CMICR_DC_CMC_DIRECTION; + } + if (CDMA_CH(sinfo, chan)) { + ctrl |= CMICR_DC_CMC_CONTINUOUS | CMICR_DC_CMC_CTRLD_INT; + xgsr_cdma_halt_set(sinfo, chan); + } + dev_write32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, ctrl); + + MEMORY_BARRIER; + + return 0; +} + +static int +xgsr_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb) +{ + uint32_t ctrl = 0; + + /* Write the DCB address to the DESC address for this channel */ + dev_write32(sinfo, CMICR_DMA_DESC_LOr + 0x80 * chan, dcb); + dev_write32(sinfo, CMICR_DMA_DESC_HIr + 0x80 * chan, DMA_TO_BUS_HI(dcb >> 32)); + + MEMORY_BARRIER; + + /* Kick it off */ + dev_read32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, &ctrl); + ctrl |= CMICR_DC_CMC_ENABLE; + dev_write32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, ctrl); + + MEMORY_BARRIER; + + return 0; +} + +static int +xgsr_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls) +{ + uint32_t ctrl = 0; + uint32_t stat = 0; + int p; + + /* Skip abort sequence if channel is not active */ + dev_read32(sinfo, CMICR_DMA_STATr + 0x80 * chan, &stat); + if (!(stat & CMICR_DS_CMC_DMA_ACTIVE)) { + return 0; + } + + /* Abort the channel */ + dev_read32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, &ctrl); + ctrl |= CMICR_DC_CMC_ENABLE | CMICR_DC_CMC_ABORT; + dev_write32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, ctrl); + + MEMORY_BARRIER; + + /* Poll for abort completion */ + for (p = 0; p < polls; p++) { + dev_read32(sinfo, CMICR_DMA_STATr + 0x80 * chan, &stat); + if (!(stat & CMICR_DS_CMC_DMA_ACTIVE)) { + /* Clear up channel */ + xgsr_dma_chan_clear(sinfo, chan); + return polls; + } + } + + DBG_WARN(("DMA channel %d abort failed\n", chan)); + + return -1; +} + +static inline void +xgsr_irq_fmask_get(bkn_switch_info_t *sinfo, uint32_t *fmask) +{ + int chan, bits = 1, base = 8; + + if (fmask == NULL) { + return; + } + + *fmask = CMICR_TXRX_IRQ_MASK; + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + *fmask &= ~(((0x1 << bits) - 1) << ((XGS_DMA_RX_CHAN + chan) * bits + base)); + } + } + return; +} + +static inline void +xgsr_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) +{ + uint32_t irq_mask_reg = PAXB_0_INTC_SET_INTR_ENABLE_REG5r; + uint32_t fmask = CMICR_TXRX_IRQ_MASK; + + if ((sinfo->base_id & 0x8000) == 0x8000) { + /* Devices id started with 0x8 is always from DNX devices */ + if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) { + /* Bypass hw access when PCIE Link is down */ + return; + } + } + + if (sinfo->napi_poll_mode) { + mask = 0; + } + + xgsr_irq_fmask_get(sinfo, &fmask); + if (sinfo->cpu_no == 1) { + DBG_WARN(("IHost(AXI) is not supported.\n")); + } + + lkbde_irq_mask_set(sinfo->dev_no | LKBDE_ISR2_DEV | LKBDE_IPROC_REG, + irq_mask_reg, mask, fmask); +} + +static inline void +xgsr_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + uint32_t enabler; + int bits = 1, base = 8; + + if (CDMA_CH(sinfo, chan)) { + dev_read32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, &enabler); + enabler |= CMICR_DC_DESC_CONTROLLED_INTR_ENABLE; + dev_write32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, enabler); + } else { + if (chan == XGS_DMA_TX_CHAN) { + dev_read32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, &enabler); + enabler |= CMICR_DC_CHAIN_DONE_INTR_ENABLE; + dev_write32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, enabler); + } else { + dev_read32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, &enabler); + enabler |= CMICR_DC_DESC_DONE_INTR_ENABLE; + enabler |= CMICR_DC_CHAIN_DONE_INTR_ENABLE; + dev_write32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, enabler); + + } + } + + sinfo->irq_mask |= (((0x1 << bits) - 1) << (chan * bits + base)); + + if (update_hw) { + xgsr_irq_mask_set(sinfo, sinfo->irq_mask); + } +} + +static inline void +xgsr_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + uint32_t enabler; + int bits = 1, base = 8; + + if (CDMA_CH(sinfo, chan)) { + dev_read32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, &enabler); + enabler &= ~CMICR_DC_DESC_CONTROLLED_INTR_ENABLE; + dev_write32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, enabler); + } else { + if (chan == XGS_DMA_TX_CHAN) { + dev_read32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, &enabler); + enabler &= ~CMICR_DC_CHAIN_DONE_INTR_ENABLE; + dev_write32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, enabler); + } else { + dev_read32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, &enabler); + enabler &= ~CMICR_DC_DESC_DONE_INTR_ENABLE; + enabler &= ~CMICR_DC_CHAIN_DONE_INTR_ENABLE; + dev_write32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, enabler); + } + } + + sinfo->irq_mask &= ~(((0x1 << bits) - 1) << (chan * bits + base)); + + if (update_hw) { + xgsr_irq_mask_set(sinfo, sinfo->irq_mask); + } +} + static inline void dev_dma_chain_clear(bkn_switch_info_t *sinfo, int chan) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + xgsr_dma_chain_clear(sinfo, chan); + } else if (DEV_IS_CMICX(sinfo)) { xgsx_dma_chain_clear(sinfo, chan); } else if (DEV_IS_CMICM(sinfo)) { xgsm_dma_chain_clear(sinfo, chan); @@ -1816,7 +2195,9 @@ dev_dma_chain_clear(bkn_switch_info_t *sinfo, int chan) static inline void dev_dma_desc_clear(bkn_switch_info_t *sinfo, int chan) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + xgsr_dma_desc_clear(sinfo, chan); + } else if (DEV_IS_CMICX(sinfo)) { xgsx_dma_desc_clear(sinfo, chan); } else if (DEV_IS_CMICM(sinfo)) { xgsm_dma_desc_clear(sinfo, chan); @@ -1828,7 +2209,9 @@ dev_dma_desc_clear(bkn_switch_info_t *sinfo, int chan) static int dev_dma_chan_clear(bkn_switch_info_t *sinfo, int chan) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + return xgsr_dma_chan_clear(sinfo, chan); + } else if (DEV_IS_CMICX(sinfo)) { return xgsx_dma_chan_clear(sinfo, chan); } else if (DEV_IS_CMICM(sinfo)) { return xgsm_dma_chan_clear(sinfo, chan); @@ -1840,7 +2223,9 @@ dev_dma_chan_clear(bkn_switch_info_t *sinfo, int chan) static void dev_cdma_halt_set(bkn_switch_info_t *sinfo, int chan) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + xgsr_cdma_halt_set(sinfo, chan); + } else if (DEV_IS_CMICX(sinfo)) { xgsx_cdma_halt_set(sinfo, chan); } else if (DEV_IS_CMICM(sinfo)) { xgsm_cdma_halt_set(sinfo, chan); @@ -1850,7 +2235,9 @@ dev_cdma_halt_set(bkn_switch_info_t *sinfo, int chan) static int dev_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + return xgsr_dma_chan_init(sinfo, chan, dir); + } else if (DEV_IS_CMICX(sinfo)) { return xgsx_dma_chan_init(sinfo, chan, dir); } else if (DEV_IS_CMICM(sinfo)) { return xgsm_dma_chan_init(sinfo, chan, dir); @@ -1862,7 +2249,9 @@ dev_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir) static int dev_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + return xgsr_dma_chan_start(sinfo, chan, dcb); + } else if (DEV_IS_CMICX(sinfo)) { return xgsx_dma_chan_start(sinfo, chan, dcb); } else if (DEV_IS_CMICM(sinfo)) { return xgsm_dma_chan_start(sinfo, chan, dcb); @@ -1874,7 +2263,9 @@ dev_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb) static int dev_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + return xgsr_dma_chan_abort(sinfo, chan, polls); + } else if (DEV_IS_CMICX(sinfo)) { return xgsx_dma_chan_abort(sinfo, chan, polls); } else if (DEV_IS_CMICM(sinfo)) { return xgsm_dma_chan_abort(sinfo, chan, polls); @@ -1886,7 +2277,9 @@ dev_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls) static inline void dev_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + xgsr_irq_mask_set(sinfo, mask); + } else if (DEV_IS_CMICX(sinfo)) { xgsx_irq_mask_set(sinfo, mask); } else if (DEV_IS_CMICM(sinfo)) { xgsm_irq_mask_set(sinfo, mask); @@ -1898,7 +2291,9 @@ dev_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) static inline void dev_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + xgsr_irq_mask_enable(sinfo, chan, update_hw); + } else if (DEV_IS_CMICX(sinfo)) { xgsx_irq_mask_enable(sinfo, chan, update_hw); } else if (DEV_IS_CMICM(sinfo)) { xgsm_irq_mask_enable(sinfo, chan, update_hw); @@ -1910,7 +2305,9 @@ dev_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw) static void dev_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + xgsr_irq_mask_disable(sinfo, chan, update_hw); + } else if (DEV_IS_CMICX(sinfo)) { xgsx_irq_mask_disable(sinfo, chan, update_hw); } else if (DEV_IS_CMICM(sinfo)) { xgsm_irq_mask_disable(sinfo, chan, update_hw); @@ -2043,13 +2440,13 @@ bkn_init_dcbs(bkn_switch_info_t *sinfo) for (idx = 0; idx < (MAX_TX_DCBS + 1); idx++) { if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[2] |= 1 << 24 | 1 << 16; } else { dcb_mem[1] |= 1 << 24 | 1 << 16; } if (idx == MAX_TX_DCBS) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[0] = sinfo->tx.desc[0].dcb_dma; dcb_mem[1] = DMA_TO_BUS_HI(sinfo->tx.desc[0].dcb_dma >> 32); dcb_mem[2] |= 1 << 18; @@ -2076,13 +2473,13 @@ bkn_init_dcbs(bkn_switch_info_t *sinfo) for (chan = 0; chan < sinfo->rx_chans; chan++) { for (idx = 0; idx < (MAX_RX_DCBS + 1); idx++) { if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[2] |= 1 << 24 | 1 << 16; } else { dcb_mem[1] |= 1 << 24 | 1 << 16; } if (idx == MAX_RX_DCBS) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[0] = sinfo->rx[chan].desc[0].dcb_dma; dcb_mem[1] = DMA_TO_BUS_HI(sinfo->rx[chan].desc[0].dcb_dma >> 32); dcb_mem[2] |= 1 << 18; @@ -2154,12 +2551,12 @@ bkn_dump_pkt(uint8_t *data, int size, int txrx) sprintf(&str[strlen(str)], "%02x ", data[idx]); if ((idx & 0xf) == 0xf) { sprintf(&str[strlen(str)], "\n"); - gprintk(str); + gprintk("%s", str); } } if ((idx & 0xf) != 0) { sprintf(&str[strlen(str)], "\n"); - gprintk(str); + gprintk("%s", str); } } @@ -2277,12 +2674,12 @@ bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo, return -1; } dcb = &dcb_chain->dcb_mem[dcb_chain->dcb_cur * sinfo->dcb_wsize]; - if ((sinfo->cmic_type == 'x' && (dcb[2] & 0xffff) < pktlen) || - (sinfo->cmic_type != 'x' && (dcb[1] & 0xffff) < pktlen)) { + if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && (dcb[2] & 0xffff) < pktlen) || + (((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) && (dcb[1] & 0xffff) < pktlen)) { DBG_WARN(("Rx API buffer too small\n")); return -1; } - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { pkt_dma = BUS_TO_DMA_HI(dcb[1]); pkt_dma = pkt_dma << 32 | dcb[0]; } else { @@ -2308,7 +2705,7 @@ bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo, memcpy(pkt, skb_pkt, pktlen); /* Copy packet metadata and mark as done */ - if (sinfo->cmic_type != 'x') { + if ((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) { for (i = SOC_DCB_META_OFFSET; i < sinfo->dcb_wsize; i++) { dcb[i] = desc->dcb_mem[i]; } @@ -2320,8 +2717,8 @@ bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo, if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { dcb = &dcb_chain->dcb_mem[dcb_chain->dcb_cur * sinfo->dcb_wsize]; - if ((sinfo->cmic_type == 'x' && dcb[2] & (1 << 18)) || - (sinfo->cmic_type != 'x' && dcb[1] & (1 << 18))) { + if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && dcb[2] & (1 << 18)) || + (((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) && dcb[1] & (1 << 18))) { /* Get the next chain if reload done */ dcb[sinfo->dcb_wsize-1] |= 1 << 31 | SOC_DCB_KNET_DONE; MEMORY_BARRIER; @@ -2332,8 +2729,8 @@ bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo, } } } else { - if ((sinfo->cmic_type == 'x' && (dcb[2] & (1 << 16)) == 0) || - (sinfo->cmic_type != 'x' && (dcb[1] & (1 << 16)) == 0)) { + if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && (dcb[2] & (1 << 16)) == 0) || + (((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) && (dcb[1] & (1 << 16)) == 0)) { bkn_api_rx_chain_done(sinfo, chan); } } @@ -2353,8 +2750,8 @@ bkn_rx_refill(bkn_switch_info_t *sinfo, int chan) struct sk_buff *skb; bkn_desc_info_t *desc; uint32_t *dcb; - uint32_t resv_size = sinfo->cmic_type == 'x' ? RCPU_HDR_SIZE : RCPU_RX_ENCAP_SIZE; - uint32_t meta_size = sinfo->cmic_type == 'x' ? RCPU_RX_META_SIZE : 0; + uint32_t resv_size = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? RCPU_HDR_SIZE : RCPU_RX_ENCAP_SIZE; + uint32_t meta_size = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? RCPU_RX_META_SIZE : 0; int prev; if (sinfo->rx[chan].use_rx_skb == 0) { @@ -2388,11 +2785,11 @@ bkn_rx_refill(bkn_switch_info_t *sinfo, int chan) skb = desc->skb; desc->dma_size = rx_buffer_size + meta_size; #ifdef KNET_NO_AXI_DMA_INVAL - /* - * FIXME: Need to retain this code until iProc customers have been - * migrated to updated u-boot. Old u-boot versions are unable to load - * the kernel into non-ACP memory. - */ + + + + + /* * Cache invalidate may corrupt DMA memory on some iProc-based devices * if the kernel is mapped to ACP memory. @@ -2414,7 +2811,7 @@ bkn_rx_refill(bkn_switch_info_t *sinfo, int chan) dcb = desc->dcb_mem; dcb[0] = desc->skb_dma; if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[2] |= 1 << 24 | 1 << 16; } else { dcb[1] |= 1 << 24 | 1 << 16; @@ -2422,14 +2819,14 @@ bkn_rx_refill(bkn_switch_info_t *sinfo, int chan) } else { prev = PREV_IDX(sinfo->rx[chan].cur, MAX_RX_DCBS); if (prev < (MAX_RX_DCBS - 1)) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { sinfo->rx[chan].desc[prev].dcb_mem[2] |= 1 << 16; } else { sinfo->rx[chan].desc[prev].dcb_mem[1] |= 1 << 16; } } } - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[1] = DMA_TO_BUS_HI(desc->skb_dma >> 32); dcb[2] |= rx_buffer_size + meta_size; } else { @@ -2603,7 +3000,10 @@ device_is_dpp(bkn_switch_info_t *sinfo) { int is_dpp = 0; - is_dpp = (sinfo->dcb_type == 28) ? 1 : 0; + if (sinfo) + { + is_dpp = (sinfo->dcb_type == 28) ? 1 : 0; + } return is_dpp; } @@ -2612,7 +3012,10 @@ device_is_dnx(bkn_switch_info_t *sinfo) { int is_dnx = 0; - is_dnx = (sinfo->dcb_type == 39) ? 1 : 0; + if (sinfo) + { + is_dnx = (sinfo->dcb_type == 39) ? 1 : 0; + } return is_dnx; } @@ -2623,9 +3026,11 @@ device_is_sand(bkn_switch_info_t *sinfo) int is_dpp = 0; int is_dnx = 0; - is_dpp = (sinfo->dcb_type == 28) ? 1 : 0; - is_dnx = (sinfo->dcb_type == 39) ? 1 : 0; - + if (sinfo) + { + is_dpp = (sinfo->dcb_type == 28) ? 1 : 0; + is_dnx = (sinfo->dcb_type == 39) ? 1 : 0; + } return (is_dpp | is_dnx); } @@ -2639,6 +3044,7 @@ bkn_match_rx_pkt(bkn_switch_info_t *sinfo, uint8_t *pkt, int pktlen, uint8_t *oob = (uint8_t *)meta; int size, wsize; int idx, match; + knet_filter_cb_f filter_cb; list_for_each(list, &sinfo->rxpf_list) { filter = (bkn_filter_t *)list; @@ -2704,11 +3110,12 @@ bkn_match_rx_pkt(bkn_switch_info_t *sinfo, uint8_t *pkt, int pktlen, if (match) { if (kf->dest_type == KCOM_DEST_T_CB) { /* Check for custom filters */ - if (knet_filter_cb != NULL && cbf != NULL) { + filter_cb = filter->cb ? filter->cb : knet_filter_cb; + if (filter_cb != NULL && cbf != NULL) { memset(cbf, 0, sizeof(*cbf)); memcpy(&cbf->kf, kf, sizeof(cbf->kf)); - if (knet_filter_cb(pkt, pktlen, sinfo->dev_no, - meta, chan, &cbf->kf)) { + if (filter_cb(pkt, pktlen, sinfo->dev_no, + meta, chan, &cbf->kf)) { filter->hits++; return cbf; } @@ -2790,8 +3197,8 @@ bkn_add_rcpu_encap(bkn_switch_info_t *sinfo, struct sk_buff *skb, void *meta, in */ psize = RCPU_HDR_SIZE + len; skb_push(skb, psize); - memset(skb->data, 0, psize); - } else if (sinfo->cmic_type == 'x') { + memset(skb->data, 0, RCPU_HDR_SIZE); + } else if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { psize = RCPU_HDR_SIZE + sinfo->pkt_hdr_size; skb_push(skb, psize); memset(skb->data, 0, RCPU_HDR_SIZE); @@ -2830,11 +3237,10 @@ bkn_add_rcpu_encap(bkn_switch_info_t *sinfo, struct sk_buff *skb, void *meta, in if (device_is_sand(sinfo)) { /* Copy at most 256 bytes system headers */ - len = len > RCPU_RX_META_SIZE_MAX ? RCPU_RX_META_SIZE_MAX : len; memcpy(&skb->data[RCPU_HDR_SIZE], (uint8_t *)meta, len); } else { - smeta = sinfo->cmic_type == 'x' ? (uint32_t *)meta : (uint32_t *)meta + 2; - wsize = sinfo->cmic_type == 'x' ? sinfo->pkt_hdr_size / 4 : sinfo->dcb_wsize - 3; + smeta = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? (uint32_t *)meta : (uint32_t *)meta + 2; + wsize = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? sinfo->pkt_hdr_size / 4 : sinfo->dcb_wsize - 3; for (idx = 0; idx < wsize; idx++) { dmeta[idx] = htonl(smeta[idx]); } @@ -3208,17 +3614,35 @@ bkn_dpp_packet_header_parse( /* FTMH */ bkn_dpp_packet_parse_ftmh(sinfo, buff, buff_len, packet_info, &is_tsh_en, &is_inter_hdr_en); - /* Check if packet is punted from OAMP */ - if (sinfo->oamp_punt && (packet_info->ftmh.source_sys_port_aggregate == sinfo->oamp_punt)) { - is_oamp_punted = TRUE; + + /* Check if packet was punted to CPU by OAMP */ + if (device_is_dpp(sinfo)) + { + if (sinfo->oamp_punt && (packet_info->ftmh.source_sys_port_aggregate == sinfo->oamp_punt)) { + is_oamp_punted = TRUE; + } } + else if (device_is_dnx(sinfo)) + { + uint8_t idx = 0; + for (idx = 0; idx < sinfo->oamp_port_number; idx++) + { + if (packet_info->ftmh.source_sys_port_aggregate == sinfo->oamp_ports[idx]) + { + is_oamp_punted = TRUE; + break; + } + } + } + + /* OTSH */ if (is_tsh_en == TRUE) { bkn_dpp_packet_parse_otsh(sinfo, buff, buff_len, packet_info, &is_oam_dm_tod_en, &is_skip_udh); } /* Internal header is forced to be present if packet was punted to CPU by OAMP */ - if (sinfo->oamp_punt && (packet_info->ftmh.source_sys_port_aggregate == sinfo->oamp_punt)) + if (is_oamp_punted) { is_inter_hdr_en = TRUE; } @@ -3468,6 +3892,14 @@ bkn_dnx_packet_parse_internal( &fld_val); lif_ext_type = fld_val; + /* Internal: Parsing-Start-Offset */ + bkn_bitstream_get_field( + &buf[pkt_offset], + BKN_DNX_INTERNAL_12_PARSING_START_OFFSET_MSB, + BKN_DNX_INTERNAL_12_PARSING_START_OFFSET_NOF_BITS, + &fld_val); + packet_info->internal.parsing_start_offset = fld_val; + pkt_offset += BKN_DNX_INTERNAL_BASE_TYPE_12; DBG_DUNE(("Internal(12-%u): FWD_DOMAIN %d, LEARN_EXT %d, FHEI_SIZE %d, LIF_EXT %d \n", pkt_offset, packet_info->internal.forward_domain, @@ -3573,11 +4005,33 @@ bkn_dnx_packet_parse_internal( &fld_val); data_type_3 = fld_val; pkt_offset += BKN_DNX_UDH_BASE_SIZE; - pkt_offset += sinfo->udh_length_type[data_type_0]; - pkt_offset += sinfo->udh_length_type[data_type_1]; - pkt_offset += sinfo->udh_length_type[data_type_2]; - pkt_offset += sinfo->udh_length_type[data_type_3]; - DBG_DUNE(("UDH base(1-%u) is present\n", pkt_offset)); + if (sinfo->cmic_type == 'r') + { + if (data_type_0) + { + pkt_offset += sinfo->udh_length_type[0]; + } + if (data_type_1) + { + pkt_offset += sinfo->udh_length_type[1]; + } + if (data_type_2) + { + pkt_offset += sinfo->udh_length_type[2]; + } + if (data_type_3) + { + pkt_offset += sinfo->udh_length_type[3]; + } + } + else + { + pkt_offset += sinfo->udh_length_type[data_type_0]; + pkt_offset += sinfo->udh_length_type[data_type_1]; + pkt_offset += sinfo->udh_length_type[data_type_2]; + pkt_offset += sinfo->udh_length_type[data_type_3]; + } + DBG_DUNE(("UDH base(1-%u) is present\n", pkt_offset)); } packet_info->system_header_size = pkt_offset; @@ -3620,6 +4074,7 @@ bkn_dnx_packet_header_parse( if (packet_info->ftmh.source_sys_port_aggregate == sinfo->oamp_ports[idx]) { is_oamp_punted = TRUE; + break; } } @@ -3628,6 +4083,7 @@ bkn_dnx_packet_header_parse( { bkn_dnx_packet_parse_internal(sinfo, buff, buff_len, packet_info, is_oamp_punted, &is_trapped); } + /* OAM DMM/DMR TOD second header */ if (is_oam_dm_tod_second_en == TRUE) { @@ -3637,12 +4093,24 @@ bkn_dnx_packet_header_parse( if (is_oamp_punted) { + uint32_t oibih_oam_pdu_offset = 0; is_oam_dm_tod_second_en = FALSE; is_inter_hdr_en = FALSE; is_tsh_en = FALSE; is_oamp_punted = FALSE; is_trapped = FALSE; + if (sinfo->cmic_type == 'r') + { + /* OIBIH: OAM_PDU_Offset */ + bkn_bitstream_get_field( + &buff[packet_info->system_header_size], + BKN_DNX_OIBIH_OAM_PDU_OFFSET_MSB, + BKN_DNX_OIBIH_OAM_PDU_OFFSET_NOF_BITS, + &oibih_oam_pdu_offset); + packet_info->system_header_size += BKN_DNX_OIBIH_SIZE; + DBG_DUNE(("OIBIH Header(14-%u) is present\n", packet_info->system_header_size)); + } /* FTMH */ bkn_dnx_packet_parse_ftmh(sinfo, buff, buff_len, packet_info, &is_tsh_en, &is_inter_hdr_en, &is_oam_dm_tod_second_en); @@ -3661,6 +4129,26 @@ bkn_dnx_packet_header_parse( { /* DO NOT have 4Bytes TOD second header. */ } + if (oibih_oam_pdu_offset) + { + /* + * parsing_start_offset indicates the bytes before OAM PDU including PTCH, etc. For example, it's the length of PTCH + ETH1 + * oibih_oam_pdu_offset indicates the bytes from the end of system headers to OAM PDU. For example, it's the length of ETH1 + */ + if (packet_info->internal.parsing_start_offset > oibih_oam_pdu_offset) + { + packet_info->system_header_size += (packet_info->internal.parsing_start_offset - oibih_oam_pdu_offset); + DBG_DUNE(("Offset after system headers %u\n", (packet_info->internal.parsing_start_offset - oibih_oam_pdu_offset))); + } + } + } + else + { + if (packet_info->internal.parsing_start_offset && (sinfo->cmic_type == 'r')) + { + packet_info->system_header_size += packet_info->internal.parsing_start_offset; + DBG_DUNE(("Offset after system headers %u\n", packet_info->internal.parsing_start_offset)); + } } DBG_DUNE(("Total length of headers is %u\n", packet_info->system_header_size)); @@ -3729,8 +4217,8 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) if (dcbs_done >= budget) { break; } - if ((sinfo->cmic_type == 'x' && dcb[2] & (1 << 18)) || - (sinfo->cmic_type != 'x' && dcb[1] & (1 << 18))) { + if (((sinfo->cmic_type == 'x' || sinfo->cmic_type == 'r') && dcb[2] & (1 << 18)) || + ((sinfo->cmic_type != 'x' && sinfo->cmic_type != 'r') && dcb[1] & (1 << 18))) { dcb[sinfo->dcb_wsize-1] |= SOC_DCB_KNET_DONE; bkn_api_rx_chain_done(sinfo, chan); dcb_chain = sinfo->rx[chan].api_dcb_chain; @@ -3740,12 +4228,12 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) continue; } } - if ((sinfo->cmic_type == 'x' && (dcb[2] & (1 << 16)) == 0) || - (sinfo->cmic_type != 'x' && (dcb[1] & (1 << 16)) == 0)) { + if (((sinfo->cmic_type == 'x' || sinfo->cmic_type == 'r') && (dcb[2] & (1 << 16)) == 0) || + ((sinfo->cmic_type != 'x' && sinfo->cmic_type != 'r') && (dcb[1] & (1 << 16)) == 0)) { sinfo->rx[chan].chain_complete = 1; } sinfo->rx[chan].pkts++; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { pkt_dma = BUS_TO_DMA_HI(dcb[1]); pkt_dma = pkt_dma << 32 | dcb[0]; } else { @@ -3764,7 +4252,7 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) bkn_packet_header_parse(sinfo, pkt, (uint32_t)pktlen, &packet_info); pkt_hdr_size = packet_info.system_header_size; } else { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta = (uint32_t *)pkt; err_woff = sinfo->pkt_hdr_size / sizeof(uint32_t) - 1; meta[err_woff] = dcb[sinfo->dcb_wsize-1]; @@ -3895,19 +4383,27 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) /* Save for RCPU before stripping tag */ ethertype = PKT_U16_GET(pkt, 16); + + skb_copy_to_linear_data(skb, pkt, pktlen); + if (device_is_sand(sinfo)) { + /* CRC has been stripped */ + skb_put(skb, pktlen); + } else { + skb_put(skb, pktlen - 4); /* Strip CRC */ + } + if ((priv->flags & KCOM_NETIF_F_KEEP_RX_TAG) == 0) { uint16_t vlan_proto = PKT_U16_GET(pkt, 12); if (filter->kf.flags & KCOM_FILTER_F_STRIP_TAG) { - /* Strip the VLAN tag */ + /* Strip VLAN tag */ if (vlan_proto == ETH_P_8021Q || vlan_proto == ETH_P_8021AD) { DBG_FLTR(("Strip VLAN tag\n")); - for (idx = 11; idx >= 0; idx--) { - pkt[idx+4] = pkt[idx]; - } - pktlen -= 4; - pkt += 4; + ((u32*)skb->data)[3] = ((u32*)skb->data)[2]; + ((u32*)skb->data)[2] = ((u32*)skb->data)[1]; + ((u32*)skb->data)[1] = ((u32*)skb->data)[0]; + skb_pull(skb, 4); } } else { /* @@ -3930,13 +4426,6 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) } } - skb_copy_to_linear_data(skb, pkt, pktlen); - if (device_is_sand(sinfo)) { - /* CRC has been stripped */ - skb_put(skb, pktlen); - } else { - skb_put(skb, pktlen - 4); /* Strip CRC */ - } priv->stats.rx_packets++; priv->stats.rx_bytes += skb->len; @@ -4124,7 +4613,6 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) int dcbs_done = 0; bkn_dune_system_header_info_t packet_info = {0}; uint32_t sand_scratch_data[BKN_SAND_SCRATCH_DATA_SIZE] = {0}; - uint8_t sand_system_headers[RCPU_RX_META_SIZE_MAX] = {0}; uint8_t *pkt = NULL; bkn_priv_t *mpriv; struct sk_buff *mskb = NULL; @@ -4150,8 +4638,8 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) if ((dcb[sinfo->dcb_wsize-1] & (1 << 31)) == 0) { break; } - if ((sinfo->cmic_type == 'x' && (dcb[2] & (1 << 16)) == 0) || - (sinfo->cmic_type != 'x' && (dcb[1] & (1 << 16)) == 0)) { + if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && (dcb[2] & (1 << 16)) == 0) || + (((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) && (dcb[1] & (1 << 16)) == 0)) { sinfo->rx[chan].chain_complete = 1; /* Request one extra poll to check for chain done interrupt */ if (sinfo->napi_poll_mode) { @@ -4173,7 +4661,9 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) if (device_is_sand(sinfo)) { err_woff = BKN_SAND_SCRATCH_DATA_SIZE - 1; + /* Last DCB word with error bit */ sand_scratch_data[err_woff] = dcb[sinfo->dcb_wsize-1]; + /* Data starts with DNX system headers and the length is specified by pkt_hdr_size */ meta = (uint32_t *)skb->data; pkt = skb->data; memset(&packet_info, 0, sizeof(bkn_dune_system_header_info_t)); @@ -4201,7 +4691,7 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) } } else { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta = (uint32_t *)skb->data; err_woff = sinfo->pkt_hdr_size / sizeof(uint32_t) - 1; meta[err_woff] = dcb[sinfo->dcb_wsize-1]; @@ -4241,10 +4731,6 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) packet_info.internal.forward_domain); bkn_bitstream_set_field(sand_scratch_data, 64, 2, packet_info.ftmh.action_type); - memcpy(sand_system_headers, pkt, - ((pkt_hdr_size > RCPU_RX_META_SIZE_MAX) ? - RCPU_RX_META_SIZE_MAX : pkt_hdr_size)); - meta = (uint32_t *)sand_system_headers; if (force_tagged) { uint8_t *eth_hdr = pkt + pkt_hdr_size; uint16_t tpid = 0; @@ -4374,10 +4860,13 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) ((u32*)skb->data)[1] = ((u32*)skb->data)[0]; skb_pull(skb, 4); if (device_is_sand(sinfo)) { - for (idx = pkt_hdr_size; idx >= 4; idx--) { - pkt[idx] = pkt[idx - 4]; + /* Headers shifted left 4 bytes*/ + for (idx = pkt_hdr_size; idx >= 0; idx--) { + pkt[idx + 4] = pkt[idx]; } - } else if (sinfo->cmic_type == 'x') { + pkt += 4; + meta++; + } else if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { for (idx = pkt_hdr_size / sizeof(uint32_t); idx; idx--) { meta[idx] = meta[idx - 1]; @@ -4568,7 +5057,7 @@ bkn_rx_debug_dump(bkn_switch_info_t *sinfo, int chan) (unsigned long)sinfo->rx[chan].desc[0].dcb_dma); for (cnt = 0; cnt < MAX_RX_DCBS; cnt++) { dcb = sinfo->rx[chan].desc[cnt].dcb_mem; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { gprintk(" DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt, dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); } else { @@ -4583,7 +5072,7 @@ bkn_rx_debug_dump(bkn_switch_info_t *sinfo, int chan) gprintk(" [0x%08lx]--->\n", (unsigned long)dcb_chain->dcb_dma); for (cnt = 0; cnt < dcb_chain->dcb_cnt; cnt++) { dcb = &dcb_chain->dcb_mem[sinfo->dcb_wsize * cnt]; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { gprintk(" DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt, dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); } else { @@ -4714,7 +5203,9 @@ bkn_suspend_tx(bkn_switch_info_t *sinfo) /* Stop associated virtual devices */ list_for_each(list, &sinfo->ndev_list) { priv = (bkn_priv_t *)list; - netif_stop_queue(priv->dev); + if (priv->dev) { + netif_stop_queue(priv->dev); + } } } @@ -4731,8 +5222,10 @@ bkn_resume_tx(bkn_switch_info_t *sinfo) /* Check associated virtual devices */ list_for_each(list, &sinfo->ndev_list) { priv = (bkn_priv_t *)list; - if (netif_queue_stopped(priv->dev) && sinfo->tx.free > 1) { - netif_wake_queue(priv->dev); + if (priv->dev) { + if (netif_queue_stopped(priv->dev) && sinfo->tx.free > 1) { + netif_wake_queue(priv->dev); + } } } } @@ -4752,7 +5245,7 @@ bkn_hw_tstamp_tx_set(bkn_switch_info_t *sinfo, struct sk_buff *skb) int hwts; int port; uint64_t ts = 0; - uint32_t hdrlen = sinfo->cmic_type == 'x' ? PKT_TX_HDR_SIZE : 0; + uint32_t hdrlen = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? PKT_TX_HDR_SIZE : 0; struct skb_shared_hwtstamps shhwtstamps; if (!knet_hw_tstamp_tx_time_get_cb) { @@ -4918,7 +5411,7 @@ bkn_tx_cdma_chain_switch(bkn_switch_info_t *sinfo) dcb_mem = sinfo->tx.desc[sinfo->tx.cur].dcb_mem; memset(dcb_mem, 0, sinfo->dcb_wsize * sizeof(uint32_t)); dcb_mem[0] = dcb_chain->dcb_dma; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32); dcb_mem[2] |= 1 << 24 | 1 << 18 | 1 << 16; } else { @@ -4938,7 +5431,7 @@ bkn_tx_cdma_chain_switch(bkn_switch_info_t *sinfo) woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize; dcb_mem = &dcb_chain->dcb_mem[woffset]; dcb_mem[0] = sinfo->tx.desc[sinfo->tx.dirty].dcb_dma; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[1] = DMA_TO_BUS_HI(sinfo->tx.desc[sinfo->tx.dirty].dcb_dma >> 32); } dcb_dma = sinfo->tx.desc[sinfo->tx.cur].dcb_dma; @@ -4978,14 +5471,14 @@ bkn_api_tx(bkn_switch_info_t *sinfo) if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN) && i == dcb_chain->dcb_cnt - 1) { break; } - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { pkt_dma = BUS_TO_DMA_HI(dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 1]); pkt_dma = pkt_dma << 32 | dcb_chain->dcb_mem[sinfo->dcb_wsize * i]; } else { pkt_dma = dcb_chain->dcb_mem[sinfo->dcb_wsize * i]; } pktdata = kernel_bde->p2l(sinfo->dev_no, pkt_dma); - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { pktlen = dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 2] & 0xffff; } else { pktlen = dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 1] & 0xffff; @@ -5117,7 +5610,7 @@ bkn_tx_chain_done(bkn_switch_info_t *sinfo, int done) pending = MAX_TX_DCBS - sinfo->tx.free; idx = sinfo->tx.dirty; while (--pending && idx < (MAX_TX_DCBS - 1)) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { sinfo->tx.desc[idx++].dcb_mem[2] |= 1 << 16; } else { sinfo->tx.desc[idx++].dcb_mem[1] |= 1 << 16; @@ -5333,6 +5826,7 @@ xgsx_do_dma(bkn_switch_info_t *sinfo, int budget) dev_read32(sinfo, CMICX_IRQ_STATr, &irq_stat); dev_read32(sinfo, CMICX_DMA_STATr + 0x80 * XGS_DMA_TX_CHAN, &tx_dma_stat); + for (chan = 0; chan < sinfo->rx_chans; chan++) { if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { unet_chans++; @@ -5407,10 +5901,97 @@ xgsx_do_dma(bkn_switch_info_t *sinfo, int budget) return sinfo->poll_channels ? budget : rx_dcbs_done; } +static int +xgsr_do_dma(bkn_switch_info_t *sinfo, int budget) +{ + int rx_dcbs_done = 0, tx_dcbs_done = 0; + int chan_done, budget_chans = 0; + uint32_t tx_dma_stat = 0; + uint32_t rx_dma_stat[NUM_CMICR_RX_CHAN] = {0}; + int chan; + int unet_chans = 0; + + dev_read32(sinfo, CMICR_INTR_STATr + 0x80 * XGS_DMA_TX_CHAN, &tx_dma_stat); + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + unet_chans++; + continue; + } + dev_read32(sinfo, + CMICR_INTR_STATr + 0x80 * (XGS_DMA_RX_CHAN + chan), + &rx_dma_stat[chan]); + } + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + continue; + } + if ((rx_dma_stat[chan] & CMICR_DS_DESC_CONTROLLED_INTR) || + (rx_dma_stat[chan] & CMICR_DS_DESC_DONE_INTR)) { + xgsr_dma_desc_clear(sinfo, XGS_DMA_RX_CHAN + chan); + sinfo->poll_channels |= 1 << chan; + } + } + if (!sinfo->poll_channels) { + sinfo->poll_channels = (uint32_t)(1 << sinfo->rx_chans) - 1; + sinfo->poll_channels &= ~(sinfo->unet_channels >> 1); + if (sinfo->rx_chans > unet_chans) { + budget_chans = budget / (sinfo->rx_chans - unet_chans); + } + } else { + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (1 << chan & sinfo->poll_channels) { + budget_chans++; + } + } + if (budget_chans) { + budget_chans = budget / budget_chans; + } + } + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (1 << chan & sinfo->poll_channels) { + chan_done = bkn_do_rx(sinfo, chan, budget_chans); + rx_dcbs_done += chan_done; + if (chan_done < budget_chans) { + sinfo->poll_channels &= ~(1 << chan); + } + bkn_rx_desc_done(sinfo, chan); + } + + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + continue; + } + + if (rx_dma_stat[chan] & CMICR_DS_CMC_DMA_CHAIN_DONE) { + if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + continue; + } + xgsr_dma_chain_clear(sinfo, XGS_DMA_RX_CHAN + chan); + bkn_rx_chain_done(sinfo, chan); + } + } + + if ((tx_dma_stat & CMICR_DS_DESC_CONTROLLED_INTR) || + (tx_dma_stat & CMICR_DS_DESC_DONE_INTR)) { + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + xgsr_dma_desc_clear(sinfo, XGS_DMA_TX_CHAN); + } else { + xgsr_dma_chain_clear(sinfo, XGS_DMA_TX_CHAN); + } + tx_dcbs_done = bkn_do_tx(sinfo); + bkn_tx_chain_done(sinfo, tx_dcbs_done); + } + + return sinfo->poll_channels ? budget : rx_dcbs_done; +} + static int dev_do_dma(bkn_switch_info_t *sinfo, int budget) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + return xgsr_do_dma(sinfo, budget); + } else if (DEV_IS_CMICX(sinfo)) { return xgsx_do_dma(sinfo, budget); } else if (DEV_IS_CMICM(sinfo)) { return xgsm_do_dma(sinfo, budget); @@ -5497,7 +6078,7 @@ xgsx_isr(bkn_switch_info_t *sinfo) if (device_is_dnx(sinfo)) { uint32_t ctrl = 0; int chan = 0; - for (chan = 0; chan < NUM_DMA_CHAN; chan++) { + for (chan = 0; chan < NUM_CMICX_DMA_CHAN; chan++) { if (irq_stat & CMICX_DS_CMC_CHAIN_DONE(chan)) { dev_read32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, &ctrl); if (ctrl & CMICX_DC_CMC_ABORT) { @@ -5531,6 +6112,59 @@ xgsx_isr(bkn_switch_info_t *sinfo) xgsx_irq_mask_set(sinfo, sinfo->irq_mask); } +static void +xgsr_isr(bkn_switch_info_t *sinfo) +{ + uint32_t irq_stat = 0; + int rx_dcbs_done; + + lkbde_irq_status_get(sinfo->dev_no | LKBDE_IPROC_REG, PAXB_0_INTC_INTR_RAW_STATUS_REG5r, &irq_stat); + + if ((irq_stat & sinfo->irq_mask) == 0) { + /* Not ours */ + return; + } + + /* Bypass chain_done from Abort */ + if (device_is_dnx(sinfo)) { + uint32_t ctrl = 0; + uint32_t intr_stat = 0; + int chan = 0; + for (chan = 0; chan < NUM_CMICR_DMA_CHAN; chan++) { + dev_read32(sinfo, CMICR_INTR_STATr + 0x80 * chan, &intr_stat); + if (intr_stat & CMICR_DS_CHAIN_DONE_INTR) { + dev_read32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, &ctrl); + if (ctrl & CMICR_DC_CMC_ABORT) { + DBG_IRQ(("chain %d: chain done for Abort\n", chan)); + return; + } + } + } + } + + sinfo->interrupts++; + + DBG_IRQ(("Got interrupt on device %d (0x%08x)\n", + sinfo->dev_no, irq_stat)); + + if (use_napi) { + bkn_schedule_napi_poll(sinfo); + } else { + xgsr_irq_mask_set(sinfo, 0); + do { + rx_dcbs_done = xgsr_do_dma(sinfo, MAX_RX_DCBS); + if (sinfo->cdma_channels) { + if (rx_dcbs_done >= MAX_RX_DCBS || sinfo->tx_yield) { + /* Continuous DMA mode requires to yield timely */ + break; + } + } + } while (rx_dcbs_done); + } + + xgsr_irq_mask_set(sinfo, sinfo->irq_mask); +} + static void bkn_isr(void *isr_data) { @@ -5555,7 +6189,9 @@ bkn_isr(void *isr_data) return; } - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + xgsr_isr(sinfo); + } else if (DEV_IS_CMICX(sinfo)) { xgsx_isr(sinfo); } else if (DEV_IS_CMICM(sinfo)) { xgsm_isr(sinfo); @@ -5948,6 +6584,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) unsigned long flags; uint8_t cpu_channel = 0; int headroom, tailroom; + int ptp_transport = 0; DBG_VERB(("Netif Tx(%s): Len=%d priv->id=%d\n", dev->name, skb->len, priv->id)); @@ -5987,9 +6624,25 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) /* Account for extra OAM-TS header. */ if ((bkn_skb_tx_flags(skb) & SKBTX_HW_TSTAMP) && (hdrlen > (BKN_DNX_PTCH_2_SIZE))) { - /* T_LOCAL_PORT intf will use Module Hdr + PTCH + ITMH + ASE1588 + TSH */ if (device_is_dnx(sinfo)) { - hdrlen += (BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE + BKN_DNX_TSH_SIZE); + if (knet_hw_tstamp_ptp_transport_get_cb != NULL) { + ptp_transport = knet_hw_tstamp_ptp_transport_get_cb(skb->data); + switch(ptp_transport) { + case 6: /* UDP IPv6 */ + /* T_LOCAL_PORT intf will use + Module Hdr + PTCH + ITMH + ASE1588 + TSH + INTERNAL_HDR + UDH base + */ + hdrlen += (BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE + BKN_DNX_TSH_SIZE + + BKN_DNX_INTERNAL_BASE_TYPE_12 + BKN_DNX_UDH_BASE_SIZE); + break; + case 4: /* UDP IPv4 */ + case 2: /* IEEE 802.3 */ + default: + /* T_LOCAL_PORT intf will use Module Hdr + PTCH + ITMH + ASE1588 + TSH */ + hdrlen += (BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE + BKN_DNX_TSH_SIZE); + break; + } + } } else { hdrlen += BKN_DPP_OTSH_SIZE_BYTE; } @@ -5997,7 +6650,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } else { - hdrlen = (sinfo->cmic_type == 'x' ) ? PKT_TX_HDR_SIZE : 0; + hdrlen = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? PKT_TX_HDR_SIZE : 0; } rcpulen = 0; sop = 0; @@ -6122,7 +6775,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } } } else { - if (((sinfo->cmic_type == 'x') && (priv->port >= 0)) + if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && (priv->port >= 0)) || device_is_sand(sinfo)) { if (skb_header_cloned(skb) || skb_headroom(skb) < hdrlen + 4) { /* Current SKB cannot be modified */ @@ -6236,11 +6889,11 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } dcb = desc->dcb_mem; - meta = (sinfo->cmic_type == 'x') ? (uint32_t *)pktdata : dcb; + meta = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? (uint32_t *)pktdata : dcb; memset(dcb, 0, sinfo->dcb_wsize * sizeof(uint32_t)); if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { if (device_is_sand(sinfo)) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[2] |= 1 << 19; /* Given Module Header exists and set first byte to be CPU channel */ pktdata[0] = cpu_channel; @@ -6252,7 +6905,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } else if (sop != 0) { /* If module header SOP is non-zero, use RCPU meta data */ - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[2] |= 1 << 19; } else { metalen = (sinfo->dcb_wsize - 3) * sizeof(uint32_t); @@ -6268,7 +6921,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } } else if (priv->port >= 0) { /* Send to physical port */ - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[2] |= 1 << 19; } else { dcb[1] |= 1 << 19; @@ -6276,16 +6929,28 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) switch (sinfo->dcb_type) { case 23: case 26: - case 30: - case 31: - case 34: - case 37: dcb[2] = 0x81000000; dcb[3] = priv->port; dcb[3] |= (priv->qnum & 0xc00) << 20; dcb[4] = 0x00040000; dcb[4] |= (priv->qnum & 0x3ff) << 8; break; + case 30: + case 31: + case 34: + case 37: + case 40: + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { + meta[0] = htonl(0x81000000); + meta[1] = htonl(priv->port); + meta[2] = htonl(0x00040000 | (priv->qnum & 0x7) << 24); + } else { + dcb[2] = 0x81000000; + dcb[3] = priv->port; + dcb[4] = 0x00040000; + dcb[4] |= (priv->qnum & 0x7) << 24; + } + break; case 24: dcb[2] = 0xff000000; dcb[3] = 0x00000100; @@ -6295,12 +6960,14 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) case 28: /* * If KCOM_NETIF_T_PORT, add PTCH+ITMH header - * If KCOM_NETIF_T_VLAN, add PTCH+header + * If KCOM_NETIF_T_VLAN, add PTCH header */ pktdata = skb->data; - memcpy(&pktdata[0], priv->system_headers, priv->system_headers_size); + if (priv->system_headers_size + BKN_DNX_MODULE_HEADER_SIZE <= KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX) { + memcpy(&pktdata[0], priv->system_headers + BKN_DNX_MODULE_HEADER_SIZE, priv->system_headers_size); + } /* Set CPU channel */ - dcb[2] = ((priv->qnum & 0xff) << 24); + dcb[2] = ((priv->system_headers[0] & 0xff) << 24); break; case 29: dcb[2] = 0x81000000; @@ -6327,7 +6994,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) dcb[4] |= (priv->qnum & 0x3fff) << 8; break; case 36: - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta[0] = htonl(0x81000000); meta[1] = htonl(priv->port); meta[2] = htonl(0x00008000 | (priv->qnum & 0x3f) << 9); @@ -6339,7 +7006,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } break; case 38: - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta[0] = htonl(0x81000000); meta[1] = htonl(priv->port); meta[2] = htonl(0x00004000 | (priv->qnum & 0x3f) << 8); @@ -6357,20 +7024,21 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) * if KCOM_NETIF_T_VLAN, add MH+PTCH+header */ pktdata = skb->data; - memcpy(&pktdata[0], priv->system_headers, priv->system_headers_size); + if (priv->system_headers_size <= KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX) { + memcpy(&pktdata[0], priv->system_headers, priv->system_headers_size); + } } break; - case 40: - if (sinfo->cmic_type == 'x') { + case 41: + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta[0] = htonl(0x81000000); - meta[1] = htonl(priv->port | (priv->qnum & 0xc00) << 20); - meta[2] = htonl(0x00040000 | (priv->qnum & 0x3ff) << 8); + meta[1] = htonl((priv->port) << 4); + meta[2] = htonl(0x00400000 | (priv->qnum & 0x3fff) << 8); } else { dcb[2] = 0x81000000; - dcb[3] = priv->port; - dcb[3] |= (priv->qnum & 0xc00) << 20; - dcb[4] = 0x00040000; - dcb[4] |= (priv->qnum & 0x3ff) << 8; + dcb[3] = (priv->port) << 4; + dcb[4] = 0x00400000; + dcb[4] |= (priv->qnum & 0x3fff) << 8; } break; default: @@ -6412,7 +7080,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) DBG_SKB(("Packet padded to %d bytes after tx callback\n", pktlen)); } pktdata = skb->data; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta = (uint32_t *)pktdata; } } else { @@ -6477,7 +7145,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) return 0; } dcb[0] = desc->skb_dma; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[1] = DMA_TO_BUS_HI(desc->skb_dma >> 32); dcb[2] &= ~SOC_DCB_KNET_COUNT_MASK; dcb[2] |= pktlen; @@ -6493,7 +7161,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) bkn_dump_pkt(pktdata, pktlen, XGS_DMA_TX_CHAN); if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[2] |= 1 << 24 | 1 << 16; } else { dcb[1] |= 1 << 24 | 1 << 16; @@ -6687,9 +7355,22 @@ bkn_rx_rate_config(bkn_switch_info_t *sinfo) /* Calculate the minimum update frequency across all channels */ rxticks_per_sec = 1; for (chan = 0; chan < NUM_RX_CHAN; chan++) { + if (sinfo->rx[chan].rate_max == 0) { + /* + * Giving default value if rx_rate parameter is 0 to avoid dividing + * 0 in the following calculation. + */ + sinfo->rx[chan].rate_max = DEFAULT_RX_RATE; + } if (sinfo->rx[chan].burst_max == 0) { sinfo->rx[chan].burst_max = sinfo->rx[chan].rate_max / 10; } + if (sinfo->rx[chan].burst_max == 0) { + DBG_WARN(("Improper rx_rate %d and rx_burst %d parameter are " + "specified for chan %d\n", sinfo->rx[chan].rate_max, + sinfo->rx[chan].rate_max,chan)); + sinfo->rx[chan].burst_max = 1; + } rps = sinfo->rx[chan].rate_max / sinfo->rx[chan].burst_max; if (rxticks_per_sec < rps) { rxticks_per_sec = rps; @@ -6814,7 +7495,7 @@ static const struct net_device_ops bkn_netdev_ops = { .ndo_validate_addr = eth_validate_addr, .ndo_set_rx_mode = bkn_set_multicast_list, .ndo_set_mac_address = bkn_set_mac_address, - .ndo_do_ioctl = bkn_ioctl, + .NDO_IOCTL = bkn_ioctl, .ndo_tx_timeout = NULL, .ndo_change_mtu = bkn_change_mtu, #ifdef CONFIG_NET_POLL_CONTROLLER @@ -6873,6 +7554,7 @@ bkn_get_ts_info(struct net_device *dev, struct ethtool_ts_info *info) case 36: case 38: case 40: + case 41: case 37: info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE | SOF_TIMESTAMPING_TX_SOFTWARE | @@ -7003,16 +7685,17 @@ bkn_init_ndev(u8 *mac, char *name) if (name && *name) { strncpy(dev->name, name, IFNAMSIZ-1); } -#if defined(CONFIG_NET_NS) + DBG_VERB(("Created Ethernet device %s.\n", dev->name)); + bkn_dev_net_set(dev, current->nsproxy->net_ns); -#endif + /* Register the kernel Ethernet device */ if (register_netdev(dev)) { DBG_WARN(("Error registering Ethernet device.\n")); free_netdev(dev); return NULL; } - DBG_VERB(("Created Ethernet device %s.\n", dev->name)); + return dev; } @@ -7365,7 +8048,7 @@ bkn_seq_dma_show(struct seq_file *s, void *v) seq_printf(s, " [0x%08lx]--->\n", (unsigned long)dcb_chain->dcb_dma); for (cnt = 0; cnt < dcb_chain->dcb_cnt; cnt++) { dcb = &dcb_chain->dcb_mem[sinfo->dcb_wsize * cnt]; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { seq_printf(s, " DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt, dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); } else { @@ -7445,7 +8128,7 @@ bkn_seq_dma_show(struct seq_file *s, void *v) seq_printf(s, " [0x%08lx]--->\n", (unsigned long)dcb_chain->dcb_dma); for (cnt = 0; cnt < dcb_chain->dcb_cnt; cnt++) { dcb = &dcb_chain->dcb_mem[sinfo->dcb_wsize * cnt]; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { seq_printf(s, " DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt, dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); } else { @@ -7466,7 +8149,7 @@ bkn_seq_dma_show(struct seq_file *s, void *v) } } if (dcb) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { seq_printf(s, " DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", iter->idx, dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); } else { @@ -7615,7 +8298,7 @@ bkn_proc_debug_show(struct seq_file *m, void *v) sinfo->oamp_ports[1], sinfo->oamp_ports[2], sinfo->oamp_ports[3]); - seq_printf(m, " device_id: 0x%x\n", sinfo->device_id); + seq_printf(m, " device_id: 0x%x\n", sinfo->base_id); seq_printf(m, " pcie_status: %d\n", sinfo->pcie_link_status); unit++; } @@ -8165,7 +8848,7 @@ bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len) /* Handle for Continuous DMA mode */ if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize + 1; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { woffset += 1; } if ((dcb_chain->dcb_mem[woffset] & ((1 << 18) | (1 << 16))) != 0x50000) { @@ -8181,7 +8864,7 @@ bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len) /* Stitch this chain */ woffset = (dcb_chain_end->dcb_cnt - 1) * sinfo->dcb_wsize; dcb_chain_end->dcb_mem[woffset] = dcb_chain->dcb_dma; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_chain_end->dcb_mem[woffset + 1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32); } MEMORY_BARRIER; @@ -8220,7 +8903,7 @@ bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len) /* Handle for Continuous DMA mode */ if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize + 1; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { woffset += 1; } if ((dcb_chain->dcb_mem[woffset] & ((1 << 18) | (1 << 16))) != 0x50000) { @@ -8236,7 +8919,7 @@ bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len) /* Stitch this chain */ woffset = (dcb_chain_end->dcb_cnt - 1) * sinfo->dcb_wsize; dcb_chain_end->dcb_mem[woffset] = dcb_chain->dcb_dma; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_chain_end->dcb_mem[woffset + 1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32); } MEMORY_BARRIER; @@ -8284,7 +8967,10 @@ bkn_create_inst(uint32 inst_id) if ((_bkn_multi_inst == 0) || (evt->inst_id == INVALID_INSTANCE_ID)) { _bkn_multi_inst ++; evt_idx = i; - init_waitqueue_head(&evt->evt_wq); + /* avoid repeated initialization */ + if (!waitqueue_active(&evt->evt_wq)) { + init_waitqueue_head(&evt->evt_wq); + } evt->inst_id = inst_id; DBG_INST(("%s evt_idx %d inst_id 0x%x\n",__FUNCTION__, i, inst_id)); break; @@ -8389,7 +9075,16 @@ bkn_knet_version(kcom_msg_version_t *kmsg, int len) kmsg->version = KCOM_VERSION; kmsg->netif_max = KCOM_NETIF_MAX; kmsg->filter_max = KCOM_FILTER_MAX; + kmsg->module_reload = module_reload; + /* + * The module_reoad idicator set while module inserted. + * Unset the indicatore when SDK has checked KNET version to idicate + * the KNET module has been initialized by SDK. + */ + if (module_reload) { + module_reload = 0; + } return sizeof(kcom_msg_version_t); } @@ -8478,8 +9173,9 @@ bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len) return sizeof(kcom_msg_hdr_t); } - if ((kmsg->cmic_type == 'x' && kmsg->dcb_size < CMICX_DCB_SIZE_MIN) || - (kmsg->cmic_type != 'x' && kmsg->dcb_size < DCB_SIZE_MIN) || + if ((kmsg->cmic_type == 'r' && kmsg->dcb_size < CMICR_DCB_SIZE_MIN) || + (kmsg->cmic_type == 'x' && kmsg->dcb_size < CMICX_DCB_SIZE_MIN) || + ((kmsg->cmic_type != 'x' && kmsg->cmic_type != 'r') && kmsg->dcb_size < DCB_SIZE_MIN) || (kmsg->dcb_type != 39 && kmsg->cmic_type == 'x' && kmsg->pkt_hdr_size < CMICX_PKT_HDR_SIZE_MIN)) { kmsg->hdr.status = KCOM_E_PARAM; return sizeof(kcom_msg_hdr_t); @@ -8492,7 +9188,7 @@ bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len) sinfo->dcb_wsize = BYTES2WORDS(kmsg->dcb_size); sinfo->pkt_hdr_size = kmsg->pkt_hdr_size; sinfo->dma_hi = kmsg->dma_hi; - sinfo->rx_chans = sinfo->cmic_type == 'x' ? NUM_CMICX_RX_CHAN : NUM_CMICM_RX_CHAN; + sinfo->rx_chans = sinfo->cmic_type == 'r' ? NUM_CMICR_RX_CHAN : (sinfo->cmic_type == 'x' ? NUM_CMICX_RX_CHAN : NUM_CMICM_RX_CHAN); if (sinfo->rx_chans > NUM_RX_CHAN) { sinfo->rx_chans = NUM_RX_CHAN; } @@ -8510,8 +9206,8 @@ bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len) /* Ensure 32-bit PCI DMA is mapped properly on 64-bit platforms */ dev_type = kernel_bde->get_dev_type(sinfo->dev_no); - if (dev_type & BDE_PCI_DEV_TYPE && sinfo->cmic_type != 'x') { - if (dma_set_mask_and_coherent(&sinfo->pdev->dev, 0xffffffff)) { + if (dev_type & BDE_PCI_DEV_TYPE && (sinfo->cmic_type != 'x' && sinfo->cmic_type != 'r')) { + if (dma_set_mask(&sinfo->pdev->dev, DMA_BIT_MASK(32))) { cfg_api_unlock(sinfo, &flags); gprintk("No suitable DMA available for SKBs\n"); kmsg->hdr.status = KCOM_E_RESOURCE; @@ -8528,28 +9224,6 @@ bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len) } } - if (device_is_sand(sinfo)) { - int idx = 0; - /* Information to parser Dune system headers */ - sinfo->ftmh_lb_key_ext_size = kmsg->ftmh_lb_key_ext_size; - sinfo->ftmh_stacking_ext_size = kmsg->ftmh_stacking_ext_size; - sinfo->pph_base_size = kmsg->pph_base_size; - for (idx = 0; idx < 8; idx++) - { - sinfo->pph_lif_ext_size[idx] = kmsg->pph_lif_ext_size[idx]; - } - for (idx = 0; idx < 4; idx++) - { - sinfo->udh_length_type[idx] = kmsg->udh_length_type[idx]; - } - sinfo->udh_size = kmsg->udh_size; - sinfo->oamp_punt = kmsg->oamp_punted; - sinfo->no_skip_udh_check = kmsg->no_skip_udh_check; - sinfo->oam_dm_tod_exist = kmsg->oam_dm_tod_exist; - sinfo->system_headers_mode = kmsg->system_headers_mode; - sinfo->udh_enable = kmsg->udh_enable; - } - /* Ensure that we restart properly */ bkn_dma_abort(sinfo); bkn_clean_dcbs(sinfo); @@ -8582,7 +9256,6 @@ bkn_knet_hw_info(kcom_msg_hw_info_t *kmsg, int len) { bkn_switch_info_t *sinfo; unsigned long flags; - int idx = 0; kmsg->hdr.type = KCOM_MSG_TYPE_RSP; @@ -8602,6 +9275,27 @@ bkn_knet_hw_info(kcom_msg_hw_info_t *kmsg, int len) cfg_api_lock(sinfo, &flags); if (device_is_sand(sinfo)) { + int idx = 0; + + /* Information to parser Dune system headers */ + sinfo->ftmh_lb_key_ext_size = kmsg->ftmh_lb_key_ext_size; + sinfo->ftmh_stacking_ext_size = kmsg->ftmh_stacking_ext_size; + sinfo->pph_base_size = kmsg->pph_base_size; + for (idx = 0; idx < 8; idx++) + { + sinfo->pph_lif_ext_size[idx] = kmsg->pph_lif_ext_size[idx]; + } + for (idx = 0; idx < 4; idx++) + { + sinfo->udh_length_type[idx] = kmsg->udh_length_type[idx]; + } + sinfo->udh_size = kmsg->udh_size; + sinfo->oamp_punt = kmsg->oamp_punted; + sinfo->no_skip_udh_check = kmsg->no_skip_udh_check; + sinfo->oam_dm_tod_exist = kmsg->oam_dm_tod_exist; + sinfo->system_headers_mode = kmsg->system_headers_mode; + sinfo->udh_enable = kmsg->udh_enable; + if (kmsg->oamp_info.oamp_port_number > KCOM_HW_INFO_OAMP_PORT_MAX) { cfg_api_unlock(sinfo, &flags); @@ -8672,7 +9366,26 @@ bkn_knet_reprobe(kcom_msg_reprobe_t *kmsg, int len) return sizeof(kcom_msg_reprobe_t); } -static int +static void +bkn_knet_netif_from_priv(kcom_netif_t *netif, bkn_priv_t *priv) +{ + memcpy(netif->macaddr, priv->dev->dev_addr, 6); + memcpy(netif->name, priv->dev->name, KCOM_NETIF_NAME_MAX - 1); + netif->vlan = priv->vlan; + netif->type = priv->type; + netif->id = priv->id; + netif->flags = priv->flags; + netif->cb_user_data = priv->cb_user_data; + + if (priv->port < 0) { + netif->port = 0; + } else { + netif->port = priv->port; + } + netif->qnum = priv->qnum; +} + +static int bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len) { bkn_switch_info_t *sinfo; @@ -8680,8 +9393,12 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len) struct list_head *list; bkn_priv_t *priv, *lpriv; unsigned long flags; - int found, id; + int found; uint8_t *ma; + uint16_t id; + int realloc; + int rv = KCOM_E_NONE; + bkn_netif_cb_t *netif_create_cb; kmsg->hdr.type = KCOM_MSG_TYPE_RSP; @@ -8726,7 +9443,7 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len) if (device_is_sand(sinfo)) { int idx = 0; priv->system_headers_size = kmsg->netif.system_headers_size; - for (idx = 0; idx < priv->system_headers_size; idx++) + for (idx = 0; idx < KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX; idx++) { priv->system_headers[idx] = kmsg->netif.system_headers[idx]; } @@ -8754,42 +9471,52 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len) DBG_RCPU(("RCPU auto-enabled\n")); } + id = kmsg->netif.id; /* Prevent (incorrect) compiler warning */ lpriv = NULL; + realloc = 0; spin_lock_irqsave(&sinfo->lock, flags); - /* - * We insert network interfaces sorted by ID. - * In case an interface is destroyed, we reuse the ID - * the next time an interface is created. - */ - found = 0; - id = 1; - list_for_each(list, &sinfo->ndev_list) { - lpriv = (bkn_priv_t *)list; - if (id < lpriv->id) { - found = 1; - break; + if (id > KCOM_NETIF_MAX) { + DBG_NDEV(("ID %d exceeds maximum network interface ID (max: %d)\n", + id, KCOM_NETIF_MAX)); + rv = KCOM_E_PARAM; + } else if (id == 0) { + for (id = 1; id < sinfo->ndev_max; id++) { + if (!sinfo->ndevs[id]) { + break; + } + } + if (id >= sinfo->ndev_max) { + realloc = 1; } - id = lpriv->id + 1; - } - priv->id = id; - if (found) { - /* Replace previously removed interface */ - list_add_tail(&priv->list, &lpriv->list); } else { - /* No holes - add to end of list */ - list_add_tail(&priv->list, &sinfo->ndev_list); + if (id >= sinfo->ndev_max) { + realloc = 1; + } else { + if (sinfo->ndevs[id]) { + DBG_NDEV(("ID %d is already in use\n", id)); + rv = KCOM_E_RESOURCE; + } + } } - if (id < sinfo->ndev_max) { - DBG_NDEV(("Add netif ID %d to table\n", id)); - sinfo->ndevs[id] = dev; - } else { - int ndev_max = sinfo->ndev_max + NDEVS_CHUNK; - int size = ndev_max * sizeof(struct net_device *); - void *ndevs = kmalloc(size, GFP_ATOMIC); + if (realloc) { + int ndev_max; + int size; + void *ndevs; + + ndev_max = sinfo->ndev_max; + do { + ndev_max += NDEVS_CHUNK; + } while ((id + 1) > ndev_max); + + if (ndev_max >= KCOM_NETIF_MAX) { + ndev_max = KCOM_NETIF_MAX + 1; + } + size = ndev_max * sizeof(struct net_device *); + ndevs = kmalloc(size, GFP_ATOMIC); if (ndevs != NULL) { DBG_NDEV(("Reallocate netif table for ID %d\n", id)); memset(ndevs, 0, size); @@ -8800,10 +9527,38 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len) } sinfo->ndevs = ndevs; sinfo->ndev_max = ndev_max; - sinfo->ndevs[id] = dev; + } else { + rv = KCOM_E_RESOURCE; } } + if (rv != KCOM_E_NONE) { + spin_unlock_irqrestore(&sinfo->lock, flags); + unregister_netdev(dev); + free_netdev(dev); + kmsg->hdr.status = rv; + return sizeof(kcom_msg_hdr_t); + } + + priv->id = id; + DBG_NDEV(("Add netif ID %d to table\n", id)); + sinfo->ndevs[id] = dev; + found = 0; + list_for_each(list, &sinfo->ndev_list) { + lpriv = (bkn_priv_t *)list; + if (id < lpriv->id) { + found = 1; + break; + } + } + + if (found) { + /* Replace previously removed interface */ + list_add_tail(&priv->list, &lpriv->list); + } else { + /* No holes - add to end of list */ + list_add_tail(&priv->list, &sinfo->ndev_list); + } DBG_VERB(("Assigned ID %d to Ethernet device %s\n", priv->id, dev->name)); @@ -8812,13 +9567,13 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len) memcpy(kmsg->netif.macaddr, dev->dev_addr, 6); memcpy(kmsg->netif.name, dev->name, KCOM_NETIF_NAME_MAX - 1); - if (knet_netif_create_cb != NULL) { - int retv = knet_netif_create_cb(kmsg->hdr.unit, &(kmsg->netif), dev); - if (retv) { - gprintk("Warning: knet_netif_create_cb() returned %d for netif '%s'\n", retv, dev->name); + list_for_each(list, &netif_create_cb_list) { + netif_create_cb = list_entry(list, bkn_netif_cb_t, list); + if (netif_create_cb->cb(dev, sinfo->dev_no, &kmsg->netif) != 0) { + DBG_WARN(("Network interface create callback failed for '%s'\n", + dev->name)); } } - spin_unlock_irqrestore(&sinfo->lock, flags); if (device_is_sand(sinfo)) { @@ -8841,6 +9596,8 @@ bkn_knet_netif_destroy(kcom_msg_netif_destroy_t *kmsg, int len) struct list_head *list; unsigned long flags; int found; + bkn_netif_cb_t *netif_destroy_cb; + kcom_netif_t kcom_netif; kmsg->hdr.type = KCOM_MSG_TYPE_RSP; @@ -8867,20 +9624,6 @@ bkn_knet_netif_destroy(kcom_msg_netif_destroy_t *kmsg, int len) return sizeof(kcom_msg_hdr_t); } - if (!device_is_sand(sinfo)) { - if (knet_netif_destroy_cb != NULL) { - int retv; - kcom_netif_t netif; - memset(&netif, 0, sizeof(kcom_netif_t)); - netif.id = priv->id; - retv = knet_netif_destroy_cb(kmsg->hdr.unit, &netif, priv->dev); - if (retv) { - gprintk("warning: knet_netif_destroy_cb() returned %d for netif '%s'\n", - retv, priv->dev? priv->dev->name : "unknown"); - } - } - } - list_del(&priv->list); if (priv->id < sinfo->ndev_max) { @@ -8890,8 +9633,22 @@ bkn_knet_netif_destroy(kcom_msg_netif_destroy_t *kmsg, int len) cfg_api_unlock(sinfo, &flags); dev = priv->dev; + + if (!list_empty(&netif_destroy_cb_list)) { + memset(&kcom_netif, 0, sizeof(kcom_netif)); + bkn_knet_netif_from_priv(&kcom_netif, priv); + list_for_each(list, &netif_destroy_cb_list) { + netif_destroy_cb = list_entry(list, bkn_netif_cb_t, list); + if (netif_destroy_cb->cb(dev, sinfo->dev_no, &kcom_netif) != 0) { + DBG_WARN(("Network interface destroy callback failed for '%s'\n", + dev->name)); + } + } + } + DBG_VERB(("Removing virtual Ethernet device %s (%d).\n", dev->name, priv->id)); + unregister_netdev(dev); free_netdev(dev); @@ -8960,20 +9717,7 @@ bkn_knet_netif_get(kcom_msg_netif_get_t *kmsg, int len) return sizeof(kcom_msg_hdr_t); } - memcpy(kmsg->netif.macaddr, priv->dev->dev_addr, 6); - memcpy(kmsg->netif.name, priv->dev->name, KCOM_NETIF_NAME_MAX - 1); - kmsg->netif.vlan = priv->vlan; - kmsg->netif.type = priv->type; - kmsg->netif.id = priv->id; - kmsg->netif.flags = priv->flags; - kmsg->netif.cb_user_data = priv->cb_user_data; - - if (priv->port < 0) { - kmsg->netif.port = 0; - } else { - kmsg->netif.port = priv->port; - } - kmsg->netif.qnum = priv->qnum; + bkn_knet_netif_from_priv(&kmsg->netif, priv); spin_unlock_irqrestore(&sinfo->lock, flags); @@ -8986,6 +9730,7 @@ bkn_knet_filter_create(kcom_msg_filter_create_t *kmsg, int len) bkn_switch_info_t *sinfo; struct list_head *list; bkn_filter_t *filter, *lfilter; + bkn_filter_cb_t *filter_cb; unsigned long flags; int found, id; int oob_offset_max; @@ -9008,7 +9753,7 @@ bkn_knet_filter_create(kcom_msg_filter_create_t *kmsg, int len) if (device_is_sand(sinfo)) { oob_offset_max = BKN_SAND_SCRATCH_DATA_SIZE * 4; - } else if (sinfo->cmic_type == 'x') { + } else if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { oob_offset_max = sinfo->pkt_hdr_size; } else { oob_offset_max = sinfo->dcb_wsize * 4; @@ -9042,21 +9787,34 @@ bkn_knet_filter_create(kcom_msg_filter_create_t *kmsg, int len) } } } + + spin_unlock_irqrestore(&sinfo->lock, flags); + if (found) { /* Too many filters */ - spin_unlock_irqrestore(&sinfo->lock, flags); kmsg->hdr.status = KCOM_E_RESOURCE; return sizeof(kcom_msg_hdr_t); } - filter = kmalloc(sizeof(*filter), GFP_ATOMIC); + filter = kmalloc(sizeof(*filter), GFP_KERNEL); if (filter == NULL) { - spin_unlock_irqrestore(&sinfo->lock, flags); kmsg->hdr.status = KCOM_E_PARAM; return sizeof(kcom_msg_hdr_t); } memset(filter, 0, sizeof(*filter)); memcpy(&filter->kf, &kmsg->filter, sizeof(filter->kf)); filter->kf.id = id; + /* Check for filter-specific callback */ + if (filter->kf.dest_type == KCOM_DEST_T_CB && filter->kf.desc[0] != '\0') { + list_for_each(list, &filter_cb_list) { + filter_cb = list_entry(list, bkn_filter_cb_t, list); + if (strcmp(filter->kf.desc, filter_cb->desc) == 0) { + filter->cb = filter_cb->cb; + break; + } + } + } + + spin_lock_irqsave(&sinfo->lock, flags); /* Add according to priority */ found = 0; @@ -9515,6 +10273,8 @@ _cleanup(void) bkn_priv_t *priv; bkn_switch_info_t *sinfo; unsigned long flags; + bkn_netif_cb_t *netif_cb; + bkn_filter_cb_t *filter_cb; /* Inidicate that we are shutting down */ module_initialized = 0; @@ -9587,6 +10347,26 @@ _cleanup(void) bkn_destroy_sinfo(sinfo); } + /* Destroy any callback list which is not unregistered */ + while (!list_empty(&netif_create_cb_list)) { + netif_cb = list_entry(netif_create_cb_list.next, + bkn_netif_cb_t, list); + list_del(&netif_cb->list); + kfree(netif_cb); + } + while (!list_empty(&netif_destroy_cb_list)) { + netif_cb = list_entry(netif_destroy_cb_list.next, + bkn_netif_cb_t, list); + list_del(&netif_cb->list); + kfree(netif_cb); + } + while (!list_empty(&filter_cb_list)) { + filter_cb = list_entry(filter_cb_list.next, + bkn_filter_cb_t, list); + list_del(&filter_cb->list); + kfree(filter_cb); + } + return 0; } @@ -9665,7 +10445,9 @@ bkn_knet_dev_init(int d) /* Initialize default RCPU signature */ if ((bde_dev = kernel_bde->get_dev(d)) != NULL) { sinfo->rcpu_sig = bde_dev->device & ~0xf; - sinfo->device_id= bde_dev->device & ~0xf; + sinfo->base_id = bde_dev->device & ~0xf; + sinfo->dev_id = bde_dev->device; + sinfo->rev_id = bde_dev->rev; } /* Check for override */ if (rcpu_signature) { @@ -9688,7 +10470,7 @@ bkn_knet_dev_init(int d) } if (use_napi) { - netif_napi_add(dev, &sinfo->napi, bkn_poll); + bkn_netif_napi_add(dev, &sinfo->napi, bkn_poll, napi_weight); } return 0; } @@ -9751,14 +10533,16 @@ _init(void) /* Initialize event queue */ for (idx = 0; idx < LINUX_BDE_MAX_DEVICES; idx++) { - memset(&_bkn_evt[idx], 0, sizeof(bkn_evt_resource_t)); - _bkn_evt[idx].inst_id = INVALID_INSTANCE_ID; + evt = &_bkn_evt[idx]; + memset(evt, 0, sizeof(bkn_evt_resource_t)); + evt->inst_id = INVALID_INSTANCE_ID; + init_waitqueue_head(&evt->evt_wq); } - evt = &_bkn_evt[0]; - init_waitqueue_head(&evt->evt_wq); module_initialized = 1; + module_reload = 1; + return 0; } @@ -9826,14 +10610,14 @@ _ioctl(unsigned int cmd, unsigned long arg) } static gmodule_t _gmodule = { - name: MODULE_NAME, - major: MODULE_MAJOR, - init: _init, - cleanup: _cleanup, - pprint: _pprint, - ioctl: _ioctl, - open: NULL, - close: NULL, + .name = MODULE_NAME, + .major = MODULE_MAJOR, + .init = _init, + .cleanup = _cleanup, + .pprint = _pprint, + .ioctl = _ioctl, + .open = NULL, + .close = NULL, }; gmodule_t * @@ -9844,139 +10628,269 @@ gmodule_get(void) } /* - * Get DCB type and other HW info + * Call-back interfaces for other Linux kernel drivers. + * + * The Rx call-back allows an external module to modify SKB contents + * before it is handed off to the Linux network stack. + * + * The Tx call-back allows an external module to modify SKB contents + * before it is injected inot the switch. + * + * The HW timestamp callbacks invoke an external module to enable, disable + * HW timestamp on a specific port which is indicated while the netif is + * created through KNET API. KNET can also get device-specific SOBMH and + * timestamp for a Tx PTP packet through these callbacks. */ + int -bkn_hw_info_get(int unit, knet_hw_info_t *hw_info) +bkn_rx_skb_cb_register(knet_skb_cb_f rx_cb) { - bkn_switch_info_t *sinfo; - sinfo = bkn_sinfo_from_unit(unit); - if (sinfo == NULL) { - gprintk("Warning: unknown unit: %d\n", unit); - return (-1); + if (knet_rx_cb != NULL) { + return -1; } - - hw_info->cmic_type = sinfo->cmic_type; - hw_info->dcb_type = sinfo->dcb_type; - hw_info->dcb_size = WORDS2BYTES(sinfo->dcb_wsize); - hw_info->pkt_hdr_size = sinfo->pkt_hdr_size; - hw_info->cdma_channels = sinfo->cdma_channels; - - return (0); + knet_rx_cb = rx_cb; + return 0; } int -bkn_netif_create_cb_register(knet_netif_cb_f netif_cb) +bkn_rx_skb_cb_unregister(knet_skb_cb_f rx_cb) { - if (knet_netif_create_cb != NULL) { + if (rx_cb != NULL && knet_rx_cb != rx_cb) { return -1; } - knet_netif_create_cb = netif_cb; + knet_rx_cb = NULL; return 0; } int -bkn_netif_create_cb_unregister(knet_netif_cb_f netif_cb) +bkn_tx_skb_cb_register(knet_skb_cb_f tx_cb) { - if (netif_cb != NULL && knet_netif_create_cb != netif_cb) { + if (knet_tx_cb != NULL) { return -1; } - knet_netif_create_cb = NULL; + knet_tx_cb = tx_cb; return 0; } int -bkn_netif_destroy_cb_register(knet_netif_cb_f netif_cb) +bkn_tx_skb_cb_unregister(knet_skb_cb_f tx_cb) { - if (knet_netif_destroy_cb != NULL) { + if (tx_cb != NULL && knet_tx_cb != tx_cb) { return -1; } - knet_netif_destroy_cb = netif_cb; + knet_tx_cb = NULL; return 0; } int -bkn_netif_destroy_cb_unregister(knet_netif_cb_f netif_cb) +bkn_netif_create_cb_register(knet_netif_cb_f netif_cb) { - if (netif_cb != NULL && knet_netif_destroy_cb != netif_cb) { + struct list_head *list; + bkn_netif_cb_t *netif_create_cb; + + if (netif_cb == NULL) { + return -1; + } + list_for_each(list, &netif_create_cb_list) { + netif_create_cb = list_entry(list, bkn_netif_cb_t, list); + if (netif_create_cb->cb == netif_cb) { + return -1; + } + } + netif_create_cb = kmalloc(sizeof(*netif_create_cb), GFP_KERNEL); + if (netif_create_cb == NULL) { return -1; } - knet_netif_destroy_cb = NULL; + netif_create_cb->cb = netif_cb; + list_add_tail(&netif_create_cb->list, &netif_create_cb_list); return 0; } -/* - * Call-back interfaces for other Linux kernel drivers. - * - * The Rx call-back allows an external module to modify SKB contents - * before it is handed off to the Linux network stack. - * - * The Tx call-back allows an external module to modify SKB contents - * before it is injected inot the switch. - * - * The HW timestamp callbacks invoke an external module to enable, disable - * HW timestamp on a specific port which is indicated while the netif is - * created through KNET API. KNET can also get device-specific SOBMH and - * timestamp for a Tx PTP packet through these callbacks. - */ - int -bkn_rx_skb_cb_register(knet_skb_cb_f rx_cb) +bkn_netif_create_cb_unregister(knet_netif_cb_f netif_cb) { - if (knet_rx_cb != NULL) { + struct list_head *list, *list_next; + bkn_netif_cb_t *netif_create_cb; + int found = 0; + + if (netif_cb == NULL) { return -1; } - knet_rx_cb = rx_cb; + list_for_each_safe(list, list_next, &netif_create_cb_list) { + netif_create_cb = list_entry(list, bkn_netif_cb_t, list); + if (netif_create_cb->cb == netif_cb) { + found = 1; + list_del(list); + break; + } + } + if (!found) { + return -1; + } + kfree(netif_create_cb); return 0; } int -bkn_rx_skb_cb_unregister(knet_skb_cb_f rx_cb) +bkn_netif_destroy_cb_register(knet_netif_cb_f netif_cb) { - if (rx_cb != NULL && knet_rx_cb != rx_cb) { + struct list_head *list; + bkn_netif_cb_t *netif_destroy_cb; + + if (netif_cb == NULL) { return -1; } - knet_rx_cb = NULL; + list_for_each(list, &netif_destroy_cb_list) { + netif_destroy_cb = list_entry(list, bkn_netif_cb_t, list); + if (netif_destroy_cb->cb == netif_cb) { + return -1; + } + } + netif_destroy_cb = kmalloc(sizeof(*netif_destroy_cb), GFP_KERNEL); + if (netif_destroy_cb == NULL) { + return -1; + } + netif_destroy_cb->cb = netif_cb; + list_add_tail(&netif_destroy_cb->list, &netif_destroy_cb_list); return 0; } int -bkn_tx_skb_cb_register(knet_skb_cb_f tx_cb) +bkn_netif_destroy_cb_unregister(knet_netif_cb_f netif_cb) { - if (knet_tx_cb != NULL) { + struct list_head *list, *list_next; + bkn_netif_cb_t *netif_destroy_cb; + int found = 0; + + if (netif_cb == NULL) { return -1; } - knet_tx_cb = tx_cb; + list_for_each_safe(list, list_next, &netif_destroy_cb_list) { + netif_destroy_cb = list_entry(list, bkn_netif_cb_t, list); + if (netif_destroy_cb->cb == netif_cb) { + found = 1; + list_del(list); + break; + } + } + if (!found) { + return -1; + } + kfree(netif_destroy_cb); return 0; } int -bkn_tx_skb_cb_unregister(knet_skb_cb_f tx_cb) +bkn_filter_cb_register(knet_filter_cb_f filter_cb) { - if (tx_cb != NULL && knet_tx_cb != tx_cb) { + if (knet_filter_cb != NULL) { return -1; } - knet_tx_cb = NULL; + knet_filter_cb = filter_cb; return 0; } int -bkn_filter_cb_register(knet_filter_cb_f filter_cb) +bkn_filter_cb_register_by_name(knet_filter_cb_f filter_cb, char *filter_name) { - if (knet_filter_cb != NULL) { + struct list_head *list, *list2; + bkn_switch_info_t *sinfo; + bkn_filter_t *filter; + bkn_filter_cb_t *fcb; + unsigned long flags; + + if (filter_cb == NULL || filter_name == NULL) { return -1; } - knet_filter_cb = filter_cb; + if (filter_name[0] == '\0' || strlen(filter_name) >= KCOM_FILTER_DESC_MAX) { + return -1; + } + + list_for_each(list, &filter_cb_list) { + fcb = list_entry(list, bkn_filter_cb_t, list); + if (strcmp(fcb->desc, filter_name) == 0) { + return -1; + } + } + fcb = kmalloc(sizeof(*fcb), GFP_KERNEL); + if (fcb == NULL) { + return -1; + } + fcb->cb = filter_cb; + strcpy(fcb->desc, filter_name); + list_add_tail(&fcb->list, &filter_cb_list); + + /* Check if any existing filter matches the registered name */ + list_for_each(list, &_sinfo_list) { + sinfo = list_entry(list, bkn_switch_info_t, list); + spin_lock_irqsave(&sinfo->lock, flags); + + list_for_each(list2, &sinfo->rxpf_list) { + filter = list_entry(list2, bkn_filter_t, list); + if (filter->kf.dest_type != KCOM_DEST_T_CB) { + continue; + } + if (filter->kf.desc[0] != '\0') { + if (strcmp(filter->kf.desc, filter_name) == 0) { + filter->cb = filter_cb; + } + } + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + } return 0; } int bkn_filter_cb_unregister(knet_filter_cb_f filter_cb) { - if (filter_cb != NULL && knet_filter_cb != filter_cb) { + struct list_head *list, *list2; + bkn_switch_info_t *sinfo; + bkn_filter_t *filter; + bkn_filter_cb_t *fcb; + unsigned long flags; + int found = 0; + + /* Check if the any existing filter-specific callback matches */ + if (filter_cb) { + /* Remove from list */ + list_for_each_safe(list, list2, &filter_cb_list) { + fcb = list_entry(list, bkn_filter_cb_t, list); + if (fcb->cb == filter_cb) { + found = 1; + list_del(&fcb->list); + kfree(fcb); + break; + } + } + /* Check if the callback is set to filters */ + if (found) { + list_for_each(list, &_sinfo_list) { + sinfo = list_entry(list, bkn_switch_info_t, list); + spin_lock_irqsave(&sinfo->lock, flags); + + list_for_each(list2, &sinfo->rxpf_list) { + filter = list_entry(list2, bkn_filter_t, list); + if (filter->kf.dest_type != KCOM_DEST_T_CB) { + continue; + } + if (filter->cb == filter_cb) { + filter->cb = NULL; + } + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + } + } + } + + if (!found && filter_cb != NULL && knet_filter_cb != filter_cb) { return -1; } - knet_filter_cb = NULL; + if (!found || filter_cb == knet_filter_cb) { + knet_filter_cb = NULL; + } return 0; } @@ -10149,11 +11063,61 @@ bkn_hw_tstamp_ioctl_cmd_cb_unregister(knet_hw_tstamp_ioctl_cmd_cb_f hw_tstamp_io return 0; } +int +bkn_hw_tstamp_ptp_transport_get_cb_register(knet_hw_tstamp_ptp_transport_get_cb_f hw_tstamp_ptp_transport_get_cb) +{ + if (knet_hw_tstamp_ptp_transport_get_cb != NULL) { + return -1; + } + knet_hw_tstamp_ptp_transport_get_cb = hw_tstamp_ptp_transport_get_cb; + return 0; +} + +int +bkn_hw_tstamp_ptp_transport_get_cb_unregister(knet_hw_tstamp_ptp_transport_get_cb_f hw_tstamp_ptp_transport_get_cb) +{ + if (knet_hw_tstamp_ptp_transport_get_cb == NULL || + knet_hw_tstamp_ptp_transport_get_cb != hw_tstamp_ptp_transport_get_cb) { + return -1; + } + knet_hw_tstamp_ptp_transport_get_cb = NULL; + return 0; +} + +/* + * Get HW device info + */ +int +bkn_hw_device_get(int dev_no, uint16_t *dev_id, uint8_t *rev_id) +{ + bkn_switch_info_t *sinfo; + + sinfo = bkn_sinfo_from_unit(dev_no); + if (sinfo == NULL) { + DBG_WARN(("Warning: unknown unit: %d\n", dev_no)); + return -1; + } + + if (dev_id) { + *dev_id = sinfo->dev_id; + } + if (rev_id) { + *rev_id = sinfo->rev_id; + } + + return 0; +} + LKM_EXPORT_SYM(bkn_rx_skb_cb_register); LKM_EXPORT_SYM(bkn_rx_skb_cb_unregister); LKM_EXPORT_SYM(bkn_tx_skb_cb_register); LKM_EXPORT_SYM(bkn_tx_skb_cb_unregister); +LKM_EXPORT_SYM(bkn_netif_create_cb_register); +LKM_EXPORT_SYM(bkn_netif_create_cb_unregister); +LKM_EXPORT_SYM(bkn_netif_destroy_cb_register); +LKM_EXPORT_SYM(bkn_netif_destroy_cb_unregister); LKM_EXPORT_SYM(bkn_filter_cb_register); +LKM_EXPORT_SYM(bkn_filter_cb_register_by_name); LKM_EXPORT_SYM(bkn_filter_cb_unregister); LKM_EXPORT_SYM(bkn_hw_tstamp_enable_cb_register); LKM_EXPORT_SYM(bkn_hw_tstamp_enable_cb_unregister); @@ -10169,10 +11133,8 @@ LKM_EXPORT_SYM(bkn_hw_tstamp_rx_time_upscale_cb_register); LKM_EXPORT_SYM(bkn_hw_tstamp_rx_time_upscale_cb_unregister); LKM_EXPORT_SYM(bkn_hw_tstamp_rx_pre_process_cb_register); LKM_EXPORT_SYM(bkn_hw_tstamp_rx_pre_process_cb_unregister); -LKM_EXPORT_SYM(bkn_hw_info_get); -LKM_EXPORT_SYM(bkn_netif_create_cb_register); -LKM_EXPORT_SYM(bkn_netif_create_cb_unregister); -LKM_EXPORT_SYM(bkn_netif_destroy_cb_register); -LKM_EXPORT_SYM(bkn_netif_destroy_cb_unregister); LKM_EXPORT_SYM(bkn_hw_tstamp_ioctl_cmd_cb_register); LKM_EXPORT_SYM(bkn_hw_tstamp_ioctl_cmd_cb_unregister); +LKM_EXPORT_SYM(bkn_hw_tstamp_ptp_transport_get_cb_register); +LKM_EXPORT_SYM(bkn_hw_tstamp_ptp_transport_get_cb_unregister); +LKM_EXPORT_SYM(bkn_hw_device_get); diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c new file mode 100644 index 000000000000..2b31663df76d --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c @@ -0,0 +1,3923 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ + +/* + * This module implements a Linux PTP Clock driver for Broadcom + * XGS switch devices. + * + * For a list of supported module parameters, please see below. + * debug: Debug level (default 0) + * network_transport : Transport Type (default 0 - Raw) + * base_dev_name: Base device name (default ptp0, ptp1, etc.) + * + * - All the data structures and functions work on the physical port. + * For array indexing purposes, we use (phy_port - 1). + */ + +#include /* Must be included first */ +/* Module Information */ +#define MODULE_MAJOR 125 +#define MODULE_NAME "linux-bcm-ptp-clock" + +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("PTP Clock Driver for Broadcom XGS/DNX Switch"); +MODULE_LICENSE("GPL"); + +#if LINUX_VERSION_CODE > KERNEL_VERSION(3,17,0) +#include +#include +#include +#include +#include +#include +#include +#include + + +#include +#include +#include +#include + +/* Configuration Parameters */ +static int debug; +LKM_MOD_PARAM(debug, "i", int, 0); +MODULE_PARM_DESC(debug, + "Debug level (default 0)"); + +static int pci_cos; + +static int network_transport; +LKM_MOD_PARAM(network_transport, "i", int, 0); +MODULE_PARM_DESC(network_transport, + "Transport Type (default - Detect from packet)"); + +static char *base_dev_name = "ptp0"; +LKM_MOD_PARAM(base_dev_name, "s", charp, 0); +MODULE_PARM_DESC(base_dev_name, + "Base device name (default ptp0, ptp1, etc.)"); + +static int fw_core; +LKM_MOD_PARAM(fw_core, "i", int, 0); +MODULE_PARM_DESC(fw_core, + "Firmware core (default 0)"); + +static int vnptp_l2hdr_vlan_prio; +LKM_MOD_PARAM(vnptp_l2hdr_vlan_prio, "i", int, 0); +MODULE_PARM_DESC(vnptp_l2hdr_vlan_prio, + "L2 Hdr Vlan priority"); + +static int phc_update_intv_msec = 1000; +LKM_MOD_PARAM(phc_update_intv_msec, "i", int, 0); +MODULE_PARM_DESC(phc_update_intv_msec, + "PHC update interval in msec (default 1000)"); + +/* Debug levels */ +#define DBG_LVL_VERB 0x1 +#define DBG_LVL_WARN 0x2 +#define DBG_LVL_TXTS 0x4 +#define DBG_LVL_CMDS 0x8 +#define DBG_LVL_TX 0x10 +#define DBG_LVL_RX 0x20 +#define DBG_LVL_TX_DUMP 0x40 +#define DBG_LVL_RX_DUMP 0x80 + +#define DBG_VERB(_s) do { if (debug & DBG_LVL_VERB) gprintk _s; } while (0) +#define DBG_WARN(_s) do { if (debug & DBG_LVL_WARN) gprintk _s; } while (0) +#define DBG_TXTS(_s) do { if (debug & DBG_LVL_TXTS) gprintk _s; } while (0) +#define DBG_CMDS(_s) do { if (debug & DBG_LVL_CMDS) gprintk _s; } while (0) +#define DBG_TX(_s) do { if (debug & DBG_LVL_TX) gprintk _s; } while (0) +#define DBG_RX(_s) do { if (debug & DBG_LVL_RX) gprintk _s; } while (0) +#define DBG_TX_DUMP(_s) do { if (debug & DBG_LVL_TX_DUMP) gprintk _s; } while (0) +#define DBG_RX_DUMP(_s) do { if (debug & DBG_LVL_RX_DUMP) gprintk _s; } while (0) +#define DBG_ERR(_s) do { if (1) gprintk _s; } while (0) + + +#ifdef LINUX_BDE_DMA_DEVICE_SUPPORT +#define DMA_DEV device +#define DMA_ALLOC_COHERENT(d,s,h) dma_alloc_coherent(d,s,h,GFP_ATOMIC|GFP_DMA32) +#define DMA_FREE_COHERENT(d,s,a,h) dma_free_coherent(d,s,a,h) +#else +#define DMA_DEV pci_dev +#define DMA_ALLOC_COHERENT(d,s,h) pci_alloc_consistent(d,s,h) +#define DMA_FREE_COHERENT(d,s,a,h) pci_free_consistent(d,s,a,h) +#endif + +/* Type length in bytes */ +#define BKSYNC_PACKLEN_U8 1 +#define BKSYNC_PACKLEN_U16 2 +#define BKSYNC_PACKLEN_U24 3 +#define BKSYNC_PACKLEN_U32 4 + +#define BKSYNC_UNPACK_U8(_buf, _var) \ + _var = *_buf++ + +#define BKSYNC_UNPACK_U16(_buf, _var) \ + do { \ + (_var) = (((_buf)[0] << 8) | \ + (_buf)[1]); \ + (_buf) += BKSYNC_PACKLEN_U16; \ + } while (0) + +#define BKSYNC_UNPACK_U24(_buf, _var) \ + do { \ + (_var) = (((_buf)[0] << 16) | \ + ((_buf)[1] << 8) | \ + (_buf)[2]); \ + (_buf) += BKSYNC_PACKLEN_U24; \ + } while (0) + +#define BKSYNC_UNPACK_U32(_buf, _var) \ + do { \ + (_var) = (((_buf)[0] << 24) | \ + ((_buf)[1] << 16) | \ + ((_buf)[2] << 8) | \ + (_buf)[3]); \ + (_buf) += BKSYNC_PACKLEN_U32; \ + } while (0) + + +#define CMICX_DEV_TYPE ((ptp_priv->dcb_type == 38) || \ + (ptp_priv->dcb_type == 36) || \ + (ptp_priv->dcb_type == 39)) + +/* Arad Series of DNX Devices */ +#define DEVICE_IS_DPP (ptp_priv->dcb_type == 28) + +/* JR2 Series of DNX Devices */ +#define DEVICE_IS_DNX (ptp_priv->dcb_type == 39) + +/* CMIC MCS-0 SCHAN Messaging registers */ +/* Core0:CMC1 Core1:CMC2 */ +#define CMIC_CMC_BASE \ + (CMICX_DEV_TYPE ? (fw_core ? 0x10400 : 0x10300) : \ + (fw_core ? 0x33000 : 0x32000)) + +#define CMIC_CMC_SCHAN_MESSAGE_10r(BASE) (BASE + 0x00000034) +#define CMIC_CMC_SCHAN_MESSAGE_11r(BASE) (BASE + 0x00000038) +#define CMIC_CMC_SCHAN_MESSAGE_12r(BASE) (BASE + 0x0000003c) +#define CMIC_CMC_SCHAN_MESSAGE_13r(BASE) (BASE + 0x00000040) +#define CMIC_CMC_SCHAN_MESSAGE_14r(BASE) (BASE + 0x00000044) +#define CMIC_CMC_SCHAN_MESSAGE_15r(BASE) (BASE + 0x00000048) +#define CMIC_CMC_SCHAN_MESSAGE_16r(BASE) (BASE + 0x0000004c) +#define CMIC_CMC_SCHAN_MESSAGE_17r(BASE) (BASE + 0x00000050) +#define CMIC_CMC_SCHAN_MESSAGE_18r(BASE) (BASE + 0x00000054) +#define CMIC_CMC_SCHAN_MESSAGE_19r(BASE) (BASE + 0x00000058) +#define CMIC_CMC_SCHAN_MESSAGE_20r(BASE) (BASE + 0x0000005c) +#define CMIC_CMC_SCHAN_MESSAGE_21r(BASE) (BASE + 0x00000060) + +u32 hostcmd_regs[5] = { 0 }; + +#define BCMKSYNC_NUM_PORTS 128 /* NUM_PORTS where 2-step is supported. */ +#define BCMKSYNC_MAX_NUM_PORTS 256 /* Max ever NUM_PORTS in the system */ +#define BCMKSYNC_MAX_MTP_IDX 8 /* Max number of mtps in the system */ + +#define BKN_DNX_PTCH_2_SIZE 2 /* PTCH_2 */ +#define BKN_DNX_ITMH_SIZE 5 /* ITMH */ + +/* Service request commands to Firmware. */ +enum { + BKSYNC_DONE = (0x0), + BKSYNC_INIT = (0x1), + BKSYNC_DEINIT = (0x2), + BKSYNC_GETTIME = (0x3), + BKSYNC_SETTIME = (0x4), + BKSYNC_FREQCOR = (0x5), + BKSYNC_PBM_UPDATE = (0x6), + BKSYNC_ADJTIME = (0x7), + BKSYNC_GET_TSTIME = (0x8), + BKSYNC_MTP_TS_UPDATE_ENABLE = (0x9), + BKSYNC_MTP_TS_UPDATE_DISABLE = (0xa), + BKSYNC_ACK_TSTIME = (0xb), + BKSYNC_SYSINFO = (0xc), + BKSYNC_BROADSYNC = (0xd), + BKSYNC_GPIO = (0xe), + BKSYNC_EVLOG = (0xf), + BKSYNC_EXTTSLOG = (0x10), + BKSYNC_GPIO_PHASEOFFSET = (0x11), +}; + + +enum { + KSYNC_SYSINFO_UC_PORT_NUM = (0x1), + KSYNC_SYSINFO_UC_PORT_SYSPORT = (0x2), + KSYNC_SYSINFO_HOST_CPU_PORT = (0x3), + KSYNC_SYSINFO_HOST_CPU_SYSPORT = (0x4), + KSYNC_SYSINFO_UDH_LEN = (0x5), +}; + +enum { + KSYNC_BROADSYNC_BS0_CONFIG = (0x1), + KSYNC_BROADSYNC_BS1_CONFIG = (0x2), + KSYNC_BROADSYNC_BS0_STATUS_GET = (0x3), + KSYNC_BROADSYNC_BS1_STATUS_GET = (0x4), +}; + +enum { + KSYNC_GPIO_0 = (0x1), + KSYNC_GPIO_1 = (0x2), + KSYNC_GPIO_2 = (0x3), + KSYNC_GPIO_3 = (0x4), + KSYNC_GPIO_4 = (0x5), + KSYNC_GPIO_5 = (0x6), +}; + + + +/* 1588 message types. */ +enum +{ + IEEE1588_MSGTYPE_SYNC = (0x0), + IEEE1588_MSGTYPE_DELREQ = (0x1), + IEEE1588_MSGTYPE_PDELREQ = (0x2), + IEEE1588_MSGTYPE_PDELRESP = (0x3), + /* reserved (0x4) */ + /* reserved (0x5) */ + /* reserved (0x6) */ + /* reserved (0x7) */ + IEEE1588_MSGTYPE_GENERALMASK = (0x8), /* all non-event messages have this bit set */ + IEEE1588_MSGTYPE_FLWUP = (0x8), + IEEE1588_MSGTYPE_DELRESP = (0x9), + IEEE1588_MSGTYPE_PDELRES_FLWUP = (0xA), + IEEE1588_MSGTYPE_ANNOUNCE = (0xB), + IEEE1588_MSGTYPE_SGNLNG = (0xC), + IEEE1588_MSGTYPE_MNGMNT = (0xD) + /* reserved (0xE) */ + /* reserved (0xF) */ +}; + +/* Usage macros */ +#define ONE_BILLION (1000000000) + +#define SKB_U16_GET(_skb, _pkt_offset) \ + ((_skb->data[_pkt_offset] << 8) | _skb->data[_pkt_offset + 1]) + +#define BKSYNC_PTP_EVENT_MSG(_ptp_msg_type) \ + ((_ptp_msg_type == IEEE1588_MSGTYPE_DELREQ) || \ + (_ptp_msg_type == IEEE1588_MSGTYPE_SYNC)) + + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) +#define HWTSTAMP_TX_ONESTEP_SYNC 2 +#else +#include +#endif + + +/* + * Hardware specific information. + * 4 words of information used from this data set. + * 0 - 3: 2-step untagged. + * 4 - 7: 2-step tagged. + * 8 - 11: 1-step untagged. + * 12 - 15: 1-step tagged. + * 16 - 19: 1-step untagged with ITS-set. + * 20 - 23: 1-step tagged with ITS-set. + * + * Refer to device specific reg file for SOBMH header information. + * Below fields are considered: + * SOBMH => { + * IEEE1588_ONE_STEP_ENABLE - OneStep + * IEEE1588_REGEN_UDP_CHECKSUM - Regen UDP Checksum + * IEEE1588_INGRESS_TIMESTAMP_SIGN - ITS sign + * TX_TS - TwoStep + * IEEE1588_TIMESTAMP_HDR_OFFSET - 1588 header offset + * } + * + */ +uint32_t sobmhrawpkts_dcb26[24] = {0x00000000, 0x00020E00, 0x00000000, 0x00000000, 0x00000000, 0x00021200, 0x00000000, 0x00000000, + 0x00000000, 0x00100E00, 0x00000000, 0x00000000, 0x00000000, 0x00101200, 0x00000000, 0x00000000, + 0x00000000, 0x00140E00, 0x00000000, 0x00000000, 0x00000000, 0x00141200, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv4_dcb26[24] = {0x00000000, 0x00022A00, 0x00000000, 0x00000000, 0x00000000, 0x00022E00, 0x00000000, 0x00000000, + 0x00000000, 0x00182A00, 0x00000000, 0x00000000, 0x00000000, 0x00182E00, 0x00000000, 0x00000000, + 0x00000000, 0x001C2A00, 0x00000000, 0x00000000, 0x00000000, 0x001C2E00, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv6_dcb26[24] = {0x00000000, 0x00023E00, 0x00000000, 0x00000000, 0x00000000, 0x00024200, 0x00000000, 0x00000000, + 0x00000000, 0x00183E00, 0x00000000, 0x00000000, 0x00000000, 0x00184200, 0x00000000, 0x00000000, + 0x00000000, 0x001C3E00, 0x00000000, 0x00000000, 0x00000000, 0x001C4200, 0x00000000, 0x00000000}; + +uint32_t sobmhrawpkts_dcb32[24] = {0x00000000, 0x00010E00, 0x00000000, 0x00000000, 0x00000000, 0x00011200, 0x00000000, 0x00000000, + 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000, + 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv4_dcb32[24] = {0x00000000, 0x00012A00, 0x00000000, 0x00000000, 0x00000000, 0x00012E00, 0x00000000, 0x00000000, + 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000, + 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv6_dcb32[24] = {0x00000000, 0x00013E00, 0x00000000, 0x00000000, 0x00000000, 0x00014200, 0x00000000, 0x00000000, + 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000, + 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000}; + +uint32_t sobmhrawpkts_dcb35[24] = {0x00000000, 0x0020E000, 0x00000000, 0x00000000, 0x00000000, 0x00212000, 0x00000000, 0x00000000, + 0x00000000, 0x0100E000, 0x00000000, 0x00000000, 0x00000000, 0x01012000, 0x00000000, 0x00000000, + 0x00000000, 0x0140E000, 0x00000000, 0x00000000, 0x00000000, 0x01412000, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv4_dcb35[24] = {0x00000000, 0x0022A000, 0x00000000, 0x00000000, 0x00000000, 0x0022E000, 0x00000000, 0x00000000, + 0x00000000, 0x0182A000, 0x00000000, 0x00000000, 0x00000000, 0x0182E000, 0x00000000, 0x00000000, + 0x00000000, 0x01C2A000, 0x00000000, 0x00000000, 0x00000000, 0x01C2E000, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv6_dcb35[24] = {0x00000000, 0x0023E000, 0x00000000, 0x00000000, 0x00000000, 0x00242000, 0x00000000, 0x00000000, + 0x00000000, 0x0183E000, 0x00000000, 0x00000000, 0x00000000, 0x01842000, 0x00000000, 0x00000000, + 0x00000000, 0x01C3E000, 0x00000000, 0x00000000, 0x00000000, 0x01C42000, 0x00000000, 0x00000000}; + + +uint32_t sobmhrawpkts_dcb36[24] = {0x00000000, 0x00010E00, 0x00000000, 0x00000000, 0x00000000, 0x00011200, 0x00000000, 0x00000000, + 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000, + 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv4_dcb36[24] = {0x00000000, 0x00012A00, 0x00000000, 0x00000000, 0x00000000, 0x00012E00, 0x00000000, 0x00000000, + 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000, + 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv6_dcb36[24] = {0x00000000, 0x00013E00, 0x00000000, 0x00000000, 0x00000000, 0x00014200, 0x00000000, 0x00000000, + 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000, + 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000}; +/* th3: onestep only */ +uint32_t sobmhrawpkts_dcb38[24] = {0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000, + 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000, + 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv4_dcb38[24] = {0x00000000, 0x00082A00, 0x00000000, 0x00000000, 0x00000000, 0x00082E00, 0x00000000, 0x00000000, + 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000, + 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv6_dcb38[24] = {0x00000000, 0x00083E00, 0x00000000, 0x00000000, 0x00000000, 0x00084200, 0x00000000, 0x00000000, + 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000, + 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000}; + +/* HR3-MG/GH2 metadata */ +uint32_t sobmhrawpkts_dcb37[24] = {0x00000000, 0x00020E00, 0x00000000, 0x00000000, 0x00000000, 0x00021200, 0x00000000, 0x00000000, + 0x00000000, 0x00100E00, 0x00000000, 0x00000000, 0x00000000, 0x00101200, 0x00000000, 0x00000000, + 0x00000000, 0x00140E00, 0x00000000, 0x00000000, 0x00000000, 0x00141200, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv4_dcb37[24] = {0x00000000, 0x00022A00, 0x00000000, 0x00000000, 0x00000000, 0x00022E00, 0x00000000, 0x00000000, + 0x00000000, 0x00182A00, 0x00000000, 0x00000000, 0x00000000, 0x00182E00, 0x00000000, 0x00000000, + 0x00000000, 0x001C2A00, 0x00000000, 0x00000000, 0x00000000, 0x001C2E00, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv6_dcb37[24] = {0x00000000, 0x00023E00, 0x00000000, 0x00000000, 0x00000000, 0x00024200, 0x00000000, 0x00000000, + 0x00000000, 0x00183E00, 0x00000000, 0x00000000, 0x00000000, 0x00184200, 0x00000000, 0x00000000, + 0x00000000, 0x001C3E00, 0x00000000, 0x00000000, 0x00000000, 0x001C4200, 0x00000000, 0x00000000}; + +/* Driver Proc Entry root */ +static struct proc_dir_entry *bksync_proc_root = NULL; + +/* Shared data structures with R5 */ +typedef struct _bksync_tx_ts_data_s { + u32 ts_valid; /* Timestamp valid indication */ + u32 port_id; /* Port number */ + u32 ts_seq_id; /* Sequency Id */ + u32 ts_cnt; + u64 timestamp; /* Timestamp */ +} bksync_tx_ts_data_t; + +typedef struct bksync_info_s { + u32 ksyncinit; + u32 dev_id; + s64 freqcorr; + u64 portmap[BCMKSYNC_MAX_NUM_PORTS/64]; /* Two-step enabled ports */ + u64 ptptime; + u64 reftime; + u64 ptptime_alt; + u64 reftime_alt; + s64 phase_offset; + bksync_tx_ts_data_t port_ts_data[BCMKSYNC_MAX_NUM_PORTS]; +} bksync_info_t; + + +enum { + TS_EVENT_CPU = 0, + TS_EVENT_BSHB_0 = 1, + TS_EVENT_BSHB_1 = 2, + TS_EVENT_GPIO_1 = 3, + TS_EVENT_GPIO_2 = 4, + TS_EVENT_GPIO_3 = 5, + TS_EVENT_GPIO_4 = 6, + TS_EVENT_GPIO_5 = 7, + TS_EVENT_GPIO_6 = 8, +}; + +#define NUM_TS_EVENTS 14 + +#define __ATTRIBUTE_PACKED__ __attribute__ ((packed)) + +/* FW timestamps. + * This declaration has to match with HFT_t_TmStmp + * defined in the firmware. Otherwise, dma will fail. + */ +typedef struct fw_tstamp_s { + u64 sec; + u32 nsec; +} __ATTRIBUTE_PACKED__ fw_tstamp_t; + +typedef struct bksync_fw_debug_event_tstamps_s { + fw_tstamp_t prv_tstamp; + fw_tstamp_t cur_tstamp; +} __ATTRIBUTE_PACKED__ bksync_fw_debug_event_tstamps_t; + +typedef struct bksync_evlog_s { + bksync_fw_debug_event_tstamps_t event_timestamps[NUM_TS_EVENTS]; +} __ATTRIBUTE_PACKED__ bksync_evlog_t; + + +/* Timestamps for EXTTS from Firmware */ +#define NUM_EXT_TS 6 /* gpio0 = event0 ..... gpio5 = event5 */ +#define NUM_EVENT_TS 128 /* Directly mapped to PTP_MAX_TIMESTAMPS from ptp_private.h */ +typedef struct bksync_fw_extts_event_s { + u32 ts_event_id; + fw_tstamp_t tstamp; +} __ATTRIBUTE_PACKED__ bksync_fw_extts_event_t; + +typedef struct bksync_extts_log_s { + u32 head; /* Read pointer - Updated by HOST */ + u32 tail; /* Write pointer - Updated by FW */ + bksync_fw_extts_event_t event_ts[NUM_EVENT_TS]; + u32 overflow; +} __ATTRIBUTE_PACKED__ bksync_fw_extts_log_t; + +struct bksync_extts_event { + int enable[NUM_EXT_TS]; + int head; +}; + +typedef struct bksync_port_stats_s { + u32 pkt_rxctr; /* All ingress packets */ + u32 pkt_txctr; /* All egress packets */ + u32 pkt_txonestep; /* 1-step Tx packet counter */ + u32 tsts_match; /* 2-Step tstamp req match */ + u32 tsts_timeout; /* 2-Step tstamp req timeouts */ + u32 tsts_discard; /* 2-Step tstamp req discards */ + u32 osts_event_pkts; /* 1-step event packet counter */ + u32 osts_tstamp_reqs; /* 1-step events with tstamp request */ + u32 fifo_rxctr; /* 2-Step tstamp req match */ + u64 tsts_best_fetch_time; /* 1-step events with tstamp request */ + u64 tsts_worst_fetch_time; /* 1-step events with tstamp request */ + u32 tsts_avg_fetch_time; /* 1-step events with tstamp request */ +} bksync_port_stats_t; + +typedef struct bksync_init_info_s { + u32 pci_knetsync_cos; + u32 uc_port_num; + u32 uc_port_sysport; + u32 host_cpu_port; + u32 host_cpu_sysport; + u32 udh_len; +} bksync_init_info_t; + +typedef struct bksync_bs_info_s { + u32 enable; + u32 mode; + u32 bc; + u32 hb; +} bksync_bs_info_t; + +typedef struct bksync_gpio_info_s { + u32 enable; + u32 mode; + u32 period; + int64_t phaseoffset; +} bksync_gpio_info_t; + +typedef struct bksync_evlog_info_s { + u32 enable; +} bksync_evlog_info_t; + +/* Contains information about parsed fields of RX packet header information */ +typedef struct bksync_dnx_rx_pkt_parse_info_s { + uint16_t src_sys_port; + uint64_t rx_hw_timestamp; + uint64_t pph_header_vlan; + uint8_t dnx_header_offset; + int rx_frame_len; +} bksync_dnx_rx_pkt_parse_info_t; + + +/* DNX UDH DATA TYPE MAX */ +#define BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX (4) + +/* PPH LIF Ext. 3 bit type */ +#define BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX (8) + + +typedef struct bksync_dnx_jr2_devices_system_info_s { + /* dnx JR2 system header info */ + uint32_t ftmh_lb_key_ext_size; + uint32_t ftmh_stacking_ext_size; + uint32_t pph_base_size; + uint32_t pph_lif_ext_size[BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX]; + uint32_t system_headers_mode; + uint32_t udh_enable; + uint32_t udh_data_lenght_per_type[BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX]; + + /* CPU port information */ + uint32_t cosq_port_cpu_channel; + uint32_t cosq_port_pp_port; +} bksync_dnx_jr2_devices_system_info_t; + +typedef enum bksync_dnxjr2_system_headers_mode_e { + bksync_dnxjr2_sys_hdr_mode_jericho = 0, + bksync_dnxjr2_sys_hdr_mode_jericho2 = 1 +} bksync_dnxjr2_system_headers_mode_t; + +/* DNX JR2 FTMH Header information */ +#define BKSYNC_DNXJR2_FTMH_HDR_LEN (10) +#define BKSYNC_DNXJR2_FTMH_TM_DEST_EXT_LEN (3) +#define BKSYNC_DNXJR2_FTMH_FLOWID_EXT_LEN (3) +#define BKSYNC_DNXJR2_FTMH_BEIR_BFR_EXT_LEN (3) +#define BKSYNC_DNXJR2_FTMH_APP_SPECIFIC_EXT_LEN (6) + +/* DNX FTMH PPH type */ +#define BKSYNC_DNXJR2_PPH_TYPE_NO_PPH (0) +#define BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE (1) +#define BKSYNC_DNXJR2_PPH_TYPE_TSH_ONLY (2) +#define BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE_TSH (3) + +typedef enum bksync_dnxjr2_ftmh_tm_action_type_e { + bksync_dnxjr2_ftmh_tm_action_type_forward = 0, /* TM action is forward */ + bksync_dnxjr2_ftmh_tm_action_type_snoop = 1, /* TM action is snoop */ + bksync_dnxjr2_ftmh_tm_action_type_inbound_mirror = 2, /* TM action is inbound mirror. */ + bksync_dnxjr2_ftmh_tm_action_type_outbound_mirror = 3, /* TM action is outbound mirror. */ + bksync_dnxjr2_ftmh_tm_action_type_mirror = 4, /* TM action is mirror. */ + bksync_dnxjr2_ftmh_tm_action_type_statistical_sampling = 5 /* TM action is statistical sampling. */ +} bksync_dnxjr2_ftmh_tm_action_type_t; + +typedef enum bksync_dnxjr2_ftmh_app_spec_ext_type_e { + bksync_dnxjr2_ftmh_app_spec_ext_type_none = 0, /* FTMH ASE type is None or OAM */ + bksync_dnxjr2_ftmh_app_spec_ext_type_1588v2 = 1, /* FTMH ASE type is 1588v2 */ + bksync_dnxjr2_ftmh_app_spec_ext_type_mirror = 3, /* FTMH ASE type is Mirror */ + bksync_dnxjr2_ftmh_app_spec_ext_type_trajectory_trace = 4, /* FTMH ASE type is trajectory trace */ + bksync_dnxjr2_ftmh_app_spec_ext_type_inband_telemetry = 5, /* FTMH ASE type is Inband telemetry */ +} bksync_dnxjr2_ftmh_app_spec_ext_type_t; + + +typedef union bksync_dnxjr2_ftmh_base_header_s { + struct { + uint32_t words[2]; + uint8_t bytes[2]; + }; + struct { + uint32_t + src_sys_port_aggr_1:8, + src_sys_port_aggr_0:7, + traffic_class_1:1, + traffic_class_0:2, + packet_size_1:6, + packet_size_0:8; + uint32_t + unused_0:31, + src_sys_port_aggr_2:1; + uint8_t + unused_1:8; + uint8_t + reserved:1, + bier_bfr_ext_size:1, + flow_id_ext_size:1, + app_specific_ext_size:1, + tm_dest_ext_repsent:1, + pph_type:2, + visibility:1; + }; +} bksync_dnxjr2_ftmh_base_header_t; + +typedef union bksync_dnxjr2_ftmh_app_spec_ext_1588v2_s { + struct { + uint32_t word; + uint8_t bytes[2]; + }; + struct { + uint32_t + use_ingress_time_stamp:1, + use_ingress_time_compensation:1, + ingress_time_compensation:28, + time_stamp_lsbs:2; + uint8_t + offset_0:4, + ts_command:3, + ts_encapsulation:1; + uint8_t + offset_1:4, + type:4; + }; +} bksync_dnxjr2_ftmh_app_spec_ext_1588v2_t; + +/* DNX TSH Header size */ +#define BKSYNC_DNXJR2_TSH_HDR_SIZE (4) + +typedef union bksync_dnxjr2_timestamp_header_s { + struct { + uint32_t word; + }; + struct { + uint32_t timestamp; + }; +} bksync_dnxjr2_timestamp_header_t; + +/* DNX PPH FHEI_TYPE */ +#define BKSYNC_DNXJR2_PPH_FHEI_TYPE_NONE (0) /* NO FHE1 */ +#define BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ0 (1) /* 3 byte */ +#define BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ1 (2) /* 5 byte */ +#define BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ2 (3) /* 8 byte */ + +#define BKSYNC_DNXJR2_PPH_FHEI_SZ0_SIZE (3) /* 3 byte */ +#define BKSYNC_DNXJR2_PPH_FHEI_SZ1_SIZE (5) /* 5 byte */ +#define BKSYNC_DNXJR2_PPH_FHEI_SZ2_SIZE (8) /* 8 byte */ + +/* PPH Learn Extension - PPH EXT3 */ +#define BKSYNC_DNXJR2_PPH_LEARN_EXT_SIZE (19) + +/* PPH LIF Ext. 3 bit type */ +#define BKSYNC_DNXJR2_PPH_LIF_EXT_TYPE_MAX (8) + +typedef enum bksync_dnxjr2_pph_fheiext_type_e { + bksync_dnxjr2_pph_fheiext_type_vlanedit = 0, + bksync_dnxjr2_pph_fheiext_type_pop = 1, + bksync_dnxjr2_pph_fheiext_type_swap = 3, + bksync_dnxjr2_pph_fheiext_type_trap_snoop_mirror = 5, +} bksync_dnxjr2_pph_fheiext_type_t; + +typedef union bksync_dnxjr2_pph_base_12b_header_s { + struct { + uint32_t word[3]; + }; + struct { + uint32_t unused_1; + uint32_t unused_2; + uint32_t + forwarding_strenght:1, + parsing_start_type:5, + parsing_start_offset_1:2, + parsing_start_offset_0:5, + lif_ext_type:3, + fhei_size:2, + learn_ext_present:1, + ttl_1:5, + ttl_0:3, + netwrok_qos_0:5; + }; +} bksync_dnxjr2_pph_base_12b_header_t; + +typedef union bksync_dnxjr2_pph_fheiext_vlanedit_3b_header_s { + struct { + uint8_t byte[3]; + }; + struct { + uint8_t + edit_pcp1_0:1, + ingress_vlan_edit_cmd:7; + uint8_t + edit_vid1_0:5, + edit_dei1:1, + edit_pcp1_1:2; + uint8_t + type:1, + edit_vid1_1:7; + }; +} bksync_dnxjr2_pph_fheiext_vlanedit_3b_header_t; + +typedef union bksync_dnxjr2_pph_fheiext_vlanedit_5b_header_s { + struct { + uint8_t byte[5]; + }; + struct { + uint8_t + edit_vid2_0:4, + edit_dei2:1, + edit_pcp2:3; + uint8_t + edit_vid2_1; + uint8_t + edit_pcp1_0:1, + ingress_vlan_edit_cmd:7; + uint8_t + edit_vid1_0:5, + edit_dei1:1, + edit_pcp1_1:2; + uint8_t + type:1, + edit_vid1_1:7; + }; +} bksync_dnxjr2_pph_fheiext_vlanedit_5b_header_t; + +typedef union bksync_dnxjr2_pph_fheiext_trap_header_s { + struct { + uint8_t byte[5]; + }; + struct { + uint32_t + code_0:5, + qualifier:27; + uint8_t + type:4, + code_1:4; + }; +} bksync_dnxjr2_pph_fheiext_trap_header_t; + +#define BKSYNC_DNXJR2_UDH_BASE_HEADER_LEN (1) +#define BKSYNC_DNXJR2_UDH_DATA_TYPE_MAX (4) + +typedef union bksync_dnxjr2_udh_base_header_s { + struct { + uint8_t byte; + }; + struct { + uint8_t + udh_data_type_3:2, + udh_data_type_2:2, + udh_data_type_1:2, + udh_data_type_0:2; + }; +} bksync_dnxjr2_udh_base_header_t; + +#define DNX_PTCH_TYPE2_HEADER_LEN 2 +typedef union bksync_dnxjr2_ptch_type2_header_s { + struct { + uint8_t bytes[DNX_PTCH_TYPE2_HEADER_LEN]; + }; + struct { + uint8_t + in_pp_port_0:2, + reserved:2, + opaque_pt_attributes:3, + parser_program_control:1; + uint8_t + in_pp_port_1:8; + }; +} bksync_dnxjr2_ptch_type2_header_t; + +#define DNX_DNXJR2_MODULE_HEADER_LEN 16 +#define DNX_DNXJR2_ITMH_HEADER_LEN 5 + + +/* Clock Private Data */ +struct bksync_ptp_priv { + struct device dev; + int dcb_type; + struct ptp_clock *ptp_clock; + struct ptp_clock_info ptp_caps; + struct mutex ptp_lock; + int ptp_pair_lock; + volatile void *base_addr; /* address for PCI register access */ + volatile bksync_info_t *shared_addr; /* address for shared memory access */ + volatile bksync_evlog_t *evlog; /* dma-able address for fw updates */ + dma_addr_t dma_mem; + int dma_mem_size; + struct DMA_DEV *dma_dev; /* Required for DMA memory control */ + int num_pports; + int timekeep_status; + u32 mirror_encap_bmp; + struct delayed_work time_keep; + bksync_port_stats_t *port_stats; + bksync_init_info_t bksync_init_info; + bksync_bs_info_t bksync_bs_info[2]; + bksync_gpio_info_t bksync_gpio_info[6]; + bksync_evlog_info_t bksync_evlog_info[NUM_TS_EVENTS]; + bksync_dnx_jr2_devices_system_info_t bksync_jr2devs_sys_info; + volatile bksync_fw_extts_log_t *extts_log; /* dma-able address for fw updates */ + int extts_dma_mem_size; + dma_addr_t extts_dma_mem_addr; + struct bksync_extts_event extts_event; + struct delayed_work extts_logging; + + struct kobject *kobj; +}; + +static struct bksync_ptp_priv *ptp_priv; +volatile bksync_info_t *linuxPTPMemory = (bksync_info_t*)(0); +static volatile int module_initialized; +static int num_retries = 10; /* Retry count */ + +static void bksync_ptp_time_keep_init(void); +static void bksync_ptp_time_keep_deinit(void); +void bksync_dnxjr2_parse_rxpkt_system_header(uint8_t *raw_frame, bksync_dnx_rx_pkt_parse_info_t *rx_pkt_parse_info, int isfirsthdr); +static int bksync_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts); + +static void bksync_ptp_extts_logging_init(void); +static void bksync_ptp_extts_logging_deinit(void); + +#if defined(CMIC_SOFT_BYTE_SWAP) + +#define CMIC_SWAP32(_x) ((((_x) & 0xff000000) >> 24) \ + | (((_x) & 0x00ff0000) >> 8) \ + | (((_x) & 0x0000ff00) << 8) \ + | (((_x) & 0x000000ff) << 24)) + +#define DEV_READ32(_d, _a, _p) \ + do { \ + uint32_t _data; \ + _data = (((volatile uint32_t *)(_d)->base_addr)[(_a)/4]); \ + *(_p) = CMIC_SWAP32(_data); \ + } while(0) + +#define DEV_WRITE32(_d, _a, _v) \ + do { \ + uint32_t _data = CMIC_SWAP32(_v); \ + ((volatile uint32_t *)(_d)->base_addr)[(_a)/4] = (_data); \ + } while(0) + +#else + +#define DEV_READ32(_d, _a, _p) \ + do { \ + *(_p) = (((volatile uint32_t *)(_d)->base_addr)[(_a)/4]); \ + } while(0) + +#define DEV_WRITE32(_d, _a, _v) \ + do { \ + ((volatile uint32_t *)(_d)->base_addr)[(_a)/4] = (_v); \ + } while(0) +#endif /* defined(CMIC_SOFT_BYTE_SWAP) */ + +static void +ptp_usleep(int usec) +{ + if (DEVICE_IS_DNX) { + udelay(usec); + } else { + usleep_range(usec,usec+1); + } +} + +static void +ptp_sleep(int jiffies) +{ + wait_queue_head_t wq; + init_waitqueue_head(&wq); + + wait_event_timeout(wq, 0, jiffies); + +} + + +static void bksync_hostcmd_data_op(int setget, u64 *d1, u64 *d2) +{ + u32 w0, w1; + u64 data; + + if (!d1) { + return; + } + + if (setget) { + if (d1) { + data = *d1; + w0 = (data & 0xFFFFFFFF); + w1 = (data >> 32); + DEV_WRITE32(ptp_priv, hostcmd_regs[1], w0); + DEV_WRITE32(ptp_priv, hostcmd_regs[2], w1); + } + + if (d2) { + data = *d2; + + w0 = (data & 0xFFFFFFFF); + w1 = (data >> 32); + DEV_WRITE32(ptp_priv, hostcmd_regs[3], w0); + DEV_WRITE32(ptp_priv, hostcmd_regs[4], w1); + } + } else { + if (d1) { + DEV_READ32(ptp_priv, hostcmd_regs[1], &w0); + DEV_READ32(ptp_priv, hostcmd_regs[2], &w1); + data = (((u64)w1 << 32) | (w0)); + *d1 = data; + } + + if (d2) { + DEV_READ32(ptp_priv, hostcmd_regs[3], &w0); + DEV_READ32(ptp_priv, hostcmd_regs[4], &w1); + data = (((u64)w1 << 32) | (w0)); + *d2 = data; + } + } +} + + +static int bksync_cmd_go(u32 cmd, void *data0, void *data1) +{ + int ret = -1; + int retry_cnt = (1000); /* 1ms default timeout for hostcmd response */ + u32 cmd_status; + char cmd_str[30]; + int port = 0; + uint32_t seq_id = 0; + ktime_t start, now; + u32 subcmd = 0; + + if (ptp_priv == NULL || ptp_priv->shared_addr == NULL) { + return ret; + } + + mutex_lock(&ptp_priv->ptp_lock); + + if (cmd == BKSYNC_GET_TSTIME || cmd == BKSYNC_ACK_TSTIME) { + port = *((uint64_t *)data0) & 0xFFF; + seq_id = *((uint64_t*)data0) >> 16; + } + start = ktime_get(); + + ptp_priv->shared_addr->ksyncinit = cmd; + + /* init data */ + DEV_WRITE32(ptp_priv, hostcmd_regs[1], 0x0); + DEV_WRITE32(ptp_priv, hostcmd_regs[2], 0x0); + DEV_WRITE32(ptp_priv, hostcmd_regs[3], 0x0); + DEV_WRITE32(ptp_priv, hostcmd_regs[4], 0x0); + + switch (cmd) { + case BKSYNC_INIT: + retry_cnt = (retry_cnt * 4); + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_INIT"); + ptp_priv->shared_addr->phase_offset = 0; + bksync_hostcmd_data_op(1, (u64 *)&(ptp_priv->shared_addr->phase_offset), 0); + break; + case BKSYNC_FREQCOR: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_FREQCORR"); + ptp_priv->shared_addr->freqcorr = *((s32 *)data0); + bksync_hostcmd_data_op(1, (u64 *)&(ptp_priv->shared_addr->freqcorr), 0); + break; + case BKSYNC_ADJTIME: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_ADJTIME"); + ptp_priv->shared_addr->phase_offset = *((s64 *)data0); + bksync_hostcmd_data_op(1, (u64 *)&(ptp_priv->shared_addr->phase_offset), 0); + break; + case BKSYNC_GETTIME: + retry_cnt = (retry_cnt * 2); + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_GETTIME"); + break; + case BKSYNC_GET_TSTIME: + retry_cnt = (retry_cnt * 2); + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_GET_TSTIME"); + bksync_hostcmd_data_op(1, data0, data1); + break; + case BKSYNC_ACK_TSTIME: + retry_cnt = (retry_cnt * 2); + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_ACK_TSTIME"); + bksync_hostcmd_data_op(1, data0, data1); + break; + case BKSYNC_SETTIME: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_SETTIME"); + ptp_priv->shared_addr->ptptime = *((s64 *)data0); + ptp_priv->shared_addr->phase_offset = 0; + bksync_hostcmd_data_op(1, (u64 *)&(ptp_priv->shared_addr->ptptime), (u64 *)&(ptp_priv->shared_addr->phase_offset)); + break; + case BKSYNC_MTP_TS_UPDATE_ENABLE: + retry_cnt = (retry_cnt * 6); + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_MTP_TS_UPDATE_ENABLE"); + bksync_hostcmd_data_op(1, (u64 *)data0, 0); + break; + case BKSYNC_MTP_TS_UPDATE_DISABLE: + retry_cnt = (retry_cnt * 6); + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_MTP_TS_UPDATE_DISABLE"); + bksync_hostcmd_data_op(1, (u64 *)data0, 0); + break; + case BKSYNC_DEINIT: + retry_cnt = (retry_cnt * 4); + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_DEINIT"); + break; + case BKSYNC_SYSINFO: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_SYSINFO"); + bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + case BKSYNC_BROADSYNC: + subcmd = *((u32 *)data0); + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_BROADSYNC"); + bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + case BKSYNC_GPIO: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_GPIO"); + bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + case BKSYNC_EVLOG: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_EVLOG"); + bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + case BKSYNC_EXTTSLOG: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_EXTTSLOG"); + bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + case BKSYNC_GPIO_PHASEOFFSET: + snprintf(cmd_str, sizeof(cmd_str), "BKSYNC_GPIO_PHASEOFFSET"); + bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + default: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_XXX"); + break; + } + + DEV_WRITE32(ptp_priv, hostcmd_regs[0], ptp_priv->shared_addr->ksyncinit); + + do { + DEV_READ32(ptp_priv, hostcmd_regs[0], &cmd_status); + ptp_priv->shared_addr->ksyncinit = cmd_status; + + if (cmd_status == BKSYNC_DONE) { + ret = 0; + switch (cmd) { + case BKSYNC_GET_TSTIME: + case BKSYNC_GETTIME: + bksync_hostcmd_data_op(0, (u64 *)data0, (u64 *)data1); + break; + case BKSYNC_BROADSYNC: + if ((subcmd == KSYNC_BROADSYNC_BS0_STATUS_GET) || + (subcmd == KSYNC_BROADSYNC_BS1_STATUS_GET)) { + bksync_hostcmd_data_op(0, (u64 *)data0, (u64 *)data1); + } + break; + default: + break; + } + break; + } + ptp_usleep(100); + retry_cnt--; + } while (retry_cnt); + + now = ktime_get(); + mutex_unlock(&ptp_priv->ptp_lock); + + if (retry_cnt == 0) { + DBG_ERR(("Timeout on response from R5 to cmd %s time taken %lld us\n", cmd_str, ktime_us_delta(now, start))); + if (cmd == BKSYNC_GET_TSTIME) { + DBG_ERR(("2step timestamp get timeout for port:%d seq_id:%d\n", port, seq_id)); + } + } + + if (debug & DBG_LVL_CMDS) { + if (ktime_us_delta(now, start) > 5000) + DBG_CMDS(("R5 Command %s exceeded time expected (%lld us)\n", cmd_str, ktime_us_delta(now, start))); + } + + DBG_CMDS(("bksync_cmd_go: cmd:%s rv:%d\n", cmd_str, ret)); + + return ret; +} + + +/** + * bksync_ptp_adjfreq + * + * @ptp: pointer to ptp_clock_info structure + * @ppb: frequency correction value + * + * Description: this function will set the frequency correction + */ +static int bksync_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) +{ + int ret = -1; + + ret = bksync_cmd_go(BKSYNC_FREQCOR, &ppb, NULL); + DBG_VERB(("ptp_adjfreq: applying freq correction: %x; rv:%d\n", ppb, ret)); + + return ret; +} + +/** + * bksync_ptp_adjtime + * + * @ptp: pointer to ptp_clock_info structure + * @delta: desired change in nanoseconds + * + * Description: this function will shift/adjust the hardware clock time. + */ +static int bksync_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) +{ + int ret = -1; + + ret = bksync_cmd_go(BKSYNC_ADJTIME, (void *)&delta, NULL); + DBG_VERB(("ptp_adjtime: adjtime: 0x%llx; rv:%d\n", delta, ret)); + + return ret; +} + +/** + * bksync_ptp_gettime + * + * @ptp: pointer to ptp_clock_info structure + * @ts: pointer to hold time/result + * + * Description: this function will read the current time from the + * hardware clock and store it in @ts. + */ +static int bksync_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts) +{ + int ret = -1; + s64 reftime = 0; + s64 refctr = 0; + static u64 prv_reftime = 0, prv_refctr = 0; + u64 diff_reftime = 0, diff_refctr = 0; + + ret = bksync_cmd_go(BKSYNC_GETTIME, (void *)&reftime, (void *)&refctr); + if (ret == 0) { + DBG_VERB(("ptp_gettime: gettime: 0x%llx refctr:0x%llx\n", reftime, refctr)); + + ptp_priv->shared_addr->ptptime_alt = ptp_priv->shared_addr->ptptime; + ptp_priv->shared_addr->reftime_alt = ptp_priv->shared_addr->reftime; + + ptp_priv->ptp_pair_lock = 1; + ptp_priv->shared_addr->ptptime = reftime; + ptp_priv->shared_addr->reftime = refctr; + ptp_priv->ptp_pair_lock = 0; + + diff_reftime = reftime - prv_reftime; + diff_refctr = refctr - prv_refctr; + + if (diff_reftime != diff_refctr) { + DBG_WARN(("PTP-GETTIME ptptime: 0x%llx reftime: 0x%llx prv_ptptime: 0x%llx prv_reftime: 0x%llx \n", + ptp_priv->shared_addr->ptptime, ptp_priv->shared_addr->reftime, diff_reftime, diff_refctr)); + } + prv_reftime = reftime; + prv_refctr = refctr; + + *ts = ns_to_timespec64(reftime); + } + return ret; +} + + +/** + * bksync_ptp_settime + * + * @ptp: pointer to ptp_clock_info structure + * @ts: time value to set + * + * Description: this function will set the current time on the + * hardware clock. + */ +static int bksync_ptp_settime(struct ptp_clock_info *ptp, + const struct timespec64 *ts) +{ + s64 reftime, phaseadj; + int ret = -1; + + phaseadj = 0; + reftime = timespec64_to_ns(ts); + + ret = bksync_cmd_go(BKSYNC_SETTIME, (void *)&reftime, (void *)&phaseadj); + DBG_VERB(("ptp_settime: settime: 0x%llx; rv:%d\n", reftime, ret)); + + return ret; +} + +static int bksync_exttslog_cmd(int event, int enable) +{ + int ret; + u64 subcmd = 0, subcmd_data = 0; + + /* upper 32b -> event + * lower 32b -> enable/disable */ + subcmd = (u64)event << 32 | enable; + subcmd_data = ptp_priv->extts_dma_mem_addr; + + ret = bksync_cmd_go(BKSYNC_EXTTSLOG, &subcmd, &subcmd_data); + DBG_VERB(("bksync_evlog_cmd: subcmd: 0x%llx subcmd_data: 0x%llx rv:%d\n", subcmd, subcmd_data, ret)); + + return ret; +} + +static int bksync_ptp_enable(struct ptp_clock_info *ptp, + struct ptp_clock_request *rq, int on) +{ + int mapped_event = -1; + int enable = on ? 1 : 0; + + switch (rq->type) { + case PTP_CLK_REQ_EXTTS: + if (rq->extts.index < NUM_EXT_TS) { + switch (rq->extts.index) { + /* Map EXTTS event_id to FW event_id */ + case 0: + mapped_event = TS_EVENT_GPIO_1; + break; + case 1: + mapped_event = TS_EVENT_GPIO_2; + break; + case 2: + mapped_event = TS_EVENT_GPIO_3; + break; + case 3: + mapped_event = TS_EVENT_GPIO_4; + break; + case 4: + mapped_event = TS_EVENT_GPIO_5; + break; + case 5: + mapped_event = TS_EVENT_GPIO_6; + break; + default: + return -EINVAL; + } + + /* Reject request for unsupported flags */ + if (rq->extts.flags & ~(PTP_ENABLE_FEATURE | PTP_RISING_EDGE)) { + return -EOPNOTSUPP; + } + + ptp_priv->extts_event.enable[rq->extts.index] = enable; + + bksync_exttslog_cmd(mapped_event, enable); + + DBG_VERB(("Event state change req_index:%u state:%d\n", + rq->extts.index, enable)); + } else { + return -EINVAL; + } + break; + default: + return -EOPNOTSUPP; + } + + return 0; +} + + +static int bksync_ptp_mirror_encap_update(struct ptp_clock_info *ptp, + int mtp_idx, int start) +{ + int ret = -1; + u64 mirror_encap_idx; + u32 cmd_status; + + if (mtp_idx > BCMKSYNC_MAX_MTP_IDX) { + return ret; + } + + mirror_encap_idx = mtp_idx; + if (start) { + cmd_status = BKSYNC_MTP_TS_UPDATE_ENABLE; + ptp_priv->mirror_encap_bmp |= (1 << mtp_idx); + } else { + if (!(ptp_priv->mirror_encap_bmp & mtp_idx)) { + /* Not running */ + return ret; + } + cmd_status = BKSYNC_MTP_TS_UPDATE_DISABLE; + ptp_priv->mirror_encap_bmp &= ~mtp_idx; + } + + ret = bksync_cmd_go(cmd_status, &mirror_encap_idx, NULL); + DBG_VERB(("mirror_encap_update: %d, mpt_index: %d, ret:%d\n", start, mtp_idx, ret)); + + return ret; + +} + +/* structure describing a PTP hardware clock */ +static struct ptp_clock_info bksync_ptp_caps = { + .owner = THIS_MODULE, + .name = "bksync_ptp_clock", + .max_adj = 200000, + .n_alarm = 0, + .n_ext_ts = NUM_EXT_TS, + .n_per_out = 0, /* will be overwritten in bksync_ptp_register */ + .n_pins = 0, + .pps = 0, + .adjfreq = bksync_ptp_adjfreq, + .adjtime = bksync_ptp_adjtime, + .gettime64 = bksync_ptp_gettime, + .settime64 = bksync_ptp_settime, + .enable = bksync_ptp_enable, +}; + +/** + * bksync_ptp_hw_tstamp_enable + * + * @dev_no: device number + * @port: port number + * + * Description: this is a callback function to enable the timestamping on + * a given port + */ +int bksync_ptp_hw_tstamp_enable(int dev_no, int port, int tx_type) +{ + uint64_t portmap = 0; + int map = 0; + int ret = 0; + + if (!module_initialized) { + ret = -1; + goto exit; + } + + if (tx_type == HWTSTAMP_TX_ONESTEP_SYNC) { + DBG_VERB(("hw_tstamp_enable: Enabling 1-step(type:%d) TS on port:%d\n", tx_type, port)); + bksync_ptp_time_keep_init(); + goto exit; + } + + DBG_VERB(("hw_tstamp_enable: Enabling 2-step(type:%d) TS on port:%d\n", tx_type, port)); + if (port <= 0) { + DBG_ERR(("hw_tstamp_enable: Error enabling 2-step timestamp on port:%d\n", port)); + ret = -1; + goto exit; + } + + /* Update the shared structure member */ + if (ptp_priv->shared_addr) { + if ((port > 0) && (port < BCMKSYNC_MAX_NUM_PORTS)) { + port -= 1; + map = (port / 64); + port = (port % 64); + + portmap = ptp_priv->shared_addr->portmap[map]; + portmap |= (uint64_t)0x1 << port; + ptp_priv->shared_addr->portmap[map] = portmap; + + /* Command to R5 for the update */ + ptp_priv->shared_addr->ksyncinit=BKSYNC_PBM_UPDATE; + + } + } + +exit: + return ret; +} + +/** + * bksync_ptp_hw_tstamp_disable + * + * @dev_no: device number + * @port: port number + * + * Description: this is a callback function to disable the timestamping on + * a given port + */ +int bksync_ptp_hw_tstamp_disable(int dev_no, int port, int tx_type) +{ + uint64_t portmap = 0; + int map = 0; + int ret = 0; + + if (!module_initialized) { + ret = -1; + goto exit; + } + + if (tx_type == HWTSTAMP_TX_ONESTEP_SYNC) { + DBG_VERB(("hw_tstamp_disable: Disable 1Step TS(type:%d) port = %d\n", tx_type, port)); + goto exit; + } + + DBG_VERB(("hw_tstamp_disable: Disable 2Step TS(type:%d) port = %d\n", tx_type, port)); + if (port <= 0) { + DBG_ERR(("hw_tstamp_disable: Error disabling timestamp on port:%d\n", port)); + ret = -1; + goto exit; + } + + /* Update the shared structure member */ + if (ptp_priv->shared_addr) { + if ((port > 0) && (port < BCMKSYNC_MAX_NUM_PORTS)) { + port -= 1; + map = (port / 64); + port = (port % 64); + + portmap = ptp_priv->shared_addr->portmap[map]; + portmap &= ~((uint64_t)0x1 << port); + ptp_priv->shared_addr->portmap[map]= portmap; + + /* Command to R5 for the update */ + ptp_priv->shared_addr->ksyncinit = BKSYNC_PBM_UPDATE; + } + } + +exit: + return ret; +} + +int bksync_ptp_transport_get(uint8_t *pkt) +{ + int transport = 0; + uint16_t ethertype; + uint16_t tpid; + int tpid_offset, ethype_offset; + + /* Need to check VLAN tag if packet is tagged */ + tpid_offset = 12; + tpid = pkt[tpid_offset] << 8 | pkt[tpid_offset + 1]; + if (tpid == 0x8100) { + ethype_offset = tpid_offset + 4; + } else { + ethype_offset = tpid_offset; + } + + ethertype = pkt[ethype_offset] << 8 | pkt[ethype_offset+1]; + + switch (ethertype) { + case 0x88f7: /* ETHERTYPE_PTPV2 */ + transport = 2; + break; + + case 0x0800: /* ETHERTYPE_IPV4 */ + transport = 4; + break; + + case 0x86DD: /* ETHERTYPE_IPV6 */ + transport = 6; + break; + + default: + transport = 0; + } + + return transport; +} + +static int +bksync_txpkt_tsts_tsamp_get(int port, uint32_t pkt_seq_id, uint32_t *ts_valid, uint32_t *seq_id, uint64_t *timestamp) +{ + int ret = 0; + uint64_t data; + u32 fifo_rxctr = 0; + + *ts_valid = 0; + *timestamp = 0; + *seq_id = 0; + + data = (port & 0xFFFF) | ((pkt_seq_id & 0xFFFF) << 16); + + ret = bksync_cmd_go(BKSYNC_GET_TSTIME, &data, timestamp); + if (ret >= 0) { + fifo_rxctr = (data >> 32) & 0xFFFFFFFF; + *seq_id = (data >> 16) & 0xFFFF; + *ts_valid = data & 0x1; + if (*ts_valid) { + data = (port & 0xFFFF) | (pkt_seq_id << 16); + bksync_cmd_go(BKSYNC_ACK_TSTIME, &data, 0); + if (fifo_rxctr != 0) { + if (fifo_rxctr != (ptp_priv->port_stats[port].fifo_rxctr + 1)) { + DBG_ERR(("FW reset or lost timestamp FIFO_RxCtr:" + "(Prev %u : Current %u) on port:%d\n", + ptp_priv->port_stats[port].fifo_rxctr, + fifo_rxctr, port)); + } + ptp_priv->port_stats[port].fifo_rxctr = fifo_rxctr; + } + } + } else { + DBG_ERR(("BKSYNC_GET_TSTIME failed on port:%d\n", port)); + } + return ret; +} + +/** + * bksync_ptp_hw_tstamp_tx_time_get + * + * @dev_no: device number + * @port: port number + * @pkt: packet address + * @ts: timestamp to be retrieved + * + * Description: this is a callback function to retrieve the timestamp on + * a given port + * NOTE: + * Two-step related - fetching the timestamp from portmacro, not needed for one-step + */ +int bksync_ptp_hw_tstamp_tx_time_get(int dev_no, int port, uint8_t *pkt, uint64_t *ts, int tx_type) +{ + /* Get Timestamp from R5 or CLMAC */ + uint32_t ts_valid = 0; + uint32_t seq_id = 0; + uint32_t pktseq_id = 0; + uint64_t timestamp = 0; + uint16_t tpid = 0; + ktime_t start; + u64 delta; + int retry_cnt = num_retries; + int seq_id_offset, tpid_offset; + int transport = network_transport; + + start = ktime_get(); + + if (!ptp_priv || !pkt || !ts || port < 1 || port > 255 || ptp_priv->shared_addr == NULL) { + return -1; + } + + *ts = 0; + + /* Linux 5.10.67 kernel complains about missing delay request timestamp for even if + * configuration is for one-step ptp, hence provided ptp time in skb timestamp + */ + if (tx_type == HWTSTAMP_TX_ONESTEP_SYNC) { + if (ptp_priv->ptp_pair_lock == 1) { + /* use alternate pair when main dataset is being updated */ + *ts = ptp_priv->shared_addr->ptptime_alt; + } else { + *ts = ptp_priv->shared_addr->ptptime; + } + ptp_priv->port_stats[port].pkt_txctr += 1; + goto exit; + } + + + tpid_offset = 12; + + /* Parse for nw transport */ + if (transport == 0) { + transport = bksync_ptp_transport_get(pkt); + } + + switch(transport) + { + case 2: + seq_id_offset = 0x2c; + break; + case 4: + seq_id_offset = 0x48; + break; + case 6: + seq_id_offset = 0x5c; + break; + default: + seq_id_offset = 0x2c; + break; + } + + /* Need to check VLAN tag if packet is tagged */ + tpid = pkt[tpid_offset] << 8 | pkt[tpid_offset + 1]; + if (tpid == 0x8100) { + seq_id_offset += 4; + } + + pktseq_id = pkt[seq_id_offset] << 8 | pkt[seq_id_offset + 1]; + + port -= 1; + + DBG_TXTS(("hw_tstamp_tx_time_get: port %d pktseq_id %u\n", port, pktseq_id)); + + /* Fetch the TX timestamp from shadow memory */ + do { + bksync_txpkt_tsts_tsamp_get(port, pktseq_id, &ts_valid, &seq_id, ×tamp); + if (ts_valid) { + + /* Clear the shadow memory to get next entry */ + ptp_priv->shared_addr->port_ts_data[port].timestamp = 0; + ptp_priv->shared_addr->port_ts_data[port].port_id = 0; + ptp_priv->shared_addr->port_ts_data[port].ts_seq_id = 0; + ptp_priv->shared_addr->port_ts_data[port].ts_valid = 0; + + if (seq_id == pktseq_id) { + *ts = timestamp; + ptp_priv->port_stats[port].tsts_match += 1; + + delta = ktime_us_delta(ktime_get(), start); + DBG_TXTS(("Port: %d Skb_SeqID %d FW_SeqId %d and TS:%llx FetchTime %lld\n", + port, pktseq_id, seq_id, timestamp, delta)); + + if (delta < ptp_priv->port_stats[port].tsts_best_fetch_time || ptp_priv->port_stats[port].tsts_best_fetch_time == 0) { + ptp_priv->port_stats[port].tsts_best_fetch_time = delta; + } + if (delta > ptp_priv->port_stats[port].tsts_worst_fetch_time || ptp_priv->port_stats[port].tsts_worst_fetch_time == 0) { + ptp_priv->port_stats[port].tsts_worst_fetch_time = delta; + } + /* Calculate Moving Average*/ + ptp_priv->port_stats[port].tsts_avg_fetch_time = ((u32)delta + ((ptp_priv->port_stats[port].tsts_match - 1) * ptp_priv->port_stats[port].tsts_avg_fetch_time)) / ptp_priv->port_stats[port].tsts_match; + break; + } else { + DBG_TXTS(("Discard timestamp on port %d Skb_SeqID %d FW_SeqId %d RetryCnt %d TimeLapsed (%lld us)\n", + port, pktseq_id, seq_id, (num_retries - retry_cnt), ktime_us_delta(ktime_get(),start))); + + ptp_priv->port_stats[port].tsts_discard += 1; + continue; + } + } + ptp_sleep(1); + retry_cnt--; + } while(retry_cnt); + + + ptp_priv->port_stats[port].pkt_txctr += 1; + + if (retry_cnt == 0) { + ptp_priv->port_stats[port].tsts_timeout += 1; + DBG_ERR(("FW Response timeout: Tx TS on phy port:%d Skb_SeqID: %d TimeLapsed (%lld us)\n", + port, pktseq_id, ktime_us_delta(ktime_get(), start))); + } + +exit: + return 0; +} + + +enum { + bxconCustomEncapVersionInvalid = 0, + bxconCustomEncapVersionOne = 1, + + bxconCustomEncapVersionCurrent = bxconCustomEncapVersionOne, + bxconCustomEncapVersionReserved = 255 /* last */ +} bxconCustomEncapVersion; + +enum { + bxconCustomEncapOpcodeInvalid = 0, + bxconCustomEncapOpcodePtpRx = 1, + bxconCustomEncapOpcodeReserved = 255 /* last */ +} bxconCustomEncapOpcode; + +enum { + bxconCustomEncapPtpRxTlvInvalid = 0, + bxconCustomEncapPtpRxTlvPtpRxTime = 1, + bxconCustomEncapPtpRxTlvReserved = 255 /* last */ +} bxconCustomEncapPtpRxTlvType; + +static void +dbg_dump_pkt(uint8_t *data, int size) +{ + int idx; + char str[128]; + + for (idx = 0; idx < size; idx++) { + if ((idx & 0xf) == 0) { + sprintf(str, "%04x: ", idx); + } + sprintf(&str[strlen(str)], "%02x ", data[idx]); + if ((idx & 0xf) == 0xf) { + sprintf(&str[strlen(str)], "\n"); + gprintk("%s", str); + } + } + if ((idx & 0xf) != 0) { + sprintf(&str[strlen(str)], "\n"); + gprintk("%s", str); + } +} + +/* onesync_dnx_jr2_parse_rxpkt_system_header : This function parses DNX system headers based + * on JR2 system headers format + */ +void bksync_dnxjr2_parse_rxpkt_system_header(uint8_t *raw_pkt_frame, bksync_dnx_rx_pkt_parse_info_t *rx_pkt_parse_info, int isfirsthdr) +{ + bksync_dnxjr2_ftmh_base_header_t *ftmh_base_hdr = NULL; + bksync_dnxjr2_timestamp_header_t *timestamp_hdr = NULL; + bksync_dnxjr2_udh_base_header_t *udh_base_header = NULL; + bksync_dnxjr2_ftmh_app_spec_ext_1588v2_t *ftmp_app_spec_ext_1588v2_hdr = NULL; + bksync_dnxjr2_pph_fheiext_vlanedit_3b_header_t *fheiext_vlanedit_3b_hdr = NULL; + bksync_dnxjr2_pph_fheiext_vlanedit_5b_header_t *fheiext_vlanedit_5b_hdr = NULL; + bksync_dnxjr2_pph_base_12b_header_t *pph_base_12b_hdr = NULL; + uint8_t raw_frame[64]; + int tmp = 0; + + + rx_pkt_parse_info->rx_frame_len = 0; + rx_pkt_parse_info->dnx_header_offset = 0; + rx_pkt_parse_info->pph_header_vlan = 0; + rx_pkt_parse_info->rx_hw_timestamp = 0; + rx_pkt_parse_info->src_sys_port = 0; + + for (tmp = 0; tmp < 64; tmp++) { + raw_frame[tmp] = raw_pkt_frame[tmp]; + } + + /* FTMH */ + ftmh_base_hdr = (bksync_dnxjr2_ftmh_base_header_t *)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); + ftmh_base_hdr->words[0] = ntohl(ftmh_base_hdr->words[0]); + ftmh_base_hdr->words[1] = ntohl(ftmh_base_hdr->words[1]); + + rx_pkt_parse_info->src_sys_port = (uint16_t)(ftmh_base_hdr->src_sys_port_aggr_0 << 9 | ftmh_base_hdr->src_sys_port_aggr_1 << 1 | ftmh_base_hdr->src_sys_port_aggr_2); + rx_pkt_parse_info->rx_frame_len = (uint16_t)(ftmh_base_hdr->packet_size_0 << 6 | ftmh_base_hdr->packet_size_1); + + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_HDR_LEN; + + /* FTMH LB-Key Extension */ + if ((ptp_priv->bksync_jr2devs_sys_info).ftmh_lb_key_ext_size > 0) { + rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).ftmh_lb_key_ext_size; + } + + /* FTMH Stacking Extension */ + if ((ptp_priv->bksync_jr2devs_sys_info).ftmh_stacking_ext_size > 0) { + rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).ftmh_stacking_ext_size; + } + + /* FTMH BIER BFR Extension */ + if (ftmh_base_hdr->bier_bfr_ext_size > 0) { + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_BEIR_BFR_EXT_LEN; + + } + + /* FTMH TM Destination Extension */ + if (ftmh_base_hdr->tm_dest_ext_repsent > 0) { + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_TM_DEST_EXT_LEN; + + } + + /* FTMH Application Specific Extension */ + if (ftmh_base_hdr->app_specific_ext_size > 0) { + ftmp_app_spec_ext_1588v2_hdr = (bksync_dnxjr2_ftmh_app_spec_ext_1588v2_t*)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); + ftmp_app_spec_ext_1588v2_hdr->word = ntohl(ftmp_app_spec_ext_1588v2_hdr->word); + + if (ftmp_app_spec_ext_1588v2_hdr->type == bksync_dnxjr2_ftmh_app_spec_ext_type_1588v2) { + } + + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_APP_SPECIFIC_EXT_LEN; + + } + + /* FTMH Latency-Flow-ID Extension */ + if (ftmh_base_hdr->flow_id_ext_size > 0) { + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_FLOWID_EXT_LEN ; + + } + + /* Time-stamp Header */ + if ((ftmh_base_hdr->pph_type == BKSYNC_DNXJR2_PPH_TYPE_TSH_ONLY) || + (ftmh_base_hdr->pph_type == BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE_TSH) ) { + + timestamp_hdr = (bksync_dnxjr2_timestamp_header_t* )(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); + timestamp_hdr->word = ntohl(timestamp_hdr->word); + + rx_pkt_parse_info->rx_hw_timestamp = timestamp_hdr->timestamp; + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_TSH_HDR_SIZE; + + } + + /* PPH - internal header */ + if ((ftmh_base_hdr->pph_type == BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE) || + (ftmh_base_hdr->pph_type == BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE_TSH)) { + + pph_base_12b_hdr = (bksync_dnxjr2_pph_base_12b_header_t*)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); + + pph_base_12b_hdr->word[0] = ntohl(pph_base_12b_hdr->word[0]); + pph_base_12b_hdr->word[1] = ntohl(pph_base_12b_hdr->word[1]); + pph_base_12b_hdr->word[2] = ntohl(pph_base_12b_hdr->word[2]); + + rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).pph_base_size; + + + /* PPH fhei_size handling */ + if (pph_base_12b_hdr->fhei_size > BKSYNC_DNXJR2_PPH_FHEI_TYPE_NONE) { + + switch(pph_base_12b_hdr->fhei_size) { + case BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ0: /* 3byte */ + fheiext_vlanedit_3b_hdr = (bksync_dnxjr2_pph_fheiext_vlanedit_3b_header_t*)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); + + if(fheiext_vlanedit_3b_hdr->type == bksync_dnxjr2_pph_fheiext_type_vlanedit) { + rx_pkt_parse_info->pph_header_vlan = fheiext_vlanedit_3b_hdr->edit_vid1_0 << 7 | fheiext_vlanedit_3b_hdr->edit_vid1_1; + } + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_PPH_FHEI_SZ0_SIZE; + break; + case BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ1: /* 5byte */ + fheiext_vlanedit_5b_hdr = (bksync_dnxjr2_pph_fheiext_vlanedit_5b_header_t*)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); + + if (fheiext_vlanedit_5b_hdr->type == bksync_dnxjr2_pph_fheiext_type_vlanedit) { + rx_pkt_parse_info->pph_header_vlan = fheiext_vlanedit_5b_hdr->edit_vid1_0 << 7 | fheiext_vlanedit_5b_hdr->edit_vid1_1; + } else if (fheiext_vlanedit_5b_hdr->type == bksync_dnxjr2_pph_fheiext_type_trap_snoop_mirror) { + } + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_PPH_FHEI_SZ1_SIZE; + break; + case BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ2: /* 8byte */ + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_PPH_FHEI_SZ2_SIZE; + break; + default: + break; + } + } + + /* PPH LIF Extension */ + if ((pph_base_12b_hdr->lif_ext_type > 0) && (pph_base_12b_hdr->lif_ext_type < BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX)) { + rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).pph_lif_ext_size[pph_base_12b_hdr->lif_ext_type]; + } + + /* PPH Learn Extension */ + if (pph_base_12b_hdr->learn_ext_present) { + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_PPH_LEARN_EXT_SIZE; + } + } + + /* UDH header */ + if (!isfirsthdr) { + if ((ptp_priv->bksync_jr2devs_sys_info).udh_enable) { + udh_base_header = (bksync_dnxjr2_udh_base_header_t* )(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); + + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_UDH_BASE_HEADER_LEN; + /* Need to understand more */ + rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).udh_data_lenght_per_type[udh_base_header->udh_data_type_0]; + rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).udh_data_lenght_per_type[udh_base_header->udh_data_type_1]; + rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).udh_data_lenght_per_type[udh_base_header->udh_data_type_2]; + rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).udh_data_lenght_per_type[udh_base_header->udh_data_type_3]; + } + } + + DBG_RX(("DNX PKT PARSE: src_sys_port %u rx_hw_timestamp %llx pph_header_vlan %llx dnx_header_offset %u rx_frame_len %d\n", + rx_pkt_parse_info->src_sys_port, rx_pkt_parse_info->rx_hw_timestamp, rx_pkt_parse_info->pph_header_vlan, + rx_pkt_parse_info->dnx_header_offset, rx_pkt_parse_info->rx_frame_len)); + +} + + +static inline int +bksync_pkt_custom_encap_ptprx_get(uint8_t *pkt, uint64_t *ing_ptptime) +{ + uint8_t *custom_hdr; + uint8_t id[4]; + uint8_t ver, opc; + uint8_t nh_type, nh_rsvd; + uint16_t len, tot_len; + uint16_t nh_len; + uint32_t seq_id = 0; + uint32_t ptp_rx_time[2]; + uint64_t u64_ptp_rx_time = 0; + + custom_hdr = pkt; + + BKSYNC_UNPACK_U8(custom_hdr, id[0]); + BKSYNC_UNPACK_U8(custom_hdr, id[1]); + BKSYNC_UNPACK_U8(custom_hdr, id[2]); + BKSYNC_UNPACK_U8(custom_hdr, id[3]); + if (!((id[0] == 'B') && (id[1] == 'C') && (id[2] == 'M') && (id[3] == 'C'))) { + /* invalid signature */ + return -1; + } + + BKSYNC_UNPACK_U8(custom_hdr, ver); + switch (ver) { + case bxconCustomEncapVersionCurrent: + break; + default: + DBG_ERR(("custom_encap_ptprx_get: Invalid ver\n")); + return -1; + } + + BKSYNC_UNPACK_U8(custom_hdr, opc); + switch (opc) { + case bxconCustomEncapOpcodePtpRx: + break; + default: + DBG_ERR(("custom_encap_ptprx_get: Invalid opcode\n")); + return -1; + } + + + BKSYNC_UNPACK_U16(custom_hdr, len); + BKSYNC_UNPACK_U32(custom_hdr, seq_id); + tot_len = len; + + /* remaining length of custom encap */ + len = len - (custom_hdr - pkt); + + + /* process tlv */ + while (len > 0) { + BKSYNC_UNPACK_U8(custom_hdr, nh_type); + BKSYNC_UNPACK_U8(custom_hdr, nh_rsvd); + BKSYNC_UNPACK_U16(custom_hdr, nh_len); + len = len - (nh_len); + if (nh_rsvd != 0x0) { + continue; /* invalid tlv */ + } + + switch (nh_type) { + case bxconCustomEncapPtpRxTlvPtpRxTime: + BKSYNC_UNPACK_U32(custom_hdr, ptp_rx_time[0]); + BKSYNC_UNPACK_U32(custom_hdr, ptp_rx_time[1]); + u64_ptp_rx_time = ((uint64_t)ptp_rx_time[1] << 32) | (uint64_t)ptp_rx_time[0]; + *ing_ptptime = u64_ptp_rx_time; + break; + default: + custom_hdr += nh_len; + break; + } + } + + DBG_RX_DUMP(("custom_encap_ptprx_get: Custom Encap header:\n")); + if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(pkt, tot_len); + + DBG_RX(("custom_encap_ptprx_get: ver=%d opcode=%d tot_len=%d seq_id=0x%x\n", ver, opc, tot_len, seq_id)); + + return (tot_len); +} + +/** + * bksync_ptp_hw_tstamp_rx_pre_process + * + * @dev_no: device number + * + * Description: + */ +int bksync_ptp_hw_tstamp_rx_pre_process(int dev_no, uint8_t *pkt, uint32_t sspa, int *pkt_offset) +{ + int ret = -1; + uint64_t ts; + int custom_encap_len = 0; + + bksync_dnx_rx_pkt_parse_info_t rx_pkt_parse_info_1 = {0}, rx_pkt_parse_info_2 = {0}; + + if (sspa == (ptp_priv->bksync_init_info).uc_port_num && pkt_offset == NULL) { + ret = 0; + } + + + if (DEVICE_IS_DNX && pkt_offset == NULL) { + bksync_dnxjr2_parse_rxpkt_system_header(pkt, &rx_pkt_parse_info_1, 1); + bksync_dnxjr2_parse_rxpkt_system_header(pkt + rx_pkt_parse_info_1.dnx_header_offset, &rx_pkt_parse_info_2, 0); + } + + + /* parse custom encap header in pkt for ptp rxtime */ + if (DEVICE_IS_DNX) { + custom_encap_len = bksync_pkt_custom_encap_ptprx_get(pkt + rx_pkt_parse_info_1.dnx_header_offset + + rx_pkt_parse_info_2.dnx_header_offset, &ts); + } else { + custom_encap_len = bksync_pkt_custom_encap_ptprx_get(pkt, &ts); + } + DBG_RX(("hw_tstamp_rx_pre_process: sspa:0x%x cust_encap_len=0x%x\n", sspa, custom_encap_len)); + + if ((pkt_offset) && (custom_encap_len >= 0)) { + *pkt_offset = custom_encap_len; + ret = 0; + } + + return ret; +} + + + +/** + * bksync_ptp_hw_tstamp_rx_time_upscale + * + * @dev_no: device number + * @ts: timestamp to be retrieved + * + * Description: this is a callback function to retrieve 64b equivalent of + * rx timestamp + */ +int bksync_ptp_hw_tstamp_rx_time_upscale(int dev_no, int port, struct sk_buff *skb, uint32_t *meta, uint64_t *ts) +{ + int ret = 0; + int custom_encap_len = 0; + uint16_t tpid = 0; + uint16_t msgtype_offset = 0; + int transport = network_transport; + int ptp_hdr_offset = 0, ptp_message_len = 0; + + if (!module_initialized || !ptp_priv || (ptp_priv->shared_addr == NULL)) { + return -1; + } + + DBG_RX_DUMP(("rxtime_upscale: Incoming packet: \n")); + if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(skb->data, skb->len); + + switch (KNET_SKB_CB(skb)->dcb_type) { + case 28: /* dpp */ + case 39: /* DNX - Q2A, J2C */ + break; + case 26: + case 32: + case 35: + case 37: + if (pci_cos != (meta[4] & 0x3F)) { + return -1; + } + break; + case 38: + if (pci_cos != ((meta[12] >> 22) & 0x2F)) { + return -1; + } + break; + case 36: + if (pci_cos != ((meta[6] >> 22) & 0x2F)) { + return -1; + } + break; + default: + DBG_ERR(("rxtime_upscale: Invalid dcb type\n")); + return -1; + } + + /* parse custom encap header in pkt for ptp rxtime */ + custom_encap_len = bksync_pkt_custom_encap_ptprx_get((skb->data), ts); + + /* Remove the custom encap header from pkt */ + if (custom_encap_len > 0) { + + skb_pull(skb, custom_encap_len); + + DBG_RX_DUMP(("rxtime_upscale: After removing custom encap: \n")); + if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(skb->data, skb->len); + + msgtype_offset = ptp_hdr_offset = 0; + tpid = SKB_U16_GET(skb, (12)); + if (tpid == 0x8100) { + msgtype_offset += 4; + ptp_hdr_offset += 4; + } + + /* Parse for nw transport */ + transport = bksync_ptp_transport_get(skb->data); + + switch(transport) + { + case 2: /* IEEE 802.3 */ + ptp_hdr_offset += 14; + break; + case 4: /* UDP IPv4 */ + ptp_hdr_offset += 42; + break; + case 6: /* UDP IPv6 */ + ptp_hdr_offset += 62; + break; + default: + ptp_hdr_offset += 42; + break; + } + + ptp_message_len = SKB_U16_GET(skb, (ptp_hdr_offset + 2)); + + DBG_RX(("rxtime_upscale: custom_encap_len %d tpid 0x%x transport %d skb->len %d ptp message type %d, ptp_message_len %d\n", + custom_encap_len, tpid, transport, skb->len, skb->data[msgtype_offset] & 0x0F, ptp_message_len)); + + /* Remove padding ,CRC from from L2 packet from returning to Linux Stack */ + if (DEVICE_IS_DNX && (transport == 2) ) { + skb_trim(skb, ptp_hdr_offset + ptp_message_len); + } + } + + if ((port > 0) && (port < BCMKSYNC_MAX_NUM_PORTS)) { + port -= 1; + ptp_priv->port_stats[port].pkt_rxctr += 1; + } + + return ret; +} + + +void bksync_hton64(u8 *buf, const uint64_t *data) +{ +#ifdef __LITTLE_ENDIAN + /* LITTLE ENDIAN */ + buf[0] = (*(((uint8_t*)(data)) + 7u)); + buf[1] = (*(((uint8_t*)(data)) + 6u)); + buf[2] = (*(((uint8_t*)(data)) + 5u)); + buf[3] = (*(((uint8_t*)(data)) + 4u)); + buf[4] = (*(((uint8_t*)(data)) + 3u)); + buf[5] = (*(((uint8_t*)(data)) + 2u)); + buf[6] = (*(((uint8_t*)(data)) + 1u)); + buf[7] = (*(((uint8_t*)(data)) + 0u)); +#else + memcpy(buf, data, 8); +#endif +} + +static void +bksync_dpp_otsh_update(struct sk_buff *skb, int hwts, int encap_type, int ptp_hdr_offset) +{ + + /* + * Type [47:46] type of OAM-TS extension. + * 0x0: OAM + * 0x1: 1588v2 + * 0x2: Latency-measurement + * 0x3: Reserved + * + * TP-Command [45:43] 1588v2 command + * 0x0: None + * 0x1: Stamp + * 0x2: Record (2 step, record Tx-TS in a FIFO) + * 0x3-0x7: Reserved + * + * TS-Encapsulation [42] 1588v2 Encapsulation + * 0x0: UDP + * 0x1: Non UDP + * + * OAM-TS-Data [33:32] OAM-TS-Data + * 0x1: In-PP-Port.External-BRCM-MAC + * + * OAM-TS-Data [31:0] + * Transparent or trapped 1588 events + * + * Rx-Time-Stamp + * Injected 1588v2 event from ARM/CPU: 0x0 + * + * Offset [7:0] ptp_hdr_offset + * Offset from end of System Headers to the start of the 1588v2 frame + * + */ + + /* PPH_TYPE = OAM-TS */ + skb->data[2] |= 0x80; + + /* OTSH.type = 1588v2 */ + skb->data[6] = 0x40; + + /* OTSH.tp_command = 1-step */ + switch (hwts) { + case HWTSTAMP_TX_ONESTEP_SYNC: + skb->data[6] |= ((0x1) << 3); + break; + default: + skb->data[6] |= ((0x2) << 3); + break; + } + + /* OTSH.encap_type = udp vs non-udp */ + skb->data[6] |= (((encap_type == 2) ? 1 : 0) << 2); + + /* In-PP-Port.External-BRCM-MAC = 1 */ + skb->data[6] |= (0x1 << 0); + + /* Timestamp: 0x0 */ + skb->data[7] = skb->data[8] = skb->data[9] = skb->data[10] = 0x0; + + skb->data[11] = ptp_hdr_offset; + + return; +} +/* IPv6 WAR to avoid H/W limitation of JR2x series devices */ +static void +bksync_dnx_ase1588_tsh_hdr_update_ipv6(struct sk_buff *skb, int hwts, int encap_type, int ptp_hdr_offset) +{ + /* Module Hdr [16] + PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] + Internal Hdr [12] + UDH base [1] */ + + ptp_hdr_offset = 0x1d; + switch(encap_type) + { + case 2: /* IEEE 802.3 */ + ptp_hdr_offset += 18; + break; + case 4: /* UDP IPv4 */ + ptp_hdr_offset += 46; + break; + case 6: /* UDP IPv6 */ + ptp_hdr_offset += 0x42; + break; + default: + ptp_hdr_offset += 46; + break; + } + + + /* ITMH */ + /* App Specific Ext Present ASE 1588*/ + skb->data [18] |= (0x1 << 3); + + /* PPH_TYPE - TSH + Internal Hdr */ + skb->data [18] |= (0x3 << 1); /* TSH + PPH Only */ + + /* ASE 1588 ext */ + skb->data [23] = skb->data [24] = skb->data [25] = skb->data [26] = 0x00; + + skb->data[27] = skb->data[28] = 0; + + /* OTSH.encap_type = udp vs non-udp - 1bit (15:15) */ + /* encap type - 2 L2, 4 & 6 UDP */ + skb->data[27] |= (((encap_type == 2) ? 1 : 0) << 7); + + /* ASE1588 1588v2 command - one step or two step 3bit (14:12) */ + /* ASE1588 1588v2 command should be zero for CF update */ + + /* offset to start of 1588v2 frame - 8 bit (11:4) */ + skb->data [27] = skb->data [27] | ((ptp_hdr_offset) & 0xf0) >> 4; + skb->data [28] = ((ptp_hdr_offset) & 0xf) << 4; + + /* ASE1588 type = 1588v2 - 4 bit (0:3) */ + skb->data [28] = skb->data [28] | 0x01; + + skb->data [29] = skb->data [30] = skb->data [31] = skb->data [32] = 0x00; + + /* Internal Header */ + skb->data [33] = skb->data [34] = skb->data [35] = skb->data [36] = 0x00; + skb->data [37] = skb->data [38] = skb->data [39] = skb->data [40] = 0x00; + skb->data [41] = skb->data [42] = skb->data [43] = skb->data [44] = 0x00; + + skb->data [44] = 0x42; + skb->data [43] = 0x07; + skb->data [42] = 0x10; + + /* UDH Base Hdr */ + skb->data [45] = 0; + + return; +} + +static void +bksync_dnx_ase1588_tsh_hdr_update(struct sk_buff *skb, int hwts, int encap_type, int ptp_hdr_offset) +{ + /* Module Hdr [16] + PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] */ + + /* ITMH */ + /* App Specific Ext Present */ + skb->data [18] |= (1 << 3); + + /* PPH_TYPE - TSH */ + skb->data [18] |= (0x2 << 1); + + /* ASE 1588 ext */ + skb->data [23] = skb->data [24] = skb->data [25] = skb->data [26] = 0x00; + + skb->data[27] = skb->data[28] = 0; + + /* OTSH.encap_type = udp vs non-udp - 1bit (15:15) */ + /* encap type - 2 L2, 4 & 6 UDP */ + skb->data[27] |= (((encap_type == 2) ? 1 : 0) << 7); + + /* ASE1588 1588v2 command - one step or two step 3bit (14:12) */ + switch (hwts) { + case HWTSTAMP_TX_ONESTEP_SYNC: + skb->data[27] |= ((0x1) << 4); + break; + default: + skb->data[27] |= ((0x2) << 4); + break; + } + + /* offset to start of 1588v2 frame - 8 bit (11:4) */ + skb->data [27] = skb->data [27] | ((ptp_hdr_offset) & 0xf0) >> 4; + skb->data [28] = ((ptp_hdr_offset) & 0xf) << 4; + + /* ASE1588 type = 1588v2 - 4 bit (0:3) */ + skb->data [28] = skb->data [28] | 0x01; + + /* TSH Timestamp: 0x0 */ + skb->data [29] = skb->data [30] = skb->data [31] = skb->data [32] = 0x00; + + return; +} + + + +int bksync_ptp_hw_tstamp_tx_meta_get(int dev_no, + int hwts, int hdrlen, + struct sk_buff *skb, + uint64_t *tstamp, + u32 **md) +{ + uint16_t tpid = 0, ethertype; + int md_offset = 0; + int pkt_offset = 0; + int ptp_hdr_offset = 0; + int transport = network_transport; + s64 ptptime = 0; + s64 ptpcounter = 0; + int64_t corrField; + int32_t negCurTS32; + int64_t negCurTS64; + + if (!module_initialized || !ptp_priv || (ptp_priv->shared_addr == NULL)) { + return 0; + } + + + if (ptp_priv->ptp_pair_lock == 1) { + /* use alternate pair when main dataset is being updated */ + ptptime = ptp_priv->shared_addr->ptptime_alt; + ptpcounter = ptp_priv->shared_addr->reftime_alt; + } else { + ptptime = ptp_priv->shared_addr->ptptime; + ptpcounter = ptp_priv->shared_addr->reftime; + } + + negCurTS32 = - (int32_t) ptpcounter; + negCurTS64 = - (int64_t)(ptpcounter); + + if (CMICX_DEV_TYPE || DEVICE_IS_DPP) { + pkt_offset = ptp_hdr_offset = hdrlen; + } + + /* Need to check VLAN tag if packet is tagged */ + tpid = SKB_U16_GET(skb, (pkt_offset + 12)); + if (tpid == 0x8100) { + md_offset = 4; + ptp_hdr_offset += 4; + + if (DEVICE_IS_DNX && vnptp_l2hdr_vlan_prio != 0) { + ethertype = SKB_U16_GET(skb, hdrlen + 12 + 4); + if (ethertype == 0x88F7 || ethertype == 0x0800 || ethertype == 0x86DD) { + if (skb->data[hdrlen + 14] == 0x00) { + skb->data[hdrlen + 14] |= (vnptp_l2hdr_vlan_prio << 5); + } + } + } + } + + /* One Step Meta Data */ + if (hwts == HWTSTAMP_TX_ONESTEP_SYNC) { + md_offset += 8; + switch (KNET_SKB_CB(skb)->dcb_type) { + case 26: + corrField = (((int64_t)negCurTS32) << 16); + if (negCurTS32 >= 0) { + md_offset += 8; + } + break; + default: + corrField = (((int64_t)negCurTS64) << 16); + break; + } + } + + + /* Parse for nw transport */ + if (transport == 0) { + transport = bksync_ptp_transport_get(skb->data + pkt_offset); + } + + switch(transport) + { + case 2: /* IEEE 802.3 */ + ptp_hdr_offset += 14; + if (KNET_SKB_CB(skb)->dcb_type == 32) { + if (md) *md = &sobmhrawpkts_dcb32[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 26) { + if (md) *md = &sobmhrawpkts_dcb26[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 35) { + if (md) *md = &sobmhrawpkts_dcb35[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 36) { + if (md) *md = &sobmhrawpkts_dcb36[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 38) { + if (md) *md = &sobmhrawpkts_dcb38[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 37) { + if (md) *md = &sobmhrawpkts_dcb37[md_offset]; + } + break; + case 4: /* UDP IPv4 */ + ptp_hdr_offset += 42; + if (KNET_SKB_CB(skb)->dcb_type == 32) { + if (md) *md = &sobmhudpipv4_dcb32[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 26) { + if (md) *md = &sobmhudpipv4_dcb26[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 35) { + if (md) *md = &sobmhudpipv4_dcb35[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 36) { + if (md) *md = &sobmhudpipv4_dcb36[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 38) { + if (md) *md = &sobmhudpipv4_dcb38[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 37) { + if (md) *md = &sobmhudpipv4_dcb37[md_offset]; + } + break; + case 6: /* UDP IPv6 */ + ptp_hdr_offset += 62; + if (KNET_SKB_CB(skb)->dcb_type == 32) { + if (md) *md = &sobmhudpipv6_dcb32[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 26) { + if (md) *md = &sobmhudpipv6_dcb26[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 35) { + if (md) *md = &sobmhudpipv6_dcb35[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 36) { + if (md) *md = &sobmhudpipv6_dcb36[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 38) { + if (md) *md = &sobmhudpipv6_dcb38[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 37) { + if (md) *md = &sobmhudpipv6_dcb37[md_offset]; + } + break; + default: + ptp_hdr_offset += 42; + if (KNET_SKB_CB(skb)->dcb_type == 32) { + if (md) *md = &sobmhudpipv4_dcb32[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 26) { + if (md) *md = &sobmhudpipv4_dcb26[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 35) { + if (md) *md = &sobmhudpipv4_dcb35[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 36) { + if (md) *md = &sobmhudpipv4_dcb36[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 38) { + if (md) *md = &sobmhudpipv4_dcb38[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 37) { + if (md) *md = &sobmhudpipv4_dcb37[md_offset]; + } + break; + } + + if (DEVICE_IS_DPP && (hdrlen > (BKN_DNX_PTCH_2_SIZE))) { + DBG_TX_DUMP(("hw_tstamp_tx_meta_get: Before OTSH updates\n")); + if (debug & DBG_LVL_TX_DUMP) dbg_dump_pkt(skb->data, skb->len); + + DBG_TX(("hw_tstamp_tx_meta_get: Before: ptch[0]: 0x%x ptch[1]: 0x%x itmh[0]: 0x%x " + "oam-ts[0]: 0x%x pkt[0]:0x%x\n", skb->data[0], skb->data[1], skb->data[2], + skb->data[6], skb->data[12])); + + bksync_dpp_otsh_update(skb, hwts, transport, (ptp_hdr_offset - pkt_offset)); + + DBG_TX(("hw_tstamp_tx_meta_get: After : ptch[0]: 0x%x itmh[0]: 0x%x oam-ts[0]: 0x%x " + "pkt[0]:0x%x\n", skb->data[0], skb->data[2], skb->data[6], skb->data[12])); + + DBG_TX_DUMP(("hw_tstamp_tx_meta_get: After OTSH updates\n")); + if (debug & DBG_LVL_TX_DUMP) dbg_dump_pkt(skb->data, skb->len); + } else if (DEVICE_IS_DNX && (hdrlen > (BKN_DNX_PTCH_2_SIZE))) { + + switch(transport) + { + case 6: /* UDP IPv6 */ + bksync_dnx_ase1588_tsh_hdr_update_ipv6(skb, hwts, transport, (ptp_hdr_offset - pkt_offset)); + break; + case 4: /* UDP IPv4 */ + case 2: /* IEEE 802.3 */ + default: + bksync_dnx_ase1588_tsh_hdr_update(skb, hwts, transport, (ptp_hdr_offset - pkt_offset)); + break; + } + } + + DBG_TX(("hw_tstamp_tx_meta_get: ptptime: 0x%llx ptpcounter: 0x%llx\n", ptptime, ptpcounter)); + + DBG_TX(("hw_tstamp_tx_meta_get: ptpmessage type: 0x%x hwts: %d\n", skb->data[ptp_hdr_offset] & 0x0f, hwts)); + + + if ((hwts == HWTSTAMP_TX_ONESTEP_SYNC) && + (BKSYNC_PTP_EVENT_MSG((skb->data[ptp_hdr_offset] & 0x0F)))) { + /* One Step Timestamp Field updation */ + int port; + int corr_offset = ptp_hdr_offset + 8; + int origin_ts_offset = ptp_hdr_offset + 34; + u32 tmp; + struct timespec64 ts = {0}; + int udp_csum_regen; + u32 udp_csum20; + u16 udp_csum; + + udp_csum = SKB_U16_GET(skb, (ptp_hdr_offset - 2)); + + switch (transport) { + case 2: + udp_csum_regen = 0; + break; + case 6: + udp_csum_regen = 1; + break; + default: + udp_csum_regen = (udp_csum != 0x0); + break; + } + + /* Fill the correction field */ + bksync_hton64(&(skb->data[corr_offset]), (const u64 *)&corrField); + + /* Fill the Origin Timestamp Field */ + ts = ns_to_timespec64(ptptime); + + tmp = (ts.tv_sec >> 32); + skb->data[origin_ts_offset + 0] = ((tmp >> 8) & 0xFF); + skb->data[origin_ts_offset + 1] = ((tmp ) & 0xFF); + + tmp = (ts.tv_sec & 0xFFFFFFFFLL); + skb->data[origin_ts_offset + 2] = ((tmp >> 24) & 0xFF); + skb->data[origin_ts_offset + 3] = ((tmp >> 16) & 0xFF); + skb->data[origin_ts_offset + 4] = ((tmp >> 8) & 0xFF); + skb->data[origin_ts_offset + 5] = ((tmp ) & 0xFF); + + tmp = (ts.tv_nsec & 0xFFFFFFFFLL); + skb->data[origin_ts_offset + 6] = ((tmp >> 24) & 0xFF); + skb->data[origin_ts_offset + 7] = ((tmp >> 16) & 0xFF); + skb->data[origin_ts_offset + 8] = ((tmp >> 8) & 0xFF); + skb->data[origin_ts_offset + 9] = ((tmp ) & 0xFF); + + if (udp_csum_regen) { + udp_csum20 = (~udp_csum) & 0xFFFF; + + udp_csum20 += SKB_U16_GET(skb, (corr_offset + 0)); + udp_csum20 += SKB_U16_GET(skb, (corr_offset + 2)); + udp_csum20 += SKB_U16_GET(skb, (corr_offset + 4)); + udp_csum20 += SKB_U16_GET(skb, (corr_offset + 6)); + + udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 0)); + udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 2)); + udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 4)); + udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 6)); + udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 8)); + + /* Fold 20bit checksum into 16bit udp checksum */ + udp_csum20 = ((udp_csum20 & 0xFFFF) + (udp_csum20 >> 16)); + udp_csum = ((udp_csum20 & 0xFFFF) + (udp_csum20 >> 16)); + + /* invert again to get final checksum. */ + udp_csum = ~udp_csum; + if (udp_csum == 0) { + udp_csum = 0xFFFF; + } + + skb->data[ptp_hdr_offset - 2] = ((udp_csum >> 8) & 0xFF); + skb->data[ptp_hdr_offset - 1] = ((udp_csum ) & 0xFF); + } + + if ((skb->data[ptp_hdr_offset] & 0x0F) == IEEE1588_MSGTYPE_DELREQ) { + *tstamp = ptptime; + } + + DBG_TX(("hw_tstamp_tx_meta_get: ptp msg type %d packet tstamp : 0x%llx corrField: 0x%llx\n", + (skb->data[ptp_hdr_offset] & 0x0F), ptptime, corrField)); + + port = KNET_SKB_CB(skb)->port; + if ((port > 0) && (port < BCMKSYNC_MAX_NUM_PORTS)) { + port -= 1; + ptp_priv->port_stats[port].pkt_txonestep += 1; + } + } + + DBG_TX_DUMP(("hw_tstamp_tx_meta_get: PTP Packet\n")); + if (debug & DBG_LVL_TX_DUMP) dbg_dump_pkt(skb->data, skb->len); + + return 0; +} + + +int bksync_ptp_hw_tstamp_ptp_clock_index_get(int dev_no) +{ + int phc_index = -1; + + if (!module_initialized || !ptp_priv) { + return phc_index; + } + + if (ptp_priv && ptp_priv->ptp_clock) + phc_index = ptp_clock_index(ptp_priv->ptp_clock); + + return phc_index; +} + + +/** +* bcm_ptp_time_keep - call timecounter_read every second to avoid timer overrun +* because a 32bit counter, will timeout in 4s +*/ +static void bksync_ptp_time_keep(struct work_struct *work) +{ + struct delayed_work *dwork = to_delayed_work(work); + struct bksync_ptp_priv *priv = + container_of(dwork, struct bksync_ptp_priv, time_keep); + struct timespec64 ts; + + /* Call bcm_ptp_gettime function to keep the ref_time_64 and ref_counter_48 in sync */ + bksync_ptp_gettime(&(priv->ptp_caps), &ts); + schedule_delayed_work(&priv->time_keep, __msecs_to_jiffies(phc_update_intv_msec)); +} + +static void bksync_ptp_time_keep_init(void) +{ + if (!ptp_priv->timekeep_status) { + INIT_DELAYED_WORK(&(ptp_priv->time_keep), bksync_ptp_time_keep); + schedule_delayed_work(&ptp_priv->time_keep, __msecs_to_jiffies(phc_update_intv_msec)); + + ptp_priv->timekeep_status = 1; + } + + return; +} + +static void bksync_ptp_time_keep_deinit(void) +{ + if (ptp_priv->timekeep_status) { + /* Cancel delayed work */ + cancel_delayed_work_sync(&(ptp_priv->time_keep)); + + ptp_priv->timekeep_status = 0; + } + + return; +} + +/* PTP_EXTTS logging */ +static void bksync_ptp_extts_logging(struct work_struct *work) +{ + struct delayed_work *dwork = to_delayed_work(work); + struct bksync_ptp_priv *priv = container_of(dwork, struct bksync_ptp_priv, extts_logging); + struct ptp_clock_event event; + int event_id = -1; + int head = -1, tail = -1; + + if (!module_initialized || ptp_priv->extts_log == NULL) + goto exit; + + DBG_VERB(("Queue overflow state:%u\n", ptp_priv->extts_log->overflow)); + + tail = (int)ptp_priv->extts_log->tail; + head = ptp_priv->extts_event.head; + + head = (head + 1) % NUM_EVENT_TS; + while (tail != head) { + switch (ptp_priv->extts_log->event_ts[head].ts_event_id) { + /* Map FW event_id to EXTTS event_id */ + case TS_EVENT_GPIO_1: + event_id = 0; + break; + case TS_EVENT_GPIO_2: + event_id = 1; + break; + case TS_EVENT_GPIO_3: + event_id = 2; + break; + case TS_EVENT_GPIO_4: + event_id = 3; + break; + case TS_EVENT_GPIO_5: + event_id = 4; + break; + case TS_EVENT_GPIO_6: + event_id = 5; + break; + } + + if (event_id < 0 || ptp_priv->extts_event.enable[event_id] != 1) { + memset((void *)&(ptp_priv->extts_log->event_ts[head]), 0, sizeof(ptp_priv->extts_log->event_ts[head])); + + ptp_priv->extts_event.head = head; + ptp_priv->extts_log->head = head; + + head = (head + 1) % NUM_EVENT_TS; + continue; + } + + event.type = PTP_CLOCK_EXTTS; + event.index = event_id; + event.timestamp = ((s64)ptp_priv->extts_log->event_ts[head].tstamp.sec * 1000000000) + ptp_priv->extts_log->event_ts[head].tstamp.nsec; + ptp_clock_event(ptp_priv->ptp_clock, &event); + + ptp_priv->extts_event.head = head; + ptp_priv->extts_log->head = head; + + head = (head + 1) % NUM_EVENT_TS; + } +exit: + schedule_delayed_work(&priv->extts_logging, __msecs_to_jiffies(100)); +} + +static void bksync_ptp_extts_logging_init(void) +{ + INIT_DELAYED_WORK(&(ptp_priv->extts_logging), bksync_ptp_extts_logging); + schedule_delayed_work(&ptp_priv->extts_logging, __msecs_to_jiffies(100)); +} + +static void bksync_ptp_extts_logging_deinit(void) +{ + cancel_delayed_work_sync(&(ptp_priv->extts_logging)); +} + +static int bksync_ptp_init(struct ptp_clock_info *ptp) +{ + int ret = -1; + u64 subcmd, subcmd_data; + + ret = bksync_cmd_go(BKSYNC_INIT, NULL, NULL); + DBG_VERB(("bksync_ptp_init: BKSYNC_INIT; rv:%d\n", ret)); + if (ret < 0) goto err_exit; + ptp_sleep(1); + + if (!DEVICE_IS_DPP && !DEVICE_IS_DNX) { + return 0; + } + + subcmd = KSYNC_SYSINFO_UC_PORT_NUM; + subcmd_data = (ptp_priv->bksync_init_info).uc_port_num; + ret = bksync_cmd_go(BKSYNC_SYSINFO, &subcmd, &subcmd_data); + DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + if (ret < 0) goto err_exit; + + subcmd = KSYNC_SYSINFO_UC_PORT_SYSPORT; + subcmd_data = (ptp_priv->bksync_init_info).uc_port_sysport; + ret = bksync_cmd_go(BKSYNC_SYSINFO, &subcmd, &subcmd_data); + DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + if (ret < 0) goto err_exit; + + subcmd = KSYNC_SYSINFO_HOST_CPU_PORT; + subcmd_data = (ptp_priv->bksync_init_info).host_cpu_port; + ret = bksync_cmd_go(BKSYNC_SYSINFO, &subcmd, &subcmd_data); + DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + if (ret < 0) goto err_exit; + + subcmd = KSYNC_SYSINFO_HOST_CPU_SYSPORT; + subcmd_data = (ptp_priv->bksync_init_info).host_cpu_sysport; + ret = bksync_cmd_go(BKSYNC_SYSINFO, &subcmd, &subcmd_data); + DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + if (ret < 0) goto err_exit; + + subcmd = KSYNC_SYSINFO_UDH_LEN; + subcmd_data = (ptp_priv->bksync_init_info).udh_len; + ret = bksync_cmd_go(BKSYNC_SYSINFO, &subcmd, &subcmd_data); + DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + if (ret < 0) goto err_exit; + + +err_exit: + return ret; +} + +static int bksync_ptp_deinit(struct ptp_clock_info *ptp) +{ + int ret = -1; + + bksync_ptp_time_keep_deinit(); + + ret = bksync_cmd_go(BKSYNC_DEINIT, NULL, NULL); + DBG_VERB(("bksync_ptp_deinit: rv:%d\n", ret)); + + return ret; +} + +static int bksync_broadsync_cmd(int bs_id) +{ + int ret = -1; + u64 subcmd, subcmd_data; + + subcmd = (bs_id == 0) ? KSYNC_BROADSYNC_BS0_CONFIG : KSYNC_BROADSYNC_BS1_CONFIG; + + subcmd_data = ((ptp_priv->bksync_bs_info[bs_id]).enable & 0x1); + subcmd_data |= (((ptp_priv->bksync_bs_info[bs_id]).mode & 0x1) << 8); + subcmd_data |= ((ptp_priv->bksync_bs_info[bs_id]).hb << 16); + subcmd_data |= (((u64)(ptp_priv->bksync_bs_info[bs_id]).bc) << 32); + + ret = bksync_cmd_go(BKSYNC_BROADSYNC, &subcmd, &subcmd_data); + DBG_VERB(("bksync_broadsync_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + + return ret; +} + +static int bksync_broadsync_status_cmd(int bs_id, u64 *status) +{ + int ret = -1; + u64 subcmd; + + subcmd = (bs_id == 0) ? KSYNC_BROADSYNC_BS0_STATUS_GET : KSYNC_BROADSYNC_BS1_STATUS_GET; + + ret = bksync_cmd_go(BKSYNC_BROADSYNC, &subcmd, status); + DBG_VERB(("bksync_broadsync_status_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, *status, ret)); + + return ret; +} + +static int bksync_gpio_cmd(int gpio_num) +{ + int ret = -1; + u64 subcmd, subcmd_data; + + switch (gpio_num) { + case 0: + subcmd = KSYNC_GPIO_0; + break; + case 1: + subcmd = KSYNC_GPIO_1; + break; + case 2: + subcmd = KSYNC_GPIO_2; + break; + case 3: + subcmd = KSYNC_GPIO_3; + break; + case 4: + subcmd = KSYNC_GPIO_4; + break; + case 5: + subcmd = KSYNC_GPIO_5; + break; + default: + return ret; + } + + subcmd_data = ((ptp_priv->bksync_gpio_info[gpio_num]).enable & 0x1); + subcmd_data |= (((ptp_priv->bksync_gpio_info[gpio_num]).mode & 0x1) << 8); + subcmd_data |= ((u64)((ptp_priv->bksync_gpio_info[gpio_num]).period) << 16); + + ret = bksync_cmd_go(BKSYNC_GPIO, &subcmd, &subcmd_data); + DBG_VERB(("bksync_gpio_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + + return ret; +} + +static int bksync_gpio_phaseoffset_cmd(int gpio_num) +{ + int ret = -1; + u64 subcmd, subcmd_data; + + switch (gpio_num) { + case 0: + subcmd = KSYNC_GPIO_0; + break; + case 1: + subcmd = KSYNC_GPIO_1; + break; + case 2: + subcmd = KSYNC_GPIO_2; + break; + case 3: + subcmd = KSYNC_GPIO_3; + break; + case 4: + subcmd = KSYNC_GPIO_4; + break; + case 5: + subcmd = KSYNC_GPIO_5; + break; + default: + return ret; + } + + subcmd_data = (ptp_priv->bksync_gpio_info[gpio_num]).phaseoffset; + ret = bksync_cmd_go(BKSYNC_GPIO_PHASEOFFSET, &subcmd, &subcmd_data); + DBG_VERB(("bksync_gpio_phaseoffset_cmd: subcmd: 0x%llx " + "subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + + return ret; +} + + + +static int bksync_evlog_cmd(int event, int enable) +{ + int ret; + int addr_offset; + u64 subcmd = 0, subcmd_data = 0; + bksync_evlog_t tmp; + + subcmd = event; + addr_offset = ((u8 *)&(tmp.event_timestamps[event]) - (u8 *)&(tmp.event_timestamps[0])); + + if (enable) { + subcmd_data = (ptp_priv->dma_mem + addr_offset); + } else { + subcmd_data = 0; + } + + ret = bksync_cmd_go(BKSYNC_EVLOG, &subcmd, &subcmd_data); + DBG_VERB(("bksync_evlog_cmd: subcmd: 0x%llx subcmd_data: 0x%llx rv:%d\n", subcmd, subcmd_data, ret)); + + return ret; +} + + +/* + * Device Debug Statistics Proc Entry + */ +/** +* This function is called at the beginning of a sequence. +* ie, when: +* - the /proc/bcm/ksync/stats file is read (first time) +* - after the function stop (end of sequence) +* +*/ +static void *bksync_proc_seq_start(struct seq_file *s, loff_t *pos) +{ + /* beginning a new sequence ? */ + if ( (int)*pos == 0 && ptp_priv->shared_addr != NULL) + { + seq_printf(s, "TwoStep Port Bitmap : %08llx%08llx\n", + (uint64_t)(ptp_priv->shared_addr->portmap[1]), + (uint64_t)(ptp_priv->shared_addr->portmap[0])); + seq_printf(s,"%4s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s\n", + "Port", "RxCounter", "TxCounter", "TxOneStep", "TSTimeout", "TSRead", "TSMatch", "TSDiscard", + "TimeHi" , "TimeLo", "TimeAvg", "FIFORx"); + } + + if ((int)*pos < (ptp_priv->num_pports)) + return (void *)(unsigned long)(*pos + 1); + /* End of the sequence, return NULL */ + return NULL; + } + +/** +* This function is called after the beginning of a sequence. +* It's called untill the return is NULL (this ends the sequence). +* +*/ +static void *bksync_proc_seq_next(struct seq_file *s, void *v, loff_t *pos) +{ + (*pos)++; + return bksync_proc_seq_start(s, pos); +} +/** +* This function is called at the end of a sequence +* +*/ +static void bksync_proc_seq_stop(struct seq_file *s, void *v) +{ + /* nothing to do, we use a static value in bksync_proc_seq_start() */ +} + +/** +* This function is called for each "step" of a sequence +* +*/ +static int bksync_proc_seq_show(struct seq_file *s, void *v) +{ + unsigned long port = (unsigned long)v; + + if ((port > 0) && (port < BCMKSYNC_MAX_NUM_PORTS)) { + + port = port - 1; + if (ptp_priv->port_stats[port].pkt_rxctr || ptp_priv->port_stats[port].pkt_txctr || + ptp_priv->port_stats[port].pkt_txonestep|| + ptp_priv->port_stats[port].tsts_discard || ptp_priv->port_stats[port].tsts_timeout || + ptp_priv->shared_addr->port_ts_data[port].ts_cnt || ptp_priv->port_stats[port].tsts_match) { + seq_printf(s, "%4lu | %9d| %9d| %9d| %9d| %9d| %9d| %9d| %9lld| %9lld | %9d|%9d | %s\n", (port + 1), + ptp_priv->port_stats[port].pkt_rxctr, + ptp_priv->port_stats[port].pkt_txctr, + ptp_priv->port_stats[port].pkt_txonestep, + ptp_priv->port_stats[port].tsts_timeout, + ptp_priv->shared_addr->port_ts_data[port].ts_cnt, + ptp_priv->port_stats[port].tsts_match, + ptp_priv->port_stats[port].tsts_discard, + ptp_priv->port_stats[port].tsts_worst_fetch_time, + ptp_priv->port_stats[port].tsts_best_fetch_time, + ptp_priv->port_stats[port].tsts_avg_fetch_time, + ptp_priv->port_stats[port].fifo_rxctr, + ptp_priv->port_stats[port].pkt_txctr != ptp_priv->port_stats[port].tsts_match ? "***":""); + } + } + return 0; +} + +/** +* seq_operations for bsync_proc_*** entries +* +*/ +static struct seq_operations bksync_proc_seq_ops = { + .start = bksync_proc_seq_start, + .next = bksync_proc_seq_next, + .stop = bksync_proc_seq_stop, + .show = bksync_proc_seq_show +}; + +static int bksync_proc_txts_open(struct inode * inode, struct file * file) +{ + return seq_open(file, &bksync_proc_seq_ops); +} + +static ssize_t +bksync_proc_txts_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + char debug_str[40]; + char *ptr; + int port; + + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + if ((ptr = strstr(debug_str, "clear")) != NULL) { + for (port = 0; port < ptp_priv->num_pports; port++) { + ptp_priv->port_stats[port].pkt_rxctr = 0; + ptp_priv->port_stats[port].pkt_txctr = 0; + ptp_priv->port_stats[port].pkt_txonestep = 0; + ptp_priv->port_stats[port].tsts_timeout = 0; + ptp_priv->port_stats[port].tsts_match = 0; + ptp_priv->port_stats[port].tsts_discard = 0; + if (ptp_priv->shared_addr) + ptp_priv->shared_addr->port_ts_data[port].ts_cnt = 0; + } + } else { + DBG_ERR(("Warning: unknown input\n")); + } + + return count; +} + +struct proc_ops bksync_proc_txts_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bksync_proc_txts_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = bksync_proc_txts_write, + .proc_release = seq_release, +}; + +/* + * Driver Debug Proc Entry + */ +static int +bksync_proc_debug_show(struct seq_file *m, void *v) +{ + seq_printf(m, "Configuration:\n"); + seq_printf(m, " debug: 0x%x\n", debug); + return 0; +} + +static ssize_t +bksync_proc_debug_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + char debug_str[40]; + char *ptr; + + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + if ((ptr = strstr(debug_str, "debug=")) != NULL) { + ptr += 6; + debug = simple_strtol(ptr, NULL, 0); + } else { + DBG_ERR(("Warning: unknown configuration\n")); + } + + return count; +} + +static int bksync_proc_debug_open(struct inode * inode, struct file * file) +{ + return single_open(file, bksync_proc_debug_show, NULL); +} + +struct proc_ops bksync_proc_debug_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bksync_proc_debug_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = bksync_proc_debug_write, + .proc_release = single_release, +}; + +static int +bksync_proc_init(void) +{ + struct proc_dir_entry *entry; + + PROC_CREATE(entry, "stats", 0666, bksync_proc_root, &bksync_proc_txts_file_ops); + if (entry == NULL) { + return -1; + } + PROC_CREATE(entry, "debug", 0666, bksync_proc_root, &bksync_proc_debug_file_ops); + if (entry == NULL) { + return -1; + } + return 0; +} + +static int +bksync_proc_cleanup(void) +{ + remove_proc_entry("stats", bksync_proc_root); + remove_proc_entry("debug", bksync_proc_root); + return 0; +} + + +#define ATTRCMP(x) (0 == strcmp(attr->attr.name, #x)) + +static int rd_iter=0, wr_iter=0; +static ssize_t bs_attr_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, + size_t bytes) +{ + ssize_t ret; + u32 enable, mode; + u32 bc, hb; + + if (ATTRCMP(bs0)) { + ret = sscanf(buf, "enable:%d mode:%d bc:%u hb:%u", &enable, &mode, &bc, &hb); + DBG_VERB(("rd:%d bs0: enable:%d mode:%d bc:%d hb:%d\n", rd_iter++, enable, mode, bc, hb)); + ptp_priv->bksync_bs_info[0].enable = enable; + ptp_priv->bksync_bs_info[0].mode = mode; + ptp_priv->bksync_bs_info[0].bc = bc; + ptp_priv->bksync_bs_info[0].hb = hb; + + (void)bksync_broadsync_cmd(0); + } else if (ATTRCMP(bs1)) { + ret = sscanf(buf, "enable:%d mode:%d bc:%u hb:%u", &enable, &mode, &bc, &hb); + DBG_VERB(("rd:%d bs1: enable:%d mode:%d bc:%d hb:%d\n", rd_iter++, enable, mode, bc, hb)); + ptp_priv->bksync_bs_info[1].enable = enable; + ptp_priv->bksync_bs_info[1].mode = mode; + ptp_priv->bksync_bs_info[1].bc = bc; + ptp_priv->bksync_bs_info[1].hb = hb; + + (void)bksync_broadsync_cmd(1); + } else { + ret = -ENOENT; + } + + return (ret == -ENOENT) ? ret : bytes; +} + +static ssize_t bs_attr_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + ssize_t bytes; + u64 status = 0; + u32 variance = 0; + + if (ATTRCMP(bs0)) { + + if(ptp_priv->bksync_bs_info[0].enable) { + (void)bksync_broadsync_status_cmd(0, &status); + } + + variance = (status >> 32); + status = (status & 0xFFFFFFFF); + bytes = sprintf(buf, "enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n", + ptp_priv->bksync_bs_info[0].enable, + ptp_priv->bksync_bs_info[0].mode, + ptp_priv->bksync_bs_info[0].bc, + ptp_priv->bksync_bs_info[0].hb, + (u32)status, + variance); + DBG_VERB(("wr:%d bs0: enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n", + wr_iter++, + ptp_priv->bksync_bs_info[0].enable, + ptp_priv->bksync_bs_info[0].mode, + ptp_priv->bksync_bs_info[0].bc, + ptp_priv->bksync_bs_info[0].hb, + (u32)status, + variance)); + } else if (ATTRCMP(bs1)) { + + if(ptp_priv->bksync_bs_info[1].enable) { + (void)bksync_broadsync_status_cmd(1, &status); + } + + variance = (status >> 32); + status = (status & 0xFFFFFFFF); + bytes = sprintf(buf, "enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n", + ptp_priv->bksync_bs_info[1].enable, + ptp_priv->bksync_bs_info[1].mode, + ptp_priv->bksync_bs_info[1].bc, + ptp_priv->bksync_bs_info[1].hb, + (u32)status, + variance); + DBG_VERB(("wr:%d bs1: enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n", + wr_iter++, + ptp_priv->bksync_bs_info[1].enable, + ptp_priv->bksync_bs_info[1].mode, + ptp_priv->bksync_bs_info[1].bc, + ptp_priv->bksync_bs_info[1].hb, + (u32)status, + variance)); + } else { + bytes = -ENOENT; + } + + return bytes; +} + +#define BS_ATTR(x) \ + static struct kobj_attribute x##_attribute = \ + __ATTR(x, 0664, bs_attr_show, bs_attr_store); + +BS_ATTR(bs0) +BS_ATTR(bs1) + +#define BS_ATTR_LIST(x) & x ## _attribute.attr +static struct attribute *bs_attrs[] = { + BS_ATTR_LIST(bs0), + BS_ATTR_LIST(bs1), + NULL, /* terminator */ +}; + +static struct attribute_group bs_attr_group = { + .name = "broadsync", + .attrs = bs_attrs, +}; + + +static int gpio_rd_iter=0, gpio_wr_iter=0; +static ssize_t gpio_attr_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, + size_t bytes) +{ + ssize_t ret; + int gpio; + u32 enable, mode; + u32 period; + int64_t phaseoffset; + + if (ATTRCMP(gpio0)) { + gpio = 0; + } else if (ATTRCMP(gpio1)) { + gpio = 1; + } else if (ATTRCMP(gpio2)) { + gpio = 2; + } else if (ATTRCMP(gpio3)) { + gpio = 3; + } else if (ATTRCMP(gpio4)) { + gpio = 4; + } else if (ATTRCMP(gpio5)) { + gpio = 5; + } else { + return -ENOENT; + } + + + ret = sscanf(buf, "enable:%d mode:%d period:%u phaseoffset:%lld", &enable, &mode, &period, &phaseoffset); + DBG_VERB(("rd:%d gpio%d: enable:%d mode:%d period:%d phaseoffset:%lld\n", gpio_rd_iter++, gpio, enable, mode, period, phaseoffset)); + ptp_priv->bksync_gpio_info[gpio].enable = enable; + ptp_priv->bksync_gpio_info[gpio].mode = mode; + ptp_priv->bksync_gpio_info[gpio].period = period; + + (void)bksync_gpio_cmd(gpio); + + if (ptp_priv->bksync_gpio_info[gpio].phaseoffset != phaseoffset) { + ptp_priv->bksync_gpio_info[gpio].phaseoffset = phaseoffset; + (void)bksync_gpio_phaseoffset_cmd(gpio); + } + + return (ret == -ENOENT) ? ret : bytes; +} + +static ssize_t gpio_attr_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + ssize_t bytes; + int gpio; + + if (ATTRCMP(gpio0)) { + gpio = 0; + } else if (ATTRCMP(gpio1)) { + gpio = 1; + } else if (ATTRCMP(gpio2)) { + gpio = 2; + } else if (ATTRCMP(gpio3)) { + gpio = 3; + } else if (ATTRCMP(gpio4)) { + gpio = 4; + } else if (ATTRCMP(gpio5)) { + gpio = 5; + } else { + return -ENOENT; + } + + bytes = sprintf(buf, "enable:%d mode:%d period:%u phaseoffset:%lld\n", + ptp_priv->bksync_gpio_info[gpio].enable, + ptp_priv->bksync_gpio_info[gpio].mode, + ptp_priv->bksync_gpio_info[gpio].period, + ptp_priv->bksync_gpio_info[gpio].phaseoffset); + DBG_VERB(("wr:%d gpio%d: enable:%d mode:%d period:%u phaseoffset:%lld\n", + gpio_wr_iter++, gpio, + ptp_priv->bksync_gpio_info[gpio].enable, + ptp_priv->bksync_gpio_info[gpio].mode, + ptp_priv->bksync_gpio_info[gpio].period, + ptp_priv->bksync_gpio_info[gpio].phaseoffset)); + + return bytes; +} + +#define GPIO_ATTR(x) \ + static struct kobj_attribute x##_attribute = \ + __ATTR(x, 0664, gpio_attr_show, gpio_attr_store); + +GPIO_ATTR(gpio0) +GPIO_ATTR(gpio1) +GPIO_ATTR(gpio2) +GPIO_ATTR(gpio3) +GPIO_ATTR(gpio4) +GPIO_ATTR(gpio5) + +#define GPIO_ATTR_LIST(x) & x ## _attribute.attr +static struct attribute *gpio_attrs[] = { + GPIO_ATTR_LIST(gpio0), + GPIO_ATTR_LIST(gpio1), + GPIO_ATTR_LIST(gpio2), + GPIO_ATTR_LIST(gpio3), + GPIO_ATTR_LIST(gpio4), + GPIO_ATTR_LIST(gpio5), + NULL, /* terminator */ +}; + +static struct attribute_group gpio_attr_group = { + .name = "gpio", + .attrs = gpio_attrs, +}; + + + +static ssize_t evlog_attr_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, + size_t bytes) +{ + ssize_t ret; + int event, enable; + + if (ATTRCMP(cpu)) { + event = 0; + } else if (ATTRCMP(bs0)) { + event = 1; + } else if (ATTRCMP(bs1)) { + event = 2; + } else if (ATTRCMP(gpio0)) { + event = 3; + } else if (ATTRCMP(gpio1)) { + event = 4; + } else if (ATTRCMP(gpio2)) { + event = 5; + } else if (ATTRCMP(gpio3)) { + event = 6; + } else if (ATTRCMP(gpio4)) { + event = 7; + } else if (ATTRCMP(gpio5)) { + event = 8; + } else { + return -ENOENT; + } + + + ret = sscanf(buf, "enable:%d", &enable); + DBG_VERB(("event:%d: enable:%d\n", event, enable)); + + (void)bksync_evlog_cmd(event, enable); + ptp_priv->bksync_evlog_info[event].enable = enable; + + return (ret == -ENOENT) ? ret : bytes; +} + +static ssize_t evlog_attr_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + ssize_t bytes; + int event; + + + if (!module_initialized || !ptp_priv || (ptp_priv->evlog == NULL)) { + return -ENOENT; + } + + if (ATTRCMP(cpu)) { + event = 0; + } else if (ATTRCMP(bs0)) { + event = 1; + } else if (ATTRCMP(bs1)) { + event = 2; + } else if (ATTRCMP(gpio0)) { + event = 3; + } else if (ATTRCMP(gpio1)) { + event = 4; + } else if (ATTRCMP(gpio2)) { + event = 5; + } else if (ATTRCMP(gpio3)) { + event = 6; + } else if (ATTRCMP(gpio4)) { + event = 7; + } else if (ATTRCMP(gpio5)) { + event = 8; + } else { + return -ENOENT; + } + + + bytes = sprintf(buf, "enable:%d Previous Time:%llu.%09u Latest Time:%llu.%09u\n", + ptp_priv->bksync_evlog_info[event].enable, + ptp_priv->evlog->event_timestamps[event].prv_tstamp.sec, + ptp_priv->evlog->event_timestamps[event].prv_tstamp.nsec, + ptp_priv->evlog->event_timestamps[event].cur_tstamp.sec, + ptp_priv->evlog->event_timestamps[event].cur_tstamp.nsec); + DBG_VERB(("event%d: enable:%d Previous Time:%llu.%09u Latest Time:%llu.%09u\n", + event, + ptp_priv->bksync_evlog_info[event].enable, + ptp_priv->evlog->event_timestamps[event].prv_tstamp.sec, + ptp_priv->evlog->event_timestamps[event].prv_tstamp.nsec, + ptp_priv->evlog->event_timestamps[event].cur_tstamp.sec, + ptp_priv->evlog->event_timestamps[event].cur_tstamp.nsec)); + + memset((void *)&(ptp_priv->evlog->event_timestamps[event]), 0, sizeof(ptp_priv->evlog->event_timestamps[event])); + + return bytes; +} + +#define EVLOG_ATTR(x) \ + static struct kobj_attribute evlog_ ## x ##_attribute = \ + __ATTR(x, 0664, evlog_attr_show, evlog_attr_store); + +EVLOG_ATTR(bs0) +EVLOG_ATTR(bs1) +EVLOG_ATTR(gpio0) +EVLOG_ATTR(gpio1) +EVLOG_ATTR(gpio2) +EVLOG_ATTR(gpio3) +EVLOG_ATTR(gpio4) +EVLOG_ATTR(gpio5) + +#define EVLOG_ATTR_LIST(x) & evlog_ ## x ## _attribute.attr +static struct attribute *evlog_attrs[] = { + EVLOG_ATTR_LIST(bs0), + EVLOG_ATTR_LIST(bs1), + EVLOG_ATTR_LIST(gpio0), + EVLOG_ATTR_LIST(gpio1), + EVLOG_ATTR_LIST(gpio2), + EVLOG_ATTR_LIST(gpio3), + EVLOG_ATTR_LIST(gpio4), + EVLOG_ATTR_LIST(gpio5), + NULL, /* terminator */ +}; + +static struct attribute_group evlog_attr_group = { + .name = "evlog", + .attrs = evlog_attrs, +}; + + + + +static int +bksync_sysfs_init(void) +{ + int ret = 0; + struct kobject *parent; + struct kobject *root = &((((struct module *)(THIS_MODULE))->mkobj).kobj); + + parent = root; + ptp_priv->kobj = kobject_create_and_add("io", parent); + + ret = sysfs_create_group(ptp_priv->kobj, &bs_attr_group); + + ret = sysfs_create_group(ptp_priv->kobj, &gpio_attr_group); + + ret = sysfs_create_group(ptp_priv->kobj, &evlog_attr_group); + + return ret; +} + +static int +bksync_sysfs_cleanup(void) +{ + int ret = 0; + struct kobject *parent; + + parent = ptp_priv->kobj; + + sysfs_remove_group(parent, &bs_attr_group); + sysfs_remove_group(parent, &gpio_attr_group); + sysfs_remove_group(parent, &evlog_attr_group); + + kobject_put(ptp_priv->kobj); + + + return ret; +} + + +static void bksync_ptp_fw_data_alloc(void) +{ + dma_addr_t dma_mem = 0; + + /* Initialize the Base address for CMIC and shared Memory access */ + ptp_priv->base_addr = lkbde_get_dev_virt(0); + ptp_priv->dma_dev = lkbde_get_dma_dev(0); + + ptp_priv->dma_mem_size = sizeof(bksync_evlog_t); /*sizeof(bksync_evlog_t);*/ + + if (ptp_priv->evlog == NULL) { + DBG_ERR(("Allocate memory for event log\n")); + ptp_priv->evlog = DMA_ALLOC_COHERENT(ptp_priv->dma_dev, + ptp_priv->dma_mem_size, + &dma_mem); + if (ptp_priv->evlog != NULL) { + ptp_priv->dma_mem = dma_mem; + } + } + + if (ptp_priv->evlog != NULL) { + /* Reset memory */ + memset((void *)ptp_priv->evlog, 0, ptp_priv->dma_mem_size); + + DBG_ERR(("Shared memory allocation (%d bytes) for event log successful at 0x%016lx.\n", + ptp_priv->dma_mem_size, (long unsigned int)ptp_priv->dma_mem)); + } + + /* Allocate dma for timestmap logging for extts */ + dma_mem = 0; + ptp_priv->extts_dma_mem_size = sizeof(bksync_fw_extts_log_t); + if (ptp_priv->extts_log == NULL) { + DBG_ERR(("Allocate memory for extts log\n")); + ptp_priv->extts_log = DMA_ALLOC_COHERENT(ptp_priv->dma_dev, + ptp_priv->extts_dma_mem_size, + &dma_mem); + if (ptp_priv->extts_log != NULL) { + ptp_priv->extts_dma_mem_addr = dma_mem; + } + } + + if (ptp_priv->extts_log != NULL) { + /* Reset memory */ + memset((void *)ptp_priv->extts_log, 0, ptp_priv->extts_dma_mem_size); + ptp_priv->extts_log->tail = 0; + ptp_priv->extts_event.head = -1; + ptp_priv->extts_log->head = -1; + + DBG_ERR(("Shared memory allocation (%d bytes) for extts log successful at 0x%016lx.\n", + ptp_priv->extts_dma_mem_size, (long unsigned int)ptp_priv->extts_dma_mem_addr)); + } + return; +} + +static void bksync_ptp_fw_data_free(void) +{ + if (ptp_priv->evlog != NULL) { + DMA_FREE_COHERENT(ptp_priv->dma_dev, ptp_priv->dma_mem_size, + (void *)ptp_priv->evlog, ptp_priv->dma_mem); + ptp_priv->evlog = NULL; + } + + if (ptp_priv->extts_log != NULL) { + DBG_ERR(("Free shared memory : extts log of %d bytes\n", ptp_priv->extts_dma_mem_size)); + DMA_FREE_COHERENT(ptp_priv->dma_dev, ptp_priv->extts_dma_mem_size, + (void *)ptp_priv->extts_log, ptp_priv->extts_dma_mem_addr); + ptp_priv->extts_log = NULL; + } + return; +} + + + +static void bksync_ptp_dma_init(int dcb_type) +{ + int endianess; + int num_pports = 256; + int mem_size = 16384; /*sizeof(bksync_info_t);*/ + + + ptp_priv->num_pports = num_pports; + ptp_priv->dcb_type = dcb_type; + + if (ptp_priv->shared_addr == NULL) { + ptp_priv->shared_addr = kzalloc(16384, GFP_KERNEL); + ptp_priv->port_stats = kzalloc((sizeof(bksync_port_stats_t) * num_pports), GFP_KERNEL); + } + + if (ptp_priv->shared_addr != NULL) { + /* Reset memory. */ + memset((void *)ptp_priv->shared_addr, 0, mem_size); + +#ifdef __LITTLE_ENDIAN + endianess = 0; +#else + endianess = 1; +#endif + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_14r(CMIC_CMC_BASE), ((pci_cos << 16) | endianess)); + + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 1); + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 1); + + } + + bksync_ptp_fw_data_alloc(); + + DBG_VERB(("%s %p:%p, dcb_type: %d\n", __FUNCTION__, ptp_priv->base_addr,(void *)ptp_priv->shared_addr, dcb_type)); + + ptp_priv->mirror_encap_bmp = 0x0; + + hostcmd_regs[0] = CMIC_CMC_SCHAN_MESSAGE_21r(CMIC_CMC_BASE); + hostcmd_regs[1] = CMIC_CMC_SCHAN_MESSAGE_20r(CMIC_CMC_BASE); + hostcmd_regs[2] = CMIC_CMC_SCHAN_MESSAGE_19r(CMIC_CMC_BASE); + hostcmd_regs[3] = CMIC_CMC_SCHAN_MESSAGE_18r(CMIC_CMC_BASE); + hostcmd_regs[4] = CMIC_CMC_SCHAN_MESSAGE_17r(CMIC_CMC_BASE); + + return; +} + + +/** + * bksync_ioctl_cmd_handler + * @kmsg: kcom message - ptp clock ioctl command. + * Description: This function will handle ioctl commands + * from user mode. + */ +static int +bksync_ioctl_cmd_handler(kcom_msg_clock_cmd_t *kmsg, int len, int dcb_type) +{ + u32 fw_status; + bksync_dnx_jr2_devices_system_info_t *tmp_jr2devs_sys_info = NULL; + int tmp = 0; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + if (!module_initialized && kmsg->clock_info.cmd != KSYNC_M_HW_INIT) { + kmsg->hdr.status = KCOM_E_NOT_FOUND; + return sizeof(kcom_msg_hdr_t); + } + + switch(kmsg->clock_info.cmd) { + case KSYNC_M_HW_INIT: + pci_cos = kmsg->clock_info.data[0]; + DBG_VERB(("Configuring pci_cosq:%d\n", pci_cos)); + if (kmsg->clock_info.data[1] == 0 || kmsg->clock_info.data[1] == 1) { + /* Return success if the app is already initialized. */ + if (module_initialized) { + kmsg->hdr.status = KCOM_E_NONE; + return sizeof(kcom_msg_hdr_t); + } + + fw_core = kmsg->clock_info.data[1]; + bksync_ptp_dma_init(dcb_type); + DEV_READ32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_21r(CMIC_CMC_BASE), &fw_status); + + /* Return error if the app is not ready yet. */ + if (fw_status != 0xBADC0DE1) { + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_hdr_t); + } + + (ptp_priv->bksync_init_info).uc_port_num = kmsg->clock_info.data[2]; + (ptp_priv->bksync_init_info).uc_port_sysport = kmsg->clock_info.data[3]; + (ptp_priv->bksync_init_info).host_cpu_port = kmsg->clock_info.data[4]; + (ptp_priv->bksync_init_info).host_cpu_sysport = kmsg->clock_info.data[5]; + (ptp_priv->bksync_init_info).udh_len = kmsg->clock_info.data[6]; + + DBG_VERB(("fw_core:%d uc_port:%d uc_sysport:%d pci_port:%d pci_sysport:%d\n", + kmsg->clock_info.data[1], kmsg->clock_info.data[2], kmsg->clock_info.data[3], + kmsg->clock_info.data[4], kmsg->clock_info.data[5])); + + DBG_VERB(("uc_port:%d uc_sysport:%d pci_port:%d pci_sysport:%d\n", + (ptp_priv->bksync_init_info).uc_port_num, + (ptp_priv->bksync_init_info).uc_port_sysport, + (ptp_priv->bksync_init_info).host_cpu_port, + (ptp_priv->bksync_init_info).host_cpu_sysport)); + + if (bksync_ptp_init(&(ptp_priv->ptp_caps)) >= 0) { + module_initialized = 1; + } + + } + break; + case KSYNC_M_HW_DEINIT: + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 0); + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 0); + bksync_ptp_deinit(&(ptp_priv->ptp_caps)); + module_initialized = 0; + break; + case KSYNC_M_HW_TS_DISABLE: + bksync_ptp_hw_tstamp_disable(0, kmsg->clock_info.data[0], 0); + break; + case KSYNC_M_MTP_TS_UPDATE_ENABLE: + bksync_ptp_mirror_encap_update(0, kmsg->clock_info.data[0], TRUE); + break; + case KSYNC_M_MTP_TS_UPDATE_DISABLE: + bksync_ptp_mirror_encap_update(0, kmsg->clock_info.data[0], FALSE); + break; + case KSYNC_M_VERSION: + break; + case KSYNC_M_DNX_JR2DEVS_SYS_CONFIG: + DBG_VERB(("bksync_ioctl_cmd_handler: KSYNC_M_DNX_JR2DEVS_SYS_CONFIG Rcvd.\n")); + + tmp_jr2devs_sys_info = (bksync_dnx_jr2_devices_system_info_t *)((char *)kmsg + sizeof(kcom_msg_clock_cmd_t)); + + (ptp_priv->bksync_jr2devs_sys_info).ftmh_lb_key_ext_size = tmp_jr2devs_sys_info->ftmh_lb_key_ext_size; + (ptp_priv->bksync_jr2devs_sys_info).ftmh_stacking_ext_size = tmp_jr2devs_sys_info->ftmh_stacking_ext_size; + (ptp_priv->bksync_jr2devs_sys_info).pph_base_size = tmp_jr2devs_sys_info->pph_base_size; + + for (tmp = 0; tmp < BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX; tmp++) { + (ptp_priv->bksync_jr2devs_sys_info).pph_lif_ext_size[tmp] = tmp_jr2devs_sys_info->pph_lif_ext_size[tmp]; + } + + (ptp_priv->bksync_jr2devs_sys_info).system_headers_mode = tmp_jr2devs_sys_info->system_headers_mode; + (ptp_priv->bksync_jr2devs_sys_info).udh_enable = tmp_jr2devs_sys_info->udh_enable; + for (tmp = 0; tmp < BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX; tmp++) { + (ptp_priv->bksync_jr2devs_sys_info).udh_data_lenght_per_type[tmp] = tmp_jr2devs_sys_info->udh_data_lenght_per_type[tmp]; + } + + (ptp_priv->bksync_jr2devs_sys_info).cosq_port_cpu_channel = tmp_jr2devs_sys_info->cosq_port_cpu_channel; + (ptp_priv->bksync_jr2devs_sys_info).cosq_port_pp_port = tmp_jr2devs_sys_info->cosq_port_pp_port; + + tmp_jr2devs_sys_info = &(ptp_priv->bksync_jr2devs_sys_info); + +#if 0 + DBG_VERB(("ftmh_lb_key_ext_size %u ftmh_stacking_ext_size %u pph_base_size %u\n", + tmp_jr2devs_sys_info->ftmh_lb_key_ext_size, tmp_jr2devs_sys_info->ftmh_stacking_ext_size, + tmp_jr2devs_sys_info->pph_base_size)); + + for (tmp = 0; tmp < BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX ; tmp++) { + DBG_VERB(("pph_lif_ext_size[%u] %u\n", + tmp, tmp_jr2devs_sys_info->pph_lif_ext_size[tmp])); + } + + DBG_VERB(("\nsystem_headers_mode %u udh_enable %u\n", + tmp_jr2devs_sys_info->system_headers_mode, tmp_jr2devs_sys_info->udh_enable)); + + for (tmp = 0; tmp < BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX; tmp++) { + DBG_VERB(("udh_data_lenght_per_type [%d] %u\n", + tmp, tmp_jr2devs_sys_info->udh_data_lenght_per_type[tmp])); + } + + DBG_VERB(("\ncosq_port_cpu_channel :%u cosq_port_pp_port:%u\n", + tmp_jr2devs_sys_info->cosq_port_cpu_channel, tmp_jr2devs_sys_info->cosq_port_cpu_channel)); +#endif + break; + default: + kmsg->hdr.status = KCOM_E_NOT_FOUND; + return sizeof(kcom_msg_hdr_t); + } + + return sizeof(*kmsg); +} + + + +/** + * bksync_ptp_register + * @priv: driver private structure + * Description: this function will register the ptp clock driver + * to kernel. It also does some house keeping work. + */ +static int bksync_ptp_register(void) +{ + int err = -ENODEV; + + /* Support on core-0 or core-1 */ + if (fw_core < 0 || fw_core > 1) { + goto exit; + } + + /* default transport is raw, ieee 802.3 */ + switch (network_transport) { + case 2: /* IEEE 802.3 */ + case 4: /* UDP IPv4 */ + case 6: /* UDP IPv6 */ + break; + default: + network_transport = 0; + } + + ptp_priv = kzalloc(sizeof(*ptp_priv), GFP_KERNEL); + if (!ptp_priv) { + err = -ENOMEM; + goto exit; + } + + /* Reset memory */ + memset(ptp_priv, 0, sizeof(*ptp_priv)); + + err = -ENODEV; + + ptp_priv->ptp_caps = bksync_ptp_caps; + + mutex_init(&(ptp_priv->ptp_lock)); + + /* Register ptp clock driver with bksync_ptp_caps */ + ptp_priv->ptp_clock = ptp_clock_register(&ptp_priv->ptp_caps, NULL); + + /* Initialize the Base address for CMIC and shared Memory access */ + ptp_priv->base_addr = lkbde_get_dev_virt(0); + ptp_priv->dma_dev = lkbde_get_dma_dev(0); + + if (IS_ERR(ptp_priv->ptp_clock)) { + ptp_priv->ptp_clock = NULL; + } else if (ptp_priv->ptp_clock) { + err = 0; + + /* Register BCM-KNET HW Timestamp Callback Functions */ + bkn_hw_tstamp_enable_cb_register(bksync_ptp_hw_tstamp_enable); + bkn_hw_tstamp_disable_cb_register(bksync_ptp_hw_tstamp_disable); + bkn_hw_tstamp_tx_time_get_cb_register(bksync_ptp_hw_tstamp_tx_time_get); + bkn_hw_tstamp_tx_meta_get_cb_register(bksync_ptp_hw_tstamp_tx_meta_get); + bkn_hw_tstamp_rx_pre_process_cb_register(bksync_ptp_hw_tstamp_rx_pre_process); + bkn_hw_tstamp_rx_time_upscale_cb_register(bksync_ptp_hw_tstamp_rx_time_upscale); + bkn_hw_tstamp_ptp_clock_index_cb_register(bksync_ptp_hw_tstamp_ptp_clock_index_get); + bkn_hw_tstamp_ioctl_cmd_cb_register(bksync_ioctl_cmd_handler); + bkn_hw_tstamp_ptp_transport_get_cb_register(bksync_ptp_transport_get); + + } + + /* Initialize proc files */ + bksync_proc_root = proc_mkdir("bcm/ksync", NULL); + bksync_proc_init(); + bksync_sysfs_init(); + ptp_priv->shared_addr = NULL; + ptp_priv->port_stats = NULL; + + bksync_ptp_extts_logging_init(); +exit: + return err; +} + +static int bksync_ptp_remove(void) +{ + if (!ptp_priv) + return 0; + + module_initialized = 0; + + bksync_ptp_extts_logging_deinit(); + + bksync_ptp_time_keep_deinit(); + + bksync_proc_cleanup(); + bksync_sysfs_cleanup(); + remove_proc_entry("bcm/ksync", NULL); + + /* UnRegister BCM-KNET HW Timestamp Callback Functions */ + bkn_hw_tstamp_enable_cb_unregister(bksync_ptp_hw_tstamp_enable); + bkn_hw_tstamp_disable_cb_unregister(bksync_ptp_hw_tstamp_disable); + bkn_hw_tstamp_tx_time_get_cb_unregister(bksync_ptp_hw_tstamp_tx_time_get); + bkn_hw_tstamp_tx_meta_get_cb_unregister(bksync_ptp_hw_tstamp_tx_meta_get); + bkn_hw_tstamp_rx_pre_process_cb_unregister(bksync_ptp_hw_tstamp_rx_pre_process); + bkn_hw_tstamp_rx_time_upscale_cb_unregister(bksync_ptp_hw_tstamp_rx_time_upscale); + bkn_hw_tstamp_ptp_clock_index_cb_unregister(bksync_ptp_hw_tstamp_ptp_clock_index_get); + bkn_hw_tstamp_ioctl_cmd_cb_unregister(bksync_ioctl_cmd_handler); + bkn_hw_tstamp_ptp_transport_get_cb_unregister(bksync_ptp_transport_get); + + /* reset handshaking info */ + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 0); + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 0); + + /* Deinitialize the PTP */ + bksync_ptp_deinit(&(ptp_priv->ptp_caps)); + + bksync_ptp_fw_data_free(); + + if (ptp_priv->port_stats != NULL) { + kfree((void *)ptp_priv->port_stats); + ptp_priv->port_stats = NULL; + } + if (ptp_priv->shared_addr != NULL) { + kfree((void *)ptp_priv->shared_addr); + ptp_priv->shared_addr = NULL; + DBG_ERR(("Free R5 memory\n")); + } + + /* Unregister the bcm ptp clock driver */ + ptp_clock_unregister(ptp_priv->ptp_clock); + + /* Free Memory */ + kfree(ptp_priv); + + return 0; +} +#endif + + +/* + * Generic module functions + */ + +/* + * Function: _pprint + * + * Purpose: + * Print proc filesystem information. + * Parameters: + * None + * Returns: + * Always 0 + */ + static int +_pprint(struct seq_file *m) +{ +#if LINUX_VERSION_CODE > KERNEL_VERSION(3,17,0) + /* put some goodies here */ + pprintf(m, "Broadcom BCM PTP Hardware Clock Module\n"); +#else + pprintf(m, "Broadcom BCM PTP Hardware Clock Module not supported\n"); +#endif + return 0; +} + +/* + * Function: _init + * + * Purpose: + * Module initialization. + * Attached SOC all devices and optionally initializes these. + * Parameters: + * None + * Returns: + * 0 on success, otherwise -1 + */ + static int +_init(void) +{ +#if LINUX_VERSION_CODE > KERNEL_VERSION(3,17,0) + bksync_ptp_register(); + return 0; +#else + return -1; +#endif +} + +/* + * Function: _cleanup + * + * Purpose: + * Module cleanup function + * Parameters: + * None + * Returns: + * Always 0 + */ + static int +_cleanup(void) +{ +#if LINUX_VERSION_CODE > KERNEL_VERSION(3,17,0) + bksync_ptp_remove(); + return 0; +#else + return -1; +#endif +} + +static gmodule_t _gmodule = { + .name = MODULE_NAME, + .major = MODULE_MAJOR, + .init = _init, + .cleanup = _cleanup, + .pprint = _pprint, + .ioctl = NULL, + .open = NULL, + .close = NULL, +}; + + gmodule_t* +gmodule_get(void) +{ + EXPORT_NO_SYMBOLS; + return &_gmodule; +} diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README new file mode 100644 index 000000000000..e2e3c1ac296b --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README @@ -0,0 +1,114 @@ +$Id:$ +$Copyright: 2007-2024 Broadcom Inc. All rights reserved. + +Permission is granted to use, copy, modify and/or distribute this +software under either one of the licenses below. + +License Option 1: GPL + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License, version 2, as +published by the Free Software Foundation (the "GPL"). + +This program is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License version 2 (GPLv2) for more details. + +You should have received a copy of the GNU General Public License +version 2 (GPLv2) along with this source code. + + +License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + +This software is governed by the Broadcom Open Network Switch APIs license: +https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + + +DCB Library + +The DCB Library is a stand-alone library that allows access to +DCB fields easily without bringing all the complexity of the +SDK source tree. + + +DCB Initialization + +The following routine initializes a DCB handle. A unique DCB handle +needs to be initialized for a given device ID and revision ID. + +This initialization function needs to be called before accessing +any DCB field. + +Function: +#include + + int dcb_handle_init(dcb_handle_t *handle, uint16 dev_id, uint8 rev_id); + +Parameters: + handle - (IN/OUT) Pointer to DCB library handle + device_id - (IN) Device ID + rev_id - (IN) Revision ID + +Returns: + DCB_OK Success + DCB_ERROR Failure + + +DCB Field GET + +Set of macros that return the value from a DCB field. + +The correct DCB structure needs to be allocated and +initialized prior to calling any of the get/set macros. + +Macro: + DCB__GET(handle, dcb) + +Parameters: + handle - (IN) Pointer to the handle for a given device; + type is dcb_handle_t * + dcb - (IN) Pointer to the DCB structure to get the field value from; + type is dcb_t * +Returns: + Value of DCB field + + +DCB Field SET + +Set of macros to set the value for a DCB field. + +The correct DCB structure needs to be allocated and +initialized prior to calling any of the get/set macros. + +Macro: + DCB__SET(handle, dcb, value) + +Parameters: + handle - (IN) Pointer to the handle for a given device; + type is dcb_handle_t * + dcb - (IN/OUT) Pointer to the DCB structure to set the field value to; + type is dcb_t * + value - (IN) Value to set for the DCB field; + type varies + +Returns: + None + + +Compiling the DCB Library + +To compile the DCB library, the DCBDIR environment variable needs +to be set to point to the location where the DCB library resides +and run make. If DCBDIR is not set, the default value of DCBDIR is the parent +directory of this README file. + +The DCB library output will be generated in $DCBDIR/build/ by default. +The output directory can be specified by setting the BLDDIR environment +variable. + +Example: + cd + export DCBDIR=`pwd` + cd make + make diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/RELEASE b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/RELEASE new file mode 100644 index 000000000000..889d5e0ce171 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/RELEASE @@ -0,0 +1 @@ +DCB SDK-HEAD diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h new file mode 100644 index 000000000000..7a3498f756ee --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h @@ -0,0 +1,227 @@ +/* + * $Id:$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: dcb.h + * Purpose: DCB Library interface + */ + +#ifndef _DCB_DCB_H_ +#define _DCB_DCB_H_ + +#include +#include + + +/* + * DCB Return Codes + */ +#define DCB_OK 0 +#define DCB_ERROR 1 + + +/* + * DCB Handle + */ +typedef struct dcb_handle_s { + dcb_op_t *dcb_op; +} dcb_handle_t; + +#define DCB_HANDLE(_h) (_h) +#define DCB_OP(_h) DCB_HANDLE(_h)->dcb_op + + +/* + * Function to initialize the DCB library for a + * given device type and revision ID. + * + * It must be called before accessing any of the DCB fields. + */ +extern int +dcb_handle_init(dcb_handle_t *handle, uint16 dev_id, uint8 rev_id); + + +/* + * DCB Fields + */ + +#define DCB_TYPE(_h) \ + DCB_OP(_h)->dcbtype + +#define DCB_SIZE(_h) \ + DCB_OP(_h)->dcbsize + +#define DCB_INIT(_h, _dcb) \ + DCB_OP(_h)->init(_dcb) + +#define DCB_REQCOUNT_SET(_h, _dcb, _count) \ + DCB_OP(_h)->reqcount_set(_dcb, _count) +#define DCB_REQCOUNT_GET(_h, _dcb) \ + DCB_OP(_h)->reqcount_get(_dcb) + +#ifdef INCLUDE_KNET +/* Mask off indicator for kernel processing done */ +#define DCB_XFERCOUNT_GET(_h, _dcb) \ + (DCB_OP(_h)->xfercount_get(_dcb) & ~SOC_DCB_KNET_DONE) +#else +#define DCB_XFERCOUNT_GET(_h, _dcb) \ + DCB_OP(_h)->xfercount_get(_dcb) +#endif + +#define DCB_DONE_SET(_h, _dcb, _val) \ + DCB_OP(_h)->done_set(_dcb, _val) +#define DCB_DONE_GET(_h, _dcb) \ + DCB_OP(_h)->done_get(_dcb) +#define DCB_SG_SET(_h, _dcb, _val) \ + DCB_OP(_h)->sg_set(_dcb, _val) +#define DCB_SG_GET(_h, _dcb) \ + DCB_OP(_h)->sg_get(_dcb) +#define DCB_CHAIN_SET(_h, _dcb, _val) \ + DCB_OP(_h)->chain_set(_dcb, _val) +#define DCB_CHAIN_GET(_h, _dcb) \ + DCB_OP(_h)->chain_get(_dcb) +#define DCB_RELOAD_SET(_h, _dcb, _val) \ + DCB_OP(_h)->reload_set(_dcb, _val) +#define DCB_RELOAD_GET(_h, _dcb) \ + DCB_OP(_h)->reload_get(_dcb) + +#define DCB_TX_CRC_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_crc_set(_dcb, _val) +#define DCB_TX_COS_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_cos_set(_dcb, _val) +#define DCB_TX_DESTMOD_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_destmod_set(_dcb, _val) +#define DCB_TX_DESTPORT_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_destport_set(_dcb, _val) +#define DCB_TX_OPCODE_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_opcode_set(_dcb, _val) +#define DCB_TX_SRCMOD_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_srcmod_set(_dcb, _val) +#define DCB_TX_SRCPORT_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_srcport_set(_dcb, _val) +#define DCB_TX_PRIO_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_prio_set(_dcb, _val) +#define DCB_TX_PFM_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_pfm_set(_dcb, _val) + +#define DCB_RX_UNTAGGED_GET(_h, _dcb, _dt_mode, _ingport_is_hg) \ + DCB_OP(_h)->rx_untagged_get(_dcb, _dt_mode, _ingport_is_hg) +#define DCB_RX_CRC_GET(_h, _dcb) \ + DCB_OP(_h)->rx_crc_get(_dcb) +#define DCB_RX_COS_GET(_h, _dcb) \ + DCB_OP(_h)->rx_cos_get(_dcb) +#define DCB_RX_DESTMOD_GET(_h, _dcb) \ + DCB_OP(_h)->rx_destmod_get(_dcb) +#define DCB_RX_DESTPORT_GET(_h, _dcb) \ + DCB_OP(_h)->rx_destport_get(_dcb) +#define DCB_RX_OPCODE_GET(_h, _dcb) \ + DCB_OP(_h)->rx_opcode_get(_dcb) + +#define DCB_RX_CLASSTAG_GET(_h, _dcb) \ + DCB_OP(_h)->rx_classtag_get(_dcb) +#define DCB_RX_MATCHRULE_GET(_h, _dcb) \ + DCB_OP(_h)->rx_matchrule_get(_dcb) +#define DCB_RX_START_GET(_h, _dcb) \ + DCB_OP(_h)->rx_start_get(_dcb) +#define DCB_RX_END_GET(_h, _dcb) \ + DCB_OP(_h)->rx_end_get(_dcb) +#define DCB_RX_ERROR_GET(_h, _dcb) \ + DCB_OP(_h)->rx_error_get(_dcb) +#define DCB_RX_PRIO_GET(_h, _dcb) \ + DCB_OP(_h)->rx_prio_get(_dcb) +#define DCB_RX_REASON_GET(_h, _dcb) \ + DCB_OP(_h)->rx_reason_get(_dcb) +#define DCB_RX_REASON_HI_GET(_h, _dcb) \ + DCB_OP(_h)->rx_reason_hi_get(_dcb) +#define DCB_RX_REASONS_GET(_h, _dcb, _reasons) \ + DCB_OP(_h)->rx_reasons_get(DCB_OP(_h), _dcb, _reasons) +#define DCB_RX_INGPORT_GET(_h, _dcb) \ + DCB_OP(_h)->rx_ingport_get(_dcb) +#define DCB_RX_SRCPORT_GET(_h, _dcb) \ + DCB_OP(_h)->rx_srcport_get(_dcb) +#define DCB_RX_SRCMOD_GET(_h, _dcb) \ + DCB_OP(_h)->rx_srcmod_get(_dcb) +#define DCB_RX_MCAST_GET(_h, _dcb) \ + DCB_OP(_h)->rx_mcast_get(_dcb) +#define DCB_RX_VCLABEL_GET(_h, _dcb) \ + DCB_OP(_h)->rx_vclabel_get(_dcb) +#define DCB_RX_MIRROR_GET(_h, _dcb) \ + DCB_OP(_h)->rx_mirror_get(_dcb) +#define DCB_RX_MATCHRULE_GET(_h, _dcb) \ + DCB_OP(_h)->rx_matchrule_get(_dcb) +#define DCB_RX_TIMESTAMP_GET(_h, _dcb) \ + DCB_OP(_h)->rx_timestamp_get(_dcb) +#define DCB_RX_TIMESTAMP_UPPER_GET(_h, _dcb) \ + DCB_OP(_h)->rx_timestamp_upper_get(_dcb) + +#define DCB_HG_SET(_h, _dcb, _val) \ + DCB_OP(_h)->hg_set(_dcb, _val) +#define DCB_HG_GET(_h, _dcb) \ + DCB_OP(_h)->hg_get(_dcb) +#define DCB_STAT_SET(_h, _dcb, _val) \ + DCB_OP(_h)->stat_set(_dcb, _val) +#define DCB_STAT_GET(_h, _dcb) \ + DCB_OP(_h)->stat_get(_dcb) +#define DCB_PURGE_SET(_h, _dcb, _val) \ + DCB_OP(_h)->purge_set(_dcb, _val) +#define DCB_PURGE_GET(_h, _dcb) \ + DCB_OP(_h)->purge_get(_dcb) + +#define DCB_MHP_GET(_h, _dcb) \ + DCB_OP(_h)->mhp_get(_dcb) +#define DCB_RX_OUTER_VID_GET(_h, _dcb) \ + DCB_OP(_h)->rx_outer_vid_get(_dcb) +#define DCB_RX_OUTER_PRI_GET(_h, _dcb) \ + DCB_OP(_h)->rx_outer_pri_get(_dcb) +#define DCB_RX_OUTER_CFI_GET(_h, _dcb) \ + DCB_OP(_h)->rx_outer_cfi_get(_dcb) +#define DCB_RX_OUTER_TAG_ACTION_GET(_h, _dcb) \ + DCB_OP(_h)->rx_outer_tag_action_get(_dcb) +#define DCB_RX_INNER_VID_GET(_h, _dcb) \ + DCB_OP(_h)->rx_inner_vid_get(_dcb) +#define DCB_RX_INNER_PRI_GET(_h, _dcb) \ + DCB_OP(_h)->rx_inner_pri_get(_dcb) +#define DCB_RX_INNER_CFI_GET(_h, _dcb) \ + DCB_OP(_h)->rx_inner_cfi_get(_dcb) +#define DCB_RX_INNER_TAG_ACTION_GET(_h, _dcb) \ + DCB_OP(_h)->rx_inner_tag_action_get(_dcb) +#define DCB_RX_BPDU_GET(_h, _dcb) \ + DCB_OP(_h)->rx_bpdu_get(_dcb) +#define DCB_RX_L3_INTF_GET(_h, _dcb) \ + DCB_OP(_h)->rx_l3_intf_get(_dcb) +#define DCB_RX_DECAP_TUNNEL_GET(_h, _dcb) \ + DCB_OP(_h)->rx_decap_tunnel_get(_dcb) +#define DCB_RX_SWITCH_DROP_GET(_h, _dcb) \ + DCB_OP(_h)->rx_switch_drop_get(_dcb) +#define DCB_OLP_ENCAP_OAM_PKT_GET(_h, _dcb) \ + DCB_OP(_h)->olp_encap_oam_pkt_get(_dcb) +#define DCB_READ_ECC_ERROR_GET(_h, _dcb) \ + DCB_OP(_h)->read_ecc_error_get(_dcb) + + +#endif /* _DCB_DCB_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h new file mode 100644 index 000000000000..5349e77ee9b7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h @@ -0,0 +1,163 @@ +/* + * $Id:$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: dcb_int.h + * Purpose: DCB Library Internal + */ + +#ifndef _DCB_INT_H_ +#define _DCB_INT_H_ + +#ifdef DCB_CUSTOM_CONFIG +/* Allow application to override soc_cm_print, etc. */ +#include +#else +#ifdef __KERNEL__ +#include +#else +/* Needed for printf */ +#include +#endif +#endif + +#include +#include + +/* Include first to redefine macros */ +#include + + +/********************** + * Stubs and Redefines + */ + +/* + * + */ +typedef struct soc_control_s { + dcb_op_t *dcb_op; +} soc_control_t; +extern soc_control_t soc_control; + +#define SOC_CONTROL(_u) (&soc_control) + +/* + * + */ +#ifdef SOC_DCB +#undef SOC_DCB +#endif +#define SOC_DCB(_h) DCB_OP(_h) + +#ifdef SOC_DCB_IDX2PTR +#undef SOC_DCB_IDX2PTR +#endif +#define SOC_DCB_IDX2PTR(_u, _dcb, _i) NULL + +#ifdef SOC_DCB_PTR2IDX +#undef SOC_DCB_PTR2IDX +#endif +#define SOC_DCB_PTR2IDX(_u, _dcb1, _dcb2) 0 + +/* + * + */ +#define SOC_DMA_HG_GET(_flags) 0 +#define SOC_DMA_PURGE_GET(_flags) 0 +#define SOC_DMA_COS_GET(flags) 0 +#define SOC_DMA_CRC_GET(flags) 0 +#define SOC_DV_TX_ALIGN(dv, i) 0 + +typedef struct dv_s { + int dv_unit; + int dv_cnt; + int dv_vcnt; + int dv_flags; +# define DV_F_NOTIFY_DSC 0x01 +# define DV_F_NOTIFY_CHN 0x02 +# define DV_F_COMBINE_DCB 0x04 +# define DV_F_NEEDS_REFILL 0x10 + dcb_t *dv_dcb; +} dv_t; + +/* + * + */ +#ifdef __KERNEL__ +#define printf printk +#endif + +#ifndef soc_cm_debug +#define soc_cm_debug(flags, format, ...) printf(format, __VA_ARGS__) +#endif +#ifndef soc_cm_print +#define soc_cm_print(format, ...) printf(format, __VA_ARGS__) +#endif + +#define soc_cm_l2p(unit, addr) ((uint32)(((sal_vaddr_t)(addr))&0xFFFFFFFF)) +#define soc_cm_p2l(dev, addr) (addr) + +/* + * + */ +typedef int enet_hdr_t; + +/* + * + */ +extern uint32 _dcb_htonl(uint32 value); + +#define soc_ntohl(_x) \ + ((((uint8 *)&(_x))[0] << 24) | (((uint8 *)&(_x))[1] << 16) | \ + (((uint8 *)&(_x))[2] << 8) | (((uint8 *)&(_x))[3])) + +#define soc_htonl(_x) _dcb_htonl(_x) + +/* + * + */ +#define soc_feature(_u, _f) 0 + +/* + * + */ +#define SOC_E_PARAM -4 +#define SOC_E_FULL -6 + +/* + * + */ +#define assert(_x) + +/* + * + */ +#define _SHR_L3_EGRESS_IDX_MIN (0x186A0) /* Egress object start index */ + +#endif /* _DCB_INT_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h new file mode 100644 index 000000000000..17d60c34ebde --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h @@ -0,0 +1,86 @@ +/* + * $Id: types.h,v 1.1 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: types.h + * Purpose: SAL Definitions + */ + +#ifndef _SAL_TYPES_H_ +#define _SAL_TYPES_H_ + +#ifdef DCB_CUSTOM_CONFIG +/* Allow application to override sal_sprintf, sal_memset, sal_memcpy */ +#include +#else +#ifdef __KERNEL__ +#include +#else +/* Needed for sprintf, memset */ +#include +#include +#endif +#endif + + +/* Booleans */ +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +/* Data types */ +typedef unsigned char uint8; /* 8-bit quantity */ +typedef unsigned short uint16; /* 16-bit quantity */ +typedef unsigned int uint32; /* 32-bit quantity */ +typedef uint64_t uint64; /* 64-bit quantity */ + +typedef signed char int8; /* 8-bit quantity */ +typedef signed short int16; /* 16-bit quantity */ +typedef signed int int32; /* 32-bit quantity */ + +typedef uint32 sal_paddr_t; /* Physical address (PCI address) */ +typedef uintptr_t sal_vaddr_t; /* Virtual address (Host address) */ + +#define PTR_TO_INT(x) ((uint32)(((uint64)(x))&0xFFFFFFFF)) +#define PTR_HI_TO_INT(x) ((uint32)((((uint64)(x))>>32)&0xFFFFFFFF)) + +typedef uint8 sal_mac_addr_t[6]; /* MAC address */ + +/* Macros */ +#define COMPILER_REFERENCE(_a) ((void)(_a)) + +/* Functions */ +#define sal_memset memset +#define sal_sprintf sprintf +#define sal_memcpy memcpy + +#endif /* _SAL_TYPES_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h new file mode 100644 index 000000000000..849c7e7f80ec --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h @@ -0,0 +1,31 @@ +/* + * $Id:$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * Stub header file + */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h new file mode 100644 index 000000000000..996679fe5203 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h @@ -0,0 +1,57 @@ +/* + * $Id: $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * Broadcom System Log (bSL) + * + * Defines for INTERNAL usage only. + */ + +#ifndef _SHR_BSL_H_ +#define _SHR_BSL_H_ + +#ifdef DCB_CUSTOM_CONFIG +/* Allow application to override BSL_META, LOG_CLI, etc. */ +#include +#else +#ifdef __KERNEL__ +#include + +#define printf printk +#else +/* Needed for printf */ +#include +#endif + +#define BSL_META(_str) _str +#define BSL_META_U(_unit, _str) _str +#define LOG_ERROR(_chk, _str) printf _str +#define LOG_CLI(_str) printf _str + +#endif +#endif /* _SHR_BSL_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h new file mode 100644 index 000000000000..4ba3d99660af --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h @@ -0,0 +1,622 @@ +/* + * $Id: rx.h,v 1.35 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: rx.h + * Purpose: Packet Receive Reason Types shared between BCM and SOC layers + */ + +#ifndef _SHR_RX_H_ +#define _SHR_RX_H_ + +/* + * PKT RX Packet Reasons; reason CPU received the packet. + * Notes: It is possible no reasons are set (directed to CPU from ARL + * for example), or multiple reasons may be set. + */ + +typedef enum _shr_rx_reason_e { + _SHR_RX_INVALID = 0, + _SHR_RX_ARP = 1, /* ARP Packet */ + _SHR_RX_BPDU = 2, /* BPDU Packet */ + _SHR_RX_BROADCAST = 3, /* Broadcast packet */ + _SHR_RX_CLASS_BASED_MOVE = 4, /* Class-based move prevented */ + _SHR_RX_CLASS_TAG_PACKETS = 5, /* Higig Header with PPD=1 */ + _SHR_RX_CONTROL = 6, /* Control frame or reserved addr */ + _SHR_RX_CPU_LEARN = 7, /* CPU Learned (or VLAN not found */ + /* on Strata devices) */ + _SHR_RX_DEST_LOOKUP_FAIL = 8, /* Destination lookup fail (or L3 */ + /* station move on Strata devices) */ + _SHR_RX_DHCP = 9, /* DHCP packets */ + _SHR_RX_DOS_ATTACK = 10, /* DOS Attack Packet */ + _SHR_RX_E2E_HOL_IBP = 11, /* E2E HOL or IBP Packet */ + _SHR_RX_ENCAP_HIGIG_ERROR = 12, /* Non-HG packets received on an */ + /* E-HG port */ + _SHR_RX_FILTER_MATCH = 13, /* Filter Match */ + _SHR_RX_GRE_CHECKSUM = 14, /* GRE checksum */ + _SHR_RX_GRE_SOURCE_ROUTE = 15, /* GRE source routing */ + _SHR_RX_HIGIG_CONTROL = 16, /* Higig Packet with Control Opcode */ + _SHR_RX_HIGIG_HDR_ERROR = 17, /* Higig+ header errors */ + _SHR_RX_ICMP_REDIRECT = 18, /* ICMP Recirect */ + _SHR_RX_IGMP = 19, /* IGMP packet */ + _SHR_RX_INGRESS_FILTER = 20, /* Ingress Filter (VLAN membership) */ + _SHR_RX_IP = 21, /* IP packet */ + _SHR_RX_IPFIX_RATE_VIOLATION = 22, /* IPFIX flows exceed metering */ + _SHR_RX_IP_MCAST_MISS = 23, /* IPMC miss */ + _SHR_RX_IP_OPTION_VERSION = 24, /* IP options present or IP ver != 4 */ + _SHR_RX_IPMC = 25, /* Class D IP multicast packet */ + _SHR_RX_IPMC_RSVD = 26, /* IPMC Reserved Packet */ + _SHR_RX_L2_CPU = 27, /* L2_TABLE - copy to CPU (on 5690) */ + _SHR_RX_L2_DEST_MISS = 28, /* L2 destination lookup failure */ + _SHR_RX_L2_LEARN_LIMIT = 29, /* L2 Learn Limit */ + _SHR_RX_L2_MOVE = 30, /* L2 Station Movement */ + _SHR_RX_L2_MTU_FAIL = 31, /* L2 MTU check fail */ + _SHR_RX_L2_NON_UNICAST_MISS = 32, /* L2 Non-Unicast lookup miss */ + _SHR_RX_L2_SOURCE_MISS = 33, /* L2 source lookup failure */ + _SHR_RX_L3_ADDR_BIND_FAIL = 34, /* MAC to IP bind check failure */ + _SHR_RX_L3_DEST_MISS = 35, /* L3 DIP Miss */ + _SHR_RX_L3_HEADER_ERROR = 36, /* L3 header - IP options, */ + _SHR_RX_L3_MTU_FAIL = 37, /* L3 MTU check fail */ + _SHR_RX_L3_SLOW_PATH = 38, /* L3 slow path processed pkt. */ + _SHR_RX_L3_SOURCE_MISS = 39, /* L3 SIP Miss */ + _SHR_RX_L3_SOUCE_MOVE = 40, /* L3 Station Movement */ + _SHR_RX_MARTIAN_ADDR = 41, /* Pkt. with Martian address */ + _SHR_RX_MCAST_IDX_ERROR = 42, /* Multicast index error */ + _SHR_RX_MCAST_MISS = 43, /* MC miss */ + _SHR_RX_MIM_SERVICE_ERROR = 44, /* MiM terminated unicast packets */ + /* that do not have a valid I-SID */ + _SHR_RX_MPLS_CTRL_WORD_ERROR = 45, /* MPLS Control Word type is not 0 */ + _SHR_RX_MPLS_ERROR = 46, /* MPLS error */ + _SHR_RX_MPLS_INVALID_ACTION = 47, /* MPLS Invalid Action */ + _SHR_RX_MPLS_INVALID_PAYLOAD = 48, /* MPLS Invalid Payload */ + _SHR_RX_MPLS_LABEL_MISS = 49, /* MPLS table miss */ + _SHR_RX_MPLS_SEQUENCE_NUMBER = 50, /* MPLS Sequence number */ + _SHR_RX_MPLS_TTL = 51, /* MPLS TTL */ + _SHR_RX_MULTICAST = 52, /* Multicast packet */ + _SHR_RX_NHOP = 53, /* Copy to CPU from NH Idx Tbl */ + _SHR_RX_OAM_ERROR = 54, /* OAM packets to CPU for error cases */ + _SHR_RX_OAM_SLOW_PATH = 55, /* OAM packets to CPU - slowpath */ + /* process */ + _SHR_RX_OAM_LMDM = 56, /* OAM LMM/LMR, DMM/DMR packets to CPU */ + _SHR_RX_PARITY_ERROR = 57, /* Parity error on IP tables */ + _SHR_RX_PROTOCOL = 58, /* Protocol Packet */ + _SHR_RX_SAMPLE_DEST = 59, /* Egress sFlow sampled */ + _SHR_RX_SAMPLE_SOURCE = 60, /* Ingress sFlow sampled */ + _SHR_RX_SHARED_VLAN_MISMATCH = 61, /* Private VLAN Mismatch */ + _SHR_RX_SOURCE_ROUTE = 62, /* Source routing bit set */ + _SHR_RX_TIME_STAMP = 63, /* Network time sync packet */ + _SHR_RX_TTL = 64, /* TTL <= 0 or TTL < IPMC threshold */ + _SHR_RX_TTL1 = 65, /* L3UC or IPMC packet with TTL */ + /* equal to 1 */ + _SHR_RX_TUNNEL_ERROR = 66, /* Tunnel error trap */ + _SHR_RX_UDP_CHECKSUM = 67, /* UDP checksum */ + _SHR_RX_UNKNOWN_VLAN = 68, /* Unknown VLAN; VID = 0xfff; */ + /* CPU Learn bit (on 5690 devices) */ + _SHR_RX_URPF_FAIL = 69, /* URPF Check Failed */ + _SHR_RX_VC_LABEL_MISS = 70, /* VPLS table miss */ + _SHR_RX_VLAN_FILTER_MATCH = 71, /* VLAN Filter Match */ + _SHR_RX_WLAN_CLIENT_ERROR = 72, /* ROC error packets to the CPU */ + _SHR_RX_WLAN_SLOW_PATH = 73, /* WLAN packets slowpath to the CPU */ + _SHR_RX_WLAN_DOT1X_DROP = 74, /* WLAN client is unauthenticated */ + _SHR_RX_EXCEPTION_FLOOD = 75, /* Exception processing or flooding */ + _SHR_RX_TIMESYNC = 76, /* Time Sync protocol packet */ + _SHR_RX_EAV_DATA = 77, /* Ethernet AV data packet */ + _SHR_RX_SAME_PORT_BRIDGE = 78, /* Hairpin or Same port */ + /* switching/bridging */ + _SHR_RX_SPLIT_HORIZON = 79, /* Basic bridging or VPLS Split */ + /* horizon */ + _SHR_RX_L4_ERROR = 80, /* TCP/UDP header or port number */ + /* errors */ + _SHR_RX_STP = 81, /* STP Ingress or Egress checks */ + _SHR_RX_EGRESS_FILTER_REDIRECT = 82, /* Vlan egress filter redirect */ + _SHR_RX_FILTER_REDIRECT = 83, /* Field processor redirect */ + _SHR_RX_LOOPBACK = 84, /* Loopbacked */ + _SHR_RX_VLAN_TRANSLATE = 85, /* VLAN translation table missed when */ + /* it is expected to hit */ + _SHR_RX_MMRP = 86, /* Packet of type MMRP */ + _SHR_RX_SRP = 87, /* Packet of type SRP */ + _SHR_RX_TUNNEL_CONTROL = 88, /* Tunnel control packet */ + _SHR_RX_L2_MARKED = 89, /* L2 table marked */ + _SHR_RX_WLAN_SLOWPATH_KEEPALIVE = 90, /* WLAN slowpath to the CPU, */ + /* otherwise dropped */ + _SHR_RX_STATION = 91, /* My Station packet to CPU */ + _SHR_RX_NIV = 92, /* NIV packet */ + _SHR_RX_NIV_PRIO_DROP = 93, /* NIV packet, priority drop */ + _SHR_RX_NIV_INTERFACE_MISS = 94, /* NIV packet, interface miss */ + _SHR_RX_NIV_RPF_FAIL = 95, /* NIV packet, RPF failed */ + _SHR_RX_NIV_TAG_INVALID = 96, /* NIV packet, invalid tag */ + _SHR_RX_NIV_TAG_DROP = 97, /* NIV packet, tag drop */ + _SHR_RX_NIV_UNTAG_DROP = 98, /* NIV packet, untagged drop */ + _SHR_RX_TRILL = 99, /* TRILL packet */ + _SHR_RX_TRILL_INVALID = 100, /* TRILL packet, header error */ + _SHR_RX_TRILL_MISS = 101, /* TRILL packet, lookup miss */ + _SHR_RX_TRILL_RPF_FAIL = 102, /* TRILL packet, RPF check failed */ + _SHR_RX_TRILL_SLOWPATH = 103, /* TRILL packet, slowpath to CPU */ + _SHR_RX_TRILL_CORE_IS_IS = 104, /* TRILL packet, Core IS-IS */ + _SHR_RX_TRILL_TTL = 105, /* TRILL packet, TTL check failed */ + _SHR_RX_BFD_SLOWPATH = 106, /* The BFD packet is being fwd to the */ + /* local uC for processing */ + _SHR_RX_BFD = 107, /* BFD Error */ + _SHR_RX_MIRROR = 108, /* Mirror packet */ + _SHR_RX_REGEX_ACTION = 109, /* Flow tracker */ + _SHR_RX_REGEX_MATCH = 110, /* Signature Match */ + _SHR_RX_FAILOVER_DROP = 111, /* Protection drop data */ + _SHR_RX_WLAN_TUNNEL_ERROR = 112, /* WLAN shim header error to CPU */ + _SHR_RX_CONGESTION_CNM_PROXY = 113, /* Congestion CNM Proxy */ + _SHR_RX_CONGESTION_CNM_PROXY_ERROR = 114, /* Congestion CNM Proxy Error */ + _SHR_RX_CONGESTION_CNM = 115, /* Congestion CNM Internal Packet */ + _SHR_RX_MPLS_UNKNOWN_ACH = 116, /* MPLS Unknown ACH */ + _SHR_RX_MPLS_LOOKUPS_EXCEEDED = 117, /* MPLS out of lookups */ + _SHR_RX_MPLS_RESERVED_ENTROPY_LABEL = 118, /* MPLS Entropy label in unallowed */ + /* range */ + _SHR_RX_MPLS_ILLEGAL_RESERVED_LABEL = 119, /* MPLS illegal reserved label */ + _SHR_RX_MPLS_ROUTER_ALERT_LABEL = 120, /* MPLS alert label */ + _SHR_RX_NIV_PRUNE = 121, /* NIV access port pruning (dst = src) */ + _SHR_RX_VIRTUAL_PORT_PRUNE = 122, /* SVP == DVP */ + _SHR_RX_NON_UNICAST_DROP = 123, /* Explicit multicast packet drop */ + _SHR_RX_TRILL_PACKET_PORT_MISMATCH = 124, /* TRILL packet vs Rbridge port */ + /* conflict */ + _SHR_RX_WLAN_CLIENT_MOVE = 125, /* WLAN client moved */ + _SHR_RX_WLAN_SOURCE_PORT_MISS = 126, /* WLAN SVP miss */ + _SHR_RX_WLAN_CLIENT_SOURCE_MISS = 127, /* WLAN client database SA miss */ + _SHR_RX_WLAN_CLIENT_DEST_MISS = 128, /* WLAN client database DA miss */ + _SHR_RX_WLAN_MTU = 129, /* WLAN MTU error */ + _SHR_RX_TRILL_NAME = 130, /* TRILL packet, Name check failed */ + _SHR_RX_L2GRE_SIP_MISS = 131, /* L2 GRE SIP miss */ + _SHR_RX_L2GRE_VPN_ID_MISS = 132, /* L2 GRE VPN id miss */ + _SHR_RX_TIMESYNC_UNKNOWN_VERSION = 133, /* Unknown version of IEEE1588 */ + _SHR_RX_BFD_ERROR = 134, /* BFD ERROR */ + _SHR_RX_BFD_UNKNOWN_VERSION = 135, /* BFD UNKNOWN VERSION */ + _SHR_RX_BFD_INVALID_VERSION = 136, /* BFD INVALID VERSION */ + _SHR_RX_BFD_LOOKUP_FAILURE = 137, /* BFD LOOKUP FAILURE */ + _SHR_RX_BFD_INVALID_PACKET = 138, /* BFD INVALID PACKET */ + _SHR_RX_VXLAN_SIP_MISS = 139, /* Vxlan SIP miss */ + _SHR_RX_VXLAN_VPN_ID_MISS = 140, /* Vxlan VPN id miss */ + _SHR_RX_FCOE_ZONE_CHECK_FAIL = 141, /* Fcoe zone check failed */ + _SHR_RX_IPMC_INTERFACE_MISMATCH = 142, /* IPMC input interface check failed */ + _SHR_RX_NAT = 143, /* NAT */ + _SHR_RX_TCP_UDP_NAT_MISS = 144, /* TCP/UDP packet NAT lookup miss */ + _SHR_RX_ICMP_NAT_MISS = 145, /* ICMP packet NAT lookup miss */ + _SHR_RX_NAT_FRAGMENT = 146, /* NAT lookup on fragmented packet */ + _SHR_RX_NAT_MISS = 147, /* Non TCP/UDP/ICMP packet NAT lookup */ + /* miss */ + _SHR_RX_UNKNOWN_SUBTENTING_PORT = 148, /* UNKNOWN_SUBTENTING_PORT */ + _SHR_RX_LLTAG_ABSENT_DROP = 149, /* LLTAG_ABSENT */ + _SHR_RX_LLTAG_PRESENT_DROP = 150, /* LLTAG_PRESENT */ + _SHR_RX_OAM_CCM_SLOWPATH = 151, /* OAM CCM packet copied to CPU */ + _SHR_RX_OAM_INCOMPLETE_OPCODE = 152, /* OAM INCOMPLETE_OPCODE */ + _SHR_RX_BHH_OAM_PACKET = 153, /* BHH OAM Packet */ + _SHR_RX_RESERVED_0 = 154, /* Broadcom Reserved */ + _SHR_RX_OAM_MPLS_LMDM = 155, /* MPLS LM/DM (RFC 6374) packet */ + _SHR_RX_SAT = 156, /* OAM SAT pkt */ + _SHR_RX_SAMPLE_SOURCE_FLEX = 157, /* Flexible sampled packets to CPU */ + _SHR_RX_FLEX_SFLOW = 158, /* Flex Sflow? */ + _SHR_RX_VXLT_MISS = 159, /* VLAN Translation miss packet */ + _SHR_RX_TUNNEL_DECAP_ECN_ERROR = 160, /* Tunnel decap ECN error */ + _SHR_RX_TUNNEL_OBJECT_VALIDATION_FAIL = 161, /* Tunnel Object Validation Fail */ + _SHR_RX_L3_CPU = 162, /* L3 Copy to CPU */ + _SHR_RX_TUNNEL_ADAPT_LOOKUP_MISS = 163, /* Tunnel Adapt Lookup Miss Drop */ + _SHR_RX_PACKET_FLOW_SELECT_MISS = 164, /* Packet Flow Select Miss */ + _SHR_RX_PROTECTION_DATA_DROP = 165, /* Protection Data Drop */ + _SHR_RX_PACKET_FLOW_SELECT = 166, /* Packet Flow Select */ + _SHR_RX_OTHER_LOOKUP_MISS = 167, /* Neither Source or Dest type of */ + /* Lookup Miss */ + _SHR_RX_INVALID_TPID = 168, /* Invalid TPID */ + _SHR_RX_MPLS_CONTROL_PACKET = 169, /* MPLS Control Packet */ + _SHR_RX_TUNNEL_TTL_ERROR = 170, /* Tunnel TTL Error */ + _SHR_RX_L2_HEADER_ERROR = 171, /* L2 header */ + _SHR_RX_OTHER_LOOKUP_HIT = 172, /* Neither Source or Dest type of */ + /* Lookup Hit */ + _SHR_RX_L2_SRC_LOOKUP_MISS = 173, /* L2 Source Lookup Miss */ + _SHR_RX_L2_SRC_LOOKUP_HIT = 174, /* L2 Source Lookup Hit */ + _SHR_RX_L2_DST_LOOKUP_MISS = 175, /* L2 Dest Lookup Miss */ + _SHR_RX_L2_DST_LOOKUP_HIT = 176, /* L2 Dest Lookup Hit */ + _SHR_RX_L3_SRC_ROUTE_LOOKUP_MISS = 177, /* L3 Source Route Lookup Miss */ + _SHR_RX_L3_SRC_HOST_LOOKUP_MISS = 178, /* L3 Source Host Lookup Miss */ + _SHR_RX_L3_SRC_ROUTE_LOOKUP_HIT = 179, /* L3 Source Route Lookup Hit */ + _SHR_RX_L3_SRC_HOST_LOOKUP_HIT = 180, /* L3 Source Host Lookup Hit */ + _SHR_RX_L3_DST_ROUTE_LOOKUP_MISS = 181, /* L3 Dest Route Lookup Miss */ + _SHR_RX_L3_DST_HOST_LOOKUP_MISS = 182, /* L3 Dest Host Lookup Miss */ + _SHR_RX_L3_DST_ROUTE_LOOKUP_HIT = 183, /* L3 Dest Route Lookup Hit */ + _SHR_RX_L3_DST_HOST_LOOKUP_HIT = 184, /* L3 Dest Host Lookup Hit */ + _SHR_RX_VLAN_TRANSLATE1_LOOKUP1_MISS = 185, /* VLAN Translate1 Lookup1 Miss */ + _SHR_RX_VLAN_TRANSLATE1_LOOKUP2_MISS = 186, /* VLAN Translate1 Lookup2 Miss */ + _SHR_RX_MPLS_LOOKUP1_MISS = 187, /* MPLS Lookup1 Miss */ + _SHR_RX_MPLS_LOOKUP2_MISS = 188, /* MPLS Lookup2 Miss */ + _SHR_RX_L3_TUNNEL_LOOKUP_MISS = 189, /* L3 Tunnel Lookup Miss */ + _SHR_RX_VLAN_TRANSLATE2_LOOKUP1_MISS = 190, /* VLAN Translate2 Lookup1 Miss */ + _SHR_RX_VLAN_TRANSLATE2_LOOKUP2_MISS = 191, /* VLAN Translate2 Lookup2 Miss */ + _SHR_RX_L2_STU_FAIL = 192, /* L2 STU check fail */ + _SHR_RX_SR_COUNTER_EXCEEDED = 193, /* Seamless Redundancy(SR) - */ + /* Counter Threshold Exceeded */ + _SHR_RX_SR_COPY_TO_CPU_BIT0 = 194, /* Seamless Redundancy(SR) copy to CPU */ + /* SR custom reason code bit 0 */ + _SHR_RX_SR_COPY_TO_CPU_BIT1 = 195, /* SR custom reason code bit 1 */ + _SHR_RX_SR_COPY_TO_CPU_BIT2 = 196, /* SR custom reason code bit 2 */ + _SHR_RX_SR_COPY_TO_CPU_BIT3 = 197, /* SR custom reason code bit 3 */ + _SHR_RX_SR_COPY_TO_CPU_BIT4 = 198, /* SR custom reason code bit 4 */ + _SHR_RX_SR_COPY_TO_CPU_BIT5 = 199, /* SR custom reason code bit 5 */ + _SHR_RX_L3_HEADER_MISMATCH = 200, /* L3 Header Mismatch */ + _SHR_RX_DLB_MONITOR = 201, /* DLB Monitor */ + _SHR_RX_ETRAP_MONITOR = 202, /* ETRAP Monitor */ + _SHR_RX_INT_TURNAROUND = 203, /* INT TurnAround */ + _SHR_RX_INT_HOP_LIMIT = 204, /* INT Hop Limit */ + _SHR_RX_PROTECTION_STATUS_DOWN = 205, /* Protection Status Down */ + _SHR_RX_SVTAG = 206, /* SVtag */ + _SHR_RX_SVTAG_LOOKUP_MISS = 207, /* SVtag Lookup Miss */ + _SHR_RX_PKT_DROP_ON_PORT_HIGIG3_CHECK = 208, /* Port HIGIG3 check fail */ + _SHR_RX_SRV6_PROCESS_ERROR = 209, /* SRV6 process error */ + _SHR_RX_SRV6_VALIDATION_ERROR = 210, /* SRV6 validation error */ + _SHR_RX_SRV6_UNKNOWN_RT_WITH_NONZERO_SL = 211, /* unknown routing type in SRV6 */ + /* packets with nonzero segment */ + /* left field */ + _SHR_RX_RCPU_TO_CPU = 212, /* RCPU copied to CPU */ + _SHR_RX_REASON_COUNT = 213 /* MUST BE LAST */ +} _shr_rx_reason_t; + +#define _SHR_RX_REASON_NAMES_INITIALIZER { \ + "Invalid", \ + "Arp", \ + "Bpdu", \ + "Broadcast", \ + "ClassBasedMove", \ + "ClassTagPackets", \ + "Control", \ + "CpuLearn", \ + "DestLookupFail", \ + "Dhcp", \ + "DosAttack", \ + "E2eHolIbp", \ + "EncapHiGigError", \ + "FilterMatch", \ + "GreChecksum", \ + "GreSourceRoute", \ + "HigigControl", \ + "HigigHdrError", \ + "IcmpRedirect", \ + "Igmp", \ + "IngressFilter", \ + "Ip", \ + "IpfixRateViolation", \ + "IpMcastMiss", \ + "IpOptionVersion", \ + "Ipmc", \ + "IpmcRsvd", \ + "L2Cpu", \ + "L2DestMiss", \ + "L2LearnLimit", \ + "L2Move", \ + "L2MtuFail", \ + "L2NonUnicastMiss", \ + "L2SourceMiss", \ + "L3AddrBindFail", \ + "L3DestMiss", \ + "L3HeaderError", \ + "L3MtuFail", \ + "L3Slowpath", \ + "L3SourceMiss", \ + "L3SourceMove", \ + "MartianAddr", \ + "McastIdxError", \ + "McastMiss", \ + "MimServiceError", \ + "MplsCtrlWordError", \ + "MplsError", \ + "MplsInvalidAction", \ + "MplsInvalidPayload", \ + "MplsLabelMiss", \ + "MplsSequenceNumber", \ + "MplsTtl", \ + "Multicast", \ + "Nhop", \ + "OamError", \ + "OamSlowPath", \ + "OamLMDM", \ + "ParityError", \ + "Protocol", \ + "SampleDest", \ + "SampleSource", \ + "SharedVlanMismatch", \ + "SourceRoute", \ + "TimeStamp", \ + "Ttl", \ + "Ttl1", \ + "TunnelError", \ + "UdpChecksum", \ + "UnknownVlan", \ + "UrpfFail", \ + "VcLabelMiss", \ + "VlanFilterMatch", \ + "WlanClientError", \ + "WlanSlowPath", \ + "WlanDot1xDrop", \ + "ExceptionFlood", \ + "Timesync", \ + "EavData", \ + "SamePortBridge", \ + "SplitHorizon", \ + "L4Error", \ + "Stp", \ + "EgressFilterRedirect", \ + "FilterRedirect", \ + "Loopback", \ + "VlanTranslate", \ + "Mmrp", \ + "Srp", \ + "TunnelControl", \ + "L2Marked", \ + "WlanSlowpathKeepalive", \ + "Station", \ + "Niv", \ + "NivPrioDrop", \ + "NivInterfaceMiss", \ + "NivRpfFail", \ + "NivTagInvalid", \ + "NivTagDrop", \ + "NivUntagDrop", \ + "Trill", \ + "TrillInvalid", \ + "TrillMiss", \ + "TrillRpfFail", \ + "TrillSlowpath", \ + "TrillCoreIsIs", \ + "TrillTtl", \ + "BfdSlowpath", \ + "Bfd", \ + "Mirror", \ + "RegexAction", \ + "RegexMatch", \ + "FailoverDrop", \ + "WlanTunnelError", \ + "CongestionCnmProxy", \ + "CongestionCnmProxyError", \ + "CongestionCnm", \ + "MplsUnknownAch", \ + "MplsLookupsExceeded", \ + "MplsReservedEntropyLabel", \ + "MplsIllegalReservedLabel", \ + "MplsRouterAlertLabel", \ + "NivPrune", \ + "VirtualPortPrune", \ + "NonUnicastDrop", \ + "TrillPacketPortMismatch", \ + "WlanClientMove", \ + "WlanSourcePortMiss", \ + "WlanClientSourceMiss", \ + "WlanClientDestMiss", \ + "WlanMtu", \ + "TrillName", \ + "L2GreSipMiss", \ + "L2GreVpnIdMiss", \ + "TimesyncUnknownVersion", \ + "BfdError", \ + "BfdUnknownVersion", \ + "BfdInvalidVersion", \ + "BfdLookupFailure", \ + "BfdInvalidPacket", \ + "VxlanSipMiss", \ + "VxlanVpnIdMiss", \ + "FcoeZoneCheckFail", \ + "IpmcInterfaceMismatch", \ + "Nat", \ + "TcpUdpNatMiss", \ + "IcmpNatMiss", \ + "NatFragment", \ + "NatMiss", \ + "UnknownSubtentingPort", \ + "LLTagAbsentDrop", \ + "LLTagpresenDrop", \ + "OAMCCMslowpath", \ + "OAMIncompleteOpcode", \ + "OAMCCMpacket", \ + "Reserved0", \ + "OAMMplsLmDM", \ + "SAT", \ + "SampleSourceFlex", \ + "FlexSflow", \ + "VxltMiss", \ + "TunnelDecapEcnError", \ + "TunnelObjectValidationFail", \ + "L3Cpu", \ + "TunnelAdaptLookupMiss", \ + "PacketFlowSelectMiss", \ + "ProtectionDataDrop", \ + "PacketFlowSelect", \ + "OtherLookupMiss", \ + "InvalidTpid", \ + "MplsControlPacket", \ + "TunnelTtlError", \ + "L2HeaderError", \ + "OtherLookupHit", \ + "L2SrcLookupMiss", \ + "L2SrcLookupHit", \ + "L2DstLookupMiss", \ + "L2DstLookupHit", \ + "L3SrcRouteLookupMiss", \ + "L3SrcHostLookupMiss", \ + "L3SrcRouteLookupHit", \ + "L3SrcHostLookupHit", \ + "L3DstRouteLookupMiss", \ + "L3DstHostLookupMiss", \ + "L3DstRouteLookupHit", \ + "L3DstHostLookupHit", \ + "MplsLookup1Miss", \ + "MplsLookup2Miss", \ + "L3TunnelLookupMiss", \ + "VlanTranslate1Lookup1Miss",\ + "VlanTranslate1Lookup2Miss",\ + "VlanTranslate2Lookup1Miss",\ + "VlanTranslate2Lookup2Miss",\ + "L2StuFail", \ + "SrCounterExceeded", \ + "SrCopyToCpuBit0", \ + "SrCopyToCpuBit1", \ + "SrCopyToCpuBit2", \ + "SrCopyToCpuBit3", \ + "SrCopyToCpuBit4", \ + "SrCopyToCpuBit5", \ + "L3HeaderMismatch", \ + "DlbMonitor", \ + "EtrapMonitor", \ + "IntTurnAround", \ + "IntHopLimit", \ + "ProtectionStatusDown", \ + "Svtag", \ + "SvtagLookupMiss", \ + "PktDropOnPortHigig3Check", \ + "Srv6ProcessError", \ + "Srv6ValidationError", \ + "Srv6UnknownRoutingTypeWithNonZeroSl", \ + "RcpuToCpu", \ +} + +/* Base type for declarations */ +#define SHR_BITDCL uint32 +#define SHR_BITWID 32 + +/* (internal) Number of SHR_BITDCLs needed to contain _max bits */ +#define _SHR_BITDCLSIZE(_max) (((_max) + SHR_BITWID - 1) / SHR_BITWID) + +/* + * Set of "reasons" (see _SHR_RX_*) why a packet came to the CPU. + */ +typedef struct _shr_rx_reasons_s { + SHR_BITDCL pbits[_SHR_BITDCLSIZE(_SHR_RX_REASON_COUNT)]; +} _shr_rx_reasons_t; + +/* + * Macro to add a reason (_SHR_RX_*) to a set of + * reasons (_shr_rx_reasons_t) + */ +#define _SHR_RX_REASON_SET(_reasons, _reason) \ + ((((_reasons).pbits)[(_reason) / SHR_BITWID]) |= (1U << ((_reason) % SHR_BITWID))) + +/* + * Macro to clear a set of reasons (_shr_rx_reasons_t). + */ +#define _SHR_RX_REASON_CLEAR_ALL(_reasons) \ +{ \ + SHR_BITDCL *_ptr; \ + int _c = _SHR_RX_REASON_COUNT; \ + \ + if (_c <= 0) { \ + return; \ + } \ + \ + _ptr = (((_reasons).pbits)); \ + \ + while (_c >= SHR_BITWID) { \ + *(_ptr++) = 0; \ + _c -= SHR_BITWID; \ + } \ + \ + if(_c > 0) { \ + SHR_BITDCL _mask = ~0; \ + _mask >>= (SHR_BITWID - _c); \ + *(_ptr) &= ~_mask; \ + } \ +} + +/* + * Macro to check if a reason (_SHR_RX_*) is included in a + * set of reasons (_shr_rx_reasons_t). Returns: + * zero => reason is not included in the set + * non-zero => reason is included in the set + */ +#define _SHR_RX_REASON_GET(_reasons, _reason) \ + ((((_reasons).pbits)[(_reason) / SHR_BITWID]) & (1U << ((_reason) % SHR_BITWID))) + +#define _SHR_RX_REASON_ITER(_reasons, reason) \ + for(reason = _SHR_RX_INVALID; reason < (int)_SHR_RX_REASON_COUNT; reason++) \ + if(_SHR_RX_REASON_GET(_reasons, reason)) + +typedef enum _shr_rx_redirect_e { + _SHR_RX_REDIRECT_NORMAL = 0, + _SHR_RX_REDIRECT_HIGIG = 1, + _SHR_RX_REDIRECT_TRUNCATED = 2, + _SHR_RX_REDIRECT_MAX = _SHR_RX_REDIRECT_TRUNCATED +} _shr_rx_redirect_e; + + +typedef enum _shr_rx_decap_tunnel_e { + _SHR_RX_DECAP_NONE = 0, /* No tunnel Decap */ + _SHR_RX_DECAP_ACCESS_SVP = 1, /* Packet ingress on Access SVP (No decap) */ + _SHR_RX_DECAP_MIM = 2, /* Decap Mac-in-Mac tunnel */ + _SHR_RX_DECAP_L2GRE = 3, /* Decap L2GRE tunnel */ + _SHR_RX_DECAP_VXLAN = 4, /* Decap VXLAN tunnel */ + _SHR_RX_DECAP_AMT = 5, /* Decap AMT tunnel */ + _SHR_RX_DECAP_IP = 6, /* Decap IP tunnel */ + _SHR_RX_DECAP_TRILL = 7, /* Decap TRILL tunnel */ + _SHR_RX_DECAP_L2MPLS_1LABEL = 8, /* Decap MPLS 1 Label, L2 payload, no + Control Word */ + _SHR_RX_DECAP_L2MPLS_2LABEL = 9, /* Decap MPLS 2 Label, L2 payload, no + Control Word */ + _SHR_RX_DECAP_L2MPLS_1LABELCW = 10, /* Decap MPLS 1 Label, L2 payload, Control + Word present */ + _SHR_RX_DECAP_L2MPLS_2LABELCW = 11, /* Decap MPLS 2 Label, L2 payload, Control + Word present */ + _SHR_RX_DECAP_L3MPLS_1LABEL = 12, /* Decap MPLS 1 Label, L3 payload, no + Control Word present */ + _SHR_RX_DECAP_L3MPLS_2LABEL = 13, /* Decap MPLS 2 Label, L3 payload, no + Control Word present */ + _SHR_RX_DECAP_L3MPLS_1LABELCW = 14, /* Decap MPLS 1 Label, L3 payload, Control + Word present */ + _SHR_RX_DECAP_L3MPLS_2LABELCW = 15, /* Decap MPLS 2 Label, L3 payload, Control + Word present */ + _SHR_RX_DECAP_WTP2AC = 16, /* Decap WTP2AC Tunnel */ + _SHR_RX_DECAP_AC2AC = 17, /* Decap AC2AC Tunnel */ + _SHR_RX_DECAP_MPLS_1LABELCW = 18, /* Decap MPLS 1 Label, Control + Word present */ + _SHR_RX_DECAP_MPLS_2LABELCW = 19, /* Decap MPLS 2 Label, Control + Word present */ + _SHR_RX_DECAP_MPLS_1LABEL = 20, /* Decap MPLS 1 Label, no + Control Word */ + _SHR_RX_DECAP_MPLS_2LABEL = 21, /* Decap MPLS 2 Label, no + Control Word */ + _SHR_RX_DECAP_MPLS_3LABEL = 22, /* Decap MPLS 3 Label, no Control + Word */ + _SHR_RX_DECAP_MPLS_3LABELCW = 23, /* Decap MPLS 3 Label, Control + Word present */ + _SHR_RX_DECAP_MPLS_3LABEL_ENTROPY = 25, /* Decap MPLS 3 Label + entropy, + no Control Word */ + _SHR_RX_DECAP_MPLS_3LABEL_ENTROPYCW = 26, /* Decap MPLS 3 Label + entropy, + Control Word present */ + _SHR_RX_DECAP_COUNT = 27 /* Decap Tunnel Max */ +} _shr_rx_decap_tunnel_t; + +typedef enum _shr_rx_decap_hdr_e { + _SHR_RX_DECAP_HDR_NONE = 0, /* No headers Decapped */ + _SHR_RX_DECAP_SYSTEM_HDR = 1, /* Decap System Header */ + _SHR_RX_DECAP_OUTER_L2_HDR = 2, /* Decap Outer L2 Header */ + _SHR_RX_DECAP_L3_L4_TUNNEL_HDR = 4, /* Decap Outer L3/L4/TUNNEL Header */ + _SHR_RX_DECAP_INNER_L2_HDR = 8, /* Decap Inner L2 Header */ + _SHR_RX_DECAP_INNER_L3_L4_HDR = 16, /* Decap Inner L3 and L4 Header */ + _SHR_RX_DECAP_HDR_MAX = _SHR_RX_DECAP_INNER_L3_L4_HDR /* Max Value */ +} _shr_rx_decap_hdr_t; + +#endif /* _SHR_RX_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h new file mode 100644 index 000000000000..a3f0c2888ed2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h @@ -0,0 +1,355 @@ +/* + * $Id: dcb.h,v 1.32 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: soc/dcb.h + * Purpose: Define dma control block (DCB) operations + * A uniform set of operations is defined here and loaded + * into SOC_CONTROL during initialization. + */ + +#ifndef _SOC_DCB_H +#define _SOC_DCB_H + +#include +#include + +typedef void dcb_t; +struct dv_s; /* in soc/dma.h, but we have recursive problems */ + +#ifdef INCLUDE_KNET +/* + * On XGS devices bit 15 fo the Transferred Bytes field in + * the DCBs is used to indicate that kernel processing is + * complete. Using this bit reduces the theoretically maximum + * supported packet size from 64K to 32K, but this is still + * adequate for 16K jumbo packets. + */ +#define SOC_DCB_KNET_DONE 0x8000 + +#endif + +/* + * DCB Operations + */ + +typedef struct dcb_op_s { + int dcbtype; + int dcbsize; + soc_rx_reason_t **rx_reason_maps; + soc_rx_reason_t * (*rx_reason_map_get)(struct dcb_op_s *dcb_op, dcb_t *dcb); + void (*rx_reasons_get)(struct dcb_op_s *dcb_op, dcb_t *dcb, + soc_rx_reasons_t *reasons); + void (*init)(dcb_t *dcb); + /* composite helper functions */ + int (*addtx)(struct dv_s *dv, sal_vaddr_t addr, uint32 count, + pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, + uint32 flags, uint32 *hgh); + int (*addrx)(struct dv_s *dv, sal_vaddr_t addr, uint32 count, + uint32 flags); + uint32 (*intrinfo)(int unit, dcb_t *dcb, int tx, uint32 *count); + /* basic dcb values */ + void (*reqcount_set)(dcb_t *dcb, uint32 count); + uint32 (*reqcount_get)(dcb_t *dcb); + uint32 (*xfercount_get)(dcb_t *dcb); + void (*addr_set)(int unit, dcb_t *dcb, sal_vaddr_t addr); + sal_vaddr_t (*addr_get)(int unit, dcb_t *dcb); + sal_paddr_t (*paddr_get)(dcb_t *dcb); + void (*done_set)(dcb_t *dcb, int val); + uint32 (*done_get)(dcb_t *dcb); + void (*sg_set)(dcb_t *dcb, int val); + uint32 (*sg_get)(dcb_t *dcb); + void (*chain_set)(dcb_t *dcb, int val); + uint32 (*chain_get)(dcb_t *dcb); + void (*reload_set)(dcb_t *dcb, int val); + uint32 (*reload_get)(dcb_t *dcb); + void (*desc_intr_set)(dcb_t *dcb, int val); + uint32 (*desc_intr_get)(dcb_t *dcb); + /* transmit dcb controls */ + void (*tx_l2pbm_set)(dcb_t *dcb, pbmp_t pbm); + void (*tx_utpbm_set)(dcb_t *dcb, pbmp_t pbm); + void (*tx_l3pbm_set)(dcb_t *dcb, pbmp_t pbm); + void (*tx_crc_set)(dcb_t *dcb, int crc); + void (*tx_cos_set)(dcb_t *dcb, int cos); + void (*tx_destmod_set)(dcb_t *dcb, uint32 modid); + void (*tx_destport_set)(dcb_t *dcb, uint32 port); + void (*tx_opcode_set)(dcb_t *dcb, uint32 opcode); + void (*tx_srcmod_set)(dcb_t *dcb, uint32 modid); + void (*tx_srcport_set)(dcb_t *dcb, uint32 port); + void (*tx_prio_set)(dcb_t *dcb, uint32 prio); + void (*tx_pfm_set)(dcb_t *dcb, uint32 pfm); + + /* receive dcb controls */ + uint32 (*rx_untagged_get)(dcb_t *dcb, int dt_mode, int ingport_is_hg); + uint32 (*rx_crc_get)(dcb_t *dcb); + uint32 (*rx_cos_get)(dcb_t *dcb); + uint32 (*rx_destmod_get)(dcb_t *dcb); + uint32 (*rx_destport_get)(dcb_t *dcb); + uint32 (*rx_opcode_get)(dcb_t *dcb); + uint32 (*rx_classtag_get)(dcb_t *dcb); + uint32 (*rx_matchrule_get)(dcb_t *dcb); + uint32 (*rx_start_get)(dcb_t *dcb); + uint32 (*rx_end_get)(dcb_t *dcb); + uint32 (*rx_error_get)(dcb_t *dcb); + uint32 (*rx_prio_get)(dcb_t *dcb); + uint32 (*rx_reason_get)(dcb_t *dcb); + uint32 (*rx_reason_hi_get)(dcb_t *dcb); + uint32 (*rx_ingport_get)(dcb_t *dcb); + uint32 (*rx_srcport_get)(dcb_t *dcb); + uint32 (*rx_srcmod_get)(dcb_t *dcb); + uint32 (*rx_mcast_get)(dcb_t *dcb); + uint32 (*rx_vclabel_get)(dcb_t *dcb); + uint32 (*rx_mirror_get)(dcb_t *dcb); + uint32 (*rx_timestamp_get)(dcb_t *dcb); + uint32 (*rx_timestamp_upper_get)(dcb_t *dcb); + void (*hg_set)(dcb_t *dcb, uint32 hg); + uint32 (*hg_get)(dcb_t *dcb); + void (*stat_set)(dcb_t *dcb, uint32 stat); + uint32 (*stat_get)(dcb_t *dcb); + void (*purge_set)(dcb_t *dcb, uint32 purge); + uint32 (*purge_get)(dcb_t *dcb); + uint32 * (*mhp_get)(dcb_t *dcb); + uint32 (*rx_outer_vid_get)(dcb_t *dcb); + uint32 (*rx_outer_pri_get)(dcb_t *dcb); + uint32 (*rx_outer_cfi_get)(dcb_t *dcb); + uint32 (*rx_outer_tag_action_get)(dcb_t *dcb); + uint32 (*rx_inner_vid_get)(dcb_t *dcb); + uint32 (*rx_inner_pri_get)(dcb_t *dcb); + uint32 (*rx_inner_cfi_get)(dcb_t *dcb); + uint32 (*rx_inner_tag_action_get)(dcb_t *dcb); + uint32 (*rx_bpdu_get)(dcb_t *dcb); + uint32 (*rx_l3_intf_get)(dcb_t *dcb); + uint32 (*rx_decap_tunnel_get)(dcb_t *dcb); + uint32 (*rx_switch_drop_get)(dcb_t *dcb); + uint32 (*olp_encap_oam_pkt_get)(dcb_t *dcb); + uint32 (*read_ecc_error_get)(dcb_t *dcb); + uint32 (*desc_remaining_get)(dcb_t *dcb); + uint32 (*desc_remaining_set)(dcb_t *dcb, uint32 val); + uint32 (*desc_status_get)(dcb_t *dcb); + uint32 (*desc_status_set)(dcb_t *dcb, uint32 val); + uint32 (*rx_hg2_ext_eh_type_get)(dcb_t *dcb); +} dcb_op_t; + +#define SOC_DCB(_u) SOC_CONTROL(_u)->dcb_op + +#define SOC_DCB_TYPE(_u) SOC_DCB(_u)->dcbtype +#define SOC_DCB_SIZE(_u) SOC_DCB(_u)->dcbsize + +#define SOC_DCB_RX_REASON_MAPS( _u) SOC_DCB(_u)->rx_reason_maps + +#define SOC_DCB_INIT(_u, _dcb) SOC_DCB(_u)->init(_dcb) +#define SOC_DCB_ADDTX(_u, _dv, _addr, _count, _l2pbm, _utpbm, _l3pbm, _f, _hgh) \ + SOC_DCB(_u)->addtx(_dv, _addr, _count, _l2pbm, _utpbm, _l3pbm, _f, _hgh) +#define SOC_DCB_ADDRX(_u, _dv, _addr, _count, _f) \ + SOC_DCB(_u)->addrx(_dv, _addr, _count, _f) +#define SOC_DCB_INTRINFO(_u, _dcb, _tx, _countp) \ + SOC_DCB(_u)->intrinfo(_u, _dcb, _tx, _countp) + +/* flags returned from INTRINFO */ +#define SOC_DCB_INFO_DONE 0x02 +#define SOC_DCB_INFO_PKTEND 0x01 + +#define SOC_DCB_REQCOUNT_SET(_u, _dcb, _count) \ + SOC_DCB(_u)->reqcount_set(_dcb, _count) +#define SOC_DCB_REQCOUNT_GET(_u, _dcb) \ + SOC_DCB(_u)->reqcount_get(_dcb) +#ifdef INCLUDE_KNET +/* Mask off indicator for kernel processing done */ +#define SOC_DCB_XFERCOUNT_GET(_u, _dcb) \ + (SOC_DCB(_u)->xfercount_get(_dcb) & ~SOC_DCB_KNET_DONE) +#else +#define SOC_DCB_XFERCOUNT_GET(_u, _dcb) \ + SOC_DCB(_u)->xfercount_get(_dcb) +#endif +#define SOC_DCB_ADDR_SET(_u, _dcb, _addr) \ + SOC_DCB(_u)->addr_set(_u, _dcb, _addr) +#define SOC_DCB_ADDR_GET(_u, _dcb) \ + SOC_DCB(_u)->addr_get(_u, _dcb) +#define SOC_DCB_PADDR_GET(_u, _dcb) \ + SOC_DCB(_u)->paddr_get(_dcb) +#define SOC_DCB_DONE_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->done_set(_dcb, _val) +#define SOC_DCB_DONE_GET(_u, _dcb) \ + SOC_DCB(_u)->done_get(_dcb) +#define SOC_DCB_SG_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->sg_set(_dcb, _val) +#define SOC_DCB_SG_GET(_u, _dcb) \ + SOC_DCB(_u)->sg_get(_dcb) +#define SOC_DCB_CHAIN_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->chain_set(_dcb, _val) +#define SOC_DCB_CHAIN_GET(_u, _dcb) \ + SOC_DCB(_u)->chain_get(_dcb) +#define SOC_DCB_RELOAD_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->reload_set(_dcb, _val) +#define SOC_DCB_RELOAD_GET(_u, _dcb) \ + SOC_DCB(_u)->reload_get(_dcb) + +#define SOC_DCB_ALL_DESC_INTR 0x1 +#define SOC_DCB_CNTLD_DESC_INTR 0x2 + +#define SOC_DCB_DESC_INTR_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->desc_intr_set(_dcb, _val) +#define SOC_DCB_DESC_INTR_GET(_u, _dcb) \ + SOC_DCB(_u)->desc_intr_get(_dcb) + +#define SOC_DCB_TX_L2PBM_SET(_u, _dcb, _pbm) \ + SOC_DCB(_u)->tx_l2pbm_set(_dcb, _pbm) +#define SOC_DCB_TX_UTPBM_SET(_u, _dcb, _pbm) \ + SOC_DCB(_u)->tx_utpbm_set(_dcb, _pbm) +#define SOC_DCB_TX_L3PBM_SET(_u, _dcb, _pbm) \ + SOC_DCB(_u)->tx_l3pbm_set(_dcb, _pbm) +#define SOC_DCB_TX_CRC_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_crc_set(_dcb, _val) +#define SOC_DCB_TX_COS_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_cos_set(_dcb, _val) +#define SOC_DCB_TX_DESTMOD_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_destmod_set(_dcb, _val) +#define SOC_DCB_TX_DESTPORT_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_destport_set(_dcb, _val) +#define SOC_DCB_TX_OPCODE_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_opcode_set(_dcb, _val) +#define SOC_DCB_TX_SRCMOD_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_srcmod_set(_dcb, _val) +#define SOC_DCB_TX_SRCPORT_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_srcport_set(_dcb, _val) +#define SOC_DCB_TX_PRIO_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_prio_set(_dcb, _val) +#define SOC_DCB_TX_PFM_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_pfm_set(_dcb, _val) + +#define SOC_DCB_RX_UNTAGGED_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_untagged_get(_dcb, \ + SOC_DT_MODE(_u), IS_HG_PORT(_u, SOC_DCB_RX_INGPORT_GET(_u, _dcb))) +#define SOC_DCB_RX_CRC_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_crc_get(_dcb) +#define SOC_DCB_RX_COS_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_cos_get(_dcb) +#define SOC_DCB_RX_DESTMOD_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_destmod_get(_dcb) +#define SOC_DCB_RX_DESTPORT_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_destport_get(_dcb) +#define SOC_DCB_RX_OPCODE_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_opcode_get(_dcb) +#define SOC_DCB_RX_CLASSTAG_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_classtag_get(_dcb) +#define SOC_DCB_RX_MATCHRULE_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_matchrule_get(_dcb) +#define SOC_DCB_OLP_ENCAP_OAM_PKT_GET(_u, _dcb) \ + SOC_DCB(_u)->olp_encap_oam_pkt_get(_dcb) +#define SOC_DCB_READ_ECC_ERROR_GET(_u, _dcb) \ + SOC_DCB(_u)->read_ecc_error_get(_dcb) +#define SOC_DCB_DESC_REMAINING_GET(_u, _dcb) \ + SOC_DCB(_u)->desc_remaining_get(_dcb) +#define SOC_DCB_DESC_REMAINING_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->desc_remaining_set(_dcb, _val) +#define SOC_DCB_DESC_STATUS_GET(_u, _dcb) \ + SOC_DCB(_u)->desc_status_get(_dcb) +#define SOC_DCB_DESC_STATUS_SET(_u, _dcb) \ + SOC_DCB(_u)->desc_status_set(_dcb) +#define SOC_DCB_RX_START_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_start_get(_dcb) +#define SOC_DCB_RX_END_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_end_get(_dcb) +#define SOC_DCB_RX_ERROR_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_error_get(_dcb) +#define SOC_DCB_RX_PRIO_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_prio_get(_dcb) +#define SOC_DCB_RX_REASON_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_reason_get(_dcb) +#define SOC_DCB_RX_REASON_HI_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_reason_hi_get(_dcb) +#define SOC_DCB_RX_REASONS_GET(_u, _dcb, _reasons) \ + SOC_DCB(_u)->rx_reasons_get(SOC_DCB(_u), _dcb, _reasons) +#define SOC_DCB_RX_INGPORT_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_ingport_get(_dcb) +#define SOC_DCB_RX_SRCPORT_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_srcport_get(_dcb) +#define SOC_DCB_RX_SRCMOD_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_srcmod_get(_dcb) +#define SOC_DCB_RX_MCAST_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_mcast_get(_dcb) +#define SOC_DCB_RX_VCLABEL_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_vclabel_get(_dcb) +#define SOC_DCB_RX_MIRROR_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_mirror_get(_dcb) +#define SOC_DCB_RX_TIMESTAMP_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_timestamp_get(_dcb) +#define SOC_DCB_RX_TIMESTAMP_UPPER_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_timestamp_upper_get(_dcb) + +#define SOC_DCB_HG_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->hg_set(_dcb, _val) +#define SOC_DCB_HG_GET(_u, _dcb) \ + SOC_DCB(_u)->hg_get(_dcb) +#define SOC_DCB_STAT_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->stat_set(_dcb, _val) +#define SOC_DCB_STAT_GET(_u, _dcb) \ + SOC_DCB(_u)->stat_get(_dcb) +#define SOC_DCB_PURGE_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->purge_set(_dcb, _val) +#define SOC_DCB_PURGE_GET(_u, _dcb) \ + SOC_DCB(_u)->purge_get(_dcb) + +#define SOC_DCB_MHP_GET(_u, _dcb) \ + SOC_DCB(_u)->mhp_get(_dcb) +#define SOC_DCB_RX_OUTER_VID_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_outer_vid_get(_dcb) +#define SOC_DCB_RX_OUTER_PRI_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_outer_pri_get(_dcb) +#define SOC_DCB_RX_OUTER_CFI_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_outer_cfi_get(_dcb) +#define SOC_DCB_RX_OUTER_TAG_ACTION_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_outer_tag_action_get(_dcb) +#define SOC_DCB_RX_INNER_VID_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_inner_vid_get(_dcb) +#define SOC_DCB_RX_INNER_PRI_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_inner_pri_get(_dcb) +#define SOC_DCB_RX_INNER_CFI_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_inner_cfi_get(_dcb) +#define SOC_DCB_RX_INNER_TAG_ACTION_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_inner_tag_action_get(_dcb) +#define SOC_DCB_RX_BPDU_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_bpdu_get(_dcb) +#define SOC_DCB_RX_L3_INTF_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_l3_intf_get(_dcb) +#define SOC_DCB_RX_DECAP_TUNNEL_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_decap_tunnel_get(_dcb) +#define SOC_DCB_RX_SWITCH_DROP_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_switch_drop_get(_dcb) + +#define SOC_DCB_RX_HG2_EXT_EH_TYPE_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_hg2_ext_eh_type_get(_dcb) + +#define SOC_DCB_IDX2PTR(_u, _dcb, _i) \ + (dcb_t *)((char *)_dcb + (SOC_DCB_SIZE(_u) * (_i))) +#define SOC_DCB_PTR2IDX(_u, _dcb1, _dcb2) \ + (int)(((char *)_dcb1 - (char *)_dcb2) / SOC_DCB_SIZE(_u)) + +extern void soc_dcb_unit_init(int unit); + +#endif /* _SOC_DCB_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h new file mode 100644 index 000000000000..7a064bd82d7b --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h @@ -0,0 +1,553 @@ +/* + * $Id$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: soc/dcbformats.h + * Purpose: Define dma control block (DCB) formats for various chips. + * This information is only needed in soc/dcb.c, which + * provides a uniform interface to the reset of software + * for controlling DCBs. + * + * There are currently 32 DMA Control block formats + * (also known as DMA descriptors): + * + * Type 2 5670/75 (TX) + * Type 3 5690 aka DRACO1 + * Type 4 5670/75 (RX) aka HERCULES + * Type 5 5673 aka LYNX + * Type 6 5665 aka TUCANA + * Type 7 5695 aka DRACO15 + * Type 9 56504 aka XGS3 (Firebolt) + * Type 10 56601 aka XGS3 (Easyrider) + * Type 11 56800 aka XGS3 (HUMV) + * Type 12 56218 aka XGS3 (Raptor) (Derived from DCB 9) + * Type 13 56514 aka XGS3 (Firebolt2) (Derived from DCB 9) + * Type 14 56624 & 56680 aka XGS3 (Triumph & Valkyrie) + * Type 15 56224 aka XGS3 (Raven A0) (Derived from DCB 12) + * Type 16 56820 aka XGS3 (Scorpion) + * Type 17 53314 aka XGS3 (Hawkeye) (Derived from DCB 15) + * Type 18 56224 aka XGS3 (Raven B0) (Derived from DCB 15) + * Type 19 56634/56524/56685 aka XGS3 (Triumph2/Apollo/Valkyrie2) + * Type 20 56334 aka XGS3 (Enduro) (Derived from DCB 19) + * Type 21 56840 aka XGS3 (Trident) + * Type 23 56640 aka XGS3 (Triumph3) + * Type 24 56440 aka XGS3 (Katana) + * Type 25 Obsolete 88030 aka SBX Caladan3 + * Type 26 56850 aka XGS3 (Trident2) (Derived from DCB 23) + * Type 27 Obsolete 88230 aka SBX Sirius + * Type 29 56450 aka XGX3 (Katana2) + * Type 31 53400 aka XGX3 (Greyhound) + * Type 32 56960 aka XGX3 (Tomahawk) (Derived from DCB 26) + * Type 33 56860 aka XGS3 (Trident2+) (Derived from DCB 26) + * Type 34 56160 aka XGX3 (Hurricane3) + * Type 35 56560 APACHE + * Type 36 56870 (Trident 3) + * Type 37 53570 aka XGX3 (Greyhound2) + * Type 38 56980 (Tomahawk 3) + * + * The 5670/75 uses two different formats depending on whether the DCB is + * for transmit or receive. + * + * The 5695 can be configured to use type 3 or type 7 depending on whether + * CMIC_CONFIG.EXTENDED_DCB_ENABLE is set or not. + */ + +#ifndef _SOC_DCBFORMATS_H +#define _SOC_DCBFORMATS_H + +#include +#include + +#define DCB_STRATA_OPTIM_PURGE 3 +#define DCB_STRATA_CRC_LEAVE 0 +#define DCB_STRATA_CRC_REGEN 2 +#define DCB_XGS_CRC_LEAVE 0 +#define DCB_XGS_CRC_REGEN 1 + +#define DCB_MAX_REQCOUNT 0x7fff /* 32KB */ +#define DCB_MAX_SIZE (16*4) /* type 14 */ + +#if defined(BCM_XGS3_SWITCH_SUPPORT) +/* + * DMA Control Block - Type 9 + * Used on 56504 devices + * 11 words + */ +typedef struct { + uint32 addr; /* T9.0: physical address */ + /* T9.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, + c_stat:1, + c_hg:1, + c_reload:1, + c_sg:1, + c_chain:1, + c_count:16; +#endif /* LE_HOST */ + uint32 mh0; /* T9.2: Module Header word 0 */ + uint32 mh1; /* T9.3: Module Header word 1 */ + uint32 mh2; /* T9.4: Module Header word 2 */ +#ifdef LE_HOST + /* T9.5: RX Status 0 */ + uint32 mtp_index_hi:5, /* Mirror-to-Port Index */ + l3uc:1, /* L3 UC */ + l3only:1, /* L3 only */ + l3ipmc:1, /* L3 IPMC */ + l3_intf:12, /* L3 Intf number */ + imirror:1, /* Ingress Mirroring */ + emirror:1, /* Egress Mirroring */ + cos:3, /* Packet Priority */ + cpu_cos:3, /* CPU COS */ + chg_tos:1, /* DSCP Changed */ + cell_error:1, /* Cell CRC Checksum Error Detected */ + bpdu:1, /* BPDU Packet */ + add_vid:1; /* VLAN ID Added */ + /* T9.6: RX Status 1 */ + uint32 reason:25, /* CPU opcode */ + regen_crc:1, /* Regenerate CRC */ + switch_pkt:1, /* Switched packet */ + src_hg:1, /* Source is Higig */ + purge_cell:1, /* Packet is marked Purged */ + pkt_aged:1, /* Pkt is Aged */ + mtp_index_lo:2; /* Mirror-to-Port Index */ + /* T9.7: RX Status 2 */ + uint32 dscp_hi:2, /* New DSCP */ + srcport:5, /* Source port */ + nh_index:13, /* Next hop index */ + match_rule:10, /* Matched Rule */ + match_rule_valid:1, /* Matched Rule valid */ + decap_iptunnel:1; /* Decap IP Tunneling Packet */ + + /* T9.8: RX Status 3 */ + uint32 :11, + ingress_untagged:1, /* Pkt came in untagged */ + outer_vid:12, /* VID */ + outer_cfi:1, /* CFI */ + outer_pri:3, /* Priority */ + dscp_lo:4; /* New DSCP */ +#else + /* T9.5: RX Status 0 */ + uint32 add_vid:1, /* VLAN ID Added */ + bpdu:1, /* BPDU Packet */ + cell_error:1, /* Cell CRC Checksum Error Detected */ + chg_tos:1, /* DSCP Changed */ + cpu_cos:3, /* CPU COS */ + cos:3, /* Packet Priority */ + emirror:1, /* Egress Mirroring */ + imirror:1, /* Ingress Mirroring */ + l3_intf:12, /* L3 Intf number */ + l3ipmc:1, /* L3 IPMC */ + l3only:1, /* L3 only */ + l3uc:1, /* L3 UC */ + mtp_index_hi:5; /* Mirror-to-Port Index */ + /* T9.6: RX Status 1 */ + uint32 mtp_index_lo:2, /* Mirror-to-Port Index */ + pkt_aged:1, /* Pkt is Aged */ + purge_cell:1, /* Packet is marked Purged */ + src_hg:1, /* Source is Higig */ + switch_pkt:1, /* Switched packet */ + regen_crc:1, /* Regenerate CRC */ + reason:25; /* CPU opcode */ + /* T9.7: RX Status 2 */ + uint32 decap_iptunnel:1, /* Decap IP Tunneling Packet */ + match_rule_valid:1, /* Matched Rule valid */ + match_rule:10, /* Matched Rule */ + nh_index:13, /* Next hop index */ + srcport:5, /* Source port */ + dscp_hi:2; /* New DSCP */ + /* T9.8: RX Status 3 */ + uint32 dscp_lo:4, /* New DSCP */ + outer_pri:3, /* Priority (D)*/ + outer_cfi:1, /* CFI (D)*/ + outer_vid:12, /* VID (D)*/ + ingress_untagged:1, /* Pkt came in untagged (D)*/ + :11; +#endif + + uint32 s_4; /* T9.9: RX Status 4 */ + /* T9.10: DMA Status 0 */ +#ifdef LE_HOST + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + dc:12, /* Don't Care */ + done:1; /* Descriptor Done */ +#else + uint32 done:1, + dc:12, + error:1, + start:1, + end:1, + count:16; +#endif +} dcb9_t; +#endif /* BCM_XGS3_SWITCH_SUPPORT */ + +#if defined(BCM_TRIUMPH2_SUPPORT) +/* + * DMA Control Block - Type 19 + * Used on 5663x devices + * 16 words + */ +#include +#endif /* BCM_TRIUMPH2_SUPPORT */ + +#if defined(BCM_ENDURO_SUPPORT) +/* + * DMA Control Block - Type 20 + * Used on 5623x devices + * 16 words + */ +typedef struct { + uint32 addr; /* T20.0: physical address */ + /* T20.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, + c_stat:1, + c_hg:1, + c_reload:1, + c_sg:1, + c_chain:1, + c_count:16; +#endif /* LE_HOST */ + uint32 mh0; /* T20.2: Module Header word 0 */ + uint32 mh1; /* T20.3: Module Header word 1 */ + uint32 mh2; /* T20.4: Module Header word 2 */ + uint32 mh3; /* T20.5: Module Header word 3 */ +#ifdef LE_HOST + /* T20.6: RX Status 0 */ + uint32 timestamp_type:2, /* TIMESTAMP field type indicator */ + em_mtp_index:5, /* EM Mirror-to-Port Index */ + :1, /* Reserved */ + cpu_cos:6, /* COS queue for CPU packets */ + :2, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_pri:3; /* Inner priority */ + + /* T20.7 */ + uint32 reason_hi:16, /* CPU opcode (high bits) */ + pkt_len:14, /* Packet Length After Modification */ + :2; /* Reserved */ + + /* T20.8 */ + uint32 reason; /* CPU opcode */ + + /* T20.9 */ + uint32 dscp:8, /* New DSCP */ + chg_tos:1, /* DSCP has been changed by HW */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + regen_crc:1, /* Packet modified and needs new CRC */ + :2, /* Reserved */ + outer_vid:12, /* Outer VLAN ID */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3; /* Outer priority */ + + /* T20.10 */ + uint32 timestamp; /* Timestamp */ + + /* T20.11 */ + uint32 cos:4, /* COS */ + higig_cos:5, /* Higig COS */ + vlan_cos:5, /* VLAN COS */ + shaping_cos_sel:2, /* Shaping COS Select */ + vfi:12, /* Internal VFI or FID value */ + vfi_valid:1, /* VFI or FID */ + :3; /* Reserved */ + + /* T20.12 */ + uint32 srcport:8, /* Source port number */ + hgi:2, /* Higig Interface Format Indicator */ + itag_status:2, /* Ingress incoming tag status */ + otag_action:2, /* Ingress Outer tag action */ + itag_action:2, /* Ingress Inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + imirror:1, /* Ingress Mirroring */ + emirror:1, /* Egress Mirroring */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + hg_lookup:1, /* Reserved for future use */ + :4; /* Reserved */ + + /* T20.13 */ + uint32 nhop_index:15, /* L3 IP Multicast Interface Number or Next HOP Index */ + :1, /* Reserved */ + match_rule:8, /* Matched FP rule */ + im_mtp_index:5, /* IM Mirror-to-Port Index */ + ecn:2, /* Reserved */ + change_ecn:1; /* Reserved */ + + /* T20.14 */ + uint32 timestamp_upper; /* OAM delay measurement: Upper 32-bit of 64-bit timestamp */ + + /* T20.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + dc:12, /* Don't Care */ + done:1; /* Descriptor Done */ +#else + /* T20.6: RX Status 0 */ + uint32 inner_pri:3, /* Inner priority */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :2, /* Reserved */ + cpu_cos:6, /* COS queue for CPU packets */ + :1, /* Reserved */ + em_mtp_index:5, /* EM Mirror-to-Port Index */ + timestamp_type:2; /* TIMESTAMP field type indicator */ + + /* T20.7 */ + uint32 :2, /* Reserved */ + pkt_len:14, /* Packet Length After Modification */ + reason_hi:16; /* CPU opcode (high bits) */ + + /* T20.8 */ + uint32 reason; /* CPU opcode */ + + /* T20.9 */ + uint32 outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_vid:12, /* Outer VLAN ID */ + :2, /* Reserved */ + regen_crc:1, /* Packet modified and needs new CRC */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:8; /* New DSCP */ + + /* T20.10 */ + uint32 timestamp; /* Timestamp */ + + /* T20.11 */ + uint32 :3, /* Reserved */ + vfi_valid:1, /* VFI or FID */ + vfi:12, /* Internal VFI or FID value */ + shaping_cos_sel:2, /* Shaping COS Select */ + vlan_cos:5, /* VLAN COS */ + higig_cos:5, /* Higig COS */ + cos:4; /* COS */ + + /* T20.12 */ + uint32 :4, /* Reserved */ + hg_lookup:1, /* Reserved for future use */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + emirror:1, /* Egress Mirroring */ + imirror:1, /* Ingress Mirroring */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress Inner tag action */ + otag_action:2, /* Ingress Outer tag action */ + itag_status:2, /* Ingress incoming tag status */ + hgi:2, /* Higig Interface Format Indicator */ + srcport:8; /* Source port number */ + + /* T20.13 */ + uint32 change_ecn:1, /* Reserved */ + ecn:2, /* Reserved */ + im_mtp_index:5, /* IM Mirror-to-Port Index */ + match_rule:8, /* Matched FP rule */ + :1, /* Reserved */ + nhop_index:15; /* L3 IP Multicast Interface Number or Next HOP Index */ + + /* T20.14 */ + uint32 timestamp_upper; /* OAM delay measurement: Upper 32-bit of 64-bit timestamp */ + + /* T20.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + dc:12, /* Don't Care */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb20_t; +#endif /* BCM_ENDURO_SUPPORT */ + +#if defined(BCM_TRIUMPH3_SUPPORT) || defined(BCM_KATANA_SUPPORT) || \ + defined(BCM_TRIDENT2_SUPPORT) || defined(BCM_GREYHOUND_SUPPORT) +/* + * DMA Control Block - Type 23 + * Used on 56640 devices + * 16 words + */ +#include + +#endif /* BCM_TRIUMPH3_SUPPORT || BCM_KATANA_SUPPORT || \ + BCM_TRIDENT2_SUPPORT || BCM_GREYHOUND_SUPPORT */ + +#if defined(BCM_KATANA_SUPPORT) +/* + * DMA Control Block - Type 24 + * Used on 56440 devices + * 16 words + */ +#include + +#endif /* BCM_KATANA_SUPPORT */ + +#if defined(BCM_TRIDENT2_SUPPORT) || defined(BCM_HURRICANE2_SUPPORT) +/* + * DMA Control Block - Type 26 + * Used on 56850 devices + * 16 words + */ +#include + +#endif /* BCM_TRIDENT2_SUPPORT */ + +#if defined(BCM_KATANA2_SUPPORT) +/* + * DMA Control Block - Type 29 + * Used on 56450 devices + * 16 words + */ +#include + +#endif /* BCM_KATANA2_SUPPORT */ + +#if defined(BCM_GREYHOUND_SUPPORT) +/* + * DMA Control Block - Type 31 + * Used on 53400 devices + * 16 words + */ +#include + +#endif /* BCM_GREYHOUND_SUPPORT */ + +#if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TOMAHAWK2_SUPPORT) +/* + * DMA Control Block - Type 32 + * Used on 5696X devices + * 16 words + */ +#include + +#endif /* BCM_TOMAHAWK_SUPPORT */ + +#if defined(BCM_TRIDENT2PLUS_SUPPORT) +/* + * DMA Control Block - Type 33 + * Used on 56860 devices + * 16 words + */ +#include + +#endif /* BCM_TRIDENT2PLUS_SUPPORT */ + +#if defined(BCM_HURRICANE3_SUPPORT) +/* + * DMA Control Block - Type 34 + * Used on 56160 devices + * 16 words + */ +#include + +#endif /* BCM_HURRICANE3_SUPPORT */ + +#if defined(BCM_APACHE_SUPPORT) +/* + * DMA Control Block - Type 35 + * Used on 56560 devices + * 16 words + */ +#include + +#endif /* BCM_APACHE_SUPPORT */ + +#if defined(BCM_TRIDENT3_SUPPORT) +/* + * DMA Control Block - Type 36 + * Used on 56870 devices + * 16 words + */ +#include + +#endif /* BCM_TRIDENT3_SUPPORT */ + +#if defined(BCM_GREYHOUND2_SUPPORT) +/* + * DMA Control Block - Type 37 + * Used on XXXXX devices + * 16 words + */ +#include + +#endif /* BCM_GREYHOUND2_SUPPORT */ + +#if defined(BCM_TOMAHAWK3_SUPPORT) +/* + * DMA Control Block - Type 38 + * Used on XXXXX devices + * 16 words + */ +#include + +#endif /* BCM_TOMAHAWK3_SUPPORT */ + + +#endif /* _SOC_DCBFORMATS_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h new file mode 100644 index 000000000000..c8671c59e933 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h @@ -0,0 +1,2749 @@ +/* + * $Id: defs.h,v 1.271 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: defs.h + * Purpose: Basic defines for system and chips + * This should be included before all other SOC include + * files to make sure BCM_xxxx is defined for them. + */ + +#ifndef _SOC_DEFS_H +#define _SOC_DEFS_H + +/* add the definition below to add memory measurement diagnostics capabilities */ +/* #define MEMORY_MEASUREMENT_DIAGNOSTICS 1 */ + +#include +#if defined(BCM_ESW_SUPPORT) || defined(BCM_SAND_SUPPORT) || defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT) +#include +#endif +#include + +/* Enable per unit linkscan lock for all ESW devices. */ +#if defined(BCM_ESW_SUPPORT) +#define BCM_LINKSCAN_LOCK_PER_UNIT +#endif + +/* + * BCM Chip Support + * + * There are a few classes of defines used throughout the code: + * - chip number defines with revsion numbers (from soc/allenum.h, + * but it can be modified from $SDK/make/Make.local) + * - chip number defines without revision numbers + * - chip type or group defines (such as BCM_*_SUPPORT) + * - component support defines (GBP or FILTER) + */ +#if defined(BCM_5675_A0) +#define BCM_5675 +#define BCM_5670 +#define BCM_HERCULES15_SUPPORT +#define BCM_HERCULES_SUPPORT +#endif + +#if defined(BCM_56504_A0) || defined(BCM_56504_B0) +#define BCM_56504 +#define BCM_FIREBOLT_SUPPORT +#endif + +#if defined(BCM_56102_A0) +#define BCM_56102 +#define BCM_FIREBOLT_SUPPORT +#define BCM_FELIX_SUPPORT +#define BCM_FELIX1_SUPPORT +#endif + +#if defined(BCM_56304_B0) +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_HELIX_SUPPORT +#define BCM_HELIX1_SUPPORT +#define BCM_MIRAGE_SUPPORT +#endif + +#if defined(BCM_56112_A0) +#define BCM_56112 +#define BCM_FIREBOLT_SUPPORT +#define BCM_FELIX_SUPPORT +#define BCM_FELIX15_SUPPORT +#endif + +#if defined(BCM_56314_A0) +#define BCM_56314 +#define BCM_FIREBOLT_SUPPORT +#define BCM_HELIX_SUPPORT +#define BCM_HELIX15_SUPPORT +#define BCM_MIRAGE_SUPPORT +#endif + +#if defined(BCM_56580_A0) +#define BCM_56580 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_GOLDWING_SUPPORT +#define BCM_HB_GW_SUPPORT /* HumV & Goldwing use the Bradley Driver */ +#endif + +#if defined(BCM_56700_A0) +#define BCM_56700 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_HB_GW_SUPPORT +#endif + +#if defined(BCM_56800_A0) +#define BCM_56800 +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_BRADLEY1_SUPPORT /* Only Bradley, excluding HumV & Goldwing */ +#define BCM_HB_GW_SUPPORT +#endif + +#if defined(BCM_56218_A0) +#define BCM_56218 +#define BCM_FIREBOLT_SUPPORT +#define BCM_HELIX_SUPPORT +#define BCM_RAPTOR_SUPPORT +#define BCM_RAPTOR1_SUPPORT +#endif + +#if defined(BCM_56514_A0) +#define BCM_56514 +#define BCM_FIREBOLT_SUPPORT +#define BCM_FIREBOLT2_SUPPORT +#endif + +#if defined(BCM_56624_A0) || defined(BCM_56624_B0) +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPFIX_SUPPORT +#endif + +#if defined(BCM_56680_A0) || defined(BCM_56680_B0) +#define BCM_56680 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_VALKYRIE_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPFIX_SUPPORT +#endif + +#if defined(BCM_56224_A0) || defined(BCM_56224_B0) +#define BCM_56224 +#define BCM_FIREBOLT_SUPPORT +#define BCM_HELIX_SUPPORT +#define BCM_RAPTOR_SUPPORT +#define BCM_RAVEN_SUPPORT +#endif + +#if defined(BCM_53314_A0) || defined(BCM_53324_A0) +#define BCM_53314 +#define BCM_FIREBOLT_SUPPORT +#define BCM_HELIX_SUPPORT +#define BCM_RAPTOR_SUPPORT +#define BCM_RAVEN_SUPPORT +#define BCM_HAWKEYE_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#endif + +#if defined(BCM_56820_A0) +#define BCM_56820 +#define BCM_56800 +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRX_SUPPORT +#endif + +#if defined(BCM_56725_A0) +#define BCM_56725 +#define BCM_56820 +#define BCM_56800 +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_CONQUEROR_SUPPORT +#define BCM_TRX_SUPPORT +#endif + +#if defined(BCM_56634_A0) || defined(BCM_56634_B0) +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPFIX_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#endif + +#if defined(BCM_56524_A0) || defined(BCM_56524_B0) +#define BCM_56524 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_APOLLO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPFIX_SUPPORT +#define BCM_CMICM_SUPPORT +#endif + +#if defined(BCM_56685_A0) || defined(BCM_56685_B0) +#define BCM_56685 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_VALKYRIE2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPFIX_SUPPORT +#endif + +#if defined(BCM_56334_A0) || defined(BCM_56334_B0) +#define BCM_56334 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#endif + +#if defined(BCM_56142_A0) +#define BCM_56142 +#define BCM_56334 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_HURRICANE_SUPPORT +#define BCM_HURRICANE1_SUPPORT +#endif + +#if defined(BCM_56840_A0) || defined(BCM_56840_B0) +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#endif + +#if defined(BCM_56640_A0) || defined(BCM_56640_B0) +#define BCM_56640 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_IPFIX_SUPPORT +#endif + +#if defined(BCM_56340_A0) +#define BCM_56340 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_56640 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_HELIX4_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#endif + +#if defined(BCM_56440_A0) || defined(BCM_56440_B0) +#define BCM_56440 +#define BCM_56840 +#define BCM_56634 +#define BCM_56334 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_KATANA_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#endif + +#if defined(BCM_56260_A0) +#define BCM_56260 +#define BCM_56450 +#define BCM_56440 +#define BCM_56840 +#define BCM_56634 +#define BCM_56640 +#define BCM_56334 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_SABER2_SUPPORT +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_KATANA2_SUPPORT +#define BCM_KATANA_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define BCM_PE_SUPPORT +#define BCM_OLP_SUPPORT +#endif + +#if defined(BCM_56270_A0) +#define BCM_56270 +#define BCM_56260 +#define BCM_56450 +#define BCM_56440 +#define BCM_56840 +#define BCM_56634 +#define BCM_56640 +#define BCM_56334 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_SABER2_SUPPORT +#define BCM_METROLITE_SUPPORT +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_KATANA2_SUPPORT +#define BCM_KATANA_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define BCM_PE_SUPPORT +#define BCM_OLP_SUPPORT +#endif + + +#if defined(BCM_56450_A0) || defined(BCM_56450_B0) || defined(BCM_56450_B1) +#define BCM_56450 +#define BCM_56440 +#define BCM_56840 +#define BCM_56634 +#define BCM_56640 +#define BCM_56334 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_KATANA2_SUPPORT +#define BCM_KATANA_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_PE_SUPPORT +#define BCM_OLP_SUPPORT +#endif + +#if defined(BCM_56850_A0) +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#endif + +#if defined(BCM_56560_A0) || defined(BCM_56560_B0) +#define BCM_56860 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_56560 +#define BCM_APACHE_SUPPORT +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_IPROC_SUPPORT +#define BCM_CMICDV2_SUPPORT +#define BCM_CMICDV3_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define BCM_OLP_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM12X10_SUPPORT +#define PORTMOD_PM12X10_XGS_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define BCM_EP_REDIRECT_VERSION_2 +#endif + +#if defined(BCM_56670_A0) || defined(BCM_56670_B0) || defined(BCM_56670_C0) +#define BCM_56860 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_56560 +#define BCM_56670 +#define BCM_MONTEREY_SUPPORT +#define BCM_APACHE_SUPPORT +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_IPROC_SUPPORT +#define BCM_CMICDV2_SUPPORT +#define BCM_CMICDV3_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define BCM_OLP_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_CPM4X25_SUPPORT +#define PORTMOD_PM12X10_SUPPORT +#define PORTMOD_PM12X10_XGS_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define BCM_PREEMPTION_SUPPORT +#define BCM_FIFODMA_SUPPORT +#endif + +#if defined(BCM_53650_A0) +#define BCM_56860 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_56560 +#define BCM_56670 +#define BCM_53650 +#define BCM_MONTEREY_SUPPORT +#define BCM_APACHE_SUPPORT +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIMESYNC_LIVE_WIRE_TOD_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_IPROC_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_CCMDMA_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define BCM_OLP_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_CPM4X25_SUPPORT +#define PORTMOD_PM12X10_SUPPORT +#define PORTMOD_PM12X10_XGS_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define BCM_PREEMPTION_SUPPORT +#define BCM_MIXED_LEGACY_AND_PORTMOD_SUPPORT +#define BCM_WOLFHOUND3_PLUS_SUPPORT +#endif + +#if defined(BCM_56860_A0) +#define BCM_56860 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_CCMDMA_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X10TD_SUPPORT +#define PORTMOD_PM12X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM4X25TD_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_OLP_SUPPORT +#endif + +#if defined(BCM_56960_A0) +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_TOMAHAWKX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SOC_ASYNC_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_CCMDMA_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_CMICDV2_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#endif + +#if defined(BCM_56980_A0) || defined(BCM_56980_B0) +#define BCM_56980 +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SOC_ASYNC_SUPPORT +#define BCM_CCMDMA_SUPPORT +#define BCM_CMICDV2_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_CMICX_SIM_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define SOC_ROBUST_HASH +#define SOC_COUNTER_TABLE_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM8X50_SUPPORT +#define BCM_CPU_TX_PROC_SUPPORT + +/* TH2 dependent code */ +#define BCM_TOMAHAWK2_SUPPORT +#define BCM_TOMAHAWKX_SUPPORT + +/* + * TH3 dependent code. + * + * Note that this define is normally provided by the BCM dispatcher, + * but we also need it for non-dispatched environments like the + * stand-alone DCB library. + */ +#ifndef BCM_TOMAHAWK3_SUPPORT +#define BCM_TOMAHAWK3_SUPPORT +#endif + +#endif + +#if defined(BCM_56870_A0) +#define BCM_56870 +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_TRIDENT3_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_TCB_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_CMICX_TX_PREALLOC_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_CCMDMA_SUPPORT +#define BCM_SOC_ASYNC_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define BCM_OLP_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#endif + +#if defined(BCM_56470_A0) +#define BCM_56470 +#define BCM_56275 +#define BCM_56370 +#define BCM_56870 +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_TRIDENT3_SUPPORT +#define BCM_HELIX5_SUPPORT +#define BCM_HURRICANE4_SUPPORT +#define BCM_FIREBOLT6_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIMESYNC_LIVE_WIRE_TOD_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#define BCM_DDR3_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_CMICX_TX_PREALLOC_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_CCMDMA_SUPPORT +#define BCM_SOC_ASYNC_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PHYMOD_EAGLE_SUPPORT +#define PHYMOD_FALCON_SUPPORT +#define BCM_OLP_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define BCM_CHANNELIZED_SWITCHING_SUPPORT +#define BCM_FLOWTRACKER_SUPPORT +#define BCM_FLOWTRACKER_V2_SUPPORT +#define BCM_FLOWTRACKER_V3_SUPPORT +#define BCM_FLOWTRACKER_EXPORT_FIFO_SUPPORT +#define BCM_UTT_SUPPORT +#define BCM_HLA_SUPPORT +#define BCM_APPL_SIGNATURE_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#endif + +#if defined(BCM_56275_A0) +#define BCM_56275 +#define BCM_56370 +#define BCM_56870 +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_TRIDENT3_SUPPORT +#define BCM_HELIX5_SUPPORT +#define BCM_HURRICANE4_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIMESYNC_LIVE_WIRE_TOD_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_CMICX_TX_PREALLOC_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_CCMDMA_SUPPORT +#define BCM_SOC_ASYNC_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM4X10_QTC_SUPPORT +#define BCM_OLP_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define BCM_FLOWTRACKER_SUPPORT +#define BCM_FLOWTRACKER_V2_SUPPORT +#define BCM_FLOWTRACKER_EXPORT_FIFO_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#define BCM_MIXED_LEGACY_AND_PORTMOD_SUPPORT +#define BCM_UTT_SUPPORT +#endif + +#if defined(BCM_56370_A0) +#define BCM_56370 +#define BCM_56870 +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_TRIDENT3_SUPPORT +#define BCM_HELIX5_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_TCB_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_CMICX_TX_PREALLOC_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_SOC_ASYNC_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM4X10_QTC_SUPPORT +#define BCM_OLP_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define BCM_FLOWTRACKER_SUPPORT +#define BCM_FLOWTRACKER_EXPORT_FIFO_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#endif + +#if defined(BCM_56770_A0) +#define BCM_56770 +#define BCM_56870 +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_TRIDENT3_SUPPORT +#define BCM_MAVERICK2_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_TCB_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_CMICX_TX_PREALLOC_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_SOC_ASYNC_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define BCM_OLP_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#endif + +#if defined(BCM_56965_A0) +#define BCM_56965 +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_TOMAHAWKX_SUPPORT +#define BCM_TOMAHAWKPLUS_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_CMICDV2_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#endif + +#if defined(BCM_56970_A0) +#define BCM_56970 +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_TOMAHAWK2_SUPPORT +#define BCM_TOMAHAWKX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_TCB_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_CMICDV2_SUPPORT +#define BCM_CMICDV3_SUPPORT +#define BCM_CMICDV4_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#endif + +/* if ARAD_A0, ARAD_B0, ARAD_PLUS is defined, define also ARAD_A0, ARAD_B0, ARAD_PLUS */ +/* Pay attention that effectively all chip flags defined here are functionally equal to BCM_PETRA_SUPPORT */ +#if defined(BCM_88660_A0) || defined(BCM_88675_A0)|| defined(BCM_88675_B0) || defined(BCM_88375_A0) || defined(BCM_88680_A0) || defined(BCM_88470_A0) || defined(BCM_88470_B0) || defined(BCM_88270_A0) +#define BCM_88660 +#define BCM_88660_A0 +#define BCM_ARAD_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#ifndef BCM_DPP_SUPPORT +#define BCM_DPP_SUPPORT +#endif +/* #define BCM_EXTND_SBUS_SUPPORT */ +#define BCM_DDR3_SUPPORT +/*Compilation features*/ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#endif + +#if defined(BCM_88675_A0) /* Defined via mcmrelease: genallchips.pl... */ +#define BCM_88675 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_DNX_FABRIC_SUPPORT +#endif + +#if defined(BCM_88675_B0) /* Defined via mcmrelease: genallchips.pl... */ +#define BCM_88675 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_DNX_FABRIC_SUPPORT +#endif + +#if defined(BCM_88375_A0) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88375 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_DNX_FABRIC_SUPPORT +#endif + + +#if defined(BCM_88680_A0) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88680 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_DNX_FABRIC_SUPPORT +#endif + +#if defined(BCM_88690_A0) || defined(BCM_88690_B0) || defined(BCM_88690_B1) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88690 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM_OS_ILKN_50G_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM8X50_FABRIC_SUPPORT +#define PORTMOD_PM8X50_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_SBUSDMA_SUPPORT + +#endif + +#if defined(BCM_88800_A0) || defined(BCM_88800_A1) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88800 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM_OS_ILKN_50G_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM8X50_FABRIC_SUPPORT +#define PORTMOD_PM8X50_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_SBUSDMA_SUPPORT + +#endif + +#if defined(BCM_88850_A0) || defined(BCM_88850_A1) || defined(BCM_88850_A2)/* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88850 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM_OS_ILKN_50G_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM8X50_FABRIC_SUPPORT +#define PORTMOD_PM8X50_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#endif + +#if defined(BCM_88830_A0) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88830 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM_OS_ILKN_50G_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM8X50_FLEXE_GEN2_SUPPORT +#define PORTMOD_PM8X50_FABRIC_SUPPORT +#define PORTMOD_PM8X50_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#endif + +#ifdef BCM_DNX3_SUPPORT +#define BCM_88860 +#define BCM_88870 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM4X25D_SUPPORT +#define PORTMOD_PM8X100_FABRIC_SUPPORT +#define PORTMOD_PM8X100_GEN2_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_CMICX_GEN2_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#endif + +#ifdef BCM_DNX3_SUPPORT +#endif + + +#if defined(BCM_88480_A0) || defined(BCM_88480_B0) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88480 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM_OS_ILKN_50G_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM8X50_FABRIC_SUPPORT +#define PORTMOD_PM8X50_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#endif + +#if defined(BCM_88470_A0) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88470 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_DNX_FABRIC_SUPPORT +#define PORTMOD_DNX_FABRIC_O_NIF_SUPPORT +#endif + +#if defined(BCM_88470_B0) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88470 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_DNX_FABRIC_SUPPORT +#define PORTMOD_DNX_FABRIC_O_NIF_SUPPORT +#endif + +#if defined(BCM_88270_A0) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88270 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_DNX_FABRIC_SUPPORT +#define PORTMOD_PM4X2P5_SUPPORT +#endif + + +#if defined(BCM_88950_A0) || defined(BCM_88950_A1) || defined(BCM_88770_A1) +#define BCM_88770 +#define BCM_88770_A1 +#define BCM_88770_SUPPORT +#define BCM_88773 +#define BCM_88773_A1 +#define BCM_88773_SUPPORT +#define BCM_88774 +#define BCM_88774_A1 +#define BCM_88774_SUPPORT +#define BCM_88775 +#define BCM_88775_A1 +#define BCM_88775_SUPPORT +#define BCM_88776 +#define BCM_88776_A1 +#define BCM_88776_SUPPORT +#define BCM_88950 +#define BCM_88950_A0 +#define BCM_88950_A1 +#define BCM_88950_SUPPORT +#define BCM_88953 +#define BCM_88953_A1 +#define BCM_88953_SUPPORT +#define BCM_88954 +#define BCM_88954_A1 +#define BCM_88954_SUPPORT +#define BCM_88955 +#define BCM_88955_A1 +#define BCM_88955_SUPPORT +#define BCM_88956 +#define BCM_88956_A1 +#define BCM_88956_SUPPORT +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define BCM_CMICM_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_IPROC_SUPPORT +#define PORTMOD_DNX_FABRIC_SUPPORT +#endif + +/* +*This flag is defined by the MCM release +*/ +#if defined(BCM_88790_A0) +#define BCM_88790 +#define BCM_SBUSDMA_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_CMICX_SUPPORT +#define PORTMOD_PM8X50_FABRIC_SUPPORT +#endif + +/* +*This flag is defined by the MCM release +*/ +#ifdef BCM_DNXF3_SUPPORT +#define BCM_88920 +#define BCM_SBUSDMA_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_CMICX_SUPPORT +#define PORTMOD_PM8X100_FABRIC_SUPPORT +#define BCM_CMICX_GEN2_SUPPORT +#endif + +#if defined(BCM_56150_A0) +#define BCM_56150 +#define BCM_56142 +#define BCM_56334 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_HURRICANE_SUPPORT +#define BCM_HURRICANE2_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#endif + +#if defined(BCM_53400_A0) +#define BCM_53400 +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_HURRICANE_SUPPORT +#define BCM_HURRICANE2_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define BCM_GREYHOUND_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#endif + +#if defined(BCM_56160_A0) +#define BCM_56160 +#define BCM_53400 +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_HURRICANE_SUPPORT +#define BCM_HURRICANE2_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_SWITCH_MATCH_SUPPORT +#define BCM_GREYHOUND_SUPPORT +#define BCM_HURRICANE3_SUPPORT +#endif + +#if defined(BCM_53540_A0) +#define BCM_53540 +#define BCM_56160 +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_HURRICANE_SUPPORT +#define BCM_HURRICANE2_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_GREYHOUND_SUPPORT +#define BCM_HURRICANE3_SUPPORT +#endif + +#if defined(BCM_53570_A0) || defined(BCM_53570_B0) +#define BCM_53570 +#define BCM_56160 +#define BCM_53400 +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_HURRICANE_SUPPORT +#define BCM_HURRICANE2_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_CMICDV2_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define BCM_GREYHOUND_SUPPORT +#define BCM_HURRICANE3_SUPPORT +#define BCM_GREYHOUND2_SUPPORT +#define BCM_GLOBAL_METER_SUPPORT +#define BCM_GLOBAL_METER_V2_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define BCM_PREEMPTION_SUPPORT +#define BCM_SWITCH_MATCH_SUPPORT +#define BCM_TSN_SUPPORT +#define BCM_TSN_SR_SUPPORT +#define BCM_TAS_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#define BCM_DDR3_SUPPORT +#endif + +#if defined(BCM_56070_A0) +#define BCM_56070 +#define BCM_53570 +#define BCM_56160 +#define BCM_53400 +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_HURRICANE_SUPPORT +#define BCM_HURRICANE2_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define BCM_GREYHOUND_SUPPORT +#define BCM_HURRICANE3_SUPPORT +#define BCM_GREYHOUND2_SUPPORT +#define BCM_GLOBAL_METER_SUPPORT +#define BCM_GLOBAL_METER_V2_SUPPORT +#define BCM_SWITCH_MATCH_SUPPORT +#define BCM_TSN_SUPPORT +#define BCM_TSN_SR_SUPPORT +#define BCM_TAS_SUPPORT +#define BCM_FIRELIGHT_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM4X10_QTC_SUPPORT +#endif + +/* + * Strata XGS + */ +#if defined(BCM_5673) || defined(BCM_5690) +#define BCM_XGS1_SWITCH_SUPPORT +#endif + +#if defined(BCM_5665) || defined(BCM_5695) || defined(BCM_5674) +#define BCM_XGS2_SWITCH_SUPPORT +#endif + +#if defined(BCM_56504) || \ + defined(BCM_56102) || defined(BCM_56304) || defined(BCM_56218) || \ + defined(BCM_56112) || defined(BCM_56314) || defined(BCM_56514) || \ + defined(BCM_56580) || defined(BCM_56700) || defined(BCM_56800) || \ + defined(BCM_56624) || defined(BCM_56224) || defined(BCM_56820) || \ + defined(BCM_53314) || defined(BCM_56680) || defined(BCM_56725) || \ + defined(BCM_56634) || defined(BCM_56524) || defined(BCM_56685) || \ + defined(BCM_56334) || defined(BCM_56840) || defined(BCM_56142) || \ + defined(BCM_56640) || defined(BCM_56440) || \ + defined(BCM_56850) || defined(BCM_56450) || defined(BCM_56340) || \ + defined(BCM_56260) || defined(BCM_56160) || defined(BCM_56270) || \ + defined(BCM_56150) || defined(BCM_53400) || defined(BCM_56960) || \ + defined(BCM_56870) || defined(BCM_56965) || defined(BCM_56970) || \ + defined(BCM_56980) || defined(BCM_53570) || defined(BCM_53540) || \ + defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56275) || \ + defined(BCM_56470) || defined(BCM_56070) || defined(BCM_53650) +#define BCM_XGS3_SWITCH_SUPPORT +#endif + +#if defined(BCM_5675) +#define BCM_XGS2_FABRIC_SUPPORT +#endif + +#if defined(BCM_56700) || defined(BCM_56701) || defined(BCM_56725) +#define BCM_XGS3_FABRIC_SUPPORT +#endif + +#if defined(BCM_XGS3_SWITCH_SUPPORT) +#define BCM_XGS_SWITCH_SUPPORT +#endif + +#if defined(BCM_XGS2_FABRIC_SUPPORT) +#define BCM_XGS12_FABRIC_SUPPORT +#endif + +#if defined(BCM_XGS12_FABRIC_SUPPORT) +#define BCM_XGS12_SUPPORT +#endif + +#if defined(BCM_XGS12_FABRIC_SUPPORT) || defined(BCM_XGS3_FABRIC_SUPPORT) +#define BCM_XGS_FABRIC_SUPPORT +#endif + +#if defined(BCM_XGS_SWITCH_SUPPORT) || defined(BCM_XGS_FABRIC_SUPPORT) +#define BCM_XGS_SUPPORT +#endif + +#if defined(BCM_XGS_SWITCH_SUPPORT) +#define BCM_SWITCH_SUPPORT +#endif + +#if defined(BCM_56960) || defined(BCM_56965) || defined(BCM_56970) || \ + defined(BCM_56980) +#define SOC_UNIQUE_ACC_TYPE_ACCESS +#endif + +/* Common XGS5 Port Module Support */ +#if defined(BCM_56450) || defined(BCM_56560) || defined(BCM_56860) || \ + defined(BCM_56870) || defined(BCM_56970) || defined(BCM_56370) || \ + defined(BCM_56770) || defined(BCM_56980) || defined(BCM_56275) || \ + defined(BCM_56470) +#define BCM_XGS5_SWITCH_PORT_SUPPORT +#endif + +/* + * RIOT + */ +#if defined(INCLUDE_L3) +#if defined(BCM_56860_A0) || defined (BCM_56560) || defined(BCM_56870_A0) || \ + defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56275) || \ + defined(BCM_56470) || defined(BCM_53650) +#define BCM_RIOT_SUPPORT +#endif +#endif +/* + * SwapToItself + */ +#if defined(INCLUDE_L3) +#if defined (BCM_56560) || defined (BCM_56970_A0) || defined(BCM_56870_A0) || \ + defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56470) +#define BCM_SWAP_TO_SELF_SUPPORT +#endif +#endif + /* + * Multi-level ECMP + */ +#if defined(INCLUDE_L3) +#if defined(BCM_56860_A0) || defined (BCM_56560) || defined(BCM_56870) || \ + defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56980) || \ + defined(BCM_56275) || defined(BCM_56470) || defined(BCM_53650) +#define BCM_MULTI_LEVEL_ECMP_SUPPORT +#endif +#endif + +/* + * Multi-Level Failover Support. + */ +#if defined(INCLUDE_L3) +#if defined(BCM_56560) +#define BCM_MULTI_LEVEL_FAILOVER_SUPPORT +#endif +#endif + +/* + * Special Label Enhancement Support. + */ +#if defined(INCLUDE_L3) +#if defined(BCM_56870) || defined(BCM_56370) || defined(BCM_56770) || \ + defined(BCM_56470) +#define BCM_SPECIAL_LABEL_SUPPORT +#endif +#endif + +/* + * L3_ECMP Protected write + */ +#if defined(INCLUDE_L3) +#if defined(BCM_56370) +#define SOC_L3_ECMP_PROTECTED_ACCESS_SUPPORT +#endif +#endif + +/* + * Packet-based rate limiting to CPU for HW only. + */ +#if defined(BCM_56150) || defined(BCM_53400) || defined(BCM_56160) || \ + defined(BCM_53540) || defined(BCM_53570) || defined(BCM_56070) +#define BCM_PACKET_RATE_LIMIT_HW_ONLY_SUPPORT +#endif + +/* + * Common Collector APIs support. + */ +#if defined(BCM_FLOWTRACKER_SUPPORT) || \ + defined(BCM_FLOWTRACKER_V2_SUPPORT) || \ + defined(BCM_FLOWTRACKER_V3_SUPPORT) || \ + defined(INCLUDE_FLOWTRACKER) || \ + defined(INCLUDE_IFA) || \ + defined(INCLUDE_TELEMETRY) +#define BCM_COLLECTOR_SUPPORT +#endif + +/* + * TimeSync Time Capture support. + */ +#if defined(BCM_56960_A0) || \ + defined(BCM_56970_A0) || \ + defined(BCM_56770_A0) || \ + defined(BCM_88690_A0) || \ + defined(BCM_88690_B0) || \ + defined(BCM_88690_B1) || \ + defined(BCM_56275_A0) || \ + defined(BCM_56980_A0) || defined(BCM_56980_A0) || \ + defined(BCM_53570_A0) || defined(BCM_53570_B0) || \ + defined(BCM_56070_A0) || \ + defined(BCM_88480_A0) || defined(BCM_88480_B0) || \ + defined(BCM_88800_A0) || defined(BCM_88800_A1) || defined(BCM_88800_B0) || \ + defined(BCM_88850_A0) || defined(BCM_88850_A1) || defined(BCM_88850_A2) || defined(BCM_88830_A0) || \ + defined(BCM_56370_A0) || defined(BCM_56370_A2) || defined(BCM_56375_A0) || defined(BCM_56375_A2) || \ + defined(BCM_DNX3_SUPPORT) || defined(BCM_88920_A0) +#define BCM_TIMESYNC_TIME_CAPTURE_SUPPORT +#endif + +/* + * TimeSync nanosync support. + */ +#if defined(BCM_56275) || defined(BCM_56980) || defined(BCM_56670) || \ + defined(BCM_56070) || defined(BCM_56470) || defined(BCM_53650) +#define BCM_TIME_NANOSYNC_SUPPORT +#endif + + +/* + * Local Time of Day support. + */ +#if defined(BCM_56070) || defined(BCM_56270) || defined(BCM_56670) +#define BCM_TIME_LOCAL_TOD_SUPPORT +#endif + +/* + * PCS 1588 TS for TSC Falcon Gen 3. + */ +#if defined(BCM_56070) || defined(BCM_56470) +#define BCM_TSCF_GEN3_PCS_TIMESTAMP +#endif + +/* + * EA + */ + +#if defined(BCM_XGS3_SWITCH_SUPPORT) +#define BCM_FIELD_SUPPORT +#endif + +/* + * If any supported chip includes a Fast Filter Processor (FFP) + * or Field Processor (FP) + */ +#if defined(BCM_XGS1_SWITCH_SUPPORT) || defined(BCM_XGS2_SWITCH_SUPPORT) +#define BCM_FILTER_SUPPORT +#endif + +#if defined(INCLUDE_ACL) +#define BCM_ACL_SUPPORT +#endif + +/* + * CMIC + */ +#if defined(BCM_ESW_SUPPORT) || defined(BCM_SAND_SUPPORT) || defined(PORTMOD_SUPPORT) +#define BCM_CMIC_SUPPORT +#endif + +/* + * If any supported chip supports Higig2 + */ +#if defined(BCM_56580) || defined(BCM_56700) || defined(BCM_56800) || \ + defined(BCM_56218) || defined(BCM_56624) || defined(BCM_56224) || \ + defined(BCM_56820) || defined(BCM_56680) || defined(BCM_56725) || \ + defined(BCM_53314) || defined(BCM_56634) || defined(BCM_56524) || \ + defined(BCM_56685) || defined(BCM_56334) || \ + defined(BCM_56840) || defined(BCM_56142) || \ + defined(BCM_56640) || defined(BCM_56440) || defined(BCM_56850) || \ + defined(BCM_56450) || defined(BCM_56340) || defined(BCM_56150) || \ + defined(BCM_56260) || defined(BCM_56160) || defined(BCM_56270) || \ + defined(BCM_53400) || defined(BCM_56960) || \ + defined(BCM_56860) || defined(BCM_56965) || defined(BCM_56970) || \ + defined(BCM_56870) || defined(BCM_53570) || defined(BCM_56370) || \ + defined(BCM_56770) || defined(BCM_53540) || defined(BCM_56980) || \ + defined(BCM_56275) || defined(BCM_56470) || defined(BCM_56070) || \ + defined(BCM_53650) +#define BCM_HIGIG2_SUPPORT +#endif + +/* + * If any supported chip has GXPORTS + */ +#if defined(BCM_56580) || defined(BCM_56700) || defined(BCM_56800) || \ + defined(BCM_56624) || defined(BCM_56820) || defined(BCM_56680) || \ + defined(BCM_56725) || defined(BCM_56634) || defined(BCM_56524) || \ + defined(BCM_56685) || defined(BCM_56334) || \ + defined(BCM_56840) || defined(BCM_56142) || \ + defined(BCM_56640) || defined(BCM_56440) || defined(BCM_56850) || \ + defined(BCM_56450) || defined(BCM_56340) || defined(BCM_56150) || \ + defined(BCM_56260) || defined(BCM_56160) || defined(BCM_56270) || \ + defined(BCM_53400) || defined(BCM_56960) || defined(BCM_56965) || \ + defined(BCM_56970) || defined(BCM_53570) || defined(BCM_56980) || \ + defined(BCM_56070) +#define BCM_GXPORT_SUPPORT +#endif + +/* + * If any supported chip includes storm control (bandwidth rate) capability + */ +#if defined(BCM_56218) || defined(BCM_56224) || defined(BCM_53314) +#define BCM_BANDWIDTH_RATE_METER +#endif + +/* + * If any supported chip has BigMAC ports + */ +#if defined(BCM_XGS12_SUPPORT) || \ + defined(BCM_56504) || \ + defined(BCM_56102) || defined(BCM_56304) || defined(BCM_56112) || \ + defined(BCM_56314) || defined(BCM_56580) || defined(BCM_56700) || \ + defined(BCM_56800) || defined(BCM_56514) || defined(BCM_56624) || \ + defined(BCM_56680) || defined(BCM_56820) || defined(BCM_56725) || \ + defined(BCM_56334) +#define BCM_BIGMAC_SUPPORT +#endif + +/* + * If any supported chip has XMAC ports + */ +#if defined(BCM_56840) || defined(BCM_56640) || \ + defined(BCM_56440) || defined(BCM_56450) || defined(BCM_56340) +#define BCM_XMAC_SUPPORT +#endif + +/* + * If any supported chip has XLMAC ports + */ +#if defined(BCM_56850) || defined(BCM_56150) || defined(BCM_56960) || \ + defined(BCM_53400) || defined(BCM_56260) || defined(BCM_56160) || \ + defined(BCM_56270) || defined(BCM_56965) || defined(BCM_56970) || \ + defined(BCM_56870) || defined(BCM_56980) +#define BCM_XLMAC_SUPPORT +#endif + +/* + * If any supported chip has CLMAC ports + */ +#if defined(BCM_56960) || defined(BCM_56860) || defined(BCM_56560) || \ + defined(BCM_56870) || \ + defined(BCM_56965) || defined(BCM_56970) || defined(BCM_53570) || \ + defined(BCM_56980) || defined(BCM_56070) +#define BCM_CLMAC_SUPPORT +#endif + +/* + * If any supported chip has UniMAC ports + */ +#if defined(BCM_56224) || defined(BCM_56624) || defined(BCM_56820) || \ + defined(BCM_53314) || defined(BCM_56680) || defined(BCM_56725) || \ + defined(BCM_56634) || defined(BCM_56524) || \ + defined(BCM_56685) || defined(BCM_56334) || \ + defined(BCM_56840) || defined(BCM_56142) || \ + defined(BCM_56440) || defined(BCM_56450) || defined(BCM_56150) || \ + defined(BCM_53400) || defined(BCM_56260) || defined(BCM_56160) || \ + defined(BCM_56270) || defined(BCM_53570) || defined(BCM_53540) || \ + defined(BCM_56070) +#define BCM_UNIMAC_SUPPORT +#endif + +/* + * If any supported chip has CMAC ports + */ +#if defined(BCM_56640) || defined(BCM_56850) || \ + defined(BCM_56960) || defined(BCM_56965) || defined(BCM_56970) || \ + defined(BCM_56870) || defined(BCM_56980) +#define BCM_CMAC_SUPPORT +#endif + +/* + * If any supported chip has Unified ports + */ +#if defined(BCM_56640) || defined(BCM_56850) || defined(BCM_56340) || \ + defined(BCM_56960) || defined(BCM_56965) || \ + defined(BCM_56970) || defined(BCM_56870) || defined(BCM_56980) +#define BCM_UNIPORT_SUPPORT +#endif + +/* + * If any supported chip has ISM support + */ +#if defined(BCM_56640) || defined(BCM_56340) || defined(BCM_56850) || \ + defined(BCM_56960) || defined(BCM_56965) || defined(BCM_56870) || \ + defined(BCM_56970) || defined(BCM_56980) +#define BCM_ISM_SUPPORT +#endif + +/* + * If any supported chip has CMICM support + */ +#ifdef BCM_SBUSDMA_SUPPORT +#define BCM_CMICM_SUPPORT +#endif + +/* + * If any supported chip has instrumentation feature + */ +#if defined(BCM_56960) || defined(BCM_56965) || \ + defined(BCM_56870) || defined(BCM_56970) || defined(BCM_56980) || \ + defined(BCM_56770) || defined(BCM_56370) || defined(BCM_56470) +#define BCM_INSTRUMENTATION_SUPPORT +#endif + +/* + * If any supported chip includes an LED Processor + */ + +#if defined(BCM_5675) || defined(BCM_56504) || \ + defined(BCM_56102) || defined(BCM_56304) || \ + defined(BCM_56112) || defined(BCM_56314) || \ + defined(BCM_56580) || defined(BCM_56700) || \ + defined(BCM_56800) || defined(BCM_56218) || \ + defined(BCM_56514) || defined(BCM_56624) || \ + defined(BCM_56224) || defined(BCM_56820) || \ + defined(BCM_53314) || defined(BCM_56680) || \ + defined(BCM_56725) || defined(BCM_56634) || \ + defined(BCM_56524) || defined(BCM_56334) || \ + defined(BCM_56685) || \ + defined(BCM_56840) || defined(BCM_56142) || \ + defined(BCM_56640) || \ + defined(BCM_56440) || defined(BCM_56850) || \ + defined(BCM_56450) || defined(BCM_56340) || \ + defined(BCM_56150) || \ + defined(BCM_53400) || defined(BCM_56960) || \ + defined(BCM_56260) || defined(BCM_56160) || \ + defined(BCM_56270) || defined(BCM_56965) || \ + defined(BCM_56870) || \ + defined(BCM_56970) || defined(BCM_53570) || \ + defined(BCM_56980) || defined(BCM_53540) || \ + defined(BCM_56370) || defined(BCM_56770) || \ + defined(BCM_56275) || defined(BCM_56470) || \ + defined(BCM_56070) +#define BCM_LEDPROC_SUPPORT +#endif + +#if defined(BCM_53400) || defined(BCM_56340) || \ + defined(BCM_56150) || defined(BCM_56160) || \ + defined(BCM_56260) +#define BCM_AND28_SUPPORT +#endif + +#if defined(BCM_53570) +#define BCM_AND28_F4_SUPPORT +#endif + +#if defined(BCM_56275) +#define BCM_AND16_SUPPORT +#endif + +#if defined(BCM_88675) || defined(BCM_88680) || \ + defined(BCM_88470) || defined(BCM_88375) || \ + defined(BCM_88270) +#define BCM_DDRC28_SUPPORT +#endif + +#if defined(INCLUDE_ACL) +#define BCM_ACL_SUPPORT +#endif + +#if defined(BCM_XGS_SUPPORT) +#ifndef BCM_ESW_SUPPORT +#define BCM_ESW_SUPPORT +#endif +#endif + +#if defined(INCLUDE_RCPU) +#define BCM_RCPU_SUPPORT +#endif + +#if defined(INCLUDE_OOB_RCPU) +#define BCM_OOB_RCPU_SUPPORT +#endif + +/* MACSEC special definition for those switch device within bounded MACSEC supports. */ +#ifdef INCLUDE_MACSEC +/* Current MACSEC solution in SDK can be classified to two solutions. + * 1. PHY-MACSEC : MACSEC is bounded in a stand-along PHY chip. + * 2. Switch-MACSEC : MACSEC is bounded with switch device. + * - BCM_SWITCHMACSEC_SUPPORT is specified for this solution. + */ +#endif /* INCLUDE_MACSEC */ + +/* EDK support */ +#ifdef INCLUDE_EDK +#ifndef BCM_EDK_SUPPORT +#define BCM_EDK_SUPPORT +#endif +#endif + +/**************************************************************** + * + * This is a list of all known chips which may or may not be supported + * by a given image. + * + * Use soc_chip_supported() for which are supported + * CHANGE soc_chip_type_map if you change this + * + * See also socchip.h + * + * Enumerated types include: + * Unit numbers + * Chip type numbers (specific chip references w/ rev id) + * Chip group numbers (groups of chips, usually dropping revision + * number) + * + * All of the above are 0-based. + * + ****************************************************************/ + +typedef enum soc_chip_types_e { + SOC_CHIP_BCM5670_A0, + SOC_CHIP_BCM5673_A0, + SOC_CHIP_BCM5690_A0, + SOC_CHIP_BCM5665_A0, + SOC_CHIP_BCM5695_A0, + SOC_CHIP_BCM5675_A0, + SOC_CHIP_BCM5674_A0, + SOC_CHIP_BCM5665_B0, + SOC_CHIP_BCM56601_A0, + SOC_CHIP_BCM56601_B0, + SOC_CHIP_BCM56601_C0, + SOC_CHIP_BCM56602_A0, + SOC_CHIP_BCM56602_B0, + SOC_CHIP_BCM56602_C0, + SOC_CHIP_BCM56504_A0, + SOC_CHIP_BCM56504_B0, + SOC_CHIP_BCM56102_A0, + SOC_CHIP_BCM56304_B0, + SOC_CHIP_BCM56112_A0, + SOC_CHIP_BCM56314_A0, + SOC_CHIP_BCM5650_C0, + SOC_CHIP_BCM56800_A0, + SOC_CHIP_BCM56218_A0, + SOC_CHIP_BCM56514_A0, + SOC_CHIP_BCM56624_A0, + SOC_CHIP_BCM56624_B0, + SOC_CHIP_BCM56680_A0, + SOC_CHIP_BCM56680_B0, + SOC_CHIP_BCM56224_A0, + SOC_CHIP_BCM56224_B0, + SOC_CHIP_BCM53314_A0, + SOC_CHIP_BCM53324_A0, + SOC_CHIP_BCM56725_A0, + SOC_CHIP_BCM56820_A0, + SOC_CHIP_BCM56634_A0, + SOC_CHIP_BCM56634_B0, + SOC_CHIP_BCM56524_A0, + SOC_CHIP_BCM56524_B0, + SOC_CHIP_BCM56685_A0, + SOC_CHIP_BCM56685_B0, + SOC_CHIP_BCM56334_A0, + SOC_CHIP_BCM56334_B0, + SOC_CHIP_BCM56840_A0, + SOC_CHIP_BCM56840_B0, + SOC_CHIP_BCM56850_A0, + SOC_CHIP_BCM56960_A0, + SOC_CHIP_BCM56980_A0, + SOC_CHIP_BCM56980_B0, + SOC_CHIP_BCM56870_A0, + SOC_CHIP_BCM56873_A0, + SOC_CHIP_BCM56275_A0, + SOC_CHIP_BCM56370_A0, + SOC_CHIP_BCM56470_A0, + SOC_CHIP_BCM56770_A0, + SOC_CHIP_BCM56771_A0, + SOC_CHIP_BCM56970_A0, + SOC_CHIP_BCM56142_A0, + SOC_CHIP_BCM56150_A0, + SOC_CHIP_BCM88660_A0, + SOC_CHIP_BCM88675_A0, + SOC_CHIP_BCM88675_B0, + SOC_CHIP_BCM88375_A0, + SOC_CHIP_BCM88375_B0, + SOC_CHIP_BCM88680_A0, + SOC_CHIP_BCM88690_A0, + SOC_CHIP_BCM88690_B0, + SOC_CHIP_BCM88800_A0, + SOC_CHIP_BCM88800_A1, + SOC_CHIP_BCM88850_A0, + SOC_CHIP_BCM88830_A0, + SOC_CHIP_BCM8216_A0, +#ifdef BCM_DNX3_SUPPORT + SOC_CHIP_BCM88860_A0, + SOC_CHIP_BCM88870_A0, +#endif + SOC_CHIP_BCM88480_A0, + SOC_CHIP_BCM88480_B0, + SOC_CHIP_BCM88480_B1, + SOC_CHIP_BCM88470_A0, + SOC_CHIP_BCM88470_B0, + SOC_CHIP_BCM88270_A0, + SOC_CHIP_BCM56640_A0, + SOC_CHIP_BCM56640_B0, + SOC_CHIP_BCM56340_A0, /* Helix4 */ + SOC_CHIP_BCM56440_A0, + SOC_CHIP_BCM56440_B0, + SOC_CHIP_BCM56450_A0, + SOC_CHIP_BCM56450_B0, + SOC_CHIP_BCM56450_B1, + SOC_CHIP_BCM56260_A0, /* Saber2 */ + SOC_CHIP_BCM56260_B0, /* Saber2 */ + SOC_CHIP_BCM56270_A0, /* Metrolite */ + SOC_CHIP_BCM56860_A0, /* Trident2 Plus */ + SOC_CHIP_BCM56560_A0, /* Apache */ + SOC_CHIP_BCM56560_B0, /* Apache */ + SOC_CHIP_BCM56670_A0, /* Monterey */ + SOC_CHIP_BCM56670_B0, /* Monterey */ + SOC_CHIP_BCM56670_C0, /* Monterey */ + SOC_CHIP_BCM53650_A0, /* Wolfhound3 Plus */ + SOC_CHIP_BCM88770_A1, + SOC_CHIP_BCM88773_A1, + SOC_CHIP_BCM88774_A1, + SOC_CHIP_BCM88775_A1, + SOC_CHIP_BCM88776_A1, + SOC_CHIP_BCM88950_A0, + SOC_CHIP_BCM88950_A1, + SOC_CHIP_BCM88953_A1, + SOC_CHIP_BCM88954_A1, + SOC_CHIP_BCM88955_A1, + SOC_CHIP_BCM88956_A1, + SOC_CHIP_BCM88790_A0, + SOC_CHIP_BCM88790_B0, +#ifdef BCM_DNXF3_SUPPORT + SOC_CHIP_BCM88920_A0, +#endif + SOC_CHIP_ACP, + SOC_CHIP_BCM53400_A0, + SOC_CHIP_BCM56160_A0, + SOC_CHIP_BCM53570_A0, + SOC_CHIP_BCM53570_B0, + SOC_CHIP_BCM88772_A1, + SOC_CHIP_BCM88952_A0, + SOC_CHIP_BCM88952_A1, + SOC_CHIP_BCM56965_A0, /* Tomahawk+ */ + SOC_CHIP_BCM56965_A1, /* Tomahawk+ */ + SOC_CHIP_BCM53540_A0, + SOC_CHIP_BCM56070_A0, +#if defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT) + SOC_CHIP_LTSW, +#endif + SOC_CHIP_TYPES_COUNT +} soc_chip_types; + +/**************************************************************** + * + * NB: Order of this array must match soc_chip_types_e above. + * + ****************************************************************/ +#ifdef BCM_DNX3_SUPPORT +#define SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL /* SOC_CHIP_BCM88860_A0 */ SOC_CHIP_BCM8886X,\ + /* SOC_CHIP_BCM88870_A0 */ SOC_CHIP_BCM8887X, +#else +#define SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL +#endif +#define SOC_CHIP_DNX_TYPE_MAP_INIT_ADDITIONAL +#ifdef BCM_DNXF3_SUPPORT +#define SOC_CHIP_DNXF_TYPE_MAP_INIT_ADDITIONAL /* SOC_CHIP_BCM88920_A0 */ SOC_CHIP_BCM8892X, +#else +#define SOC_CHIP_DNXF_TYPE_MAP_INIT_ADDITIONAL +#endif +#define SOC_CHIP_TYPE_MAP_INIT \ + /* SOC_CHIP_BCM5670_A0, */ SOC_CHIP_BCM5670, \ + /* SOC_CHIP_BCM5673_A0, */ SOC_CHIP_BCM5673, \ + /* SOC_CHIP_BCM5690_A0, */ SOC_CHIP_BCM5690, \ + /* SOC_CHIP_BCM5665_A0, */ SOC_CHIP_BCM5665, \ + /* SOC_CHIP_BCM5695_A0, */ SOC_CHIP_BCM5695, \ + /* SOC_CHIP_BCM5675_A0, */ SOC_CHIP_BCM5675, \ + /* SOC_CHIP_BCM5674_A0, */ SOC_CHIP_BCM5674, \ + /* SOC_CHIP_BCM5665_B0, */ SOC_CHIP_BCM5665, \ + /* SOC_CHIP_BCM56601_A0, */ SOC_CHIP_BCM56601, \ + /* SOC_CHIP_BCM56601_B0, */ SOC_CHIP_BCM56601, \ + /* SOC_CHIP_BCM56601_C0, */ SOC_CHIP_BCM56601, \ + /* SOC_CHIP_BCM56602_A0, */ SOC_CHIP_BCM56602, \ + /* SOC_CHIP_BCM56602_B0, */ SOC_CHIP_BCM56602, \ + /* SOC_CHIP_BCM56602_C0, */ SOC_CHIP_BCM56602, \ + /* SOC_CHIP_BCM56504_A0, */ SOC_CHIP_BCM56504, \ + /* SOC_CHIP_BCM56504_B0, */ SOC_CHIP_BCM56504, \ + /* SOC_CHIP_BCM56102_A0, */ SOC_CHIP_BCM56102, \ + /* SOC_CHIP_BCM56304_B0, */ SOC_CHIP_BCM56304, \ + /* SOC_CHIP_BCM56112_A0, */ SOC_CHIP_BCM56112, \ + /* SOC_CHIP_BCM56314_A0, */ SOC_CHIP_BCM56314, \ + /* SOC_CHIP_BCM5650_C0, */ SOC_CHIP_BCM5650, \ + /* SOC_CHIP_BCM56800_A0, */ SOC_CHIP_BCM56800, \ + /* SOC_CHIP_BCM56218_A0, */ SOC_CHIP_BCM56218, \ + /* SOC_CHIP_BCM56514_A0, */ SOC_CHIP_BCM56514, \ + /* SOC_CHIP_BCM56624_A0, */ SOC_CHIP_BCM56624, \ + /* SOC_CHIP_BCM56624_B0, */ SOC_CHIP_BCM56624, \ + /* SOC_CHIP_BCM56680_A0, */ SOC_CHIP_BCM56680, \ + /* SOC_CHIP_BCM56680_B0, */ SOC_CHIP_BCM56680, \ + /* SOC_CHIP_BCM56224_A0, */ SOC_CHIP_BCM56224, \ + /* SOC_CHIP_BCM56224_B0, */ SOC_CHIP_BCM56224, \ + /* SOC_CHIP_BCM53314_A0, */ SOC_CHIP_BCM53314, \ + /* SOC_CHIP_BCM53324_A0, */ SOC_CHIP_BCM53314, \ + /* SOC_CHIP_BCM56725_A0, */ SOC_CHIP_BCM56725, \ + /* SOC_CHIP_BCM56820_A0, */ SOC_CHIP_BCM56820, \ + /* SOC_CHIP_BCM56634_A0, */ SOC_CHIP_BCM56634, \ + /* SOC_CHIP_BCM56634_B0, */ SOC_CHIP_BCM56634, \ + /* SOC_CHIP_BCM56524_A0, */ SOC_CHIP_BCM56524, \ + /* SOC_CHIP_BCM56524_B0, */ SOC_CHIP_BCM56524, \ + /* SOC_CHIP_BCM56685_A0, */ SOC_CHIP_BCM56685, \ + /* SOC_CHIP_BCM56685_B0, */ SOC_CHIP_BCM56685, \ + /* SOC_CHIP_BCM56334_A0, */ SOC_CHIP_BCM56334, \ + /* SOC_CHIP_BCM56334_B0, */ SOC_CHIP_BCM56334, \ + /* SOC_CHIP_BCM56840_A0, */ SOC_CHIP_BCM56840, \ + /* SOC_CHIP_BCM56840_B0, */ SOC_CHIP_BCM56840, \ + /* SOC_CHIP_BCM56850_A0, */ SOC_CHIP_BCM56850, \ + /* SOC_CHIP_BCM56960_A0, */ SOC_CHIP_BCM56960, \ + /* SOC_CHIP_BCM56980_A0, */ SOC_CHIP_BCM56980, \ + /* SOC_CHIP_BCM56980_B0, */ SOC_CHIP_BCM56980, \ + /* SOC_CHIP_BCM56870_A0, */ SOC_CHIP_BCM56870, \ + /* SOC_CHIP_BCM56873_A0, */ SOC_CHIP_BCM56870, \ + /* SOC_CHIP_BCM56275_A0, */ SOC_CHIP_BCM56275, \ + /* SOC_CHIP_BCM56370_A0, */ SOC_CHIP_BCM56370, \ + /* SOC_CHIP_BCM56470_A0, */ SOC_CHIP_BCM56470, \ + /* SOC_CHIP_BCM56770_A0, */ SOC_CHIP_BCM56770, \ + /* SOC_CHIP_BCM56771_A0, */ SOC_CHIP_BCM56770, \ + /* SOC_CHIP_BCM56970_A0, */ SOC_CHIP_BCM56970, \ + /* SOC_CHIP_BCM56142_A0, */ SOC_CHIP_BCM56142, \ + /* SOC_CHIP_BCM56150_A0, */ SOC_CHIP_BCM56150, \ + /* SOC_CHIP_BCM88660_A0 */ SOC_CHIP_BCM88660, \ + /* SOC_CHIP_BCM88675_A0 */ SOC_CHIP_BCM88675, \ + /* SOC_CHIP_BCM88675_B0 */ SOC_CHIP_BCM88675, \ + /* SOC_CHIP_BCM88375_A0 */ SOC_CHIP_BCM88375, \ + /* SOC_CHIP_BCM88375_B0 */ SOC_CHIP_BCM88375, \ + /* SOC_CHIP_BCM88680_A0 */ SOC_CHIP_BCM88680, \ + /* SOC_CHIP_BCM88690_A0 */ SOC_CHIP_BCM8869X, \ + /* SOC_CHIP_BCM88690_B0 */ SOC_CHIP_BCM8869X, \ + /* SOC_CHIP_BCM88800_A0 */ SOC_CHIP_BCM8880X, \ + /* SOC_CHIP_BCM88800_A1 */ SOC_CHIP_BCM8880X, \ + /* SOC_CHIP_BCM88850_A0 */ SOC_CHIP_BCM8885X, \ + /* SOC_CHIP_BCM88830_A0 */ SOC_CHIP_BCM8883X, \ + /* SOC_CHIP_BCM8216_A0 */ SOC_CHIP_BCM8216, \ + SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL \ + SOC_CHIP_DNX_TYPE_MAP_INIT_ADDITIONAL \ + /* SOC_CHIP_BCM88480_A0 */ SOC_CHIP_BCM8848X, \ + /* SOC_CHIP_BCM88480_B0 */ SOC_CHIP_BCM8848X, \ + /* SOC_CHIP_BCM88480_B1 */ SOC_CHIP_BCM8848X, \ + /* SOC_CHIP_BCM88470_A0 */ SOC_CHIP_BCM88470, \ + /* SOC_CHIP_BCM88470_B0 */ SOC_CHIP_BCM88470, \ + /* SOC_CHIP_BCM88270_A0 */ SOC_CHIP_BCM88270, \ + /* SOC_CHIP_BCM56640_A0, */ SOC_CHIP_BCM56640, \ + /* SOC_CHIP_BCM56640_B0, */ SOC_CHIP_BCM56640, \ + /* SOC_CHIP_BCM56340_A0, */ SOC_CHIP_BCM56340, \ + /* SOC_CHIP_BCM56440_A0 */ SOC_CHIP_BCM56440, \ + /* SOC_CHIP_BCM56440_B0 */ SOC_CHIP_BCM56440, \ + /* SOC_CHIP_BCM56450_A0 */ SOC_CHIP_BCM56450, \ + /* SOC_CHIP_BCM56450_B0 */ SOC_CHIP_BCM56450, \ + /* SOC_CHIP_BCM56450_B1 */ SOC_CHIP_BCM56450, \ + /* SOC_CHIP_BCM56260_A0 */ SOC_CHIP_BCM56260, \ + /* SOC_CHIP_BCM56260_B0 */ SOC_CHIP_BCM56260, \ + /* SOC_CHIP_BCM56270_A0 */ SOC_CHIP_BCM56270, \ + /* SOC_CHIP_BCM56860_A0, */ SOC_CHIP_BCM56860, \ + /* SOC_CHIP_BCM56560_A0, */ SOC_CHIP_BCM56560, \ + /* SOC_CHIP_BCM56560_B0, */ SOC_CHIP_BCM56560, \ + /* SOC_CHIP_BCM56670_A0, */ SOC_CHIP_BCM56670, \ + /* SOC_CHIP_BCM56670_B0, */ SOC_CHIP_BCM56670, \ + /* SOC_CHIP_BCM56670_C0, */ SOC_CHIP_BCM56670, \ + /* SOC_CHIP_BCM53650_A0, */ SOC_CHIP_BCM53650, \ + /* SOC_CHIP_BCM88770_A1 */ SOC_CHIP_BCM88770, \ + /* SOC_CHIP_BCM88773_A1 */ SOC_CHIP_BCM88773, \ + /* SOC_CHIP_BCM88774_A1 */ SOC_CHIP_BCM88774, \ + /* SOC_CHIP_BCM88775_A1 */ SOC_CHIP_BCM88775, \ + /* SOC_CHIP_BCM88776_A1 */ SOC_CHIP_BCM88776, \ + /* SOC_CHIP_BCM88950_A0 */ SOC_CHIP_BCM88950, \ + /* SOC_CHIP_BCM88950_A1 */ SOC_CHIP_BCM88950, \ + /* SOC_CHIP_BCM88953_A1 */ SOC_CHIP_BCM88953, \ + /* SOC_CHIP_BCM88954_A1 */ SOC_CHIP_BCM88954, \ + /* SOC_CHIP_BCM88955_A1 */ SOC_CHIP_BCM88955, \ + /* SOC_CHIP_BCM88956_A1 */ SOC_CHIP_BCM88956, \ + /* SOC_CHIP_BCM88790_A0 */ SOC_CHIP_BCM8879X, \ + /* SOC_CHIP_BCM88790_B0 */ SOC_CHIP_BCM8879X, \ + SOC_CHIP_DNXF_TYPE_MAP_INIT_ADDITIONAL \ + /* SOC_CHIP_ACP */ SOC_CHIP_BCM88650ACP,\ + /* SOC_CHIP_BCM53400_A0 */ SOC_CHIP_BCM53400, \ + /* SOC_CHIP_BCM56160_A0 */ SOC_CHIP_BCM56160, \ + /* SOC_CHIP_BCM53570_A0 */ SOC_CHIP_BCM53570, \ + /* SOC_CHIP_BCM53570_B0 */ SOC_CHIP_BCM53570, \ + /* SOC_CHIP_BCM88772_A1 */ SOC_CHIP_BCM88772, \ + /* SOC_CHIP_BCM88952_A0 */ SOC_CHIP_BCM88952, \ + /* SOC_CHIP_BCM88952_A1 */ SOC_CHIP_BCM88952, \ + /* SOC_CHIP_BCM56965_A0, */ SOC_CHIP_BCM56965, \ + /* SOC_CHIP_BCM56965_A1, */ SOC_CHIP_BCM56965, \ + /* SOC_CHIP_BCM53540_A0, */ SOC_CHIP_BCM53540, \ + /* SOC_CHIP_BCM56070_A0, */ SOC_CHIP_BCM56070, + + + +#if defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT) +#define SOC_CHIP_TYPE_MAP_LTSW_INIT \ + /* SOC_CHIP_LTSW, */ SOC_CHIP_LTSW_GRP, +#endif + +#ifdef BCM_DNX3_SUPPORT +#define SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL "BCM88860_A0", \ + "BCM88870_A0", +#else +#define SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL +#endif +#define SOC_CHIP_DNX_TYPE_NAMES_INIT_ADDITIONAL +#ifdef BCM_DNXF3_SUPPORT +#define SOC_CHIP_DNXF_TYPE_NAMES_INIT_ADDITIONAL "BCM88920_A0", +#else +#define SOC_CHIP_DNXF_TYPE_NAMES_INIT_ADDITIONAL +#endif +#define SOC_CHIP_TYPE_NAMES_INIT \ + "BCM5670_A0", \ + "BCM5673_A0", \ + "BCM5690_A0", \ + "BCM5665_A0", \ + "BCM5695_A0", \ + "BCM5675_A0", \ + "BCM5674_A0", \ + "BCM5665_B0", \ + "BCM56601_A0", \ + "BCM56601_B0", \ + "BCM56601_C0", \ + "BCM56602_A0", \ + "BCM56602_B0", \ + "BCM56602_C0", \ + "BCM56504_A0", \ + "BCM56504_B0", \ + "BCM56102_A0", \ + "BCM56304_B0", \ + "BCM56112_A0", \ + "BCM56314_A0", \ + "BCM5650_C0", \ + "BCM56800_A0", \ + "BCM56218_A0", \ + "BCM56514_A0", \ + "BCM56624_A0", \ + "BCM56624_B0", \ + "BCM56680_A0", \ + "BCM56680_B0", \ + "BCM56224_A0", \ + "BCM56224_B0", \ + "BCM53314_A0", \ + "BCM53324_A0", \ + "BCM56725_A0", \ + "BCM56820_A0", \ + "BCM56634_A0", \ + "BCM56634_B0", \ + "BCM56524_A0", \ + "BCM56524_B0", \ + "BCM56685_A0", \ + "BCM56685_B0", \ + "BCM56334_A0", \ + "BCM56334_B0", \ + "BCM56840_A0", \ + "BCM56840_B0", \ + "BCM56850_A0", \ + "BCM56960_A0", \ + "BCM56980_A0", \ + "BCM56980_B0", \ + "BCM56870_A0", \ + "BCM56873_A0", \ + "BCM56275_A0", \ + "BCM56370_A0", \ + "BCM56470_A0", \ + "BCM56770_A0", \ + "BCM56771_A0", \ + "BCM56970_A0", \ + "BCM56142_A0", \ + "BCM56150_A0", \ + "BCM88660_A0", \ + "BCM88675_A0", \ + "BCM88675_B0", \ + "BCM88375_A0", \ + "BCM88375_B0", \ + "BCM88680_A0", \ + "BCM88690_A0", \ + "BCM88690_B0", \ + "BCM88800_A0", \ + "BCM88800_A1", \ + "BCM88850_A0", \ + "BCM88830_A0", \ + "BCM8216_A0", \ + SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL \ + SOC_CHIP_DNX_TYPE_NAMES_INIT_ADDITIONAL \ + "BCM88480_A0", \ + "BCM88480_B0", \ + "BCM88480_B1", \ + "BCM88470_A0", \ + "BCM88470_B0", \ + "BCM88270_A0", \ + "BCM56640_A0", \ + "BCM56640_B0", \ + "BCM56340_A0", \ + "BCM56440_A0", \ + "BCM56440_B0", \ + "BCM56450_A0", \ + "BCM56450_B0", \ + "BCM56450_B1", \ + "BCM56260_A0", \ + "BCM56260_B0", \ + "BCM56270_A0", \ + "BCM56860_A0", \ + "BCM56560_A0", \ + "BCM56560_B0", \ + "BCM56670_A0", \ + "BCM56670_B0", \ + "BCM56670_C0", \ + "BCM53650_A0", \ + "BCM88770_A1", \ + "BCM88773_A1", \ + "BCM88774_A1", \ + "BCM88775_A1", \ + "BCM88776_A1", \ + "BCM88950_A0", \ + "BCM88950_A1", \ + "BCM88953_A1", \ + "BCM88954_A1", \ + "BCM88955_A1", \ + "BCM88956_A1", \ + "BCM88790_A0", \ + "BCM88790_B0", \ + SOC_CHIP_DNXF_TYPE_NAMES_INIT_ADDITIONAL \ + "ACP", \ + "BCM53400_A0", \ + "BCM56160_A0", \ + "BCM53570_A0", \ + "BCM53570_B0", \ + "BCM88772_A1", \ + "BCM88952_A0", \ + "BCM88952_A1", \ + "BCM56965_A0", \ + "BCM56965_A1", \ + "BCM53540_A0", \ + "BCM56070_A0", + + + + +#if defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT) +#define SOC_CHIP_TYPE_NAMES_LTSW_INIT \ + "LTSW", +#endif + +typedef enum soc_chip_groups_e { + /* Chip names w/o revision */ + SOC_CHIP_BCM5670, + SOC_CHIP_BCM5673, + SOC_CHIP_BCM5690, + SOC_CHIP_BCM5665, + SOC_CHIP_BCM5695, + SOC_CHIP_BCM5675, + SOC_CHIP_BCM5674, + SOC_CHIP_BCM56601, + SOC_CHIP_BCM56602, + SOC_CHIP_BCM56504, + SOC_CHIP_BCM56102, + SOC_CHIP_BCM56304, + SOC_CHIP_BCM5650, + SOC_CHIP_BCM56800, + SOC_CHIP_BCM56218, + SOC_CHIP_BCM56112, + SOC_CHIP_BCM56314, + SOC_CHIP_BCM56514, + SOC_CHIP_BCM56624, + SOC_CHIP_BCM56680, + SOC_CHIP_BCM56224, + SOC_CHIP_BCM53314, + SOC_CHIP_BCM56725, + SOC_CHIP_BCM56820, + SOC_CHIP_BCM56634, + SOC_CHIP_BCM56524, + SOC_CHIP_BCM56685, + SOC_CHIP_BCM56334, + SOC_CHIP_BCM56840, + SOC_CHIP_BCM56850, + SOC_CHIP_BCM56960, + SOC_CHIP_BCM56980, + SOC_CHIP_BCM56870, + SOC_CHIP_BCM56275, + SOC_CHIP_BCM56370, + SOC_CHIP_BCM56470, + SOC_CHIP_BCM56770, + SOC_CHIP_BCM56970, + SOC_CHIP_BCM56142, + SOC_CHIP_BCM56150, + SOC_CHIP_BCM88660, + SOC_CHIP_BCM88675, + SOC_CHIP_BCM88680, + SOC_CHIP_BCM8869X, + SOC_CHIP_BCM8880X, + SOC_CHIP_BCM8885X, + SOC_CHIP_BCM8883X, + SOC_CHIP_BCM8216, +#ifdef BCM_DNX3_SUPPORT + SOC_CHIP_BCM8886X, + SOC_CHIP_BCM8887X, +#endif + SOC_CHIP_BCM8848X, + SOC_CHIP_BCM88375, + SOC_CHIP_BCM88470, + SOC_CHIP_BCM88270, + SOC_CHIP_BCM56640, + SOC_CHIP_BCM56340, + SOC_CHIP_BCM56440, + SOC_CHIP_BCM56450, + SOC_CHIP_BCM56260, + SOC_CHIP_BCM56270, + SOC_CHIP_BCM56860, + SOC_CHIP_BCM56560, + SOC_CHIP_BCM56670, + SOC_CHIP_BCM53650, + SOC_CHIP_BCM88770, + SOC_CHIP_BCM88773, + SOC_CHIP_BCM88774, + SOC_CHIP_BCM88775, + SOC_CHIP_BCM88776, + SOC_CHIP_BCM88950, + SOC_CHIP_BCM88953, + SOC_CHIP_BCM88954, + SOC_CHIP_BCM88955, + SOC_CHIP_BCM88956, + SOC_CHIP_BCM8879X, +#ifdef BCM_DNXF3_SUPPORT + SOC_CHIP_BCM8892X, +#endif + SOC_CHIP_BCM88650ACP, + SOC_CHIP_BCM53400, + SOC_CHIP_BCM56160, + SOC_CHIP_BCM53570, + SOC_CHIP_BCM88772, + SOC_CHIP_BCM88952, + SOC_CHIP_BCM56965, + SOC_CHIP_BCM53540, + SOC_CHIP_BCM56070, +#if defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT) + SOC_CHIP_LTSW_GRP, +#endif + SOC_CHIP_GROUPS_COUNT +} soc_chip_groups_t; + +#ifdef BCM_DNX3_SUPPORT +#define SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL "BCM8886X", \ + "BCM8887X", +#else +#define SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL +#endif +#define SOC_CHIP_DNX_GROUP_NAMES_INIT_ADDITIONAL +#ifdef BCM_DNXF3_SUPPORT +#define SOC_CHIP_DNXF_GROUP_NAMES_INIT_ADDITIONAL "BCM8892X", +#else +#define SOC_CHIP_DNXF_GROUP_NAMES_INIT_ADDITIONAL +#endif +#define SOC_CHIP_GROUP_NAMES_INIT \ + "BCM5670", \ + "BCM5673", \ + "BCM5690", \ + "BCM5665", \ + "BCM5695", \ + "BCM5675", \ + "BCM5674", \ + "BCM56601", \ + "BCM56602", \ + "BCM56504", \ + "BCM56102", \ + "BCM56304", \ + "BCM5650", \ + "BCM56800", \ + "BCM56218", \ + "BCM56112", \ + "BCM56314", \ + "BCM56514", \ + "BCM56624", \ + "BCM56680", \ + "BCM56224", \ + "BCM53314", \ + "BCM56725", \ + "BCM56820", \ + "BCM56634", \ + "BCM56524", \ + "BCM56685", \ + "BCM56334", \ + "BCM56840", \ + "BCM56850", \ + "BCM56960", \ + "BCM56980", \ + "BCM56870", \ + "BCM56275", \ + "BCM56370", \ + "BCM56470", \ + "BCM56770", \ + "BCM56970", \ + "BCM56142", \ + "BCM56150", \ + "BCM88660", \ + "BCM88675", \ + "BCM88680", \ + "BCM8869X", \ + "BCM8880X", \ + "BCM8885X", \ + "BCM8883X", \ + "BCM8216", \ + SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL \ + SOC_CHIP_DNX_GROUP_NAMES_INIT_ADDITIONAL \ + "BCM8848X", \ + "BCM88375", \ + "BCM88470", \ + "BCM88270", \ + "BCM56640", \ + "BCM56340", \ + "BCM56440", \ + "BCM56450", \ + "BCM56260", \ + "BCM56270", \ + "BCM56860", \ + "BCM56560", \ + "BCM56670", \ + "BCM53650", \ + "BCM88770", \ + "BCM88773", \ + "BCM88774", \ + "BCM88775", \ + "BCM88776", \ + "BCM88950", \ + "BCM88953", \ + "BCM88954", \ + "BCM88955", \ + "BCM88956", \ + "BCM8879X", \ + SOC_CHIP_DNXF_GROUP_NAMES_INIT_ADDITIONAL \ + "SOC_CHIP_BCM88650ACP", \ + "BCM53400", \ + "BCM56160", \ + "BCM53570", \ + "BCM88772", \ + "BCM88952", \ + "BCM56965", \ + "BCM53540", \ + "BCM56070", + +#if defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT) +#define SOC_CHIP_GROUP_NAMES_LTSW_INIT \ + "LTSW", +#endif + +#if defined(BCM_TRIUMPH2_SUPPORT) || defined(BCM_TRIDENT_SUPPORT) +#define SER_TR_TEST_SUPPORT +#endif + +/* + * If you add anything here, check soc/common.c for arrays + * indexed by soc_regtype_t. + */ +typedef enum soc_regtype_t { + soc_schan_reg, /* Generic register read thru SCHAN */ + soc_genreg, /* General soc registers */ + soc_portreg, /* Port soc registers */ + soc_ppportreg, /* Packet-Processing-Port soc registers */ + soc_cosreg, /* COS soc registers */ + soc_pipereg, /* per pipe soc registers */ + soc_xpereg, /* per XPE soc registers */ + soc_slicereg, /* per slice soc registers */ + soc_layerreg, /* per layer soc registers */ + soc_itmreg, /* per layer soc registers */ + soc_ebreg, /* per layer soc registers */ + soc_cpureg, /* AKA PCI memory */ + soc_pci_cfg_reg, /* PCI configuration space register */ + soc_phy_reg, /* PHY register, access thru mii */ + soc_spi_reg, /* SPI relevant Registers*/ + soc_mcsreg, /* Microcontroller Subsystem - Indirect Access */ + soc_iprocreg, /* iProc Reg in AXI Address Space */ + soc_hostmem_w, /* word */ + soc_hostmem_h, /* half word */ + soc_hostmem_b, /* byte */ + soc_customreg, /* Custom Register */ + soc_invalidreg +} soc_regtype_t; + +#if defined(BCM_JERICHO_SUPPORT) || defined(BCM_SABER2_SUPPORT) || defined(BCM_QAX_SUPPORT) || defined(BCM_QUX_SUPPORT) +#define BCM_SAT_SUPPORT +#endif + +#if defined(BCM_QAX_SUPPORT) || defined(BCM_QUX_SUPPORT) +#define BCM_LB_SUPPORT +#endif + +/* All chips which builds on the Triumph baseline require SER support */ +#ifdef BCM_TRIUMPH_SUPPORT +#define BCM_SER_SUPPORT +#endif + +/* Current SER implementation relies on memscan thread */ +#ifdef BCM_SER_SUPPORT +#ifndef INCLUDE_MEM_SCAN +#define INCLUDE_MEM_SCAN +#endif +#endif + +#if defined(BCM_TRIDENT2_SUPPORT) +#define BCM_SRAM_SCAN_SUPPORT +#endif +#endif /* !_SOC_DEFS_H */ + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h new file mode 100644 index 000000000000..f88e35e94b52 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h @@ -0,0 +1,2178 @@ +/* + * $Id:$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + */ + +#ifndef _SOC_DEVIDS_H +#define _SOC_DEVIDS_H + + +#define BROADCOM_VENDOR_ID 0x14e4 + +#define BCM5690_DEVICE_ID 0x5690 +#define BCM5690_A0_REV_ID 1 +#define BCM5690_A1_REV_ID 2 +#define BCM5690_A2_REV_ID 3 + +#define BCM5691_DEVICE_ID 0x5691 +#define BCM5691_A0_REV_ID 1 +#define BCM5691_A1_REV_ID 2 +#define BCM5691_A2_REV_ID 3 + +#define BCM5692_DEVICE_ID 0x5692 +#define BCM5692_A0_REV_ID 1 +#define BCM5692_A1_REV_ID 2 +#define BCM5692_A2_REV_ID 3 + +#define BCM5693_DEVICE_ID 0x5693 +#define BCM5693_A0_REV_ID 1 +#define BCM5693_A1_REV_ID 2 +#define BCM5693_A2_REV_ID 3 + +#define BCM5695_DEVICE_ID 0x5695 +#define BCM5695_A0_REV_ID 1 +#define BCM5695_A1_REV_ID 2 +#define BCM5695_B0_REV_ID 0x11 + +#define BCM5696_DEVICE_ID 0x5696 +#define BCM5696_A0_REV_ID 1 +#define BCM5696_A1_REV_ID 2 +#define BCM5696_B0_REV_ID 0x11 + +#define BCM5697_DEVICE_ID 0x5697 +#define BCM5697_A0_REV_ID 1 +#define BCM5697_A1_REV_ID 2 +#define BCM5697_B0_REV_ID 0x11 + +#define BCM5698_DEVICE_ID 0x5698 +#define BCM5698_A0_REV_ID 1 +#define BCM5698_A1_REV_ID 2 +#define BCM5698_B0_REV_ID 0x11 + +#define BCM5670_DEVICE_ID 0x5670 +#define BCM5670_A0_REV_ID 1 +#define BCM5670_A1_REV_ID 2 + +#define BCM5671_DEVICE_ID 0x5671 +#define BCM5671_A0_REV_ID 1 +#define BCM5671_A1_REV_ID 2 +#define BCM5671_A2_REV_ID 3 + +#define BCM5675_DEVICE_ID 0x5675 +#define BCM5675_A0_REV_ID 1 +#define BCM5675_A1_REV_ID 2 + +#define BCM5676_DEVICE_ID 0x5676 +#define BCM5676_A0_REV_ID 1 +#define BCM5676_A1_REV_ID 2 + +#define BCM5673_DEVICE_ID 0x5673 +#define BCM5673_A0_REV_ID 1 +#define BCM5673_A1_REV_ID 2 +#define BCM5673_A2_REV_ID 3 + +#define BCM5674_DEVICE_ID 0x5674 +#define BCM5674_A0_REV_ID 1 + +#define BCM56100_DEVICE_ID 0xb100 +#define BCM56100_A0_REV_ID 1 +#define BCM56100_A1_REV_ID 2 +#define BCM56101_DEVICE_ID 0xb101 +#define BCM56101_A0_REV_ID 1 +#define BCM56101_A1_REV_ID 2 +#define BCM56102_DEVICE_ID 0xb102 +#define BCM56102_A0_REV_ID 1 +#define BCM56102_A1_REV_ID 2 +#define BCM56105_DEVICE_ID 0xb105 +#define BCM56105_A0_REV_ID 1 +#define BCM56105_A1_REV_ID 2 +#define BCM56106_DEVICE_ID 0xb106 +#define BCM56106_A0_REV_ID 1 +#define BCM56106_A1_REV_ID 2 +#define BCM56107_DEVICE_ID 0xb107 +#define BCM56107_A0_REV_ID 1 +#define BCM56107_A1_REV_ID 2 + +#define BCM56110_DEVICE_ID 0xb110 +#define BCM56110_A0_REV_ID 1 +#define BCM56111_DEVICE_ID 0xb111 +#define BCM56111_A0_REV_ID 1 +#define BCM56112_DEVICE_ID 0xb112 +#define BCM56112_A0_REV_ID 1 +#define BCM56115_DEVICE_ID 0xb115 +#define BCM56115_A0_REV_ID 1 +#define BCM56116_DEVICE_ID 0xb116 +#define BCM56116_A0_REV_ID 1 +#define BCM56117_DEVICE_ID 0xb117 +#define BCM56117_A0_REV_ID 1 + +#define BCM56300_DEVICE_ID 0xb300 +#define BCM56300_A0_REV_ID 1 +#define BCM56300_A1_REV_ID 2 +#define BCM56300_B0_REV_ID 0x11 +#define BCM56300_B1_REV_ID 0x12 +#define BCM56301_DEVICE_ID 0xb301 +#define BCM56301_A0_REV_ID 1 +#define BCM56301_A1_REV_ID 2 +#define BCM56301_B0_REV_ID 0x11 +#define BCM56301_B1_REV_ID 0x12 +#define BCM56302_DEVICE_ID 0xb302 +#define BCM56302_A0_REV_ID 1 +#define BCM56302_A1_REV_ID 2 +#define BCM56302_B0_REV_ID 0x11 +#define BCM56302_B1_REV_ID 0x12 +#define BCM56303_DEVICE_ID 0xb303 +#define BCM56303_A1_REV_ID 2 +#define BCM56303_A0_REV_ID 1 +#define BCM56303_B0_REV_ID 0x11 +#define BCM56303_B1_REV_ID 0x12 +#define BCM56304_DEVICE_ID 0xb304 +#define BCM56304_A0_REV_ID 1 +#define BCM56304_A1_REV_ID 2 +#define BCM56304_B0_REV_ID 0x11 +#define BCM56304_B1_REV_ID 0x12 +#define BCM56404_DEVICE_ID 0xb404 +#define BCM56404_A0_REV_ID 1 +#define BCM56404_A1_REV_ID 2 +#define BCM56305_DEVICE_ID 0xb305 +#define BCM56305_A0_REV_ID 1 +#define BCM56305_A1_REV_ID 2 +#define BCM56305_B0_REV_ID 0x11 +#define BCM56305_B1_REV_ID 0x12 +#define BCM56306_DEVICE_ID 0xb306 +#define BCM56306_A0_REV_ID 1 +#define BCM56306_A1_REV_ID 2 +#define BCM56306_B0_REV_ID 0x11 +#define BCM56306_B1_REV_ID 0x12 +#define BCM56307_DEVICE_ID 0xb307 +#define BCM56307_A0_REV_ID 1 +#define BCM56307_A1_REV_ID 2 +#define BCM56307_B0_REV_ID 0x11 +#define BCM56307_B1_REV_ID 0x12 +#define BCM56308_DEVICE_ID 0xb308 +#define BCM56308_A0_REV_ID 1 +#define BCM56308_A1_REV_ID 2 +#define BCM56308_B0_REV_ID 0x11 +#define BCM56308_B1_REV_ID 0x12 +#define BCM56309_DEVICE_ID 0xb309 +#define BCM56309_A0_REV_ID 1 +#define BCM56309_A1_REV_ID 2 +#define BCM56309_B0_REV_ID 0x11 +#define BCM56309_B1_REV_ID 0x12 + +#define BCM56310_DEVICE_ID 0xb310 +#define BCM56310_A0_REV_ID 1 +#define BCM56311_DEVICE_ID 0xb311 +#define BCM56311_A0_REV_ID 1 +#define BCM56312_DEVICE_ID 0xb312 +#define BCM56312_A0_REV_ID 1 +#define BCM56313_DEVICE_ID 0xb313 +#define BCM56313_A0_REV_ID 1 +#define BCM56314_DEVICE_ID 0xb314 +#define BCM56314_A0_REV_ID 1 +#define BCM56315_DEVICE_ID 0xb315 +#define BCM56315_A0_REV_ID 1 +#define BCM56316_DEVICE_ID 0xb316 +#define BCM56316_A0_REV_ID 1 +#define BCM56317_DEVICE_ID 0xb317 +#define BCM56317_A0_REV_ID 1 +#define BCM56318_DEVICE_ID 0xb318 +#define BCM56318_A0_REV_ID 1 +#define BCM56319_DEVICE_ID 0xb319 +#define BCM56319_A0_REV_ID 1 + +#ifndef EXCLUDE_BCM56324 +#define BCM56322_DEVICE_ID 0xb322 +#define BCM56322_A0_REV_ID 1 +#define BCM56324_DEVICE_ID 0xb324 +#define BCM56324_A0_REV_ID 1 +#endif + +#define BCM53300_DEVICE_ID 0xb006 +#define BCM53300_A0_REV_ID 0x11 +#define BCM53300_A1_REV_ID 0x12 +#define BCM53301_DEVICE_ID 0xb206 +#define BCM53301_A0_REV_ID 0x11 +#define BCM53301_A1_REV_ID 0x12 +#define BCM53302_DEVICE_ID 0xb008 +#define BCM53302_A0_REV_ID 0x11 +#define BCM53302_A1_REV_ID 0x12 + +#define BCM56500_DEVICE_ID 0xb500 +#define BCM56500_A0_REV_ID 1 +#define BCM56500_A1_REV_ID 2 +#define BCM56500_B0_REV_ID 0x11 +#define BCM56500_B1_REV_ID 0x12 +#define BCM56500_B2_REV_ID 0x13 +#define BCM56501_DEVICE_ID 0xb501 +#define BCM56501_A0_REV_ID 1 +#define BCM56501_A1_REV_ID 2 +#define BCM56501_B0_REV_ID 0x11 +#define BCM56501_B1_REV_ID 0x12 +#define BCM56501_B2_REV_ID 0x13 +#define BCM56502_DEVICE_ID 0xb502 +#define BCM56502_A0_REV_ID 1 +#define BCM56502_A1_REV_ID 2 +#define BCM56502_B0_REV_ID 0x11 +#define BCM56502_B1_REV_ID 0x12 +#define BCM56502_B2_REV_ID 0x13 +#define BCM56503_DEVICE_ID 0xb503 +#define BCM56503_A0_REV_ID 1 +#define BCM56503_A1_REV_ID 2 +#define BCM56503_B0_REV_ID 0x11 +#define BCM56503_B1_REV_ID 0x12 +#define BCM56503_B2_REV_ID 0x13 +#define BCM56504_DEVICE_ID 0xb504 +#define BCM56504_A0_REV_ID 1 +#define BCM56504_A1_REV_ID 2 +#define BCM56504_B0_REV_ID 0x11 +#define BCM56504_B1_REV_ID 0x12 +#define BCM56504_B2_REV_ID 0x13 +#define BCM56505_DEVICE_ID 0xb505 +#define BCM56505_A0_REV_ID 1 +#define BCM56505_A1_REV_ID 2 +#define BCM56505_B0_REV_ID 0x11 +#define BCM56505_B1_REV_ID 0x12 +#define BCM56505_B2_REV_ID 0x13 +#define BCM56506_DEVICE_ID 0xb506 +#define BCM56506_A0_REV_ID 1 +#define BCM56506_A1_REV_ID 2 +#define BCM56506_B0_REV_ID 0x11 +#define BCM56506_B1_REV_ID 0x12 +#define BCM56506_B2_REV_ID 0x13 +#define BCM56507_DEVICE_ID 0xb507 +#define BCM56507_A0_REV_ID 1 +#define BCM56507_A1_REV_ID 2 +#define BCM56507_B0_REV_ID 0x11 +#define BCM56507_B1_REV_ID 0x12 +#define BCM56507_B2_REV_ID 0x13 +#define BCM56508_DEVICE_ID 0xb508 +#define BCM56508_A0_REV_ID 1 +#define BCM56508_A1_REV_ID 2 +#define BCM56508_B0_REV_ID 0x11 +#define BCM56508_B1_REV_ID 0x12 +#define BCM56508_B2_REV_ID 0x13 +#define BCM56509_DEVICE_ID 0xb509 +#define BCM56509_A0_REV_ID 1 +#define BCM56509_A1_REV_ID 2 +#define BCM56509_B0_REV_ID 0x11 +#define BCM56509_B1_REV_ID 0x12 +#define BCM56509_B2_REV_ID 0x13 + +#define BCM56600_DEVICE_ID 0xb600 +#define BCM56600_A0_REV_ID 1 +#define BCM56600_B0_REV_ID 0x11 +#define BCM56600_C0_REV_ID 0x21 +#define BCM56601_DEVICE_ID 0xb601 +#define BCM56601_A0_REV_ID 1 +#define BCM56601_B0_REV_ID 0x11 +#define BCM56601_C0_REV_ID 0x21 +#define BCM56602_DEVICE_ID 0xb602 +#define BCM56602_A0_REV_ID 1 +#define BCM56602_B0_REV_ID 0x11 +#define BCM56602_C0_REV_ID 0x21 +#define BCM56603_DEVICE_ID 0xb603 +#define BCM56603_A0_REV_ID 1 +#define BCM56603_B0_REV_ID 0x11 +#define BCM56603_C0_REV_ID 0x21 +#define BCM56605_DEVICE_ID 0xb605 +#define BCM56605_A0_REV_ID 1 +#define BCM56605_B0_REV_ID 0x11 +#define BCM56605_C0_REV_ID 0x21 +#define BCM56606_DEVICE_ID 0xb606 +#define BCM56606_A0_REV_ID 1 +#define BCM56606_B0_REV_ID 0x11 +#define BCM56606_C0_REV_ID 0x21 +#define BCM56607_DEVICE_ID 0xb607 +#define BCM56607_A0_REV_ID 1 +#define BCM56607_B0_REV_ID 0x11 +#define BCM56607_C0_REV_ID 0x21 +#define BCM56608_DEVICE_ID 0xb608 +#define BCM56608_A0_REV_ID 1 +#define BCM56608_B0_REV_ID 0x11 +#define BCM56608_C0_REV_ID 0x21 + +#define BCM56580_DEVICE_ID 0xb580 +#define BCM56580_A0_REV_ID 1 + +#define BCM56700_DEVICE_ID 0xb700 +#define BCM56700_A0_REV_ID 1 +#define BCM56701_DEVICE_ID 0xb701 +#define BCM56701_A0_REV_ID 1 + +#define BCM56800_DEVICE_ID 0xb800 +#define BCM56800_A0_REV_ID 1 +#define BCM56801_DEVICE_ID 0xb801 +#define BCM56801_A0_REV_ID 1 +#define BCM56802_DEVICE_ID 0xb802 +#define BCM56802_A0_REV_ID 1 +#define BCM56803_DEVICE_ID 0xb803 +#define BCM56803_A0_REV_ID 1 + +#define BCM56224_DEVICE_ID 0xb224 +#define BCM56224_A0_REV_ID 1 +#define BCM56224_B0_REV_ID 0x11 +#define BCM56225_DEVICE_ID 0xb225 +#define BCM56225_A0_REV_ID 1 +#define BCM56225_B0_REV_ID 0x11 +#define BCM56226_DEVICE_ID 0xb226 +#define BCM56226_A0_REV_ID 1 +#define BCM56226_B0_REV_ID 0x11 +#define BCM56227_DEVICE_ID 0xb227 +#define BCM56227_A0_REV_ID 1 +#define BCM56227_B0_REV_ID 0x11 +#define BCM56228_DEVICE_ID 0xb228 +#define BCM56228_A0_REV_ID 1 +#define BCM56228_B0_REV_ID 0x11 +#define BCM56229_DEVICE_ID 0xb229 +#define BCM56229_A0_REV_ID 1 +#define BCM56229_B0_REV_ID 0x11 +#define BCM56024_DEVICE_ID 0xb024 +#define BCM56024_A0_REV_ID 1 +#define BCM56024_B0_REV_ID 0x11 +#define BCM56025_DEVICE_ID 0xb025 +#define BCM56025_A0_REV_ID 1 +#define BCM56025_B0_REV_ID 0x11 +#define BCM53724_DEVICE_ID 0xc724 +#define BCM53724_A0_REV_ID 1 +#define BCM53724_B0_REV_ID 0x11 +#define BCM53726_DEVICE_ID 0xc726 +#define BCM53726_A0_REV_ID 1 +#define BCM53726_B0_REV_ID 0x11 + +#define BCM53312_DEVICE_ID 0xc312 +#define BCM53312_A0_REV_ID 1 +#define BCM53312_B0_REV_ID 0x11 +#define BCM53313_DEVICE_ID 0xc313 +#define BCM53313_A0_REV_ID 1 +#define BCM53313_B0_REV_ID 0x11 +#define BCM53314_DEVICE_ID 0xc314 +#define BCM53314_A0_REV_ID 1 +#define BCM53314_B0_REV_ID 0x11 + +#define BCM53322_DEVICE_ID 0xc322 +#define BCM53322_A0_REV_ID 1 +#define BCM53323_DEVICE_ID 0xc323 +#define BCM53323_A0_REV_ID 1 +#define BCM53324_DEVICE_ID 0xc324 +#define BCM53324_A0_REV_ID 1 + + +#define BCM56218_DEVICE_ID 0xB218 +#define BCM56218_A0_REV_ID 1 +#define BCM56218_A1_REV_ID 2 +#define BCM56218_A2_REV_ID 3 +#define BCM56218X_DEVICE_ID 0xc710 +#define BCM56218X_A0_REV_ID 1 +#define BCM56218X_A1_REV_ID 2 +#define BCM56218X_A2_REV_ID 3 +#define BCM56219_DEVICE_ID 0xB219 +#define BCM56219_A0_REV_ID 1 +#define BCM56219_A1_REV_ID 2 +#define BCM56219_A2_REV_ID 3 +#define BCM56218R_DEVICE_ID 0xB21A +#define BCM56218R_A0_REV_ID 1 +#define BCM56218R_A1_REV_ID 2 +#define BCM56218R_A2_REV_ID 3 +#define BCM56219R_DEVICE_ID 0xB21B +#define BCM56219R_A0_REV_ID 1 +#define BCM56219R_A1_REV_ID 2 +#define BCM56219R_A2_REV_ID 3 +#define BCM56214_DEVICE_ID 0xB214 +#define BCM56214_A0_REV_ID 1 +#define BCM56214_A1_REV_ID 2 +#define BCM56214_A2_REV_ID 3 +#define BCM56215_DEVICE_ID 0xB215 +#define BCM56215_A0_REV_ID 1 +#define BCM56215_A1_REV_ID 2 +#define BCM56215_A2_REV_ID 3 +#define BCM56214R_DEVICE_ID 0xB21C +#define BCM56214R_A0_REV_ID 1 +#define BCM56214R_A1_REV_ID 2 +#define BCM56214R_A2_REV_ID 3 +#define BCM56215R_DEVICE_ID 0xB21D +#define BCM56215R_A0_REV_ID 1 +#define BCM56215R_A1_REV_ID 2 +#define BCM56215R_A2_REV_ID 3 +#define BCM56216_DEVICE_ID 0xB216 +#define BCM56216_A0_REV_ID 1 +#define BCM56216_A1_REV_ID 2 +#define BCM56216_A2_REV_ID 3 +#define BCM56217_DEVICE_ID 0xB217 +#define BCM56217_A0_REV_ID 1 +#define BCM56217_A1_REV_ID 2 +#define BCM56217_A2_REV_ID 3 +#define BCM56212_DEVICE_ID 0xB212 +#define BCM56212_A0_REV_ID 1 +#define BCM56212_A1_REV_ID 2 +#define BCM56212_A2_REV_ID 3 +#define BCM56213_DEVICE_ID 0xB213 +#define BCM56213_A0_REV_ID 1 +#define BCM56213_A1_REV_ID 2 +#define BCM56213_A2_REV_ID 3 +#define BCM53718_DEVICE_ID 0xC71A +#define BCM53718_A0_REV_ID 1 +#define BCM53718_A1_REV_ID 2 +#define BCM53718_A2_REV_ID 3 +#define BCM53714_DEVICE_ID 0xC71B +#define BCM53714_A0_REV_ID 1 +#define BCM53714_A1_REV_ID 2 +#define BCM53714_A2_REV_ID 3 +#define BCM53716_DEVICE_ID 0xC716 +#define BCM53716_A0_REV_ID 1 +#define BCM53716_A1_REV_ID 2 +#define BCM53716_A2_REV_ID 3 +#define BCM56018_DEVICE_ID 0xB018 +#define BCM56018_A0_REV_ID 1 +#define BCM56018_A1_REV_ID 2 +#define BCM56018_A2_REV_ID 3 +#define BCM56014_DEVICE_ID 0xB014 +#define BCM56014_A0_REV_ID 1 +#define BCM56014_A1_REV_ID 2 +#define BCM56014_A2_REV_ID 3 + +#define BCM56510_DEVICE_ID 0xb510 +#define BCM56510_A0_REV_ID 1 +#define BCM56511_DEVICE_ID 0xb511 +#define BCM56511_A0_REV_ID 1 +#define BCM56512_DEVICE_ID 0xb512 +#define BCM56512_A0_REV_ID 1 +#define BCM56513_DEVICE_ID 0xb513 +#define BCM56513_A0_REV_ID 1 +#define BCM56514_DEVICE_ID 0xb514 +#define BCM56514_A0_REV_ID 1 +#define BCM56516_DEVICE_ID 0xb516 +#define BCM56516_A0_REV_ID 1 +#define BCM56517_DEVICE_ID 0xb517 +#define BCM56517_A0_REV_ID 1 +#define BCM56518_DEVICE_ID 0xb518 +#define BCM56518_A0_REV_ID 1 +#define BCM56519_DEVICE_ID 0xb519 +#define BCM56519_A0_REV_ID 1 + +#define BCM56620_DEVICE_ID 0xb620 +#define BCM56620_A0_REV_ID 1 +#define BCM56620_A1_REV_ID 2 +#define BCM56620_B0_REV_ID 0x11 +#define BCM56620_B1_REV_ID 0x12 +#define BCM56620_B2_REV_ID 0x13 +#define BCM56624_DEVICE_ID 0xb624 +#define BCM56624_A0_REV_ID 1 +#define BCM56624_A1_REV_ID 2 +#define BCM56624_B0_REV_ID 0x11 +#define BCM56624_B1_REV_ID 0x12 +#define BCM56624_B2_REV_ID 0x13 +#define BCM56626_DEVICE_ID 0xb626 +#define BCM56626_A0_REV_ID 1 +#define BCM56626_A1_REV_ID 2 +#define BCM56626_B0_REV_ID 0x11 +#define BCM56626_B1_REV_ID 0x12 +#define BCM56626_B2_REV_ID 0x13 +#define BCM56628_DEVICE_ID 0xb628 +#define BCM56628_A0_REV_ID 1 +#define BCM56628_A1_REV_ID 2 +#define BCM56628_B0_REV_ID 0x11 +#define BCM56628_B1_REV_ID 0x12 +#define BCM56628_B2_REV_ID 0x13 +#define BCM56629_DEVICE_ID 0xb629 +#define BCM56629_A0_REV_ID 1 +#define BCM56629_A1_REV_ID 2 +#define BCM56629_B0_REV_ID 0x11 +#define BCM56629_B1_REV_ID 0x12 +#define BCM56629_B2_REV_ID 0x13 + +#define BCM56680_DEVICE_ID 0xb680 +#define BCM56680_A0_REV_ID 1 +#define BCM56680_A1_REV_ID 2 +#define BCM56680_B0_REV_ID 0x11 +#define BCM56680_B1_REV_ID 0x12 +#define BCM56680_B2_REV_ID 0x13 +#define BCM56684_DEVICE_ID 0xb684 +#define BCM56684_A0_REV_ID 1 +#define BCM56684_A1_REV_ID 2 +#define BCM56684_B0_REV_ID 0x11 +#define BCM56684_B1_REV_ID 0x12 +#define BCM56684_B2_REV_ID 0x13 +#define BCM56686_DEVICE_ID 0xb686 +#define BCM56686_B0_REV_ID 0x11 +#define BCM56686_B1_REV_ID 0x12 +#define BCM56686_B2_REV_ID 0x13 + +#define BCM56820_DEVICE_ID 0xb820 +#define BCM56820_A0_REV_ID 1 +#define BCM56820_B0_REV_ID 0x11 +#define BCM56821_DEVICE_ID 0xb821 +#define BCM56821_A0_REV_ID 1 +#define BCM56821_B0_REV_ID 0x11 +#define BCM56822_DEVICE_ID 0xb822 +#define BCM56822_A0_REV_ID 1 +#define BCM56822_B0_REV_ID 0x11 +#define BCM56823_DEVICE_ID 0xb823 +#define BCM56823_A0_REV_ID 1 +#define BCM56823_B0_REV_ID 0x11 +#define BCM56825_DEVICE_ID 0xb825 +#define BCM56825_B0_REV_ID 0x11 + +#define BCM56720_DEVICE_ID 0xb720 +#define BCM56720_A0_REV_ID 1 +#define BCM56720_B0_REV_ID 0x11 +#define BCM56721_DEVICE_ID 0xb721 +#define BCM56721_A0_REV_ID 1 +#define BCM56721_B0_REV_ID 0x11 + +#define BCM56725_DEVICE_ID 0xb725 +#define BCM56725_A0_REV_ID 1 +#define BCM56725_B0_REV_ID 0x11 + +#define BCM56630_DEVICE_ID 0xb630 +#define BCM56630_A0_REV_ID 1 +#define BCM56630_B0_REV_ID 0x11 +#define BCM56634_DEVICE_ID 0xb634 +#define BCM56634_A0_REV_ID 1 +#define BCM56634_B0_REV_ID 0x11 +#define BCM56636_DEVICE_ID 0xb636 +#define BCM56636_A0_REV_ID 1 +#define BCM56636_B0_REV_ID 0x11 +#define BCM56638_DEVICE_ID 0xb638 +#define BCM56638_A0_REV_ID 1 +#define BCM56638_B0_REV_ID 0x11 +#define BCM56639_DEVICE_ID 0xb639 +#define BCM56639_A0_REV_ID 1 +#define BCM56639_B0_REV_ID 0x11 + +#define BCM56685_DEVICE_ID 0xb685 +#define BCM56685_A0_REV_ID 1 +#define BCM56685_B0_REV_ID 0x11 +#define BCM56689_DEVICE_ID 0xb689 +#define BCM56689_A0_REV_ID 1 +#define BCM56689_B0_REV_ID 0x11 + +#define BCM56520_DEVICE_ID 0xb520 +#define BCM56520_A0_REV_ID 1 +#define BCM56520_B0_REV_ID 0x11 +#define BCM56521_DEVICE_ID 0xb521 +#define BCM56521_A0_REV_ID 1 +#define BCM56521_B0_REV_ID 0x11 +#define BCM56522_DEVICE_ID 0xb522 +#define BCM56522_A0_REV_ID 1 +#define BCM56522_B0_REV_ID 0x11 +#define BCM56524_DEVICE_ID 0xb524 +#define BCM56524_A0_REV_ID 1 +#define BCM56524_B0_REV_ID 0x11 +#define BCM56526_DEVICE_ID 0xb526 +#define BCM56526_A0_REV_ID 1 +#define BCM56526_B0_REV_ID 0x11 + +#define BCM56534_DEVICE_ID 0xb534 +#define BCM56534_B0_REV_ID 0x11 +#define BCM56538_DEVICE_ID 0xb538 +#define BCM56538_B0_REV_ID 0x11 + +#define BCM56331_DEVICE_ID 0xb331 +#define BCM56331_A0_REV_ID 1 +#define BCM56331_B0_REV_ID 0x11 +#define BCM56331_B1_REV_ID 0x12 +#define BCM56333_DEVICE_ID 0xb333 +#define BCM56333_A0_REV_ID 1 +#define BCM56333_B0_REV_ID 0x11 +#define BCM56333_B1_REV_ID 0x12 +#define BCM56334_DEVICE_ID 0xb334 +#define BCM56334_A0_REV_ID 1 +#define BCM56334_B0_REV_ID 0x11 +#define BCM56334_B1_REV_ID 0x12 +#define BCM56338_DEVICE_ID 0xb338 +#define BCM56338_A0_REV_ID 1 +#define BCM56338_B0_REV_ID 0x11 +#define BCM56338_B1_REV_ID 0x12 + +#define BCM56320_DEVICE_ID 0xb320 +#define BCM56320_A0_REV_ID 1 +#define BCM56320_B0_REV_ID 0x11 +#define BCM56320_B1_REV_ID 0x12 +#define BCM56321_DEVICE_ID 0xb321 +#define BCM56321_A0_REV_ID 1 +#define BCM56321_B0_REV_ID 0x11 +#define BCM56321_B1_REV_ID 0x12 + + +#define BCM56548H_DEVICE_ID 0xB54A +#define BCM56548H_A0_REV_ID 1 +#define BCM56548_DEVICE_ID 0xb548 +#define BCM56548_A0_REV_ID 1 +#define BCM56547_DEVICE_ID 0xb547 +#define BCM56547_A0_REV_ID 1 + +#define BCM56346_DEVICE_ID 0xb346 +#define BCM56346_A0_REV_ID 1 +#define BCM56345_DEVICE_ID 0xb345 +#define BCM56345_A0_REV_ID 1 +#define BCM56344_DEVICE_ID 0xb344 +#define BCM56344_A0_REV_ID 1 +#define BCM56342_DEVICE_ID 0xb342 +#define BCM56342_A0_REV_ID 1 +#define BCM56340_DEVICE_ID 0xb340 +#define BCM56340_A0_REV_ID 1 + +#define BCM56049_DEVICE_ID 0xb049 +#define BCM56049_A0_REV_ID 1 +#define BCM56048_DEVICE_ID 0xb048 +#define BCM56048_A0_REV_ID 1 +#define BCM56047_DEVICE_ID 0xb047 +#define BCM56047_A0_REV_ID 1 + +#define BCM56042_DEVICE_ID 0xb042 +#define BCM56042_A0_REV_ID 1 +#define BCM56041_DEVICE_ID 0xb041 +#define BCM56041_A0_REV_ID 1 +#define BCM56040_DEVICE_ID 0xb040 +#define BCM56040_A0_REV_ID 1 + +#define BCM56132_DEVICE_ID 0xb132 +#define BCM56132_A0_REV_ID 1 +#define BCM56132_B0_REV_ID 0x11 +#define BCM56132_B1_REV_ID 0x12 +#define BCM56134_DEVICE_ID 0xb134 +#define BCM56134_A0_REV_ID 1 +#define BCM56134_B0_REV_ID 0x11 +#define BCM56134_B1_REV_ID 0x12 + +#define BCM56230_DEVICE_ID 0xb230 +#define BCM56230_B1_REV_ID 0x12 +#define BCM56231_DEVICE_ID 0xb231 +#define BCM56231_B1_REV_ID 0x12 + +#define BCM56140_DEVICE_ID 0xb140 +#define BCM56140_A0_REV_ID 1 +#define BCM56142_DEVICE_ID 0xb142 +#define BCM56142_A0_REV_ID 1 +#define BCM56143_DEVICE_ID 0xb143 +#define BCM56143_A0_REV_ID 1 +#define BCM56144_DEVICE_ID 0xb144 +#define BCM56144_A0_REV_ID 1 +#define BCM56146_DEVICE_ID 0xb146 +#define BCM56146_A0_REV_ID 1 +#define BCM56147_DEVICE_ID 0xb147 +#define BCM56147_A0_REV_ID 1 +#define BCM56149_DEVICE_ID 0xb149 +#define BCM56149_A0_REV_ID 1 + +#define BCM56840_DEVICE_ID 0xb840 +#define BCM56840_A0_REV_ID 1 +#define BCM56840_A1_REV_ID 2 +#define BCM56840_A2_REV_ID 3 +#define BCM56840_A3_REV_ID 4 +#define BCM56840_A4_REV_ID 5 +#define BCM56840_B0_REV_ID 0x11 +#define BCM56840_B1_REV_ID 0x12 +#define BCM56841_DEVICE_ID 0xb841 +#define BCM56841_A0_REV_ID 1 +#define BCM56841_A1_REV_ID 2 +#define BCM56841_A2_REV_ID 3 +#define BCM56841_A3_REV_ID 4 +#define BCM56841_A4_REV_ID 5 +#define BCM56841_B0_REV_ID 0x11 +#define BCM56841_B1_REV_ID 0x12 +#define BCM56843_DEVICE_ID 0xb843 +#define BCM56843_A0_REV_ID 1 +#define BCM56843_A1_REV_ID 2 +#define BCM56843_A2_REV_ID 3 +#define BCM56843_A3_REV_ID 4 +#define BCM56843_A4_REV_ID 5 +#define BCM56843_B0_REV_ID 0x11 +#define BCM56843_B1_REV_ID 0x12 +#define BCM56845_DEVICE_ID 0xb845 +#define BCM56845_A0_REV_ID 1 +#define BCM56845_A1_REV_ID 2 +#define BCM56845_A2_REV_ID 3 +#define BCM56845_A3_REV_ID 4 +#define BCM56845_A4_REV_ID 5 +#define BCM56845_B0_REV_ID 0x11 +#define BCM56845_B1_REV_ID 0x12 + +#define BCM56743_DEVICE_ID 0xb743 +#define BCM56743_A0_REV_ID 1 +#define BCM56743_A1_REV_ID 2 +#define BCM56743_A2_REV_ID 3 +#define BCM56743_A3_REV_ID 4 +#define BCM56743_A4_REV_ID 5 +#define BCM56743_B0_REV_ID 0x11 +#define BCM56743_B1_REV_ID 0x12 +#define BCM56745_DEVICE_ID 0xb745 +#define BCM56745_A0_REV_ID 1 +#define BCM56745_A1_REV_ID 2 +#define BCM56745_A2_REV_ID 3 +#define BCM56745_A3_REV_ID 4 +#define BCM56745_A4_REV_ID 5 +#define BCM56745_B0_REV_ID 0x11 +#define BCM56745_B1_REV_ID 0x12 + +#define BCM56260_DEVICE_ID 0xb260 +#define BCM56260_A0_REV_ID 1 +#define BCM56260_B0_REV_ID 0x11 +#define BCM56261_DEVICE_ID 0xb261 +#define BCM56261_A0_REV_ID 1 +#define BCM56261_B0_REV_ID 0x11 +#define BCM56262_DEVICE_ID 0xb262 +#define BCM56262_A0_REV_ID 1 +#define BCM56262_B0_REV_ID 0x11 +#define BCM56263_DEVICE_ID 0xb263 +#define BCM56263_A0_REV_ID 1 +#define BCM56263_B0_REV_ID 0x11 + +#define BCM56265_DEVICE_ID 0xb265 +#define BCM56265_A0_REV_ID 1 +#define BCM56265_B0_REV_ID 0x11 +#define BCM56266_DEVICE_ID 0xb266 +#define BCM56266_A0_REV_ID 1 +#define BCM56266_B0_REV_ID 0x11 +#define BCM56267_DEVICE_ID 0xb267 +#define BCM56267_A0_REV_ID 1 +#define BCM56267_B0_REV_ID 0x11 +#define BCM56268_DEVICE_ID 0xb268 +#define BCM56268_A0_REV_ID 1 +#define BCM56268_B0_REV_ID 0x11 + +#define BCM56233_DEVICE_ID 0xb233 +#define BCM56233_B0_REV_ID 0x11 + +#define BCM56460_DEVICE_ID 0xb460 +#define BCM56460_A0_REV_ID 1 +#define BCM56460_B0_REV_ID 0x11 +#define BCM56461_DEVICE_ID 0xb461 +#define BCM56461_A0_REV_ID 1 +#define BCM56461_B0_REV_ID 0x11 +#define BCM56462_DEVICE_ID 0xb462 +#define BCM56462_A0_REV_ID 1 +#define BCM56462_B0_REV_ID 0x11 +#define BCM56463_DEVICE_ID 0xb463 +#define BCM56463_A0_REV_ID 1 +#define BCM56463_B0_REV_ID 0x11 + +#define BCM56465_DEVICE_ID 0xb465 +#define BCM56465_A0_REV_ID 1 +#define BCM56465_B0_REV_ID 0x11 +#define BCM56466_DEVICE_ID 0xb466 +#define BCM56466_A0_REV_ID 1 +#define BCM56466_B0_REV_ID 0x11 +#define BCM56467_DEVICE_ID 0xb467 +#define BCM56467_A0_REV_ID 1 +#define BCM56467_B0_REV_ID 0x11 +#define BCM56468_DEVICE_ID 0xb468 +#define BCM56468_A0_REV_ID 1 +#define BCM56468_B0_REV_ID 0x11 + +#define BCM56270_DEVICE_ID 0xb270 +#define BCM56270_A0_REV_ID 1 +#define BCM56271_DEVICE_ID 0xb271 +#define BCM56271_A0_REV_ID 1 +#define BCM56272_DEVICE_ID 0xb272 +#define BCM56272_A0_REV_ID 1 + +#define BCM53460_DEVICE_ID 0x8460 +#define BCM53460_A0_REV_ID 1 +#define BCM53461_DEVICE_ID 0x8461 +#define BCM53461_A0_REV_ID 1 + +#define BCM56842_DEVICE_ID 0xb842 +#define BCM56842_A0_REV_ID 1 +#define BCM56842_A1_REV_ID 2 +#define BCM56844_DEVICE_ID 0xb844 +#define BCM56844_A0_REV_ID 1 +#define BCM56844_A1_REV_ID 2 +#define BCM56846_DEVICE_ID 0xb846 +#define BCM56846_A0_REV_ID 1 +#define BCM56846_A1_REV_ID 2 +#define BCM56549_DEVICE_ID 0xb549 +#define BCM56549_A0_REV_ID 1 +#define BCM56549_A1_REV_ID 2 +#define BCM56053_DEVICE_ID 0xb053 +#define BCM56053_A0_REV_ID 1 +#define BCM56053_A1_REV_ID 2 +#define BCM56831_DEVICE_ID 0xb831 +#define BCM56831_A0_REV_ID 1 +#define BCM56831_A1_REV_ID 2 +#define BCM56835_DEVICE_ID 0xb835 +#define BCM56835_A0_REV_ID 1 +#define BCM56835_A1_REV_ID 2 +#define BCM56838_DEVICE_ID 0xb838 +#define BCM56838_A0_REV_ID 1 +#define BCM56838_A1_REV_ID 2 +#define BCM56847_DEVICE_ID 0xb847 +#define BCM56847_A0_REV_ID 1 +#define BCM56847_A1_REV_ID 2 +#define BCM56847_A2_REV_ID 3 +#define BCM56847_A3_REV_ID 4 +#define BCM56847_A4_REV_ID 5 +#define BCM56847_B0_REV_ID 0x11 +#define BCM56847_B1_REV_ID 0x12 +#define BCM56849_DEVICE_ID 0xb849 +#define BCM56849_A0_REV_ID 1 +#define BCM56849_A1_REV_ID 2 + +#define BCM56742_DEVICE_ID 0xb742 +#define BCM56742_A0_REV_ID 1 +#define BCM56742_A1_REV_ID 2 +#define BCM56742_A2_REV_ID 3 +#define BCM56744_DEVICE_ID 0xb744 +#define BCM56744_A0_REV_ID 1 +#define BCM56744_A1_REV_ID 2 +#define BCM56746_DEVICE_ID 0xb746 +#define BCM56746_A0_REV_ID 1 +#define BCM56746_A1_REV_ID 2 + + +#define BCM56640_DEVICE_ID 0xb640 +#define BCM56640_A0_REV_ID 1 +#define BCM56640_A1_REV_ID 2 +#define BCM56640_B0_REV_ID 0x11 +#define BCM56643_DEVICE_ID 0xb643 +#define BCM56643_A0_REV_ID 1 +#define BCM56643_A1_REV_ID 2 +#define BCM56643_B0_REV_ID 0x11 +#define BCM56644_DEVICE_ID 0xb644 +#define BCM56644_A0_REV_ID 1 +#define BCM56644_A1_REV_ID 2 +#define BCM56644_B0_REV_ID 0x11 +#define BCM56648_DEVICE_ID 0xb648 +#define BCM56648_A0_REV_ID 1 +#define BCM56648_A1_REV_ID 2 +#define BCM56648_B0_REV_ID 0x11 +#define BCM56649_DEVICE_ID 0xb649 +#define BCM56649_A0_REV_ID 1 +#define BCM56649_A1_REV_ID 2 +#define BCM56649_B0_REV_ID 0x11 + +#define BCM56540_DEVICE_ID 0xb540 +#define BCM56540_A0_REV_ID 1 +#define BCM56540_A1_REV_ID 2 +#define BCM56540_B0_REV_ID 0x11 +#define BCM56541_DEVICE_ID 0xb541 +#define BCM56541_A0_REV_ID 1 +#define BCM56541_A1_REV_ID 2 +#define BCM56541_B0_REV_ID 0x11 +#define BCM56542_DEVICE_ID 0xb542 +#define BCM56542_A0_REV_ID 1 +#define BCM56542_A1_REV_ID 2 +#define BCM56542_B0_REV_ID 0x11 +#define BCM56543_DEVICE_ID 0xb543 +#define BCM56543_A0_REV_ID 1 +#define BCM56543_A1_REV_ID 2 +#define BCM56543_B0_REV_ID 0x11 +#define BCM56544_DEVICE_ID 0xb544 +#define BCM56544_A0_REV_ID 1 +#define BCM56544_A1_REV_ID 2 +#define BCM56544_B0_REV_ID 0x11 + +#define BCM56545_DEVICE_ID 0xb545 +#define BCM56545_A0_REV_ID 1 +#define BCM56545_A1_REV_ID 2 +#define BCM56545_B0_REV_ID 0x11 +#define BCM56546_DEVICE_ID 0xb546 +#define BCM56546_A0_REV_ID 1 +#define BCM56546_A1_REV_ID 2 +#define BCM56546_B0_REV_ID 0x11 + +#define BCM56044_DEVICE_ID 0xb044 +#define BCM56044_B0_REV_ID 0x11 +#define BCM56045_DEVICE_ID 0xb045 +#define BCM56045_A0_REV_ID 1 +#define BCM56045_A1_REV_ID 2 +#define BCM56045_B0_REV_ID 0x11 +#define BCM56046_DEVICE_ID 0xb046 +#define BCM56046_A0_REV_ID 1 +#define BCM56046_A1_REV_ID 2 +#define BCM56046_B0_REV_ID 0x11 + + +#define BCM56440_DEVICE_ID 0xb440 +#define BCM56440_A0_REV_ID 1 +#define BCM56440_B0_REV_ID 0x11 +#define BCM56441_DEVICE_ID 0xb441 +#define BCM56441_A0_REV_ID 1 +#define BCM56441_B0_REV_ID 0x11 +#define BCM56442_DEVICE_ID 0xb442 +#define BCM56442_A0_REV_ID 1 +#define BCM56442_B0_REV_ID 0x11 +#define BCM56443_DEVICE_ID 0xb443 +#define BCM56443_A0_REV_ID 1 +#define BCM56443_B0_REV_ID 0x11 +#define BCM56445_DEVICE_ID 0xb445 +#define BCM56445_A0_REV_ID 1 +#define BCM56445_B0_REV_ID 0x11 +#define BCM56446_DEVICE_ID 0xb446 +#define BCM56446_A0_REV_ID 1 +#define BCM56446_B0_REV_ID 0x11 +#define BCM56447_DEVICE_ID 0xb447 +#define BCM56447_A0_REV_ID 1 +#define BCM56447_B0_REV_ID 0x11 +#define BCM56448_DEVICE_ID 0xb448 +#define BCM56448_A0_REV_ID 1 +#define BCM56448_B0_REV_ID 0x11 +#define BCM56449_DEVICE_ID 0xb449 +#define BCM56449_A0_REV_ID 1 +#define BCM56449_B0_REV_ID 0x11 +#define BCM56240_DEVICE_ID 0xb240 +#define BCM56240_A0_REV_ID 1 +#define BCM56240_B0_REV_ID 0x11 +#define BCM56241_DEVICE_ID 0xb241 +#define BCM56241_A0_REV_ID 1 +#define BCM56241_B0_REV_ID 0x11 +#define BCM56242_DEVICE_ID 0xb242 +#define BCM56242_A0_REV_ID 1 +#define BCM56242_B0_REV_ID 0x11 +#define BCM56243_DEVICE_ID 0xb243 +#define BCM56243_A0_REV_ID 1 +#define BCM56243_B0_REV_ID 0x11 +#define BCM56245_DEVICE_ID 0xb245 +#define BCM56245_A0_REV_ID 1 +#define BCM56245_B0_REV_ID 0x11 +#define BCM56246_DEVICE_ID 0xb246 +#define BCM56246_A0_REV_ID 1 +#define BCM56246_B0_REV_ID 0x11 +#define BCM55440_DEVICE_ID 0xa440 +#define BCM55440_A0_REV_ID 1 +#define BCM55440_B0_REV_ID 0x11 +#define BCM55441_DEVICE_ID 0xa441 +#define BCM55441_A0_REV_ID 1 +#define BCM55441_B0_REV_ID 0x11 + +#define BCM55450_DEVICE_ID 0xa450 +#define BCM55450_A0_REV_ID 1 +#define BCM55450_B0_REV_ID 0x11 +#define BCM55450_B1_REV_ID 0x12 + +#define BCM55455_DEVICE_ID 0xa455 +#define BCM55455_A0_REV_ID 1 +#define BCM55455_B0_REV_ID 0x11 +#define BCM55455_B1_REV_ID 0x12 + +#define BCM56248_DEVICE_ID 0xb248 +#define BCM56248_A0_REV_ID 1 +#define BCM56248_B0_REV_ID 0x11 +#define BCM56248_B1_REV_ID 0x12 + +#define BCM56450_DEVICE_ID 0xb450 +#define BCM56450_A0_REV_ID 1 +#define BCM56450_B0_REV_ID 0x11 +#define BCM56450_B1_REV_ID 0x12 + +#define BCM56452_DEVICE_ID 0xb452 +#define BCM56452_A0_REV_ID 1 +#define BCM56452_B0_REV_ID 0x11 +#define BCM56452_B1_REV_ID 0x12 + +#define BCM56454_DEVICE_ID 0xb454 +#define BCM56454_A0_REV_ID 1 +#define BCM56454_B0_REV_ID 0x11 +#define BCM56454_B1_REV_ID 0x12 + +#define BCM56455_DEVICE_ID 0xb455 +#define BCM56455_A0_REV_ID 1 +#define BCM56455_B0_REV_ID 0x11 +#define BCM56455_B1_REV_ID 0x12 + +#define BCM56456_DEVICE_ID 0xb456 +#define BCM56456_A0_REV_ID 1 +#define BCM56456_B0_REV_ID 0x11 +#define BCM56456_B1_REV_ID 0x12 + +#define BCM56457_DEVICE_ID 0xb457 +#define BCM56457_A0_REV_ID 1 +#define BCM56457_B0_REV_ID 0x11 +#define BCM56457_B1_REV_ID 0x12 + +#define BCM56458_DEVICE_ID 0xb458 +#define BCM56458_A0_REV_ID 1 +#define BCM56458_B0_REV_ID 0x11 +#define BCM56458_B1_REV_ID 0x12 + +#define BCM56850_DEVICE_ID 0xb850 +#define BCM56850_A0_REV_ID 1 +#define BCM56850_A1_REV_ID 2 +#define BCM56850_A2_REV_ID 3 +#define BCM56851_DEVICE_ID 0xb851 +#define BCM56851_A0_REV_ID 1 +#define BCM56851_A1_REV_ID 2 +#define BCM56851_A2_REV_ID 3 +#define BCM56852_DEVICE_ID 0xb852 +#define BCM56852_A0_REV_ID 1 +#define BCM56852_A1_REV_ID 2 +#define BCM56852_A2_REV_ID 3 +#define BCM56853_DEVICE_ID 0xb853 +#define BCM56853_A0_REV_ID 1 +#define BCM56853_A1_REV_ID 2 +#define BCM56853_A2_REV_ID 3 +#define BCM56854_DEVICE_ID 0xb854 +#define BCM56854_A0_REV_ID 1 +#define BCM56854_A1_REV_ID 2 +#define BCM56854_A2_REV_ID 3 +#define BCM56855_DEVICE_ID 0xb855 +#define BCM56855_A0_REV_ID 1 +#define BCM56855_A1_REV_ID 2 +#define BCM56855_A2_REV_ID 3 +#define BCM56834_DEVICE_ID 0xb834 +#define BCM56834_A0_REV_ID 1 +#define BCM56834_A1_REV_ID 2 +#define BCM56834_A2_REV_ID 3 + +#define BCM56860_DEVICE_ID 0xb860 +#define BCM56860_A0_REV_ID 1 +#define BCM56860_A1_REV_ID 2 +#define BCM56861_DEVICE_ID 0xb861 +#define BCM56861_A0_REV_ID 1 +#define BCM56861_A1_REV_ID 2 +#define BCM56862_DEVICE_ID 0xb862 +#define BCM56862_A0_REV_ID 1 +#define BCM56862_A1_REV_ID 2 +#define BCM56864_DEVICE_ID 0xb864 +#define BCM56864_A0_REV_ID 1 +#define BCM56864_A1_REV_ID 2 +#define BCM56865_DEVICE_ID 0xb865 +#define BCM56865_A0_REV_ID 1 +#define BCM56865_A1_REV_ID 2 +#define BCM56866_DEVICE_ID 0xb866 +#define BCM56866_A0_REV_ID 1 +#define BCM56866_A1_REV_ID 2 +#define BCM56867_DEVICE_ID 0xb867 +#define BCM56867_A0_REV_ID 1 +#define BCM56867_A1_REV_ID 2 +#define BCM56868_DEVICE_ID 0xb868 +#define BCM56868_A0_REV_ID 1 +#define BCM56868_A1_REV_ID 2 +#define BCM56832_DEVICE_ID 0xb832 +#define BCM56832_A0_REV_ID 1 +#define BCM56832_A1_REV_ID 2 +#define BCM56833_DEVICE_ID 0xb833 +#define BCM56833_A0_REV_ID 1 +#define BCM56833_A1_REV_ID 2 +#define BCM56836_DEVICE_ID 0xb836 +#define BCM56836_A0_REV_ID 1 +#define BCM56836_A1_REV_ID 2 + + +#define BCM56750_DEVICE_ID 0xb750 +#define BCM56750_A0_REV_ID 1 +#define BCM56750_A1_REV_ID 2 +#define BCM56750_A2_REV_ID 3 + +#define BCM56830_DEVICE_ID 0xb830 +#define BCM56830_A0_REV_ID 1 +#define BCM56830_A1_REV_ID 2 +#define BCM56830_A2_REV_ID 3 + +#define BCM56150_DEVICE_ID 0xb150 +#define BCM56150_A0_REV_ID 1 +#define BCM56151_DEVICE_ID 0xb151 +#define BCM56151_A0_REV_ID 1 +#define BCM56152_DEVICE_ID 0xb152 +#define BCM56152_A0_REV_ID 1 + +#define BCM53342_DEVICE_ID 0x8342 +#define BCM53342_A0_REV_ID 1 +#define BCM53343_DEVICE_ID 0x8343 +#define BCM53343_A0_REV_ID 1 +#define BCM53344_DEVICE_ID 0x8344 +#define BCM53344_A0_REV_ID 1 +#define BCM53346_DEVICE_ID 0x8346 +#define BCM53346_A0_REV_ID 1 +#define BCM53347_DEVICE_ID 0x8347 +#define BCM53347_A0_REV_ID 1 + +#define BCM53333_DEVICE_ID 0x8333 +#define BCM53333_A0_REV_ID 1 +#define BCM53334_DEVICE_ID 0x8334 +#define BCM53334_A0_REV_ID 1 + +#define BCM53393_DEVICE_ID 0x8393 +#define BCM53393_A0_REV_ID 1 +#define BCM53394_DEVICE_ID 0x8394 +#define BCM53394_A0_REV_ID 1 + +#define BCM53400_DEVICE_ID 0x8400 +#define BCM53400_A0_REV_ID 1 +#define BCM56060_DEVICE_ID 0xb060 +#define BCM56060_A0_REV_ID 1 +#define BCM56062_DEVICE_ID 0xb062 +#define BCM56062_A0_REV_ID 1 +#define BCM56063_DEVICE_ID 0xb063 +#define BCM56063_A0_REV_ID 1 +#define BCM56064_DEVICE_ID 0xb064 +#define BCM56064_A0_REV_ID 1 +#define BCM56065_DEVICE_ID 0xb065 +#define BCM56065_A0_REV_ID 1 +#define BCM56066_DEVICE_ID 0xb066 +#define BCM56066_A0_REV_ID 1 +#define BCM53401_DEVICE_ID 0x8401 +#define BCM53411_DEVICE_ID 0x8411 +#define BCM53401_A0_REV_ID 1 +#define BCM53402_DEVICE_ID 0x8402 +#define BCM53412_DEVICE_ID 0x8412 +#define BCM53402_A0_REV_ID 1 +#define BCM53403_DEVICE_ID 0x8403 +#define BCM53413_DEVICE_ID 0x8413 +#define BCM53403_A0_REV_ID 1 +#define BCM53404_DEVICE_ID 0x8404 +#define BCM53414_DEVICE_ID 0x8414 +#define BCM53404_A0_REV_ID 1 +#define BCM53405_DEVICE_ID 0x8405 +#define BCM53415_DEVICE_ID 0x8415 +#define BCM53405_A0_REV_ID 1 +#define BCM53406_DEVICE_ID 0x8406 +#define BCM53416_DEVICE_ID 0x8416 +#define BCM53406_A0_REV_ID 1 +#define BCM53408_DEVICE_ID 0x8408 +#define BCM53418_DEVICE_ID 0x8418 +#define BCM53408_A0_REV_ID 1 +#define BCM53365_DEVICE_ID 0x8365 +#define BCM53365_A0_REV_ID 1 +#define BCM53369_DEVICE_ID 0x8369 +#define BCM53369_A0_REV_ID 1 + +#define BCM53454_DEVICE_ID 0x8454 +#define BCM53455_DEVICE_ID 0x8455 +#define BCM53454_A0_REV_ID 1 +#define BCM53456_DEVICE_ID 0x8456 +#define BCM53457_DEVICE_ID 0x8457 +#define BCM53456_A0_REV_ID 1 + +#define BCM53422_DEVICE_ID 0x8422 +#define BCM53422_A0_REV_ID 1 +#define BCM53424_DEVICE_ID 0x8424 +#define BCM53424_A0_REV_ID 1 +#define BCM53426_DEVICE_ID 0x8426 +#define BCM53426_A0_REV_ID 1 + +#define BCM56960_DEVICE_ID 0xb960 +#define BCM56960_A0_REV_ID 1 +#define BCM56960_B0_REV_ID 0x11 +#define BCM56960_B1_REV_ID 0x12 +#define BCM56961_DEVICE_ID 0xb961 +#define BCM56961_A0_REV_ID 1 +#define BCM56961_B0_REV_ID 0x11 +#define BCM56961_B1_REV_ID 0x12 +#define BCM56962_DEVICE_ID 0xb962 +#define BCM56962_A0_REV_ID 1 +#define BCM56962_B0_REV_ID 0x11 +#define BCM56962_B1_REV_ID 0x12 +#define BCM56963_DEVICE_ID 0xb963 +#define BCM56963_A0_REV_ID 1 +#define BCM56963_B0_REV_ID 0x11 +#define BCM56963_B1_REV_ID 0x12 +#define BCM56930_DEVICE_ID 0xb930 +#define BCM56930_A0_REV_ID 1 +#define BCM56930_B0_REV_ID 0x11 +#define BCM56930_B1_REV_ID 0x12 +#define BCM56930_C0_REV_ID 0x21 +#define BCM56931_DEVICE_ID 0xb931 +#define BCM56931_A0_REV_ID 1 +#define BCM56931_B0_REV_ID 0x11 +#define BCM56931_C0_REV_ID 0x21 +#define BCM56935_DEVICE_ID 0xb935 +#define BCM56935_A0_REV_ID 1 +#define BCM56935_B0_REV_ID 0x11 +#define BCM56935_C0_REV_ID 0x21 +#define BCM56936_DEVICE_ID 0xb936 +#define BCM56936_A0_REV_ID 1 +#define BCM56936_B0_REV_ID 0x11 +#define BCM56936_C0_REV_ID 0x21 +#define BCM56939_DEVICE_ID 0xb939 +#define BCM56939_A0_REV_ID 1 +#define BCM56939_B0_REV_ID 0x11 +#define BCM56939_C0_REV_ID 0x21 + +#define BCM56168_DEVICE_ID 0xb168 +#define BCM56168_A0_REV_ID 1 +#define BCM56168_B0_REV_ID 0x11 +#define BCM56168_B1_REV_ID 0x12 +#define BCM56169_DEVICE_ID 0xb169 +#define BCM56169_A0_REV_ID 1 +#define BCM56169_B0_REV_ID 0x11 +#define BCM56169_B1_REV_ID 0x12 + +#define BCM56980_DEVICE_ID_MASK 0xFFF0 +#define BCM56980_DEVICE_ID 0xb980 +#define BCM56980_A0_REV_ID 1 +#define BCM56980_B0_REV_ID 0x11 +#define BCM56981_DEVICE_ID 0xb981 +#define BCM56981_A0_REV_ID 1 +#define BCM56981_B0_REV_ID 0x11 +#define BCM56982_DEVICE_ID 0xb982 +#define BCM56982_A0_REV_ID 1 +#define BCM56982_B0_REV_ID 0x11 +#define BCM56983_DEVICE_ID 0xb983 +#define BCM56983_A0_REV_ID 1 +#define BCM56983_B0_REV_ID 0x11 +#define BCM56984_DEVICE_ID 0xb984 +#define BCM56984_A0_REV_ID 1 +#define BCM56984_B0_REV_ID 0x11 + +#define BCM56968_DEVICE_ID 0xb968 +#define BCM56968_A0_REV_ID 1 +#define BCM56968_B0_REV_ID 0x11 +#define BCM56968_B1_REV_ID 0x12 + +#define BCM56160_DEVICE_ID 0xb160 +#define BCM56160_A0_REV_ID 1 +#define BCM56160_B0_REV_ID 0x11 +#define BCM56162_DEVICE_ID 0xb162 +#define BCM56162_A0_REV_ID 1 +#define BCM56162_B0_REV_ID 0x11 + +#define BCM56163_DEVICE_ID 0xb163 +#define BCM56163_A0_REV_ID 1 +#define BCM56163_B0_REV_ID 0x11 +#define BCM56164_DEVICE_ID 0xb164 +#define BCM56164_A0_REV_ID 1 +#define BCM56164_B0_REV_ID 0x11 +#define BCM56166_DEVICE_ID 0xb166 +#define BCM56166_A0_REV_ID 1 +#define BCM56166_B0_REV_ID 0x11 + +#define BCM56273_DEVICE_ID 0xb273 +#define BCM56273_A0_REV_ID 1 +#define BCM56273_A1_REV_ID 2 + +#define BCM56274_DEVICE_ID 0xb274 +#define BCM56274_A0_REV_ID 1 +#define BCM56274_A1_REV_ID 2 + +#define BCM56275_DEVICE_ID 0xb275 +#define BCM56275_A0_REV_ID 1 +#define BCM56275_A1_REV_ID 2 + +#define BCM56276_DEVICE_ID 0xb276 +#define BCM56276_A0_REV_ID 1 +#define BCM56276_A1_REV_ID 2 + +#define BCM56277_DEVICE_ID 0xb277 +#define BCM56277_A0_REV_ID 1 +#define BCM56277_A1_REV_ID 2 + +#define BCM56278_DEVICE_ID 0xb278 +#define BCM56278_A0_REV_ID 1 +#define BCM56278_A1_REV_ID 2 + +#define BCM56279_DEVICE_ID 0xb279 +#define BCM56279_A1_REV_ID 2 + +#define BCM56575_DEVICE_ID 0xb575 +#define BCM56575_A1_REV_ID 2 + +#define BCM56175_DEVICE_ID 0xb175 +#define BCM56175_A1_REV_ID 2 + +#define BCM56176_DEVICE_ID 0xb176 +#define BCM56176_A1_REV_ID 2 + +#define BCM53440_DEVICE_ID 0x8440 +#define BCM53440_A0_REV_ID 1 +#define BCM53440_B0_REV_ID 0x11 +#define BCM53442_DEVICE_ID 0x8442 +#define BCM53442_A0_REV_ID 1 +#define BCM53442_B0_REV_ID 0x11 +#define BCM53443_DEVICE_ID 0x8443 +#define BCM53443_A0_REV_ID 1 +#define BCM53443_B0_REV_ID 0x11 + +#define BCM53434_DEVICE_ID 0x8434 +#define BCM53434_A0_REV_ID 1 +#define BCM53434_B0_REV_ID 0x11 + +#define BCM56560_DEVICE_ID 0xb560 +#define BCM56560_A0_REV_ID 1 +#define BCM56560_B0_REV_ID 0x11 + +#define BCM56561_DEVICE_ID 0xb561 +#define BCM56561_A0_REV_ID 1 +#define BCM56561_B0_REV_ID 0x11 + +#define BCM56562_DEVICE_ID 0xb562 +#define BCM56562_A0_REV_ID 1 +#define BCM56562_B0_REV_ID 0x11 + +#define BCM56670_DEVICE_ID 0xb670 +#define BCM56670_A0_REV_ID 1 +#define BCM56670_B0_REV_ID 0x11 +#define BCM56670_C0_REV_ID 0x21 + + +#define BCM56671_DEVICE_ID 0xb671 +#define BCM56671_A0_REV_ID 1 +#define BCM56671_B0_REV_ID 0x11 +#define BCM56671_C0_REV_ID 0x21 + +#define BCM56672_DEVICE_ID 0xb672 +#define BCM56672_A0_REV_ID 1 +#define BCM56672_B0_REV_ID 0x11 +#define BCM56672_C0_REV_ID 0x21 + +#define BCM56675_DEVICE_ID 0xb675 +#define BCM56675_A0_REV_ID 1 +#define BCM56675_B0_REV_ID 0x11 +#define BCM56675_C0_REV_ID 0x21 + +#define BCM53650_DEVICE_ID 0x8650 +#define BCM53650_A0_REV_ID 1 +#define BCM53650_B0_REV_ID 0x11 +#define BCM53650_C0_REV_ID 0x21 + +#define BCM53651_DEVICE_ID 0x8651 +#define BCM53651_A0_REV_ID 1 +#define BCM53651_B0_REV_ID 0x11 +#define BCM53651_C0_REV_ID 0x21 + +#define BCM53652_DEVICE_ID 0x8652 +#define BCM53652_A0_REV_ID 1 +#define BCM53652_B0_REV_ID 0x11 +#define BCM53652_C0_REV_ID 0x21 + +#define BCM53653_DEVICE_ID 0x8653 +#define BCM53653_A0_REV_ID 1 +#define BCM53653_B0_REV_ID 0x11 +#define BCM53653_C0_REV_ID 0x21 + +#define BCM56565_DEVICE_ID 0xb565 +#define BCM56565_A0_REV_ID 1 +#define BCM56565_B0_REV_ID 0x11 + +#define BCM56566_DEVICE_ID 0xb566 +#define BCM56566_A0_REV_ID 1 +#define BCM56566_B0_REV_ID 0x11 + +#define BCM56567_DEVICE_ID 0xb567 +#define BCM56567_A0_REV_ID 1 +#define BCM56567_B0_REV_ID 0x11 + +#define BCM56568_DEVICE_ID 0xb568 +#define BCM56568_A0_REV_ID 1 +#define BCM56568_B0_REV_ID 0x11 + +#define BCM56760_DEVICE_ID 0xb760 +#define BCM56760_A0_REV_ID 1 +#define BCM56760_A1_REV_ID 2 +#define BCM56760_B0_REV_ID 0x11 + + +#define BCM56761_DEVICE_ID 0xb761 +#define BCM56761_A0_REV_ID 1 +#define BCM56761_A1_REV_ID 2 +#define BCM56761_B0_REV_ID 0x11 +#define BCM56761_B1_REV_ID 0x12 + +#define BCM56762_DEVICE_ID 0xb762 +#define BCM56762_A0_REV_ID 1 +#define BCM56762_B0_REV_ID 0x11 + +#define BCM56764_DEVICE_ID 0xb764 +#define BCM56764_A0_REV_ID 1 +#define BCM56764_B0_REV_ID 0x11 + +#define BCM56765_DEVICE_ID 0xb765 +#define BCM56765_A0_REV_ID 1 +#define BCM56765_B0_REV_ID 0x11 + +#define BCM56766_DEVICE_ID 0xb766 +#define BCM56766_A0_REV_ID 1 +#define BCM56766_B0_REV_ID 0x11 + +#define BCM56768_DEVICE_ID 0xb768 +#define BCM56768_A0_REV_ID 1 +#define BCM56768_B0_REV_ID 0x11 + +#define BCM56068_DEVICE_ID 0xb068 +#define BCM56068_A0_REV_ID 1 +#define BCM56068_B0_REV_ID 0x11 +#define BCM56068_B1_REV_ID 0x12 + +#define BCM56069_DEVICE_ID 0xb069 +#define BCM56069_A0_REV_ID 1 +#define BCM56069_B0_REV_ID 0x11 + +#define BCM56170_DEVICE_ID 0xb170 +#define BCM56170_A0_REV_ID 1 +#define BCM56170_B0_REV_ID 0x11 +#define BCM56172_DEVICE_ID 0xb172 +#define BCM56172_A0_REV_ID 1 +#define BCM56172_B0_REV_ID 0x11 +#define BCM56174_DEVICE_ID 0xb174 +#define BCM56174_A0_REV_ID 1 +#define BCM56174_B0_REV_ID 0x11 + +#define BCM53570_DEVICE_ID 0x8570 +#define BCM53570_A0_REV_ID 1 +#define BCM53570_B0_REV_ID 0x11 +#define BCM53575_DEVICE_ID 0x8575 +#define BCM53575_A0_REV_ID 1 +#define BCM53575_B0_REV_ID 0x11 + +#define BCM56070_DEVICE_ID 0xb070 +#define BCM56070_A0_REV_ID 1 +#define BCM56071_DEVICE_ID 0xb071 +#define BCM56071_A0_REV_ID 1 +#define BCM56072_DEVICE_ID 0xb072 +#define BCM56072_A0_REV_ID 1 + + +#define BCM56965_DEVICE_ID 0xb965 +#define BCM56965_A0_REV_ID 1 +#define BCM56965_A1_REV_ID 2 +#define BCM56969_DEVICE_ID 0xb969 +#define BCM56969_A0_REV_ID 1 +#define BCM56966_DEVICE_ID 0xb966 +#define BCM56966_A0_REV_ID 1 +#define BCM56967_DEVICE_ID 0xb967 +#define BCM56967_A0_REV_ID 1 + +#define BCM56970_DEVICE_ID 0xb970 +#define BCM56970_A0_REV_ID 1 +#define BCM56970_B0_REV_ID 0x11 +#define BCM56971_DEVICE_ID 0xb971 +#define BCM56971_A0_REV_ID 1 +#define BCM56971_B0_REV_ID 0x11 +#define BCM56972_DEVICE_ID 0xb972 +#define BCM56972_A0_REV_ID 1 +#define BCM56972_B0_REV_ID 0x11 +#define BCM56974_DEVICE_ID 0xb974 +#define BCM56974_A0_REV_ID 1 +#define BCM56974_B0_REV_ID 0x11 +#define BCM56975_DEVICE_ID 0xb975 +#define BCM56975_A0_REV_ID 1 +#define BCM56975_B0_REV_ID 0x11 + +#define BCM56870_DEVICE_ID 0xb870 +#define BCM56870_A0_REV_ID 1 +#define BCM56873_DEVICE_ID 0xb873 +#define BCM56873_A0_REV_ID 1 + +#define BCM56370_DEVICE_ID 0xb370 +#define BCM56370_A0_REV_ID 1 +#define BCM56370_A1_REV_ID 0x02 +#define BCM56370_A2_REV_ID 0x03 + +#define BCM56371_DEVICE_ID 0xb371 +#define BCM56371_A0_REV_ID 1 +#define BCM56371_A1_REV_ID 0x02 +#define BCM56371_A2_REV_ID 0x03 + +#define BCM56372_DEVICE_ID 0xb372 +#define BCM56372_A0_REV_ID 1 +#define BCM56372_A1_REV_ID 0x02 +#define BCM56372_A2_REV_ID 0x03 + +#define BCM56374_DEVICE_ID 0xb374 +#define BCM56374_A0_REV_ID 1 +#define BCM56374_A1_REV_ID 0x02 +#define BCM56374_A2_REV_ID 0x03 + +#define BCM56375_DEVICE_ID 0xb375 +#define BCM56375_A0_REV_ID 1 +#define BCM56375_A1_REV_ID 0x02 +#define BCM56375_A2_REV_ID 0x03 + +#define BCM56376_DEVICE_ID 0xb376 +#define BCM56376_A0_REV_ID 1 +#define BCM56376_A1_REV_ID 0x02 +#define BCM56376_A2_REV_ID 0x03 + +#define BCM56377_DEVICE_ID 0xb377 +#define BCM56377_A0_REV_ID 1 +#define BCM56377_A1_REV_ID 0x02 +#define BCM56377_A2_REV_ID 0x03 + +#define BCM56577_DEVICE_ID 0xb577 +#define BCM56577_A0_REV_ID 1 +#define BCM56577_A1_REV_ID 0x02 +#define BCM56577_A2_REV_ID 0x03 + +#define BCM56578_DEVICE_ID 0xb578 +#define BCM56578_A0_REV_ID 1 +#define BCM56578_A1_REV_ID 0x02 +#define BCM56578_A2_REV_ID 0x03 + +#define BCM56579_DEVICE_ID 0xb579 +#define BCM56579_A0_REV_ID 1 +#define BCM56579_A1_REV_ID 0x02 +#define BCM56579_A2_REV_ID 0x03 + +#define BCM56770_DEVICE_ID 0xb770 +#define BCM56770_A0_REV_ID 1 + +#define BCM56771_DEVICE_ID 0xb771 +#define BCM56771_A0_REV_ID 1 + +#define BCM56470_DEVICE_ID 0xb470 +#define BCM56470_A0_REV_ID 1 +#define BCM56471_DEVICE_ID 0xb471 +#define BCM56471_A0_REV_ID 1 +#define BCM56472_DEVICE_ID 0xb472 +#define BCM56472_A0_REV_ID 1 +#define BCM56475_DEVICE_ID 0xb475 +#define BCM56475_A0_REV_ID 1 +#define BCM56474_DEVICE_ID 0xb474 +#define BCM56474_A0_REV_ID 1 + + +#define BCM53540_DEVICE_ID 0x8540 +#define BCM53540_A0_REV_ID 1 +#define BCM53547_DEVICE_ID 0x8547 +#define BCM53547_A0_REV_ID 1 +#define BCM53548_DEVICE_ID 0x8548 +#define BCM53548_A0_REV_ID 1 +#define BCM53549_DEVICE_ID 0x8549 +#define BCM53549_A0_REV_ID 1 + +#define BCM53642_DEVICE_ID 0x8642 +#define BCM53642_A0_REV_ID 1 + +#define BCM5665_DEVICE_ID 0x5665 +#define BCM5665_A0_REV_ID 1 +#define BCM5665_B0_REV_ID 0x11 + + +#define BCM5655_DEVICE_ID 0x5655 +#define BCM5655_A0_REV_ID 1 +#define BCM5655_B0_REV_ID 0x11 + + +#define BCM5650_DEVICE_ID 0x5650 +#define BCM5650_A0_REV_ID 1 +#define BCM5650_B0_REV_ID 0x11 +#define BCM5650_C0_REV_ID 0x21 + +#define BROADCOM_PHYID_HIGH 0x0040 + +#define ARAD_DEVICE_ID 0x8650 +#define ARAD_A0_REV_ID 0x0000 +#define ARAD_B0_REV_ID 0x0011 +#define ARAD_B1_REV_ID 0x0012 +#define BCM88770_DEVICE_ID 0x8770 +#define BCM88770_A1_REV_ID 0x0002 +#define BCM88773_DEVICE_ID 0x8773 +#define BCM88773_A1_REV_ID 0x0002 +#define BCM88774_DEVICE_ID 0x8774 +#define BCM88774_A1_REV_ID 0x0002 +#define BCM88775_DEVICE_ID 0x8775 +#define BCM88775_A1_REV_ID 0x0002 +#define BCM88776_DEVICE_ID 0x8776 +#define BCM88776_A1_REV_ID 0x0002 +#define BCM88777_DEVICE_ID 0x8777 +#define BCM88777_A1_REV_ID 0x0002 +#define BCM88950_DEVICE_ID 0x8950 +#define BCM88950_A0_REV_ID 0x0001 +#define BCM88950_A1_REV_ID 0x0002 +#define BCM88953_DEVICE_ID 0x8953 +#define BCM88953_A1_REV_ID 0x0002 +#define BCM88954_DEVICE_ID 0x8954 +#define BCM88954_A1_REV_ID 0x0002 +#define BCM88955_DEVICE_ID 0x8955 +#define BCM88955_A1_REV_ID 0x0002 +#define BCM88956_DEVICE_ID 0x8956 +#define BCM88956_A1_REV_ID 0x0002 +#define DNXC_A0_REV_ID 0x0001 +#define DNXC_A1_REV_ID 0x0002 +#define DNXC_A2_REV_ID 0x0003 +#define DNXC_B0_REV_ID 0x0011 +#define DNXC_B1_REV_ID 0x0012 +#define DNXC_DEVID_FAMILY_MASK 0xfff0 +#define BCM88790_DEVICE_ID 0x8790 +#define BCM88790_A0_REV_ID DNXC_A0_REV_ID +#define BCM88790_B0_REV_ID DNXC_B0_REV_ID +#define BCM88791_DEVICE_ID 0x8791 +#define BCM88792_DEVICE_ID 0x8792 +#define BCM88793_DEVICE_ID 0x8793 +#define BCM88794_DEVICE_ID 0x8794 +#define BCM88795_DEVICE_ID 0x8795 +#define BCM88796_DEVICE_ID 0x8796 +#define BCM88797_DEVICE_ID 0x8797 +#define BCM88798_DEVICE_ID 0x8798 +#define BCM88799_DEVICE_ID 0x8799 +#define BCM8879A_DEVICE_ID 0x879A +#define BCM8879B_DEVICE_ID 0x879B +#define BCM8879C_DEVICE_ID 0x879C +#define BCM8879D_DEVICE_ID 0x879D +#define BCM8879E_DEVICE_ID 0x879E +#define BCM8879F_DEVICE_ID 0x879F +#ifdef BCM_DNXF3_SUPPORT +#define RAMON2_DEVICE_ID 0x8910 +#define BCM8891F_DEVICE_ID 0x891F +#define RAMON3_DEVICE_ID 0x8920 +#endif +#define ARADPLUS_DEVICE_ID 0x8660 +#define ARADPLUS_A0_REV_ID 0x0001 +#define BCM88660_DEVICE_ID ARADPLUS_DEVICE_ID +#define BCM88660_A0_REV_ID ARADPLUS_A0_REV_ID +#define JERICHO_DEVICE_ID 0x8675 +#define JERICHO_A0_REV_ID 0x0001 +#define JERICHO_B0_REV_ID 0x0011 +#define JERICHO_A1_REV_ID 0x0002 +#define BCM88670_DEVICE_ID 0x8670 +#define BCM88670_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88670_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88671_DEVICE_ID 0x8671 +#define BCM88671_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88671_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88671M_DEVICE_ID 0x867A +#define BCM88671M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88671M_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88670_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88671_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88671M_B0_REV_ID JERICHO_B0_REV_ID + +#define BCM88672_DEVICE_ID 0x8672 +#define BCM88672_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88672_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88672_B0_REV_ID JERICHO_B0_REV_ID + +#define BCM88673_DEVICE_ID 0x8673 +#define BCM88673_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88673_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88674_DEVICE_ID 0x8674 +#define BCM88674_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88674_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88675_DEVICE_ID JERICHO_DEVICE_ID +#define BCM88675_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88675_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88675M_DEVICE_ID 0x867B +#define BCM88675M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88675M_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88676_DEVICE_ID 0x8676 +#define BCM88676_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88676_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88676M_DEVICE_ID 0x867C +#define BCM88676M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88676M_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88677_DEVICE_ID 0x8677 +#define BCM88677_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88677_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88678_DEVICE_ID 0x8678 +#define BCM88678_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88678_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88679_DEVICE_ID 0x8679 +#define BCM88679_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88679_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88673_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88674_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88675_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88675M_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88676_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88676M_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88677_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88678_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88679_B0_REV_ID JERICHO_B0_REV_ID +#define QMX_DEVICE_ID 0x8375 +#define QMX_A0_REV_ID 0x0001 +#define QMX_B0_REV_ID 0x0011 +#define QMX_A1_REV_ID 0x0002 +#define BCM88370_DEVICE_ID 0x8370 +#define BCM88370_A0_REV_ID QMX_A0_REV_ID +#define BCM88370_A1_REV_ID QMX_A1_REV_ID +#define BCM88371_DEVICE_ID 0x8371 +#define BCM88371_A0_REV_ID QMX_A0_REV_ID +#define BCM88371_A1_REV_ID QMX_A1_REV_ID +#define BCM88371M_DEVICE_ID 0x837A +#define BCM88371M_A0_REV_ID QMX_A0_REV_ID +#define BCM88371M_A1_REV_ID QMX_A1_REV_ID +#define BCM88375_DEVICE_ID QMX_DEVICE_ID +#define BCM88375_A0_REV_ID QMX_A0_REV_ID +#define BCM88375_A1_REV_ID QMX_A1_REV_ID +#define BCM88376_DEVICE_ID 0x8376 +#define BCM88376_A0_REV_ID QMX_A0_REV_ID +#define BCM88376_A1_REV_ID QMX_A1_REV_ID +#define BCM88376M_DEVICE_ID 0x837B +#define BCM88376M_A0_REV_ID QMX_A0_REV_ID +#define BCM88376M_A1_REV_ID QMX_A1_REV_ID +#define BCM88377_DEVICE_ID 0x8377 +#define BCM88377_A0_REV_ID QMX_A0_REV_ID +#define BCM88377_A1_REV_ID QMX_A1_REV_ID +#define BCM88378_DEVICE_ID 0x8378 +#define BCM88378_A0_REV_ID QMX_A0_REV_ID +#define BCM88378_A1_REV_ID QMX_A1_REV_ID +#define BCM88379_DEVICE_ID 0x8379 +#define BCM88379_A0_REV_ID QMX_A0_REV_ID +#define BCM88379_A1_REV_ID QMX_A1_REV_ID + +#define BCM88370_B0_REV_ID QMX_B0_REV_ID +#define BCM88371_B0_REV_ID QMX_B0_REV_ID +#define BCM88371M_B0_REV_ID QMX_B0_REV_ID +#define BCM88375_B0_REV_ID QMX_B0_REV_ID +#define BCM88376_B0_REV_ID QMX_B0_REV_ID +#define BCM88376M_B0_REV_ID QMX_B0_REV_ID +#define BCM88377_B0_REV_ID QMX_B0_REV_ID +#define BCM88378_B0_REV_ID QMX_B0_REV_ID +#define BCM88379_B0_REV_ID QMX_B0_REV_ID + + +#define JERICHO_PLUS_DEVICE_ID 0x8680 +#define JERICHO_PLUS_A0_REV_ID 0x0001 +#define BCM88680_DEVICE_ID JERICHO_PLUS_DEVICE_ID +#define BCM88680_A0_REV_ID JERICHO_PLUS_A0_REV_ID +#define BCM88680_A1_REV_ID 0x0002 + + +#define BCM88681_DEVICE_ID 0x8681 +#define BCM88681_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88682_DEVICE_ID 0x8682 +#define BCM88682_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88683_DEVICE_ID 0x8683 +#define BCM88683_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88684_DEVICE_ID 0x8684 +#define BCM88684_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88685_DEVICE_ID 0x8685 +#define BCM88685_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88687_DEVICE_ID 0x8687 +#define BCM88687_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88380_DEVICE_ID 0x8380 +#define BCM88380_A0_REV_ID JERICHO_PLUS_A0_REV_ID +#define BCM88381_DEVICE_ID 0x8381 +#define BCM88381_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define JERICHO2_DEVICE_ID 0x8690 +#define JERICHO2_A0_REV_ID DNXC_A0_REV_ID +#define JERICHO2_B0_REV_ID DNXC_B0_REV_ID +#define JERICHO2_B1_REV_ID DNXC_B1_REV_ID +#define BCM88690_DEVICE_ID JERICHO2_DEVICE_ID +#define BCM88690_A0_REV_ID JERICHO2_A0_REV_ID +#define BCM88690_B0_REV_ID JERICHO2_B0_REV_ID +#define BCM88690_B1_REV_ID JERICHO2_B1_REV_ID +#define BCM88691_DEVICE_ID 0x8691 +#define BCM88692_DEVICE_ID 0x8692 +#define BCM88693_DEVICE_ID 0x8693 +#define BCM88694_DEVICE_ID 0x8694 +#define BCM88695_DEVICE_ID 0x8695 +#define BCM88696_DEVICE_ID 0x8696 +#define BCM88697_DEVICE_ID 0x8697 +#define BCM88698_DEVICE_ID 0x8698 +#define BCM88699_DEVICE_ID 0x8699 +#define BCM8869A_DEVICE_ID 0x869A +#define BCM8869B_DEVICE_ID 0x869B +#define BCM8869C_DEVICE_ID 0x869C +#define BCM8869D_DEVICE_ID 0x869D +#define BCM8869E_DEVICE_ID 0x869E +#define BCM8869F_DEVICE_ID 0x869F + +#define J2C_DEVICE_ID 0x8800 +#define J2C_2ND_DEVICE_ID 0x8820 +#define J2C_DEVID_FAMILY_MASK 0xffd0 +#define J2C_A0_REV_ID DNXC_A0_REV_ID +#define J2C_A1_REV_ID DNXC_A1_REV_ID +#define BCM88800_DEVICE_ID J2C_DEVICE_ID +#define BCM88820_DEVICE_ID J2C_2ND_DEVICE_ID +#define BCM88800_A0_REV_ID J2C_A0_REV_ID +#define BCM88800_A1_REV_ID J2C_A1_REV_ID +#define BCM88801_DEVICE_ID 0x8801 +#define BCM88802_DEVICE_ID 0x8802 +#define BCM88803_DEVICE_ID 0x8803 +#define BCM88804_DEVICE_ID 0x8804 +#define BCM88805_DEVICE_ID 0x8805 +#define BCM88806_DEVICE_ID 0x8806 +#define BCM88807_DEVICE_ID 0x8807 +#define BCM88808_DEVICE_ID 0x8808 +#define BCM88809_DEVICE_ID 0x8809 +#define BCM8880A_DEVICE_ID 0x880A +#define BCM8880B_DEVICE_ID 0x880B +#define BCM8880C_DEVICE_ID 0x880C +#define BCM8880D_DEVICE_ID 0x880D +#define BCM8880E_DEVICE_ID 0x880E +#define BCM8880F_DEVICE_ID 0x880F +#define BCM88821_DEVICE_ID 0x8821 +#define BCM88822_DEVICE_ID 0x8822 +#define BCM88823_DEVICE_ID 0x8823 +#define BCM88824_DEVICE_ID 0x8824 +#define BCM88825_DEVICE_ID 0x8825 +#define BCM88826_DEVICE_ID 0x8826 +#define BCM88827_DEVICE_ID 0x8827 +#define BCM88828_DEVICE_ID 0x8828 +#define BCM88829_DEVICE_ID 0x8829 +#define BCM8882A_DEVICE_ID 0x882A +#define BCM8882B_DEVICE_ID 0x882B +#define BCM8882C_DEVICE_ID 0x882C +#define BCM8882D_DEVICE_ID 0x882D +#define BCM8882E_DEVICE_ID 0x882E +#define BCM8882F_DEVICE_ID 0x882F + +#define J2P_DEVICE_ID 0x8850 +#define J2P_A0_REV_ID DNXC_A0_REV_ID +#define J2P_A1_REV_ID DNXC_A1_REV_ID +#define J2P_A2_REV_ID DNXC_A2_REV_ID +#define BCM88850_DEVICE_ID J2P_DEVICE_ID +#define BCM88850_A0_REV_ID J2P_A0_REV_ID +#define BCM88850_A1_REV_ID J2P_A1_REV_ID +#define BCM88850_A2_REV_ID J2P_A2_REV_ID +#define BCM88851_DEVICE_ID 0x8851 +#define BCM88852_DEVICE_ID 0x8852 +#define BCM88853_DEVICE_ID 0x8853 +#define BCM88854_DEVICE_ID 0x8854 +#define BCM88855_DEVICE_ID 0x8855 +#define BCM88856_DEVICE_ID 0x8856 +#define BCM88857_DEVICE_ID 0x8857 +#define BCM88858_DEVICE_ID 0x8858 +#define BCM88859_DEVICE_ID 0x8859 +#define BCM8885A_DEVICE_ID 0x885A +#define BCM8885B_DEVICE_ID 0x885B +#define BCM8885C_DEVICE_ID 0x885C +#define BCM8885D_DEVICE_ID 0x885D +#define BCM8885E_DEVICE_ID 0x885E +#define BCM8885F_DEVICE_ID 0x885F + +#define BCM88840_DEVICE_ID 0x8840 +#define BCM88841_DEVICE_ID 0x8841 +#define BCM88842_DEVICE_ID 0x8842 +#define BCM88843_DEVICE_ID 0x8843 +#define BCM88844_DEVICE_ID 0x8844 +#define BCM88845_DEVICE_ID 0x8845 +#define BCM88846_DEVICE_ID 0x8846 +#define BCM88847_DEVICE_ID 0x8847 +#define BCM88848_DEVICE_ID 0x8848 +#define BCM88849_DEVICE_ID 0x8849 +#define BCM8884A_DEVICE_ID 0x884A +#define BCM8884B_DEVICE_ID 0x884B +#define BCM8884C_DEVICE_ID 0x884C +#define BCM8884D_DEVICE_ID 0x884D +#define BCM8884E_DEVICE_ID 0x884E +#define BCM8884F_DEVICE_ID 0x884F + +#define BCM88810_DEVICE_ID 0x8810 +#define BCM88811_DEVICE_ID 0x8811 +#define BCM88812_DEVICE_ID 0x8812 +#define BCM88813_DEVICE_ID 0x8813 +#define BCM88814_DEVICE_ID 0x8814 +#define BCM88815_DEVICE_ID 0x8815 +#define BCM88816_DEVICE_ID 0x8816 +#define BCM88817_DEVICE_ID 0x8817 +#define BCM88818_DEVICE_ID 0x8818 +#define BCM88819_DEVICE_ID 0x8819 +#define BCM8881A_DEVICE_ID 0x881A +#define BCM8881B_DEVICE_ID 0x881B +#define BCM8881C_DEVICE_ID 0x881C +#define BCM8881D_DEVICE_ID 0x881D +#define BCM8881E_DEVICE_ID 0x881E +#define BCM8881F_DEVICE_ID 0x881F + +#define J2X_DEVICE_ID 0x8830 +#define J2X_A0_REV_ID DNXC_A0_REV_ID +#define BCM88830_DEVICE_ID J2X_DEVICE_ID +#define BCM88830_A0_REV_ID J2X_A0_REV_ID +#define BCM88831_DEVICE_ID 0x8831 +#define BCM88832_DEVICE_ID 0x8832 +#define BCM88833_DEVICE_ID 0x8833 +#define BCM88834_DEVICE_ID 0x8834 +#define BCM88835_DEVICE_ID 0x8835 +#define BCM88836_DEVICE_ID 0x8836 +#define BCM88837_DEVICE_ID 0x8837 +#define BCM88838_DEVICE_ID 0x8838 +#define BCM88839_DEVICE_ID 0x8839 +#define BCM8883A_DEVICE_ID 0x883A +#define BCM8883B_DEVICE_ID 0x883B +#define BCM8883C_DEVICE_ID 0x883C +#define BCM8883D_DEVICE_ID 0x883D +#define BCM8883E_DEVICE_ID 0x883E +#define BCM8883F_DEVICE_ID 0x883F + +#define J2Z_DEVICE_ID 0x216 +#define J2Z_A0_REV_ID DNXC_A0_REV_ID +#define BCM8216_DEVICE_ID J2Z_DEVICE_ID +#define BCM8216_A0_REV_ID J2Z_A0_REV_ID + +#ifdef BCM_DNX3_SUPPORT +#define JERICHO3_DEVICE_ID 0x8860 +#define Q3_DEVICE_ID_START 0x886a +#define Q3_DEVICE_ID_END 0x886f +#define J3AI_DEVICE_ID 0x8890 +#define Q3D_DEVICE_ID 0x8870 +#endif +#define Q2A_DEVICE_ID 0x8480 +#define Q2A_A0_REV_ID DNXC_A0_REV_ID +#define Q2A_B0_REV_ID DNXC_B0_REV_ID +#define Q2A_B1_REV_ID DNXC_B1_REV_ID +#define BCM88480_DEVICE_ID Q2A_DEVICE_ID +#define BCM88480_A0_REV_ID Q2A_A0_REV_ID +#define BCM88480_B0_REV_ID Q2A_B0_REV_ID +#define BCM88480_B1_REV_ID Q2A_B1_REV_ID +#define BCM88481_DEVICE_ID 0x8481 +#define BCM88482_DEVICE_ID 0x8482 +#define BCM88483_DEVICE_ID 0x8483 +#define BCM88484_DEVICE_ID 0x8484 +#define BCM88485_DEVICE_ID 0x8485 +#define BCM88486_DEVICE_ID 0x8486 +#define BCM88487_DEVICE_ID 0x8487 +#define BCM88488_DEVICE_ID 0x8488 +#define BCM88489_DEVICE_ID 0x8489 +#define BCM8848A_DEVICE_ID 0x848A +#define BCM8848B_DEVICE_ID 0x848B +#define BCM8848C_DEVICE_ID 0x848C +#define BCM8848D_DEVICE_ID 0x848D +#define BCM8848E_DEVICE_ID 0x848E +#define BCM8848F_DEVICE_ID 0x848F + +#define Q2U_DEVICE_ID 0x8280 +#define BCM88280_DEVICE_ID Q2U_DEVICE_ID +#define BCM88281_DEVICE_ID 0x8281 +#define BCM88282_DEVICE_ID 0x8282 +#define BCM88283_DEVICE_ID 0x8283 +#define BCM88284_DEVICE_ID 0x8284 +#define BCM88285_DEVICE_ID 0x8285 +#define BCM88286_DEVICE_ID 0x8286 +#define BCM88287_DEVICE_ID 0x8287 +#define BCM88288_DEVICE_ID 0x8288 +#define BCM88289_DEVICE_ID 0x8289 +#define BCM8828A_DEVICE_ID 0x828A +#define BCM8828B_DEVICE_ID 0x828B +#define BCM8828C_DEVICE_ID 0x828C +#define BCM8828D_DEVICE_ID 0x828D +#define BCM8828E_DEVICE_ID 0x828E +#define BCM8828F_DEVICE_ID 0x828F + +#define Q2N_DEVICE_ID 0x8290 +#define BCM88290_DEVICE_ID Q2N_DEVICE_ID +#define BCM88291_DEVICE_ID 0x8291 +#define BCM88292_DEVICE_ID 0x8292 +#define BCM88293_DEVICE_ID 0x8293 +#define BCM88294_DEVICE_ID 0x8294 +#define BCM88295_DEVICE_ID 0x8295 +#define BCM88296_DEVICE_ID 0x8296 +#define BCM88297_DEVICE_ID 0x8297 +#define BCM88298_DEVICE_ID 0x8298 +#define BCM88299_DEVICE_ID 0x8299 +#define BCM8829A_DEVICE_ID 0x829A +#define BCM8829B_DEVICE_ID 0x829B +#define BCM8829C_DEVICE_ID 0x829C +#define BCM8829D_DEVICE_ID 0x829D +#define BCM8829E_DEVICE_ID 0x829E +#define BCM8829F_DEVICE_ID 0x829F + +#define QAX_DEVICE_ID 0x8470 +#define QAX_A0_REV_ID 0x0001 +#define QAX_B0_REV_ID 0x0011 +#define BCM88470_DEVICE_ID QAX_DEVICE_ID +#define BCM88470_B0_REV_ID QAX_B0_REV_ID +#define BCM88470P_DEVICE_ID 0x847C +#define BCM88471_DEVICE_ID 0x8471 +#define BCM88473_DEVICE_ID 0x8473 +#define BCM88474_DEVICE_ID 0x8474 +#define BCM88474H_DEVICE_ID 0x847B +#define BCM88476_DEVICE_ID 0x8476 +#define BCM88477_DEVICE_ID 0x8477 + +#define BCM88479_DEVICE_ID 0x8479 + + + +#define BCM88470_A0_REV_ID QAX_A0_REV_ID + +#define QUX_DEVICE_ID 0x8270 +#define QUX_A0_REV_ID 0x0001 +#define QUX_A1_REV_ID 0x0002 +#define QUX_B0_REV_ID 0x0011 +#define BCM88270_DEVICE_ID QUX_DEVICE_ID +#define BCM88270_A0_REV_ID QUX_A0_REV_ID +#define BCM88270_A1_REV_ID QUX_A1_REV_ID +#define BCM88271_DEVICE_ID 0x8271 +#define BCM88272_DEVICE_ID 0x8272 +#define BCM88273_DEVICE_ID 0x8273 +#define BCM88274_DEVICE_ID 0x8274 +#define BCM88276_DEVICE_ID 0x8276 +#define BCM88278_DEVICE_ID 0x8278 +#define BCM88279_DEVICE_ID 0x8279 + +#define BCM88360_DEVICE_ID 0x8360 +#define BCM88360_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88361_DEVICE_ID 0x8361 +#define BCM88361_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88363_DEVICE_ID 0x8363 +#define BCM88363_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88460_DEVICE_ID 0x8460 +#define BCM88460_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88461_DEVICE_ID 0x8461 +#define BCM88461_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88560_DEVICE_ID 0x8560 +#define BCM88560_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88561_DEVICE_ID 0x8561 +#define BCM88561_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88562_DEVICE_ID 0x8562 +#define BCM88562_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88661_DEVICE_ID 0x8661 +#define BCM88661_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88664_DEVICE_ID 0x8664 +#define BCM88664_A0_REV_ID ARADPLUS_A0_REV_ID + + +#define BCM88350_DEVICE_ID 0x8350 +#define BCM88350_B1_REV_ID ARAD_B1_REV_ID +#define BCM88351_DEVICE_ID 0x8351 +#define BCM88351_B1_REV_ID ARAD_B1_REV_ID +#define BCM88450_DEVICE_ID 0x8450 +#define BCM88450_B1_REV_ID ARAD_B1_REV_ID +#define BCM88451_DEVICE_ID 0x8451 +#define BCM88451_B1_REV_ID ARAD_B1_REV_ID +#define BCM88550_DEVICE_ID 0x8550 +#define BCM88550_B1_REV_ID ARAD_B0_REV_ID +#define BCM88551_DEVICE_ID 0x8551 +#define BCM88551_B1_REV_ID ARAD_B1_REV_ID +#define BCM88552_DEVICE_ID 0x8552 +#define BCM88552_B1_REV_ID ARAD_B1_REV_ID + +#define BCM88772_DEVICE_ID 0x8772 +#define BCM88952_DEVICE_ID 0x8952 +#define BCM88772_A1_REV_ID 0x0002 +#define BCM88952_A0_REV_ID 0x0001 +#define BCM88952_A1_REV_ID 0x0002 + +#define PLX9056_DEVICE_ID 0x9056 + +#define BCM56890_DEVICE_ID 0xb890 +#define BCM56890_A0_REV_ID 0x0001 +#define BCM56891_DEVICE_ID 0xb891 +#define BCM56891_A0_REV_ID 0x0001 +#define BCM56892_DEVICE_ID 0xb892 +#define BCM56892_A0_REV_ID 0x0001 +#define BCM56895_DEVICE_ID 0xb895 +#define BCM56895_A0_REV_ID 0x0001 +#define BCM56896_DEVICE_ID 0xb896 +#define BCM56896_A0_REV_ID 0x0001 + +#define BCM56690_DEVICE_ID 0xb690 +#define BCM56690_A0_REV_ID 0x0001 +#define BCM56692_DEVICE_ID 0xb692 +#define BCM56692_A0_REV_ID 0x0001 + +#define BCM78800_DEVICE_ID 0xf800 +#define BCM78800_A0_REV_ID 0x0001 + +#define BCM56880_DEVICE_ID 0xb880 +#define BCM56880_A0_REV_ID 0x0001 +#define BCM56880_B0_REV_ID 0x0011 +#define BCM56881_DEVICE_ID 0xb881 +#define BCM56881_A0_REV_ID 0x0001 +#define BCM56881_B0_REV_ID 0x0011 +#define BCM56883_DEVICE_ID 0xb883 +#define BCM56883_A0_REV_ID 0x0001 +#define BCM56883_B0_REV_ID 0x0011 + +#define BCM56780_DEVICE_ID 0xb780 +#define BCM56780_A0_REV_ID 0x0001 +#define BCM56782_DEVICE_ID 0xb782 +#define BCM56782_A0_REV_ID 0x0001 +#define BCM56782_A1_REV_ID 0x0002 +#define BCM56784_DEVICE_ID 0xb784 +#define BCM56784_A0_REV_ID 0x0001 +#define BCM56785_DEVICE_ID 0xb785 +#define BCM56785_A0_REV_ID 0x0001 +#define BCM56786_DEVICE_ID 0xb786 +#define BCM56786_A0_REV_ID 0x0001 +#define BCM56786_A1_REV_ID 0x0002 +#define BCM56787_DEVICE_ID 0xb787 +#define BCM56787_A0_REV_ID 0x0001 +#define BCM56787_A1_REV_ID 0x0002 +#define BCM56788_DEVICE_ID 0xb788 +#define BCM56788_A0_REV_ID 0x0001 +#define BCM56788_A1_REV_ID 0x0002 +#define BCM56789_DEVICE_ID 0xb789 +#define BCM56789_A0_REV_ID 0x0001 +#define BCM56089_DEVICE_ID 0xb089 +#define BCM56089_A0_REV_ID 0x0001 +#define BCM56089_A1_REV_ID 0x0002 + +#define BCM56990_DEVICE_ID 0xb990 +#define BCM56990_A0_REV_ID 0x0001 + +#ifndef BCM56990_DEVICE_ID +#define BCM56990_DEVICE_ID 0xb990 +#define BCM56990_A0_REV_ID 0x0001 +#endif +#define BCM56990_B0_REV_ID 0x0011 +#define BCM56991_DEVICE_ID 0xb991 +#define BCM56991_B0_REV_ID 0x0011 +#define BCM56992_DEVICE_ID 0xb992 +#define BCM56992_B0_REV_ID 0x0011 +#define BCM56993_DEVICE_ID 0xb993 +#define BCM56993_B0_REV_ID 0x0011 + +#define BCM56996_DEVICE_ID 0xb996 +#define BCM56996_A0_REV_ID 0x0001 +#define BCM56997_DEVICE_ID 0xb997 +#define BCM56997_A0_REV_ID 0x0001 + +#ifndef BCM56996_DEVICE_ID +#define BCM56996_DEVICE_ID 0xb996 +#define BCM56996_A0_REV_ID 0x0001 +#define BCM56997_DEVICE_ID 0xb997 +#endif +#define BCM56996_B0_REV_ID 0x0011 +#define BCM56997_B0_REV_ID 0x0011 + +#define BCM56998_DEVICE_ID 0xb998 +#define BCM56998_A0_REV_ID 0x0001 + +#define BCM56999_DEVICE_ID 0xb999 +#define BCM56999_A0_REV_ID 0x0001 +#define BCM56999_B0_REV_ID 0x0011 +#define BCM56995_DEVICE_ID 0xb995 +#define BCM56995_A0_REV_ID 0x0001 +#define BCM56995_B0_REV_ID 0x0011 + +#define BCM78900_DEVICE_ID 0xf900 +#define BCM78900_B0_REV_ID 0x0011 + +#define BCM78902_DEVICE_ID 0xf902 +#define BCM78902_B0_REV_ID 0x0011 + +#define BCM78903_DEVICE_ID 0xf903 +#define BCM78903_B0_REV_ID 0x0011 + +#define BCM78905_DEVICE_ID 0xf905 +#define BCM78905_A0_REV_ID 0x0001 + +#define BCM56080_DEVICE_ID 0xb080 +#define BCM56080_A0_REV_ID 0x0001 +#define BCM56080_A1_REV_ID 0x0002 +#define BCM56081_DEVICE_ID 0xb081 +#define BCM56081_A0_REV_ID 0x0001 +#define BCM56081_A1_REV_ID 0x0002 +#define BCM56082_DEVICE_ID 0xb082 +#define BCM56082_A0_REV_ID 0x0001 +#define BCM56082_A1_REV_ID 0x0002 +#define BCM56083_DEVICE_ID 0xb083 +#define BCM56083_A0_REV_ID 0x0001 +#define BCM56083_A1_REV_ID 0x0002 +#define BCM56084_DEVICE_ID 0xb084 +#define BCM56084_A0_REV_ID 0x0001 +#define BCM56084_A1_REV_ID 0x0002 +#define BCM56085_DEVICE_ID 0xb085 +#define BCM56085_A0_REV_ID 0x0001 +#define BCM56085_A1_REV_ID 0x0002 + +#endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h new file mode 100644 index 000000000000..4971666577e9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h @@ -0,0 +1,40 @@ +/* + * $Id:$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: drv.h + * Purpose: Driver definitions + */ + +#ifndef _SOC_DRV_H_ +#define _SOC_DRV_H_ + +/* DCB Library */ +#include + +#endif /* _SOC_DRV_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h new file mode 100644 index 000000000000..849c7e7f80ec --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h @@ -0,0 +1,31 @@ +/* + * $Id:$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * Stub header file + */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h new file mode 100644 index 000000000000..d9c096c3bd13 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h @@ -0,0 +1,1022 @@ +/* + * $Id: higig.h,v 1.29 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: higig.h + */ + +#include +#include + +#ifndef _SOC_HIGIG_H +#define _SOC_HIGIG_H + +#if defined(BCM_XGS_SUPPORT) || defined(BCM_PETRA_SUPPORT) || defined(BCM_DNX_SUPPORT) + +/**************************************************************************** + * Higig Header Format + * + * On BCM5670/BCM5675 (Hercules/Hercules1.5), to send or receive packets + * on an HG port, the following HIGIG header is always prepended to + * an UNTAGGED ethernet frame. + * + * ANSI only permits signed or unsigned int for bit field type. This + * structure will only work for compilers for which uint32 is unsigned + * int, and which completely pack bit fields beginning at the MSbit for + * big-endian machines and at the LSbit for little-endian machines. + * + * NOTE: these structures already put the the individual bytes in memory + * in big endian order for both big- and little-endian machines, so no + * further swapping is required. + ***************************************************************************/ + +typedef union soc_higig_hdr_u { + struct { + uint8 bytes[12]; + } overlay0; + +#if defined(LE_HOST) + + struct { /* Byte # */ + uint32 start:8; /* 0 */ + uint32 hgi:8; /* 1 */ + uint32 vlan_id_hi:4; /* 2 */ + uint32 vlan_cfi:1; + uint32 vlan_pri:3; + uint32 vlan_id_lo:8; /* 3 */ + uint32 opcode:3; /* 4 */ + uint32 src_mod:5; + uint32 src_port:6; /* 5 */ + uint32 pfm:2; + uint32 cos:3; /* 6 */ + uint32 dst_port:5; + uint32 dst_mod:5; /* 7 */ + uint32 cng:1; + uint32 hdr_format:2; + uint32 mirror:1; /* 8 */ + uint32 mirror_done:1; + uint32 mirror_only:1; + uint32 ingress_tagged:1; + uint32 dst_tgid:3; + uint32 dst_t:1; + uint32 _rsvd1:8; /* 9 */ + uint32 _rsvd2:8; /* 10 */ + uint32 _rsvd3:8; /* 11 */ + } overlay1; + + struct { /* Byte # */ + uint32 _rsvd1:8; /* 0 */ + uint32 _rsvd2:8; /* 1 */ + uint32 _rsvd3:8; /* 2 */ + uint32 _rsvd4:8; /* 3 */ + uint32 _rsvd5:8; /* 4 */ + uint32 tgid:6; /* 5 */ + uint32 _rsvd6:2; + uint32 _rsvd7:3; /* 6 */ + uint32 l2mc_ptr_lo:5; + uint32 l2mc_ptr_hi:5; /* 7 */ + uint32 _rsvd8:3; + uint32 ctag_hi:8; /* 8 */ + uint32 ctag_lo:8; /* 9 */ + uint32 _rsvd9:8; /* 10 */ + uint32 _rsvd10:8; /* 11 */ + } overlay2; + + struct { /* Byte # */ + uint32 start:8; /* 0 */ + uint32 dst_mod_6:1; /* 1 */ + uint32 src_mod_6:1; + uint32 hdr_ext_len:3; + uint32 cng_hi:1; + uint32 hgi:2; + uint32 vlan_id_hi:4; /* 2 */ + uint32 vlan_cfi:1; + uint32 vlan_pri:3; + uint32 vlan_id_lo:8; /* 3 */ + uint32 opcode:3; /* 4 */ + uint32 src_mod:5; + uint32 src_port:6; /* 5 */ + uint32 pfm:2; + uint32 cos:3; /* 6 */ + uint32 dst_port:5; + uint32 dst_mod:5; /* 7 */ + uint32 cng:1; + uint32 hdr_format:2; + uint32 mirror:1; /* 8 */ + uint32 mirror_done:1; + uint32 mirror_only:1; + uint32 ingress_tagged:1; + uint32 dst_tgid:3; + uint32 dst_t:1; + uint32 vc_label_19_16:4; /* 9 */ + uint32 label_present:1; + uint32 l3:1; + uint32 dst_mod_5:1; + uint32 src_mod_5:1; + uint32 vc_label_15_8:8; /* 10 */ + uint32 vc_label_7_0:8; /* 11 */ + } hgp_overlay1; + + struct { /* Byte # */ + uint32 start:8; /* 0 */ + uint32 dst_mod_6:1; /* 1 */ + uint32 src_mod_6:1; + uint32 hdr_ext_len:3; + uint32 cng_hi:1; + uint32 hgi:2; + uint32 vlan_id_hi:4; /* 2 */ + uint32 vlan_cfi:1; + uint32 vlan_pri:3; + uint32 vlan_id_lo:8; /* 3 */ + uint32 opcode:3; /* 4 */ + uint32 src_mod:5; + uint32 src_port:6; /* 5 */ + uint32 pfm:2; + uint32 cos:3; /* 6 */ + uint32 dst_port:5; + uint32 dst_mod:5; /* 7 */ + uint32 cng:1; + uint32 hdr_format:2; + uint32 mirror:1; /* 8 */ + uint32 mirror_done:1; + uint32 mirror_only:1; + uint32 ingress_tagged:1; + uint32 lag_failover:1; + uint32 donot_learn:1; + uint32 donot_modify:1; + uint32 dst_t:1; + uint32 vc_label_19_16:4; /* 9 */ + uint32 label_present:1; + uint32 l3:1; + uint32 dst_mod_5:1; + uint32 src_mod_5:1; + uint32 vc_label_15_8:8; /* 10 */ + uint32 vc_label_7_0:8; /* 11 */ + } hgp_overlay2; + +#else /* !LE_HOST */ + + struct { /* Byte # */ + uint32 start:8; /* 0 */ + uint32 hgi:8; /* 1 */ + uint32 vlan_pri:3; /* 2 */ + uint32 vlan_cfi:1; + uint32 vlan_id_hi:4; + uint32 vlan_id_lo:8; /* 3 */ + uint32 src_mod:5; /* 4 */ + uint32 opcode:3; + uint32 pfm:2; /* 5 */ + uint32 src_port:6; + uint32 dst_port:5; /* 6 */ + uint32 cos:3; + uint32 hdr_format:2; /* 7 */ + uint32 cng:1; + uint32 dst_mod:5; + uint32 dst_t:1; /* 8 */ + uint32 dst_tgid:3; + uint32 ingress_tagged:1; + uint32 mirror_only:1; + uint32 mirror_done:1; + uint32 mirror:1; + uint32 _rsvd1:8; /* 9 */ + uint32 _rsvd2:8; /* 10 */ + uint32 _rsvd3:8; /* 11 */ + } overlay1; + + struct { /* Byte # */ + uint32 _rsvd1:8; /* 0 */ + uint32 _rsvd2:8; /* 1 */ + uint32 _rsvd3:8; /* 2 */ + uint32 _rsvd4:8; /* 3 */ + uint32 _rsvd5:8; /* 4 */ + uint32 _rsvd6:2; /* 5 */ + uint32 tgid:6; + uint32 l2mc_ptr_lo:5; /* 6 */ + uint32 _rsvd7:3; + uint32 _rsvd8:3; /* 7 */ + uint32 l2mc_ptr_hi:5; + uint32 ctag_hi:8; /* 8 */ + uint32 ctag_lo:8; /* 9 */ + uint32 _rsvd9:8; /* 10 */ + uint32 _rsvd10:8; /* 11 */ + } overlay2; + + struct { /* Byte # */ + uint32 start:8; /* 0 */ + uint32 hgi:2; /* 1 */ + uint32 cng_hi:1; + uint32 hdr_ext_len:3; + uint32 src_mod_6:1; + uint32 dst_mod_6:1; + uint32 vlan_pri:3; /* 2 */ + uint32 vlan_cfi:1; + uint32 vlan_id_hi:4; + uint32 vlan_id_lo:8; /* 3 */ + uint32 src_mod:5; /* 4 */ + uint32 opcode:3; + uint32 pfm:2; /* 5 */ + uint32 src_port:6; + uint32 dst_port:5; /* 6 */ + uint32 cos:3; + uint32 hdr_format:2; /* 7 */ + uint32 cng:1; + uint32 dst_mod:5; + uint32 dst_t:1; /* 8 */ + uint32 dst_tgid:3; + uint32 ingress_tagged:1; + uint32 mirror_only:1; + uint32 mirror_done:1; + uint32 mirror:1; + uint32 src_mod_5:1; /* 9 */ + uint32 dst_mod_5:1; + uint32 l3:1; + uint32 label_present:1; + uint32 vc_label_19_16:4; + uint32 vc_label_15_8:8; /* 10 */ + uint32 vc_label_7_0:8; /* 11 */ + } hgp_overlay1; + + struct { /* Byte # */ + uint32 start:8; /* 0 */ + uint32 hgi:2; /* 1 */ + uint32 cng_hi:1; + uint32 hdr_ext_len:3; + uint32 src_mod_6:1; + uint32 dst_mod_6:1; + uint32 vlan_pri:3; /* 2 */ + uint32 vlan_cfi:1; + uint32 vlan_id_hi:4; + uint32 vlan_id_lo:8; /* 3 */ + uint32 src_mod:5; /* 4 */ + uint32 opcode:3; + uint32 pfm:2; /* 5 */ + uint32 src_port:6; + uint32 dst_port:5; /* 6 */ + uint32 cos:3; + uint32 hdr_format:2; /* 7 */ + uint32 cng:1; + uint32 dst_mod:5; + uint32 dst_t:1; /* 8 */ + uint32 donot_modify:1; + uint32 donot_learn:1; + uint32 lag_failover:1; + uint32 ingress_tagged:1; + uint32 mirror_only:1; + uint32 mirror_done:1; + uint32 mirror:1; + uint32 src_mod_5:1; /* 9 */ + uint32 dst_mod_5:1; + uint32 l3:1; + uint32 label_present:1; + uint32 vc_label_19_16:4; + uint32 vc_label_15_8:8; /* 10 */ + uint32 vc_label_7_0:8; /* 11 */ + } hgp_overlay2; + +#endif /* !LE_HOST */ + +} soc_higig_hdr_t; + +#define SOC_HIGIG_HDR_SIZE ((int) sizeof(soc_higig_hdr_t)) + +/* + * Higig Header Field Manipulation + */ + +typedef enum { + /* NOTE: strings in soc_higig_field_names[] must match */ + HG_invalid = -1, + HG_start = 0, + HG_hgi, + HG_vlan_tag, /* aggregate of pri, cfi, and id */ + HG_vlan_pri, + HG_vlan_cfi, + HG_vlan_id, + HG_src_mod, + HG_opcode, + HG_pfm, + HG_src_port, + HG_dst_port, + HG_cos, + HG_hdr_format, + HG_cng, + HG_dst_mod, + HG_dst_t, + HG_dst_tgid, + HG_ingress_tagged, + HG_mirror_only, + HG_mirror_done, + HG_mirror, + HG_tgid, + HG_l2mc_ptr, + HG_ctag, + HG_hdr_ext_len, /* HG+ fields */ + HG_l3, + HG_donot_modify, + HG_donot_learn, + HG_lag_failover, + HG_label_present, + HG_vc_label, +#if defined(BCM_HIGIG2_SUPPORT) + HG_tc, /* HG2 fields */ + HG_mcst, + HG_mgid, + HG_lbid, + HG_dp, + HG_ehv, + HG_ppd_type, + HG_src_t, + HG_multipoint, + HG_fwd_type, + HG_dst_vp, + HG_src_vp, + HG_vni, + HG_data_container_type, + HG_data_container, + HG_preserve_dscp, + HG_preserve_dot1p, + HG_dst_type, + HG_src_type, + HG_deferred_drop, + HG_vxlt_done, + HG_deferred_change_pkt_pri, + HG_new_pkt_pri, + HG_deferred_change_dscp, + HG_new_dscp, + HG_label_overlay_type, + HG_protection_status, + HG_replication_id, + HG_ether_type, + HG_class_id, + HG_cn, + HG_sw_gen, +#endif /* BCM_HIGIG2_SUPPORT */ + HG_COUNT +} soc_higig_field_t; + +#if defined(BCM_HIGIG2_SUPPORT) +#define SOC_HIGIG2_FIELD_NAMES_INIT \ + "tc", /* HG2 fields */ \ + "mcst", \ + "mgid", \ + "lbid", \ + "dp", \ + "ehv", \ + "ppd_type", \ + "src_t", \ + "multipoint", \ + "fwd_type", \ + "dst_vp", \ + "src_vp", \ + "vni", \ + "data_container_type", \ + "data_container", \ + "preserve_dscp", \ + "preserve_dot1p", \ + "dst_type", \ + "src_type", \ + "deferred_drop", \ + "vxlt_done", \ + "deferred_change_pkt_pri", \ + "new_pkt_pri", \ + "deferred_change_dscp", \ + "new_dscp", \ + "label_overlay_type", \ + "protection_status", \ + "replication_id", \ + "ether_type", \ + "class_id", \ + "cn", \ + "sw_gen", +#else +#define SOC_HIGIG2_FIELD_NAMES_INIT +#endif /* BCM_HIGIG2_SUPPORT */ + +/* NOTE: strings must match soc_higig_field_t */ +#define SOC_HIGIG_FIELD_NAMES_INIT \ + "start", \ + "hgi", \ + "vlan_tag", \ + "vlan_pri", \ + "vlan_cfi", \ + "vlan_id", \ + "src_mod", \ + "opcode", \ + "pfm", \ + "src_port", \ + "dst_port", \ + "cos", \ + "hdr_format", \ + "cng", \ + "dst_mod", \ + "dst_t", \ + "dst_tgid", \ + "ingress_tagged", \ + "mirror_only", \ + "mirror_done", \ + "mirror", \ + "tgid", \ + "l2mc_ptr", \ + "ctag", \ + "hdr_ext_len", /* HG+ fields */ \ + "l3", \ + "donot_modify", \ + "donot_learn", \ + "lag_failover", \ + "label_present", \ + "vc_label", \ + SOC_HIGIG2_FIELD_NAMES_INIT \ + NULL + +#ifdef BCM_HIGIG2_SUPPORT + +#define SOC_HIGIG2_START 0xfc /* Higig2 Module Header for CMIC TX */ + +typedef union soc_higig2_hdr_u { + struct { + uint8 bytes[16]; + } overlay0; + +#if defined(LE_HOST) + + struct { /* Byte # */ + /* "Legacy" PPD Overlay 1 */ + uint32 start:8; /* 0 */ + uint32 tc:4; /* 1 */ + uint32 mcst:1; + uint32 _rsvd1:3; + uint32 dst_mod:8; /* 2 */ + uint32 dst_port:8; /* 3 */ + uint32 src_mod:8; /* 4 */ + uint32 src_port:8; /* 5 */ + uint32 lbid:8; /* 6 */ + uint32 ppd_type:3; /* 7 */ + uint32 _rsvd2:2; + uint32 ehv:1; + uint32 dp:2; + uint32 mirror:1; /* 8 */ + uint32 mirror_done:1; + uint32 mirror_only:1; + uint32 ingress_tagged:1; + uint32 lag_failover:1; + uint32 donot_learn:1; + uint32 donot_modify:1; + uint32 dst_t:1; + uint32 vc_label_19_16:4; /* 9 */ + uint32 label_present:1; + uint32 l3:1; + uint32 label_overlay_type:2; + uint32 vc_label_15_8:8; /* 10 */ + uint32 vc_label_7_0:8; /* 11 */ + uint32 vlan_id_hi:4; /* 12 */ + uint32 vlan_cfi:1; + uint32 vlan_pri:3; + uint32 vlan_id_lo:8; /* 13 */ + uint32 opcode:3; /* 14 */ + uint32 preserve_dot1p:1; + uint32 preserve_dscp:1; + uint32 src_t:1; + uint32 pfm:2; + uint32 _rsvd5:5; /* 15 */ + uint32 hdr_ext_len:3; + } ppd_overlay1; + + struct { /* Byte # */ + /* "Legacy" PPD Overlay 2 */ + uint32 start:8; /* 0 */ + uint32 tc:4; /* 1 */ + uint32 mcst:1; + uint32 _rsvd1:3; + uint32 dst_mod:8; /* 2 */ + uint32 dst_port:8; /* 3 */ + uint32 src_mod:8; /* 4 */ + uint32 src_port:8; /* 5 */ + uint32 lbid:8; /* 6 */ + uint32 ppd_type:3; /* 7 */ + uint32 _rsvd2:2; + uint32 ehv:1; + uint32 dp:2; + uint32 ctag_hi:8; /* 8 */ + uint32 ctag_lo:8; /* 9 */ + uint32 _rsvd3:8; /* 10 */ + uint32 _rsvd4:8; /* 11 */ + uint32 vlan_id_hi:4; /* 12 */ + uint32 vlan_cfi:1; + uint32 vlan_pri:3; + uint32 vlan_id_lo:8; /* 13 */ + uint32 opcode:3; /* 14 */ + uint32 _rsvd5:2; + uint32 src_t:1; + uint32 pfm:2; + uint32 _rsvd6:5; /* 15 */ + uint32 hdr_ext_len:3; + } ppd_overlay2; + + struct { /* Byte # */ + /* "Next Gen" PPD Overlay 3 */ + uint32 start:8; /* 0 */ + uint32 tc:4; /* 1 */ + uint32 mcst:1; + uint32 _rsvd1:3; + uint32 dst_mod:8; /* 2 */ + uint32 dst_port:8; /* 3 */ + uint32 src_mod:8; /* 4 */ + uint32 src_port:8; /* 5 */ + uint32 lbid:8; /* 6 */ + uint32 ppd_type:3; /* 7 */ + uint32 _rsvd2:2; + uint32 ehv:1; + uint32 dp:2; + uint32 vni_mid:2; /* 8 */ + uint32 fwd_type:5; + uint32 multipoint:1; + uint32 vni_low:8; /* 9 */ + uint32 dst_vp_high:8; /* 10 */ + uint32 dst_vp_low:8; /* 11 */ + uint32 src_vp_high:8; /* 12 */ + uint32 src_vp_low:8; /* 13 */ + uint32 opcode:3; /* 14 */ + uint32 protection_status:1; + uint32 lag_failover:1; + uint32 donot_learn:1; + uint32 donot_modify:1; + uint32 mirror:1; + uint32 source_type:1; /* 15 */ + uint32 dest_type:1; + uint32 preserve_dot1p:1; + uint32 preserve_dscp:1; + uint32 vni_high:4; + } ppd_overlay3; + + struct { /* Byte # */ + /* "Offload Engine" PPD Overlay 4 */ + uint32 start:8; /* 0 */ + uint32 tc:4; /* 1 */ + uint32 mcst:1; + uint32 _rsvd1:3; + uint32 dst_mod:8; /* 2 */ + uint32 dst_port:8; /* 3 */ + uint32 src_mod:8; /* 4 */ + uint32 src_port:8; /* 5 */ + uint32 lbid:8; /* 6 */ + uint32 ppd_type:3; /* 7 */ + uint32 _rsvd2:2; + uint32 ehv:1; + uint32 dp:2; + + union { + /* The data container has several sub-formats */ + struct { /* Byte # */ + /* Abstract data container */ + uint8 bytes[4]; /* 8-11 */ + } abstract; + + struct { /* Byte # */ + uint32 ctag_hi:8; /* 8 */ + uint32 ctag_lo:8; /* 9 */ + uint32 deferred_change_dscp:1; /* 10 */ + uint32 new_pkt_pri:3; + uint32 deferred_change_pkt_pri:1; + uint32 vxlt_done:2; + uint32 deferred_drop:1; + uint32 _rsvd1:2; /* 11 */ + uint32 new_dscp:6; + } offload_engine; + } data_container; + + uint32 src_vp_high:8; /* 12 */ + uint32 src_vp_low:8; /* 13 */ + uint32 opcode:3; /* 14 */ + uint32 source_type:1; + uint32 _rsvd3:1; + uint32 donot_learn:1; + uint32 preserve_dot1p:1; + uint32 preserve_dscp:1; + uint32 data_container_type:4; /* 15 */ + uint32 _rsvd4:4; + } ppd_overlay4; + +#else /* !LE_HOST */ + + struct { /* Byte # */ + /* "Legacy" PPD Overlay 1 */ + uint32 start:8; /* 0 */ + uint32 _rsvd1:3; /* 1 */ + uint32 mcst:1; + uint32 tc:4; + uint32 dst_mod:8; /* 2 */ + uint32 dst_port:8; /* 3 */ + uint32 src_mod:8; /* 4 */ + uint32 src_port:8; /* 5 */ + uint32 lbid:8; /* 6 */ + uint32 dp:2; /* 7 */ + uint32 ehv:1; + uint32 _rsvd2:2; + uint32 ppd_type:3; + uint32 dst_t:1; /* 8 */ + uint32 donot_modify:1; + uint32 donot_learn:1; + uint32 lag_failover:1; + uint32 ingress_tagged:1; + uint32 mirror_only:1; + uint32 mirror_done:1; + uint32 mirror:1; + uint32 label_overlay_type:2; /* 9 */ + uint32 l3:1; + uint32 label_present:1; + uint32 vc_label_19_16:4; + uint32 vc_label_15_8:8; /* 10 */ + uint32 vc_label_7_0:8; /* 11 */ + uint32 vlan_pri:3; /* 12 */ + uint32 vlan_cfi:1; + uint32 vlan_id_hi:4; + uint32 vlan_id_lo:8; /* 13 */ + uint32 pfm:2; /* 14 */ + uint32 src_t:1; + uint32 preserve_dscp:1; + uint32 preserve_dot1p:1; + uint32 opcode:3; + uint32 hdr_ext_len:3; /* 15 */ + uint32 _rsvd5:5; + } ppd_overlay1; + + struct { /* Byte # */ + /* "Legacy" PPD Overlay 2 */ + uint32 start:8; /* 0 */ + uint32 _rsvd1:3; /* 1 */ + uint32 mcst:1; + uint32 tc:4; + uint32 dst_mod:8; /* 2 */ + uint32 dst_port:8; /* 3 */ + uint32 src_mod:8; /* 4 */ + uint32 src_port:8; /* 5 */ + uint32 lbid:8; /* 6 */ + uint32 dp:2; /* 7 */ + uint32 ehv:1; + uint32 _rsvd2:2; + uint32 ppd_type:3; + uint32 ctag_hi:8; /* 8 */ + uint32 ctag_lo:8; /* 9 */ + uint32 _rsvd3:8; /* 10 */ + uint32 _rsvd4:8; /* 11 */ + uint32 vlan_pri:3; /* 12 */ + uint32 vlan_cfi:1; + uint32 vlan_id_hi:4; + uint32 vlan_id_lo:8; /* 13 */ + uint32 pfm:2; /* 14 */ + uint32 src_t:1; + uint32 _rsvd5:2; + uint32 opcode:3; + uint32 hdr_ext_len:3; /* 15 */ + uint32 _rsvd6:5; + } ppd_overlay2; + + struct { /* Byte # */ + /* "Next Gen" PPD Overlay 3 */ + uint32 start:8; /* 0 */ + uint32 _rsvd1:3; /* 1 */ + uint32 mcst:1; + uint32 tc:4; + uint32 dst_mod:8; /* 2 */ + uint32 dst_port:8; /* 3 */ + uint32 src_mod:8; /* 4 */ + uint32 src_port:8; /* 5 */ + uint32 lbid:8; /* 6 */ + uint32 dp:2; /* 7 */ + uint32 ehv:1; + uint32 _rsvd2:2; + uint32 ppd_type:3; + uint32 multipoint:1; /* 8 */ + uint32 fwd_type:5; + uint32 vni_mid:2; + uint32 vni_low:8; /* 9 */ + uint32 dst_vp_high:8; /* 10 */ + uint32 dst_vp_low:8; /* 11 */ + uint32 src_vp_high:8; /* 12 */ + uint32 src_vp_low:8; /* 13 */ + uint32 mirror:1; /* 14 */ + uint32 donot_modify:1; + uint32 donot_learn:1; + uint32 lag_failover:1; + uint32 protection_status:1; + uint32 opcode:3; + uint32 vni_high:4; /* 15 */ + uint32 preserve_dscp:1; + uint32 preserve_dot1p:1; + uint32 dest_type:1; + uint32 source_type:1; + } ppd_overlay3; + + struct { /* Byte # */ + /* "Offload Engine" PPD Overlay 4 */ + uint32 start:8; /* 0 */ + uint32 _rsvd1:3; /* 1 */ + uint32 mcst:1; + uint32 tc:4; + uint32 dst_mod:8; /* 2 */ + uint32 dst_port:8; /* 3 */ + uint32 src_mod:8; /* 4 */ + uint32 src_port:8; /* 5 */ + uint32 lbid:8; /* 6 */ + uint32 dp:2; /* 7 */ + uint32 ehv:1; + uint32 _rsvd2:2; + uint32 ppd_type:3; + + union { + /* The data container has several sub-formats */ + struct { /* Byte # */ + /* Abstract data container */ + uint8 bytes[4]; /* 8-11 */ + } abstract; + + struct { /* Byte # */ + uint32 ctag_hi:8; /* 8 */ + uint32 ctag_lo:8; /* 9 */ + uint32 deferred_drop:1; /* 10 */ + uint32 vxlt_done:2; + uint32 deferred_change_pkt_pri:1; + uint32 new_pkt_pri:3; + uint32 deferred_change_dscp:1; + uint32 new_dscp:6; /* 11 */ + uint32 _rsvd1:2; + } offload_engine; + } data_container; + + uint32 src_vp_high:8; /* 12 */ + uint32 src_vp_low:8; /* 13 */ + uint32 preserve_dscp:1; /* 14 */ + uint32 preserve_dot1p:1; + uint32 donot_learn:1; + uint32 _rsvd3:1; + uint32 source_type:1; + uint32 opcode:3; + uint32 _rsvd4:4; /* 15 */ + uint32 data_container_type:4; + } ppd_overlay4; +#endif /* !LE_HOST */ + +} soc_higig2_hdr_t; + +#define SOC_HIGIG2_LABEL_OVERLAY_TYPE_VC_LABEL 0 +#define SOC_HIGIG2_LABEL_OVERLAY_TYPE_SYSTEM_INGRESS_PORT 1 +#define SOC_HIGIG2_LABEL_OVERLAY_TYPE_MIRROR_CLASS_TAG 2 +#define SOC_HIGIG2_LABEL_OVERLAY_TYPE_QTAG 3 + +#define SOC_HIGIG2_HDR_SIZE ((int) sizeof(soc_higig2_hdr_t)) + +extern uint32 soc_higig2_field_get(int unit, soc_higig2_hdr_t *hg, + soc_higig_field_t field); +extern void soc_higig2_field_set(int unit, soc_higig2_hdr_t *hg, + soc_higig_field_t field, uint32 val); +extern void soc_higig2_dump(int unit, char *pfx, soc_higig2_hdr_t *hg); + + +typedef union soc_higig3_hdr_u { + struct { + uint8 bytes[16]; + } overlay0; +#if defined(LE_HOST) + struct { + uint32 ethertype_high:8; + uint32 ethertype_mirror_copy:1; + uint32 ethertype_reserved:1; + uint32 ethertype_exthdr:2; + uint32 ethertype_ver:2; + uint32 ethertype_low:2; + uint32 system_dest_high:7; + uint32 system_dest_type:1; + uint32 system_dest_low:8; + + uint32 system_source_high:7; + uint32 l3_routed:1; + uint32 system_source_low:8; + uint32 entropy:8; + uint32 tc:4; + uint32 cn:2; + uint32 cng:2; + + uint32 class_id_high:2; + uint32 flags:6; + uint32 class_id_low:8; + uint32 forwarding_domain_high:8; + uint32 forwarding_domain_low:8; + + uint32 svp_high:8; + uint32 svp_low:8; + uint32 dvp_or_l3_iif_high:8; + uint32 dvp_or_l3_iif_low:8; + } hg3_overlay; +#else + struct { + /* Word 0 */ + uint32 ethertype_high:8; + uint32 ethertype_low:2; + uint32 ethertype_ver:2; + uint32 ethertype_exthdr:2; + uint32 ethertype_reserved:1; + uint32 ethertype_mirror_copy:1; + uint32 system_dest_type:1; + uint32 system_dest_high:7; + uint32 system_dest_low:8; + + /* Word 1 */ + uint32 l3_routed:1; + uint32 system_source_high:7; + uint32 system_source_low:8; + uint32 entropy:8; + uint32 cng:2; + uint32 cn:2; + uint32 tc:4; + + /* Extension header Type 0 */ + /* Word 2 */ + uint32 flags:6; + uint32 class_id_high:2; + uint32 class_id_low:8; + uint32 forwarding_domain_high:8; + uint32 forwarding_domain_low:8; + + /* Word 3 */ + uint32 svp_high:8; + uint32 svp_low:8; + uint32 dvp_or_l3_iif_high:8; + uint32 dvp_or_l3_iif_low:8; + } hg3_overlay; +#endif /* LE_HOST */ +} soc_higig3_hdr_t; + + +#define SOC_HIGIG3_HDR_SIZE ((int) sizeof(soc_higig3_hdr_t)) +extern uint32 soc_higig3_field_get(int unit, soc_higig3_hdr_t *hg, + soc_higig_field_t field); +extern void soc_higig3_field_set(int unit, soc_higig3_hdr_t *hg, + soc_higig_field_t field, uint32 val); +extern void soc_higig3_dump(int unit, char *pfx, soc_higig3_hdr_t *hg); + +#endif /* BCM_HIGIG2_SUPPORT */ + +extern soc_higig_field_t soc_higig_name_to_field(int unit, char *name); +extern char *soc_higig_field_to_name(int unit, soc_higig_field_t f); + +extern uint32 soc_higig_field_get(int unit, soc_higig_hdr_t *hg, + soc_higig_field_t field); +extern void soc_higig_field_set(int unit, soc_higig_hdr_t *hg, + soc_higig_field_t field, uint32 val); + +extern void soc_higig_dump(int unit, char *pfx, soc_higig_hdr_t *hg); + +/* HIGIG Header field default values */ + +/* default SOP Symbol */ +#define SOC_HIGIG_START 0xfb /* Default Start for BIGMAC */ + +/* HGI */ +#define SOC_HIGIG_HGI 0x80 /* Default HGI */ +#define SOC_HIGIG_HGI_MASK 0xc0 /* HGI field mask */ + +/* Module header Op-Codes */ +#define SOC_HIGIG_OP_CPU 0x00 /* CPU Frame */ +#define SOC_HIGIG_OP_UC 0x01 /* Unicast Frame */ +#define SOC_HIGIG_OP_BC 0x02 /* Broadcast or DLF frame */ +#define SOC_HIGIG_OP_MC 0x03 /* Multicast Frame */ +#define SOC_HIGIG_OP_IPMC 0x04 /* IP Multicast Frame */ + +#define SOC_HIGIG_DST_MOD_CPU 0x00 + +/* Header Format */ +#define SOC_HIGIG_HDR_DEFAULT 0x00 +#define SOC_HIGIG_HDR_CLASS_TAG 0x01 +#define SOC_HIGIG_HDR_EXT_LEN 0x02 +#define SOC_HIGIG_HDR_RSVD2 0x03 + +#if defined(BCM_XGS_SUPPORT) + +/* XGS Frame format */ +typedef struct xgs_pkt_s { + soc_higig_hdr_t higig_hdr; + enet_hdr_t enet_hdr; +} xgs_pkt_t; + +/* Hercules Header modes */ +#define SOC_XGS_ENCAP_IEEE 0x00 /* Standard IEEE 802.3 (Default) */ +#define SOC_XGS_ENCAP_HIGIG 0x01 /* Broadcom HIGIG Format */ +#define SOC_XGS_ENCAP_ALLYR 0x02 /* BCM5632 compatible mode */ +#define SOC_XGS_ENCAP_RSVP 0x03 /* Reserved */ + +/**************************************************************************** + * BCM5632 Header Format + * When the MAC is in BCM5632 header mode, we prepend the following + * two words of data to a standard 802.3 Ethernet Frame. + * + * ANSI only permits signed or unsigned int for bit field type. This + * structure will only work for compilers for which uint32 is unsigned + * int, and which completely pack bit fields beginning at the MSbit for + * big-endian machines and at the LSbit for little-endian machines. + * + * NOTE: these structures already put the the individual bytes in memory + * in big endian order for both big- and little-endian machines, so no + * further swapping is required. + ****************************************************************************/ + +typedef union soc_bcm5632_hdr_u { + struct { + uint8 bytes[8]; + } overlay0; + +#if defined(LE_HOST) + + struct { /* Byte # */ + uint32 d_portid:6; /* 0 */ + uint32 _rsvd1:2; + uint32 _rsvd2:8; /* 1 */ + uint32 _rsvd3:8; /* 2 */ + uint32 _rsvd4:8; /* 3 */ + + uint32 start:8; /* 4 */ + uint32 length_hi:8; /* 5 */ + uint32 length_lo:8; /* 6 */ + uint32 s_portid:6; /* 7 */ + uint32 _rsvd5:2; + } overlay1; + +#else /* !LE_HOST */ + + struct { /* Byte # */ + uint32 _rsvd1:2; /* 0 */ + uint32 d_portid:6; + uint32 _rsvd2:8; /* 1 */ + uint32 _rsvd3:8; /* 2 */ + uint32 _rsvd4:8; /* 3 */ + + uint32 start:8; /* 4 */ + uint32 length_hi:8; /* 5 */ + uint32 length_lo:8; /* 6 */ + uint32 _rsvd5:2; /* 7 */ + uint32 s_portid:6; + } overlay1; + +#endif + +} soc_bcm5632_hdr_t; + +#define SOC_BCM5632_HDR_SIZE ((int) sizeof(soc_bcm5632_hdr_t)) + +/* BCM5632 Frame format */ +typedef struct b5632_pkt_s { + soc_bcm5632_hdr_t b5632_hdr; + enet_hdr_t enet_hdr; +} b5632_pkt_t; + +/* BCM5632 Header field default values */ + +/* HGI */ +#define SOC_BCM5632_HGI 0x00 /* Default HGI for BCM5632 */ + +#endif /* defined(BCM_XGS_SUPPORT) */ + + +#define SOC_HIGIG_HDR_MAX_MODID 0xFF +#define SOC_HIGIG_E2ECC_MAX_PORT_STATUS 64 + +/* E2ECC Header */ +typedef union soc_higig_e2ecc_hdr_u { + struct { + uint8 bytes[32]; + } overlay0; + + struct { + uint32 words[8]; + } overlay1; + +} soc_higig_e2ecc_hdr_t; + + +#endif /* defined(BCM_XGS_SUPPORT) || defined(BCM_PETRA_SUPPORT)*/ + +#endif /* !_SOC_HIGIG_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h new file mode 100644 index 000000000000..849c7e7f80ec --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h @@ -0,0 +1,31 @@ +/* + * $Id:$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * Stub header file + */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h new file mode 100644 index 000000000000..fa11ab3c5ee7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h @@ -0,0 +1,270 @@ +/* + * $Id: rx.h,v 1.16 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + */ + +#ifndef _SOC_RX_H +#define _SOC_RX_H + +#include + +#include + +/* + * PKT RX Packet Reasons; reason CPU received the packet. + * Notes: + * It is possible no reasons are set (directed to CPU from ARL + * for example), or multiple reasons may be set. + * + * See "include/shared/rx.h" for full description. + */ + +typedef enum soc_rx_reason_e { + socRxReasonInvalid = _SHR_RX_INVALID, + socRxReasonArp = _SHR_RX_ARP, + socRxReasonBpdu = _SHR_RX_BPDU, + socRxReasonBroadcast = _SHR_RX_BROADCAST, + socRxReasonClassBasedMove = _SHR_RX_CLASS_BASED_MOVE, + socRxReasonClassTagPackets = _SHR_RX_CLASS_TAG_PACKETS, + socRxReasonControl = _SHR_RX_CONTROL, + socRxReasonCpuLearn = _SHR_RX_CPU_LEARN, + socRxReasonDestLookupFail = _SHR_RX_DEST_LOOKUP_FAIL, + socRxReasonDhcp = _SHR_RX_DHCP, + socRxReasonDosAttack = _SHR_RX_DOS_ATTACK, + socRxReasonE2eHolIbp = _SHR_RX_E2E_HOL_IBP, + socRxReasonEncapHigigError = _SHR_RX_ENCAP_HIGIG_ERROR, + socRxReasonFilterMatch = _SHR_RX_FILTER_MATCH, + socRxReasonGreChecksum = _SHR_RX_GRE_CHECKSUM, + socRxReasonGreSourceRoute = _SHR_RX_GRE_SOURCE_ROUTE, + socRxReasonHigigControl = _SHR_RX_HIGIG_CONTROL, + socRxReasonHigigHdrError = _SHR_RX_HIGIG_HDR_ERROR, + socRxReasonIcmpRedirect = _SHR_RX_ICMP_REDIRECT, + socRxReasonIgmp = _SHR_RX_IGMP, + socRxReasonIngressFilter = _SHR_RX_INGRESS_FILTER, + socRxReasonIp = _SHR_RX_IP, + socRxReasonIpfixRateViolation = _SHR_RX_IPFIX_RATE_VIOLATION, + socRxReasonIpMcastMiss = _SHR_RX_IP_MCAST_MISS, + socRxReasonIpmcReserved = _SHR_RX_IPMC_RSVD, + socRxReasonIpOptionVersion = _SHR_RX_IP_OPTION_VERSION, + socRxReasonIpmc = _SHR_RX_IPMC, + socRxReasonL2Cpu = _SHR_RX_L2_CPU, + socRxReasonL2DestMiss = _SHR_RX_L2_DEST_MISS, + socRxReasonL2LearnLimit = _SHR_RX_L2_LEARN_LIMIT, + socRxReasonL2Move = _SHR_RX_L2_MOVE, + socRxReasonL2MtuFail = _SHR_RX_L2_MTU_FAIL, + socRxReasonL2NonUnicastMiss = _SHR_RX_L2_NON_UNICAST_MISS, + socRxReasonL2SourceMiss = _SHR_RX_L2_SOURCE_MISS, + socRxReasonL3AddrBindFail = _SHR_RX_L3_ADDR_BIND_FAIL, + socRxReasonL3DestMiss = _SHR_RX_L3_DEST_MISS, + socRxReasonL3HeaderError = _SHR_RX_L3_HEADER_ERROR, + socRxReasonL3MtuFail = _SHR_RX_L3_MTU_FAIL, + socRxReasonL3Slowpath = _SHR_RX_L3_SLOW_PATH, + socRxReasonL3SourceMiss = _SHR_RX_L3_SOURCE_MISS, + socRxReasonL3SourceMove = _SHR_RX_L3_SOUCE_MOVE, + socRxReasonMartianAddr = _SHR_RX_MARTIAN_ADDR, + socRxReasonMcastIdxError = _SHR_RX_MCAST_IDX_ERROR, + socRxReasonMcastMiss = _SHR_RX_MCAST_MISS, + socRxReasonMimServiceError = _SHR_RX_MIM_SERVICE_ERROR, + socRxReasonMplsCtrlWordError = _SHR_RX_MPLS_CTRL_WORD_ERROR, + socRxReasonMplsError = _SHR_RX_MPLS_ERROR, + socRxReasonMplsInvalidAction = _SHR_RX_MPLS_INVALID_ACTION, + socRxReasonMplsInvalidPayload = _SHR_RX_MPLS_INVALID_PAYLOAD, + socRxReasonMplsLabelMiss = _SHR_RX_MPLS_LABEL_MISS, + socRxReasonMplsSequenceNumber = _SHR_RX_MPLS_SEQUENCE_NUMBER, + socRxReasonMplsTtl = _SHR_RX_MPLS_TTL, + socRxReasonMulticast = _SHR_RX_MULTICAST, + socRxReasonNhop = _SHR_RX_NHOP, + socRxReasonOAMError = _SHR_RX_OAM_ERROR, + socRxReasonOAMSlowpath = _SHR_RX_OAM_SLOW_PATH, + socRxReasonOAMLMDM = _SHR_RX_OAM_LMDM, + socRxReasonParityError = _SHR_RX_PARITY_ERROR, + socRxReasonProtocol = _SHR_RX_PROTOCOL, + socRxReasonSampleDest = _SHR_RX_SAMPLE_DEST, + socRxReasonSampleSource = _SHR_RX_SAMPLE_SOURCE, + socRxReasonSharedVlanMismatch = _SHR_RX_SHARED_VLAN_MISMATCH, + socRxReasonSourceRoute = _SHR_RX_SOURCE_ROUTE, + socRxReasonTimeStamp = _SHR_RX_TIME_STAMP, + socRxReasonTtl = _SHR_RX_TTL, + socRxReasonTtl1 = _SHR_RX_TTL1, + socRxReasonTunnelError = _SHR_RX_TUNNEL_ERROR, + socRxReasonUdpChecksum = _SHR_RX_UDP_CHECKSUM, + socRxReasonUnknownVlan = _SHR_RX_UNKNOWN_VLAN, + socRxReasonUrpfFail = _SHR_RX_URPF_FAIL, + socRxReasonVcLabelMiss = _SHR_RX_VC_LABEL_MISS, + socRxReasonVlanFilterMatch = _SHR_RX_VLAN_FILTER_MATCH, + socRxReasonWlanClientError = _SHR_RX_WLAN_CLIENT_ERROR, + socRxReasonWlanSlowpath = _SHR_RX_WLAN_SLOW_PATH, + socRxReasonWlanDot1xDrop = _SHR_RX_WLAN_DOT1X_DROP, + socRxReasonExceptionFlood = _SHR_RX_EXCEPTION_FLOOD, + socRxReasonTimeSync = _SHR_RX_TIMESYNC, + socRxReasonEAVData = _SHR_RX_EAV_DATA, + socRxReasonSamePortBridge = _SHR_RX_SAME_PORT_BRIDGE, + socRxReasonSplitHorizon = _SHR_RX_SPLIT_HORIZON, + socRxReasonL4Error = _SHR_RX_L4_ERROR, + socRxReasonStp = _SHR_RX_STP, + socRxReasonEgressFilterRedirect = _SHR_RX_EGRESS_FILTER_REDIRECT, + socRxReasonFilterRedirect = _SHR_RX_FILTER_REDIRECT, + socRxReasonLoopback = _SHR_RX_LOOPBACK, + socRxReasonVlanTranslate = _SHR_RX_VLAN_TRANSLATE, + socRxReasonMmrp = _SHR_RX_MMRP, + socRxReasonSrp = _SHR_RX_SRP, + socRxReasonTunnelControl = _SHR_RX_TUNNEL_CONTROL, + socRxReasonL2Marked = _SHR_RX_L2_MARKED, + socRxReasonWlanSlowpathKeepalive = _SHR_RX_WLAN_SLOWPATH_KEEPALIVE, + socRxReasonStation = _SHR_RX_STATION, + socRxReasonNiv = _SHR_RX_NIV, + socRxReasonNivPrioDrop = _SHR_RX_NIV_PRIO_DROP, + socRxReasonNivInterfaceMiss = _SHR_RX_NIV_INTERFACE_MISS, + socRxReasonNivRpfFail = _SHR_RX_NIV_RPF_FAIL, + socRxReasonNivTagInvalid = _SHR_RX_NIV_TAG_INVALID, + socRxReasonNivTagDrop = _SHR_RX_NIV_TAG_DROP, + socRxReasonNivUntagDrop = _SHR_RX_NIV_UNTAG_DROP, + socRxReasonTrill = _SHR_RX_TRILL, + socRxReasonTrillInvalid = _SHR_RX_TRILL_INVALID, + socRxReasonTrillMiss = _SHR_RX_TRILL_MISS, + socRxReasonTrillRpfFail = _SHR_RX_TRILL_RPF_FAIL, + socRxReasonTrillSlowpath = _SHR_RX_TRILL_SLOWPATH, + socRxReasonTrillCoreIsIs = _SHR_RX_TRILL_CORE_IS_IS, + socRxReasonTrillTtl = _SHR_RX_TRILL_TTL, + socRxReasonTrillName = _SHR_RX_TRILL_NAME, + socRxReasonBfdSlowpath = _SHR_RX_BFD_SLOWPATH, + socRxReasonBfd = _SHR_RX_BFD, + socRxReasonMirror = _SHR_RX_MIRROR, + socRxReasonRegexAction = _SHR_RX_REGEX_ACTION, + socRxReasonFailoverDrop = _SHR_RX_FAILOVER_DROP, + socRxReasonWlanTunnelError = _SHR_RX_WLAN_TUNNEL_ERROR, + socRxReasonMplsReservedEntropyLabel = \ + _SHR_RX_MPLS_RESERVED_ENTROPY_LABEL, + socRxReasonCongestionCnmProxy = _SHR_RX_CONGESTION_CNM_PROXY, + socRxReasonCongestionCnmProxyError = _SHR_RX_CONGESTION_CNM_PROXY_ERROR, + socRxReasonCongestionCnm = _SHR_RX_CONGESTION_CNM, + socRxReasonMplsUnknownAch = _SHR_RX_MPLS_UNKNOWN_ACH, + socRxReasonMplsLookupsExceeded = _SHR_RX_MPLS_LOOKUPS_EXCEEDED, + socRxReasonMplsIllegalReservedLabel = \ + _SHR_RX_MPLS_ILLEGAL_RESERVED_LABEL, + socRxReasonMplsRouterAlertLabel = _SHR_RX_MPLS_ROUTER_ALERT_LABEL, + socRxReasonNivPrune = _SHR_RX_NIV_PRUNE, + socRxReasonVirtualPortPrune = _SHR_RX_VIRTUAL_PORT_PRUNE, + socRxReasonNonUnicastDrop = _SHR_RX_NON_UNICAST_DROP, + socRxReasonTrillPacketPortMismatch = _SHR_RX_TRILL_PACKET_PORT_MISMATCH, + socRxReasonRegexMatch = _SHR_RX_REGEX_MATCH, + socRxReasonWlanClientMove = _SHR_RX_WLAN_CLIENT_MOVE, + socRxReasonWlanSourcePortMiss = _SHR_RX_WLAN_SOURCE_PORT_MISS, + socRxReasonWlanClientSourceMiss = _SHR_RX_WLAN_CLIENT_SOURCE_MISS, + socRxReasonWlanClientDestMiss = _SHR_RX_WLAN_CLIENT_DEST_MISS, + socRxReasonWlanMtu = _SHR_RX_WLAN_MTU, + socRxReasonL2GreSipMiss = _SHR_RX_L2GRE_SIP_MISS, + socRxReasonL2GreVpnIdMiss = _SHR_RX_L2GRE_VPN_ID_MISS, + socRxReasonTimesyncUnknownVersion = _SHR_RX_TIMESYNC_UNKNOWN_VERSION, + socRxReasonVxlanSipMiss = _SHR_RX_VXLAN_SIP_MISS, + socRxReasonVxlanVpnIdMiss = _SHR_RX_VXLAN_VPN_ID_MISS, + socRxReasonFcoeZoneCheckFail = _SHR_RX_FCOE_ZONE_CHECK_FAIL, + socRxReasonIpmcInterfaceMismatch = _SHR_RX_IPMC_INTERFACE_MISMATCH, + socRxReasonNat = _SHR_RX_NAT, + socRxReasonTcpUdpNatMiss = _SHR_RX_TCP_UDP_NAT_MISS, + socRxReasonIcmpNatMiss = _SHR_RX_ICMP_NAT_MISS, + socRxReasonNatFragment = _SHR_RX_NAT_FRAGMENT, + socRxReasonNatMiss = _SHR_RX_NAT_MISS, + socRxReasonUnknownSubtendingPort = _SHR_RX_UNKNOWN_SUBTENTING_PORT, + socRxReasonLLTagAbsentDrop = _SHR_RX_LLTAG_ABSENT_DROP, + socRxReasonLLTagPresentDrop = _SHR_RX_LLTAG_PRESENT_DROP, + socRxReasonOAMCCMSlowPath = _SHR_RX_OAM_CCM_SLOWPATH, + socRxReasonOAMIncompleteOpcode = _SHR_RX_OAM_INCOMPLETE_OPCODE, + socRxReasonReserved0 = _SHR_RX_RESERVED_0, + socRxReasonOAMMplsLmDm = _SHR_RX_OAM_MPLS_LMDM, + socRxReasonSat = _SHR_RX_SAT, + socRxReasonSampleSourceFlex = _SHR_RX_SAMPLE_SOURCE_FLEX, + socRxReasonFlexSflow = _SHR_RX_FLEX_SFLOW, + socRxReasonVxltMiss = _SHR_RX_VXLT_MISS, + socRxReasonTunnelDecapEcnError = _SHR_RX_TUNNEL_DECAP_ECN_ERROR, + socRxReasonTunnelObjectValidationFail = _SHR_RX_TUNNEL_OBJECT_VALIDATION_FAIL, + socRxReasonL3Cpu = _SHR_RX_L3_CPU, + socRxReasonTunnelAdaptLookupMiss = _SHR_RX_TUNNEL_ADAPT_LOOKUP_MISS, + socRxReasonPacketFlowSelectMiss = _SHR_RX_PACKET_FLOW_SELECT_MISS, + socRxReasonProtectionDataDrop = _SHR_RX_PROTECTION_DATA_DROP, + socRxReasonPacketFlowSelect = _SHR_RX_PACKET_FLOW_SELECT, + socRxReasonOtherLookupMiss = _SHR_RX_OTHER_LOOKUP_MISS, + socRxReasonInvalidTpid = _SHR_RX_INVALID_TPID, + socRxReasonMplsControlPacket = _SHR_RX_MPLS_CONTROL_PACKET, + socRxReasonTunnelTtlError = _SHR_RX_TUNNEL_TTL_ERROR, + socRxReasonL2HeaderError = _SHR_RX_L2_HEADER_ERROR, + socRxReasonOtherLookupHit = _SHR_RX_OTHER_LOOKUP_HIT, + socRxReasonL2SrcLookupMiss = _SHR_RX_L2_SRC_LOOKUP_MISS, + socRxReasonL2SrcLookupHit = _SHR_RX_L2_SRC_LOOKUP_HIT, + socRxReasonL2DstLookupMiss = _SHR_RX_L2_DST_LOOKUP_MISS, + socRxReasonL2DstLookupHit = _SHR_RX_L2_DST_LOOKUP_HIT, + socRxReasonL3SrcRouteLookupMiss = _SHR_RX_L3_SRC_ROUTE_LOOKUP_MISS, + socRxReasonL3SrcHostLookupMiss = _SHR_RX_L3_SRC_HOST_LOOKUP_MISS, + socRxReasonL3SrcRouteLookupHit = _SHR_RX_L3_SRC_ROUTE_LOOKUP_HIT, + socRxReasonL3SrcHostLookupHit = _SHR_RX_L3_SRC_HOST_LOOKUP_HIT, + socRxReasonL3DstRouteLookupMiss = _SHR_RX_L3_DST_ROUTE_LOOKUP_MISS, + socRxReasonL3DstHostLookupMiss = _SHR_RX_L3_DST_HOST_LOOKUP_MISS, + socRxReasonL3DstRouteLookupHit = _SHR_RX_L3_DST_ROUTE_LOOKUP_HIT, + socRxReasonL3DstHostLookupHit = _SHR_RX_L3_DST_HOST_LOOKUP_HIT, + socRxReasonVlanTranslate1Lookup1Miss = _SHR_RX_VLAN_TRANSLATE1_LOOKUP1_MISS, + socRxReasonVlanTranslate1Lookup2Miss = _SHR_RX_VLAN_TRANSLATE1_LOOKUP2_MISS, + socRxReasonMplsLookup1Miss = _SHR_RX_MPLS_LOOKUP1_MISS, + socRxReasonMplsLookup2Miss = _SHR_RX_MPLS_LOOKUP2_MISS, + socRxReasonL3TunnelLookupMiss = _SHR_RX_L3_TUNNEL_LOOKUP_MISS, + socRxReasonVlanTranslate2Lookup1Miss = _SHR_RX_VLAN_TRANSLATE2_LOOKUP1_MISS, + socRxReasonVlanTranslate2Lookup2Miss = _SHR_RX_VLAN_TRANSLATE2_LOOKUP2_MISS, + socRxReasonL2StuFail = _SHR_RX_L2_STU_FAIL, + socReasonSrCounterExceeded = _SHR_RX_SR_COUNTER_EXCEEDED, + socRxReasonSrCopyToCpuBit0 = _SHR_RX_SR_COPY_TO_CPU_BIT0, + socRxReasonSrCopyToCpuBit1 = _SHR_RX_SR_COPY_TO_CPU_BIT1, + socRxReasonSrCopyToCpuBit2 = _SHR_RX_SR_COPY_TO_CPU_BIT2, + socRxReasonSrCopyToCpuBit3 = _SHR_RX_SR_COPY_TO_CPU_BIT3, + socRxReasonSrCopyToCpuBit4 = _SHR_RX_SR_COPY_TO_CPU_BIT4, + socRxReasonSrCopyToCpuBit5 = _SHR_RX_SR_COPY_TO_CPU_BIT5, + socRxReasonL3HeaderMismatch = _SHR_RX_L3_HEADER_MISMATCH, + socRxReasonEtrapMonitor = _SHR_RX_ETRAP_MONITOR, + socRxReasonDlbMonitor = _SHR_RX_DLB_MONITOR, + socRxReasonIntTurnAround = _SHR_RX_INT_TURNAROUND, + socRxReasonCount = _SHR_RX_REASON_COUNT /* MUST BE LAST */ +} soc_rx_reason_t; + + +/* + * Set of "reasons" (see socRxReason*) why a packet came to the CPU. + */ +typedef _shr_rx_reasons_t soc_rx_reasons_t; + +/* + * Macro to add a reason (socRxReason*) to a set of + * reasons (soc_rx_reasons_t) + */ +#define SOC_RX_REASON_SET(_reasons, _reason) \ + _SHR_RX_REASON_SET(_reasons, _reason) + +/* + * Macro to clear a set of reasons (soc_rx_reasons_t). + */ +#define SOC_RX_REASON_CLEAR_ALL(_reasons) \ + _SHR_RX_REASON_CLEAR_ALL(_reasons) + +#endif /* !_SOC_RX_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h new file mode 100644 index 000000000000..4836613fcccf --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h @@ -0,0 +1,248 @@ +/* + * $Id: type19.h,v 1.4 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: soc/shared/dcbformats/type19.h + * Purpose: Define dma control block (DCB) format for a type19 DCB + * used by the 56640 (Triumph3/Firebolt4) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE19_H +#define _SOC_SHARED_DCBFORMATS_TYPE19_H + +/* + * DMA Control Block - Type 19 + * Used on 5663x devices + * 16 words + */ +typedef struct { + uint32 addr; /* T19.0: physical address */ + /* T19.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, + c_stat:1, + c_hg:1, + c_reload:1, + c_sg:1, + c_chain:1, + c_count:16; +#endif /* LE_HOST */ + uint32 mh0; /* T19.2: Module Header word 0 */ + uint32 mh1; /* T19.3: Module Header word 1 */ + uint32 mh2; /* T19.4: Module Header word 2 */ + uint32 mh3; /* T19.5: Module Header word 3 */ +#ifdef LE_HOST + /* T19.6: RX Status 0 */ + uint32 :3, /* Reserved */ + mtp_index:5, /* MTP index */ + cpu_cos:6, /* COS queue for CPU packets */ + :2, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_pri:3; /* Inner priority */ + + /* T19.7 */ + uint32 reason_hi:16, /* CPU opcode (high bits) */ + pkt_len:14, /* Packet length */ + :2; /* Reserved */ + + /* T19.8 */ + uint32 reason; /* CPU opcode */ + + /* T19.9 */ + uint32 dscp:8, /* New DSCP */ + chg_tos:1, /* DSCP has been changed by HW */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + regen_crc:1, /* Packet modified and needs new CRC */ + :2, /* Reserved */ + outer_vid:12, /* Outer VLAN ID */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3; /* Outer priority */ + + /* T19.10 */ + uint32 timestamp; /* Timestamp */ + + /* T19.11 */ + uint32 cos:4, /* COS */ + higig_cos:5, /* Higig COS */ + vlan_cos:5, /* VLAN COS */ + shaping_cos_sel:2, /* Shaping COS Select */ + vfi:12, /* Internal VFI value */ + :4; /* Reserved */ + + /* T19.12 */ + uint32 srcport:8, /* Source port number */ + hgi:2, /* Higig Interface Format Indicator */ + itag_status:2, /* Ingress incoming tag status */ + otag_action:2, /* Ingress Outer tag action */ + itag_action:2, /* Ingress Inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + imirror:1, /* Ingress Mirroring */ + emirror:1, /* Egress Mirroring */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + :5; /* Reserved */ + + /* T19.13 */ + uint32 orig_dstport:6, /* Original dst port (EP redirection) */ + true_egr_mirror:1, /* True egress mirrored */ + egr_cpu_copy:1, /* True egress copy-to-CPU */ + oam_pkt:1, /* OAM packet */ + eh_tbl_idx:2, /* Extended Higig table select */ + eh_tag_type:2, /* Extended Higig tag type */ + eh_tm:1, /* Extended Higig traffic manager ctrl */ + eh_queue_tag:16, /* Extended Higig queue tag */ + :2; /* Reserved */ + + /* T19.14 */ + uint32 l3_intf:15, /* L3 Intf num / Next hop idx */ + :1, /* Reserved */ + match_rule:8, /* Matched FP rule */ + :8; /* Reserved */ + + /* T19.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers.*/ + dc:10, /* Don't Care */ + done:1; /* Descriptor Done */ +#else + /* T19.6: RX Status 0 */ + uint32 inner_pri:3, /* Inner priority */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :2, /* Reserved */ + cpu_cos:6, /* COS queue for CPU packets */ + mtp_index:5, /* MTP index */ + :3; /* Reserved */ + + /* T19.7 */ + uint32 :2, /* Reserved */ + pkt_len:14, /* Packet length */ + reason_hi:16; /* CPU opcode (high bits) */ + + /* T19.8 */ + uint32 reason; /* CPU opcode */ + + /* T19.9 */ + uint32 outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_vid:12, /* Outer VLAN ID */ + :2, /* Reserved */ + regen_crc:1, /* Packet modified and needs new CRC */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:8; /* New DSCP */ + + /* T19.10 */ + uint32 timestamp; /* Timestamp */ + + /* T19.11 */ + uint32 :4, /* Reserved */ + vfi:12, /* Internal VFI value */ + shaping_cos_sel:2, /* Shaping COS Select */ + vlan_cos:5, /* VLAN COS */ + higig_cos:5, /* Higig COS */ + cos:4; /* COS */ + + /* T19.12 */ + uint32 :5, /* Reserved */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + emirror:1, /* Egress Mirroring */ + imirror:1, /* Ingress Mirroring */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress Inner tag action */ + otag_action:2, /* Ingress Outer tag action */ + itag_status:2, /* Ingress incoming tag status */ + hgi:2, /* Higig Interface Format Indicator */ + srcport:8; /* Source port number */ + + /* T19.13 */ + uint32 :2, /* Reserved */ + eh_queue_tag:16, /* Extended Higig queue tag */ + eh_tm:1, /* Extended Higig traffic manager ctrl */ + eh_tag_type:2, /* Extended Higig tag type */ + eh_tbl_idx:2, /* Extended Higig table select */ + oam_pkt:1, /* OAM packet */ + egr_cpu_copy:1, /* True egress copy-to-CPU */ + true_egr_mirror:1, /* True egress mirrored */ + orig_dstport:6; /* Original dst port (EP redirection) */ + + /* T19.14 */ + uint32 :8, /* Reserved */ + match_rule:8, /* Matched FP rule */ + :1, /* Reserved */ + l3_intf:15; /* L3 Intf num / Next hop idx */ + + /* T19.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + dc:10, /* Don't Care */ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers. */ + pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb19_t; + +#endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h new file mode 100644 index 000000000000..d1ed8b4a9475 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h @@ -0,0 +1,299 @@ +/* + * $Id: type23.h,v 1.6 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: soc/shared/dcbformats/type23.h + * Purpose: Define dma control block (DCB) format for a type23 DCB + * used by the 56640 (Triumph3/Firebolt4) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE23_H +#define _SOC_SHARED_DCBFORMATS_TYPE23_H + +/* + * DMA Control Block - Type 23 + * Used on 56640 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T23.0: physical address */ + /* T23.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + uint32 reason_hi; /* T23.2: CPU opcode (hi bits) */ + uint32 reason; /* T23.3: CPU opcode (low bits) */ +#ifdef LE_HOST + union { /* T23.4 */ + struct { + uint32 queue_num:16, /* Queue number for CPU packets */ + outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4; /* CPU opcode type */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + :26; /* Reserved */ + } overlay2; + } word4; + + /* T23.5 */ + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T23.4 */ + struct { + uint32 cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12, /* Outer VLAN ID */ + queue_num:16; /* Queue number for CPU packets */ + } overlay1; + struct { + uint32 :26, /* Reserved */ + cpu_cos:6; /* CPU COS */ + } overlay2; + } word4; + + /* T23.5 */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ +#endif + + uint32 mh0; /* T23.6: Module Header word 0 */ + uint32 mh1; /* T23.7: Module Header word 1 */ + uint32 mh2; /* T23.8: Module Header word 2 */ + uint32 mh3; /* T23.9: Module Header word 3 */ +#ifdef LE_HOST + /* T23.10 */ + uint32 inner_pri:3, /* Inner priority */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + regen_crc:1, /* Packet modified and needs new CRC */ + repl_nhi:19, /* Replication or Next Hop index */ + vfi_valid:1, /* Validates VFI field */ + :7; /* Reserved */ + + union { /* T23.11 */ + struct { + uint32 dscp:6, /* New DSCP (+ special pkt type:3) */ + chg_tos:1, /* DSCP has been changed by HW */ + vntag_action:2, /* VN tag action */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + decap_tunnel_type:5,/* Tunnel type that was decapsulated */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + :1; /* Reserved */ + } overlay1; + struct { + uint32 special_pkt_type:3, /* Special packet type (OAM, BFD) */ + :29; /* Reserved */ + } overlay2; + } word11; + + union { /* T23.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 vfi:14, /* VFI or FID */ + :18; /* Reserved */ + } overlay2; + } word12; + + /* T23.13 */ + uint32 itag_status:2, /* Ingress Inner tag status */ + otag_action:2, /* Ingress Outer tag action */ + itag_action:2, /* Ingress Inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + all_switch_drop:1, /* All switched copies dropped */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + special_pkt:1, /* Special Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + loopback_pkt_type:4, /* Loopback packet type */ + mtp_index:5, /* MTP index */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + union { /* T23.14 */ + struct { + uint32 timestamp_hi; /* Timestamp upper bits */ + } overlay1; + struct { + uint32 eh_seg_sel:3, /* HG2 EH seg sel */ + eh_tag_type:2, /* HG2 EH tag type */ + eh_tm:1, /* HG2 EH tm */ + eh_queue_tag: 16, /* HG2 EH queue tag */ + eh_tag_reserved:10; /* Reserved */ + } overlay2; + struct { + uint32 rx_bfd_session_index:11, /* Rx BFD pkt session ID */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + :11; /* Reserved */ + } overlay3; + } word14; + + /* T23.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers.*/ + :10, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T23.10 */ + uint32 :7, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + repl_nhi:19, /* Replication or Next Hop index */ + regen_crc:1, /* Packet modified and needs new CRC */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + inner_pri:3; /* Inner priority */ + + union { /* T23.11 */ + struct { + uint32 :1, /* Reserved */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + decap_tunnel_type:5,/* Tunnel type that was decapsulated */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + vntag_action:2, /* VN tag action */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP (+ special pkt type:3) */ + } overlay1; + struct { + uint32 :29, /* Reserved */ + special_pkt_type:3; /* Special packet type (OAM, BFD) */ + } overlay2; + } word11; + + union { /* T23.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 :18, /* Reserved */ + vfi:14; /* VFI or FID */ + } overlay2; + } word12; + + /* T23.13 */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* MTP index */ + loopback_pkt_type:4, /* Loopback packet type */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + special_pkt:1, /* Special Packet indicator */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + all_switch_drop:1, /* All switched copies dropped */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress Inner tag action */ + otag_action:2, /* Ingress Outer tag action */ + itag_status:2; /* Ingress Inner tag status */ + + union { /* T23.14 */ + struct { + uint32 timestamp_hi; /* Timestamp upper bits */ + } overlay1; + struct { + uint32 eh_tag_reserved:10, /* Reserved */ + eh_queue_tag: 16, /* HG2 EH queue tag */ + eh_tm:1, /* HG2 EH tm */ + eh_tag_type:2, /* HG2 EH tag type */ + eh_seg_sel:3; /* HG2 EH seg sel */ + } overlay2; + struct { + uint32 :11, /* Reserved */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_session_index:11; /* Rx BFD pkt session ID */ + } overlay3; + } word14; + + /* T23.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :10, /* Reserved */ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers. */ + pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb23_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h new file mode 100644 index 000000000000..08e6be7f7781 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h @@ -0,0 +1,281 @@ +/* + * $Id: type24.h,v 1.3 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: soc/shared/dcbformats/type24.h + * Purpose: Define dma control block (DCB) format for a type24 DCB + * used by the 56440 (Katana) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE24_H +#define _SOC_SHARED_DCBFORMATS_TYPE24_H + +/* + * DMA Control Block - Type 24 + * Used on 56440 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T24.0: physical address */ + /* T24.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + uint32 reason_hi; /* T24.2: CPU opcode (hi bits) */ + uint32 reason; /* T24.3: CPU opcode (low bits) */ +#ifdef LE_HOST + union { /* T24.4 */ + struct { + uint32 queue_num:16, /* Queue number for CPU packets */ + :4, /* Reserved */ + outer_vid:12; /* Outer VLAN ID */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + :26; /* Reserved */ + } overlay2; + } word4; + + /* T24.5 */ + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T24.4 */ + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + :4, /* Reserved */ + queue_num:16; /* Queue number for CPU packets */ + } overlay1; + struct { + uint32 :26, /* Reserved */ + cpu_cos:6; /* CPU COS */ + } overlay2; + } word4; + + /* T24.5 */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ +#endif + + uint32 mh0; /* T24.6: Module Header word 0 */ + uint32 mh1; /* T24.7: Module Header word 1 */ + uint32 mh2; /* T24.8: Module Header word 2 */ + uint32 mh3; /* T24.9: Module Header word 3 */ +#ifdef LE_HOST + /* T24.10 */ + uint32 inner_pri:3, /* Inner priority */ + :1, /* Reserved */ + regen_crc:1, /* Packet modified and needs new CRC */ + repl_nhi:19, /* Replication or Next Hop index */ + vfi_valid:1, /* Validates VFI field */ + :7; /* Reserved */ + + union { /* T24.11 */ + struct { + uint32 dscp:6, /* New DSCP (+ oam pkt type:3) */ + chg_tos:1, /* DSCP has been changed by HW */ + vntag_action:2, /* VN tag action */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + decap_tunnel_type:5,/* Tunnel type that was decapsulated */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + :1; /* Reserved */ + } overlay1; + struct { + uint32 special_pkt_type:3, /* Special packet type (OAM, BFD) */ + :29; /* Reserved */ + } overlay2; + } word11; + + /* T24.12 */ + uint32 timestamp; /* Timestamp (+ VFI:14) */ + + /* T24.13 */ + uint32 itag_status:2, /* Ingress Inner tag status */ + otag_action:2, /* Ingress Outer tag action */ + itag_action:2, /* Ingress Inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + all_switch_drop:1, /* All switched copies dropped */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + oam_pkt:1, /* OAM Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + loopback_pkt_type:4, /* Loopback packet type */ + mtp_index:5, /* MTP index */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + union { /* T24.14 */ + struct { + uint32 timestamp_hi; /* Timestamp upper bits */ + } overlay1; + struct { + uint32 eh_seg_sel:3, /* HG2 EH seg sel */ + eh_tag_type:2, /* HG2 EH tag type */ + eh_tm:1, /* HG2 EH tm */ + eh_queue_tag: 16, /* HG2 EH queue tag */ + eh_tag_reserved:10; /* Reserved */ + } overlay2; + struct { + uint32 rx_bfd_session_index:11, /* Rx BFD pkt session ID */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + :11; /* Reserved */ + } overlay3; + } word14; + + /* T24.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers.*/ + :10, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T24.10 */ + uint32 :7, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + repl_nhi:19, /* Replication or Next Hop index */ + regen_crc:1, /* Packet modified and needs new CRC */ + :1, /* Reserved */ + inner_pri:3; /* Inner priority */ + + + union { /* T24.11 */ + struct { + uint32 :1, /* Reserved */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + decap_tunnel_type:5,/* Tunnel type that was decapsulated */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + vntag_action:2, /* VN tag action */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP (+ oam pkt type:3) */ + } overlay1; + struct { + uint32 :29, /* Reserved */ + special_pkt_type:3; /* Special packet type (OAM, BFD) */ + } overlay2; + } word11; + + /* T24.12 */ + uint32 timestamp; /* Timestamp (+ VFI:14) */ + + /* T24.13 */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* MTP index */ + loopback_pkt_type:4, /* Loopback packet type */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + oam_pkt:1, /* OAM Packet indicator */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + all_switch_drop:1, /* All switched copies dropped */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress Inner tag action */ + otag_action:2, /* Ingress Outer tag action */ + itag_status:2; /* Ingress Inner tag status */ + + union { /* T24.14 */ + struct { + uint32 timestamp_hi; /* Timestamp upper bits */ + } overlay1; + struct { + uint32 eh_tag_reserved:10, /* Reserved */ + eh_queue_tag: 16, /* HG2 EH queue tag */ + eh_tm:1, /* HG2 EH tm */ + eh_tag_type:2, /* HG2 EH tag type */ + eh_seg_sel:3; /* HG2 EH seg sel */ + } overlay2; + struct { + uint32 :11, /* Reserved */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_session_index:11; /* Rx BFD pkt session ID */ + } overlay3; + } word14; + + /* T24.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :10, /* Reserved */ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers. */ + pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb24_t; +#endif + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h new file mode 100644 index 000000000000..5f26aa7cb97c --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h @@ -0,0 +1,336 @@ +/* + * $Id: type26.h,v 1.5 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: soc/shared/dcbformats/type26.h + * Purpose: Define dma control block (DCB) format for a type26 DCB + * used by the 56850 (Trident2) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE26_H +#define _SOC_SHARED_DCBFORMATS_TYPE26_H + +/* + * DMA Control Block - Type 26 + * Used on 56850 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T26.0: physical address */ + /* T26.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + + /* T26.2 (word 12 in EP_TO_CPU_HDR) */ + uint32 reason_hi; /* CPU opcode (hi bits) */ + /* T26.3 (word 11 in EP_TO_CPU_HDR) */ + uint32 reason; /* CPU opcode (low bits) */ + +#ifdef LE_HOST + union { /* T26.4 (word 10 in EP_TO_CPU_HDR) */ + struct { + uint32 queue_num:12, /* Queue number for CPU packets */ + :4, /* Reserved */ + outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4; /* CPU opcode type */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + :10, /* Reserved */ + outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4; /* CPU opcode type */ + } overlay2; + } word4; + + /* T26.5 (word 9 in EP_TO_CPU_HDR) */ + uint32 srcport:7, /* Source port number */ + :1, /* Reserved */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T26.4 (word 10 in EP_TO_CPU_HDR) */ + struct { + uint32 cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12, /* Outer VLAN ID */ + :4, /* Reserved */ + queue_num:12; /* Queue number for CPU packets */ + } overlay1; + struct { + uint32 cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12, /* Outer VLAN ID */ + :10, /* Reserved */ + cpu_cos:6; /* CPU COS */ + } overlay2; + } word4; + + /* T26.5 (word 9 in EP_TO_CPU_HDR) */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + :1, /* Reserved */ + srcport:7; /* Source port number */ +#endif + + /* T26.6 (word 8 in EP_TO_CPU_HDR) */ + uint32 mh0; /* Module Header word 0 */ + /* T26.7 (word 7 in EP_TO_CPU_HDR) */ + uint32 mh1; /* Module Header word 1 */ + /* T26.8 (word 6 in EP_TO_CPU_HDR) */ + uint32 mh2; /* Module Header word 2 */ + /* T26.9 (word 5 in EP_TO_CPU_HDR) */ + uint32 mh3; /* Module Header word 3 */ + +#ifdef LE_HOST + /* T26.10 (word 4 in EP_TO_CPU_HDR) */ + uint32 inner_pri:3, /* Inner priority */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + regen_crc:1, /* Packet modified and needs new CRC */ + repl_nhi:17, /* Replication or Next Hop index */ + :2, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + :7; /* Reserved */ + + union { /* T26.11 (word 3 in EP_TO_CPU_HDR) */ + struct { + uint32 dscp:6, /* New DSCP */ + chg_tos:1, /* DSCP has been changed by HW */ + vntag_action:2, /* VN tag action */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + decap_tunnel_type:4,/* Tunnel type that was decapsulated */ + :1, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + mcq:1; /* Multicast queue */ + } overlay1; + struct { + uint32 special_pkt_type:3, /* Special packet type (OAM, BFD) */ + :29; /* Reserved */ + } overlay2; + } word11; + +#else + /* T26.10 (word 4 in EP_TO_CPU_HDR) */ + uint32 :7, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + :2, /* Reserved */ + repl_nhi:17, /* Replication or Next Hop index */ + regen_crc:1, /* Packet modified and needs new CRC */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + inner_pri:3; /* Inner priority */ + + union { /* T26.11 (word 3 in EP_TO_CPU_HDR) */ + struct { + uint32 mcq:1, /* Multicast queue */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :1, /* Reserved */ + decap_tunnel_type:4,/* Tunnel type that was decapsulated */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + vntag_action:2, /* VN tag action */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP */ + } overlay1; + struct { + uint32 :29, /* Reserved */ + special_pkt_type:3; /* Special packet type (OAM, BFD) */ + } overlay2; + } word11; + +#endif + /* T26.12 (word 2 in EP_TO_CPU_HDR) */ + uint32 timestamp; /* Timestamp */ + +#ifdef LE_HOST + /* T26.13 (word 1 in EP_TO_CPU_HDR) */ + uint32 tag_status:2, /* Ingress incoming tag status */ + otag_action:2, /* Ingress outer tag action */ + itag_action:2, /* Ingress inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + all_switch_drop:1, /* All switched copies dropped */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + special_pkt:1, /* Special Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + loopback_pkt_type:3, /* Loopback packet type */ + :1, /* Reserved */ + mtp_index:5, /* MTP index */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + union { /* T26.14 (word 0 in EP_TO_CPU_HDR) */ + uint32 timestamp_hi; /* Timestamp upper bits */ + struct { /* EH_TYPE_0 */ + uint32 eh_queue_tag:16, + :3, + eh_tag_type:2, + eh_seg_sel:3, + :3, + os1588_done:1, + eh_type:4; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 classid: 9, + l3_iif:14, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_queue_tag: 14, + classid:9, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay3; + struct { + uint32 rx_bfd_session_index:12, /* Rx BFD pkt session ID */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + :10; /* Reserved */ + } overlay4; + } word14; + + /* T26.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + pktdata_read_ecc_error:1, /* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers.*/ + :10, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T26.13 (word 1 in EP_TO_CPU_HDR) */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* MTP index */ + :1, /* Reserved */ + loopback_pkt_type:3, /* Loopback packet type */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + special_pkt:1, /* Special Packet indicator */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + all_switch_drop:1, /* All switched copies dropped */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress inner tag action */ + otag_action:2, /* Ingress outer tag action */ + tag_status:2; /* Ingress incoming tag status */ + + union { /* T26.14 (word 0 in EP_TO_CPU_HDR) */ + uint32 timestamp_hi; /* Timestamp upper bits */ + struct { /* EH_TYPE_0 */ + uint32 eh_type:4, + os1588_done:1, + :3, + eh_seg_sel:3, + eh_tag_type:2, + :3, + eh_queue_tag:16; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + l3_iif:14, + classid: 9; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + classid:9, + eh_queue_tag:14; + } overlay3; + struct { + uint32 :10, /* Reserved */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_session_index:12; /* Rx BFD pkt session ID */ + } overlay4; + } word14; + + /* T26.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :10, /* Reserved */ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers. */ + pktdata_read_ecc_error:1, /* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb26_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h new file mode 100644 index 000000000000..c06a7704e5ca --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h @@ -0,0 +1,340 @@ +/* + * $Id: type29.h,v 1.2 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: soc/shared/dcbformats/type29.h + * Purpose: Define dma control block (DCB) format for a type29 DCB + * used by the 56450 (Katana-2) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE29_H +#define _SOC_SHARED_DCBFORMATS_TYPE29_H + +/* + * DMA Control Block - Type 29 + * Used on 56450 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T29.0: physical address */ + /* T21.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + +#ifdef LE_HOST + union { /* T29.2 */ + struct { + uint32 reason_hi; /* CPU opcode (hi bits) */ + } overlay1; + struct { + uint32 reason_hi:18, + ma_ptr:13, /* OAM session pointer */ + :1; /* Reserved */ + } overlay2; + } word2; +#else + union { /* T29.2 */ + struct { + uint32 reason_hi; /* CPU opcode (hi bits) */ + } overlay1; + struct { + uint32 :1, /* Reserved */ + ma_ptr:13, /* OAM session pointer */ + reason_hi:18; + } overlay2; + } word2; +#endif + + uint32 reason; /* T29.3: CPU opcode (low bits) */ + +#ifdef LE_HOST + union { /* T29.4 */ + struct { + uint32 queue_num:16, /* Queue number for CPU packets */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + :26; /* Reserved */ + } overlay2; + struct { + uint32 queue_num:15, /* Queue number for CPU packets */ + olp_encap_oam_pkt:1,/* OLP encapsulated OAM packet */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay3; /* Overlay1 is not used in Saber2. + This is used instead */ + } word4; + + /* T29.5 */ + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T29.4 */ + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + queue_num:16; /* Queue number for CPU packets */ + } overlay1; + struct { + uint32 :26, /* Reserved */ + cpu_cos:6; /* CPU COS */ + } overlay2; + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + olp_encap_oam_pkt:1,/* OLP encapsulated OAM packet */ + queue_num:15; /* Queue number for CPU packets */ + } overlay3; /* Overlay1 is not used in Saber2. + This is used instead */ + } word4; + + /* T29.5 */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ +#endif + + uint32 mh0; /* T29.6: Module Header word 0 */ + uint32 mh1; /* T29.7: Module Header word 1 */ + uint32 mh2; /* T29.8: Module Header word 2 */ + uint32 mh3; /* T29.9: Module Header word 3 */ +#ifdef LE_HOST + /* T29.10 */ + uint32 inner_pri:3, /* Inner priority */ + regen_crc:1, /* Packet modified and needs new CRC */ + repl_nhi:19, /* Replication or Next Hop index */ + vfi_valid:1, /* Validates VFI field */ + orig_dest_pp_port:8; /* Original PP-destiantion-port */ + + union { /* T29.11 */ + struct { + uint32 dscp:6, /* New DSCP (+ oam pkt type:3) */ + chg_tos:1, /* DSCP has been changed by HW */ + vntag_action:2, /* VN tag action */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + decap_tunnel_type:5,/* Tunnel type that was decapsulated */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + ep_mirror:1; /* EP Redirected packet copied to CPU */ + } overlay1; + struct { + uint32 oam_command:4, /* Special packet type (OAM, BFD) */ + :28; /* Reserved */ + } overlay2; + } word11; + + union { /* T29.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 vfi:14, /* VFI or FID */ + :18; /* Reserved */ + } overlay2; + } word12; + + /* T29.13 */ + uint32 itag_status:2, /* Ingress Inner tag status */ + otag_action:2, /* Ingress Outer tag action */ + itag_action:2, /* Ingress Inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + all_switch_drop:1, /* All switched copies dropped */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + oam_pkt:1, /* OAM Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + loopback_pkt_type:4, /* Loopback packet type */ + mtp_index:5, /* MTP index */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + union { /* T29.14 */ + struct { + uint32 timestamp_hi; /* Timestamp upper bits */ + } overlay1; + struct { + uint32 eh_tag; /* Extension-Header TAG */ + } overlay2; + struct { + uint32 eh_queue_tag: 16, /* HG2 EH queue tag */ + eh_tag_type:2, /* HG2 EH tag type */ + eh_seg_sel:3, /* HG2 EH seg sel */ + :11; /* Reserved */ + } overlay3; + struct { + uint32 rx_bfd_session_index:13, /* Rx BFD pkt session ID */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + :9; /* Reserved */ + } overlay4; + } word14; + + /* T29.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers.*/ + :10, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T29.10 */ + uint32 orig_dest_pp_port:8, /* Original PP-destiantion-port */ + vfi_valid:1, /* Validates VFI field */ + repl_nhi:19, /* Replication or Next Hop index */ + regen_crc:1, /* Packet modified and needs new CRC */ + inner_pri:3; /* Inner priority */ + + union { /* T29.11 */ + struct { + uint32 ep_mirror:1, /* EP Redirected packet copied to CPU */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + decap_tunnel_type:5,/* Tunnel type that was decapsulated */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + vntag_action:2, /* VN tag action */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP (+ oam pkt type:3) */ + } overlay1; + struct { + uint32 :28, /* Reserved */ + oam_command:4; /* Special packet type (OAM, BFD) */ + } overlay2; + } word11; + + union { /* T29.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 :18, /* Reserved */ + vfi:14; /* VFI or FID */ + } overlay2; + } word12; + + /* T29.13 */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* MTP index */ + loopback_pkt_type:4, /* Loopback packet type */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + oam_pkt:1, /* OAM Packet indicator */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + all_switch_drop:1, /* All switched copies dropped */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress Inner tag action */ + otag_action:2, /* Ingress Outer tag action */ + itag_status:2; /* Ingress Inner tag status */ + + union { /* T29.14 */ + struct { + uint32 timestamp_hi; /* Timestamp upper bits */ + } overlay1; + struct { + uint32 eh_tag; /* Extension-Header TAG */ + } overlay2; + struct { + uint32 :11, /* Reserved */ + eh_seg_sel:3, /* HG2 EH seg sel */ + eh_tag_type:2, /* HG2 EH tag type */ + eh_queue_tag: 16; /* HG2 EH queue tag */ + } overlay3; + struct { + uint32 :9, /* Reserved */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_session_index:13; /* Rx BFD pkt session ID */ + } overlay4; + } word14; + + /* T29.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :10, /* Reserved */ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers. */ + pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb29_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_IP_3 3 +#endif + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h new file mode 100644 index 000000000000..faf428c8ff15 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h @@ -0,0 +1,252 @@ +/* + * $Id: type31.h,v 1.1.6.2 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: soc/shared/dcbformats/type31.h + * Purpose: Define dma control block (DCB) format for a type31 DCB + * used by the 53400 (Greyhound) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE31_H +#define _SOC_SHARED_DCBFORMATS_TYPE31_H + +/* + * DMA Control Block - Type 31 + * Used on 53400 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T31.0: physical address */ + /* T31.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + uint32 reason_hi; /* T31.2: CPU opcode (hi bits) */ + uint32 reason; /* T31.3: CPU opcode (low bits) */ +#ifdef LE_HOST + union { /* T31.4 */ + struct { + uint32 :16, /* Reserved */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + :26; /* Reserved */ + } overlay2; + } word4; + + /* T31.5 */ + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T31.4 */ + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + :16; /* Reserved */ + } overlay1; + struct { + uint32 :26, /* Reserved */ + cpu_cos:6; /* CPU COS */ + } overlay2; + } word4; + + /* T31.5 */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ +#endif + + uint32 mh0; /* T31.6: Module Header word 0 */ + uint32 mh1; /* T31.7: Module Header word 1 */ + uint32 mh2; /* T31.8: Module Header word 2 */ + uint32 mh3; /* T31.9: Module Header word 3 */ +#ifdef LE_HOST + /* T31.10 */ + uint32 inner_pri:3, /* Inner priority */ + regen_crc:1, /* Packet modified and needs new CRC */ + repl_nhi:12, /* Replication or Next Hop index */ + :5, /* reserved.*/ + shaping_cos_sel:2, /* */ + vfi_valid:1, /* Validates VFI field */ + em_mtp_index:4, /* em mirror-to-port index */ + oam_command:4; /* Special packet type (OAM, BFD) */ + + /* T31.11 */ + uint32 dscp:6, /* New DSCP (+ oam pkt type:3) */ + chg_tos:1, /* DSCP has been changed by HW */ + imirror:1, /* Ingress Mirroring PBE field*/ + emirror:1, /* Egress Mirroring, PBE field */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + :5, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + replicated:1; /* Replicated copy */ + + + + union { /* T29.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 vfi:14, /* VFI or FID */ + :18; /* Reserved */ + } overlay2; + } word12; + + /* T31.13 */ + uint32 itag_status:2, /* Ingress Inner tag status */ + otag_action:2, /* Ingress Outer tag action */ + itag_action:2, /* Ingress Inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + hg_lookup:1, /* Higig lookup */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + vntag_action:2, /* VNTAG/ETAG*/ + oam_pkt:1, /* OAM Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + cos:4, /* Port queue number */ + mtp_index:5, /* IM MTP index, PBE field */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + /* T31.14 */ + uint32 timestamp_hi; /* Timestamp upper bits */ + + /* T31.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + :12, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T31.10 */ + uint32 oam_command:4, /* Special packet type (OAM, BFD) */ + em_mtp_index:4, /* em mirror-to-port index */ + vfi_valid:1, /* Validates VFI field */ + shaping_cos_sel:2, /* */ + :5, /* reserved.*/ + repl_nhi:12, /* Replication or Next Hop index */ + regen_crc:1, /* Packet modified and needs new CRC */ + inner_pri:3; /* Inner priority */ + + /* T31.11 */ + uint32 replicated:1, /* Replicated copy */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :5, /* Reserved */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + emirror:1, /* Egress Mirroring, PBE field */ + imirror:1, /* Ingress Mirroring PBE field*/ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP (+ oam pkt type:3) */ + + union { /* T31.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 :18, /* Reserved */ + vfi:14; /* VFI or FID */ + } overlay2; + } word12; + + /* T31.13 */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* IM MTP index, PBE field */ + cos:4, /* Port queue number */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + oam_pkt:1, /* OAM Packet indicator */ + vntag_action:2, /* VNTAG/ETAG*/ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + hg_lookup:1, /* Higig lookup */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress Inner tag action */ + otag_action:2, /* Ingress Outer tag action */ + itag_status:2; /* Ingress Inner tag status */ + + + uint32 timestamp_hi; /* Timestamp upper bits */ + + /* T29.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :12, /* Reserved */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb31_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h new file mode 100644 index 000000000000..c2bc9d2db05a --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h @@ -0,0 +1,295 @@ +/* + * $Id: $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: soc/shared/dcbformats/type32.h + * Purpose: Define dma control block (DCB) format for a type32 DCB + * used by the 56960 (Tomahawk) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE32_H +#define _SOC_SHARED_DCBFORMATS_TYPE32_H + +/* + * DMA Control Block - Type 32 + * Used on 56960 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T31.0: physical address */ + /* T31.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + c_intr:2, /* Desc Intr Mode */ + :7; /* Don't care */ +#else + uint32 :7, /* Don't care */ + c_intr:2, /* Desc Intr Mode */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + + /* T31.2 (word 12 in EP_TO_CPU_HDR) */ + uint32 reason_hi; /* CPU opcode (hi bits) */ + /* T31.3 (word 11 in EP_TO_CPU_HDR) */ + uint32 reason; /* CPU opcode (low bits) */ + +#ifdef LE_HOST + /* T31.4 (word 10 in EP_TO_CPU_HDR) */ + uint32 cos:6, /* CPU COS or MMU COS */ + ucq:1, /* Unicast queue */ + :9, /* Reserved */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + + /* T31.5 (word 9 in EP_TO_CPU_HDR) */ + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + /* T31.4 (word 10 in EP_TO_CPU_HDR) */ + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + :9, /* Reserved */ + ucq:1, /* Unicast queue */ + cos:6; /* CPU COS or MMU COS */ + /* T31.5 (word 9 in EP_TO_CPU_HDR) */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ +#endif + + /* T31.6 (word 8 in EP_TO_CPU_HDR) */ + uint32 mh0; /* Module Header word 0 */ + /* T31.7 (word 7 in EP_TO_CPU_HDR) */ + uint32 mh1; /* Module Header word 1 */ + /* T31.8 (word 6 in EP_TO_CPU_HDR) */ + uint32 mh2; /* Module Header word 2 */ + /* T31.9 (word 5 in EP_TO_CPU_HDR) */ + uint32 mh3; /* Module Header word 3 */ + +#ifdef LE_HOST + /* T31.10 (word 4 in EP_TO_CPU_HDR) */ + uint32 inner_pri:3, /* Inner priority */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + regen_crc:1, /* Packet modified and needs new CRC */ + repl_nhi:17, /* Replication or Next Hop index */ + :2, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + :7; /* Reserved */ + + /* T31.11 (word 3 in EP_TO_CPU_HDR) */ + uint32 dscp:6, /* New DSCP */ + chg_tos:1, /* DSCP has been changed by HW */ + vntag_action:2, /* VN tag action */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + :1, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + :1; /* Reserved */ +#else + /* T31.10 (word 4 in EP_TO_CPU_HDR) */ + uint32 :7, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + :2, /* Reserved */ + repl_nhi:17, /* Replication or Next Hop index */ + regen_crc:1, /* Packet modified and needs new CRC */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + inner_pri:3; /* Inner priority */ + + /* T31.11 (word 3 in EP_TO_CPU_HDR) */ + uint32 :1, /* Reserved */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :1, /* Reserved */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + vntag_action:2, /* VN tag action */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP */ +#endif + /* T31.12 (word 2 in EP_TO_CPU_HDR) */ + uint32 timestamp; /* Timestamp */ + +#ifdef LE_HOST + /* T31.13 (word 1 in EP_TO_CPU_HDR) */ + uint32 tag_status:2, /* Ingress incoming tag status */ + otag_action:2, /* Ingress outer tag action */ + itag_action:2, /* Ingress inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + uc_switch_drop:1, /* Unicast switched copies dropped */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + special_pkt:1, /* Special Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + loopback_pkt_type:3, /* Loopback packet type */ + :1, /* Reserved */ + mtp_index:5, /* MTP index */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + union { /* T31.14 (word 0 in EP_TO_CPU_HDR) */ + uint32 timestamp_hi; /* Timestamp upper bits */ + struct { /* EH_TYPE_0 */ + uint32 eh_queue_tag:16, + :3, + eh_tag_type:2, + eh_seg_sel:3, + :3, + os1588_done:1, + eh_type:4; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 classid: 9, + l3_iif:14, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_queue_tag: 14, + classid:9, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay3; + struct { + uint32 rx_bfd_session_index:12, /* Rx BFD pkt session ID */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + :10; /* Reserved */ + } overlay4; + } word14; + + /* T31.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + :12, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T31.13 (word 1 in EP_TO_CPU_HDR) */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* MTP index */ + :1, /* Reserved */ + loopback_pkt_type:3, /* Loopback packet type */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + special_pkt:1, /* Special Packet indicator */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + uc_switch_drop:1, /* Unicast switched copies dropped */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress inner tag action */ + otag_action:2, /* Ingress outer tag action */ + tag_status:2; /* Ingress incoming tag status */ + + union { /* T31.14 (word 0 in EP_TO_CPU_HDR) */ + uint32 timestamp_hi; /* Timestamp upper bits */ + struct { /* EH_TYPE_0 */ + uint32 eh_type:4, + os1588_done:1, + :3, + eh_seg_sel:3, + eh_tag_type:2, + :3, + eh_queue_tag:16; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + l3_iif:14, + classid: 9; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + classid:9, + eh_queue_tag:14; + } overlay3; + struct { + uint32 :10, /* Reserved */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_session_index:12; /* Rx BFD pkt session ID */ + } overlay4; + } word14; + + /* T31.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :12, /* Reserved */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb32_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif /* _SOC_SHARED_DCBFOMATS_TYPE32_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h new file mode 100644 index 000000000000..68cb1faf58c9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h @@ -0,0 +1,329 @@ +/* + * $Id$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: soc/shared/dcbformats/type33.h + * Purpose: Define dma control block (DCB) format for a type33 DCB + * used by the 56860 (TD2+) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE33_H +#define _SOC_SHARED_DCBFORMATS_TYPE33_H + +/* + * DMA Control Block - Type 33 + * Used on 56860 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T33.0: physical address */ + /* T33.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + c_intr:2, /* Desc Intr Mode */ + :7; /* Don't care */ +#else + uint32 :7, /* Don't care */ + c_intr:2, /* Desc Intr Mode */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + + /* T33.2 (word 12 in EP_TO_CPU_HDR) */ + uint32 reason_hi; /* CPU opcode (hi bits) */ + /* T33.3 (word 11 in EP_TO_CPU_HDR) */ + uint32 reason; /* CPU opcode (low bits) */ + +#ifdef LE_HOST + union { /* T33.4 (word 10 in EP_TO_CPU_HDR) */ + struct { + uint32 queue_num:12, /* Queue number for CPU packets */ + :4, /* Reserved */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + :10, /* Reserved */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay2; + } word4; + + /* T33.5 (word 9 in EP_TO_CPU_HDR) */ + uint32 srcport:7, /* Source port number */ + :1, /* Reserved */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T33.4 (word 10 in EP_TO_CPU_HDR) */ + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + :4, /* Reserved */ + queue_num:12; /* Queue number for CPU packets */ + } overlay1; + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + :10, /* Reserved */ + cpu_cos:6; /* CPU COS */ + } overlay2; + } word4; + + /* T33.5 (word 9 in EP_TO_CPU_HDR) */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + :1, /* Reserved */ + srcport:7; /* Source port number */ +#endif + /* T33.6 (word 8 in EP_TO_CPU_HDR) */ + uint32 mh0; /* Module Header word 0 */ + /* T33.7 (word 7 in EP_TO_CPU_HDR) */ + uint32 mh1; /* Module Header word 1 */ + /* T33.8 (word 6 in EP_TO_CPU_HDR) */ + uint32 mh2; /* Module Header word 2 */ + /* T33.9 (word 5 in EP_TO_CPU_HDR) */ + uint32 mh3; /* Module Header word 3 */ + +#ifdef LE_HOST + /* T33.10 (word 4 in EP_TO_CPU_HDR) */ + uint32 inner_pri:3, /* Inner priority */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + regen_crc:1, /* Packet modified and needs new CRC */ + repl_nhi:17, /* Replication or Next Hop index */ + :2, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + :7; /* Reserved */ + + union { /* T33.11 (word 3 in EP_TO_CPU_HDR) */ + struct { + uint32 dscp:6, /* New DSCP */ + chg_tos:1, /* DSCP has been changed by HW */ + vntag_action:2, /* VN tag action */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + :1, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + mcq:1; /* Multicast queue */ + } overlay1; + + struct { + uint32 special_pkt_type:3, /* Special packet type (OAM, BFD) */ + :29; + } overlay2; + } word3; +#else + /* T33.10 (word 4 in EP_TO_CPU_HDR) */ + uint32 :7, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + :2, /* Reserved */ + repl_nhi:17, /* Replication or Next Hop index */ + regen_crc:1, /* Packet modified and needs new CRC */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + inner_pri:3; /* Inner priority */ + + union { /* T33.11 (word 3 in EP_TO_CPU_HDR) */ + struct { + uint32 mcq:1, /* Multicast queue */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :1, /* Reserved */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + vntag_action:2, /* VN tag action */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP */ + } overlay1; + + struct { + uint32 :29, + special_pkt_type:3; + } overlay2; + } word3; +#endif + /* T33.12 (word 2 in EP_TO_CPU_HDR) */ + uint32 timestamp; /* Timestamp */ + +#ifdef LE_HOST + /* T33.13 (word 1 in EP_TO_CPU_HDR) */ + uint32 tag_status:2, /* Ingress incoming tag status */ + otag_action:2, /* Ingress outer tag action */ + itag_action:2, /* Ingress inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + all_switch_drop:1, /* All switched copies dropped */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + special_pkt:1, /* Special Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + loopback_pkt_type:3, /* Loopback packet type */ + :1, /* Reserved */ + mtp_index:5, /* MTP index */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + union { /* T33.14 (word 0 in EP_TO_CPU_HDR) */ + uint32 timestamp_hi; /* Timestamp upper bits */ + struct { /* EH_TYPE_0 */ + uint32 eh_queue_tag:16, + :3, + eh_tag_type:2, + eh_seg_sel:3, + :3, + os1588_done:1, + eh_type:4; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 classid: 9, + l3_iif:14, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_queue_tag: 14, + classid:9, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay3; + struct { + uint32 rx_bfd_session_index:12, /* Rx BFD pkt session ID */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + :10; /* Reserved */ + } overlay4; + } word14; + + /* T33.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + :12, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T33.13 (word 1 in EP_TO_CPU_HDR) */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* MTP index */ + :1, /* Reserved */ + loopback_pkt_type:3, /* Loopback packet type */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + special_pkt:1, /* Special Packet indicator */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + all_switch_drop:1, /* All switched copies dropped */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress inner tag action */ + otag_action:2, /* Ingress outer tag action */ + tag_status:2; /* Ingress incoming tag status */ + + union { /* T33.14 (word 0 in EP_TO_CPU_HDR) */ + uint32 timestamp_hi; /* Timestamp upper bits */ + struct { /* EH_TYPE_0 */ + uint32 eh_type:4, + os1588_done:1, + :3, + eh_seg_sel:3, + eh_tag_type:2, + :3, + eh_queue_tag:16; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + l3_iif:14, + classid: 9; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + classid:9, + eh_queue_tag:14; + } overlay3; + struct { + uint32 :10, /* Reserved */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_session_index:12; /* Rx BFD pkt session ID */ + } overlay4; + } word14; + + /* T33.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :12, /* Reserved */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb33_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif /* _SOC_SHARED_DCBFOMATS_TYPE33_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h new file mode 100644 index 000000000000..893696fae9a8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h @@ -0,0 +1,252 @@ +/* + * $Id: $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: soc/shared/dcbformats/type34.h + * Purpose: Define dma control block (DCB) format for a type34 DCB + * used by the 56160 (Hurricane3) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE34_H +#define _SOC_SHARED_DCBFORMATS_TYPE34_H + +/* + * DMA Control Block - Type 34 + * Used on 56160 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T34.0: physical address */ + /* T34.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + uint32 reason_hi; /* T34.2: CPU opcode (hi bits) */ + uint32 reason; /* T34.3: CPU opcode (low bits) */ +#ifdef LE_HOST + union { /* T34.4 */ + struct { + uint32 :16, /* Reserved */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + regen_crc:1, /* Packet modified and needs new CRC */ + :25; /* Reserved */ + } overlay2; + } word4; + + /* T34.5 */ + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T34.4 */ + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + :16; /* Reserved */ + } overlay1; + struct { + uint32 :25, /* Reserved */ + regen_crc:1, /* Packet modified and needs new CRC */ + cpu_cos:6; /* CPU COS */ + } overlay2; + } word4; + + /* T34.5 */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ +#endif + + uint32 mh0; /* T34.6: Module Header word 0 */ + uint32 mh1; /* T34.7: Module Header word 1 */ + uint32 mh2; /* T34.8: Module Header word 2 */ + uint32 mh3; /* T34.9: Module Header word 3 */ +#ifdef LE_HOST + /* T34.10 */ + uint32 inner_pri:3, /* Inner priority */ + repl_nhi:13, /* Replication or Next Hop index */ + :5, /* reserved.*/ + shaping_cos_sel:2, /* */ + vfi_valid:1, /* Validates VFI field */ + em_mtp_index:4, /* em mirror-to-port index */ + oam_command:4; /* Special packet type (OAM, BFD) */ + + /* T34.11 */ + uint32 dscp:6, /* New DSCP (+ oam pkt type:3) */ + chg_tos:1, /* DSCP has been changed by HW */ + imirror:1, /* Ingress Mirroring PBE field*/ + emirror:1, /* Egress Mirroring, PBE field */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + :5, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + replicated:1; /* Replicated copy */ + + + + union { /* T34.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 vfi:14, /* VFI or FID */ + :18; /* Reserved */ + } overlay2; + } word12; + + /* T34.13 */ + uint32 itag_status:2, /* Ingress Inner tag status */ + otag_action:2, /* Ingress Outer tag action */ + itag_action:2, /* Ingress Inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + hg_lookup:1, /* Higig lookup */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + vntag_action:2, /* VNTAG/ETAG*/ + oam_pkt:1, /* OAM Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + cos:4, /* Port queue number */ + mtp_index:5, /* IM MTP index, PBE field */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + /* T34.14 */ + uint32 timestamp_hi; /* Timestamp upper bits */ + + /* T34.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + :12, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T34.10 */ + uint32 oam_command:4, /* Special packet type (OAM, BFD) */ + em_mtp_index:4, /* em mirror-to-port index */ + vfi_valid:1, /* Validates VFI field */ + shaping_cos_sel:2, /* */ + :5, /* reserved.*/ + repl_nhi:13, /* Replication or Next Hop index */ + inner_pri:3; /* Inner priority */ + + /* T34.11 */ + uint32 replicated:1, /* Replicated copy */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :5, /* Reserved */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + emirror:1, /* Egress Mirroring, PBE field */ + imirror:1, /* Ingress Mirroring PBE field*/ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP (+ oam pkt type:3) */ + + union { /* T34.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 :18, /* Reserved */ + vfi:14; /* VFI or FID */ + } overlay2; + } word12; + + /* T34.13 */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* IM MTP index, PBE field */ + cos:4, /* Port queue number */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + oam_pkt:1, /* OAM Packet indicator */ + vntag_action:2, /* VNTAG/ETAG*/ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + hg_lookup:1, /* Higig lookup */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress Inner tag action */ + otag_action:2, /* Ingress Outer tag action */ + itag_status:2; /* Ingress Inner tag status */ + + + uint32 timestamp_hi; /* Timestamp upper bits */ + + /* T34.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :12, /* Reserved */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb34_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h new file mode 100644 index 000000000000..9f377ec99117 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h @@ -0,0 +1,329 @@ +/* + * $Id$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: soc/shared/dcbformats/type35.h + * Purpose: Define dma control block (DCB) format for a type35 DCB + * used by the 56560 (APACHE) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE35_H +#define _SOC_SHARED_DCBFORMATS_TYPE35_H + +/* + * DMA Control Block - Type 35 + * Used on 56560 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T32.0: physical address */ + /* T32.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + + /* T32.2 (word 12 in EP_TO_CPU_HDR) */ + uint32 reason_hi; /* CPU opcode (hi bits) */ + /* T32.3 (word 11 in EP_TO_CPU_HDR) */ + uint32 reason; /* CPU opcode (low bits) */ + +#ifdef LE_HOST + union { /* T26.4 (word 10 in EP_TO_CPU_HDR) */ + struct { + uint32 queue_num:15, /* Queue number for CPU packets */ + ep_mirror:1, /* EP_MIRROR */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + :10, /* Reserved */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay2; + } word4; + + /* T26.5 (word 9 in EP_TO_CPU_HDR) */ + uint32 srcport:7, /* Source port number */ + :1, /* Reserved */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T26.4 (word 10 in EP_TO_CPU_HDR) */ + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + ep_mirror:1, /* EP_MIRROR */ + queue_num:15; /* Queue number for CPU packets */ + } overlay1; + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + :10, /* Reserved */ + cpu_cos:6; /* CPU COS */ + } overlay2; + } word4; + + /* T26.5 (word 9 in EP_TO_CPU_HDR) */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + :1, /* Reserved */ + srcport:7; /* Source port number */ +#endif + /* T32.6 (word 8 in EP_TO_CPU_HDR) */ + uint32 mh0; /* Module Header word 0 */ + /* T32.7 (word 7 in EP_TO_CPU_HDR) */ + uint32 mh1; /* Module Header word 1 */ + /* T32.8 (word 6 in EP_TO_CPU_HDR) */ + uint32 mh2; /* Module Header word 2 */ + /* T32.9 (word 5 in EP_TO_CPU_HDR) */ + uint32 mh3; /* Module Header word 3 */ + +#ifdef LE_HOST + /* T32.10 (word 4 in EP_TO_CPU_HDR) */ + uint32 inner_pri:3, /* Inner priority */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + regen_crc:1, /* Packet modified and needs new CRC */ + repl_nhi:17, /* Replication or Next Hop index */ + :2, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + olp_encap_oam_pkt:1, /* OLP encapsulated OAM packet */ + :6; /* Reserved */ + + union { /* T33.11 (word 3 in EP_TO_CPU_HDR) */ + struct { + uint32 dscp:6, /* New DSCP */ + chg_tos:1, /* DSCP has been changed by HW */ + vntag_action:2, /* VN tag action */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + :1, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + mcq:1; /* Multicast queue */ + } overlay1; + + struct { + uint32 special_pkt_type:3, /* Special packet type (OAM, BFD) */ + :29; + } overlay2; + } word3; +#else + /* T32.10 (word 4 in EP_TO_CPU_HDR) */ + uint32 :6, /* Reserved */ + olp_encap_oam_pkt:1, /* OLP encapsulated OAM packet */ + vfi_valid:1, /* Validates VFI field */ + :2, /* Reserved */ + repl_nhi:17, /* Replication or Next Hop index */ + regen_crc:1, /* Packet modified and needs new CRC */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + inner_pri:3; /* Inner priority */ + + union { /* T33.11 (word 3 in EP_TO_CPU_HDR) */ + struct { + uint32 mcq:1, /* Multicast queue */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :1, /* Reserved */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + vntag_action:2, /* VN tag action */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP */ + } overlay1; + + struct { + uint32 :29, + special_pkt_type:3; + } overlay2; + } word3; +#endif + /* T32.12 (word 2 in EP_TO_CPU_HDR) */ + uint32 timestamp; /* Timestamp */ + +#ifdef LE_HOST + /* T32.13 (word 1 in EP_TO_CPU_HDR) */ + uint32 tag_status:2, /* Ingress incoming tag status */ + otag_action:2, /* Ingress outer tag action */ + itag_action:2, /* Ingress inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + all_switch_drop:1, /* All switched copies dropped */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + special_pkt:1, /* Special Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + loopback_pkt_type:3, /* Loopback packet type */ + :1, /* Reserved */ + mtp_index:5, /* MTP index */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + union { /* T32.14 (word 0 in EP_TO_CPU_HDR) */ + uint32 timestamp_hi; /* Timestamp upper bits */ + struct { /* EH_TYPE_0 */ + uint32 eh_queue_tag:16, + :3, + eh_tag_type:2, + eh_seg_sel:3, + :3, + os1588_done:1, + eh_type:4; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 classid: 9, + l3_iif:14, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_queue_tag: 14, + classid:9, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay3; + struct { + uint32 rx_bfd_session_index:12, /* Rx BFD pkt session ID */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + :10; /* Reserved */ + } overlay4; + } word14; + + /* T32.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + :12, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T32.13 (word 1 in EP_TO_CPU_HDR) */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* MTP index */ + :1, /* Reserved */ + loopback_pkt_type:3, /* Loopback packet type */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + special_pkt:1, /* Special Packet indicator */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + all_switch_drop:1, /* All switched copies dropped */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress inner tag action */ + otag_action:2, /* Ingress outer tag action */ + tag_status:2; /* Ingress incoming tag status */ + + union { /* T32.14 (word 0 in EP_TO_CPU_HDR) */ + uint32 timestamp_hi; /* Timestamp upper bits */ + struct { /* EH_TYPE_0 */ + uint32 eh_type:4, + os1588_done:1, + :3, + eh_seg_sel:3, + eh_tag_type:2, + :3, + eh_queue_tag:16; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + l3_iif:14, + classid: 9; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + classid:9, + eh_queue_tag:14; + } overlay3; + struct { + uint32 :10, /* Reserved */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_session_index:12; /* Rx BFD pkt session ID */ + } overlay4; + } word14; + + /* T32.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :12, /* Reserved */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb35_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif /* _SOC_SHARED_DCBFORMATS_TYPE35_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h new file mode 100644 index 000000000000..daa98ea802f1 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h @@ -0,0 +1,359 @@ +/* + * $Id: $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: soc/shared/dcbformats/type36.h + * Purpose: Define dma control block (DCB) format for a type36 DCB + * used by the 56870 (Trident 3) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE36_H +#define _SOC_SHARED_DCBFORMATS_TYPE36_H + +/* + * DMA Control Block - Type 36 + * Used on 56870 devices + * 4 words + */ +typedef struct { + uint32 addr_lo; /* T36.0: physical address, lower 32 bits */ + uint32 addr_hi; /* T36.0: physical address, upper 32 bits */ + +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + :2, /* reserved */ + c_purge:1, /* Purge packet (TX) */ + c_intr:2, /* Desc Intr Mode */ + c_desc:4, /* descriptors remaining */ + c_desc_status:1, /* disable descriptor status write */ + :2; /* reserved */ +#else + uint32 :2, /* resered */ + c_desc_status:1, /* disable descriptor status write */ + c_desc:4, /* descriptors remaining */ + c_intr:2, /* Desc Intr Mode */ + c_purge:1, /* Purge packet (TX) */ + :2, /* reserved */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + +#ifdef LE_HOST + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + ecc_error:1, /* packet ECC Error (RX) */ + :11, /* Reserved */ + done:1; /* Descriptor Done */ +#else + uint32 done:1, /* Descriptor Done */ + :11, /* Reserved */ + ecc_error:1, /* Packet ECC Error (RX) */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb36_t; + +typedef struct { + uint32 mh0; /* Module Header word 0 */ + /* (word 14 in EP_TO_CPU_HDR) */ + uint32 mh1; /* Module Header word 1 */ + /* (word 13 in EP_TO_CPU_HDR) */ + uint32 mh2; /* Module Header word 2 */ + /* (word 12 in EP_TO_CPU_HDR) */ + uint32 mh3; /* Module Header word 3 */ + /* (word 11 in EP_TO_CPU_HDR) */ + + /* (word 10 in EP_TO_CPU_HDR) */ + /* word 9 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 reason_hi; /* CPU opcode (hi bits) */ + + /* (word 9 in EP_TO_CPU_HDR) */ + /* word 8 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 reason; /* CPU opcode (low bits) */ + +#ifdef LE_HOST + /* (word 8 in EP_TO_CPU_HDR) */ + /* word 7 in EP_TO_CPU_COMPOSITES_BUS */ + union { + struct { + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + cpu_cos:6, /* CPU COS*/ + ecn:2, /* New ECN value */ + chg_ecn:1, /* ECN changed */ + bfd_session_index_valid:1; /* Indicate a BFD terminated packet */ + } overlay1; + struct { + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + queue_num:6, /* MMU COS*/ + ecn:2, /* New ECN value */ + chg_ecn:1, /* ECN changed */ + bfd_session_index_valid:1; /* Indicate a BFD terminated packet */ + } overlay2; + } word8; + +#else + /* (word 8 in EP_TO_CPU_HDR) */ + /* word 7 in EP_TO_CPU_COMPOSITES_BUS */ + union { + struct { + uint32 bfd_session_index_valid:1, /* Indicate a BFD terminated packet */ + chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + cpu_cos:6, /* CPU COS*/ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ + } overlay1; + struct { + uint32 bfd_session_index_valid:1, /* Indicate a BFD terminated packet */ + chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + queue_num:6, /* MMU COS*/ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ + } overlay2; + } word8; +#endif + + +#ifdef LE_HOST + /* (word 7 in EP_TO_CPU_HDR) */ + /* word 6 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 nhi_a_hi:7, /* NEXT_HOP_INDEX_A (Underlay) */ + nhi_type:2, /* Type for NEXT_HOP_INDEX_A and B */ + match_rule:8, /* Matched FP rule */ + forwarding_type:2, /* Packet forwarding type */ + ucq:1, /* Unicast queue */ + outer_vid:12; /* Outer VLAN ID */ + + /* (word 6 in EP_TO_CPU_HDR) */ + /* word 5 in EP_TO_CPU_COMPOSITES_BUS */ + + union { + struct { + uint32 outer_pri:3, /* Outer priority */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_pri:3, /* Inner priority */ + nhi_b:16, /* NEXT_HOP_INDEX_B (Overlay) */ + nhi_a_lo:9; /* NEXT_HOP_INDEX_A (Underlay) */ + } overlay1; + struct { + uint32 outer_pri:3, /* Outer priority */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_pri:3, /* Inner priority */ + bfd_session_index:12, /* Indicates the Session ID for the Rx BFD packet */ + :4, /* Reserved */ + nhi_a_lo:9; /* NEXT_HOP_INDEX_A (Underlay) */ + } overlay2; + } word6; /* (word 5 in EP_TO_CPU_HDR) */ + /* word 4 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 mtp_index:5, /* MTP index */ + dscp:6, /* New DSCP */ + chg_tos:1, /* DSCP has been changed by HW */ + vntag_action:2, /* VN tag action */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + decap_tunnel_type:5, /* Tunnel type that was decapsulated */ + inner_vid:12; /* Inner VLAN ID */ + +#else + /* (word 7 in EP_TO_CPU_HDR) */ + /* word 6 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 outer_vid:12, /* Outer VLAN ID */ + ucq:1, /* Unicast queue */ + forwarding_type:2, /* Packet forwarding type */ + match_rule:8, /* Matched FP rule */ + nhi_type:2, /* Type for NEXT_HOP_INDEX_A and B */ + nhi_a_hi:7; /* NEXT_HOP_INDEX_A (Underlay) */ + + /* (word 6 in EP_TO_CPU_HDR) */ + /* word 5 in EP_TO_CPU_COMPOSITES_BUS */ + union { + struct { + uint32 nhi_a_lo:9, /* NEXT_HOP_INDEX_A (Underlay) */ + nhi_b:16, /* NEXT_HOP_INDEX_B (Overlay) */ + inner_pri:3, /* Inner priority */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + outer_pri:3; /* Outer priority */ + } overlay1; + struct { + uint32 nhi_a_lo:9, /* NEXT_HOP_INDEX_A (Underlay) */ + :4, /* Reserved */ + bfd_session_index:12, /* Indicates the Session ID for the Rx BFD packet */ + inner_pri:3, /* Inner priority */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + outer_pri:3; /* Outer priority */ + } overlay2; + + } word6; + /* (word 5 in EP_TO_CPU_HDR) */ + /* word 4 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 inner_vid:12, /* Inner VLAN ID */ + decap_tunnel_type:5, /* Tunnel type that was decapsulated */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + vntag_action:2, /* VN tag action */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6, /* New DSCP */ + mtp_index:5; /* MTP index */ +#endif + + /* (word 4 in EP_TO_CPU_HDR) */ + /* word 3 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 timestamp; /* Timestamp */ + +#ifdef LE_HOST + /* (word 3 in EP_TO_CPU_HDR) */ + /* word 2 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 bpdu:1, /* BPDU Packet */ + :2, /* Reserved */ + hg_lookup_pkt:1, /* Higig Lookup Packet */ + vrf:12, /* VRF */ + timestamp_type:2, /* Timestamp type */ + l3_iif:14; /* L3 IIF */ + + /* (word 2 in EP_TO_CPU_HDR) */ + /* word 1 in EP_TO_CPU_COMPOSITES_BUS*/ + uint32 match_id_hi:18, /* Packet MATCH_ID upper bits*/ + otag_action:2, /* Ingress outer tag action */ + itag_action:2, /* Ingress inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + uc_switch_drop:1, /* Unicast switched copies dropped */ + src_hg:1, /* Source is Higig */ + forwarding_zone_id:3, /* Indicates packet was routed - UC or MC */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + do_not_change_ttl:1; /* Do not change TTL */ + + /* (word 1 in EP_TO_CPU_HDR) */ + /* word 0 in EP_TO_CPU_COMPOSITES_BUS*/ + uint32 match_id_lo; /* Packet MATCH_ID lower bits*/ + + union { /* (word 0 in EP_TO_CPU_HDR) */ + struct { /* EH_TYPE_0 */ + uint32 eh_queue_tag:16, + :3, + eh_tag_type:2, + eh_seg_sel:3, + :3, + os1588_done:1, + eh_type:4; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 classid: 9, + l3_iif:14, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_queue_tag: 14, + classid:9, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay3; + } word16; + +#else + /* (word 3 in EP_TO_CPU_HDR) */ + /* word 2 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 l3_iif:14, /* L3 IIF */ + timestamp_type:2, /* Timestamp type */ + vrf:12, /* VRF */ + hg_lookup_pkt:1, /* Higig Lookup Packet */ + :2, /* Reserved */ + bpdu:1; /* BPDU Packet */ + + /* (word 2 in EP_TO_CPU_HDR) */ + /* word 1 in EP_TO_CPU_COMPOSITES_BUS*/ + uint32 do_not_change_ttl:1, /* Do not change TTL */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + forwarding_zone_id:3, /* Indicates packet was routed - UC or MC */ + src_hg:1, /* Source is Higig */ + uc_switch_drop:1, /* Unicast switched copies dropped */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress inner tag action */ + otag_action:2, /* Ingress outer tag action */ + match_id_hi:18; /* Packet MATCH_ID upper bits*/ + + /* (word 1 in EP_TO_CPU_HDR) */ + /* word 0 in EP_TO_CPU_COMPOSITES_BUS*/ + uint32 match_id_lo; /* Packet MATCH_ID lower bits*/ + + union { /* (word 0 in EP_TO_CPU_HDR) */ + struct { /* EH_TYPE_0 */ + uint32 eh_type:4, + os1588_done:1, + :3, + eh_seg_sel:3, + eh_tag_type:2, + :3, + eh_queue_tag:16; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + l3_iif:14, + classid: 9; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + classid:9, + eh_queue_tag:14; + } overlay3; + } word16; +#endif + + uint32 rsvd; /* padding to get header to 16 words */ +} ep_to_cpu_hdr36_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif /* _SOC_SHARED_DCBFORMATS_TYPE36_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h new file mode 100644 index 000000000000..294998d3d39a --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h @@ -0,0 +1,252 @@ +/* + * $Id: $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: soc/shared/dcbformats/type37.h + * Purpose: Define dma control block (DCB) format for a type37 DCB + * used by the 53570 (Greyhound2) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE37_H +#define _SOC_SHARED_DCBFORMATS_TYPE37_H + +/* + * DMA Control Block - Type 37 + * Used on 53570 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T37.0: physical address */ + /* T37.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + uint32 reason_hi; /* T37.2: CPU opcode (hi bits) */ + uint32 reason; /* T37.3: CPU opcode (low bits) */ +#ifdef LE_HOST + union { /* T37.4 */ + struct { + uint32 :16, /* Reserved */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + regen_crc:1, /* Packet modified and needs new CRC */ + :25; /* Reserved */ + } overlay2; + } word4; + + /* T37.5 */ + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T37.4 */ + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + :16; /* Reserved */ + } overlay1; + struct { + uint32 :25, /* Reserved */ + regen_crc:1, /* Packet modified and needs new CRC */ + cpu_cos:6; /* CPU COS */ + } overlay2; + } word4; + + /* T37.5 */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ +#endif + + uint32 mh0; /* T37.6: Module Header word 0 */ + uint32 mh1; /* T37.7: Module Header word 1 */ + uint32 mh2; /* T37.8: Module Header word 2 */ + uint32 mh3; /* T37.9: Module Header word 3 */ +#ifdef LE_HOST + /* T37.10 */ + uint32 inner_pri:3, /* Inner priority */ + repl_nhi:13, /* Replication or Next Hop index */ + :5, /* reserved.*/ + shaping_cos_sel:2, /* */ + vfi_valid:1, /* Validates VFI field */ + em_mtp_index:4, /* em mirror-to-port index */ + oam_command:4; /* Special packet type (OAM, BFD) */ + + /* T37.11 */ + uint32 dscp:6, /* New DSCP (+ oam pkt type:3) */ + chg_tos:1, /* DSCP has been changed by HW */ + imirror:1, /* Ingress Mirroring PBE field*/ + emirror:1, /* Egress Mirroring, PBE field */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + :5, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + replicated:1; /* Replicated copy */ + + + + union { /* T37.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 vfi:14, /* VFI or FID */ + :18; /* Reserved */ + } overlay2; + } word12; + + /* T37.13 */ + uint32 itag_status:2, /* Ingress Inner tag status */ + otag_action:2, /* Ingress Outer tag action */ + itag_action:2, /* Ingress Inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + hg_lookup:1, /* Higig lookup */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + vntag_action:2, /* VNTAG/ETAG*/ + oam_pkt:1, /* OAM Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + cos:4, /* Port queue number */ + mtp_index:5, /* IM MTP index, PBE field */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + /* T37.14 */ + uint32 timestamp_hi; /* Timestamp upper bits */ + + /* T37.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + :12, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T37.10 */ + uint32 oam_command:4, /* Special packet type (OAM, BFD) */ + em_mtp_index:4, /* em mirror-to-port index */ + vfi_valid:1, /* Validates VFI field */ + shaping_cos_sel:2, /* */ + :5, /* reserved.*/ + repl_nhi:13, /* Replication or Next Hop index */ + inner_pri:3; /* Inner priority */ + + /* T37.11 */ + uint32 replicated:1, /* Replicated copy */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :5, /* Reserved */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + emirror:1, /* Egress Mirroring, PBE field */ + imirror:1, /* Ingress Mirroring PBE field*/ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP (+ oam pkt type:3) */ + + union { /* T37.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 :18, /* Reserved */ + vfi:14; /* VFI or FID */ + } overlay2; + } word12; + + /* T37.13 */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* IM MTP index, PBE field */ + cos:4, /* Port queue number */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + oam_pkt:1, /* OAM Packet indicator */ + vntag_action:2, /* VNTAG/ETAG*/ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + hg_lookup:1, /* Higig lookup */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress Inner tag action */ + otag_action:2, /* Ingress Outer tag action */ + itag_status:2; /* Ingress Inner tag status */ + + + uint32 timestamp_hi; /* Timestamp upper bits */ + + /* T37.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :12, /* Reserved */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb37_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h new file mode 100644 index 000000000000..141b4c150a86 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h @@ -0,0 +1,289 @@ +/* + * $Id: $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: soc/shared/dcbformats/type38.h + * Purpose: Define dma control block (DCB) format for a type38 DCB + * used by the 56980 (Tomahawk 3) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE38_H +#define _SOC_SHARED_DCBFORMATS_TYPE38_H + +/* + * DMA Control Block - Type 38 + * Used on 56980 devices + * 16 words + */ +/* Tomahawk 3 CMICX DCB */ +typedef struct { + uint32 addr_lo; /* T36.0: physical address, lower 32 bits */ + uint32 addr_hi; /* T36.0: physical address, upper 32 bits */ + +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + :2, /* reserved */ + c_purge:1, /* Purge packet (TX) */ + c_intr:2, /* Desc Intr Mode */ + c_desc:4, /* descriptors remaining */ + c_desc_status:1, /* disable descriptor status write */ + :2; /* reserved */ +#else + uint32 :2, /* resered */ + c_desc_status:1, /* disable descriptor status write */ + c_desc:4, /* descriptors remaining */ + c_intr:2, /* Desc Intr Mode */ + c_purge:1, /* Purge packet (TX) */ + :2, /* reserved */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + +#ifdef LE_HOST + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + ecc_error:1, /* packet ECC Error (RX) */ + :11, /* Reserved */ + done:1; /* Descriptor Done */ +#else + uint32 done:1, /* Descriptor Done */ + :11, /* Reserved */ + ecc_error:1, /* Packet ECC Error (RX) */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb38_t; + +/* EP_TO_CPU_HDR + * - MODULE_HDR [288:415] WORD9 - WORD12 + * - EP_TO_CPU_COMPOSITES_BUS [ 0:287] WORD0 - WORD8 + */ +typedef struct { + uint32 mh0; /* WORD12 in EP_TO_CPU_HDR */ + uint32 mh1; /* WORD11 in EP_TO_CPU_HDR */ + uint32 mh2; /* WORD10 in EP_TO_CPU_HDR */ + uint32 mh3; /* WORD9 in EP_TO_CPU_HDR */ + + /* WORD8 in EP_TO_CPU_HDR */ + /* WORD8 in EP_TO_CPU_COMPOSITES_BUS */ +#ifdef LE_HOST + uint32 timestamp_hi:16, /* TIMESTAMP_HI [256:271] 16 */ + timestamp_type:2, /* TIMESTAMP_TYPE [272:273] 2 */ + decap_tunnel_type:5, /* TUNNEL_DECAP_TYPE [274:278] 5 */ + uc_switch_drop:1, /* UC_SW_COPY_DROPPED [279:279] 1 */ + ucq:1, /* UNICAST_QUEUE [280:280] 1 */ + :7; /* RESERVED [281:287] 7 */ +#else + uint32 :7, /* RESERVED [281:287] 7 */ + ucq:1, /* UNICAST_QUEUE [280:280] 1 */ + uc_switch_drop:1, /* UC_SW_COPY_DROPPED [279:279] 1 */ + decap_tunnel_type:5, /* TUNNEL_DECAP_TYPE [274:278] 5 */ + timestamp_type:2, /* TIMESTAMP_TYPE [272:273] 2 */ + timestamp_hi:16; /* TIMESTAMP_HI [256:271] 16 */ +#endif + + /* WORD7 in EP_TO_CPU_HDR */ + /* WORD7 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 timestamp; /* TIMESTAMP [224:255] 32 */ + + /* WORD6 in EP_TO_CPU_HDR */ + /* WORD6 in EP_TO_CPU_COMPOSITES_BUS */ +#ifdef LE_HOST + uint32 :2, /* RESERVED [192:193] 2 */ + entropy_label:20, /* ENTROPY LABEL [194:213] 20 */ + special_pkt_indicator:1, /* SPECIAL_PACKET_INDICATOR [214:214] 1 */ + srcport:8, /* SRC_PORT_NUM [215:222] 8 */ + switch_pkt:1; /* SWITCH [223:223] 1 */ +#else + uint32 switch_pkt:1, /* SWITCH [223:223] 1 */ + srcport:8, /* SRC_PORT_NUM [215:222] 8 */ + special_pkt_indicator:1, /* SPECIAL_PACKET_INDICATOR [214:214] 1 */ + entropy_label:20, /* ENTROPY LABEL [194:213] 20 */ + :2; /* RESERVED [192:193] 2 */ +#endif + + /* WORD5 in EP_TO_CPU_HDR */ + /* WORD5 in EP_TO_CPU_COMPOSITES_BUS */ +#ifdef LE_HOST + uint32 pkt_len:14, /* PKT_LENGTH [160:173] 14 */ + regen_crc:1, /* REGEN_CRC [174:174] 1 */ + replication_or_nhi:17; /* REPLICATION_OR_NHOP_INDEX[175:191] 17 */ +#else + uint32 replication_or_nhi:17, /* REPLICATION_OR_NHOP_INDEX[175:191] 17 */ + regen_crc:1, /* REGEN_CRC [174:174] 1 */ + pkt_len:14; /* PKT_LENGTH [160:173] 14 */ +#endif + + /* WORD4 in EP_TO_CPU_HDR */ + /* WORD4 in EP_TO_CPU_COMPOSITES_BUS */ +#ifdef LE_HOST + uint32 loopback_pkt_type:3, /* LOOPBACK_PACKET_TYPE [128:130] 3 */ + match_rule:8, /* MATCHED_RULE [131:138] 8 */ + mtp_index:5, /* MTP_INDEX [139:143] 5 */ + outer_cfi:1, /* OUTER_CFI [144:144] 1 */ + outer_pri:3, /* OUTER_PRI [145:147] 3 */ + outer_vid:12; /* OUTER_VID [148:159] 12 */ +#else + uint32 outer_vid:12, /* OUTER_VID [148:159] 12 */ + outer_pri:3, /* OUTER_PRI [145:147] 3 */ + outer_cfi:1, /* OUTER_CFI [144:144] 1 */ + mtp_index:5, /* MTP_INDEX [139:143] 5 */ + match_rule:8, /* MATCHED_RULE [131:138] 8 */ + loopback_pkt_type:3; /* LOOPBACK_PACKET_TYPE [128:130] 3 */ +#endif + + /* WORD3 in EP_TO_CPU_HDR */ + /* WORD3 in EP_TO_CPU_COMPOSITES_BUS */ + union { +#ifdef LE_HOST + struct { + uint32 cpu_opcode_type:4, /* CPU_OPCODE_TYPE [ 96: 99] 4 */ + do_not_change_ttl:1, /* DO_NOT_CHANGE_TTL [100:100] 1 */ + dscp:6, /* DSCP [101:106] 6 */ + ecn:2, /* ECN [107:108] 2 */ + tag_status:2, /* INCOMING_TAG_STATUS [109:110] 2 */ + ing_l3_intf:13, /* ING_L3_INTF [111:123] 13 */ + otag_action:2, /* ING_OTAG_ACTION [124:125] 2 */ + ip_routed:1, /* IP_ROUTED [126:126] 1 */ + l3only:1; /* L3ONLY [127:127] 1 */ + } overlay1; + struct { + uint32 cpu_opcode_type:4, /* CPU_OPCODE_TYPE [ 96: 99] 4 */ + do_not_change_ttl:1, /* DO_NOT_CHANGE_TTL [100:100] 1 */ + special_pkt_type:3, /* SPECIAL_PACKET_TYPE [101:103] 3 */ + :3, /* RESERVED [104:106] 3 */ + ecn:2, /* ECN [107:108] 2 */ + tag_status:2, /* INCOMING_TAG_STATUS [109:110] 2 */ + ing_l3_intf:13, /* ING_L3_INTF [111:123] 13 */ + otag_action:2, /* ING_OTAG_ACTION [124:125] 2 */ + ip_routed:1, /* IP_ROUTED [126:126] 1 */ + l3only:1; /* L3ONLY [127:127] 1 */ + } overlay2; +#else + struct { + uint32 l3only:1, /* L3ONLY [127:127] 1 */ + ip_routed:1, /* IP_ROUTED [126:126] 1 */ + otag_action:2, /* ING_OTAG_ACTION [124:125] 2 */ + ing_l3_intf:13, /* ING_L3_INTF [111:123] 13 */ + tag_status:2, /* INCOMING_TAG_STATUS [109:110] 2 */ + ecn:2, /* ECN [107:108] 2 */ + dscp:6, /* DSCP [101:106] 6 */ + do_not_change_ttl:1, /* DO_NOT_CHANGE_TTL [100:100] 1 */ + cpu_opcode_type:4; /* CPU_OPCODE_TYPE [ 96: 99] 4 */ + } overlay1; + struct { + uint32 l3only:1, /* L3ONLY [127:127] 1 */ + ip_routed:1, /* IP_ROUTED [126:126] 1 */ + otag_action:2, /* ING_OTAG_ACTION [124:125] 2 */ + ing_l3_intf:13, /* ING_L3_INTF [111:123] 13 */ + tag_status:2, /* INCOMING_TAG_STATUS [109:110] 2 */ + ecn:2, /* ECN [107:108] 2 */ + :3, /* RESERVED [104:106] 3 */ + special_pkt_type:3, /* SPECIAL_PACKET_TYPE [101:103] 3 */ + do_not_change_ttl:1, /* DO_NOT_CHANGE_TTL [100:100] 1 */ + cpu_opcode_type:4; /* CPU_OPCODE_TYPE [ 96: 99] 4 */ + } overlay2; +#endif + } word3; + /* WORD2 in EP_TO_CPU_HDR */ + /* WORD2 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 reason_hi; /* CPU_OPCODE_HI [ 64: 95] 32 */ + + /* WORD1 in EP_TO_CPU_HDR */ + /* WORD1 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 reason; /* CPU_OPCODE_LO [ 32: 63] 32 */ + + union { + /* WORD0 in EP_TO_CPU_HDR */ + /* WORD0 in EP_TO_CPU_COMPOSITES_BUS */ +#ifdef LE_HOST + struct { + uint32 rx_bfd_session_index:12, /* RX_BFD_SESSION_INDEX [ 0: 11] 12 */ + rx_bfd_start_offset_type:2, /* RX_BFD_START_OFFSET_TYPE [ 12: 13] 2 */ + rx_bfd_start_offset:8, /* RX_BFD_START_OFFSET [ 14: 21] 8 */ + queue_num:6, /* MMU_COS [ 22: 27] 6 */ + bpdu:1, /* BPDU [ 28: 28] 1 */ + chg_dscp:1, /* CHANGE_DSCP [ 29: 29] 1 */ + chg_ecn:1, /* CHANGE_ECN [ 30: 30] 1 */ + :1; /* RESERVED [ 31: 31] 1 */ + } overlay1; + struct { + uint32 i2e_classid:12, /* I2E_CLASSID [ 0: 11] 12 */ + i2e_classid_type:4, /* I2E_CLASSID_TYPE [ 12: 15] 4 */ + :6, /* RESERVED2 [ 16: 21] 6 */ + cpu_cos:6, /* CPU_COS [ 22: 27] 6 */ + bpdu:1, /* BPDU [ 28: 28] 1 */ + chg_dscp:1, /* CHANGE_DSCP [ 29: 29] 1 */ + chg_ecn:1, /* CHANGE_ECN [ 30: 30] 1 */ + :1; /* RESERVED [ 31: 31] 1 */ + } overlay2; +#else + struct { + uint32 :1, /* RESERVED [ 31: 31] 1 */ + chg_ecn:1, /* CHANGE_ECN [ 30: 30] 1 */ + chg_dscp:1, /* CHANGE_DSCP [ 29: 29] 1 */ + bpdu:1, /* BPDU [ 28: 28] 1 */ + queue_num:6, /* MMU_COS [ 22: 27] 6 */ + rx_bfd_start_offset:8, /* RX_BFD_START_OFFSET [ 14: 21] 8 */ + rx_bfd_start_offset_type:2, /* RX_BFD_START_OFFSET_TYPE [ 12: 13] 2 */ + rx_bfd_session_index:12; /* RX_BFD_SESSION_INDEX [ 0: 11] 12 */ + } overlay1; + struct { + uint32 :1, /* RESERVED [ 31: 31] 1 */ + chg_ecn:1, /* CHANGE_ECN [ 30: 30] 1 */ + chg_dscp:1, /* CHANGE_DSCP [ 29: 29] 1 */ + bpdu:1, /* BPDU [ 28: 28] 1 */ + cpu_cos:6, /* CPU_COS [ 22: 27] 6 */ + :6, /* RESERVED2 [ 16: 21] 6 */ + i2e_classid_type:4, /* I2E_CLASSID_TYPE [ 12: 15] 4 */ + i2e_classid:12; /* I2E_CLASSID [ 0: 11] 12 */ + } overlay2; +#endif + } word0; + uint32 rsvd; /* 4 byte padding to make it 56 bytes */ +} ep_to_cpu_hdr38_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif /* _SOC_SHARED_DCBFORMATS_TYPE38_H */ diff --git a/platform/broadcom/saibcm-modules/include/sal/core/thread.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h similarity index 76% rename from platform/broadcom/saibcm-modules/include/sal/core/thread.h rename to platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h index 86713d1e0742..0f204e52acd6 100644 --- a/platform/broadcom/saibcm-modules/include/sal/core/thread.h +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h @@ -1,5 +1,6 @@ -/* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. +/* + * $Id:$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,20 +23,20 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: thread.h,v 1.1 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: types.h + * Purpose: System-on-a-Chip data types */ -#ifndef _SAL_THREAD_H -#define _SAL_THREAD_H +#ifndef _SOC_TYPES_H_ +#define _SOC_TYPES_H_ #include -void sal_usleep(uint32 usec); -void sal_udelay(uint32 usec); +typedef uint32 soc_pbmp_t; +#define pbmp_t soc_pbmp_t -#endif /* !_SAL_THREAD_H */ +#endif /* _SOC_TYPES_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile new file mode 100644 index 000000000000..ecc3dc0b3913 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile @@ -0,0 +1,152 @@ +# $Id: Makefile,v 1.2 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# +# Makefile for DCB Library +# + +# General Compilation Flags +CC = $(CROSS_COMPILE)gcc +AR = $(CROSS_COMPILE)ar +CFLAGS = -c -Wall -Werror +ARFLAGS = cru + +# DCB Directory +ifndef DCBDIR +DCBDIR = $(SDK)/systems/linux/kernel/modules/dcb +endif + +# Build Directory +ifndef BLDDIR +BLDDIR = $(DCBDIR)/build +endif + +# Kernel Build +ifdef KADD_CFLAGS +CFLAGS += $(KADD_CFLAGS) +# Prevent false GCC warnings when compiling dcb.c +CFLAGS += -Wno-error=array-bounds +endif + +# Include Directories +INCDIR = -I$(DCBDIR)/include + +# Sources +SOURCES = \ + $(DCBDIR)/src/soc/common/dcb.c \ + $(DCBDIR)/src/appl/dcb/dcb_handler.c + +# Objects +OBJECTS=$(subst .c,.o,$(subst $(DCBDIR),$(BLDDIR),$(SOURCES))) +OBJECTSDIR = $(dir $(OBJECTS)) + +# Library +LIB = $(BLDDIR)/libdcb.a + + +# Compilation Flags +CFLAGS += $(INCDIR) + +DFLAGS = +DFLAGS += -DBCM_53400_A0 # GREYHOUND +DFLAGS += -DBCM_53570_A0 # GREYHOUND2 +DFLAGS += -DBCM_56150_A0 # HURRICANE2 +DFLAGS += -DBCM_56160_A0 # HURRICANE3 +DFLAGS += -DBCM_56340_A0 # HELIX4 +DFLAGS += -DBCM_56450_A0 # KATANA2 +DFLAGS += -DBCM_56560_A0 # APACHE +DFLAGS += -DBCM_56850_A0 # TRIDENT2 +DFLAGS += -DBCM_56860_A0 # TRIDENT2+ +DFLAGS += -DBCM_56870_A0 # TRIDENT3 +DFLAGS += -DBCM_56770_A0 # MAVERICK2 +DFLAGS += -DBCM_56370_A0 # HELIX5 +DFLAGS += -DBCM_56960_A0 # TOMAHAWK +DFLAGS += -DBCM_56970_A0 # TOMAHAWK2 +DFLAGS += -DBCM_56980_A0 # TOMAHAWK3 +DFLAGS += -DBCM_56470_A0 # FIREBOLT6 +DFLAGS += -DBCM_56275_A0 # HURRICANE4 +DFLAGS += -DBCM_56175_A0 # TRIDENT3-X1 + +# +# Compiler Related Options +# + +# Define if pointers are 64 bits on your compiler; +# this is typically true ONLY for 64-bit processors. +# NOTE: This support works ONLY under conditions where the +# upper 32 bits for ALL pointers are ZERO. +#CFGFLAGS += -DPTRS_ARE_64BITS + +# Disable inlining of functions +#CFGFLAGS += -DCOMPILER_OVERRIDE_NO_INLINE + +# Disable use of const +#CFGFLAGS += -DCOMPILER_OVERRIDE_NO_CONST + +# Disable use of static functions +#CFGFLAGS += -DCOMPILER_OVERRIDE_NO_STATIC + + +# +# Rules +# +all: build_dir + $(MAKE) $(LIB) + +$(LIB): $(OBJECTS) + $(AR) $(ARFLAGS) $@ $^ + +define compile_rules +$(1): $(subst .o,.c,$(subst $(BLDDIR),$(DCBDIR),$(1))) + $(CC) $(CFLAGS) $(DFLAGS) $$< -o $$@ +endef + +$(foreach object,$(OBJECTS),$(eval $(call compile_rules,$(object)))) + +.PHONY: clean +clean: + rm -f $(OBJECTS) $(LIB) + +.PHONY: build_dir +build_dir: + mkdir -p $(BLDDIR) + mkdir -p $(OBJECTSDIR) + +.PHONY: print_vars +print_vars: + echo $(SOURCES) + echo $(OBJECTS) + +# +# +# Example +# +test: all $(DCBDIR)/src/appl/test/dcb_test.c + $(CC) -Wall -I$(DCBDIR)/include \ + $(DCBDIR)/src/appl/test/dcb_test.c $(LIB) \ + -o $(BLDDIR)/test.exe + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c new file mode 100644 index 000000000000..0655203c34d8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c @@ -0,0 +1,242 @@ +/* + * $Id:$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: dcb.c + * Purpose: DCB Library + * + */ + +#include +#include +#include +#include +#include +#include + +soc_control_t soc_control; + +#define DEVICE_FAMILY(_dev) ((_dev) & 0xfff0) + +#if defined(BCM_TRIUMPH3_SUPPORT) || defined(BCM_KATANA_SUPPORT) || \ + defined(BCM_TRIDENT2_SUPPORT) +extern dcb_op_t dcb23_op; +#endif +#if defined(BCM_TRIDENT2_SUPPORT) +extern dcb_op_t dcb26_op; +#endif +#if defined(BCM_KATANA2_SUPPORT) +extern dcb_op_t dcb29_op; +#endif +#if defined(BCM_HURRICANE2_SUPPORT) +extern dcb_op_t dcb30_op; +#endif +#if defined(BCM_GREYHOUND_SUPPORT) +extern dcb_op_t dcb31_op; +#endif +#if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TOMAHAWK2_SUPPORT) +extern dcb_op_t dcb32_op; +#endif +#if defined(BCM_TRIDENT2PLUS_SUPPORT) +extern dcb_op_t dcb33_op; +#endif +#if defined(BCM_HURRICANE3_SUPPORT) +extern dcb_op_t dcb34_op; +#endif +#if defined(BCM_APACHE_SUPPORT) +extern dcb_op_t dcb35_op; +#endif +#if defined(BCM_TRIDENT3_SUPPORT) +extern dcb_op_t dcb36_op; +#endif +#if defined(BCM_GREYHOUND2_SUPPORT) +extern dcb_op_t dcb37_op; +#endif +#if defined(BCM_TOMAHAWK3_SUPPORT) +extern dcb_op_t dcb38_op; +#endif + +/* + * Function: + * _dcb_op_get + * Description: + * Get DCB operation structure for a given device type and revision ID. + * Parameters: + * dev_id - (IN) Device ID + * rev_id - (IN) Revision ID + * Return: + * !NULL Pointer to DCB operations object + * NULL Failure + */ +static dcb_op_t * +_dcb_op_get(uint16 dev_id, uint8 rev_id) +{ + switch(dev_id) { +#if defined(BCM_TRIUMPH3_SUPPORT) || defined(BCM_KATANA_SUPPORT) || \ + defined(BCM_TRIDENT2_SUPPORT) + case DEVICE_FAMILY(BCM56640_DEVICE_ID): /* Triumph 3 */ + case DEVICE_FAMILY(BCM56340_DEVICE_ID): /* Helix 4 */ + return &dcb23_op; + break; +#endif +#if defined(BCM_TRIDENT2_SUPPORT) + case DEVICE_FAMILY(BCM56850_DEVICE_ID): /* Trident 2 */ + return &dcb26_op; + break; +#endif +#if defined(BCM_KATANA2_SUPPORT) + case DEVICE_FAMILY(BCM56450_DEVICE_ID): /* Katana 2 */ + return &dcb29_op; + break; +#endif +#if defined(BCM_HURRICANE2_SUPPORT) + case DEVICE_FAMILY(BCM56150_DEVICE_ID): /* Hurricane 2 */ + return &dcb30_op; + break; +#endif +#if defined(BCM_GREYHOUND_SUPPORT) + case DEVICE_FAMILY(BCM53400_DEVICE_ID): /* Greyhound */ + return &dcb31_op; + break; +#endif +#if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TOMAHAWK2_SUPPORT) + case DEVICE_FAMILY(BCM56960_DEVICE_ID): /* Tomahawk */ + case DEVICE_FAMILY(BCM56970_DEVICE_ID): /* Tomahawk 2 */ + return &dcb32_op; + break; +#endif +#if defined(BCM_TRIDENT2PLUS_SUPPORT) + case DEVICE_FAMILY(BCM56860_DEVICE_ID): /* Trident 2 plus*/ + return &dcb33_op; + break; +#endif +#if defined(BCM_HURRICANE3_SUPPORT) + case DEVICE_FAMILY(BCM56160_DEVICE_ID): /* Hurricane 3 */ + return &dcb34_op; + break; +#endif +#if defined(BCM_APACHE_SUPPORT) + case DEVICE_FAMILY(BCM56560_DEVICE_ID): /* Apache */ + case DEVICE_FAMILY(BCM56760_DEVICE_ID): /* Maverick */ + return &dcb35_op; + break; +#endif +#if defined(BCM_TRIDENT3_SUPPORT) + case DEVICE_FAMILY(BCM56870_DEVICE_ID): /* Trident 3*/ + case DEVICE_FAMILY(BCM56770_DEVICE_ID): /* Maverick 2*/ + case DEVICE_FAMILY(BCM56370_DEVICE_ID): /* Helix 5*/ + case DEVICE_FAMILY(BCM56470_DEVICE_ID): /* Firebolt 6*/ + case DEVICE_FAMILY(BCM56275_DEVICE_ID): /* Hurricane 4*/ + case DEVICE_FAMILY(BCM56175_DEVICE_ID): /* Trident3 X1*/ + return &dcb36_op; + break; +#endif +#if defined(BCM_GREYHOUND2_SUPPORT) + case DEVICE_FAMILY(BCM53570_DEVICE_ID): /* Greyhound 2 */ + return &dcb37_op; + break; +#endif +#if defined(BCM_TOMAHAWK3_SUPPORT) + case DEVICE_FAMILY(BCM56980_DEVICE_ID): /* Tomahawk 3 */ + return &dcb38_op; + break; +#endif + default: + return NULL; + break; + } + + return NULL; +} + +/* + * Function: + * _dcb_htonl + * Description: + * Returns the value in network byte order. + * Parameters: + * value - (IN) Value + * Return: + * Value in network byte order + */ +uint32 +_dcb_htonl(uint32 value) +{ + uint32 new_value; + uint8 *buf =(uint8 *)&new_value; + + buf[0] = (value >> 24) & 0xff; + buf[1] = (value >> 16) & 0xff; + buf[2] = (value >> 8) & 0xff; + buf[3] = value & 0xff; + + return new_value; +} + +/* + * Function: + * dcb_handle_init + * Description: + * Initialize a DCB library handle for a given device type and revision. + * It must be called before calling any of the macros. + * Parameters: + * handle - (IN/OUT) Pointer to DCB library handle for given device + * dev_id - (IN) Device ID + * rev_id - (IN) Revision ID + * Return: + * DCB_OK Success + * DCB_ERROR Failure + * Notes: + * Each device type and revision (in some) needs to have a unique + * DCB library handle associated with it. + */ +int +dcb_handle_init(dcb_handle_t *handle, uint16 dev_id, uint8 rev_id) +{ + dcb_op_t *dcb_op; + + if (handle == NULL) { + return DCB_ERROR; + } + + handle->dcb_op = NULL; + + /* Get DCB operations */ + /* First use given specific device ID */ + if ((dcb_op = _dcb_op_get(dev_id, rev_id)) == NULL) { + /* Try family device */ + if ((dcb_op = _dcb_op_get(DEVICE_FAMILY(dev_id), rev_id)) == NULL) { + return DCB_ERROR; + } + } + + handle->dcb_op = dcb_op; + + return DCB_OK; +} + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c new file mode 100644 index 000000000000..dd66020fa96f --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c @@ -0,0 +1,202 @@ +/* + * $Id:$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: test.c + * Purpose: DCB Library Example + * + */ + +#include +#include + +int dcb_example() +{ + int rv; + dcb_handle_t dcb_handle; + int device_id = 0xb820; + int rev_id = 0; + int dcb_type, dcb_size; + uint8 dcb_buffer[256]; + dcb_t *dcb = (dcb_t *)dcb_buffer; + int value; + int dt_mode; + int ingport_is_hg; + soc_rx_reasons_t reasons; + soc_rx_reason_t reason; + dcb_handle_t *dcb_null = NULL; + + /* Error condition */ + rv = dcb_handle_init(dcb_null, device_id, rev_id); + printf("Error check: null handle. dcb_handle_init = %d\n", rv); + + rv = dcb_handle_init(&dcb_handle, 0xffff, 0xff); + printf("Error check: invalid device. dcb_handle_init = %d\n", rv); + + /* Init DCB library */ + printf("\n\nEnter device ID in hex (e.g. b860 for Trident 2+): "); + scanf("%x", &device_id); + rv = dcb_handle_init(&dcb_handle, device_id, rev_id); + printf("For device ID 0x%04X, dcb_handle_init = %d\n", device_id, rv); + + if (rv != DCB_OK) { + return 1; + } + + /* Get DCB type */ + dcb_type = DCB_TYPE(&dcb_handle); + printf("DCB type %d\n", dcb_type); + + /* Get DCB size */ + dcb_size = DCB_SIZE(&dcb_handle); + printf("DCB size %d\n", dcb_size); + + DCB_INIT(&dcb_handle, dcb); + + printf("\n"); + DCB_REQCOUNT_SET(&dcb_handle, dcb, 5); + value = DCB_REQCOUNT_GET(&dcb_handle, dcb); + printf("DCB_REQCOUNT_GET %d\n", value); + + value = DCB_XFERCOUNT_GET(&dcb_handle, dcb); + printf("DCB_XFERCOUNT_GET %d\n", value); + + DCB_DONE_SET(&dcb_handle, dcb, 1); + printf("DCB_DONE_GET %d\n", DCB_DONE_GET(&dcb_handle, dcb)); + + DCB_SG_SET(&dcb_handle, dcb, 1); + printf("DCB_SG_GET %d\n", DCB_SG_GET(&dcb_handle, dcb)); + + DCB_CHAIN_SET(&dcb_handle, dcb, 1); + printf("DCB_CHAIN_GET %d\n", DCB_CHAIN_GET(&dcb_handle, dcb)); + + DCB_RELOAD_SET(&dcb_handle, dcb, 1); + printf("DCB_RELOAD_GET %d\n", DCB_RELOAD_GET(&dcb_handle, dcb)); + + printf("\n"); + DCB_TX_CRC_SET(&dcb_handle, dcb, 1); + DCB_TX_COS_SET(&dcb_handle, dcb, 4); + DCB_TX_DESTMOD_SET(&dcb_handle, dcb, 2); + DCB_TX_DESTPORT_SET(&dcb_handle, dcb, 8); + DCB_TX_OPCODE_SET(&dcb_handle, dcb, 3); + DCB_TX_SRCMOD_SET(&dcb_handle, dcb, 1); + DCB_TX_SRCPORT_SET(&dcb_handle, dcb, 7); + DCB_TX_PRIO_SET(&dcb_handle, dcb, 4); + DCB_TX_PFM_SET(&dcb_handle, dcb, 1); + + printf("\n"); + dt_mode = 0; + ingport_is_hg = 0; + value = DCB_RX_UNTAGGED_GET(&dcb_handle, dcb, dt_mode, ingport_is_hg); + printf("DCB_RX_UNTAGGED_GET 0x%x (%d)\n", value, value); + + dt_mode = 0; + ingport_is_hg = 1; + value = DCB_RX_UNTAGGED_GET(&dcb_handle, dcb, dt_mode, ingport_is_hg); + printf("DCB_RX_UNTAGGED_GET 0x%x (%d)\n", value, value); + + printf("\n"); + printf("DCB_RX_CRC_GET %d\n", DCB_RX_CRC_GET(&dcb_handle, dcb)); + printf("DCB_RX_COS_GET %d\n", DCB_RX_COS_GET(&dcb_handle, dcb)); + printf("DCB_RX_DESTMOD_GET %d\n", DCB_RX_DESTMOD_GET(&dcb_handle, dcb)); + printf("DCB_RX_DESTPORT_GET %d\n", DCB_RX_DESTPORT_GET(&dcb_handle, dcb)); + printf("DCB_RX_OPCODE_GET %d\n", DCB_RX_OPCODE_GET(&dcb_handle, dcb)); + + printf("\n"); + printf("DCB_RX_CLASSTAG_GET %d\n", DCB_RX_CLASSTAG_GET(&dcb_handle, dcb)); + printf("DCB_RX_MATCHRULE_GET %d\n", DCB_RX_MATCHRULE_GET(&dcb_handle, dcb)); + printf("DCB_RX_START_GET %d\n", DCB_RX_START_GET(&dcb_handle, dcb)); + printf("DCB_RX_END_GET %d\n", DCB_RX_END_GET(&dcb_handle, dcb)); + printf("DCB_RX_ERROR_GET %d\n", DCB_RX_ERROR_GET(&dcb_handle, dcb)); + printf("DCB_RX_PRIO_GET %d\n", DCB_RX_PRIO_GET(&dcb_handle, dcb)); + + printf("\n"); + printf("DCB_RX_REASON_GET 0x%x\n", DCB_RX_REASON_GET(&dcb_handle, dcb)); + printf("DCB_RX_REASON_HI_GET 0x%x\n", + DCB_RX_REASON_HI_GET(&dcb_handle, dcb)); + printf("DCB_RX_REASONS_GET\n"); + DCB_RX_REASONS_GET(&dcb_handle, dcb, &reasons); + _SHR_RX_REASON_ITER(reasons, reason) { + printf(" %d\n", reason); + } + printf("\n"); + printf("DCB_RX_INGPORT_GET %d\n", DCB_RX_INGPORT_GET(&dcb_handle, dcb)); + printf("DCB_RX_SRCPORT_GET %d\n", DCB_RX_SRCPORT_GET(&dcb_handle, dcb)); + printf("DCB_RX_SRCMOD_GET %d\n", DCB_RX_SRCMOD_GET(&dcb_handle, dcb)); + + printf("\n"); + printf("DCB_RX_MCAST_GET %d\n", DCB_RX_MCAST_GET(&dcb_handle, dcb)); + printf("DCB_RX_VCLABEL_GET %d\n", DCB_RX_VCLABEL_GET(&dcb_handle, dcb)); + printf("DCB_RX_MIRROR_GET %d\n", DCB_RX_MIRROR_GET(&dcb_handle, dcb)); + printf("DCB_RX_MATCHRULE_GET %d\n", DCB_RX_MATCHRULE_GET(&dcb_handle, dcb)); + printf("DCB_RX_TIMESTAMP_GET %d\n", DCB_RX_TIMESTAMP_GET(&dcb_handle, dcb)); + printf("DCB_RX_TIMESTAMP_UPPER_GET %d\n", + DCB_RX_TIMESTAMP_UPPER_GET(&dcb_handle, dcb)); + + printf("\n"); + DCB_HG_SET(&dcb_handle, dcb, 1); + printf("DCB_HG_GET %d\n", DCB_HG_GET(&dcb_handle, dcb)); + DCB_STAT_SET(&dcb_handle, dcb, 1); + printf("DCB_STAT_GET %d\n", DCB_STAT_GET(&dcb_handle, dcb)); + DCB_PURGE_SET(&dcb_handle, dcb, 1); + printf("DCB_PURGE_GET %d\n", DCB_PURGE_GET(&dcb_handle, dcb)); + + printf("\n"); + printf("DCB_MHP_GET 0x%lx\n", + (((uintptr_t)(DCB_MHP_GET(&dcb_handle, dcb))) & 0xffffffff)); + printf("DCB_RX_OUTER_VID_GET %d\n", + DCB_RX_OUTER_VID_GET(&dcb_handle, dcb)); + printf("DCB_RX_OUTER_PRI_GET %d\n", + DCB_RX_OUTER_PRI_GET(&dcb_handle, dcb)); + printf("DCB_RX_OUTER_CFI_GET %d\n", + DCB_RX_OUTER_CFI_GET(&dcb_handle, dcb)); + printf("DCB_RX_OUTER_TAG_ACTION_GET %d\n", + DCB_RX_OUTER_TAG_ACTION_GET(&dcb_handle, dcb)); + printf("DCB_RX_INNER_VID_GET %d\n", + DCB_RX_INNER_VID_GET(&dcb_handle, dcb)); + printf("DCB_RX_INNER_PRI_GET %d\n", + DCB_RX_INNER_PRI_GET(&dcb_handle, dcb)); + printf("DCB_RX_INNER_CFI_GET %d\n", + DCB_RX_INNER_CFI_GET(&dcb_handle, dcb)); + printf("DCB_RX_INNER_TAG_ACTION_GET %d\n", + DCB_RX_INNER_TAG_ACTION_GET(&dcb_handle, dcb)); + printf("DCB_RX_BPDU_GET %d\n", + DCB_RX_BPDU_GET(&dcb_handle, dcb)); + printf("DCB_RX_L3_INTF_GET %d\n",\ + DCB_RX_L3_INTF_GET(&dcb_handle, dcb)); + + return rv; +} + +int main() +{ + dcb_example(); + + return 0; +} + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c new file mode 100644 index 000000000000..349980d2c492 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c @@ -0,0 +1,4892 @@ +/* + * $Id$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: dcb.c + * Purpose: DCB manipulation routines + * Provide a uniform means of manipulation of DMA control blocks + * that is independent of the actual DCB format used in any + * particular chip. + */ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#if defined(BCM_ESW_SUPPORT) + +#define GETHDRFUNCEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *h = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + return _expr; \ + } +#define GETHDRFUNCFIELD(_dt, _name, _field) \ + GETHDRFUNCEXPR(_dt, _name, h->_field) +#define GETHDRFUNCERR(_dt, _name) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + COMPILER_REFERENCE(hdr); \ + ep_to_cpu_hdr_funcerr(_dt, #_name "_get"); \ + return 0; \ + } +#define GETHDRFUNCNULL(_dt, _name) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + COMPILER_REFERENCE(hdr); \ + return 0; \ + } +#define GETHDRPTREXPR(_dt, _name, _expr) \ + static uint32 * ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *h = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + return _expr; \ + } +#define GETHDRPTRERR(_dt, _name) \ + static uint32 * ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + COMPILER_REFERENCE(hdr); \ + ep_to_cpu_hdr_funcerr(_dt, #_name "_get"); \ + return NULL; \ + } +#define GETHDRFUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *h = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + COMPILER_REFERENCE(unit); \ + return _expr; \ + } +#define GETHDRFUNCUNITFIELD(_dt, _name, _field) \ + GETHDRFUNCUNITEXPR(_dt, _name, h->_field) +#define GETHDRFUNCUNITERR(_dt, _name) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ + COMPILER_REFERENCE(unit); \ + COMPILER_REFERENCE(hdr); \ + ep_to_cpu_hdr_funcerr(_dt, #_name "_get"); \ + return 0; \ + } +#define SETHDRFUNCEXPR(_dt, _name, _arg, _expr) \ + static void ep_to_cpu_hdr##_dt##_##_name##_set(void *hdr, _arg) { \ + ep_to_cpu_hdr##_dt##_t *h = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + _expr; \ + } +#define SETHDRFUNCFIELD(_dt, _name, _field, _arg, _expr) \ + SETHDRFUNCEXPR(_dt, _name, _arg, h->_field = _expr) +#define SETHDRFUNCERR(_dt, _name, _type) \ + static void ep_to_cpu_hdr##_dt##_##_name##_set(void *hdr, _type val) { \ + COMPILER_REFERENCE(hdr); \ + COMPILER_REFERENCE(val); \ + ep_to_cpu_hdr_funcerr(_dt, #_name "_set"); \ + } +#define SETHDRFUNCNULL(_dt, _name) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_set(void *hdr, uint32 val) { \ + COMPILER_REFERENCE(hdr); \ + return 0; \ + } +#define SETHDRFUNCEXPRIGNORE(_dt, _name, _arg, _expr) \ + SETHDRFUNCEXPR(_dt, _name, _arg, COMPILER_REFERENCE(h)) +#if defined(LE_HOST) +#define GETHDRHGFUNCEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + uint32 hgh[3]; \ + soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; \ + hgh[0] = soc_htonl(hd->mh0); \ + hgh[1] = soc_htonl(hd->mh1); \ + hgh[2] = soc_htonl(hd->mh2); \ + return _expr; \ + } +#else +#define GETHDRHGFUNCEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hd->mh0; \ + return _expr; \ + } +#endif +#define GETHDRHGFUNCFIELD(_dt, _name, _field) \ + GETHDRHGFUNCEXPR(_dt, _name, h->hgp_overlay1._field) + +#if defined(LE_HOST) +#define GETHDRHG2FUNCEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + uint32 hgh[4]; \ + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; \ + hgh[0] = soc_htonl(hd->mh0); \ + hgh[1] = soc_htonl(hd->mh1); \ + hgh[2] = soc_htonl(hd->mh2); \ + hgh[3] = soc_htonl(hd->mh3); \ + return _expr; \ + } +#else +#define GETHDRHG2FUNCEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hd->mh0; \ + return _expr; \ + } +#endif +#define GETHDRHG2FUNCFIELD(_dt, _name, _field) \ + GETHDRHG2FUNCEXPR(_dt, _name, h->ppd_overlay1._field) + +#if defined(LE_HOST) +#define GETHDRHGFUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + uint32 hgh[3]; \ + soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; \ + COMPILER_REFERENCE(unit); \ + hgh[0] = soc_htonl(hd->mh0); \ + hgh[1] = soc_htonl(hd->mh1); \ + hgh[2] = soc_htonl(hd->mh2); \ + return _expr; \ + } +#else +#define GETHDRHGFUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)dcb; \ + soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hd->mh0; \ + COMPILER_REFERENCE(unit); \ + return _expr; \ + } +#endif + +#if defined(LE_HOST) +#define GETHDRHG2FUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + uint32 hgh[4]; \ + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; \ + COMPILER_REFERENCE(unit); \ + hgh[0] = soc_htonl(hd->mh0); \ + hgh[1] = soc_htonl(hd->mh1); \ + hgh[2] = soc_htonl(hd->mh2); \ + hgh[3] = soc_htonl(hd->mh3); \ + return _expr; \ + } +#else +#define GETHDRHG2FUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hd->mh0; \ + COMPILER_REFERENCE(unit); \ + return _expr; \ + } +#endif + +/* + * Short cuts for generating dcb support functions. + * Most support functions are just setting or getting a field + * in the appropriate dcb structure or doing a simple expression + * based on a couple of fields. + * GETFUNCFIELD - get a field from DCB + * SETFUNCFIELD - set a field in DCB + * SETFUNCERR - dummy handler for field that does not exist for + * a descriptor type + * GETFUNCERR - dummy handler for field that does not exist for + * a descriptor type + */ +#define GETFUNCEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + return _expr; \ + } +#define GETFUNCFIELD(_dt, _name, _field) \ + GETFUNCEXPR(_dt, _name, d->_field) +#define GETFUNCERR(_dt, _name) \ + static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + COMPILER_REFERENCE(dcb); \ + dcb0_funcerr(_dt, #_name "_get"); \ + return 0; \ + } +#define GETFUNCNULL(_dt, _name) \ + static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + COMPILER_REFERENCE(dcb); \ + return 0; \ + } +#define GETPTREXPR(_dt, _name, _expr) \ + static uint32 * dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + return _expr; \ + } +#define GETPTRERR(_dt, _name) \ + static uint32 * dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + COMPILER_REFERENCE(dcb); \ + dcb0_funcerr(_dt, #_name "_get"); \ + return NULL; \ + } +#define GETFUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + COMPILER_REFERENCE(unit); \ + return _expr; \ + } +#define GETFUNCUNITFIELD(_dt, _name, _field) \ + GETFUNCUNITEXPR(_dt, _name, d->_field) +#define GETFUNCUNITERR(_dt, _name) \ + static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ + COMPILER_REFERENCE(unit); \ + COMPILER_REFERENCE(dcb); \ + dcb0_funcerr(_dt, #_name "_get"); \ + return 0; \ + } +#define SETFUNCEXPR(_dt, _name, _arg, _expr) \ + static void dcb##_dt##_##_name##_set(dcb_t *dcb, _arg) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + _expr; \ + } +#define SETFUNCFIELD(_dt, _name, _field, _arg, _expr) \ + SETFUNCEXPR(_dt, _name, _arg, d->_field = _expr) +#define SETFUNCERR(_dt, _name, _type) \ + static void dcb##_dt##_##_name##_set(dcb_t *dcb, _type val) { \ + COMPILER_REFERENCE(dcb); \ + COMPILER_REFERENCE(val); \ + dcb0_funcerr(_dt, #_name "_set"); \ + } +#define SETFUNCNULL(_dt, _name) \ + static uint32 dcb##_dt##_##_name##_set(dcb_t *dcb,uint32 val) { \ + COMPILER_REFERENCE(dcb); \ + return 0; \ + } +#define SETFUNCNULL2(_dt, _name) \ + static void dcb##_dt##_##_name##_set(dcb_t *dcb,uint32 val) { \ + COMPILER_REFERENCE(dcb); \ + } + +#define SETFUNCEXPRIGNORE(_dt, _name, _arg, _expr) \ + SETFUNCEXPR(_dt, _name, _arg, COMPILER_REFERENCE(d)) +#if defined(LE_HOST) +#define GETHGFUNCEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + uint32 hgh[3]; \ + soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; \ + hgh[0] = soc_htonl(d->mh0); \ + hgh[1] = soc_htonl(d->mh1); \ + hgh[2] = soc_htonl(d->mh2); \ + return _expr; \ + } +#else +#define GETHGFUNCEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + soc_higig_hdr_t *h = (soc_higig_hdr_t *)&d->mh0; \ + return _expr; \ + } +#endif +#define GETHGFUNCFIELD(_dt, _name, _field) \ + GETHGFUNCEXPR(_dt, _name, h->hgp_overlay1._field) + +#if defined(LE_HOST) +#define GETHG2FUNCEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + uint32 hgh[4]; \ + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; \ + hgh[0] = soc_htonl(d->mh0); \ + hgh[1] = soc_htonl(d->mh1); \ + hgh[2] = soc_htonl(d->mh2); \ + hgh[3] = soc_htonl(d->mh3); \ + return _expr; \ + } +#else +#define GETHG2FUNCEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&d->mh0; \ + return _expr; \ + } +#endif +#define GETHG2FUNCFIELD(_dt, _name, _field) \ + GETHG2FUNCEXPR(_dt, _name, h->ppd_overlay1._field) + +#if defined(LE_HOST) +#define GETHGFUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + uint32 hgh[3]; \ + soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; \ + COMPILER_REFERENCE(unit); \ + hgh[0] = soc_htonl(d->mh0); \ + hgh[1] = soc_htonl(d->mh1); \ + hgh[2] = soc_htonl(d->mh2); \ + return _expr; \ + } +#else +#define GETHGFUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + soc_higig_hdr_t *h = (soc_higig_hdr_t *)&d->mh0; \ + COMPILER_REFERENCE(unit); \ + return _expr; \ + } +#endif + +#if defined(LE_HOST) +#define GETHG2FUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + uint32 hgh[4]; \ + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; \ + COMPILER_REFERENCE(unit); \ + hgh[0] = soc_htonl(d->mh0); \ + hgh[1] = soc_htonl(d->mh1); \ + hgh[2] = soc_htonl(d->mh2); \ + hgh[3] = soc_htonl(d->mh3); \ + return _expr; \ + } +#else +#define GETHG2FUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&d->mh0; \ + COMPILER_REFERENCE(unit); \ + return _expr; \ + } +#endif + +/* + * This is a standard function used to generate a debug message whenever + * the code tries to access a field not present in the specific DCB + */ +static void +dcb0_funcerr(int dt, char *name) +{ + LOG_ERROR(BSL_LS_SOC_COMMON, + (BSL_META("ERROR: dcb%d_%s called\n"), dt, name)); +} + +/* the addr related functions are the same for all dcb types */ +static void +dcb0_addr_set(int unit, dcb_t *dcb, sal_vaddr_t addr) +{ + uint32 *d = (uint32 *)dcb; + + if (addr == 0) { + *d = 0; + } else { + *d = soc_cm_l2p(unit, (void *)addr); + } +} + +static sal_vaddr_t +dcb0_addr_get(int unit, dcb_t *dcb) +{ + uint32 *d = (uint32 *)dcb; + + if (*d == 0) { + return (sal_vaddr_t)0; + } else { + return (sal_vaddr_t)soc_cm_p2l(unit, *d); + } +} + +static sal_paddr_t +dcb0_paddr_get(dcb_t *dcb) +{ + uint32 *d = (uint32 *)dcb; + + return (sal_paddr_t)*d; +} + +/* + * Function: + * dcb0_rx_reason_map_get + * Purpose: + * Return the RX reason map for a series of DCB types. + * Parameters: + * dcb_op - DCB operations + * dcb - dma control block + * Returns: + * RX reason map pointer + * Notes: + * Function made global to resolve compiler link issue. + */ +soc_rx_reason_t * +dcb0_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb) +{ + COMPILER_REFERENCE(dcb); + + return dcb_op->rx_reason_maps[0]; +} + +/* + * Function: + * dcb0_rx_reasons_get + * Purpose: + * Map the hardware reason bits from 'dcb' into the set + * of "reasons". + * Parameters: + * dcb_op - DCB operations + * dcb - dma control block + * reasons - set of "reasons", socRxReason* + */ +static void +dcb0_rx_reasons_get(dcb_op_t *dcb_op, dcb_t *dcb, soc_rx_reasons_t *reasons) +{ + soc_rx_reason_t *map; + uint32 reason; + uint32 mask; + int i; + + SOC_RX_REASON_CLEAR_ALL(*reasons); + + map = dcb_op->rx_reason_map_get(dcb_op, dcb); + if (map == NULL) { + return; + } + + reason = dcb_op->rx_reason_get(dcb); + mask = 1; + for (i = 0; i < 32; i++) { + if ((mask & reason)) { + SOC_RX_REASON_SET(*reasons, map[i]); + } + mask <<= 1; + } + + reason = dcb_op->rx_reason_hi_get(dcb); + mask = 1; + for (i = 0; i < 32; i++) { + if ((mask & reason)) { + SOC_RX_REASON_SET(*reasons, map[i + 32]); + } + mask <<= 1; + } + + /* BPDU bit should be a reason, paste it in here */ + if (dcb_op->rx_bpdu_get(dcb)) { + SOC_RX_REASON_SET(*reasons, socRxReasonBpdu); + } + + return; +} + +#if defined(BCM_XGS3_SWITCH_SUPPORT) +/* + * DCB Type 9 Support + */ +GETFUNCFIELD(9, rx_l3_intf, l3_intf) +#endif /* BCM_XGS3_SWITCH_SUPPORT */ + +#if defined(BCM_TRIUMPH2_SUPPORT) +static void +dcb19_init(dcb_t *dcb) +{ + uint32 *d = (uint32 *)dcb; + + d[0] = d[1] = d[2] = d[3] = d[4] = 0; + d[5] = d[6] = d[7] = d[8] = d[9] = d[10] = 0; + d[11] = d[12] = d[13] = d[14] = d[15] = 0; +} + +static int +dcb19_addtx(dv_t *dv, sal_vaddr_t addr, uint32 count, + pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh) +{ + dcb19_t *d; /* DCB */ + uint32 *di; /* DCB integer pointer */ + uint32 paddr; /* Packet buffer physical address */ + int unaligned; + int unaligned_bytes; + uint8 *unaligned_buffer; + uint8 *aligned_buffer; + + d = (dcb19_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); + + if (addr) { + paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); + } else { + paddr = 0; + } + + if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) && + (d[-1].c_sg != 0) && + (d[-1].addr + d[-1].c_count) == paddr && + d[-1].c_count + count <= DCB_MAX_REQCOUNT) { + d[-1].c_count += count; + return dv->dv_cnt - dv->dv_vcnt; + } + + /* + * A few chip revisions do not support 128 byte PCI bursts + * correctly if the address is not word-aligned. In case + * we encounter an unaligned address, we consume an extra + * DCB to correct the alignment. + */ + do { + if (dv->dv_vcnt >= dv->dv_cnt) { + return SOC_E_FULL; + } + if (dv->dv_vcnt > 0) { /* chain off previous dcb */ + d[-1].c_chain = 1; + } + + di = (uint32 *)d; + di[0] = di[1] = di[2] = di[3] = di[4] = 0; + di[5] = di[6] = di[7] = di[8] = di[9] = di[10] = 0; + di[11] = di[12] = di[13] = di[14] = di[15] = 0; + + d->addr = paddr; + d->c_count = count; + d->c_sg = 1; + + d->c_stat = 1; + d->c_purge = SOC_DMA_PURGE_GET(flags); + if (SOC_DMA_HG_GET(flags)) { + soc_higig_hdr_t *mh = (soc_higig_hdr_t *)hgh; + if (mh->overlay1.start == SOC_HIGIG2_START) { + d->mh3 = soc_ntohl(hgh[3]); + } + d->c_hg = 1; + d->mh0 = soc_ntohl(hgh[0]); + d->mh1 = soc_ntohl(hgh[1]); + d->mh2 = soc_ntohl(hgh[2]); + d->mh3 = soc_ntohl(hgh[3]); + } + + unaligned = 0; + if (soc_feature(dv->dv_unit, soc_feature_pkt_tx_align)) { + if (paddr & 0x3) { + unaligned_bytes = 4 - (paddr & 0x3); + unaligned_buffer = (uint8 *)addr; + aligned_buffer = SOC_DV_TX_ALIGN(dv, dv->dv_vcnt); + aligned_buffer[0] = unaligned_buffer[0]; + aligned_buffer[1] = unaligned_buffer[1]; + aligned_buffer[2] = unaligned_buffer[2]; + d->addr = soc_cm_l2p(dv->dv_unit, aligned_buffer); + if (count > 3) { + d->c_count = unaligned_bytes; + paddr += unaligned_bytes; + count -= unaligned_bytes; + unaligned = 1; + } + } + } + + dv->dv_vcnt += 1; + + d = (dcb19_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); + + } while (unaligned); + + return dv->dv_cnt - dv->dv_vcnt; +} + +static int +dcb19_addrx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags) +{ + dcb19_t *d; /* DCB */ + uint32 *di; /* DCB integer pointer */ + + d = (dcb19_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); + + if (dv->dv_vcnt > 0) { /* chain off previous dcb */ + d[-1].c_chain = 1; + } + + di = (uint32 *)d; + di[0] = di[1] = di[2] = di[3] = di[4] = 0; + di[5] = di[6] = di[7] = di[8] = di[9] = di[10] = 0; + di[11] = di[12] = di[13] = di[14] = di[15] = 0; + + if (addr) { + d->addr = soc_cm_l2p(dv->dv_unit, (void *)addr); + } + d->c_count = count; + d->c_sg = 1; + + dv->dv_vcnt += 1; + return dv->dv_cnt - dv->dv_vcnt; +} + +static uint32 +dcb19_intrinfo(int unit, dcb_t *dcb, int tx, uint32 *count) +{ + dcb19_t *d = (dcb19_t *)dcb; /* DCB */ + uint32 f; /* SOC_DCB_INFO_* flags */ + + if (!d->done) { + return 0; + } + f = SOC_DCB_INFO_DONE; + if (tx) { + if (!d->c_sg) { + f |= SOC_DCB_INFO_PKTEND; + } + } else { + if (d->end) { + f |= SOC_DCB_INFO_PKTEND; + } + } + *count = d->count; + return f; +} + +static uint32 +dcb19_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) +{ + dcb19_t *d = (dcb19_t *)dcb; + + COMPILER_REFERENCE(dt_mode); + + return (ingport_is_hg ? + ((d->itag_status) ? 0 : 2) : + ((d->itag_status & 0x2) ? + ((d->itag_status & 0x1) ? 0 : 2) : + ((d->itag_status & 0x1) ? 1 : 3))); +} + +SETFUNCFIELD(19, reqcount, c_count, uint32 count, count) +GETFUNCFIELD(19, reqcount, c_count) +GETFUNCFIELD(19, xfercount, count) +/* addr_set, addr_get, paddr_get - Same as DCB 0 */ +SETFUNCFIELD(19, done, done, int val, val ? 1 : 0) +GETFUNCFIELD(19, done, done) +SETFUNCFIELD(19, sg, c_sg, int val, val ? 1 : 0) +GETFUNCFIELD(19, sg, c_sg) +SETFUNCFIELD(19, chain, c_chain, int val, val ? 1 : 0) +GETFUNCFIELD(19, chain, c_chain) +SETFUNCFIELD(19, reload, c_reload, int val, val ? 1 : 0) +GETFUNCFIELD(19, reload, c_reload) +SETFUNCERR(19, desc_intr, int) +GETFUNCERR(19, desc_intr) +SETFUNCERR(19, tx_l2pbm, pbmp_t) +SETFUNCERR(19, tx_utpbm, pbmp_t) +SETFUNCERR(19, tx_l3pbm, pbmp_t) +SETFUNCERR(19, tx_crc, int) +SETFUNCERR(19, tx_cos, int) +SETFUNCERR(19, tx_destmod, uint32) +SETFUNCERR(19, tx_destport, uint32) +SETFUNCERR(19, tx_opcode, uint32) +SETFUNCERR(19, tx_srcmod, uint32) +SETFUNCERR(19, tx_srcport, uint32) +SETFUNCERR(19, tx_prio, uint32) +SETFUNCERR(19, tx_pfm, uint32) +GETFUNCFIELD(19, rx_start, start) +GETFUNCFIELD(19, rx_end, end) +GETFUNCFIELD(19, rx_error, error) +GETFUNCFIELD(19, rx_cos, cpu_cos) +/* Fields extracted from MH/PBI */ +GETHG2FUNCFIELD(19, rx_destmod, dst_mod) +GETHG2FUNCFIELD(19, rx_destport, dst_port) +GETHG2FUNCFIELD(19, rx_srcmod, src_mod) +GETHG2FUNCFIELD(19, rx_srcport, src_port) +GETHG2FUNCFIELD(19, rx_opcode, opcode) +GETHG2FUNCFIELD(19, rx_prio, vlan_pri) /* outer_pri */ +GETHG2FUNCEXPR(19, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | + (h->ppd_overlay1.dst_port))) +GETHG2FUNCEXPR(19, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | + (h->ppd_overlay1.vc_label_15_8 << 8) | + (h->ppd_overlay1.vc_label_7_0))) +GETHG2FUNCEXPR(19, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : + (h->ppd_overlay2.ctag_hi << 8) | + (h->ppd_overlay2.ctag_lo))) +GETFUNCFIELD(19, rx_reason, reason) +GETFUNCFIELD(19, rx_reason_hi, reason_hi) +GETFUNCFIELD(19, rx_ingport, srcport) +GETFUNCEXPR(19, rx_mirror, ((d->imirror) | (d->emirror))) +SETFUNCFIELD(19, hg, c_hg, uint32 hg, hg) +GETFUNCFIELD(19, hg, c_hg) +SETFUNCFIELD(19, stat, c_stat, uint32 stat, stat) +GETFUNCFIELD(19, stat, c_stat) +SETFUNCFIELD(19, purge, c_purge, uint32 purge, purge) +GETFUNCFIELD(19, purge, c_purge) +GETPTREXPR(19, mhp, &(d->mh0)) +GETFUNCFIELD(19, outer_vid, outer_vid) +GETFUNCFIELD(19, outer_pri, outer_pri) +GETFUNCFIELD(19, outer_cfi, outer_cfi) +GETFUNCFIELD(19, rx_outer_tag_action, otag_action) +GETFUNCFIELD(19, inner_vid, inner_vid) +GETFUNCFIELD(19, inner_pri, inner_pri) +GETFUNCFIELD(19, inner_cfi, inner_cfi) +GETFUNCFIELD(19, rx_inner_tag_action, itag_action) +GETFUNCFIELD(19, rx_bpdu, bpdu) +GETFUNCNULL(19, rx_decap_tunnel) + +static uint32 dcb19_rx_crc_get(dcb_t *dcb) { + return 0; +} + +#endif /* BCM_TRIUMPH2_SUPPORT */ + +#if defined(BCM_ENDURO_SUPPORT) || defined(BCM_HURRICANE_SUPPORT) +/* + * DCB Type 20 Support + */ + +static soc_rx_reason_t +dcb20_rx_reason_map[] = { + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonL2SourceMiss, /* Offset 1 */ + socRxReasonL2DestMiss, /* Offset 2 */ + socRxReasonL2Move, /* Offset 3 */ + socRxReasonL2Cpu, /* Offset 4 */ + socRxReasonSampleSource, /* Offset 5 */ + socRxReasonSampleDest, /* Offset 6 */ + socRxReasonL3SourceMiss, /* Offset 7 */ + socRxReasonL3DestMiss, /* Offset 8 */ + socRxReasonL3SourceMove, /* Offset 9 */ + socRxReasonMcastMiss, /* Offset 10 */ + socRxReasonIpMcastMiss, /* Offset 11 */ + socRxReasonFilterMatch, /* Offset 12 */ + socRxReasonL3HeaderError, /* Offset 13 */ + socRxReasonProtocol, /* Offset 14 */ + socRxReasonDosAttack, /* Offset 15 */ + socRxReasonMartianAddr, /* Offset 16 */ + socRxReasonTunnelError, /* Offset 17 */ + socRxReasonL2MtuFail, /* Offset 18 */ + socRxReasonIcmpRedirect, /* Offset 19 */ + socRxReasonL3Slowpath, /* Offset 20 */ + socRxReasonParityError, /* Offset 21 */ + socRxReasonL3MtuFail, /* Offset 22 */ + socRxReasonHigigHdrError, /* Offset 23 */ + socRxReasonMcastIdxError, /* Offset 24 */ + socRxReasonVlanFilterMatch, /* Offset 25 */ + socRxReasonClassBasedMove, /* Offset 26 */ + socRxReasonL2LearnLimit, /* Offset 27 */ + socRxReasonMplsLabelMiss, /* Offset 28 */ + socRxReasonMplsInvalidAction, /* Offset 29 */ + socRxReasonMplsInvalidPayload, /* Offset 30 */ + socRxReasonMplsTtl, /* Offset 31 */ + socRxReasonMplsSequenceNumber, /* Offset 32 */ + socRxReasonL2NonUnicastMiss, /* Offset 33 */ + socRxReasonNhop, /* Offset 34 */ + socRxReasonMplsCtrlWordError, /* Offset 35 */ + socRxReasonTimeSync, /* Offset 36 */ + socRxReasonOAMSlowpath, /* Offset 37 */ + socRxReasonOAMError, /* Offset 38 */ + socRxReasonOAMLMDM, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static soc_rx_reason_t *dcb20_rx_reason_maps[] = { + dcb20_rx_reason_map, + NULL +}; + +GETFUNCFIELD(20, rx_matchrule, match_rule) +GETFUNCFIELD(20, rx_timestamp, timestamp) +GETFUNCFIELD(20, rx_timestamp_upper, timestamp_upper) +#endif /* BCM_ENDURO_SUPPORT || BCM_HURRICANE_SUPPORT */ + +#if defined(BCM_TRIDENT_SUPPORT) +/* + * DCB Type 21 Support + */ +/* From FORMAT NIV_CPU_OPCODE_ENCODING */ +static soc_rx_reason_t dcb21_rx_reason_niv_encoding_map[] = { + socRxReasonNiv, /* 0: NO_ERRORS + * Base field, must match the entries above */ + socRxReasonNivPrioDrop, /* 1:DOT1P_ADMITTANCE_DISCARD */ + socRxReasonNivInterfaceMiss, /* 2:VIF_LOOKUP_MISS */ + socRxReasonNivRpfFail, /* 3:RPF_LOOKUP_MISS */ + socRxReasonNivTagInvalid, /* 4:VNTAG_FORMAT_ERROR */ + socRxReasonNivTagDrop, /* 5:VNTAG_PRESENT_DROP */ + socRxReasonNivUntagDrop, /* 6:VNTAG_NOT_PRESENT_DROP */ + socRxReasonInvalid, /* Offset 7 */ + socRxReasonInvalid, /* Offset 8 */ + socRxReasonInvalid, /* Offset 9 */ + socRxReasonInvalid, /* Offset 10 */ + socRxReasonInvalid, /* Offset 11 */ + socRxReasonInvalid, /* Offset 12 */ + socRxReasonInvalid, /* Offset 13 */ + socRxReasonInvalid, /* Offset 14 */ + socRxReasonInvalid, /* Offset 15 */ + socRxReasonInvalid, /* Offset 16 */ + socRxReasonInvalid, /* Offset 17 */ + socRxReasonInvalid, /* Offset 18 */ + socRxReasonInvalid, /* Offset 19 */ + socRxReasonInvalid, /* Offset 20 */ + socRxReasonInvalid, /* Offset 21 */ + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static void +dcb21_rx_reasons_get(dcb_op_t *dcb_op, dcb_t *dcb, soc_rx_reasons_t *reasons) +{ + soc_rx_reason_t *map, *encoding_map; + uint32 opcode[2], encoding[3]; + uint32 bit_val; + int word_idx, bit_idx, opcode_idx, map_idx, word_count; + int enc_bit = 0; + + SOC_RX_REASON_CLEAR_ALL(*reasons); + + opcode[0] = dcb_op->rx_reason_get(dcb); + opcode[1] = dcb_op->rx_reason_hi_get(dcb); + word_count = 2; + sal_memset(encoding, 0, sizeof(encoding)); + map = dcb_op->rx_reason_map_get(dcb_op, dcb); + for (word_idx = 0; word_idx < word_count; word_idx++) { + for (bit_idx = 0; bit_idx < 32; bit_idx++) { + opcode_idx = word_idx * 32 + bit_idx; + bit_val = opcode[word_idx] & (1 << bit_idx) ? 1 : 0; + for (map_idx = 0; ; map_idx++) { + encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; + if (encoding_map == NULL) { + break; + } + if (map[opcode_idx] != encoding_map[0]) { + continue; + } + if (opcode_idx == 0 || map[opcode_idx - 1] != encoding_map[0]) { + enc_bit = 0; + } + encoding[map_idx] |= bit_val << enc_bit; + enc_bit++; + break; + } + if (encoding_map == NULL && bit_val) { + SOC_RX_REASON_SET(*reasons, map[opcode_idx]); + } + } + } + + for (map_idx = 0; ; map_idx++) { + encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; + if (encoding_map == NULL) { + break; + } + if (encoding[map_idx] != socRxReasonInvalid) { + SOC_RX_REASON_SET(*reasons, encoding_map[encoding[map_idx]]); + } + } + + /* BPDU bit should be a reason, paste it in here */ + if (dcb_op->rx_bpdu_get(dcb)) { + SOC_RX_REASON_SET(*reasons, socRxReasonBpdu); + } + + return; +} +#endif /* BCM_TRIDENT_SUPPORT */ + +#if defined(BCM_TRIUMPH3_SUPPORT) || defined(BCM_KATANA_SUPPORT) || \ + defined(BCM_TRIDENT2_SUPPORT) || defined(BCM_GREYHOUND_SUPPORT) +/* + * DCB Type 23 Support + */ +static soc_rx_reason_t +dcb23_rx_reason_map_ip_0[] = { /* IP Overlay 0 */ + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonL2SourceMiss, /* Offset 1 */ + socRxReasonL2DestMiss, /* Offset 2 */ + socRxReasonL2Move, /* Offset 3 */ + socRxReasonL2Cpu, /* Offset 4 */ + socRxReasonSampleSource, /* Offset 5 */ + socRxReasonSampleDest, /* Offset 6 */ + socRxReasonL3SourceMiss, /* Offset 7 */ + socRxReasonL3DestMiss, /* Offset 8 */ + socRxReasonL3SourceMove, /* Offset 9 */ + socRxReasonMcastMiss, /* Offset 10 */ + socRxReasonIpMcastMiss, /* Offset 11 */ + socRxReasonL3HeaderError, /* Offset 12 */ + socRxReasonProtocol, /* Offset 13 */ + socRxReasonDosAttack, /* Offset 14 */ + socRxReasonMartianAddr, /* Offset 15 */ + socRxReasonTunnelError, /* Offset 16 */ + socRxReasonMirror, /* Offset 17 */ + socRxReasonIcmpRedirect, /* Offset 18 */ + socRxReasonL3Slowpath, /* Offset 19 */ + socRxReasonL3MtuFail, /* Offset 20 */ + socRxReasonMcastIdxError, /* Offset 21 */ + socRxReasonVlanFilterMatch, /* Offset 22 */ + socRxReasonClassBasedMove, /* Offset 23 */ + socRxReasonL3AddrBindFail, /* Offset 24 */ + socRxReasonMplsLabelMiss, /* Offset 25 */ + socRxReasonMplsInvalidAction, /* Offset 26 */ + socRxReasonMplsInvalidPayload, /* Offset 27 */ + socRxReasonMplsTtl, /* Offset 28 */ + socRxReasonMplsSequenceNumber, /* Offset 29 */ + socRxReasonL2NonUnicastMiss, /* Offset 30 */ + socRxReasonNhop, /* Offset 31 */ + socRxReasonStation, /* Offset 32 */ + socRxReasonVlanTranslate, /* Offset 33 */ + socRxReasonTimeSync, /* Offset 34 */ + socRxReasonOAMSlowpath, /* Offset 35 */ + socRxReasonOAMError, /* Offset 36 */ + socRxReasonIpfixRateViolation, /* Offset 37 */ + socRxReasonL2LearnLimit, /* Offset 38 */ + socRxReasonEncapHigigError, /* Offset 39 */ + socRxReasonRegexMatch, /* Offset 40 */ + socRxReasonOAMLMDM, /* Offset 41 */ + socRxReasonBfd, /* Offset 42 */ + socRxReasonBfdSlowpath, /* Offset 43 */ + socRxReasonFailoverDrop, /* Offset 44 */ + socRxReasonTrillName, /* Offset 45 */ + socRxReasonTrillTtl, /* Offset 46 */ + socRxReasonTrillCoreIsIs, /* Offset 47 */ + socRxReasonTrillSlowpath, /* Offset 48 */ + socRxReasonTrillRpfFail, /* Offset 49 */ + socRxReasonTrillMiss, /* Offset 50 */ + socRxReasonTrillInvalid, /* Offset 51 */ + socRxReasonNivUntagDrop, /* Offset 52 */ + socRxReasonNivTagDrop, /* Offset 53 */ + socRxReasonNivTagInvalid, /* Offset 54 */ + socRxReasonNivRpfFail, /* Offset 55 */ + socRxReasonNivInterfaceMiss, /* Offset 56 */ + socRxReasonNivPrioDrop, /* Offset 57 */ + socRxReasonParityError, /* Offset 58 */ + socRxReasonHigigHdrError, /* Offset 59 */ + socRxReasonFilterMatch, /* Offset 60 */ + socRxReasonL2GreSipMiss, /* Offset 61 */ + socRxReasonL2GreVpnIdMiss, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static soc_rx_reason_t +dcb23_rx_reason_map_ip_1[] = { /* IP Overlay 1 */ + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonL2SourceMiss, /* Offset 1 */ + socRxReasonL2DestMiss, /* Offset 2 */ + socRxReasonL2Move, /* Offset 3 */ + socRxReasonL2Cpu, /* Offset 4 */ + socRxReasonSampleSource, /* Offset 5 */ + socRxReasonSampleDest, /* Offset 6 */ + socRxReasonL3SourceMiss, /* Offset 7 */ + socRxReasonL3DestMiss, /* Offset 8 */ + socRxReasonL3SourceMove, /* Offset 9 */ + socRxReasonMcastMiss, /* Offset 10 */ + socRxReasonIpMcastMiss, /* Offset 11 */ + socRxReasonL3HeaderError, /* Offset 12 */ + socRxReasonProtocol, /* Offset 13 */ + socRxReasonDosAttack, /* Offset 14 */ + socRxReasonMartianAddr, /* Offset 15 */ + socRxReasonTunnelError, /* Offset 16 */ + socRxReasonMirror, /* Offset 17 */ + socRxReasonIcmpRedirect, /* Offset 18 */ + socRxReasonL3Slowpath, /* Offset 19 */ + socRxReasonL3MtuFail, /* Offset 20 */ + socRxReasonMcastIdxError, /* Offset 21 */ + socRxReasonVlanFilterMatch, /* Offset 22 */ + socRxReasonClassBasedMove, /* Offset 23 */ + socRxReasonL3AddrBindFail, /* Offset 24 */ + socRxReasonMplsLabelMiss, /* Offset 25 */ + socRxReasonMplsInvalidAction, /* Offset 26 */ + socRxReasonMplsInvalidPayload, /* Offset 27 */ + socRxReasonMplsTtl, /* Offset 28 */ + socRxReasonMplsSequenceNumber, /* Offset 29 */ + socRxReasonL2NonUnicastMiss, /* Offset 30 */ + socRxReasonNhop, /* Offset 31 */ + socRxReasonStation, /* Offset 32 */ + socRxReasonVlanTranslate, /* Offset 33 */ + socRxReasonTimeSync, /* Offset 34 */ + socRxReasonOAMSlowpath, /* Offset 35 */ + socRxReasonOAMError, /* Offset 36 */ + socRxReasonIpfixRateViolation, /* Offset 37 */ + socRxReasonL2LearnLimit, /* Offset 38 */ + socRxReasonEncapHigigError, /* Offset 39 */ + socRxReasonRegexMatch, /* Offset 40 */ + socRxReasonOAMLMDM, /* Offset 41 */ + socRxReasonBfd, /* Offset 42 */ + socRxReasonBfdSlowpath, /* Offset 43 */ + socRxReasonFailoverDrop, /* Offset 44 */ + socRxReasonWlanSlowpathKeepalive, /* Offset 45 */ + socRxReasonWlanTunnelError, /* Offset 46 */ + socRxReasonWlanSlowpath, /* Offset 47 */ + socRxReasonWlanDot1xDrop, /* Offset 48 */ + socRxReasonMplsReservedEntropyLabel, /* Offset 49 */ + socRxReasonCongestionCnmProxy, /* Offset 50 */ + socRxReasonCongestionCnmProxyError, /* Offset 51 */ + socRxReasonCongestionCnm, /* Offset 52 */ + socRxReasonMplsUnknownAch, /* Offset 53 */ + socRxReasonMplsLookupsExceeded, /* Offset 54 */ + socRxReasonMplsIllegalReservedLabel, /* Offset 55 */ + socRxReasonMplsRouterAlertLabel, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonParityError, /* Offset 58 */ + socRxReasonHigigHdrError, /* Offset 59 */ + socRxReasonFilterMatch, /* Offset 60 */ + socRxReasonL2GreSipMiss, /* Offset 61 */ + socRxReasonL2GreVpnIdMiss, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static soc_rx_reason_t +dcb23_rx_reason_map_ep[] = { + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonStp, /* Offset 1 */ + socRxReasonVlanTranslate, /* Offset 2 new */ + socRxReasonTunnelError, /* Offset 3 */ + socRxReasonIpmc, /* Offset 4 */ + socRxReasonL3HeaderError, /* Offset 5 */ + socRxReasonTtl, /* Offset 6 */ + socRxReasonL2MtuFail, /* Offset 7 */ + socRxReasonHigigHdrError, /* Offset 8 */ + socRxReasonSplitHorizon, /* Offset 9 */ + socRxReasonNivPrune, /* Offset 10 */ + socRxReasonVirtualPortPrune, /* Offset 11 */ + socRxReasonFilterMatch, /* Offset 12 */ + socRxReasonNonUnicastDrop, /* Offset 13 */ + socRxReasonTrillPacketPortMismatch, /* Offset 14 */ + socRxReasonInvalid, /* Offset 15 */ + socRxReasonInvalid, /* Offset 16 */ + socRxReasonInvalid, /* Offset 17 */ + socRxReasonInvalid, /* Offset 18 */ + socRxReasonInvalid, /* Offset 19 */ + socRxReasonInvalid, /* Offset 20 */ + socRxReasonInvalid, /* Offset 21 */ + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static soc_rx_reason_t +dcb23_rx_reason_map_nlf[] = { + socRxReasonRegexAction, /* Offset 0 */ + socRxReasonWlanClientMove, /* Offset 1 */ + socRxReasonWlanSourcePortMiss, /* Offset 2 */ + socRxReasonWlanClientError, /* Offset 3 */ + socRxReasonWlanClientSourceMiss, /* Offset 4 */ + socRxReasonWlanClientDestMiss, /* Offset 5 */ + socRxReasonWlanMtu, /* Offset 6 */ + socRxReasonInvalid, /* Offset 7 */ + socRxReasonInvalid, /* Offset 8 */ + socRxReasonInvalid, /* Offset 9 */ + socRxReasonInvalid, /* Offset 10 */ + socRxReasonInvalid, /* Offset 11 */ + socRxReasonInvalid, /* Offset 12 */ + socRxReasonInvalid, /* Offset 13 */ + socRxReasonInvalid, /* Offset 14 */ + socRxReasonInvalid, /* Offset 15 */ + socRxReasonInvalid, /* Offset 16 */ + socRxReasonInvalid, /* Offset 17 */ + socRxReasonInvalid, /* Offset 18 */ + socRxReasonInvalid, /* Offset 19 */ + socRxReasonInvalid, /* Offset 20 */ + socRxReasonInvalid, /* Offset 21 */ + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static soc_rx_reason_t *dcb23_rx_reason_maps[] = { + dcb23_rx_reason_map_ip_0, + dcb23_rx_reason_map_ip_1, + dcb23_rx_reason_map_ep, + dcb23_rx_reason_map_nlf, + NULL +}; + + +/* + * Function: + * dcb23_rx_reason_map_get + * Purpose: + * Return the RX reason map for DCB 23 type. + * Parameters: + * dcb_op - DCB operations + * dcb - dma control block + * Returns: + * RX reason map pointer + */ +static soc_rx_reason_t * +dcb23_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb) +{ + soc_rx_reason_t *map = NULL; + dcb23_t *d = (dcb23_t *)dcb; + + switch (d->word4.overlay1.cpu_opcode_type) { + case SOC_CPU_OPCODE_TYPE_IP_0: + map = dcb23_rx_reason_map_ip_0; + break; + case SOC_CPU_OPCODE_TYPE_IP_1: + map = dcb23_rx_reason_map_ip_1; + break; + case SOC_CPU_OPCODE_TYPE_EP: + map = dcb23_rx_reason_map_ep; + break; + case SOC_CPU_OPCODE_TYPE_NLF: + map = dcb23_rx_reason_map_nlf; + break; + default: + /* Unknown reason type */ + break; + } + + return map; +} + +static _shr_rx_decap_tunnel_t dcb23_rx_decap_tunnel_map[] = { + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_ACCESS_SVP, + _SHR_RX_DECAP_MIM, + _SHR_RX_DECAP_WTP2AC, + _SHR_RX_DECAP_AC2AC, + _SHR_RX_DECAP_AMT, + _SHR_RX_DECAP_IP, + _SHR_RX_DECAP_TRILL, + _SHR_RX_DECAP_L2MPLS_1LABEL, + _SHR_RX_DECAP_L2MPLS_1LABELCW, + _SHR_RX_DECAP_L3MPLS_1LABEL, + _SHR_RX_DECAP_L3MPLS_1LABELCW, + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_L2GRE +}; +static uint32 dcb23_rx_decap_tunnel_get(dcb_t *dcb) { + dcb23_t *d = (dcb23_t *)dcb; + uint32 decap_tunnel_type = d->word11.overlay1.decap_tunnel_type; + /* Check for array bounds */ + if ( (decap_tunnel_type < + (sizeof (dcb23_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { + return (uint32)dcb23_rx_decap_tunnel_map[decap_tunnel_type]; + } + return (uint32)_SHR_RX_DECAP_NONE; +} + +static uint32 +dcb23_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) +{ + dcb23_t *d = (dcb23_t *)dcb; + uint32 hgh[4]; + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; + COMPILER_REFERENCE(dt_mode); + + hgh[0] = soc_htonl(d->mh0); + hgh[1] = soc_htonl(d->mh1); + hgh[2] = soc_htonl(d->mh2); + hgh[3] = soc_htonl(d->mh3); + + return ((ingport_is_hg && + ((h->ppd_overlay1.ppd_type == 0) || + (h->ppd_overlay1.ppd_type == 1))) ? + ((d->itag_status) ? 0 : 2) : + ((d->itag_status & 0x2) ? + ((d->itag_status & 0x1) ? 0 : 2) : + ((d->itag_status & 0x1) ? 1 : 3))); + + +} + +GETFUNCFIELD(23, xfercount, count) +GETFUNCFIELD(23, rx_cos, word4.overlay1.queue_num) + +/* Fields extracted from MH/PBI */ +GETHG2FUNCFIELD(23, rx_destmod, dst_mod) +GETHG2FUNCFIELD(23, rx_destport, dst_port) +GETHG2FUNCFIELD(23, rx_srcmod, src_mod) +GETHG2FUNCFIELD(23, rx_srcport, src_port) +GETHG2FUNCFIELD(23, rx_opcode, opcode) +GETHG2FUNCFIELD(23, rx_prio, vlan_pri) /* outer_pri */ +GETHG2FUNCEXPR(23, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | + (h->ppd_overlay1.dst_port))) +GETHG2FUNCEXPR(23, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | + (h->ppd_overlay1.vc_label_15_8 << 8) | + (h->ppd_overlay1.vc_label_7_0))) +GETHG2FUNCEXPR(23, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : + (h->ppd_overlay2.ctag_hi << 8) | + (h->ppd_overlay2.ctag_lo))) +GETFUNCFIELD(23, rx_matchrule, match_rule) +GETFUNCFIELD(23, rx_reason, reason) +GETFUNCFIELD(23, rx_reason_hi, reason_hi) +GETFUNCFIELD(23, rx_ingport, srcport) +GETFUNCEXPR(23, rx_mirror, ((SOC_CPU_OPCODE_TYPE_IP_0 == + d->word4.overlay1.cpu_opcode_type) ? + (d->reason & (1 << 17)) : 0)) +GETFUNCFIELD(23, rx_timestamp, word12.overlay1.timestamp) +GETFUNCFIELD(23, rx_timestamp_upper, word14.overlay1.timestamp_hi) +GETPTREXPR(23, mhp, &(d->mh0)) +GETFUNCFIELD(23, outer_vid, word4.overlay1.outer_vid) +GETFUNCFIELD(23, outer_pri, word11.overlay1.outer_pri) +GETFUNCFIELD(23, outer_cfi, word11.overlay1.outer_cfi) +GETFUNCFIELD(23, rx_outer_tag_action, otag_action) +GETFUNCFIELD(23, inner_vid, word11.overlay1.inner_vid) +GETFUNCFIELD(23, inner_pri, inner_pri) +GETFUNCFIELD(23, inner_cfi, word11.overlay1.inner_cfi) +GETFUNCFIELD(23, rx_inner_tag_action, itag_action) +GETFUNCFIELD(23, rx_bpdu, bpdu) +GETFUNCEXPR(23, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) : + (((d->repl_nhi) & 0x40000) ? /* TR3 NHI */ + (((d->repl_nhi) & 0x3ffff) + _SHR_L3_EGRESS_IDX_MIN) : + ((d->repl_nhi) & 0x4000) ? /* HX4 NHI */ + (((d->repl_nhi) & 0x3fff) + _SHR_L3_EGRESS_IDX_MIN) : + (d->repl_nhi)))) +GETFUNCFIELD(23, rx_switch_drop, all_switch_drop) +GETFUNCNULL(23, olp_encap_oam_pkt) +GETFUNCNULL(23, read_ecc_error) +GETFUNCNULL(23, desc_remaining) +SETFUNCNULL(23, desc_remaining) +GETFUNCNULL(23, desc_status) +SETFUNCNULL(23, desc_status) + +dcb_op_t dcb23_op = { + 23, + sizeof(dcb23_t), + dcb23_rx_reason_maps, + dcb23_rx_reason_map_get, + dcb0_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb23_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb19_desc_intr_set, + dcb19_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb23_rx_untagged_get, + dcb19_rx_crc_get, + dcb23_rx_cos_get, + dcb23_rx_destmod_get, + dcb23_rx_destport_get, + dcb23_rx_opcode_get, + dcb23_rx_classtag_get, + dcb23_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb23_rx_prio_get, + dcb23_rx_reason_get, + dcb23_rx_reason_hi_get, + dcb23_rx_ingport_get, + dcb23_rx_srcport_get, + dcb23_rx_srcmod_get, + dcb23_rx_mcast_get, + dcb23_rx_vclabel_get, + dcb23_rx_mirror_get, + dcb23_rx_timestamp_get, + dcb23_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb23_mhp_get, + dcb23_outer_vid_get, + dcb23_outer_pri_get, + dcb23_outer_cfi_get, + dcb23_rx_outer_tag_action_get, + dcb23_inner_vid_get, + dcb23_inner_pri_get, + dcb23_inner_cfi_get, + dcb23_rx_inner_tag_action_get, + dcb23_rx_bpdu_get, + dcb23_rx_l3_intf_get, + dcb23_rx_decap_tunnel_get, + dcb23_rx_switch_drop_get, + dcb23_olp_encap_oam_pkt_get, + dcb23_read_ecc_error_get, + dcb23_desc_remaining_get, + dcb23_desc_remaining_set, + dcb23_desc_status_get, + dcb23_desc_status_set, + NULL, +}; +#endif /* BCM_TRIUMPH3_SUPPORT */ + +#if defined(BCM_TRIDENT2_SUPPORT) +/* + * DCB Type 26 Support + */ +/* From FORMAT CPU_OPCODES */ +static soc_rx_reason_t +dcb26_rx_reason_map[] = { + socRxReasonUnknownVlan, /* 0: CPU_UVLAN */ + socRxReasonL2SourceMiss, /* 1: CPU_SLF */ + socRxReasonL2DestMiss, /* 2: CPU_DLF */ + socRxReasonL2Move, /* 3: CPU_L2MOVE */ + socRxReasonL2Cpu, /* 4: CPU_L2CPU */ + socRxReasonSampleSource, /* 5: CPU_SFLOW_SRC */ + socRxReasonSampleDest, /* 6: CPU_SFLOW_DST */ + socRxReasonL3SourceMiss, /* 7: CPU_L3SRC_MISS */ + socRxReasonL3DestMiss, /* 8: CPU_L3DST_MISS */ + socRxReasonL3SourceMove, /* 9: CPU_L3SRC_MOVE */ + socRxReasonMcastMiss, /* 10: CPU_MC_MISS */ + socRxReasonIpMcastMiss, /* 11: CPU_IPMC_MISS */ + socRxReasonFilterMatch, /* 12: CPU_FFP */ + socRxReasonL3HeaderError, /* 13: CPU_L3HDR_ERR */ + socRxReasonProtocol, /* 14: CPU_PROTOCOL_PKT */ + socRxReasonDosAttack, /* 15: CPU_DOS_ATTACK */ + socRxReasonMartianAddr, /* 16: CPU_MARTIAN_ADDR */ + socRxReasonTunnelError, /* 17: CPU_TUNNEL_ERR */ + socRxReasonInvalid, /* 18: RESERVED_0 */ + socRxReasonIcmpRedirect, /* 19: ICMP_REDIRECT */ + socRxReasonL3Slowpath, /* 20: L3_SLOWPATH */ + socRxReasonParityError, /* 21: PARITY_ERROR */ + socRxReasonL3MtuFail, /* 22: L3_MTU_CHECK_FAIL */ + socRxReasonHigigHdrError, /* 23: HGHDR_ERROR */ + socRxReasonMcastIdxError, /* 24: MCIDX_ERROR */ + socRxReasonVlanFilterMatch, /* 25: VFP */ + socRxReasonClassBasedMove, /* 26: CBSM_PREVENTED */ + socRxReasonL3AddrBindFail, /* 27: MAC_BIND_FAIL */ + socRxReasonMplsLabelMiss, /* 28: MPLS_LABEL_MISS */ + socRxReasonMplsInvalidAction, /* 29: MPLS_INVALID_ACTION */ + socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */ + socRxReasonMplsTtl, /* 31: MPLS_TTL_CHECK_FAIL */ + socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */ + socRxReasonL2NonUnicastMiss, /* 33: PBT_NONUC_PKT */ + socRxReasonNhop, /* 34: L3_NEXT_HOP */ + socRxReasonMplsUnknownAch, /* 35: MPLS_UNKNOWN_ACH_ERROR */ + socRxReasonStation, /* 36: MY_STATION */ + socRxReasonNiv, /* 37: NIV_DROP_REASON_ENCODING */ + socRxReasonNiv, /* 38: -> */ + socRxReasonNiv, /* 39: 3-bit */ + socRxReasonVlanTranslate, /* 40: VXLT_MISS */ + socRxReasonTimeSync, /* 41: TIME_SYNC */ + socRxReasonOAMSlowpath, /* 42: OAM_SLOWPATH */ + socRxReasonOAMError, /* 43: OAM_ERROR */ + socRxReasonTrill, /* 44: TRILL_DROP_REASON_ENCODING */ + socRxReasonTrill, /* 45: -> */ + socRxReasonTrill, /* 46: 3-bit */ + socRxReasonL2GreSipMiss, /* 47: L2GRE_SIP_MISS */ + socRxReasonL2GreVpnIdMiss, /* 48: L2GRE_VPNID_MISS */ + socRxReasonBfdSlowpath, /* 49: BFD_SLOWPATH */ + socRxReasonBfd, /* 50: BFD_ERROR */ + socRxReasonOAMLMDM, /* 51: OAM_LMDM */ + socRxReasonCongestionCnm, /* 52: ICNM */ + socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */ + socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */ + socRxReasonCongestionCnmProxy, /* 55: QCN_CNM_PRP */ + socRxReasonCongestionCnmProxyError, /* 56: QCN_CNM_PRP_DLF */ + socRxReasonVxlanSipMiss, /* 57: VXLAN_SIP_MISS */ + socRxReasonVxlanVpnIdMiss, /* 58: VXLAN_VN_ID_MISS */ + socRxReasonFcoeZoneCheckFail, /* 59: FCOE_ZONE_CHECK_FAIL */ + socRxReasonNat, /* 60: NAT_DROP_REASON_ENCODING */ + socRxReasonNat, /* 61: -> */ + socRxReasonNat, /* 62: 3-bit */ + socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */ +}; +/* From FORMAT TRILL_CPU_OPCODE_ENCODING */ +static soc_rx_reason_t dcb26_rx_reason_trill_encoding_map[] = { + socRxReasonTrill, /* 0:NO_ERRORS + * Base field, must match the entries above */ + socRxReasonTrillInvalid, /* 1:TRILL_HDR_ERROR */ + socRxReasonTrillMiss, /* 2:TRILL_LOOKUP_MISS */ + socRxReasonTrillRpfFail, /* 3:TRILL_RPF_CHECK_FAIL */ + socRxReasonTrillSlowpath, /* 4:TRILL_SLOWPATH */ + socRxReasonTrillCoreIsIs, /* 5:TRILL_CORE_IS_IS_PKT */ + socRxReasonTrillTtl, /* 6:TRILL_HOP_COUNT_CHECK_FAIL */ + socRxReasonTrillName, /* 7:NICKNAME_TABLE_COPYTOCPU */ + socRxReasonInvalid, /* Offset 8 */ + socRxReasonInvalid, /* Offset 9 */ + socRxReasonInvalid, /* Offset 10 */ + socRxReasonInvalid, /* Offset 11 */ + socRxReasonInvalid, /* Offset 12 */ + socRxReasonInvalid, /* Offset 13 */ + socRxReasonInvalid, /* Offset 14 */ + socRxReasonInvalid, /* Offset 15 */ + socRxReasonInvalid, /* Offset 16 */ + socRxReasonInvalid, /* Offset 17 */ + socRxReasonInvalid, /* Offset 18 */ + socRxReasonInvalid, /* Offset 19 */ + socRxReasonInvalid, /* Offset 20 */ + socRxReasonInvalid, /* Offset 21 */ + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; +/* From FORMAT NAT_CPU_OPCODE_ENCODING */ +static soc_rx_reason_t dcb26_rx_reason_nat_encoding_map[] = { + socRxReasonNat, /* 0:NOP + * Base field, must match the entries above */ + socRxReasonTcpUdpNatMiss, /* 1:NORMAL */ + socRxReasonIcmpNatMiss, /* 2:ICMP */ + socRxReasonNatFragment, /* 3:FRAGMEMT */ + socRxReasonNatMiss, /* 4:OTHER */ + socRxReasonInvalid, /* Offset 5 */ + socRxReasonInvalid, /* Offset 6 */ + socRxReasonInvalid, /* Offset 7 */ + socRxReasonInvalid, /* Offset 8 */ + socRxReasonInvalid, /* Offset 9 */ + socRxReasonInvalid, /* Offset 10 */ + socRxReasonInvalid, /* Offset 11 */ + socRxReasonInvalid, /* Offset 12 */ + socRxReasonInvalid, /* Offset 13 */ + socRxReasonInvalid, /* Offset 14 */ + socRxReasonInvalid, /* Offset 15 */ + socRxReasonInvalid, /* Offset 16 */ + socRxReasonInvalid, /* Offset 17 */ + socRxReasonInvalid, /* Offset 18 */ + socRxReasonInvalid, /* Offset 19 */ + socRxReasonInvalid, /* Offset 20 */ + socRxReasonInvalid, /* Offset 21 */ + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; +static soc_rx_reason_t *dcb26_rx_reason_maps[] = { + dcb26_rx_reason_map, + dcb21_rx_reason_niv_encoding_map, + dcb26_rx_reason_trill_encoding_map, + dcb26_rx_reason_nat_encoding_map, + NULL +}; + +static _shr_rx_decap_tunnel_t dcb26_rx_decap_tunnel_map[] = { + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_ACCESS_SVP, + _SHR_RX_DECAP_MIM, + _SHR_RX_DECAP_L2GRE, + _SHR_RX_DECAP_VXLAN, + _SHR_RX_DECAP_AMT, + _SHR_RX_DECAP_IP, + _SHR_RX_DECAP_TRILL, + _SHR_RX_DECAP_L2MPLS_1LABEL, + _SHR_RX_DECAP_L2MPLS_2LABEL, + _SHR_RX_DECAP_L2MPLS_1LABELCW, + _SHR_RX_DECAP_L2MPLS_2LABELCW, + _SHR_RX_DECAP_L3MPLS_1LABEL, + _SHR_RX_DECAP_L3MPLS_2LABEL, + _SHR_RX_DECAP_L3MPLS_1LABELCW, + _SHR_RX_DECAP_L3MPLS_2LABELCW +}; +static uint32 dcb26_rx_decap_tunnel_get(dcb_t *dcb) { + dcb26_t *d = (dcb26_t *)dcb; + /* Check for array bounds */ + if ( (d->word11.overlay1.decap_tunnel_type < + (sizeof (dcb26_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { + return (uint32)dcb26_rx_decap_tunnel_map[d->word11.overlay1.decap_tunnel_type]; + } + return (uint32)_SHR_RX_DECAP_NONE; +} +static uint32 +dcb26_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) +{ + dcb26_t *d = (dcb26_t *)dcb; + + COMPILER_REFERENCE(dt_mode); + + return (ingport_is_hg ? + ((d->tag_status) ? 0 : 2) : + ((d->tag_status & 0x2) ? + ((d->tag_status & 0x1) ? 0 : 2) : + ((d->tag_status & 0x1) ? 1 : 3))); +} + +static uint32 +dcb26_rx_reason_get(dcb_t *dcb) +{ + dcb26_t *d = (dcb26_t *)dcb; + + return (d->switch_pkt) ? (d->reason) : 0; +} + +static uint32 +dcb26_rx_reason_hi_get(dcb_t *dcb) +{ + dcb26_t *d = (dcb26_t *)dcb; + + return (d->switch_pkt) ? (d->reason_hi) : 0; +} + +GETFUNCFIELD(26, xfercount, count) +GETFUNCFIELD(26, rx_cos, word4.overlay2.cpu_cos) + +/* Fields extracted from MH/PBI */ +GETHG2FUNCFIELD(26, rx_destmod, dst_mod) +GETHG2FUNCFIELD(26, rx_destport, dst_port) +GETHG2FUNCFIELD(26, rx_srcmod, src_mod) +GETHG2FUNCFIELD(26, rx_srcport, src_port) +GETHG2FUNCFIELD(26, rx_opcode, opcode) +GETHG2FUNCFIELD(26, rx_prio, vlan_pri) /* outer_pri */ +GETHG2FUNCEXPR(26, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | + (h->ppd_overlay1.dst_port))) +GETHG2FUNCEXPR(26, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | + (h->ppd_overlay1.vc_label_15_8 << 8) | + (h->ppd_overlay1.vc_label_7_0))) +GETHG2FUNCEXPR(26, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : + (h->ppd_overlay2.ctag_hi << 8) | + (h->ppd_overlay2.ctag_lo))) +GETFUNCFIELD(26, rx_matchrule, match_rule) +GETFUNCFIELD(26, rx_ingport, srcport) +GETFUNCFIELD(26, rx_timestamp, timestamp) +GETFUNCFIELD(26, rx_timestamp_upper, word14.timestamp_hi) +GETPTREXPR(26, mhp, &(d->mh0)) +GETFUNCFIELD(26, outer_vid, word4.overlay1.outer_vid) +GETFUNCFIELD(26, outer_pri, word11.overlay1.outer_pri) +GETFUNCFIELD(26, outer_cfi, word11.overlay1.outer_cfi) +GETFUNCFIELD(26, inner_vid, word11.overlay1.inner_vid) +GETFUNCFIELD(26, inner_pri, inner_pri) +GETFUNCFIELD(26, inner_cfi, word11.overlay1.inner_cfi) +GETFUNCFIELD(26, rx_bpdu, bpdu) +GETFUNCEXPR(26, rx_l3_intf, + (((d->repl_nhi) & 0xffff) + _SHR_L3_EGRESS_IDX_MIN)) + +dcb_op_t dcb26_op = { + 26, + sizeof(dcb26_t), + dcb26_rx_reason_maps, + dcb0_rx_reason_map_get, + dcb21_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb26_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb19_desc_intr_set, + dcb19_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb26_rx_untagged_get, + dcb19_rx_crc_get, + dcb26_rx_cos_get, + dcb26_rx_destmod_get, + dcb26_rx_destport_get, + dcb26_rx_opcode_get, + dcb26_rx_classtag_get, + dcb26_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb26_rx_prio_get, + dcb26_rx_reason_get, + dcb26_rx_reason_hi_get, + dcb26_rx_ingport_get, + dcb26_rx_srcport_get, + dcb26_rx_srcmod_get, + dcb26_rx_mcast_get, + dcb26_rx_vclabel_get, + dcb23_rx_mirror_get, + dcb26_rx_timestamp_get, + dcb26_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb26_mhp_get, + dcb26_outer_vid_get, + dcb26_outer_pri_get, + dcb26_outer_cfi_get, + dcb23_rx_outer_tag_action_get, + dcb26_inner_vid_get, + dcb26_inner_pri_get, + dcb26_inner_cfi_get, + dcb23_rx_inner_tag_action_get, + dcb26_rx_bpdu_get, + dcb26_rx_l3_intf_get, + dcb26_rx_decap_tunnel_get, + dcb23_rx_switch_drop_get, + dcb23_olp_encap_oam_pkt_get, + dcb23_read_ecc_error_get, + dcb23_desc_remaining_get, + dcb23_desc_remaining_set, + dcb23_desc_status_get, + dcb23_desc_status_set, + NULL, +}; +#endif /* BCM_TRIDENT2_SUPPORT */ + +#if defined(BCM_KATANA2_SUPPORT) +/* + * DCB Type 29 Support + */ +static soc_rx_reason_t +dcb29_rx_reason_map_ip_0[] = { /* IP Overlay 0 */ + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonL2SourceMiss, /* Offset 1 */ + socRxReasonL2DestMiss, /* Offset 2 */ + socRxReasonL2Move, /* Offset 3 */ + socRxReasonL2Cpu, /* Offset 4 */ + socRxReasonSampleSource, /* Offset 5 */ + socRxReasonSampleDest, /* Offset 6 */ + socRxReasonL3SourceMiss, /* Offset 7 */ + socRxReasonL3DestMiss, /* Offset 8 */ + socRxReasonL3SourceMove, /* Offset 9 */ + socRxReasonMcastMiss, /* Offset 10 */ + socRxReasonIpMcastMiss, /* Offset 11 */ + socRxReasonFilterMatch, /* Offset 12 */ + socRxReasonL3HeaderError, /* Offset 13 */ + socRxReasonProtocol, /* Offset 14 */ + socRxReasonDosAttack, /* Offset 15 */ + socRxReasonMartianAddr, /* Offset 16 */ + socRxReasonTunnelError, /* Offset 17 */ + socRxReasonMirror, /* Offset 18 */ + socRxReasonIcmpRedirect, /* Offset 19 */ + socRxReasonL3Slowpath, /* Offset 20 */ + socRxReasonParityError, /* Offset 21 */ + socRxReasonL3MtuFail, /* Offset 22 */ + socRxReasonHigigHdrError, /* Offset 23 */ + socRxReasonMcastIdxError, /* Offset 24 */ + socRxReasonVlanFilterMatch, /* Offset 25 */ + socRxReasonClassBasedMove, /* Offset 26 */ + socRxReasonL3AddrBindFail, /* Offset 27 */ + socRxReasonMplsLabelMiss, /* Offset 28 */ + socRxReasonMplsInvalidAction, /* Offset 29 */ + socRxReasonMplsInvalidPayload, /* Offset 30 */ + socRxReasonMplsTtl, /* Offset 31 */ + socRxReasonMplsSequenceNumber, /* Offset 32 */ + socRxReasonL2NonUnicastMiss, /* Offset 33 */ + socRxReasonNhop, /* Offset 34 */ + socRxReasonBfdSlowpath, /* Offset 35 */ + socRxReasonStation, /* Offset 36 */ + socRxReasonVlanTranslate, /* Offset 37 */ + socRxReasonTimeSync, /* Offset 38 */ + socRxReasonL2LearnLimit, /* Offset 39 */ + socRxReasonBfd, /* Offset 40 */ + socRxReasonFailoverDrop, /* Offset 41 */ + socRxReasonUnknownSubtendingPort, /* Offset 42 */ + socRxReasonMplsReservedEntropyLabel, /* Offset 43 */ + socRxReasonLLTagAbsentDrop, /* Offset 44 */ + socRxReasonLLTagPresentDrop, /* Offset 45 */ + socRxReasonMplsLookupsExceeded, /* Offset 46 */ + socRxReasonMplsIllegalReservedLabel, /* Offset 47 */ + socRxReasonMplsRouterAlertLabel, /* Offset 48 */ + socRxReasonMplsUnknownAch, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static soc_rx_reason_t +dcb29_rx_reason_map_ip_1[] = { /* IP Overlay 1 */ + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonL2SourceMiss, /* Offset 1 */ + socRxReasonL2DestMiss, /* Offset 2 */ + socRxReasonL2Move, /* Offset 3 */ + socRxReasonL2Cpu, /* Offset 4 */ + socRxReasonSampleSource, /* Offset 5 */ + socRxReasonSampleDest, /* Offset 6 */ + socRxReasonL3SourceMiss, /* Offset 7 */ + socRxReasonL3DestMiss, /* Offset 8 */ + socRxReasonL3SourceMove, /* Offset 9 */ + socRxReasonMcastMiss, /* Offset 10 */ + socRxReasonIpMcastMiss, /* Offset 11 */ + socRxReasonFilterMatch, /* Offset 12 */ + socRxReasonL3HeaderError, /* Offset 13 */ + socRxReasonProtocol, /* Offset 14 */ + socRxReasonDosAttack, /* Offset 15 */ + socRxReasonMartianAddr, /* Offset 16 */ + socRxReasonTunnelError, /* Offset 17 */ + socRxReasonMirror, /* Offset 18 */ + socRxReasonIcmpRedirect, /* Offset 19 */ + socRxReasonL3Slowpath, /* Offset 20 */ + socRxReasonParityError, /* Offset 21 */ + socRxReasonL3MtuFail, /* Offset 22 */ + socRxReasonHigigHdrError, /* Offset 23 */ + socRxReasonMcastIdxError, /* Offset 24 */ + socRxReasonVlanFilterMatch, /* Offset 25 */ + socRxReasonClassBasedMove, /* Offset 26 */ + socRxReasonL3AddrBindFail, /* Offset 27 */ + socRxReasonMplsLabelMiss, /* Offset 28 */ + socRxReasonMplsInvalidAction, /* Offset 29 */ + socRxReasonMplsInvalidPayload, /* Offset 30 */ + socRxReasonMplsTtl, /* Offset 31 */ + socRxReasonMplsSequenceNumber, /* Offset 32 */ + socRxReasonL2NonUnicastMiss, /* Offset 33 */ + socRxReasonNhop, /* Offset 34 */ + socRxReasonBfdSlowpath, /* Offset 35 */ + socRxReasonStation, /* Offset 36 */ + socRxReasonVlanTranslate, /* Offset 37 */ + socRxReasonTimeSync, /* Offset 38 */ + socRxReasonL2LearnLimit, /* Offset 39 */ + socRxReasonBfd, /* Offset 40 */ + socRxReasonFailoverDrop, /* Offset 41 */ + socRxReasonOAMSlowpath, /* Offset 42 */ + socRxReasonOAMError, /* Offset 43 */ + socRxReasonOAMLMDM, /* Offset 44 */ + socRxReasonOAMCCMSlowPath, /* Offset 45 */ + socRxReasonOAMIncompleteOpcode,/* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonSat, /* Offset 48 */ + socRxReasonOAMMplsLmDm, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; +static soc_rx_reason_t +dcb29_rx_reason_map_ip_3[] = { /* IP Overlay 3 */ + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonL2SourceMiss, /* Offset 1 */ + socRxReasonL2DestMiss, /* Offset 2 */ + socRxReasonL2Move, /* Offset 3 */ + socRxReasonL2Cpu, /* Offset 4 */ + socRxReasonSampleSource, /* Offset 5 */ + socRxReasonSampleDest, /* Offset 6 */ + socRxReasonL3SourceMiss, /* Offset 7 */ + socRxReasonL3DestMiss, /* Offset 8 */ + socRxReasonL3SourceMove, /* Offset 9 */ + socRxReasonMcastMiss, /* Offset 10 */ + socRxReasonIpMcastMiss, /* Offset 11 */ + socRxReasonFilterMatch, /* Offset 12 */ + socRxReasonL3HeaderError, /* Offset 13 */ + socRxReasonProtocol, /* Offset 14 */ + socRxReasonDosAttack, /* Offset 15 */ + socRxReasonMartianAddr, /* Offset 16 */ + socRxReasonTunnelError, /* Offset 17 */ + socRxReasonMirror, /* Offset 18 */ + socRxReasonIcmpRedirect, /* Offset 19 */ + socRxReasonL3Slowpath, /* Offset 20 */ + socRxReasonParityError, /* Offset 21 */ + socRxReasonL3MtuFail, /* Offset 22 */ + socRxReasonHigigHdrError, /* Offset 23 */ + socRxReasonMcastIdxError, /* Offset 24 */ + socRxReasonVlanFilterMatch, /* Offset 25 */ + socRxReasonClassBasedMove, /* Offset 26 */ + socRxReasonL3AddrBindFail, /* Offset 27 */ + socRxReasonMplsLabelMiss, /* Offset 28 */ + socRxReasonMplsInvalidAction, /* Offset 29 */ + socRxReasonMplsInvalidPayload, /* Offset 30 */ + socRxReasonMplsTtl, /* Offset 31 */ + socRxReasonMplsSequenceNumber, /* Offset 32 */ + socRxReasonL2NonUnicastMiss, /* Offset 33 */ + socRxReasonNhop, /* Offset 34 */ + socRxReasonBfdSlowpath, /* Offset 35 */ + socRxReasonStation, /* Offset 36 */ + socRxReasonVlanTranslate, /* Offset 37 */ + socRxReasonTimeSync, /* Offset 38 */ + socRxReasonL2LearnLimit, /* Offset 39 */ + socRxReasonBfd, /* Offset 40 */ + socRxReasonFailoverDrop, /* Offset 41 */ + socRxReasonNivUntagDrop, /* Offset 42 */ + socRxReasonNivTagDrop, /* Offset 43 */ + socRxReasonNivTagInvalid, /* Offset 44 */ + socRxReasonNivRpfFail, /* Offset 45 */ + socRxReasonNivInterfaceMiss, /* Offset 46 */ + socRxReasonNivPrioDrop, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ + }; +static soc_rx_reason_t +dcb29_rx_reason_map_ep[] = { + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonStp, /* Offset 1 */ + socRxReasonVlanTranslate, /* Offset 2 new */ + socRxReasonTunnelError, /* Offset 3 */ + socRxReasonIpmc, /* Offset 4 */ + socRxReasonL3HeaderError, /* Offset 5 */ + socRxReasonTtl, /* Offset 6 */ + socRxReasonL2MtuFail, /* Offset 7 */ + socRxReasonHigigHdrError, /* Offset 8 */ + socRxReasonSplitHorizon, /* Offset 9 */ + socRxReasonNivPrune, /* Offset 10 */ + socRxReasonVirtualPortPrune, /* Offset 11 */ + socRxReasonFilterMatch, /* Offset 12 */ + socRxReasonNonUnicastDrop, /* Offset 13 */ + socRxReasonTrillPacketPortMismatch, /* Offset 14 */ + socRxReasonOAMError, /* Offset 15 */ + socRxReasonOAMLMDM, /* Offset 16 */ + socRxReasonOAMCCMSlowPath, /* Offset 17 */ + socRxReasonOAMSlowpath, /* Offset 18 */ + socRxReasonInvalid, /* Offset 19 */ + socRxReasonInvalid, /* Offset 20 */ + socRxReasonInvalid, /* Offset 21 */ + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + + +static soc_rx_reason_t *dcb29_rx_reason_maps[] = { + dcb29_rx_reason_map_ip_0, + dcb29_rx_reason_map_ip_1, + dcb29_rx_reason_map_ip_3, + dcb29_rx_reason_map_ep, + NULL +}; +/* + * Function: + * dcb29_rx_reason_map_get + * Purpose: + * Return the RX reason map for DCB 23 type. + * Parameters: + * dcb_op - DCB operations + * dcb - dma control block + * Returns: + * RX reason map pointer + */ +static soc_rx_reason_t * +dcb29_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb) +{ + soc_rx_reason_t *map = NULL; + dcb29_t *d = (dcb29_t *)dcb; + + switch (d->word4.overlay1.cpu_opcode_type) { + case SOC_CPU_OPCODE_TYPE_IP_0: + map = dcb29_rx_reason_map_ip_0; + break; + case SOC_CPU_OPCODE_TYPE_IP_1: + map = dcb29_rx_reason_map_ip_1; + break; + case SOC_CPU_OPCODE_TYPE_IP_3: + map = dcb29_rx_reason_map_ip_3; + break; + case SOC_CPU_OPCODE_TYPE_EP: + map = dcb29_rx_reason_map_ep; + break; + default: + /* Unknown reason type */ + break; + } + + return map; +} + +static _shr_rx_decap_tunnel_t dcb29_rx_decap_tunnel_map[] = { + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_ACCESS_SVP, + _SHR_RX_DECAP_MIM, + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_IP, + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_L2MPLS_1LABEL, + _SHR_RX_DECAP_L2MPLS_1LABELCW, + _SHR_RX_DECAP_L3MPLS_1LABEL, + _SHR_RX_DECAP_L3MPLS_1LABELCW, +}; +static uint32 dcb29_rx_decap_tunnel_get(dcb_t *dcb) { + dcb29_t *d = (dcb29_t *)dcb; + uint32 decap_tunnel_type = d->word11.overlay1.decap_tunnel_type; + /* Check for array bounds */ + if ( (decap_tunnel_type < + (sizeof (dcb29_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { + return (uint32)dcb29_rx_decap_tunnel_map[decap_tunnel_type]; + } + return (uint32)_SHR_RX_DECAP_NONE; +} + +GETFUNCEXPR(29, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) : + (((d->repl_nhi) & 0x3fff) + + _SHR_L3_EGRESS_IDX_MIN))) + +GETFUNCFIELD(29, outer_vid, word4.overlay1.outer_vid) +GETFUNCFIELD(29, olp_encap_oam_pkt, word4.overlay3.olp_encap_oam_pkt) +GETFUNCNULL(29, read_ecc_error) +GETFUNCNULL(29, desc_remaining) +SETFUNCNULL(29, desc_remaining) +GETFUNCNULL(29, desc_status) +SETFUNCNULL(29, desc_status) + +dcb_op_t dcb29_op = { + 29, + sizeof(dcb29_t), + dcb29_rx_reason_maps, + dcb29_rx_reason_map_get, + dcb0_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb23_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb19_desc_intr_set, + dcb19_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb23_rx_untagged_get, + dcb19_rx_crc_get, + dcb23_rx_cos_get, + dcb23_rx_destmod_get, + dcb23_rx_destport_get, + dcb23_rx_opcode_get, + dcb23_rx_classtag_get, + dcb23_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb23_rx_prio_get, + dcb23_rx_reason_get, + dcb23_rx_reason_hi_get, + dcb23_rx_ingport_get, + dcb23_rx_srcport_get, + dcb23_rx_srcmod_get, + dcb23_rx_mcast_get, + dcb23_rx_vclabel_get, + dcb23_rx_mirror_get, + dcb23_rx_timestamp_get, + dcb23_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb23_mhp_get, + dcb29_outer_vid_get, + dcb23_outer_pri_get, + dcb23_outer_cfi_get, + dcb23_rx_outer_tag_action_get, + dcb23_inner_vid_get, + dcb23_inner_pri_get, + dcb23_inner_cfi_get, + dcb23_rx_inner_tag_action_get, + dcb23_rx_bpdu_get, + dcb29_rx_l3_intf_get, + dcb29_rx_decap_tunnel_get, + dcb23_rx_switch_drop_get, + dcb29_olp_encap_oam_pkt_get, + dcb29_read_ecc_error_get, + dcb29_desc_remaining_get, + dcb29_desc_remaining_set, + dcb29_desc_status_get, + dcb29_desc_status_set, + NULL, +}; +#endif /* BCM_KATANA2_SUPPORT */ + +#if defined(BCM_HURRICANE2_SUPPORT) +GETFUNCNULL(30, rx_switch_drop) +GETFUNCNULL(30, olp_encap_oam_pkt) +GETFUNCNULL(30, read_ecc_error) +GETFUNCNULL(30, desc_remaining) +SETFUNCNULL(30, desc_remaining) +GETFUNCNULL(30, desc_status) +SETFUNCNULL(30, desc_status) + +dcb_op_t dcb30_op = { + 30, + sizeof(dcb20_t), + dcb20_rx_reason_maps, + dcb0_rx_reason_map_get, + dcb0_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb19_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb19_desc_intr_set, + dcb19_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb19_rx_untagged_get, + dcb19_rx_crc_get, + dcb19_rx_cos_get, + dcb19_rx_destmod_get, + dcb19_rx_destport_get, + dcb19_rx_opcode_get, + dcb19_rx_classtag_get, + dcb20_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb19_rx_prio_get, + dcb19_rx_reason_get, + dcb19_rx_reason_hi_get, + dcb19_rx_ingport_get, + dcb19_rx_srcport_get, + dcb19_rx_srcmod_get, + dcb19_rx_mcast_get, + dcb19_rx_vclabel_get, + dcb19_rx_mirror_get, + dcb20_rx_timestamp_get, + dcb20_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb19_mhp_get, + dcb19_outer_vid_get, + dcb19_outer_pri_get, + dcb19_outer_cfi_get, + dcb19_rx_outer_tag_action_get, + dcb19_inner_vid_get, + dcb19_inner_pri_get, + dcb19_inner_cfi_get, + dcb19_rx_inner_tag_action_get, + dcb19_rx_bpdu_get, + dcb9_rx_l3_intf_get, + dcb19_rx_decap_tunnel_get, + dcb30_rx_switch_drop_get, + dcb30_olp_encap_oam_pkt_get, + dcb30_read_ecc_error_get, + dcb30_desc_remaining_get, + dcb30_desc_remaining_set, + dcb30_desc_status_get, + dcb30_desc_status_set, + NULL, +}; +#endif /* BCM_HURRICANE2_SUPPORT */ + +#if defined(BCM_GREYHOUND_SUPPORT) +/* + * DCB Type 31 Support + */ +static soc_rx_reason_t +dcb31_rx_reason_map[] = { + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonL2SourceMiss, /* Offset 1 */ + socRxReasonL2DestMiss, /* Offset 2 */ + socRxReasonL2Move, /* Offset 3 */ + socRxReasonL2Cpu, /* Offset 4 */ + socRxReasonSampleSource, /* Offset 5 */ + socRxReasonSampleDest, /* Offset 6 */ + socRxReasonL3SourceMiss, /* Offset 7 */ + socRxReasonL3DestMiss, /* Offset 8 */ + socRxReasonL3SourceMove, /* Offset 9 */ + socRxReasonMcastMiss, /* Offset 10 */ + socRxReasonIpMcastMiss, /* Offset 11 */ + socRxReasonFilterMatch, /* Offset 12 */ + socRxReasonL3HeaderError, /* Offset 13 */ + socRxReasonProtocol, /* Offset 14 */ + socRxReasonDosAttack, /* Offset 15 */ + socRxReasonMartianAddr, /* Offset 16 */ + socRxReasonTunnelError, /* Offset 17 */ + socRxReasonL2MtuFail, /* Offset 18 */ + socRxReasonIcmpRedirect, /* Offset 19 */ + socRxReasonL3Slowpath, /* Offset 20 */ + socRxReasonParityError, /* Offset 21 */ + socRxReasonL3MtuFail, /* Offset 22 */ + socRxReasonHigigHdrError, /* Offset 23 */ + socRxReasonMcastIdxError, /* Offset 24 */ + socRxReasonVlanFilterMatch, /* Offset 25 */ + socRxReasonClassBasedMove, /* Offset 26 */ + socRxReasonL2LearnLimit, /* Offset 27 */ + socRxReasonMplsLabelMiss, /* Offset 28 */ + socRxReasonMplsInvalidAction, /* Offset 29 */ + socRxReasonMplsInvalidPayload, /* Offset 30 */ + socRxReasonMplsTtl, /* Offset 31 */ + socRxReasonMplsSequenceNumber, /* Offset 32 */ + socRxReasonL2NonUnicastMiss, /* Offset 33 */ + socRxReasonNhop, /* Offset 34 */ + socRxReasonMplsCtrlWordError, /* Offset 35 */ + socRxReasonTimeSync, /* Offset 36 */ + socRxReasonOAMSlowpath, /* Offset 37 */ + socRxReasonOAMError, /* Offset 38 */ + socRxReasonOAMLMDM, /* Offset 39 */ + socRxReasonL3AddrBindFail, /* Offset 40 */ + socRxReasonVlanTranslate, /* Offset 41 */ + socRxReasonNiv, /* Offset 42 */ + socRxReasonNiv, /* Offset 43 */ + socRxReasonNiv, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; +static soc_rx_reason_t *dcb31_rx_reason_maps[] = { + dcb31_rx_reason_map, + NULL +}; + +static uint32 +dcb31_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) +{ + dcb31_t *d = (dcb31_t *)dcb; + + COMPILER_REFERENCE(dt_mode); + + return (ingport_is_hg ? + ((d->itag_status) ? 0 : 2) : + ((d->itag_status & 0x2) ? + ((d->itag_status & 0x1) ? 0 : 2) : + ((d->itag_status & 0x1) ? 1 : 3))); +} + +GETFUNCEXPR(31, rx_mirror, ((d->imirror) | (d->emirror))) + +GETFUNCFIELD(31, rx_cos, word4.overlay2.cpu_cos) +GETFUNCFIELD(31, outer_vid, word4.overlay1.outer_vid) +GETFUNCFIELD(31, outer_pri, outer_pri) +GETFUNCFIELD(31, outer_cfi, outer_cfi) +GETFUNCFIELD(31, rx_outer_tag_action, otag_action) +GETFUNCFIELD(31, inner_vid, inner_vid) +GETFUNCFIELD(31, inner_pri, inner_pri) +GETFUNCFIELD(31, inner_cfi, inner_cfi) +GETFUNCFIELD(31, rx_inner_tag_action, itag_action) +GETFUNCFIELD(31, rx_bpdu, bpdu) + +GETFUNCFIELD(31, rx_timestamp_upper, timestamp_hi) +GETFUNCEXPR(31, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) : + (((d->repl_nhi) & 0x3ff) + _SHR_L3_EGRESS_IDX_MIN))) +GETFUNCNULL(31, rx_switch_drop) +GETFUNCNULL(31, olp_encap_oam_pkt) +GETFUNCNULL(31, read_ecc_error) +GETFUNCNULL(31, desc_remaining) +SETFUNCNULL(31, desc_remaining) +GETFUNCNULL(31, desc_status) +SETFUNCNULL(31, desc_status) + +dcb_op_t dcb31_op = { + 31, + sizeof(dcb31_t), + dcb31_rx_reason_maps, + dcb0_rx_reason_map_get, + dcb0_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb19_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb19_desc_intr_set, + dcb19_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb31_rx_untagged_get, + dcb19_rx_crc_get, + dcb31_rx_cos_get, + dcb23_rx_destmod_get, + dcb23_rx_destport_get, + dcb23_rx_opcode_get, + dcb23_rx_classtag_get, + dcb23_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb23_rx_prio_get, + dcb23_rx_reason_get, + dcb23_rx_reason_hi_get, + dcb23_rx_ingport_get, + dcb23_rx_srcport_get, + dcb23_rx_srcmod_get, + dcb23_rx_mcast_get, + dcb23_rx_vclabel_get, + dcb31_rx_mirror_get, + dcb23_rx_timestamp_get, + dcb31_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb23_mhp_get, + dcb31_outer_vid_get, + dcb31_outer_pri_get, + dcb31_outer_cfi_get, + dcb31_rx_outer_tag_action_get, + dcb31_inner_vid_get, + dcb31_inner_pri_get, + dcb31_inner_cfi_get, + dcb31_rx_inner_tag_action_get, + dcb31_rx_bpdu_get, + dcb31_rx_l3_intf_get, + dcb19_rx_decap_tunnel_get, + dcb31_rx_switch_drop_get, + dcb31_olp_encap_oam_pkt_get, + dcb31_read_ecc_error_get, + dcb31_desc_remaining_get, + dcb31_desc_remaining_set, + dcb31_desc_status_get, + dcb31_desc_status_set, + NULL, +}; +#endif /* BCM_GREYHOUND_SUPPORT */ + +#if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TOMAHAWK2_SUPPORT) +static uint32 +dcb32_rx_hg2_ext_eh_type_get(dcb_t *dcb) +{ + uint32 eh_type = 0; + dcb32_t *d = (dcb32_t *)dcb; + + if (d->hg2_ext_hdr) { + switch (d->word14.overlay1.eh_type) { + case 0: + eh_type = d->word14.overlay1.eh_queue_tag; + break; + default: + break; + } + } + return eh_type; +} + +/* + * DCB Type 32 Support + */ +/* From FORMAT CPU_OPCODES */ +static soc_rx_reason_t +dcb32_rx_reason_map[] = { + socRxReasonUnknownVlan, /* 0: CPU_UVLAN */ + socRxReasonL2SourceMiss, /* 1: CPU_SLF */ + socRxReasonL2DestMiss, /* 2: CPU_DLF */ + socRxReasonL2Move, /* 3: CPU_L2MOVE */ + socRxReasonL2Cpu, /* 4: CPU_L2CPU */ + socRxReasonSampleSource, /* 5: CPU_SFLOW_SRC */ + socRxReasonSampleDest, /* 6: CPU_SFLOW_DST */ + socRxReasonL3SourceMiss, /* 7: CPU_L3SRC_MISS */ + socRxReasonL3DestMiss, /* 8: CPU_L3DST_MISS */ + socRxReasonL3SourceMove, /* 9: CPU_L3SRC_MOVE */ + socRxReasonMcastMiss, /* 10: CPU_MC_MISS */ + socRxReasonIpMcastMiss, /* 11: CPU_IPMC_MISS */ + socRxReasonFilterMatch, /* 12: CPU_FFP */ + socRxReasonL3HeaderError, /* 13: CPU_L3HDR_ERR */ + socRxReasonProtocol, /* 14: CPU_PROTOCOL_PKT */ + socRxReasonDosAttack, /* 15: CPU_DOS_ATTACK */ + socRxReasonMartianAddr, /* 16: CPU_MARTIAN_ADDR */ + socRxReasonTunnelError, /* 17: CPU_TUNNEL_ERR */ + socRxReasonSampleSourceFlex, /* 18: CPU_SFLOW_FLEX */ + socRxReasonIcmpRedirect, /* 19: ICMP_REDIRECT */ + socRxReasonL3Slowpath, /* 20: L3_SLOWPATH */ + socRxReasonParityError, /* 21: PARITY_ERROR */ + socRxReasonL3MtuFail, /* 22: L3_MTU_CHECK_FAIL */ + socRxReasonHigigHdrError, /* 23: HGHDR_ERROR */ + socRxReasonMcastIdxError, /* 24: MCIDX_ERROR */ + socRxReasonVlanFilterMatch, /* 25: VFP */ + socRxReasonClassBasedMove, /* 26: CBSM_PREVENTED */ + socRxReasonL3AddrBindFail, /* 27: MAC_BIND_FAIL */ + socRxReasonMplsLabelMiss, /* 28: MPLS_LABEL_MISS */ + socRxReasonMplsInvalidAction, /* 29: MPLS_INVALID_ACTION */ + socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */ + socRxReasonMplsTtl, /* 31: MPLS_TTL_CHECK_FAIL */ + socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */ + socRxReasonL2NonUnicastMiss, /* 33: PBT_NONUC_PKT */ + socRxReasonNhop, /* 34: L3_NEXT_HOP */ + socRxReasonMplsUnknownAch, /* 35: MPLS_UNKNOWN_ACH_ERROR */ + socRxReasonStation, /* 36: MY_STATION */ + socRxReasonNiv, /* 37: NIV_DROP_REASON_ENCODING */ + socRxReasonNiv, /* 38: -> */ + socRxReasonNiv, /* 39: 3-bit */ + socRxReasonVlanTranslate, /* 40: XLT_MISS */ + socRxReasonTimeSync, /* 41: TIME_SYNC */ + socRxReasonOAMSlowpath, /* 42: OAM_SLOWPATH */ + socRxReasonOAMError, /* 43: OAM_ERROR */ + socRxReasonTrill, /* 44: TRILL_DROP_REASON_ENCODING */ + socRxReasonTrill, /* 45: -> */ + socRxReasonTrill, /* 46: 3-bit */ + socRxReasonL2GreSipMiss, /* 47: L2GRE_SIP_MISS */ + socRxReasonL2GreVpnIdMiss, /* 48: L2GRE_VPNID_MISS */ + socRxReasonBfdSlowpath, /* 49: BFD_SLOWPATH */ + socRxReasonBfd, /* 50: BFD_ERROR */ +#if 1 + socRxReasonInvalid, /* 51: NOT DEFINED */ +#endif + socRxReasonCongestionCnm, /* 52: ICNM */ + socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */ + socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */ + socRxReasonCongestionCnmProxy, /* 55: QCN_CNM_PRP */ + socRxReasonCongestionCnmProxyError, /* 56: QCN_CNM_PRP_DLF */ + socRxReasonVxlanSipMiss, /* 57: VXLAN_SIP_MISS */ + socRxReasonVxlanVpnIdMiss, /* 58: VXLAN_VN_ID_MISS */ + socRxReasonFcoeZoneCheckFail, /* 59: FCOE_ZONE_CHECK_FAIL */ + socRxReasonNat, /* 60: NAT_DROP_REASON_ENCODING */ + socRxReasonNat, /* 61: -> */ + socRxReasonNat, /* 62: 3-bit */ + socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */ +}; + +static soc_rx_reason_t *dcb32_rx_reason_maps[] = { + dcb32_rx_reason_map, + dcb21_rx_reason_niv_encoding_map, + dcb26_rx_reason_trill_encoding_map, + dcb26_rx_reason_nat_encoding_map, + NULL +}; + +static _shr_rx_decap_tunnel_t dcb32_rx_decap_tunnel_map[] = { + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_ACCESS_SVP, + _SHR_RX_DECAP_MIM, + _SHR_RX_DECAP_L2GRE, + _SHR_RX_DECAP_VXLAN, + _SHR_RX_DECAP_AMT, + _SHR_RX_DECAP_IP, + _SHR_RX_DECAP_TRILL, + _SHR_RX_DECAP_L2MPLS_1LABEL, + _SHR_RX_DECAP_L2MPLS_2LABEL, + _SHR_RX_DECAP_L2MPLS_1LABELCW, + _SHR_RX_DECAP_L2MPLS_2LABELCW, + _SHR_RX_DECAP_L3MPLS_1LABEL, + _SHR_RX_DECAP_L3MPLS_2LABEL, + _SHR_RX_DECAP_L3MPLS_1LABELCW, + _SHR_RX_DECAP_L3MPLS_2LABELCW +}; +static uint32 dcb32_rx_decap_tunnel_get(dcb_t *dcb) { + dcb32_t *d = (dcb32_t *)dcb; + /* Check for array bounds */ + if ( (d->decap_tunnel_type < + (sizeof (dcb32_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { + return (uint32)dcb32_rx_decap_tunnel_map[d->decap_tunnel_type]; + } + return (uint32)_SHR_RX_DECAP_NONE; +} + +/* Fields extracted from MH/PBI */ +GETFUNCFIELD(32, rx_ingport, srcport) + +GETFUNCFIELD(32, rx_cos, cos) +GETFUNCEXPR(32, rx_mirror, ((SOC_CPU_OPCODE_TYPE_IP_0 == d->cpu_opcode_type) ? + (d->reason & (1 << 17)) : 0)) +GETFUNCFIELD(32, outer_vid, outer_vid) +GETFUNCFIELD(32, rx_switch_drop, uc_switch_drop) +GETFUNCNULL(32, olp_encap_oam_pkt) +GETFUNCNULL(32, read_ecc_error) +GETFUNCNULL(32, desc_remaining) +SETFUNCNULL(32, desc_remaining) +GETFUNCNULL(32, desc_status) +SETFUNCNULL(32, desc_status) + +static void +dcb32_desc_intr_set(dcb_t * dcb, int val) +{ + dcb32_t * d = (dcb32_t *)dcb; + + d->c_intr = val; + return; +} + +static uint32 +dcb32_desc_intr_get(dcb_t * dcb) +{ + dcb32_t * d = (dcb32_t *)dcb; + return (d->c_intr); +} + +/* + * DCB Type 32 Support + */ +dcb_op_t dcb32_op = { + 32, + sizeof(dcb32_t), + dcb32_rx_reason_maps, + dcb0_rx_reason_map_get, + dcb21_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb26_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb32_desc_intr_set, + dcb32_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb26_rx_untagged_get, + dcb19_rx_crc_get, + dcb32_rx_cos_get, + dcb26_rx_destmod_get, + dcb26_rx_destport_get, + dcb26_rx_opcode_get, + dcb26_rx_classtag_get, + dcb26_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb26_rx_prio_get, + dcb26_rx_reason_get, + dcb26_rx_reason_hi_get, + dcb32_rx_ingport_get, + dcb26_rx_srcport_get, + dcb26_rx_srcmod_get, + dcb26_rx_mcast_get, + dcb26_rx_vclabel_get, + dcb32_rx_mirror_get, + dcb26_rx_timestamp_get, + dcb26_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb26_mhp_get, + dcb32_outer_vid_get, + dcb26_outer_pri_get, + dcb26_outer_cfi_get, + dcb23_rx_outer_tag_action_get, + dcb26_inner_vid_get, + dcb26_inner_pri_get, + dcb26_inner_cfi_get, + dcb23_rx_inner_tag_action_get, + dcb26_rx_bpdu_get, + dcb26_rx_l3_intf_get, + dcb32_rx_decap_tunnel_get, + dcb32_rx_switch_drop_get, + dcb32_olp_encap_oam_pkt_get, + dcb32_read_ecc_error_get, + dcb32_desc_remaining_get, + dcb32_desc_remaining_set, + dcb32_desc_status_get, + dcb32_desc_status_set, + dcb32_rx_hg2_ext_eh_type_get, +}; +#endif /* BCM_TOMAHAWK_SUPPORT */ + +#if defined(BCM_TRIDENT2PLUS_SUPPORT) +/* + * DCB Type 33 Support + */ +/* From FORMAT CPU_OPCODES */ +static soc_rx_reason_t +dcb33_rx_reason_map[] = { + socRxReasonUnknownVlan, /* 0: CPU_UVLAN */ + socRxReasonL2SourceMiss, /* 1: CPU_SLF */ + socRxReasonL2DestMiss, /* 2: CPU_DLF */ + socRxReasonL2Move, /* 3: CPU_L2MOVE */ + socRxReasonL2Cpu, /* 4: CPU_L2CPU */ + socRxReasonSampleSource, /* 5: CPU_SFLOW_SRC */ + socRxReasonSampleDest, /* 6: CPU_SFLOW_DST */ + socRxReasonL3SourceMiss, /* 7: CPU_L3SRC_MISS */ + socRxReasonL3DestMiss, /* 8: CPU_L3DST_MISS */ + socRxReasonL3SourceMove, /* 9: CPU_L3SRC_MOVE */ + socRxReasonMcastMiss, /* 10: CPU_MC_MISS */ + socRxReasonIpMcastMiss, /* 11: CPU_IPMC_MISS */ + socRxReasonFilterMatch, /* 12: CPU_FFP */ + socRxReasonL3HeaderError, /* 13: CPU_L3HDR_ERR */ + socRxReasonProtocol, /* 14: CPU_PROTOCOL_PKT */ + socRxReasonDosAttack, /* 15: CPU_DOS_ATTACK */ + socRxReasonMartianAddr, /* 16: CPU_MARTIAN_ADDR */ + socRxReasonTunnelError, /* 17: CPU_TUNNEL_ERR */ + socRxReasonFailoverDrop, /* 18: FAILOVER_DROP */ + socRxReasonIcmpRedirect, /* 19: ICMP_REDIRECT */ + socRxReasonL3Slowpath, /* 20: L3_SLOWPATH */ + socRxReasonParityError, /* 21: PARITY_ERROR */ + socRxReasonL3MtuFail, /* 22: L3_MTU_CHECK_FAIL */ + socRxReasonHigigHdrError, /* 23: HGHDR_ERROR */ + socRxReasonMcastIdxError, /* 24: MCIDX_ERROR */ + socRxReasonVlanFilterMatch, /* 25: VFP */ + socRxReasonClassBasedMove, /* 26: CBSM_PREVENTED */ + socRxReasonL3AddrBindFail, /* 27: MAC_BIND_FAIL */ + socRxReasonMplsLabelMiss, /* 28: MPLS_LABEL_MISS */ + socRxReasonMplsInvalidAction, /* 29: MPLS_INVALID_ACTION */ + socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */ + socRxReasonMplsTtl, /* 31: MPLS_TTL_CHECK_FAIL */ + socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */ + socRxReasonL2NonUnicastMiss, /* 33: PBT_NONUC_PKT */ + socRxReasonNhop, /* 34: L3_NEXT_HOP */ + socRxReasonMplsUnknownAch, /* 35: MPLS_UNKNOWN_ACH_ERROR */ + socRxReasonStation, /* 36: MY_STATION */ + socRxReasonNiv, /* 37: NIV_DROP_REASON_ENCODING */ + socRxReasonNiv, /* 38: -> */ + socRxReasonNiv, /* 39: 3-bit */ + socRxReasonVlanTranslate, /* 40: VXLT_MISS */ + socRxReasonTimeSync, /* 41: TIME_SYNC */ + socRxReasonOAMSlowpath, /* 42: OAM_SLOWPATH */ + socRxReasonOAMError, /* 43: OAM_ERROR */ + socRxReasonTrill, /* 44: TRILL_DROP_REASON_ENCODING */ + socRxReasonTrill, /* 45: -> */ + socRxReasonTrill, /* 46: 3-bit */ + socRxReasonL2GreSipMiss, /* 47: L2GRE_SIP_MISS */ + socRxReasonL2GreVpnIdMiss, /* 48: L2GRE_VPNID_MISS */ + socRxReasonBfdSlowpath, /* 49: BFD_SLOWPATH */ + socRxReasonBfd, /* 50: BFD_ERROR */ + socRxReasonOAMLMDM, /* 51: OAM_LMDM */ + socRxReasonCongestionCnm, /* 52: ICNM */ + socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */ + socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */ + socRxReasonCongestionCnmProxy, /* 55: QCN_CNM_PRP */ + socRxReasonCongestionCnmProxyError, /* 56: QCN_CNM_PRP_DLF */ + socRxReasonVxlanSipMiss, /* 57: VXLAN_SIP_MISS */ + socRxReasonVxlanVpnIdMiss, /* 58: VXLAN_VN_ID_MISS */ + socRxReasonFcoeZoneCheckFail, /* 59: FCOE_ZONE_CHECK_FAIL */ + socRxReasonNat, /* 60: NAT_DROP_REASON_ENCODING */ + socRxReasonNat, /* 61: -> */ + socRxReasonNat, /* 62: 3-bit */ + socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */ +}; + +/* From FORMAT NIV_CPU_OPCODE_ENCODING */ +static soc_rx_reason_t dcb33_rx_reason_niv_encoding_map[] = { + socRxReasonNiv, /* 0: NO_ERRORS + * Base field, must match the entries above */ + socRxReasonNivPrioDrop, /* 1:DOT1P_ADMITTANCE_DISCARD */ + socRxReasonNivInterfaceMiss, /* 2:VIF_LOOKUP_MISS */ + socRxReasonNivRpfFail, /* 3:RPF_LOOKUP_MISS */ + socRxReasonNivTagInvalid, /* 4:VNTAG_FORMAT_ERROR */ + socRxReasonNivTagDrop, /* 5:VNTAG_PRESENT_DROP */ + socRxReasonNivUntagDrop, /* 6:VNTAG_NOT_PRESENT_DROP */ + socRxReasonUnknownSubtendingPort /* 7:UNKOWN SUBTENDING PORT */ +}; + +/* From FORMAT NAT_CPU_OPCODE_ENCODING */ +static soc_rx_reason_t dcb33_rx_reason_nat_encoding_map[] = { + socRxReasonNat, /* 0:NOP + * Base field, must match the entries above */ + socRxReasonTcpUdpNatMiss, /* 1:NORMAL */ + socRxReasonIcmpNatMiss, /* 2:ICMP */ + socRxReasonNatFragment, /* 3:FRAGMEMT */ + socRxReasonNatMiss, /* 4:OTHER */ + socRxReasonInvalid, /* 5:NOT DEFINED */ + socRxReasonInvalid, /* 6:NOT DEFINED */ +#if 1 + socRxReasonInvalid /* 7:NOT DEFINED */ +#endif +}; + +static soc_rx_reason_t *dcb33_rx_reason_maps[] = { + dcb33_rx_reason_map, + dcb33_rx_reason_niv_encoding_map, + dcb26_rx_reason_trill_encoding_map, + dcb33_rx_reason_nat_encoding_map, + NULL +}; + +static _shr_rx_decap_tunnel_t dcb33_rx_decap_tunnel_map[] = { + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_ACCESS_SVP, + _SHR_RX_DECAP_MIM, + _SHR_RX_DECAP_L2GRE, + _SHR_RX_DECAP_VXLAN, + _SHR_RX_DECAP_AMT, + _SHR_RX_DECAP_IP, + _SHR_RX_DECAP_TRILL, + _SHR_RX_DECAP_MPLS_1LABELCW, + _SHR_RX_DECAP_MPLS_2LABELCW, + _SHR_RX_DECAP_MPLS_1LABEL, + _SHR_RX_DECAP_MPLS_2LABEL, + _SHR_RX_DECAP_L3MPLS_1LABEL, + _SHR_RX_DECAP_L3MPLS_2LABEL, + _SHR_RX_DECAP_L3MPLS_1LABELCW, + _SHR_RX_DECAP_L3MPLS_2LABELCW +}; +static uint32 dcb33_rx_decap_tunnel_get(dcb_t *dcb) { + dcb33_t *d = (dcb33_t *)dcb; + /* Check for array bounds */ + if ( (d->word3.overlay1.decap_tunnel_type < + (sizeof (dcb33_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { + return (uint32)dcb33_rx_decap_tunnel_map[d->word3.overlay1.decap_tunnel_type]; + } + return (uint32)_SHR_RX_DECAP_NONE; +} +GETFUNCFIELD(33, outer_vid, word4.overlay1.outer_vid) + +static void +dcb33_desc_intr_set(dcb_t * dcb, int val) +{ + dcb33_t * d = (dcb33_t *)dcb; + + d->c_intr = val; + return; +} + +static uint32 +dcb33_desc_intr_get(dcb_t * dcb) +{ + dcb33_t * d = (dcb33_t *)dcb; + return (d->c_intr); +} + +dcb_op_t dcb33_op = { + 33, + sizeof(dcb33_t), + dcb33_rx_reason_maps, + dcb0_rx_reason_map_get, + dcb21_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb26_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb33_desc_intr_set, + dcb33_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb26_rx_untagged_get, + dcb19_rx_crc_get, + dcb26_rx_cos_get, + dcb26_rx_destmod_get, + dcb26_rx_destport_get, + dcb26_rx_opcode_get, + dcb26_rx_classtag_get, + dcb26_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb26_rx_prio_get, + dcb26_rx_reason_get, + dcb26_rx_reason_hi_get, + dcb26_rx_ingport_get, + dcb26_rx_srcport_get, + dcb26_rx_srcmod_get, + dcb26_rx_mcast_get, + dcb26_rx_vclabel_get, + dcb23_rx_mirror_get, + dcb26_rx_timestamp_get, + dcb26_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb26_mhp_get, + dcb33_outer_vid_get, + dcb26_outer_pri_get, + dcb26_outer_cfi_get, + dcb23_rx_outer_tag_action_get, + dcb26_inner_vid_get, + dcb26_inner_pri_get, + dcb26_inner_cfi_get, + dcb23_rx_inner_tag_action_get, + dcb26_rx_bpdu_get, + dcb26_rx_l3_intf_get, + dcb33_rx_decap_tunnel_get, + dcb23_rx_switch_drop_get, + dcb23_olp_encap_oam_pkt_get, + dcb23_read_ecc_error_get, + dcb23_desc_remaining_get, + dcb23_desc_remaining_set, + dcb23_desc_status_get, + dcb23_desc_status_set, + NULL, +}; +#endif /* BCM_TRIDENT2PLUS_SUPPORT */ + + +#ifdef BCM_APACHE_SUPPORT + +/* From FORMAT CPU_OPCODES */ +static soc_rx_reason_t +dcb35_rx_reason_map_ip[] = { + socRxReasonUnknownVlan, /* 0: CPU_UVLAN */ + socRxReasonL2SourceMiss, /* 1: CPU_SLF */ + socRxReasonL2DestMiss, /* 2: CPU_DLF */ + socRxReasonL2Move, /* 3: CPU_L2MOVE */ + socRxReasonL2Cpu, /* 4: CPU_L2CPU */ + socRxReasonSampleSource, /* 5: CPU_SFLOW_SRC */ + socRxReasonSampleDest, /* 6: CPU_SFLOW_DST */ + socRxReasonL3SourceMiss, /* 7: CPU_L3SRC_MISS */ + socRxReasonL3DestMiss, /* 8: CPU_L3DST_MISS */ + socRxReasonL3SourceMove, /* 9: CPU_L3SRC_MOVE */ + socRxReasonMcastMiss, /* 10: CPU_MC_MISS */ + socRxReasonIpMcastMiss, /* 11: CPU_IPMC_MISS */ + socRxReasonFilterMatch, /* 12: CPU_FFP */ + socRxReasonL3HeaderError, /* 13: CPU_L3HDR_ERR */ + socRxReasonProtocol, /* 14: CPU_PROTOCOL_PKT */ + socRxReasonDosAttack, /* 15: CPU_DOS_ATTACK */ + socRxReasonMartianAddr, /* 16: CPU_MARTIAN_ADDR */ + socRxReasonTunnelError, /* 17: CPU_TUNNEL_ERR */ + socRxReasonFailoverDrop, /* 18: FAILOVER_DROP */ + socRxReasonIcmpRedirect, /* 19: ICMP_REDIRECT */ + socRxReasonL3Slowpath, /* 20: L3_SLOWPATH */ + socRxReasonParityError, /* 21: PARITY_ERROR */ + socRxReasonL3MtuFail, /* 22: L3_MTU_CHECK_FAIL */ + socRxReasonHigigHdrError, /* 23: HGHDR_ERROR */ + socRxReasonMcastIdxError, /* 24: MCIDX_ERROR */ + socRxReasonVlanFilterMatch, /* 25: VFP */ + socRxReasonClassBasedMove, /* 26: CBSM_PREVENTED */ + socRxReasonL3AddrBindFail, /* 27: MAC_BIND_FAIL */ + socRxReasonMplsLabelMiss, /* 28: MPLS_LABEL_MISS */ + socRxReasonMplsInvalidAction, /* 29: MPLS_INVALID_ACTION */ + socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */ + socRxReasonMplsTtl, /* 31: MPLS_TTL_CHECK_FAIL */ + socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */ + socRxReasonL2NonUnicastMiss, /* 33: PBT_NONUC_PKT */ + socRxReasonNhop, /* 34: L3_NEXT_HOP */ + socRxReasonMplsUnknownAch, /* 35: MPLS_UNKNOWN_ACH_ERROR */ + socRxReasonStation, /* 36: MY_STATION */ + socRxReasonNiv, /* 37: NIV_DROP_REASON_ENCODING */ + socRxReasonNiv, /* 38: -> */ + socRxReasonNiv, /* 39: 3-bit */ + socRxReasonVlanTranslate, /* 40: VXLT_MISS */ + socRxReasonTimeSync, /* 41: TIME_SYNC */ + socRxReasonOAMSlowpath, /* 42: OAM_SLOWPATH */ + socRxReasonMplsLookupsExceeded,/* 43: MPLS_OUT_OF_LOOKUPS */ + socRxReasonTrill, /* 44: TRILL_DROP_REASON_ENCODING */ + socRxReasonTrill, /* 45: -> */ + socRxReasonTrill, /* 46: 3-bit */ + socRxReasonL2GreSipMiss, /* 47: L2GRE_SIP_MISS */ + socRxReasonL2GreVpnIdMiss, /* 48: L2GRE_VPNID_MISS */ + socRxReasonBfdSlowpath, /* 49: BFD_SLOWPATH */ + socRxReasonBfd, /* 50: BFD_ERROR */ + socRxReasonMplsReservedEntropyLabel,/* 51: ENTROPY_LABEL_IN_UNALLOWED_RANGE */ + socRxReasonCongestionCnm, /* 52: ICNM */ + socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */ + socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */ + socRxReasonCongestionCnmProxy, /* 55: QCN_CNM_PRP */ + socRxReasonCongestionCnmProxyError, /* 56: QCN_CNM_PRP_DLF */ + socRxReasonVxlanSipMiss, /* 57: VXLAN_SIP_MISS */ + socRxReasonVxlanVpnIdMiss, /* 58: VXLAN_VN_ID_MISS */ + socRxReasonFcoeZoneCheckFail, /* 59: FCOE_ZONE_CHECK_FAIL */ + socRxReasonNat, /* 60: NAT_DROP_REASON_ENCODING */ + socRxReasonNat, /* 61: -> */ + socRxReasonNat, /* 62: 3-bit */ + socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */ +}; + +/* From format EP_CPU_OPCODES */ +static soc_rx_reason_t +dcb35_rx_reason_map_ep[] = { + socRxReasonSplitHorizon, /* 0: CPUE_PRUNE */ + socRxReasonNivPrune, /* 1: CPUE_NIV_DISCARD */ + socRxReasonVirtualPortPrune, /* 2: CPUE_SPLIT_HORIZON */ + socRxReasonHigigHdrError, /* 3: CPUE_HIGIG */ + socRxReasonTrillPacketPortMismatch, /* 4: CPUE_TRILL */ + socRxReasonL2MtuFail, /* 5: CPUE_MTU */ + socRxReasonInvalid, /* 6: CPUE_PKT_SMALL_OR_BIG */ + socRxReasonUnknownVlan, /* 7: CPUE_VLAN */ + socRxReasonStp, /* 8: CPUE_STG */ + socRxReasonVlanTranslate, /* 9: CPUE_VXLT */ + socRxReasonNonUnicastDrop, /* 10: CPUE_MULTI_DEST */ + socRxReasonInvalid, /* 11: CPUE_CNM */ + socRxReasonInvalid, /* 12: CPUE_FCOE */ + socRxReasonInvalid, /* 13: CPUE_CFI */ + socRxReasonTtl, /* 14: CPUE_TTL_DROP */ + socRxReasonIpmc, /* 15: CPUE_L3ERR */ + socRxReasonTunnelError, /* 16: CPUE_TUNNEL */ + socRxReasonFilterMatch, /* 17: CPUE_EFP */ + socRxReasonInvalid, /* 18: CPUE_PROT */ + socRxReasonInvalid, /* 19: CPUE_1588 */ + socRxReasonInvalid, /* 20: CPUE_COMPOSITE_ERROR */ + socRxReasonInvalid, /* 21: EP_DROP_ORIG */ + + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static soc_rx_reason_t *dcb35_rx_reason_maps[4][5] = { + { /* IP_0 */ + dcb35_rx_reason_map_ip, + dcb33_rx_reason_niv_encoding_map, + dcb26_rx_reason_trill_encoding_map, + dcb33_rx_reason_nat_encoding_map, + NULL + }, + {NULL}, /* Index 1 is invalid */ + { /* EP */ + dcb35_rx_reason_map_ep, + NULL + }, + {NULL} /* Index 3 is invalid */ +}; + + +/* + * Function: + * dcb35_rx_reason_map_get + * Purpose: + * Return the RX reason map for DCB 35 type. + * Parameters: + * dcb_op - DCB operations + * dcb - dma control block + * Returns: + * RX reason map pointer + */ +static soc_rx_reason_t * +dcb35_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb) +{ + soc_rx_reason_t *map = NULL; + dcb35_t * d = (dcb35_t *)dcb; + + map = dcb35_rx_reason_maps[(d->word4.overlay1.cpu_opcode_type)][0]; + + return map; +} + +static _shr_rx_decap_tunnel_t dcb35_rx_decap_tunnel_map[] = { + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_ACCESS_SVP, + _SHR_RX_DECAP_MIM, + _SHR_RX_DECAP_L2GRE, + _SHR_RX_DECAP_VXLAN, + _SHR_RX_DECAP_AMT, + _SHR_RX_DECAP_IP, + _SHR_RX_DECAP_TRILL, + _SHR_RX_DECAP_MPLS_1LABELCW, + _SHR_RX_DECAP_MPLS_2LABELCW, + _SHR_RX_DECAP_MPLS_3LABELCW, + _SHR_RX_DECAP_MPLS_3LABEL_ENTROPYCW, + _SHR_RX_DECAP_MPLS_1LABEL, + _SHR_RX_DECAP_MPLS_2LABEL, + _SHR_RX_DECAP_MPLS_3LABEL, + _SHR_RX_DECAP_MPLS_3LABEL_ENTROPY +}; +static uint32 dcb35_rx_decap_tunnel_get(dcb_t *dcb) { + dcb35_t *d = (dcb35_t *)dcb; + /* Check for array bounds */ + if ( (d->word3.overlay1.decap_tunnel_type < + (sizeof (dcb35_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { + return (uint32)dcb35_rx_decap_tunnel_map[d->word3.overlay1.decap_tunnel_type]; + } + return (uint32)_SHR_RX_DECAP_NONE; +} + +GETFUNCFIELD(35, olp_encap_oam_pkt, olp_encap_oam_pkt) +GETFUNCNULL(35, read_ecc_error) +GETFUNCNULL(35, desc_remaining) +SETFUNCNULL(35, desc_remaining) +GETFUNCNULL(35, desc_status) +SETFUNCNULL(35, desc_status) + +dcb_op_t dcb35_op = { + 35, + sizeof(dcb35_t), + dcb35_rx_reason_maps[0], + dcb35_rx_reason_map_get, + dcb21_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb26_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb33_desc_intr_set, + dcb33_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb26_rx_untagged_get, + dcb19_rx_crc_get, + dcb26_rx_cos_get, + dcb26_rx_destmod_get, + dcb26_rx_destport_get, + dcb26_rx_opcode_get, + dcb26_rx_classtag_get, + dcb26_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb26_rx_prio_get, + dcb26_rx_reason_get, + dcb26_rx_reason_hi_get, + dcb26_rx_ingport_get, + dcb26_rx_srcport_get, + dcb26_rx_srcmod_get, + dcb26_rx_mcast_get, + dcb26_rx_vclabel_get, + dcb23_rx_mirror_get, + dcb26_rx_timestamp_get, + dcb26_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb26_mhp_get, + dcb33_outer_vid_get, + dcb26_outer_pri_get, + dcb26_outer_cfi_get, + dcb23_rx_outer_tag_action_get, + dcb26_inner_vid_get, + dcb26_inner_pri_get, + dcb26_inner_cfi_get, + dcb23_rx_inner_tag_action_get, + dcb26_rx_bpdu_get, + dcb26_rx_l3_intf_get, + dcb35_rx_decap_tunnel_get, + dcb23_rx_switch_drop_get, + dcb35_olp_encap_oam_pkt_get, + dcb35_read_ecc_error_get, + dcb35_desc_remaining_get, + dcb35_desc_remaining_set, + dcb35_desc_status_get, + dcb35_desc_status_set, + NULL, +}; +#endif /* BCM_APACHE_SUPPORT */ + +#if defined(BCM_TRIDENT3_SUPPORT) +SETFUNCFIELD(36, reqcount, c_count, uint32 count, count) +GETFUNCFIELD(36, reqcount, c_count) +GETFUNCFIELD(36, xfercount, count) +SETFUNCFIELD(36, done, done, int val, val ? 1 : 0) +GETFUNCFIELD(36, done, done) +SETFUNCFIELD(36, sg, c_sg, int val, val ? 1 : 0) +GETFUNCFIELD(36, sg, c_sg) +SETFUNCFIELD(36, chain, c_chain, int val, val ? 1 : 0) +GETFUNCFIELD(36, chain, c_chain) +SETFUNCFIELD(36, reload, c_reload, int val, val ? 1 : 0) +GETFUNCFIELD(36, reload, c_reload) +GETFUNCFIELD(36, rx_start, start) +GETFUNCFIELD(36, rx_end, end) +GETFUNCFIELD(36, rx_error, error) +SETFUNCFIELD(36, hg, c_hg, uint32 hg, hg) +GETFUNCFIELD(36, hg, c_hg) +SETFUNCFIELD(36, purge, c_purge, uint32 purge, purge) +GETFUNCFIELD(36, purge, c_purge) +GETFUNCFIELD(36, read_ecc_error, ecc_error) +GETFUNCFIELD(36, desc_status, c_desc_status) +GETFUNCFIELD(36, desc_intr, c_intr) +GETFUNCFIELD(36, desc_remaining, c_desc) + +GETHDRFUNCFIELD(36, rx_timestamp, timestamp) +GETHDRFUNCNULL(36, rx_timestamp_upper) +GETHDRPTREXPR(36, mhp, &(h->mh0)) +GETHDRFUNCFIELD(36, outer_vid, outer_vid) +GETHDRFUNCFIELD(36, outer_pri, word6.overlay1.outer_pri) +GETHDRFUNCFIELD(36, outer_cfi, outer_cfi) +GETHDRFUNCFIELD(36, rx_outer_tag_action, otag_action) +GETHDRFUNCFIELD(36, inner_vid, inner_vid) +GETHDRFUNCFIELD(36, inner_pri, word6.overlay1.inner_pri) +GETHDRFUNCFIELD(36, inner_cfi, word6.overlay1.inner_cfi) +GETHDRFUNCFIELD(36, rx_inner_tag_action, itag_action) +GETHDRFUNCFIELD(36, rx_bpdu, bpdu) +GETHDRFUNCFIELD(36, rx_decap_tunnel, decap_tunnel_type) + +static uint32 ep_to_cpu_hdr36_rx_crc_get(void *hdr) { + return 0; +} + +static uint32 +ep_to_cpu_hdr36_rx_untagged_get(void *hdr, int dt_mode, int ingport_is_hg) +{ + + return 0; +} + +static void +ep_to_cpu_hdr36_rx_reasons_get(dcb_op_t *dcb_op, void *hdr, soc_rx_reasons_t *reasons) +{ + soc_rx_reason_t *map, *encoding_map; + uint32 opcode[2], encoding[3]; + uint32 bit_val; + int word_idx, bit_idx, opcode_idx, map_idx, word_count; + int enc_bit = 0; + + SOC_RX_REASON_CLEAR_ALL(*reasons); + + opcode[0] = dcb_op->rx_reason_get(hdr); + opcode[1] = dcb_op->rx_reason_hi_get(hdr); + word_count = 2; + sal_memset(encoding, 0, sizeof(encoding)); + map = dcb_op->rx_reason_maps[0]; + for (word_idx = 0; word_idx < word_count; word_idx++) { + for (bit_idx = 0; bit_idx < 32; bit_idx++) { + opcode_idx = word_idx * 32 + bit_idx; + bit_val = opcode[word_idx] & (1 << bit_idx) ? 1 : 0; + for (map_idx = 0; ; map_idx++) { + encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; + if (encoding_map == NULL) { + break; + } + if (map[opcode_idx] != encoding_map[0]) { + continue; + } + if (opcode_idx == 0 || map[opcode_idx - 1] != encoding_map[0]) { + enc_bit = 0; + } + encoding[map_idx] |= bit_val << enc_bit; + enc_bit++; + break; + } + if (encoding_map == NULL && bit_val) { + SOC_RX_REASON_SET(*reasons, map[opcode_idx]); + } + } + } + + for (map_idx = 0; ; map_idx++) { + encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; + if (encoding_map == NULL) { + break; + } + if (encoding[map_idx] != socRxReasonInvalid) { + SOC_RX_REASON_SET(*reasons, encoding_map[encoding[map_idx]]); + } + } + + /* BPDU bit should be a reason, paste it in here */ + if (dcb_op->rx_bpdu_get(hdr)) { + SOC_RX_REASON_SET(*reasons, socRxReasonBpdu); + } + + return; +} + + +GETHDRFUNCFIELD(36, rx_cos, word8.overlay1.cpu_cos) +GETHDRHG2FUNCFIELD(36, rx_destmod, dst_mod) +GETHDRHG2FUNCFIELD(36, rx_destport, dst_port) + +GETHDRHG2FUNCFIELD(36, rx_opcode, opcode) +GETHDRHG2FUNCEXPR(36, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : + (h->ppd_overlay2.ctag_hi << 8) | + (h->ppd_overlay2.ctag_lo))) +GETHDRFUNCFIELD(36, rx_matchrule, match_rule) +GETHDRHG2FUNCFIELD(36, rx_prio, vlan_pri) /* outer_pri */ + +static uint32 +ep_to_cpu_hdr36_rx_reason_get(void *hdr) +{ + ep_to_cpu_hdr36_t *h = (ep_to_cpu_hdr36_t *)hdr; + + return (h->switch_pkt) ? (h->reason) : 0; +} + +static uint32 +ep_to_cpu_hdr36_rx_reason_hi_get(void *hdr) +{ + ep_to_cpu_hdr36_t *h = (ep_to_cpu_hdr36_t *)hdr; + + return (h->switch_pkt) ? (h->reason_hi) : 0; +} + +GETHDRFUNCFIELD(36, rx_ingport, word8.overlay1.srcport) +GETHDRHG2FUNCFIELD(36, rx_srcport, src_port) +GETHDRHG2FUNCFIELD(36, rx_srcmod, src_mod) +GETHDRHG2FUNCEXPR(36, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | + (h->ppd_overlay1.dst_port))) +GETHDRHG2FUNCEXPR(36, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | + (h->ppd_overlay1.vc_label_15_8 << 8) | + (h->ppd_overlay1.vc_label_7_0))) +GETHDRFUNCEXPR(36, rx_mirror, ((h->switch_pkt) ? 0:1)) + +GETHDRFUNCEXPR(36, rx_l3_intf, h->word6.overlay1.nhi_b ? \ + (h->word6.overlay1.nhi_b + _SHR_L3_EGRESS_IDX_MIN): \ + (((h->nhi_a_hi << 8) | h->word6.overlay1.nhi_a_lo) + _SHR_L3_EGRESS_IDX_MIN)) +GETHDRFUNCNULL(36, rx_switch_drop) +GETHDRFUNCNULL(36, olp_encap_oam_pkt) + +#if 0 + +static void +ep_to_cpu_hdr_funcerr(int dt, char *name) +{ + LOG_ERROR(BSL_LS_SOC_COMMON, + (BSL_META("ERROR: ep_to_cpu_hdr%d_%s called\n"), dt, name)); +} +#endif + +static void +dcb36_init(dcb_t *dcb) +{ + uint32 *d = (uint32 *)dcb; + + d[0] = d[1] = d[2] = d[3] = 0; +} + +static int +dcb36_add_rx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags) +{ + dcb36_t *d; /* DCB */ + uint32 *di; /* DCB integer pointer */ + sal_paddr_t paddr; + + d = (dcb36_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); + + if (dv->dv_vcnt > 0) { /* chain off previous dcb */ + d[-1].c_chain = 1; + } + + di = (uint32 *)d; + di[0] = di[1] = di[2] = di[3] = 0; + + if (addr) { + paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); + d->addr_lo = PTR_TO_INT(paddr); + d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr)); + } + + d->c_count = count; + d->c_sg = 1; + + dv->dv_vcnt += 1; + return dv->dv_cnt - dv->dv_vcnt; +} + +static int +dcb36_add_tx(dv_t *dv, sal_vaddr_t addr, uint32 count, + pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh) +{ + dcb36_t *d; /* DCB */ + uint32 *di; /* DCB integer pointer */ + sal_paddr_t paddr = 0; /* Packet buffer physical address */ + + d = (dcb36_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); + + if (addr) + paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); + + if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) && + (d[-1].c_sg != 0) && + ((d[-1].addr_lo + d[-1].c_count) == paddr) && + (d[-1].c_count + count <= DCB_MAX_REQCOUNT)) { + d[-1].c_count += count; + return dv->dv_cnt - dv->dv_vcnt; + } + + if (dv->dv_vcnt >= dv->dv_cnt) { + return SOC_E_FULL; + } + if (dv->dv_vcnt > 0) { /* chain off previous dcb */ + d[-1].c_chain = 1; + } + + di = (uint32 *)d; + di[0] = di[1] = di[2] = di[3] = 0; + + d->addr_lo = PTR_TO_INT(paddr); + d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr)); + d->c_count = count; + d->c_sg = 1; + + d->c_purge = SOC_DMA_PURGE_GET(flags); + + if (SOC_DMA_HG_GET(flags)) { + d->c_hg = 1; + } + + dv->dv_vcnt += 1; + + return dv->dv_cnt - dv->dv_vcnt; +} + +static uint32 +dcb36_intr_info(int unit, dcb_t *dcb, int tx, uint32 *count) +{ + dcb36_t *d = (dcb36_t *)dcb; /* DCB */ + uint32 f; /* SOC_DCB_INFO_* flags */ + + if (!d->done) { + return 0; + } + + f = SOC_DCB_INFO_DONE; + if (tx) { + if (!d->c_sg) { + f |= SOC_DCB_INFO_PKTEND; + } + } else { + if (d->end) { + f |= SOC_DCB_INFO_PKTEND; + } + } + + *count = d->count; + return f; +} + +/* the addr related functions are the same for all dcb types */ +static void +dcb36_addr_set(int unit, dcb_t *dcb, sal_vaddr_t addr) +{ + dcb36_t *d = (dcb36_t *)dcb; /* DCB */ + sal_paddr_t paddr; + + if (addr == 0) { + d->addr_lo = 0; + d->addr_hi = 0; + } else { + paddr = soc_cm_l2p(unit, (void *)addr); + d->addr_lo = PTR_TO_INT(paddr); + d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr)); + } +} + +static sal_vaddr_t +dcb36_addr_get(int unit, dcb_t *dcb) +{ + dcb36_t *d = (dcb36_t *)dcb; /* DCB */ + sal_paddr_t paddr; + +#if defined(COMPILER_OVERRIDE_NO_LONGLONG) || defined(__PEDANTIC__) + paddr = d->addr_lo; +#else + paddr = (((uint64)(d->addr_hi & ~(0x10000000)) << 32) | d->addr_lo); +#endif + + return (sal_vaddr_t)soc_cm_p2l(unit, paddr); +} + +static sal_paddr_t +dcb36_paddr_get(dcb_t *dcb) +{ + uint32 *d = (uint32 *)dcb; + + return (sal_paddr_t)*d; +} + +static void +dcb36_desc_intr_set(dcb_t * dcb, int val) +{ + dcb36_t * d = (dcb36_t *)dcb; + + d->c_intr = val; + return; +} + +static uint32 +dcb36_desc_status_set(dcb_t * dcb, uint32 val) +{ + dcb36_t * d = (dcb36_t *)dcb; + + d->c_desc_status = val; + return 0; +} + +static uint32 +dcb36_desc_remaining_set(dcb_t * dcb, uint32 val) +{ + dcb36_t * d = (dcb36_t *)dcb; + + d->c_desc = val; + return 0; +} + +/* + * DCB Type 36 Support + */ +/* From FORMAT CPU_OPCODES */ +static soc_rx_reason_t +dcb36_rx_reason_map[] = { + socRxReasonFilterMatch, /* 0: CPU_FFP */ + socRxReasonVlanFilterMatch, /* 1: VFP */ + socRxReasonSampleSourceFlex, /* 2: CPU_SFLOW_FLEX */ + socRxReasonSampleSource, /* 3: CPU_SFLOW_SRC */ + socRxReasonSampleDest, /* 4: CPU_SFLOW_DST */ + socRxReasonL2Move, /* 5: CPU_L2MOVE */ + socRxReasonL2Cpu, /* 6: CPU_L2CPU */ + socRxReasonL3SourceMiss, /* 7: CPU_L3SRC_MISS */ + socRxReasonL3DestMiss, /* 8: CPU_L3DST_MISS */ + socRxReasonL3SourceMove, /* 9: CPU_L3SRC_MOVE */ + socRxReasonMcastMiss, /* 10: CPU_MC_MISS */ + socRxReasonIpMcastMiss, /* 11: CPU_IPMC_MISS */ + socRxReasonUnknownVlan, /* 12: CPU_UVLAN */ + socRxReasonL3HeaderError, /* 13: CPU_L3HDR_ERR */ + socRxReasonProtocol, /* 14: CPU_PROTOCOL_PKT */ + socRxReasonDosAttack, /* 15: CPU_DOS_ATTACK */ + socRxReasonMartianAddr, /* 16: CPU_MARTIAN_ADDR */ + socRxReasonTunnelError, /* 17: CPU_TUNNEL_ERR */ + socRxReasonL2DestMiss, /* 18: CPU_DLF */ + socRxReasonIcmpRedirect, /* 19: ICMP_REDIRECT */ + socRxReasonL3Slowpath, /* 20: L3_SLOWPATH */ + socRxReasonParityError, /* 21: PARITY_ERROR */ + socRxReasonL3MtuFail, /* 22: L3_MTU_CHECK_FAIL */ + socRxReasonHigigHdrError, /* 23: HGHDR_ERROR */ + socRxReasonMcastIdxError, /* 24: MCIDX_ERROR */ + socRxReasonL2SourceMiss, /* 25: CPU_SLF */ + socRxReasonClassBasedMove, /* 26: CBSM_PREVENTED */ + socRxReasonL3AddrBindFail, /* 27: MAC_BIND_FAIL */ + socRxReasonMplsLabelMiss, /* 28: MPLS_LABEL_MISS */ + socRxReasonMplsInvalidAction, /* 29: MPLS_INVALID_ACTION */ + socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */ + socRxReasonTunnelObjectValidationFail, /* 31: TUNNEL_OBJECT_VALIDATION_FAIL */ + socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */ + socRxReasonL2NonUnicastMiss, /* 33: PBT_NONUC_PKT */ + socRxReasonNhop, /* 34: L3_NEXT_HOP */ + socRxReasonL3Cpu, /* 35: CPU_L3CPU */ + socRxReasonStation, /* 36: MY_STATION */ + socRxReasonNivPrioDrop, /* 37: DOT1P_ADMITTANCE_DISCARD */ + socRxReasonNivRpfFail, /* 38: RPF_LOOKUP_MISS */ + socRxReasonUnknownSubtendingPort, /* 39: UNKOWN SUBTENDING PORT */ + socRxReasonTunnelAdaptLookupMiss, /* 40: TUNNEL_ADAPT_LOOKUP_MISS_DROP */ + socRxReasonTimeSync, /* 41: TIME_SYNC */ + socRxReasonPacketFlowSelectMiss, /* 42: PKT_FLOW_SELECT_MISS */ + socRxReasonTunnelDecapEcnError,/* 43: TUNNEL_DECAP_ECN_ERROR (new) */ + socRxReasonFailoverDrop, /* 44: PROTECTION_DATA_DROP */ + socRxReasonPacketFlowSelect, /* 45: PKT_FLOW_SELECT */ + socRxReasonOtherLookupMiss, /* 46: CPU_FORWARDING_OTHER */ + socRxReasonInvalidTpid, /* 47: INVALID_TPID */ + socRxReasonMplsControlPacket, /* 48: MPLS_CONTROL_PKT */ + socRxReasonTunnelError, /* 49: TUNNEL_ERROR */ + socRxReasonTunnelTtlError, /* 50: TUNNEL_TTL_ERR */ +#if 1 + socRxReasonInvalid, /* 51:NOT DEFINED */ +#endif + socRxReasonCongestionCnm, /* 52: ICNM */ + socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */ + socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */ + socRxReasonL3HeaderError, /* 55: L3_HEADER_ERROR */ + socRxReasonL2HeaderError, /* 56: L2_HDR_ERROR */ + socRxReasonTtl1, /* 57: TTL1 */ + socRxReasonTtl, /* 58: TTL */ + socRxReasonFcoeZoneCheckFail, /* 59: FCOE_ZONE_CHECK_FAIL */ + socRxReasonNat, /* 60: NAT_DROP_REASON_ENCODING */ + socRxReasonNat, /* 61: -> */ + socRxReasonNat, /* 62: 3-bit */ + socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */ +}; + +static soc_rx_reason_t *dcb36_rx_reason_maps[] = { + dcb36_rx_reason_map, + dcb26_rx_reason_nat_encoding_map, + NULL +}; + +SETFUNCERR(36, tx_l2pbm, pbmp_t) +SETFUNCERR(36, tx_utpbm, pbmp_t) +SETFUNCERR(36, tx_l3pbm, pbmp_t) +SETFUNCERR(36, tx_crc, int) +SETFUNCERR(36, tx_cos, int) +SETFUNCERR(36, tx_destmod, uint32) +SETFUNCERR(36, tx_destport, uint32) +SETFUNCERR(36, tx_opcode, uint32) +SETFUNCERR(36, tx_srcmod, uint32) +SETFUNCERR(36, tx_srcport, uint32) +SETFUNCERR(36, tx_prio, uint32) +SETFUNCERR(36, tx_pfm, uint32) + +GETFUNCNULL(36, stat) +SETFUNCNULL2(36, stat) + +dcb_op_t dcb36_op = { + 36, + sizeof(dcb36_t), + dcb36_rx_reason_maps, + dcb0_rx_reason_map_get, + ep_to_cpu_hdr36_rx_reasons_get, + dcb36_init, + dcb36_add_tx, + dcb36_add_rx, + dcb36_intr_info, + dcb36_reqcount_set, + dcb36_reqcount_get, + dcb36_xfercount_get, + dcb36_addr_set, + dcb36_addr_get, + dcb36_paddr_get, + dcb36_done_set, + dcb36_done_get, + dcb36_sg_set, + dcb36_sg_get, + dcb36_chain_set, + dcb36_chain_get, + dcb36_reload_set, + dcb36_reload_get, + dcb36_desc_intr_set, + dcb36_desc_intr_get, + dcb36_tx_l2pbm_set, + dcb36_tx_utpbm_set, + dcb36_tx_l3pbm_set, + dcb36_tx_crc_set, + dcb36_tx_cos_set, + dcb36_tx_destmod_set, + dcb36_tx_destport_set, + dcb36_tx_opcode_set, + dcb36_tx_srcmod_set, + dcb36_tx_srcport_set, + dcb36_tx_prio_set, + dcb36_tx_pfm_set, + ep_to_cpu_hdr36_rx_untagged_get, + ep_to_cpu_hdr36_rx_crc_get, + ep_to_cpu_hdr36_rx_cos_get, + ep_to_cpu_hdr36_rx_destmod_get, + ep_to_cpu_hdr36_rx_destport_get, + ep_to_cpu_hdr36_rx_opcode_get, + ep_to_cpu_hdr36_rx_classtag_get, + ep_to_cpu_hdr36_rx_matchrule_get, + dcb36_rx_start_get, + dcb36_rx_end_get, + dcb36_rx_error_get, + ep_to_cpu_hdr36_rx_prio_get, + ep_to_cpu_hdr36_rx_reason_get, + ep_to_cpu_hdr36_rx_reason_hi_get, + ep_to_cpu_hdr36_rx_ingport_get, + ep_to_cpu_hdr36_rx_srcport_get, + ep_to_cpu_hdr36_rx_srcmod_get, + ep_to_cpu_hdr36_rx_mcast_get, + ep_to_cpu_hdr36_rx_vclabel_get, + ep_to_cpu_hdr36_rx_mirror_get, + ep_to_cpu_hdr36_rx_timestamp_get, + ep_to_cpu_hdr36_rx_timestamp_upper_get, + dcb36_hg_set, + dcb36_hg_get, + dcb36_stat_set, + dcb36_stat_get, + dcb36_purge_set, + dcb36_purge_get, + ep_to_cpu_hdr36_mhp_get, + ep_to_cpu_hdr36_outer_vid_get, + ep_to_cpu_hdr36_outer_pri_get, + ep_to_cpu_hdr36_outer_cfi_get, + ep_to_cpu_hdr36_rx_outer_tag_action_get, + ep_to_cpu_hdr36_inner_vid_get, + ep_to_cpu_hdr36_inner_pri_get, + ep_to_cpu_hdr36_inner_cfi_get, + ep_to_cpu_hdr36_rx_inner_tag_action_get, + ep_to_cpu_hdr36_rx_bpdu_get, + ep_to_cpu_hdr36_rx_l3_intf_get, + ep_to_cpu_hdr36_rx_decap_tunnel_get, + ep_to_cpu_hdr36_rx_switch_drop_get, + ep_to_cpu_hdr36_olp_encap_oam_pkt_get, + dcb36_read_ecc_error_get, + dcb36_desc_remaining_get, + dcb36_desc_remaining_set, + dcb36_desc_status_get, + dcb36_desc_status_set, + NULL, +}; +#endif /* BCM_TRIDENT3_SUPPORT */ + +#if defined(BCM_HURRICANE3_SUPPORT) +/* + * DCB Type 34 Support + */ +GETFUNCEXPR(34, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) : + (((d->repl_nhi) & 0x7ff) + _SHR_L3_EGRESS_IDX_MIN))) + +dcb_op_t dcb34_op = { + 34, + sizeof(dcb34_t), + dcb31_rx_reason_maps, + dcb0_rx_reason_map_get, + dcb0_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb19_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb19_desc_intr_set, + dcb19_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb31_rx_untagged_get, + dcb19_rx_crc_get, + dcb31_rx_cos_get, + dcb23_rx_destmod_get, + dcb23_rx_destport_get, + dcb23_rx_opcode_get, + dcb23_rx_classtag_get, + dcb23_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb23_rx_prio_get, + dcb23_rx_reason_get, + dcb23_rx_reason_hi_get, + dcb23_rx_ingport_get, + dcb23_rx_srcport_get, + dcb23_rx_srcmod_get, + dcb23_rx_mcast_get, + dcb23_rx_vclabel_get, + dcb31_rx_mirror_get, + dcb23_rx_timestamp_get, + dcb31_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb23_mhp_get, + dcb31_outer_vid_get, + dcb31_outer_pri_get, + dcb31_outer_cfi_get, + dcb31_rx_outer_tag_action_get, + dcb31_inner_vid_get, + dcb31_inner_pri_get, + dcb31_inner_cfi_get, + dcb31_rx_inner_tag_action_get, + dcb31_rx_bpdu_get, + dcb34_rx_l3_intf_get, + dcb19_rx_decap_tunnel_get, + dcb31_rx_switch_drop_get, + dcb23_olp_encap_oam_pkt_get, + dcb23_read_ecc_error_get, + dcb23_desc_remaining_get, + dcb23_desc_remaining_set, + dcb23_desc_status_get, + dcb23_desc_status_set, + NULL, +}; +#endif /* BCM_HURRICANE3_SUPPORT */ + +#if defined(BCM_GREYHOUND2_SUPPORT) +/* + * DCB Type 37 Support + */ +/* From FORMAT CPU_OPCODES */ +static soc_rx_reason_t +dcb37_rx_reason_map[] = { + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonL2SourceMiss, /* Offset 1 */ + socRxReasonL2DestMiss, /* Offset 2 */ + socRxReasonL2Move, /* Offset 3 */ + socRxReasonL2Cpu, /* Offset 4 */ + socRxReasonSampleSource, /* Offset 5 */ + socRxReasonSampleDest, /* Offset 6 */ + socRxReasonL3SourceMiss, /* Offset 7 */ + socRxReasonL3DestMiss, /* Offset 8 */ + socRxReasonL3SourceMove, /* Offset 9 */ + socRxReasonMcastMiss, /* Offset 10 */ + socRxReasonIpMcastMiss, /* Offset 11 */ + socRxReasonFilterMatch, /* Offset 12 */ + socRxReasonL3HeaderError, /* Offset 13 */ + socRxReasonProtocol, /* Offset 14 */ + socRxReasonDosAttack, /* Offset 15 */ + socRxReasonMartianAddr, /* Offset 16 */ + socRxReasonTunnelError, /* Offset 17 */ + socRxReasonL2MtuFail, /* Offset 18 */ + socRxReasonIcmpRedirect, /* Offset 19 */ + socRxReasonL3Slowpath, /* Offset 20 */ + socRxReasonParityError, /* Offset 21 */ + socRxReasonL3MtuFail, /* Offset 22 */ + socRxReasonHigigHdrError, /* Offset 23 */ + socRxReasonMcastIdxError, /* Offset 24 */ + socRxReasonVlanFilterMatch, /* Offset 25 */ + socRxReasonClassBasedMove, /* Offset 26 */ + socRxReasonL2LearnLimit, /* Offset 27 */ + socRxReasonMplsLabelMiss, /* Offset 28 */ + socRxReasonMplsInvalidAction, /* Offset 29 */ + socRxReasonMplsInvalidPayload, /* Offset 30 */ + socRxReasonMplsTtl, /* Offset 31 */ + socRxReasonMplsSequenceNumber, /* Offset 32 */ + socRxReasonL2NonUnicastMiss, /* Offset 33 */ + socRxReasonNhop, /* Offset 34 */ + socRxReasonMplsCtrlWordError, /* Offset 35 */ + socRxReasonTimeSync, /* Offset 36 */ + socRxReasonOAMSlowpath, /* Offset 37 */ + socRxReasonOAMError, /* Offset 38 */ + socRxReasonOAMLMDM, /* Offset 39 */ + socRxReasonL3AddrBindFail, /* Offset 40 */ + socRxReasonVlanTranslate, /* Offset 41 */ + socRxReasonNiv, /* Offset 42 */ + socRxReasonNiv, /* Offset 43 */ + socRxReasonNiv, /* Offset 44 */ + socRxReasonStation, /* Offset 45 */ + socRxReasonL2StuFail, /* Offset 46 */ + socReasonSrCounterExceeded, /* Offset 47 */ + socRxReasonSrCopyToCpuBit0, /* Offset 48 */ + socRxReasonSrCopyToCpuBit1, /* Offset 49 */ + socRxReasonSrCopyToCpuBit2, /* Offset 50 */ + socRxReasonSrCopyToCpuBit3, /* Offset 51 */ + socRxReasonSrCopyToCpuBit4, /* Offset 52 */ + socRxReasonSrCopyToCpuBit5, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; +static soc_rx_reason_t *dcb37_rx_reason_maps[] = { + dcb37_rx_reason_map, + NULL +}; + +GETFUNCEXPR(37, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) : + (((d->repl_nhi) & 0x7ff) + _SHR_L3_EGRESS_IDX_MIN))) +GETFUNCNULL(37, read_ecc_error) +GETFUNCNULL(37, desc_remaining) +SETFUNCNULL(37, desc_remaining) +GETFUNCNULL(37, desc_status) +SETFUNCNULL(37, desc_status) + +dcb_op_t dcb37_op = { + 37, + sizeof(dcb37_t), + dcb37_rx_reason_maps, + dcb0_rx_reason_map_get, + dcb0_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb19_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb19_desc_intr_set, + dcb19_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb31_rx_untagged_get, + dcb19_rx_crc_get, + dcb31_rx_cos_get, + dcb23_rx_destmod_get, + dcb23_rx_destport_get, + dcb23_rx_opcode_get, + dcb23_rx_classtag_get, + dcb23_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb23_rx_prio_get, + dcb23_rx_reason_get, + dcb23_rx_reason_hi_get, + dcb23_rx_ingport_get, + dcb23_rx_srcport_get, + dcb23_rx_srcmod_get, + dcb23_rx_mcast_get, + dcb23_rx_vclabel_get, + dcb31_rx_mirror_get, + dcb23_rx_timestamp_get, + dcb31_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb23_mhp_get, + dcb31_outer_vid_get, + dcb31_outer_pri_get, + dcb31_outer_cfi_get, + dcb31_rx_outer_tag_action_get, + dcb31_inner_vid_get, + dcb31_inner_pri_get, + dcb31_inner_cfi_get, + dcb31_rx_inner_tag_action_get, + dcb31_rx_bpdu_get, + dcb37_rx_l3_intf_get, + dcb19_rx_decap_tunnel_get, + dcb31_rx_switch_drop_get, + dcb23_olp_encap_oam_pkt_get, + dcb37_read_ecc_error_get, + dcb37_desc_remaining_get, + dcb37_desc_remaining_set, + dcb37_desc_status_get, + dcb37_desc_status_set, + NULL, +}; +#endif /* BCM_GREYHOUND2_SUPPORT */ + +#if defined(BCM_TOMAHAWK3_SUPPORT) +SETFUNCFIELD(38, reqcount, c_count, uint32 count, count) +GETFUNCFIELD(38, reqcount, c_count) +GETFUNCFIELD(38, xfercount, count) +SETFUNCFIELD(38, done, done, int val, val ? 1 : 0) +GETFUNCFIELD(38, done, done) +SETFUNCFIELD(38, sg, c_sg, int val, val ? 1 : 0) +GETFUNCFIELD(38, sg, c_sg) +SETFUNCFIELD(38, chain, c_chain, int val, val ? 1 : 0) +GETFUNCFIELD(38, chain, c_chain) +SETFUNCFIELD(38, reload, c_reload, int val, val ? 1 : 0) +GETFUNCFIELD(38, reload, c_reload) +GETFUNCFIELD(38, rx_start, start) +GETFUNCFIELD(38, rx_end, end) +GETFUNCFIELD(38, rx_error, error) +SETFUNCFIELD(38, hg, c_hg, uint32 hg, hg) +GETFUNCFIELD(38, hg, c_hg) +SETFUNCFIELD(38, purge, c_purge, uint32 purge, purge) +GETFUNCFIELD(38, purge, c_purge) +GETFUNCFIELD(38, read_ecc_error, ecc_error) +GETFUNCFIELD(38, desc_status, c_desc_status) +GETFUNCFIELD(38, desc_intr, c_intr) +GETFUNCFIELD(38, desc_remaining, c_desc) + +GETHDRFUNCFIELD(38, rx_timestamp, timestamp) +GETHDRFUNCFIELD(38, rx_timestamp_upper, timestamp_hi) +GETHDRPTREXPR(38, mhp, &(h->mh0)) +GETHDRFUNCFIELD(38, outer_vid, outer_vid) +GETHDRFUNCFIELD(38, outer_pri, outer_pri) +GETHDRFUNCFIELD(38, outer_cfi, outer_cfi) +GETHDRFUNCFIELD(38, rx_outer_tag_action, word3.overlay1.otag_action) +GETHDRFUNCNULL(38, inner_vid) +GETHDRFUNCNULL(38, inner_pri) +GETHDRFUNCNULL(38, inner_cfi) +GETHDRFUNCNULL(38, rx_inner_tag_action) +GETHDRFUNCFIELD(38, rx_bpdu, word0.overlay1.bpdu) + +static uint32 ep_to_cpu_hdr38_rx_crc_get(void *hdr) { + return 0; +} + +static uint32 +ep_to_cpu_hdr38_rx_untagged_get(void *hdr, int dt_mode, int ingport_is_hg) +{ + ep_to_cpu_hdr38_t *h = (ep_to_cpu_hdr38_t *)hdr; + uint32 tag_status = h->word3.overlay1.tag_status; + + COMPILER_REFERENCE(dt_mode); + /* We have a case where though the number of bits for the + * tag status is 2, we support only 2 states + * 0 = untagged + * 1 = single outer-tag + */ + return (ingport_is_hg ? + ((tag_status) ? 0 : 2) : + ((tag_status) ? 2 : 3)); +} + +static void +ep_to_cpu_hdr38_rx_reasons_get(dcb_op_t *dcb_op, void *hdr, soc_rx_reasons_t *reasons) +{ + soc_rx_reason_t *map, *encoding_map; + uint32 opcode[2], encoding[3]; + uint32 bit_val; + int word_idx, bit_idx, opcode_idx, map_idx, word_count; + int enc_bit = 0; + + SOC_RX_REASON_CLEAR_ALL(*reasons); + + opcode[0] = dcb_op->rx_reason_get(hdr); + opcode[1] = dcb_op->rx_reason_hi_get(hdr); + word_count = 2; + sal_memset(encoding, 0, sizeof(encoding)); + map = dcb_op->rx_reason_maps[0]; + for (word_idx = 0; word_idx < word_count; word_idx++) { + for (bit_idx = 0; bit_idx < 32; bit_idx++) { + opcode_idx = word_idx * 32 + bit_idx; + bit_val = opcode[word_idx] & (1 << bit_idx) ? 1 : 0; + for (map_idx = 0; ; map_idx++) { + encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; + if (encoding_map == NULL) { + break; + } + if (map[opcode_idx] != encoding_map[0]) { + continue; + } + if (opcode_idx == 0 || map[opcode_idx - 1] != encoding_map[0]) { + enc_bit = 0; + } + encoding[map_idx] |= bit_val << enc_bit; + enc_bit++; + break; + } + if (encoding_map == NULL && bit_val) { + SOC_RX_REASON_SET(*reasons, map[opcode_idx]); + } + } + } + + for (map_idx = 0; ; map_idx++) { + encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; + if (encoding_map == NULL) { + break; + } + if (encoding[map_idx] != socRxReasonInvalid) { + SOC_RX_REASON_SET(*reasons, encoding_map[encoding[map_idx]]); + } + } + + /* BPDU bit should be a reason, paste it in here */ + if (dcb_op->rx_bpdu_get(hdr)) { + SOC_RX_REASON_SET(*reasons, socRxReasonBpdu); + } + + return; +} + +GETHDRFUNCFIELD(38, rx_cos, word0.overlay2.cpu_cos) +GETHDRHG2FUNCFIELD(38, rx_destmod, dst_mod) +GETHDRHG2FUNCFIELD(38, rx_destport, dst_port) + +GETHDRHG2FUNCFIELD(38, rx_opcode, opcode) +GETHDRHG2FUNCEXPR(38, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : + (h->ppd_overlay2.ctag_hi << 8) | + (h->ppd_overlay2.ctag_lo))) +GETHDRFUNCFIELD(38, rx_matchrule, match_rule) +GETHDRHG2FUNCFIELD(38, rx_prio, vlan_pri) /* outer_pri */ + +static uint32 +ep_to_cpu_hdr38_rx_reason_get(void *hdr) +{ + ep_to_cpu_hdr38_t *h = (ep_to_cpu_hdr38_t *)hdr; + + return (h->switch_pkt) ? (h->reason) : 0; +} + +static uint32 +ep_to_cpu_hdr38_rx_reason_hi_get(void *hdr) +{ + ep_to_cpu_hdr38_t *h = (ep_to_cpu_hdr38_t *)hdr; + + return (h->switch_pkt) ? (h->reason_hi) : 0; +} + +GETHDRFUNCFIELD(38, rx_ingport, srcport) +GETHDRHG2FUNCFIELD(38, rx_srcport, src_port) +GETHDRHG2FUNCFIELD(38, rx_srcmod, src_mod) +GETHDRHG2FUNCEXPR(38, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | + (h->ppd_overlay1.dst_port))) +GETHDRHG2FUNCEXPR(38, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | + (h->ppd_overlay1.vc_label_15_8 << 8) | + (h->ppd_overlay1.vc_label_7_0))) +GETHDRFUNCEXPR(38, rx_mirror, ((SOC_CPU_OPCODE_TYPE_IP_0 == + h->word3.overlay1.cpu_opcode_type) ? + (h->reason & (1 << 17)) : 0)) + +static _shr_rx_decap_tunnel_t dcb38_rx_decap_tunnel_map[] = { + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_IP, + _SHR_RX_DECAP_L2MPLS_1LABEL, + _SHR_RX_DECAP_L2MPLS_2LABEL, + _SHR_RX_DECAP_MPLS_3LABEL, + _SHR_RX_DECAP_L3MPLS_1LABEL, + _SHR_RX_DECAP_L3MPLS_2LABEL, + _SHR_RX_DECAP_MPLS_3LABEL +}; + +static uint32 ep_to_cpu_hdr38_rx_decap_tunnel_get(void *hdr) { + ep_to_cpu_hdr38_t *h = (ep_to_cpu_hdr38_t *)hdr; + /* Check for array bounds */ + if ( (h->decap_tunnel_type < + (sizeof (dcb38_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { + return (uint32)dcb38_rx_decap_tunnel_map[h->decap_tunnel_type]; + } + return (uint32)_SHR_RX_DECAP_NONE; +} +GETHDRFUNCFIELD(38, rx_l3_intf, word3.overlay1.ing_l3_intf) +GETHDRFUNCNULL(38, rx_switch_drop) +GETHDRFUNCNULL(38, olp_encap_oam_pkt) + +static void +dcb38_init(dcb_t *dcb) +{ + uint32 *d = (uint32 *)dcb; + + d[0] = d[1] = d[2] = d[3] = 0; +} + +static int +dcb38_add_rx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags) +{ + dcb38_t *d; /* DCB */ + uint32 *di; /* DCB integer pointer */ + sal_paddr_t paddr; + + if(!addr) + return SOC_E_PARAM; + + d = (dcb38_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); + + if (dv->dv_vcnt > 0) { /* chain off previous dcb */ + d[-1].c_chain = 1; + } + + di = (uint32 *)d; + di[0] = di[1] = di[2] = di[3] = 0; + + if (addr) { + paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); + d->addr_lo = PTR_TO_INT(paddr); + d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr)); + } + + d->c_count = count; + d->c_sg = 1; + + dv->dv_vcnt += 1; + return dv->dv_cnt - dv->dv_vcnt; +} + +static int +dcb38_add_tx(dv_t *dv, sal_vaddr_t addr, uint32 count, + pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh) +{ + dcb38_t *d; /* DCB */ + uint32 *di; /* DCB integer pointer */ + sal_paddr_t paddr; /* Packet buffer physical address */ + + if(!addr) + return SOC_E_PARAM; + + d = (dcb38_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); + + if (addr) + paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); + + if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) && + (d[-1].c_sg != 0) && + ((d[-1].addr_lo + d[-1].c_count) == paddr) && + (d[-1].c_count + count <= DCB_MAX_REQCOUNT)) { + d[-1].c_count += count; + return dv->dv_cnt - dv->dv_vcnt; + } + + if (dv->dv_vcnt >= dv->dv_cnt) { + return SOC_E_FULL; + } + if (dv->dv_vcnt > 0) { /* chain off previous dcb */ + d[-1].c_chain = 1; + } + + di = (uint32 *)d; + di[0] = di[1] = di[2] = di[3] = 0; + + d->addr_lo = PTR_TO_INT(paddr); + d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr)); + d->c_count = count; + d->c_sg = 1; + + d->c_purge = SOC_DMA_PURGE_GET(flags); + + if (SOC_DMA_HG_GET(flags)) { + d->c_hg = 1; + } + + dv->dv_vcnt += 1; + + return dv->dv_cnt - dv->dv_vcnt; +} + +static uint32 +dcb38_intr_info(int unit, dcb_t *dcb, int tx, uint32 *count) +{ + dcb38_t *d = (dcb38_t *)dcb; /* DCB */ + uint32 f; /* SOC_DCB_INFO_* flags */ + + if (!d->done) { + return 0; + } + + f = SOC_DCB_INFO_DONE; + if (tx) { + if (!d->c_sg) { + f |= SOC_DCB_INFO_PKTEND; + } + } else { + if (d->end) { + f |= SOC_DCB_INFO_PKTEND; + } + } + + *count = d->count; + return f; +} + +/* the addr related functions are the same for all dcb types */ +static void +dcb38_addr_set(int unit, dcb_t *dcb, sal_vaddr_t addr) +{ + dcb38_t *d = (dcb38_t *)dcb; /* DCB */ + sal_paddr_t paddr; + + if (addr == 0) { + d->addr_lo = 0; + d->addr_hi = 0; + } else { + paddr = soc_cm_l2p(unit, (void *)addr); + d->addr_lo = PTR_TO_INT(paddr); + d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr)); + } +} + +static sal_vaddr_t +dcb38_addr_get(int unit, dcb_t *dcb) +{ + dcb38_t *d = (dcb38_t *)dcb; /* DCB */ + sal_paddr_t paddr; + +#if defined(COMPILER_OVERRIDE_NO_LONGLONG) || defined(__PEDANTIC__) + paddr = d->addr_lo; +#else + paddr = (((uint64)(d->addr_hi & ~(0x10000000)) << 32) | d->addr_lo); +#endif + + return (sal_vaddr_t)soc_cm_p2l(unit, paddr); +} + +static sal_paddr_t +dcb38_paddr_get(dcb_t *dcb) +{ + uint32 *d = (uint32 *)dcb; + + return (sal_paddr_t)*d; +} + +static void +dcb38_desc_intr_set(dcb_t * dcb, int val) +{ + dcb38_t * d = (dcb38_t *)dcb; + + d->c_intr = val; + return; +} + +static uint32 +dcb38_desc_status_set(dcb_t * dcb, uint32 val) +{ + dcb38_t * d = (dcb38_t *)dcb; + + d->c_desc_status = val; + return 0; +} + +static uint32 +dcb38_desc_remaining_set(dcb_t * dcb, uint32 val) +{ + dcb38_t * d = (dcb38_t *)dcb; + + d->c_desc = val; + return 0; +} + +/* + * DCB Type 38 Support + */ +/* From FORMAT CPU_OPCODES */ +static soc_rx_reason_t +dcb38_rx_reason_map[] = { + socRxReasonUnknownVlan, /* 0: CPU_UVLAN */ + socRxReasonL2SourceMiss, /* 1: CPU_SLF */ + socRxReasonL2DestMiss, /* 2: CPU_DLF */ + socRxReasonL2Move, /* 3: CPU_L2MOVE */ + socRxReasonL2Cpu, /* 4: CPU_L2CPU */ + socRxReasonL3SourceMiss, /* 5: CPU_L3SRC_MISS */ + socRxReasonL3DestMiss, /* 6: CPU_L3DST_MISS */ + socRxReasonL3SourceMove, /* 7: CPU_L3SRC_MOVE */ + socRxReasonMcastMiss, /* 8: CPU_MC_MISS */ + socRxReasonIpMcastMiss, /* 9: CPU_IPMC_MISS */ + socRxReasonFilterMatch, /* 10: CPU_FFP */ + socRxReasonL3HeaderError, /* 11: CPU_L3HDR_ERR */ + socRxReasonProtocol, /* 12: CPU_PROTOCOL_PKT */ + socRxReasonDosAttack, /* 13: CPU_DOS_ATTACK */ + socRxReasonMartianAddr, /* 14: CPU_MARTIAN_ADDR */ + socRxReasonTunnelError, /* 15: CPU_TUNNEL_ERR */ + socRxReasonSampleSourceFlex, /* 16: CPU_SFLOW_FLEX */ + socRxReasonSampleSourceFlex, /* 17: CPU_SFLOW_FLEX */ + socRxReasonIcmpRedirect, /* 18: ICMP_REDIRECT */ + socRxReasonL3Slowpath, /* 19: L3_SLOWPATH */ + socRxReasonParityError, /* 20: PARITY_ERROR */ + socRxReasonL3MtuFail, /* 21: L3_MTU_CHECK_FAIL */ + socRxReasonMcastIdxError, /* 22: MCIDX_ERROR */ + socRxReasonVlanFilterMatch, /* 23: VFP */ + socRxReasonMplsError, /* 24: MPLS_LABEL_MISS */ + socRxReasonMplsError, /* 25: MPLS_INVALID_ACTION */ + socRxReasonMplsError, /* 26: MPLS_INVALID_PAYLOAD */ + socRxReasonL2NonUnicastMiss, /* 27: PBT_NONUC_PKT */ + socRxReasonNhop, /* 28: L3_NEXT_HOP */ + socRxReasonStation, /* 29: MY_STATION */ + socRxReasonTimeSync, /* 30: TIME_SYNC */ + socRxReasonTunnelDecapEcnError,/* 31: TUNNEL_DECAP_ECN_ERROR (new) */ + socRxReasonBfdSlowpath, /* 32: BFD SLOWPATH */ + socRxReasonBfd, /* 33: BFD_ERROR */ +#if 1 + socRxReasonInvalid, /* 34:NOT DEFINED */ +#endif + socRxReasonMplsUnknownAch, /* 35: MPLS_UNKNOWN_ACH_ERROR */ + socRxReasonMplsRouterAlertLabel, /* 36: MPLS_ALERT_LABEL */ + socRxReasonIpmcInterfaceMismatch, /* 37: CPU_IPMC_INTERFACE_MISMATCH */ + socRxReasonDlbMonitor, /* 38: DLB_MONITOR */ + socRxReasonIntTurnAround, /* 39: INBAND_TELEMETRY */ + socRxReasonEtrapMonitor, /* 40: ETRAP_MONITOR */ + socRxReasonInvalid, /* 41: Reserved */ + socRxReasonInvalid, /* 42: Reserved */ + socRxReasonInvalid, /* 43: Reserved */ + socRxReasonInvalid, /* 44: Reserved */ + socRxReasonInvalid, /* 45: Reserved */ + socRxReasonInvalid, /* 46: Reserved */ + socRxReasonInvalid, /* 47: Reserved */ + socRxReasonInvalid, /* 48: Reserved */ + socRxReasonInvalid, /* 49: Reserved */ + socRxReasonInvalid, /* 50: Reserved */ + socRxReasonInvalid, /* 51: Reserved */ + socRxReasonInvalid, /* 52: Reserved */ + socRxReasonInvalid, /* 53: Reserved */ + socRxReasonInvalid, /* 54: Reserved */ + socRxReasonInvalid, /* 55: Reserved */ + socRxReasonInvalid, /* 56: Reserved */ + socRxReasonInvalid, /* 57: Reserved */ + socRxReasonInvalid, /* 58: Reserved */ + socRxReasonInvalid, /* 59: Reserved */ + socRxReasonInvalid, /* 60: Reserved */ + socRxReasonInvalid, /* 61: Reserved */ + socRxReasonInvalid, /* 62: Reserved */ + socRxReasonInvalid /* 63: Reserved */ +}; + +/* From CPU_SFLOW encoding from TH3 regsfile */ +static soc_rx_reason_t dcb38_rx_reason_cpu_sflow_encoding_map[] = { + socRxReasonSampleSourceFlex, /* 0: NO_ERRORS + * Basefield, must match the entries above */ + socRxReasonSampleSourceFlex, /* 1: CPU_SFLOW_FLEX */ + socRxReasonSampleDest, /* 2: CPU_SFLOW_DST */ + socRxReasonSampleSource, /* 3: CPU_SFLOW_SRC */ + socRxReasonInvalid, /* Offset 4 */ + socRxReasonInvalid, /* Offset 5 */ + socRxReasonInvalid, /* Offset 6 */ + socRxReasonInvalid, /* Offset 7 */ + socRxReasonInvalid, /* Offset 8 */ + socRxReasonInvalid, /* Offset 9 */ + socRxReasonInvalid, /* Offset 10 */ + socRxReasonInvalid, /* Offset 11 */ + socRxReasonInvalid, /* Offset 12 */ + socRxReasonInvalid, /* Offset 13 */ + socRxReasonInvalid, /* Offset 14 */ + socRxReasonInvalid, /* Offset 15 */ + socRxReasonInvalid, /* Offset 16 */ + socRxReasonInvalid, /* Offset 17 */ + socRxReasonInvalid, /* Offset 18 */ + socRxReasonInvalid, /* Offset 19 */ + socRxReasonInvalid, /* Offset 20 */ + socRxReasonInvalid, /* Offset 21 */ + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +/* From MPLS_PROC_ERROR encoding in TH3 regsfile */ +static soc_rx_reason_t dcb38_rx_reason_mpls_proc_err_encoding_map[] = { + socRxReasonMplsError, /* 0: NO_ERRORS + * Basefield, must match the entries above */ + socRxReasonMplsInvalidPayload, /* 1: Invalid Payload */ + socRxReasonMplsInvalidAction, /* 2: Invalid Action */ + socRxReasonMplsLabelMiss, /* 3: Lookup Label Miss */ + socRxReasonMplsTtl, /* 4: TTL Check Fail */ + socRxReasonInvalid, /* Offset 5 */ + socRxReasonInvalid, /* Offset 6 */ + socRxReasonInvalid, /* Offset 7 */ + socRxReasonInvalid, /* Offset 8 */ + socRxReasonInvalid, /* Offset 9 */ + socRxReasonInvalid, /* Offset 10 */ + socRxReasonInvalid, /* Offset 11 */ + socRxReasonInvalid, /* Offset 12 */ + socRxReasonInvalid, /* Offset 13 */ + socRxReasonInvalid, /* Offset 14 */ + socRxReasonInvalid, /* Offset 15 */ + socRxReasonInvalid, /* Offset 16 */ + socRxReasonInvalid, /* Offset 17 */ + socRxReasonInvalid, /* Offset 18 */ + socRxReasonInvalid, /* Offset 19 */ + socRxReasonInvalid, /* Offset 20 */ + socRxReasonInvalid, /* Offset 21 */ + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static soc_rx_reason_t *dcb38_rx_reason_maps[] = { + dcb38_rx_reason_map, + dcb38_rx_reason_cpu_sflow_encoding_map, + dcb38_rx_reason_mpls_proc_err_encoding_map, + NULL +}; + +SETFUNCERR(38, tx_l2pbm, pbmp_t) +SETFUNCERR(38, tx_utpbm, pbmp_t) +SETFUNCERR(38, tx_l3pbm, pbmp_t) +SETFUNCERR(38, tx_crc, int) +SETFUNCERR(38, tx_cos, int) +SETFUNCERR(38, tx_destmod, uint32) +SETFUNCERR(38, tx_destport, uint32) +SETFUNCERR(38, tx_opcode, uint32) +SETFUNCERR(38, tx_srcmod, uint32) +SETFUNCERR(38, tx_srcport, uint32) +SETFUNCERR(38, tx_prio, uint32) +SETFUNCERR(38, tx_pfm, uint32) + +GETFUNCNULL(38, stat) +SETFUNCNULL2(38, stat) + +dcb_op_t dcb38_op = { + 38, + sizeof(dcb38_t), + dcb38_rx_reason_maps, + dcb0_rx_reason_map_get, + ep_to_cpu_hdr38_rx_reasons_get, + dcb38_init, + dcb38_add_tx, + dcb38_add_rx, + dcb38_intr_info, + dcb38_reqcount_set, + dcb38_reqcount_get, + dcb38_xfercount_get, + dcb38_addr_set, + dcb38_addr_get, + dcb38_paddr_get, + dcb38_done_set, + dcb38_done_get, + dcb38_sg_set, + dcb38_sg_get, + dcb38_chain_set, + dcb38_chain_get, + dcb38_reload_set, + dcb38_reload_get, + dcb38_desc_intr_set, + dcb38_desc_intr_get, + dcb38_tx_l2pbm_set, + dcb38_tx_utpbm_set, + dcb38_tx_l3pbm_set, + dcb38_tx_crc_set, + dcb38_tx_cos_set, + dcb38_tx_destmod_set, + dcb38_tx_destport_set, + dcb38_tx_opcode_set, + dcb38_tx_srcmod_set, + dcb38_tx_srcport_set, + dcb38_tx_prio_set, + dcb38_tx_pfm_set, + ep_to_cpu_hdr38_rx_untagged_get, + ep_to_cpu_hdr38_rx_crc_get, + ep_to_cpu_hdr38_rx_cos_get, + ep_to_cpu_hdr38_rx_destmod_get, + ep_to_cpu_hdr38_rx_destport_get, + ep_to_cpu_hdr38_rx_opcode_get, + ep_to_cpu_hdr38_rx_classtag_get, + ep_to_cpu_hdr38_rx_matchrule_get, + dcb38_rx_start_get, + dcb38_rx_end_get, + dcb38_rx_error_get, + ep_to_cpu_hdr38_rx_prio_get, + ep_to_cpu_hdr38_rx_reason_get, + ep_to_cpu_hdr38_rx_reason_hi_get, + ep_to_cpu_hdr38_rx_ingport_get, + ep_to_cpu_hdr38_rx_srcport_get, + ep_to_cpu_hdr38_rx_srcmod_get, + ep_to_cpu_hdr38_rx_mcast_get, + ep_to_cpu_hdr38_rx_vclabel_get, + ep_to_cpu_hdr38_rx_mirror_get, + ep_to_cpu_hdr38_rx_timestamp_get, + ep_to_cpu_hdr38_rx_timestamp_upper_get, + dcb38_hg_set, + dcb38_hg_get, + dcb38_stat_set, + dcb38_stat_get, + dcb38_purge_set, + dcb38_purge_get, + ep_to_cpu_hdr38_mhp_get, + ep_to_cpu_hdr38_outer_vid_get, + ep_to_cpu_hdr38_outer_pri_get, + ep_to_cpu_hdr38_outer_cfi_get, + ep_to_cpu_hdr38_rx_outer_tag_action_get, + ep_to_cpu_hdr38_inner_vid_get, + ep_to_cpu_hdr38_inner_pri_get, + ep_to_cpu_hdr38_inner_cfi_get, + ep_to_cpu_hdr38_rx_inner_tag_action_get, + ep_to_cpu_hdr38_rx_bpdu_get, + ep_to_cpu_hdr38_rx_l3_intf_get, + ep_to_cpu_hdr38_rx_decap_tunnel_get, + ep_to_cpu_hdr38_rx_switch_drop_get, + ep_to_cpu_hdr38_olp_encap_oam_pkt_get, + dcb38_read_ecc_error_get, + dcb38_desc_remaining_get, + dcb38_desc_remaining_set, + dcb38_desc_status_get, + dcb38_desc_status_set, + NULL, +}; +#endif /* BCM_TOMAHAWK3_SUPPORT */ + +#endif /* defined(BCM_ESW_SUPPORT) */ + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile new file mode 100644 index 000000000000..3d153b4994a8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile @@ -0,0 +1,97 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.3 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# +LOCALDIR = systems/linux/kernel/modules/genl-packet + +include ${SDK}/make/Make.config + +LIBS = + +CFLAGS += -I${SDK}/systems/linux/kernel/modules/include/kernel + +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := genl-packet +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +# BCM Network Device + +ifeq (1,$(NO_PRECOMPILED_MODULE)) +# { +# +# These are the objects which need to be compiled, in the kernel, to +# created the module object file. +# +SRCS_COMPOSING = genl-packet.c +OBJECTS_COMPOSING = genl-packet.o +# +# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/linux/kernel/modules/genl-packet/kernel_module' +# is not created and all action is done in systems/linux/kernel/modules/genl-packet +# + +build: $(KMODULE) + +$(KMODULE): $(SRCS_COMPOSING) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + rm -f $(BLDDIR)/*.c + rm -f $(BLDDIR)/*.o + rm -f $(BLDDIR)/*.ko + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/Makefile + cp ./*.c $(BLDDIR)/ + MOD_OBJS=$(OBJECTS_COMPOSING) MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR) $(THIS_MOD_NAME).ko LOC_BLDDIR=$(BLDDIR) LOC_SRCDIR=$(PWD) +# } +else +# { +build: $(MODULE) $(KMODULE) +# +# This is for the compilation of the 'precompiled' object. We keep it +# here for compatibility. +# +$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ + +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko +# } +endif + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. + +include ${SDK}/make/Make.depend + +clean:: + $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o + $(RM) $(BOBJS) $(MODULE) + +.PHONY: build + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/genl-packet.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/genl-packet.c new file mode 100644 index 000000000000..141edc6d7603 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/genl-packet.c @@ -0,0 +1,118 @@ +/* + * net/genl-packet/genl-packet.c - Netlink channel for general packetIO + * Copyright (c) 2021 Google, based on psample.c (originally written by + * Yotam Gigi ) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include + +#define GENL_PACKET_MAX_PACKET_SIZE 0xffff + +/* multicast groups */ +enum genl_packet_multicast_groups { + GENL_PACKET_MCGRP_PACKET, +}; + +static const struct genl_multicast_group genl_packet_mcgrps[] = { + [GENL_PACKET_MCGRP_PACKET] = { .name = GENL_PACKET_MCGRP_NAME }, +}; + +static struct genl_family genl_packet_family = { + .name = GENL_PACKET_NAME, + .version = GENL_PACKET_VERSION, + .maxattr = GENL_PACKET_ATTR_MAX, + .netnsok = true, + .module = THIS_MODULE, + .mcgrps = genl_packet_mcgrps, + .n_mcgrps = ARRAY_SIZE(genl_packet_mcgrps), +}; + +void genl_packet_send_packet(struct net *net, struct sk_buff *skb, + int in_ifindex, int out_ifindex, unsigned int context) +{ + struct sk_buff *nl_skb; + int data_len; + int meta_len; + void *data; + int ret; + + /* Metalength is sum of netlink message sizes of in_ifindex + out_ifindex + + * context */ + meta_len = nla_total_size(sizeof(s16)) + + nla_total_size(sizeof(s16)) + + nla_total_size(sizeof(u32)); + + data_len = skb->len; + if (meta_len + nla_total_size(data_len) > GENL_PACKET_MAX_PACKET_SIZE) + data_len = GENL_PACKET_MAX_PACKET_SIZE - meta_len - NLA_HDRLEN + - NLA_ALIGNTO; + if (data_len <= 0) + return; + + nl_skb = genlmsg_new(meta_len + nla_total_size(data_len), GFP_ATOMIC); + if (unlikely(!nl_skb)) + return; + + data = genlmsg_put(nl_skb, 0, 0, &genl_packet_family, 0, + GENL_PACKET_CMD_PACKET); + if (unlikely(!data)) + goto error; + + ret = nla_put_s16(nl_skb, GENL_PACKET_ATTR_IIFINDEX, in_ifindex); + if (unlikely(ret < 0)) + goto error; + + ret = nla_put_s16(nl_skb, GENL_PACKET_ATTR_OIFINDEX, out_ifindex); + if (unlikely(ret < 0)) + goto error; + + ret = nla_put_u32(nl_skb, GENL_PACKET_ATTR_CONTEXT, context); + if (unlikely(ret < 0)) + goto error; + + if (data_len > 0) { + int nla_len = nla_total_size(data_len); + struct nlattr *nla; + + nla = (struct nlattr *)skb_put(nl_skb, nla_len); + nla->nla_type = GENL_PACKET_ATTR_DATA; + nla->nla_len = nla_attr_size(data_len); + + if (skb_copy_bits(skb, 0, nla_data(nla), data_len)) + goto error; + } + + genlmsg_end(nl_skb, data); + genlmsg_multicast_netns(&genl_packet_family, net, nl_skb, 0, + GENL_PACKET_MCGRP_PACKET, GFP_ATOMIC); + + return; +error: + pr_err_ratelimited("Could not create genl_packet message\n"); + nlmsg_free(nl_skb); +} +EXPORT_SYMBOL_GPL(genl_packet_send_packet); + +static int __init genl_packet_module_init(void) +{ + return genl_register_family(&genl_packet_family); +} + +static void __exit genl_packet_module_exit(void) +{ + genl_unregister_family(&genl_packet_family); +} + +module_init(genl_packet_module_init); +module_exit(genl_packet_module_exit); + +MODULE_AUTHOR("Google"); +MODULE_DESCRIPTION("netlink channel for genl_packet"); +MODULE_LICENSE("GPL v2"); diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h index 003495364853..10763a50c620 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: bcm-knet.h,v 1.4 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: bcm-knet.h,v 1.4 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * */ #ifndef __LINUX_BCM_KNET_H__ #define __LINUX_BCM_KNET_H__ @@ -50,8 +48,6 @@ typedef struct { * Call-back interfaces for other Linux kernel drivers. */ #include -#include -#include typedef struct { uint32 netif_user_data; @@ -67,6 +63,9 @@ typedef struct { typedef struct sk_buff * (*knet_skb_cb_f)(struct sk_buff *skb, int dev_no, void *meta); +typedef int +(*knet_netif_cb_f)(struct net_device *dev, int dev_no, kcom_netif_t *netif); + typedef int (*knet_filter_cb_f)(uint8_t *pkt, int size, int dev_no, void *meta, int chan, kcom_filter_t *filter); @@ -92,6 +91,9 @@ typedef int typedef int (*knet_hw_tstamp_ioctl_cmd_cb_f)(kcom_msg_clock_cmd_t *kmsg, int len, int dcb_type); +typedef int +(*knet_hw_tstamp_ptp_transport_get_cb_f)(uint8_t *pkt); + extern int bkn_rx_skb_cb_register(knet_skb_cb_f rx_cb); @@ -104,9 +106,24 @@ bkn_tx_skb_cb_register(knet_skb_cb_f tx_cb); extern int bkn_tx_skb_cb_unregister(knet_skb_cb_f tx_cb); +extern int +bkn_netif_create_cb_register(knet_netif_cb_f netif_cb); + +extern int +bkn_netif_create_cb_unregister(knet_netif_cb_f netif_cb); + +extern int +bkn_netif_destroy_cb_register(knet_netif_cb_f netif_cb); + +extern int +bkn_netif_destroy_cb_unregister(knet_netif_cb_f netif_cb); + extern int bkn_filter_cb_register(knet_filter_cb_f filter_cb); +extern int +bkn_filter_cb_register_by_name(knet_filter_cb_f filter_cb, char *filter_name); + extern int bkn_filter_cb_unregister(knet_filter_cb_f filter_cb); @@ -157,31 +174,16 @@ bkn_hw_tstamp_ioctl_cmd_cb_register(knet_hw_tstamp_ioctl_cmd_cb_f hw_tstamp_ioct extern int bkn_hw_tstamp_ioctl_cmd_cb_unregister(knet_hw_tstamp_ioctl_cmd_cb_f hw_tstamp_ioctl_cmd_cb); -typedef struct { - uint8 cmic_type; - uint8 dcb_type; - uint8 dcb_size; - uint8 pkt_hdr_size; - uint32 cdma_channels; -} knet_hw_info_t; extern int -bkn_hw_info_get(int unit, knet_hw_info_t *hw_info); - -typedef int -(*knet_netif_cb_f)(int unit, kcom_netif_t *netif, struct net_device *dev); - -extern int -bkn_netif_create_cb_register(knet_netif_cb_f netif_cb); +bkn_hw_tstamp_ptp_transport_get_cb_register(knet_hw_tstamp_ptp_transport_get_cb_f hw_tstamp_ptp_transport_get_cb); extern int -bkn_netif_create_cb_unregister(knet_netif_cb_f netif_cb); +bkn_hw_tstamp_ptp_transport_get_cb_unregister(knet_hw_tstamp_ptp_transport_get_cb_f hw_tstamp_ptp_transport_get_cb); extern int -bkn_netif_destroy_cb_register(knet_netif_cb_f netif_cb); +bkn_hw_device_get(int dev_no, uint16_t *dev_id, uint8_t *rev_id); -extern int -bkn_netif_destroy_cb_unregister(knet_netif_cb_f netif_cb); #endif #endif /* __LINUX_BCM_KNET_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h index a9db097f3062..07cc9c55e702 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: gmodule.h,v 1.9 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: gmodule.h,v 1.9 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * */ #ifndef __COMMON_LINUX_KRN_GMODULE_H__ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/README b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/README new file mode 100644 index 000000000000..95678d22b7dc --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/README @@ -0,0 +1,8 @@ +This directory is mainly for the header files which are planned +for upstreaming to the mainline kernels. +The header files can be placed in the simulated kernel include path +created in this directory. + +The directory (include/kernel) can be added to the include path (-I) +when compiling the associated source files such that the standard Linux path +can be used in the source files. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/net/genl-packet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/net/genl-packet.h new file mode 100644 index 000000000000..48db3895db3e --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/net/genl-packet.h @@ -0,0 +1,9 @@ +#ifndef __NET_GENL_PACKET_H +#define __NET_GENL_PACKET_H + +#include + +extern void genl_packet_send_packet(struct net *net, struct sk_buff *skb, + int in_ifindex, int out_ifindex, unsigned int context); + +#endif /* __NET_GENL_PACKET_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/uapi/linux/genl-packet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/uapi/linux/genl-packet.h new file mode 100644 index 000000000000..9945118a4e4f --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/uapi/linux/genl-packet.h @@ -0,0 +1,25 @@ +#ifndef __UAPI_GENL_PACKET_H +#define __UAPI_GENL_PACKET_H + +enum { + /* packet metadata */ + GENL_PACKET_ATTR_IIFINDEX, + GENL_PACKET_ATTR_OIFINDEX, + GENL_PACKET_ATTR_CONTEXT, + GENL_PACKET_ATTR_DATA, + + __GENL_PACKET_ATTR_MAX +}; + +enum genl_packet_command { + GENL_PACKET_CMD_PACKET, +}; + +/* Can be overridden at runtime by module option */ +#define GENL_PACKET_ATTR_MAX (__GENL_PACKET_ATTR_MAX - 1) + +#define GENL_PACKET_MCGRP_NAME "packets" +#define GENL_PACKET_NAME "genl_packet" +#define GENL_PACKET_VERSION 1 + +#endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h index 7a749a40a9dd..7bb0c5b3b7f2 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: lkm.h,v 1.22 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: lkm.h,v 1.22 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * */ #ifndef __COMMON_LINUX_KRN_LKM_H__ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile index 79223a372d47..e7bee1890c69 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile @@ -1,33 +1,31 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.3 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # LOCALDIR = systems/linux/kernel/modules/knet-cb @@ -35,6 +33,18 @@ include ${SDK}/make/Make.config LIBS = $(LIBDIR)/libkern.a +ifeq (1,$(BUILD_DCBLIB)) +ifndef DCBDIR +DCBDIR = $(SDK)/systems/linux/kernel/modules/dcb +# $(error 'The $$DCBDIR variable is not set') +endif +ifeq (1,$(NO_PRECOMPILED_MODULE)) +$(error 'DCB_LIB build is not supported if NO_PRECOMPILED_MODULE=1') +endif +LIBS += $(LIBDIR)/libdcb.a +CFLAGS += -DDCBLIB_SUPPORT -I$(DCBDIR)/include +endif + KERNEL_MODULE_DIR = kernel_module THIS_MOD_NAME := linux-knet-cb @@ -60,6 +70,7 @@ build: $(KMODULE) # is not created and all action is done in systems/linux/kernel/modules/knet-cb # $(KMODULE): $(SRCS_COMPOSING) + mkdir -p $(BLDDIR) rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) rm -f $(BLDDIR)/*.c rm -f $(BLDDIR)/*.o @@ -85,6 +96,11 @@ build: $(MODULE) $(KMODULE) # This is for the compilation of the 'precompiled' object. We keep it # here for compatibility. # +$(LIBDIR)/libdcb.a: + $(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) \ + KADD_CFLAGS="-I${SDK}/systems/linux/kernel/modules/include $(KFLAGS) -D$(ENDIAN)" \ + CROSS_COMPILE=$(CROSS_COMPILE) + $(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ @@ -93,16 +109,18 @@ $(KMODULE): $(MODULE) mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers - MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko -# } -endif + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko # Make.depend is before clean:: so that Make.depend's clean:: runs first. - include ${SDK}/make/Make.depend +# } +endif clean:: $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o $(RM) $(BOBJS) $(MODULE) +ifeq (1,$(BUILD_DCBLIB)) + $(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) clean +endif .PHONY: build diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c index 89428e072f6e..42a6e92f5c0e 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c @@ -1,5 +1,5 @@ /* - * Copyright 2017-2019 Broadcom + * Copyright 2017-2024 Broadcom * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as @@ -45,11 +45,6 @@ #include #include -/* Enable sflow sampling using psample */ -#ifdef PSAMPLE_SUPPORT -#include "psample-cb.h" -#endif - MODULE_AUTHOR("Broadcom Corporation"); MODULE_DESCRIPTION("Broadcom Linux KNET Call-Back Driver"); MODULE_LICENSE("GPL"); @@ -343,7 +338,8 @@ knet_filter_cb(uint8_t * pkt, int size, int dev_no, void *meta, } static int -knet_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev) +/*knet_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev)*/ +knet_netif_create_cb(struct net_device *dev, int unit, kcom_netif_t *netif) { int retv = 0; #ifdef PSAMPLE_SUPPORT @@ -353,7 +349,8 @@ knet_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev) } static int -knet_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev) +/*knet_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev)*/ +knet_netif_destroy_cb(struct net_device *dev, int unit, kcom_netif_t *netif) { int retv = 0; #ifdef PSAMPLE_SUPPORT @@ -361,41 +358,7 @@ knet_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev) #endif return retv; } -#else -static int -knet_filter_cb(uint8_t * pkt, int size, int dev_no, void *meta, - int chan, kcom_filter_t *kf) -{ - /* check for filter callback handler */ -#ifdef PSAMPLE_SUPPORT - if (strncmp(kf->desc, PSAMPLE_CB_NAME, KCOM_FILTER_DESC_MAX) == 0) { - return psample_filter_cb (pkt, size, dev_no, meta, chan, kf); - } -#endif - return strip_tag_filter_cb (pkt, size, dev_no, meta, chan, kf); -} - -static int -knet_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev) -{ - int retv = 0; -#ifdef PSAMPLE_SUPPORT - retv = psample_netif_create_cb(unit, netif, dev); #endif - return retv; -} - -static int -knet_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev) -{ - int retv = 0; -#ifdef PSAMPLE_SUPPORT - retv = psample_netif_destroy_cb(unit, netif, dev); -#endif - return retv; -} -#endif - /* * Get statistics. * % cat /proc/linux-knet-cb @@ -423,13 +386,6 @@ _cleanup(void) bkn_tx_skb_cb_unregister(strip_tag_tx_cb); } - bkn_filter_cb_unregister(knet_filter_cb); - bkn_netif_create_cb_unregister(knet_netif_create_cb); - bkn_netif_destroy_cb_unregister(knet_netif_destroy_cb); - -#ifdef PSAMPLE_SUPPORT - psample_cleanup(); -#endif return 0; } @@ -445,13 +401,6 @@ _init(void) bkn_tx_skb_cb_register(strip_tag_tx_cb); } -#ifdef PSAMPLE_SUPPORT - psample_init(); -#endif - bkn_filter_cb_register(knet_filter_cb); - bkn_netif_create_cb_register(knet_netif_create_cb); - bkn_netif_destroy_cb_register(knet_netif_destroy_cb); - return 0; } diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.h deleted file mode 100644 index 40408819ef74..000000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Copyright 2017 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - */ -/* - * $Id: psample_cb.h $ - * $Copyright: (c) 2019 Broadcom Corp. - * All Rights Reserved.$ - */ -#ifndef __PSAMPLE_CB_H__ -#define __PSAMPLE_CB_H__ - -#include -#include -#include - -#define PSAMPLE_CB_NAME "psample" - -extern int -psample_init(void); - -extern int -psample_cleanup(void); - -extern int -psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta, - int chan, kcom_filter_t *kf); - -/* psample data per interface */ -typedef struct { - struct list_head list; - struct net_device *dev; - uint16 id; - uint16 port; - uint16 vlan; - uint16 qnum; - uint32 sample_rate; - uint32 sample_size; -} psample_netif_t; - -extern int -psample_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev); - -extern int -psample_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev); - -#endif /* __PSAMPLE_CB_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile index 966f639f6983..67089f94b5e1 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile @@ -1,33 +1,31 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.2 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # LOCALDIR = systems/linux/kernel/modules/shared diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c index fd43ee5bd726..16cfefb9ad51 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: gmodule.c,v 1.20 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,9 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: gmodule.c,v 1.20 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * * * Generic Linux Module Framework * @@ -41,7 +39,7 @@ static gmodule_t* _gmodule = NULL; -/* FIXME: support dynamic debugging */ + static int _dbg_enable = 0; @@ -321,17 +319,17 @@ void __exit cleanup_module(void) { if(!_gmodule) return; - + /* Specific Cleanup */ if(_gmodule->cleanup) { _gmodule->cleanup(); } - + /* Remove any proc entries */ if(_gmodule->pprint) { _gmodule_remove_proc(); } - + /* Finally, remove ourselves from the universe */ unregister_chrdev(_gmodule->major, _gmodule->name); } diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c deleted file mode 100644 index 089d47c8c0ad..000000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c +++ /dev/null @@ -1,272 +0,0 @@ -/* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. - * - * Permission is granted to use, copy, modify and/or distribute this - * software under either one of the licenses below. - * - * License Option 1: GPL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - * - * - * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license - * - * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: ksal.c,v 1.1 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ - */ - -#include -#include - -#include "lkm.h" -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) -#include -#else -#include -#endif -#include -#include -#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,9,0) -#include -#endif -#include - -#if defined(MAX_USER_RT_PRIO) || defined(MAX_RT_PRIO) -/* Assume 2.6 scheduler */ -#define SAL_YIELD(task) \ - yield() -#else -/* Assume 2.4 scheduler */ -#define SAL_YIELD(task) \ -do { \ - task->policy |= SCHED_YIELD; \ - schedule(); \ -} while (0) -#endif - -#define SECOND_USEC (1000000) -#define USECS_PER_JIFFY (SECOND_USEC / HZ) -#define USEC_TO_JIFFIES(usec) ((usec + (USECS_PER_JIFFY - 1)) / USECS_PER_JIFFY) - -#define sal_alloc(size, desc) kmalloc(size, GFP_KERNEL) -#define sal_free(ptr) kfree(ptr) - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12) -#define WQ_SLEEP(a, b) wait_event_interruptible_timeout(a, NULL, b) -#else -#define WQ_SLEEP(a, b) interruptible_sleep_on_timeout(&(a), b) -#endif -/* - * sem_ctrl_t - * - * The semaphore control type uses the binary property to implement - * timed semaphores with improved performance using wait queues. - */ - -typedef struct sem_ctrl_s { - struct semaphore sem; - int binary; - int cnt; - wait_queue_head_t wq; -} sem_ctrl_t; - -sal_sem_t -sal_sem_create(char *desc, int binary, int initial_count) -{ - sem_ctrl_t *s; - - if ((s = sal_alloc(sizeof(*s), desc)) != 0) { - sema_init(&s->sem, initial_count); - s->binary = binary; - if (s->binary) { - init_waitqueue_head(&s->wq); - } - } - - return (sal_sem_t) s; -} - -void -sal_sem_destroy(sal_sem_t b) -{ - sem_ctrl_t *s = (sem_ctrl_t *) b; - - if (s == NULL) { - return; - } - - /* - * the linux kernel does not have a sema_destroy(s) - */ - sal_free(s); -} - -int -sal_sem_take(sal_sem_t b, int usec) -{ - sem_ctrl_t *s = (sem_ctrl_t *) b; - int err; - - if (usec == sal_sem_FOREVER && !in_interrupt()) { - err = down_interruptible(&s->sem); - } else { - int time_wait = 1; - int cnt = s->cnt; - - for (;;) { - if (down_trylock(&s->sem) == 0) { - err = 0; - break; - } - - if (s->binary) { - - /* Wait for event or timeout */ - - if (time_wait > 1) { - err = 1; - break; - } - err = wait_event_interruptible_timeout(s->wq, cnt != s->cnt, - USEC_TO_JIFFIES(usec)); - if (err < 0) { - break; - } - time_wait++; - - } else { - - /* Retry algorithm with exponential backoff */ - - if (time_wait > usec) { - time_wait = usec; - } - - sal_usleep(time_wait); - - usec -= time_wait; - - if (usec == 0) { - err = ETIMEDOUT; - break; - } - - if ((time_wait *= 2) > 100000) { - time_wait = 100000; - } - } - } - } - return err ? -1 : 0; -} - -int -sal_sem_give(sal_sem_t b) -{ - sem_ctrl_t *s = (sem_ctrl_t *) b; - - up(&s->sem); - if (s->binary) { - s->cnt++; - wake_up_interruptible(&s->wq); - } - return 0; -} - -uint32 -sal_time_usecs(void) -{ -#if !defined(SAI_FIXUP) - struct timeval ltv; - do_gettimeofday(<v); - return (ltv.tv_sec * SECOND_USEC + ltv.tv_usec); -#else -#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,0) - /* ktime_to_us and ktime_get_real_ns return 64-bit integets, but this */ - /* function is returning a 32-bit integer. This should be fine until 2038. */ - return ktime_to_us(ktime_get_real_ns()); -#else - struct timeval ltv; - do_gettimeofday(<v); - return (ltv.tv_sec * SECOND_USEC + ltv.tv_usec); -#endif -#endif -} - -void -sal_usleep(uint32 usec) -{ - uint32 start_usec; - wait_queue_head_t queue; - - if (usec <= SECOND_USEC / HZ) { - start_usec = sal_time_usecs(); - do { - SAL_YIELD(current); - } while ((sal_time_usecs() - start_usec) < usec); - } else { - init_waitqueue_head(&queue); - WQ_SLEEP(queue, USEC_TO_JIFFIES(usec)); - } -} - -void -sal_udelay(uint32 usec) -{ - static volatile int _sal_udelay_counter; - static int loops = 0; - int ix, iy; - - if (loops == 0 || usec == 0) { /* Need calibration? */ - int max_loops; - int start = 0, stop = 0; - int mpt = USECS_PER_JIFFY; /* usec/tick */ - - for (loops = 1; loops < 0x1000 && stop == start; loops <<= 1) { - /* Wait for clock turn over */ - for (stop = start = jiffies; start == stop; start = jiffies) { - /* Empty */ - } - sal_udelay(mpt); /* Single recursion */ - stop = jiffies; - } - - max_loops = loops / 2; /* Loop above overshoots */ - - start = stop = 0; - - if (loops < 4) { - loops = 4; - } - - for (loops /= 4; loops < max_loops && stop == start; loops++) { - /* Wait for clock turn over */ - for (stop = start = jiffies; start == stop; start = jiffies) { - /* Empty */ - } - sal_udelay(mpt); /* Single recursion */ - stop = jiffies; - } - } - - for (iy = 0; iy < usec; iy++) { - for (ix = 0; ix < loops; ix++) { - _sal_udelay_counter++; /* Prevent optimizations */ - } - } -} diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile index fe1b6fd08cea..006acfad9893 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile @@ -1,33 +1,31 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.4 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # SDK :=$(shell if [ -n "$$SDK" ] ; then\ @@ -94,17 +92,28 @@ ifeq ($(DEST_DIR),) DEST_DIR=${BLDDIR} endif -KERNEL_BDE_LOCAL :=linux-kernel-bde.$(KOBJ) -KERNEL_BDE :=$(DEST_DIR)/$(KERNEL_BDE_LOCAL) +KERNEL_BDE_LOCAL := linux-kernel-bde.$(KOBJ) +KERNEL_BDE := $(DEST_DIR)/$(KERNEL_BDE_LOCAL) -USER_BDE_LOCAL :=linux-user-bde.$(KOBJ) -USER_BDE=$(DEST_DIR)/$(USER_BDE_LOCAL) +USER_BDE_LOCAL := linux-user-bde.$(KOBJ) +USER_BDE := $(DEST_DIR)/$(USER_BDE_LOCAL) KNET_CB_LOCAL := linux-knet-cb.$(KOBJ) KNET_CB := $(DEST_DIR)/$(KNET_CB_LOCAL) -BCM_KNET_LOCAL :=linux-bcm-knet.$(KOBJ) -BCM_KNET=$(DEST_DIR)/$(BCM_KNET_LOCAL) +export BUILD_BCM_GENL=1 +export BUILD_GENL_PACKET=0 +GENL_PACKET_LOCAL := genl-packet.$(KOBJ) +GENL_PACKET := $(DEST_DIR)/$(GENL_PACKET_LOCAL) +ifndef BUILD_GENL_PACKET +export BUILD_GENL_PACKET = 1 +endif + +BCM_GENL_LOCAL := linux-bcm-genl.$(KOBJ) +BCM_GENL := $(DEST_DIR)/$(BCM_GENL_LOCAL) + +BCM_KNET_LOCAL := linux-bcm-knet.$(KOBJ) +BCM_KNET := $(DEST_DIR)/$(BCM_KNET_LOCAL) ifeq (,$(findstring DELIVER,$(MAKECMDGOALS))) .DEFAULT_GOAL := all @@ -126,6 +135,7 @@ endif ifeq ($(BUILD_KNET),1) # Kernel network support all_targets += $(BCM_KNET) +knet_subdirs = bcm-knet ifeq ($(NO_LOCAL_TARGETS),) LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(BCM_KNET_LOCAL)) @@ -134,6 +144,7 @@ endif ifdef BUILD_KNET_CB all_targets += $(KNET_CB) +knet_subdirs += knet-cb ifeq ($(NO_LOCAL_TARGETS),) LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(KNET_CB_LOCAL)) @@ -141,8 +152,23 @@ all_targets +=$(LOCAL_TARGETS) endif endif -ifdef BUILD_PSAMPLE -ADD_TO_CFLAGS += -DPSAMPLE_SUPPORT +ifeq ($(BUILD_BCM_GENL),1) +ifeq ($(BUILD_GENL_PACKET),1) +all_targets += $(GENL_PACKET) +knet_subdirs += genl-packet + +ifeq ($(NO_LOCAL_TARGETS),) +LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(GENL_PACKET_LOCAL)) +all_targets +=$(LOCAL_TARGETS) +endif +endif +all_targets += $(BCM_GENL) +knet_subdirs += bcm-genl + +ifeq ($(NO_LOCAL_TARGETS),) +LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(BCM_GENL_LOCAL)) +all_targets +=$(LOCAL_TARGETS) +endif endif ADD_TO_CFLAGS += -I$(SDK)/systems/linux/kernel/modules/include @@ -158,42 +184,66 @@ $(1) : $(DEST_DIR)/$(notdir $(1)) endef endif +ifeq (1,$(USE_CLANG)) +OPT_KERNEL_TOOLCHAIN = CC=clang LD=ld.lld AR=llvm-ar +include $(SDK)/make/Make.clang +ADD_TO_KCFLAGS += $(CLANG_ADD_CFLAGS) +endif + # User BDE libraries ADD_TO_CFLAGS += -I$(SDK)/systems/bde/linux/include -# Use raw IOCTL for KNET -ADD_TO_CFLAGS += -DPROXY_SUPPORT=0 - CFLAGS += $(ADD_TO_CFLAGS) #SAI_FIXUP CFLAGS:=$(filter-out -fPIC, $(CFLAGS)) kernel_modules: - $(MAKE) -C $(SDK)/systems/bde/linux/kernel kernel_version=$(kernel_version) - $(MAKE) -C $(SDK)/systems/bde/linux/user/kernel kernel_version=$(kernel_version) + $(MAKE) -C $(SDK)/systems/bde/linux/kernel $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ + OPT_CFLAGS="$(ADD_TO_KCFLAGS)" + $(MAKE) -C $(SDK)/systems/bde/linux/user/kernel $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ + OPT_CFLAGS="$(ADD_TO_KCFLAGS)" ifeq ($(BUILD_KNET),1) - $(MAKE) -C $(SDK)/systems/linux/kernel/modules kernel_version=$(kernel_version) \ - subdirs="shared bcm-knet" override-target=linux-$(platform) CFLAGS="$(CFLAGS)" -ifdef BUILD_KNET_CB - $(MAKE) -C $(SDK)/systems/linux/kernel/modules kernel_version=$(kernel_version) \ - subdirs="knet-cb" override-target=linux-$(platform) CFLAGS="$(CFLAGS)" + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ + OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-knet $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ + OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) +ifneq (,$(filter knet-cb,$(knet_subdirs))) + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/knet-cb $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ + OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) +endif +ifneq (,$(filter bcm-genl,$(knet_subdirs))) +ifneq (,$(filter genl-packet,$(knet_subdirs))) + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/genl-packet $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ + OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) +endif + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-genl $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ + OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) endif endif -$(KERNEL_BDE): $(KERN_BLDROOT)/linux-kernel-bde.$(KOBJ) +$(KERNEL_BDE): $(KERN_BLDROOT)/$(KERNEL_BDE_LOCAL) mkdir -p $(@D) $(OBJCOPY) --strip-debug $< $@ -$(USER_BDE): $(KERN_BLDROOT)/linux-user-bde.$(KOBJ) +$(USER_BDE): $(KERN_BLDROOT)/$(USER_BDE_LOCAL) + $(OBJCOPY) --strip-debug $< $@ + +$(BCM_KNET): $(KERN_BLDROOT)/$(BCM_KNET_LOCAL) $(OBJCOPY) --strip-debug $< $@ -$(BCM_KNET): $(KERN_BLDROOT)/linux-bcm-knet.$(KOBJ) +$(KNET_CB): $(KERN_BLDROOT)/$(KNET_CB_LOCAL) $(OBJCOPY) --strip-debug $< $@ -$(KNET_CB): $(KERN_BLDROOT)/linux-knet-cb.$(KOBJ) +$(GENL_PACKET): $(KERN_BLDROOT)/$(GENL_PACKET_LOCAL) $(OBJCOPY) --strip-debug $< $@ +$(BCM_GENL): $(KERN_BLDROOT)/$(BCM_GENL_LOCAL) + $(OBJCOPY) --strip-debug $< $@ + +$(KERN_BLDROOT)/%.$(KOBJ): kernel_modules + @echo Force execution of kernel_modules target > /dev/null + ifeq ($(NO_LOCAL_TARGETS),) $(foreach targ,$(LOCAL_TARGETS),$(eval $(call LOCAL_TARGET_DEF,$(targ)))) endif @@ -202,14 +252,16 @@ clean:: $(MAKE) -C $(SDK)/systems/bde/linux/kernel $@ $(MAKE) -C $(SDK)/systems/bde/linux/user/kernel $@ $(MAKE) -C $(SDK)/systems/linux/kernel/modules \ - subdirs="shared bcm-knet knet-cb" \ + subdirs="shared $(knet_subdirs)" \ override-target=linux-$(platform) $@ $(RM) $(KERNEL_BDE) $(USER_BDE) - $(RM) $(BCM_KNET) $(KNET_CB) - $(RM) $(KERN_BLDROOT)/linux-kernel-bde.$(KOBJ) - $(RM) $(KERN_BLDROOT)/linux-user-bde.$(KOBJ) - $(RM) $(KERN_BLDROOT)/linux-bcm-knet.$(KOBJ) - $(RM) $(KERN_BLDROOT)/linux-knet-cb.$(KOBJ) + $(RM) $(BCM_KNET) $(KNET_CB) $(GENL_PACKET) $(BCM_GENL) + $(RM) $(KERN_BLDROOT)/$(KERNEL_BDE_LOCAL) + $(RM) $(KERN_BLDROOT)/$(USER_BDE_LOCAL) + $(RM) $(KERN_BLDROOT)/$(BCM_KNET_LOCAL) + $(RM) $(KERN_BLDROOT)/$(KNET_CB_LOCAL) + $(RM) $(KERN_BLDROOT)/$(GENL_PACKET_LOCAL) + $(RM) $(KERN_BLDROOT)/$(BCM_GENL_LOCAL) $(RM) $(LOCAL_TARGETS) distclean:: clean diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile index 921ce62ebaf0..01dd4e4e6f8d 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile @@ -1,33 +1,31 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 0.1 Broadcom SDK $ -# $Copyright: (c) 2015 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # # This make job requires the following environment variables to be set: diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile index b874340ddec2..5eeee4fe03d2 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile @@ -1,33 +1,31 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.7 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # # This make job requires the following environment variables to be set: diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile index 2b724be3202f..26c0ffbe0ea1 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile @@ -1,33 +1,31 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.7 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # # This make job requires the following environment variables to be set: diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile index 7f2c7bc6e247..39353225bda8 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile @@ -1,33 +1,31 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.7 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # # This make job requires the following environment variables to be set: @@ -55,7 +53,7 @@ endif export SDK -override kernel_version=5_4 +override kernel_version=5_10 platform=iproc IPROC_BUILD=1 diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile index 3f0a819d86f0..c33e0825afdf 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile @@ -1,33 +1,31 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.7 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # # This make job requires the following environment variables to be set: @@ -55,7 +53,7 @@ endif export SDK -override kernel_version=5_4 +override kernel_version=5_10 platform=iproc_64 IPROC_BUILD=1 diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile index 6ef360156572..d354882a81df 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile @@ -1,33 +1,31 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 0.1 Broadcom SDK $ -# $Copyright: (c) 2015 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # # This make job requires the following environment variables to be set: diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/x86-5_10/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/x86-5_10/Makefile new file mode 100644 index 000000000000..ce4f94c424a2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/user/x86-5_10/Makefile @@ -0,0 +1,82 @@ +# -*- Makefile -*- +# $Id: Makefile,v 0.1 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# TOOLS_DIR - path to build tools (if not in PATH already) +# CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +# SHARED_LIBRARY_SUPPORT will enable the shared library creation - update the BINUTILSVER version. +ifneq ($(filter $(SHARED_LIBRARY_SUPPORT) $(COMPILE_OPENNSA_SUPPORT),1),) +# Newer GNU BINUTILS are neeed in order to avoid a known internal bug +# in GCC that results in a linker error when creating a .so library +export BINUTILSVER = 2.27 +endif + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=5_10 +platform=x86-5_10 + +LINUX_MAKE_USER=1 +export LINKER_RELAX = 1 + +# SHARED_LIBRARY_SUPPORT will enable the shared library creation - add a PIC to the compilation flags. +ifneq ($(filter $(SHARED_LIBRARY_SUPPORT) $(COMPILE_OPENNSA_SUPPORT),1),) +ADD_TO_CFLAGS = -frecord-gcc-switches -DSAL_THREAD_STACK_MIN=8388608 +export ADD_TO_CFLAGS +endif + +include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/x86-64-fc28/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/x86-64-fc28/Makefile new file mode 100644 index 000000000000..1165fedce9a6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/user/x86-64-fc28/Makefile @@ -0,0 +1,86 @@ +# -*- Makefile -*- +# $Id: Makefile,v 0.1 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# TOOLS_DIR - path to build tools (if not in PATH already) +# CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +# SHARED_LIBRARY_SUPPORT will enable the shared library creation - update the BINUTILSVER version. +ifneq ($(filter $(SHARED_LIBRARY_SUPPORT) $(COMPILE_OPENNSA_SUPPORT),1),) +# Newer GNU BINUTILS are neeed in order to avoid a known internal bug +# in GCC that results in a linker error when creating a .so library +export BINUTILSVER = 2.27 +endif + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +ifeq (1,$(KERNEL_5_10)) +override kernel_version=5_10 +else +override kernel_version=4_18 +endif +platform=x86-64-fc28 + +LINUX_MAKE_USER=1 +export LINKER_RELAX = 1 + +# SHARED_LIBRARY_SUPPORT will enable the shared library creation - add a PIC to the compilation flags. +ifneq ($(filter $(SHARED_LIBRARY_SUPPORT) $(COMPILE_OPENNSA_SUPPORT),1),) +ADD_TO_CFLAGS = -frecord-gcc-switches -DSAL_THREAD_STACK_MIN=8388608 +export ADD_TO_CFLAGS +endif + +include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile index 78c2c0cb1702..8fdbb9042ca3 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile @@ -1,33 +1,31 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.2 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# SDK :=$(shell if [ -n "$$SDK" ] ; then\ echo $$SDK;\ diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile index a5b0dadf8e6e..bd572a15b4dc 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile @@ -1,33 +1,31 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 0.1 Broadcom SDK $ -# $Copyright: (c) 2015 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# # # This make job requires the following environment variables to be set: diff --git a/platform/broadcom/saibcm-modules/tools/mktool.pl b/platform/broadcom/saibcm-modules/tools/mktool.pl index 518ab25535c3..5173e0ced5f2 100644 --- a/platform/broadcom/saibcm-modules/tools/mktool.pl +++ b/platform/broadcom/saibcm-modules/tools/mktool.pl @@ -1,36 +1,34 @@ # -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# -# # mktool.pl # # $Id: mktool.pl,v 1.5 Broadcom SDK $ # -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved. $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# use File::Path; use File::Find; diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control b/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control index c02a84f9f75a..5ead58f70dda 100644 --- a/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control @@ -7,20 +7,20 @@ Standards-Version: 3.9.3 Package: sonic-platform-alphanetworks-snh60a0-320fv2 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: sonic-platform-alphanetworks-snh60b0-640f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: sonic-platform-alphanetworks-snj60d0-320f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: sonic-platform-alphanetworks-bes2348t Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista index af03fbd9f672..ed942d617ddd 160000 --- a/platform/broadcom/sonic-platform-modules-arista +++ b/platform/broadcom/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit af03fbd9f67260ba764c833aaaa65b2ff07762d7 +Subproject commit ed942d617ddde8e63b5190ad3a7d8171c1dbde9a diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan.py deleted file mode 100644 index 5ece7e980980..000000000000 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan.py +++ /dev/null @@ -1,93 +0,0 @@ -try: - from sonic_platform_pddf_base.pddf_fan import PddfFan - import subprocess -except ImportError as e: - raise ImportError(str(e) + "- required module not found") -# ------------------------------------------------------------------ -# HISTORY: -# 5/1/2022 (A.D.) -# add function:set_status_led, -# Solve the problem that when a fan is pulled out, the Fan LED on the front panel is still green Issue-#11525 -# ------------------------------------------------------------------ - - -class Fan(PddfFan): - """PDDF Platform-Specific Fan class""" - - def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): - # idx is 0-based - PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) - - - def get_speed_tolerance(self): - """ - Retrieves the speed tolerance of the fan - - Returns: - An integer, the percentage of variance from target speed which is - considered tolerable - """ - # Fix the speed vairance to 10 percent. If it changes based on platforms, overwrite - # this value in derived pddf fan class - return 20 - - def get_presence(self): - if self.is_psu_fan: - #For PSU, FAN must be present when PSU is present - try: - cmd = ['i2cget', '-y', '-f', '0x2', '0x32', '0x41'] - p = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True) - data = p.communicate() - status = int(data[0].strip(), 16) - if (self.fans_psu_index == 1 and (status & 0x10) == 0) or \ - (self.fans_psu_index == 2 and (status & 0x20) == 0): - return True - except (IOError, ValueError): - pass - - return False - else: - #Overwirte the PDDF Common since the FANs on Belgite are all Fixed and present - return True - - def get_direction(self): - """ - Retrieves the direction of fan - - Returns: - A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST - depending on fan direction - """ - if self.is_psu_fan: - # Belgite PSU module only has EXHAUST fan - return "EXHAUST" - else: - return super().get_direction() - - def get_status_led(self): - """ - Gets the state of the fan status LED - - Returns: - A string, one of the predefined STATUS_LED_COLOR_* strings above - """ - if self.is_psu_fan: - return "N/A" - else: - return super().get_status_led() - - def set_status_led(self, color): - """ - Sets the state of the fan module status LED - - Args: - color: A string representing the color with which to set the - fan module status LED - - Returns: - bool: True if status LED state is set successfully, False if not - """ - if self.is_psu_fan: - return False - else: - return super().set_status_led(color) diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/sfp.py deleted file mode 100644 index a216a37afcf8..000000000000 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/sfp.py +++ /dev/null @@ -1,15 +0,0 @@ -try: - from sonic_platform_pddf_base.pddf_sfp import PddfSfp -except ImportError as e: - raise ImportError (str(e) + "- required module not found") - - -class Sfp(PddfSfp): - """ - PDDF Platform-Specific Sfp class - """ - - def __init__(self, index, pddf_data=None, pddf_plugin_data=None): - PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) - - # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/thermal.py deleted file mode 100644 index 7dd294fb8475..000000000000 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/thermal.py +++ /dev/null @@ -1,111 +0,0 @@ -try: - from sonic_platform_pddf_base.pddf_thermal import PddfThermal -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - - - -class Thermal(PddfThermal): - """PDDF Platform-Specific Thermal class""" - - def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): - PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) - self.minimum_thermal = self.get_temperature() - self.maximum_thermal = self.get_temperature() - # Provide the functions/variables below for which implementation is to be overwritten - - def get_low_critical_threshold(self): - """ - Retrieves the low critical threshold temperature of thermal - Returns: - A float number, the low critical threshold temperature of thermal in Celsius - up to nearest thousandth of one degree Celsius, e.g. 30.125 - """ - return 0.001 - - def get_high_critical_threshold(self): - """ - Retrieves the high critical threshold temperature of thermal - Returns: - A float number, the high critical threshold temperature of thermal in Celsius - up to nearest thousandth of one degree Celsius, e.g. 30.125 - """ - - return 100.000 - - def get_minimum_recorded(self): - """ - Retrieves the minimum recorded temperature of thermal - Returns: - A float number, the minimum recorded temperature of thermal in Celsius - up to nearest thousandth of one degree Celsius, e.g. 30.125 - """ - tmp = self.get_temperature() - if tmp < self.minimum_thermal: - self.minimum_thermal = tmp - - return self.minimum_thermal - - def get_maximum_recorded(self): - """ - Retrieves the maximum recorded temperature of thermal - Returns: - A float number, the maximum recorded temperature of thermal in Celsius - up to nearest thousandth of one degree Celsius, e.g. 30.125 - """ - tmp = self.get_temperature() - if tmp > self.maximum_thermal: - self.maximum_thermal = tmp - - return self.maximum_thermal - - def get_presence(self): - """ - Retrieves the presence of the PSU - Returns: - bool: True if Thermal is present, False if not - """ - return True - - def get_model(self): - """ - Retrieves the model number (or part number) of the device - Returns: - string: Model/part number of device - """ - return "N/A" - - def get_serial(self): - """ - Retrieves the serial number of the device - Returns: - string: Serial number of device - """ - return "N/A" - - def get_status(self): - """ - Retrieves the operational status of the device - Returns: - A boolean value, True if device is operating properly, False if not - """ - if not self.get_presence(): - return False - - return True - - def is_replaceable(self): - """ - Retrieves whether thermal module is replaceable - Returns: - A boolean value, True if replaceable, False if not - """ - return False - - def get_position_in_parent(self): - """ - Retrieves the thermal position information - Returns: - A int value, 0 represent ASIC thermal, 1 represent CPU thermal info - """ - return 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_post_device_create.sh deleted file mode 100755 index 436cf61d6dbe..000000000000 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_post_device_create.sh +++ /dev/null @@ -1,13 +0,0 @@ -#!/bin/bash -# Set U60 shutdown threhold 80 -sudo i2cset -y -f 6 0x49 0x3 0x4e 0x00 i -sleep 0.1 -sudo i2cset -y -f 6 0x49 0x1 0x2 -sleep 0.1 -#Set LM75 shutdown enable -sudo i2cset -y -f 2 0x32 0x45 0x1 - -# set sys led green status -sudo i2cset -y -f 2 0x32 0x43 0xec - -echo -2 | tee /sys/bus/i2c/drivers/pca954x/*-00*/idle_state diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/utils/belgite_pddf_monitor.py b/platform/broadcom/sonic-platform-modules-cel/belgite/utils/belgite_pddf_monitor.py deleted file mode 100755 index 5ce0469a0ddf..000000000000 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/utils/belgite_pddf_monitor.py +++ /dev/null @@ -1,272 +0,0 @@ -#!/usr/bin/env python3 -# -# Copyright (C) Celestica Technology Corporation -# -# This program is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . - -# ------------------------------------------------------------------ -# HISTORY: -# 9/16/2021 (A.D.) -# ------------------------------------------------------------------ - -try: - import sys - import getopt - import logging - import logging.config - import time # this is only being used as part of the example - import signal - import math - from sonic_platform import platform - from sonic_py_common.general import getstatusoutput_noshell -except ImportError as e: - raise ImportError('%s - required module not found' % str(e)) - -# Deafults -FUNCTION_NAME = 'cel_belgite_monitor' -DUTY_MAX = 100 -FAN_NUMBER = 3 -SENSOR_NUMBER = 4 -CPU_CORE_TEMP = r"/sys/devices/platform/coretemp.0/hwmon/hwmon1/temp1_input" - - -class cel_belgite_monitor(object): - """ - Make a class we can use to capture stdout and sterr in the log - """ - # static temp var - _ori_temp = 0 - _new_perc = DUTY_MAX / 2 - syslog = logging.getLogger("[" + FUNCTION_NAME + "]") - init_fan_temperature = [0, 0, 0, 0] - - def __init__(self, log_file, log_level): - """Needs a logger and a logger level.""" - formatter = logging.Formatter('%(name)s %(message)s') - sys_handler = logging.handlers.SysLogHandler(address='/dev/log') - sys_handler.setFormatter(formatter) - sys_handler.ident = 'common' - self.syslog.setLevel(logging.WARNING) - self.syslog.addHandler(sys_handler) - self.platform_chassis_obj = platform.Platform().get_chassis() - # set up logging to file - logging.basicConfig( - filename=log_file, - filemode='w', - level=log_level, - format='[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', - datefmt='%H:%M:%S' - ) - - # set up logging to console - if log_level == logging.DEBUG: - console = logging.StreamHandler() - console.setLevel(log_level) - formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') - console.setFormatter(formatter) - logging.getLogger('').addHandler(console) - logging.debug('SET. logfile:%s / loglevel:%d' % (log_file, log_level)) - - def get_all_temperature(self): - """ - return: all temperature - """ - all_temperature_list = list() - for sensor_index in range(SENSOR_NUMBER): - temp = self.platform_chassis_obj.get_thermal(sensor_index).get_temperature() - if temp is None or str(temp).strip() == "": - return False - temp = temp*1000 - all_temperature_list.append(temp) - u4_temperature = all_temperature_list[0] - u7_temperature = all_temperature_list[1] - # default CPU temperature 70 - cpu_temperature = 70000 - try: - with open(CPU_CORE_TEMP, "r") as f: - cpu_temperature = float(f.read().strip()) - except Exception as E: - logging.debug('Error: %s' % E) - u60_temperature = all_temperature_list[3] - return [u4_temperature, u7_temperature, cpu_temperature, u60_temperature] - - def get_fan_speed_by_temperature(self, temp_list): - fan1_direction = self.platform_chassis_obj.get_fan(0).get_direction() - logging.debug('INFO: fan direction: %s' % str(fan1_direction)) - all_temp = self.get_all_temperature() - logging.debug('INFO: all_temp: %s' % str(all_temp)) - # B2F=intake: U7 temperature， F2B-EXHAUST: U4 temperature - a = 1 if fan1_direction.lower() == "intake" else 0 - sensor_temp = all_temp[a] - cup_temp = all_temp[2] - u60_temp = all_temp[3] - logging.debug('sensor_temp:%d cup_temp:%d u60_temp:%d' % (sensor_temp, cup_temp, u60_temp)) - update_temp_sensor, update_temp_cpu, update_temp_u60 = True, True, True - if all_temp[a] - temp_list[a] < 0: - update_temp_sensor = False - if cup_temp - temp_list[2] < 0: - update_temp_cpu = False - if u60_temp - temp_list[3] < 0: - update_temp_u60 = False - - # U4 U7 - if not update_temp_sensor: # temperature down - b = math.trunc(1400/13) - if sensor_temp <= 32000: - sensor_temp_speed = 40 - elif sensor_temp >= 45000: - sensor_temp_speed = 100 - else: - sensor_temp_speed = int(math.trunc(60 / 13) * math.trunc(sensor_temp / 1000) - b) - else: # temperature up - b = math.trunc(1580 / 13) - if sensor_temp <= 35000: - sensor_temp_speed = 40 - elif sensor_temp >= 48000: - sensor_temp_speed = 100 - else: - sensor_temp_speed = int(math.trunc(60/13) * math.trunc(sensor_temp/1000) - b) - - # CPU - if not update_temp_cpu: # temperature down - b = 228 - if cup_temp <= 67000: - cpu_temp_speed = 40 - elif cup_temp >= 82000: - cpu_temp_speed = 100 - else: - cpu_temp_speed = int(4 * (cup_temp / 1000) - b) - else: # temperature up - b = 240 - if cup_temp <= 70000: - cpu_temp_speed = 40 - elif cup_temp >= 85000: - cpu_temp_speed = 100 - else: - cpu_temp_speed = int(4 * (cup_temp / 1000) - b) - - # U60 - if not update_temp_u60: # temperature down - b = 168 - if u60_temp <= 52000: - u60_temp_speed = 40 - elif u60_temp >= 67000: - u60_temp_speed = 100 - else: - u60_temp_speed = int(4 * (u60_temp / 1000) - b) - else: # temperature up - b = 180 - if u60_temp <= 55000: - u60_temp_speed = 40 - elif u60_temp >= 70000: - u60_temp_speed = 100 - else: - u60_temp_speed = int(4 * (u60_temp / 1000) - b) - return max([sensor_temp_speed, cpu_temp_speed, u60_temp_speed]) - - def manage_fans(self): - fan_presence_list = [True, True, True] # whether fan is absent or not - for fan_index in range(FAN_NUMBER): - if not self.platform_chassis_obj.get_fan(fan_index).get_presence() or not \ - self.platform_chassis_obj.get_fan(fan_index).get_status(): - fan_presence_list[fan_index] = False - logging.debug('self.platform_chassis_obj.get_fan(fan_index).get_presence():%s' - % str(self.platform_chassis_obj.get_fan(fan_index).get_presence())) - logging.debug('self.platform_chassis_obj.get_fan(fan_index).get_status():%s' - % str(self.platform_chassis_obj.get_fan(fan_index).get_status())) - else: - fan_presence_list[fan_index] = True - - fans_inserted_num = FAN_NUMBER - fan_presence_list.count(False) - if fans_inserted_num == 0: # all fans broken, power off - self.syslog.critical("No fans inserted. Severe overheating hazard. " - "Please insert Fans immediately or power off the device\n") - - # power off - elif fans_inserted_num in [1, 2]: # 1 or 2 present, full speed - self._new_perc = DUTY_MAX - else: # 3 fans normal, manage the fans follow thermal policy - self._new_perc = self.get_fan_speed_by_temperature(self.init_fan_temperature) - logging.debug('INFO: 3 fans inserted: self._new_perc: %s' % str(self._new_perc)) - self.init_fan_temperature = self.get_all_temperature() - - for i in range(FAN_NUMBER): - aa = self.platform_chassis_obj.get_fan(i).get_speed() - logging.debug("INFO: Get before setting fan speed: %s" % aa) - if self._new_perc < 40: - self._new_perc = 40 - if self._new_perc > 100: - self._new_perc = 100 - set_stat = self.platform_chassis_obj.get_fan(i).set_speed(self._new_perc) - if set_stat is True: - logging.debug('INFO: PASS. set_fan%d_duty_cycle (%d)' % (i, self._new_perc)) - else: - logging.debug('INFO: FAIL. set_fan%d_duty_cycle (%d)' % (i, self._new_perc)) - - -def handler(signum, frame): - platform_chassis = platform.Platform().get_chassis() - for _ in range(FAN_NUMBER): - set_stat = platform_chassis.get_fan(_).set_speed(DUTY_MAX) - if set_stat is True: - logging.debug('INFO:Cause signal %d, set fan speed max.' % signum) - else: - logging.debug('INFO: FAIL. set_fan_duty_cycle (%d)' % DUTY_MAX) - # Enable the CPLD Heartbeat back - status, output = getstatusoutput_noshell(["i2cset", "-f", "-y", "75", "0x40", "0x22", "0x00"]) - if status == 0: - logging.debug('INFO: CPLD Heartbeat check is enabled back') - sys.exit(0) - - -def main(argv): - global test_temp - - log_file = '/home/admin/%s.log' % FUNCTION_NAME - log_level = logging.INFO - if len(sys.argv) != 1: - try: - opts, args = getopt.getopt(argv, 'hdlt:', ['lfile=']) - except getopt.GetoptError: - print('Usage: %s [-d] [-l ]' % sys.argv[0]) - return 0 - for opt, arg in opts: - if opt == '-h': - print('Usage: %s [-d] [-l ]' % sys.argv[0]) - return 0 - elif opt in ('-d', '--debug'): - log_level = logging.DEBUG - elif opt in ('-l', '--lfile'): - log_file = arg - - if sys.argv[1] == '-t': - if len(sys.argv) != 6: - print("temp test, need input 4 temp") - return 0 - - signal.signal(signal.SIGINT, handler) - signal.signal(signal.SIGTERM, handler) - # Disaable the CPLD Heartbeat check to control Fan speed from CPU via ADT7470 - getstatusoutput_noshell(['i2cset', '-f', '-y', '2', '0x32', '0x30', '0x01']) - - monitor = cel_belgite_monitor(log_file, log_level) - - # Loop forever, doing something useful hopefully: - while True: - monitor.manage_fans() - time.sleep(10) - - -if __name__ == '__main__': - main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/changelog b/platform/broadcom/sonic-platform-modules-cel/debian/changelog index aa89b4df6329..42f4d07630e7 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/changelog +++ b/platform/broadcom/sonic-platform-modules-cel/debian/changelog @@ -1,3 +1,12 @@ +sonic-cel-platform-modules (1.0) unstable; urgency=low + + * Add questone2 platform module. + * V2 platforms DS4000, DS3000, DS2000 + * Rename Belgite to DS1000 + * Hardened platform bug fixes + + -- Jemston Fernando Wed, 12 Jun 2024 15:00:00 +0530 + sonic-cel-platform-modules (0.9) unstable; urgency=low * Add haliburton platform module. diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/control b/platform/broadcom/sonic-platform-modules-cel/debian/control index 0dd6eb76e00e..41e8eefd8cf2 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/control +++ b/platform/broadcom/sonic-platform-modules-cel/debian/control @@ -7,26 +7,46 @@ Standards-Version: 3.9.3 Package: platform-modules-dx010 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-haliburton Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-seastone2 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as led, sfp Package: platform-modules-silverstone Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as led, sfp. -Package: platform-modules-belgite +Package: platform-modules-ds1000 +Architecture: amd64 +Depends: linux-image-6.1.0-11-2-amd64-unsigned +Description: kernel modules for platform devices such as led, sfp + +Package: platform-modules-questone2 Architecture: amd64 Depends: linux-image-6.1.0-11-2-amd64-unsigned Description: kernel modules for platform devices such as led, sfp + +Package: platform-modules-ds3000 +Architecture: amd64 +Depends: linux-image-6.1.0-11-2-amd64-unsigned +Description: kernel modules for platform devices such as led, sfp + +Package: platform-modules-silverstone-v2 +Architecture: amd64 +Depends: linux-image-6.1.0-11-2-amd64-unsigned +Description: kernel modules for platform devices such as led, sfp + +Package: platform-modules-ds2000 +Architecture: amd64 +Depends: linux-image-6.1.0-22-2-amd64-unsigned +Description: kernel modules for platform devices such as led, sfp diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.install deleted file mode 100644 index 6f9f8f267ed9..000000000000 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.install +++ /dev/null @@ -1,7 +0,0 @@ -belgite/systemd/pddf-platform-init.service etc/systemd/system -belgite/service/belgite-pddf-platform-monitor.service lib/systemd/system -belgite/scripts/pddf_pre_driver_install.sh usr/local/bin -belgite/scripts/pddf_post_device_create.sh usr/local/bin -belgite/utils/belgite_pddf_monitor.py usr/local/bin -belgite/pddf/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_belgite-r0/pddf -services/platform_api/platform_api_mgnt.sh usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.install new file mode 100644 index 000000000000..24a75dfe8240 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.install @@ -0,0 +1,8 @@ +ds1000/systemd/pddf-platform-init.service etc/systemd/system +ds1000/service/ds1000-fan-control.service lib/systemd/system +ds1000/scripts/pddf_pre_driver_install.sh usr/local/bin +ds1000/scripts/pddf_post_device_create.sh usr/local/bin +ds1000/scripts/ds1000_platform_shutdown.sh usr/local/bin +ds1000/utils/ds1000_fanctld.py usr/local/bin +ds1000/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_ds1000-r0/pddf +services/platform_api/platform_api_mgnt.sh usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.postinst similarity index 56% rename from platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.postinst rename to platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.postinst index 4abd671baec9..1b038ebcc32a 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.postinst +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.postinst @@ -1,6 +1,6 @@ depmod -a /usr/local/bin/platform_api_mgnt.sh install systemctl enable pddf-platform-init.service +systemctl enable ds1000-fan-control.service systemctl start pddf-platform-init.service -systemctl enable belgite-pddf-platform-monitor.service -systemctl start belgite-pddf-platform-monitor.service +systemctl start ds1000-fan-control.service diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.install new file mode 100644 index 000000000000..e7a40d21a66f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.install @@ -0,0 +1,12 @@ +ds2000/scripts/ds2000_platform_shutdown.sh usr/local/bin +ds2000/scripts/pddf_pre_driver_install.sh usr/local/bin +ds2000/scripts/pddf_post_device_create.sh usr/local/bin +ds2000/scripts/pre_pddf_init.sh usr/local/bin +ds2000/scripts/sensors usr/bin +ds2000/scripts/platform_sensors.py usr/local/bin +ds2000/systemd/pddf-platform-init.service etc/systemd/system +ds2000/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_ds2000-r0/pddf +ds2000/scripts/pddf_pre_driver_install.sh usr/local/bin +ds2000/systemd/ds2000-pddf-platform-monitor.service lib/systemd/system +ds2000/utils/pddf_fan_control_sensor_refresh.py usr/local/bin +ds2000/utils/FanControl usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.postinst new file mode 100644 index 000000000000..b517026a66a6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.postinst @@ -0,0 +1,7 @@ +depmod -a + +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service + +systemctl enable ds2000-pddf-platform-monitor.service +systemctl start ds2000-pddf-platform-monitor.service diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.install new file mode 100644 index 000000000000..1ea62240a8b0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.install @@ -0,0 +1,11 @@ +ds3000/systemd/pddf-platform-init.service etc/systemd/system +ds3000/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_ds3000-r0/pddf +ds3000/scripts/pre_pddf_init.sh usr/local/bin +ds3000/scripts/sensors usr/bin +ds3000/scripts/platform_sensors.py usr/local/bin +ds3000/scripts/ds3000_platform_shutdown.sh usr/local/bin +ds3000/scripts/pddf_pre_driver_install.sh usr/local/bin +ds3000/scripts/pddf_post_device_create.sh usr/local/bin +ds3000/utils/afulnx_64 usr/local/bin +ds3000/utils/fpga_prog usr/local/bin +ds3000/utils/ispvm usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.postinst new file mode 100644 index 000000000000..f8b021b6248a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.postinst @@ -0,0 +1,4 @@ +depmod -a + +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init index fab61467da72..6e643e524d51 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init @@ -40,8 +40,14 @@ fi case "$1" in start) echo -n "Setting up board... " - + modprobe i2c-i801 + modprobe i2c-isch + modprobe i2c-ismt modprobe i2c-dev + modprobe i2c-mux + modprobe i2c-smbus + modprobe i2c-mux-gpio + modprobe i2c-mux-pca954x force-deselect-on-exit=1 modprobe dx010_wdt modprobe leds-dx010 diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init index aff8503d7543..9a5bcdac4776 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init @@ -35,6 +35,15 @@ case "$1" in start) echo -n "Setting up board... " + modprobe i2c-i801 + modprobe i2c-isch + modprobe i2c-ismt + modprobe i2c-dev + modprobe i2c-mux + modprobe i2c-smbus + modprobe i2c-mux-gpio + modprobe i2c-mux-pca954x + modprobe smc modprobe hlx_gpio_ich modprobe dps200 diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.init new file mode 100644 index 000000000000..a32be9dd97d8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.init @@ -0,0 +1,97 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: $portmap +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup questone2 board. +### END INIT INFO + + +case "$1" in +start) + echo -n "Setting up board... " + + # Loads kernel modules + modprobe i2c-ismt + modprobe i2c-i801 + modprobe i2c-isch + modprobe i2c-dev + modprobe i2c-mux + modprobe i2c-smbus + modprobe i2c-mux-gpio + modprobe i2c-mux-pca954x + modprobe 8021q + + modprobe questone2_baseboard_cpld + modprobe questone2_switchboard + modprobe mc24lc64t + modprobe optoe + modprobe sff_8436_eeprom + + # Add driver to support TLV - EEPROM + for devnum in 0 1; do + devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` + if [[ $devname == 'SMBus iSMT adapter at '* ]]; then + echo 24lc64t 0x56 > /sys/bus/i2c/devices/i2c-${devnum}/new_device + echo -n "/sys/bus/i2c/devices/i2c-${devnum}" > /tmp/eeprom_path.txt + break + fi + done + + # One platform support two hwskus, auto select the correct hwsku + # If label is not either Questone-II or Questone-IIA, then Questone-IIA is used by default + hwsku_file="/usr/share/sonic/device/x86_64-cel_questone_2-r0/default_sku" + if [ ! -f $hwsku_file ]; then + platform_path="/usr/share/sonic/device/x86_64-cel_questone_2-r0" + + sleep 1 # Wait for EEPROM driver initialization + hwsku=$(decode-syseeprom | grep "Label" | awk '{print $5}') + + cd ${platform_path} + if [ x$hwsku = x"Questone-II" ];then + echo "Questone_2 t1" > $hwsku_file + ln -sf ./Questone_2/platform.json platform.json + ln -sf ./Questone_2/platform_components.json platform_components.json + ln -sf ./Questone_2/custom_led.bin custom_led.bin + else + echo "Questone_2A t1" > $hwsku_file + ln -sf ./Questone_2A/platform.json platform.json + ln -sf ./Questone_2A/platform_components.json platform_components.json + ln -sf ./Questone_2A/custom_led.bin custom_led.bin + fi + fi + + # SONiC LED control policy + ipmitool raw 0x3a 0x0f 0x02 0x00 + # Set status led to green blinking 1Hz to indicate NOS take control + ipmitool raw 0x3a 0x0a 0x00 0x06 + # Set Alarm LED off + ipmitool raw 0x3a 0x0c 0x00 0x03 0x63 0x00 + # PSU and FAN LED are in default controlled by CPLD + + echo "done." + ;; + +stop) + if [ -f /tmp/eeprom_path.txt ]; then + echo 0x56 > `cat /tmp/eeprom_path.txt`/delete_device + fi + echo "done." + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-questone2 {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.install new file mode 100644 index 000000000000..b08bfe00d4c6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.install @@ -0,0 +1,9 @@ +questone2/cfg/questone2-modules.conf etc/modules-load.d +questone2/cfg/questone2-modprobe.conf etc/modprobe.d +questone2/systemd/platform-modules-questone2.service lib/systemd/system +questone2/cfg/pid_config_questone2.ini usr/local/etc +questone2/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_questone_2-r0 +questone2/scripts/questone2_platform_shutdown.sh usr/local/bin +questone2/scripts/sensors usr/bin +questone2/scripts/platform_sensors.py usr/local/bin +services/platform_api/platform_api_mgnt.sh usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.postinst new file mode 100644 index 000000000000..7a7371851fd0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.postinst @@ -0,0 +1,6 @@ +depmod -a + +/usr/local/bin/platform_api_mgnt.sh install + +systemctl enable platform-modules-questone2.service +systemctl start platform-modules-questone2.service diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.init index 977cdac06000..75edea4c0066 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.init +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.init @@ -16,6 +16,16 @@ start) echo -n "Setting up board... " # Add driver to support HW + modprobe i2c-ismt + modprobe i2c-i801 + modprobe i2c-isch + modprobe i2c-mux + modprobe i2c-smbus + modprobe i2c-mux-gpio + modprobe i2c-mux-pca954x + modprobe ipmi_devintf + modprobe ipmi_si + modprobe i2c-dev modprobe ipmi_devintf modprobe ipmi_si @@ -28,14 +38,27 @@ start) devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` if [[ $devname == 'SMBus iSMT adapter at '* ]]; then echo 24lc64t 0x56 > /sys/bus/i2c/devices/i2c-${devnum}/new_device - break + echo -n "/sys/bus/i2c/devices/i2c-${devnum}" > /tmp/eeprom_path.txt + break fi done + sleep 1 + # SONiC LED control policy + ipmitool raw 0x3a 0x0f 0x02 0x00 + # Set status led to green blinking 1Hz to indicate NOS take control + ipmitool raw 0x3a 0x0a 0x00 0x06 + # Set Alarm LED off + ipmitool raw 0x3a 0x0c 0x00 0x03 0x63 0x00 + # PSU is in default controlled by CPLD + echo "done." ;; stop) + if [ -f /tmp/eeprom_path.txt ]; then + echo 0x56 > `cat /tmp/eeprom_path.txt`/delete_device + fi echo "done." ;; diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.install index 31fc4fd3bd6d..08923fedaf6a 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.install +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.install @@ -1,4 +1,7 @@ seastone2/cfg/seastone2-modules.conf etc/modules-load.d seastone2/systemd/platform-modules-seastone2.service lib/systemd/system seastone2/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_seastone_2-r0 +seastone2/scripts/seastone2_platform_shutdown.sh usr/local/bin +seastone2/scripts/sensors usr/bin +seastone2/scripts/platform_sensors.py usr/local/bin services/platform_api/platform_api_mgnt.sh usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.postinst index f232a2cac59d..fc5257b98494 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.postinst +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.postinst @@ -1,5 +1,6 @@ depmod -a -systemctl enable platform-modules-seastone2.service -systemctl start platform-modules-seastone2.service /usr/local/bin/platform_api_mgnt.sh install + +systemctl enable platform-modules-seastone2.service +systemctl start platform-modules-seastone2.service diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.install new file mode 100644 index 000000000000..15e497039647 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.install @@ -0,0 +1,13 @@ +silverstone-v2/systemd/pddf-platform-init.service etc/systemd/system +silverstone-v2/service/silverstone-v2-pddf-platform-monitor.service lib/systemd/system +silverstone-v2/scripts/silverstone_v2_platform_shutdown.sh usr/local/bin +silverstone-v2/scripts/pddf_pre_driver_install.sh usr/local/bin +silverstone-v2/scripts/pddf_post_device_create.sh usr/local/bin +silverstone-v2/scripts/pre_pddf_init.py usr/local/bin +silverstone-v2/scripts/sensors usr/bin +silverstone-v2/scripts/platform_sensors.py usr/local/bin +silverstone-v2/utils/pddf_fan_control_sensor_refresh.py usr/local/bin +silverstone-v2/utils/pddf_sensor_list_refresh.py usr/local/bin +silverstone-v2/utils/FanControl usr/local/bin +silverstone-v2/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_silverstone_v2-r0/pddf +services/platform_api/platform_api_mgnt.sh usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.postinst new file mode 100644 index 000000000000..aa8cac74fd80 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.postinst @@ -0,0 +1,6 @@ +depmod -a +/usr/local/bin/platform_api_mgnt.sh install +systemctl enable silverstone-v2-pddf-platform-monitor.service +systemctl start silverstone-v2-pddf-platform-monitor.service +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.init index eb003599ec61..38895aff2b3b 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.init +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.init @@ -11,30 +11,105 @@ # Short-Description: Setup SilverStone board. ### END INIT INFO - case "$1" in start) echo -n "Setting up board... " + modprobe i2c-i801 + modprobe i2c-isch + modprobe i2c-ismt + modprobe i2c-mux + modprobe i2c-smbus + modprobe coretemp + modprobe ipmi_devintf + modprobe ipmi_si + modprobe i2c-dev - modprobe baseboard-lpc - modprobe switchboard - modprobe mc24lc64t modprobe ipmi_devintf + modprobe baseboard-lpc + modprobe cls-i2c-mux-pca954x + modprobe cls-switchboard + modprobe xcvr-cls + modprobe switch_cpld - # Instantiate TLV EEPROM device on I801 bus + sleep 1 + + for i in {0..3} + do + echo -2 > /sys/devices/pci0000:00/0000:00:1c.0/0000:09:00.0/ocores-i2c.3/i2c-3/3-007$i/idle_state + done + + # Instantiate TLV EEPROM device on I801 bus devname=`cat /sys/bus/i2c/devices/i2c-0/name` if [[ $devname == 'SMBus I801 adapter at '* ]]; then echo 24lc64t 0x56 > /sys/bus/i2c/devices/i2c-0/new_device fi + + # Clear system cache decode-syseeprom --init 2> /dev/null & + sleep 1 + + # Attach switchboard CPLD i2c device + echo switch_cpld 0x30 > /sys/bus/i2c/devices/i2c-4/new_device + + # Attach optical Module EEPROM + # use optoe2 for SFP+. + for i in {1..2} + do + echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-$i/new_device + done + + # use optoe3 for QSFP-DD. + for i in {10..41} + do + echo optoe3 0x50 > /sys/bus/i2c/devices/i2c-$i/new_device + done + + # SONiC LED control policy + ## Disable BMC LED control + ipmitool raw 0x3a 0x09 0x02 0x00 + ## Set status led to green blinking 1Hz to indicate NOS take control + ipmitool raw 0x3a 0x03 0x00 0x02 0x62 0xdd + ## Set Alarm LED off + ipmitool raw 0x3a 0x03 0x00 0x02 0x63 0xff + ## Set PSU HW control + ipmitool raw 0x3a 0x03 0x00 0x02 0x61 0x10 + ## Set FAN HW control + ipmitool raw 0x3a 0x03 0x00 0x02 0x65 0x10 + /bin/sh /usr/local/bin/platform_api_mgnt.sh init echo "done." ;; stop) + #TLV eeprom + if [ -d /sys/bus/i2c/devices/i2c-0/0-0056 ]; then + echo 0x56 > /sys/bus/i2c/devices/i2c-0/delete_device + fi + + #switchcpld i2c + if [ -d /sys/bus/i2c/devices/i2c-4/4-0030 ]; then + echo 0x30 > /sys/bus/i2c/devices/i2c-4/delete_device + fi + + #sfp+ module + for i in {1..2} + do + if [ -d /sys/bus/i2c/devices/i2c-$i/$i-0050 ]; then + echo 0x50 > /sys/bus/i2c/devices/i2c-$i/delete_device + fi + done + + #qsfp-DD + for i in {10..41} + do + if [ -d /sys/bus/i2c/devices/i2c-$i/$i-0050 ]; then + echo 0x50 > /sys/bus/i2c/devices/i2c-$i/delete_device + fi + done + echo "done." ;; @@ -48,4 +123,4 @@ force-reload|restart) ;; esac -exit 0 \ No newline at end of file +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.install index 73fa4b90a4fc..0a973ed8d678 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.install +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.install @@ -1,5 +1,6 @@ silverstone/scripts/sensors usr/bin silverstone/scripts/platform_sensors.py usr/local/bin +silverstone/scripts/silverstone_platform_shutdown.sh usr/local/bin silverstone/cfg/silverstone-modules.conf etc/modules-load.d silverstone/systemd/platform-modules-silverstone.service lib/systemd/system silverstone/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_silverstone-r0 diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.postinst index feb9cf45c219..f5dfe16c0bbb 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.postinst +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.postinst @@ -1,5 +1,6 @@ depmod -a -systemctl enable platform-modules-silverstone.service -systemctl start platform-modules-silverstone.service /usr/local/bin/platform_api_mgnt.sh install + +systemctl enable platform-modules-silverstone.service +systemctl start platform-modules-silverstone.service diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/rules b/platform/broadcom/sonic-platform-modules-cel/debian/rules index 7c81e2496f1d..bcbcdcfd3e7c 100755 --- a/platform/broadcom/sonic-platform-modules-cel/debian/rules +++ b/platform/broadcom/sonic-platform-modules-cel/debian/rules @@ -6,7 +6,8 @@ export KBUILD_EXTRA_SYMBOLS := /sonic/platform/pddf/i2c/Module.symvers.PDDF KVERSION ?= $(shell uname -r) KERNEL_SRC := /lib/modules/$(KVERSION) MOD_SRC_DIR:= $(shell pwd) -MODULE_DIRS:= dx010 haliburton silverstone seastone2 belgite + +MODULE_DIRS:= dx010 haliburton silverstone seastone2 ds1000 questone2 silverstone-v2 ds2000 ds3000 %: dh $@ @@ -14,22 +15,13 @@ MODULE_DIRS:= dx010 haliburton silverstone seastone2 belgite override_dh_auto_build: (for mod in $(MODULE_DIRS); do \ make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ - if [ $$mod = "seastone2" ]; then \ - cd $(MOD_SRC_DIR)/services/platform_api; \ - python3 -m build --wheel --no-isolation --outdir $(MOD_SRC_DIR)/$${mod}/modules; \ - continue; \ + if [ -d $(MOD_SRC_DIR)/$${mod}/pddf ]; then \ + cd $(MOD_SRC_DIR)/$${mod}/pddf; \ + else \ + cd $(MOD_SRC_DIR)/$${mod}; \ fi; \ - if [ $$mod = "belgite" ]; then \ - cd $(MOD_SRC_DIR); \ - if [ -d $(MOD_SRC_DIR)/$${mod}/pddf ]; then \ - cd $(MOD_SRC_DIR)/$${mod}/pddf; \ - python3 -m build --wheel --no-isolation --outdir $(MOD_SRC_DIR)/$${mod}/pddf; \ - echo "Finished making pddf whl package for $$mod"; \ - fi; \ - continue; \ - fi; \ - cd $(MOD_SRC_DIR)/$${mod}; \ - python3 -m build --wheel --no-isolation --outdir $(MOD_SRC_DIR)/$${mod}/modules; \ + python3 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/modules; \ + echo "Finished making sonic_platform whl package for $$mod"; \ done) override_dh_auto_install: @@ -46,7 +38,5 @@ override_dh_clean: dh_clean (for mod in $(MODULE_DIRS); do \ make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ - if [ -f $(MOD_SRC_DIR)/$${mod}/pddf/*.whl ]; then \ - rm -f $(MOD_SRC_DIR)/$${mod}/pddf/*.whl; \ - fi; \ + rm -f $(MOD_SRC_DIR)/$${mod}/modules/*.whl; \ done) diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/Makefile similarity index 100% rename from platform/broadcom/sonic-platform-modules-cel/belgite/modules/Makefile rename to platform/broadcom/sonic-platform-modules-cel/ds1000/modules/Makefile diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/modules/mc24lc64t.c b/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/mc24lc64t.c similarity index 100% rename from platform/broadcom/sonic-platform-modules-cel/belgite/modules/mc24lc64t.c rename to platform/broadcom/sonic-platform-modules-cel/ds1000/modules/mc24lc64t.c diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/modules/pddf_custom_psu.c b/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/pddf_custom_psu.c similarity index 100% rename from platform/broadcom/sonic-platform-modules-cel/belgite/modules/pddf_custom_psu.c rename to platform/broadcom/sonic-platform-modules-cel/ds1000/modules/pddf_custom_psu.c diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/pddf_custom_wdt.c b/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/pddf_custom_wdt.c new file mode 100644 index 000000000000..77e8ff7d44a5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/pddf_custom_wdt.c @@ -0,0 +1,734 @@ +/*************************************************************************** + * Copyright (C) 2021 Celestica Corp * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define WDT_CONTROL_BASE 0xA100 +#define TEST_SCRATCH_REG 0xA101 +#define REBOOT_CAUSE_REG 0xA105 +#define WDT_SET_TIMER_H_BIT_REG 0xA161 +#define WDT_SET_TIMER_M_BIT_REG 0xA162 +#define WDT_SET_TIMER_L_BIT_REG 0xA163 +#define WDT_TIMER_H_BIT_REG 0xA164 +#define WDT_TIMER_M_BIT_REG 0xA165 +#define WDT_TIMER_L_BIT_REG 0xA166 +#define WDT_ENABLE_REG 0xA167 +#define WDT_FEED_REG 0xA168 +#define WDT_PUNCH_REG 0xA169 +#define WDT_START_FEED 0x01 +#define WDT_STOP_FEED 0x00 + +#define POWER_CYCLE_RESET 0x00 +#define POWER_ON_RESET 0x11 +#define SOFT_SET_WARM_RESET 0x22 +#define SOFT_SET_COLD_RESET 0x33 +#define CPU_WARM_RESET 0x44 +#define CPU_COLD_RESET 0x55 +#define CPU_GPIO_WARM_RESET 0x66 +#define WDT_RESET 0x77 +#define CPU_OVERLOAD_RESET 0x88 +#define INSUFFICIENT_FAN_SPEED_RESET 0xAA + + +#define MAX_TIMER_VALUE 0xffffff +#define DEFUALT_TIMER_VALUE 180000 /* 180s */ +#define WDT_ENABLE 0x01 +#define WDT_DISABLE 0x00 +#define WDT_RESTART 0x00 +#define DRV_NAME "cpld_wdt" +#define DRV_VERSION "1.0.0" +#define DEV_NAME "cpld_wdt" + +struct wdt_data { + unsigned long opened; + struct mutex lock; + char expect_close; + struct watchdog_info ident; + int timeout; + int timer_val; + char caused_reboot; /* last reboot was by the watchdog */ + struct resource *res; +}; + +struct cpld_wdt_private { + struct platform_device *pdev; + struct watchdog_device wddev; + struct cdev cdev; + struct miscdevice mdev; + bool suspended; + struct wdt_data wdat; +}; + +//struct class *cpld_wdt; +static const int max_timeout = MAX_TIMER_VALUE; + +static int timeout = DEFUALT_TIMER_VALUE; /* default 180s */ +module_param(timeout, int, 0); +MODULE_PARM_DESC(timeout, "Start watchdog timer on module load with" + " given initial timeout(unit: ms)." + " Zero (default) disables this feature."); + +static bool nowayout = WATCHDOG_NOWAYOUT; +module_param(nowayout, bool, 0644); +MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close"); + +static unsigned int watchdog_get_timeleft(struct cpld_wdt_private *wdt) +{ + int time = 0; + + mutex_lock(&wdt->wdat.lock); + + time = inb(WDT_TIMER_H_BIT_REG); + time = time << 8 | inb(WDT_TIMER_M_BIT_REG); + time = time << 8 | inb(WDT_TIMER_L_BIT_REG); + time = time/1000; + mutex_unlock(&wdt->wdat.lock); + + return time; +} +static int watchdog_get_timeout(struct cpld_wdt_private *wdt) +{ + int timeout = 0; + if(!wdt) + return -EINVAL; + + mutex_lock(&wdt->wdat.lock); + timeout = inb(WDT_SET_TIMER_H_BIT_REG); + timeout = timeout << 8 | inb(WDT_SET_TIMER_M_BIT_REG); + timeout = timeout << 8 | inb(WDT_SET_TIMER_L_BIT_REG); + timeout=timeout/1000; + mutex_unlock(&wdt->wdat.lock); + + return timeout; +} +static int watchdog_set_timeout(struct cpld_wdt_private *wdt, unsigned int timeout) +{ + unsigned char val = 0; + if(!wdt) + return -EINVAL; + + if (timeout <= 0 + || timeout > max_timeout) { + pr_err("watchdog timeout out of range\n"); + return -EINVAL; + } + + mutex_lock(&wdt->wdat.lock); + + wdt->wdat.timeout = timeout; + if (timeout > MAX_TIMER_VALUE) { + wdt->wdat.timer_val = MAX_TIMER_VALUE; + } else { + wdt->wdat.timer_val = timeout; + } + /* Set timer value */ + //pr_crit("Watchdog Timeout:0x%06x\n", wdt->wdat.timer_val); + + outb((wdt->wdat.timer_val >> 16) & 0xff, WDT_SET_TIMER_H_BIT_REG); + outb((wdt->wdat.timer_val >> 8) & 0xff, WDT_SET_TIMER_M_BIT_REG); + outb(wdt->wdat.timer_val & 0xff, WDT_SET_TIMER_L_BIT_REG); + + mutex_unlock(&wdt->wdat.lock); + + return 0; +} + +static int watchdog_ping(struct cpld_wdt_private *wdt) +{ + if(!wdt) + return -EINVAL; + + mutex_lock(&wdt->wdat.lock); + + /* start feed watchdog */ + outb(WDT_START_FEED, WDT_FEED_REG); + /* stop feed watchdog */ + outb(WDT_STOP_FEED, WDT_FEED_REG); + + mutex_unlock(&wdt->wdat.lock); + + return 0; +} + +static void watchdog_keepalive(struct cpld_wdt_private *wdt) +{ + unsigned char val = 0; + if(!wdt) + return; + + mutex_lock(&wdt->wdat.lock); + + val = inb(WDT_FEED_REG); + + val &= 0x1; + + val = ~val; + + val &= 0x1; + /* start feed watchdog */ + outb(val, WDT_FEED_REG); + + mutex_unlock(&wdt->wdat.lock); + return; +} + +static int watchdog_start(struct cpld_wdt_private *wdt) +{ + if(!wdt) + return -EINVAL; + + /* Make sure we don't die as soon as the watchdog is enabled below */ + //watchdog_keepalive(); + mutex_lock(&wdt->wdat.lock); + outb(WDT_ENABLE, WDT_ENABLE_REG); + outb(WDT_RESTART, WDT_PUNCH_REG); + mutex_unlock(&wdt->wdat.lock); + + return 0; +} + +static int watchdog_stop(struct cpld_wdt_private *wdt) +{ + if(!wdt) + return -EINVAL; + + mutex_lock(&wdt->wdat.lock); + outb(WDT_DISABLE, WDT_ENABLE_REG); + mutex_unlock(&wdt->wdat.lock); + + return 0; +} + +static char watchdog_get_reason(struct cpld_wdt_private *p) +{ + char status = 0; + + if (!p) + return -1; + mutex_lock(&p->wdat.lock); + status = inb(REBOOT_CAUSE_REG); + mutex_unlock(&p->wdat.lock); + + return status; +} + +static bool watchdog_is_running(struct cpld_wdt_private *wdt) +{ + /* + * if we fail to determine the watchdog's status assume it to be + * running to be on the safe side + */ + + bool is_running = true; + + mutex_lock(&wdt->wdat.lock); + is_running = inb(WDT_ENABLE_REG); + mutex_unlock(&wdt->wdat.lock); + + return is_running; +} + +static const struct watchdog_info ident = { + .options = WDIOF_SETTIMEOUT | + WDIOF_KEEPALIVEPING | + WDIOF_MAGICCLOSE, + .firmware_version = 0, + .identity = DRV_NAME, +}; + +static ssize_t identity_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct cpld_wdt_private *wdt = dev_get_drvdata(dev); + if(!wdt) + return -EINVAL; + return sprintf(buf, "%s\n", wdt->wdat.ident.identity); +} + +static DEVICE_ATTR_RO(identity); + + +static ssize_t state_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct cpld_wdt_private *wdt = dev_get_drvdata(dev); + bool state = watchdog_is_running(wdt); + if(true == state) + return sprintf(buf, "active\n"); + else + return sprintf(buf, "inactive\n"); +} + +static DEVICE_ATTR_RO(state); + +static ssize_t status_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + unsigned int status; + struct cpld_wdt_private *wdt = dev_get_drvdata(dev); + if(!wdt) + return -EINVAL; + + return sprintf(buf, "0x%x\n", status); +} + +static DEVICE_ATTR_RO(status); + +static ssize_t reason_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + char bootstatus; + struct cpld_wdt_private *wdt = dev_get_drvdata(dev); + if(!wdt) + return -EINVAL; + + bootstatus = watchdog_get_reason(wdt); + + return sprintf(buf, "0x%02x\n", bootstatus); +} + +static DEVICE_ATTR_RO(reason); + +static ssize_t timeleft_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + unsigned int timeleft; + struct cpld_wdt_private *wdt = dev_get_drvdata(dev); + if(!wdt) + return -EINVAL; + + timeleft = watchdog_get_timeleft(wdt); + + return sprintf(buf, "%u\n", timeleft); + +} + +static DEVICE_ATTR_RO(timeleft); + + +static ssize_t timeout_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + unsigned int timeout; + struct cpld_wdt_private *wdt = dev_get_drvdata(dev); + if(!wdt) + return -EINVAL; + + timeout = watchdog_get_timeout(wdt); + + return sprintf(buf, "%u\n", timeout); +} +static DEVICE_ATTR_RO(timeout); + + +static struct attribute *wdt_attrs[] = { + &dev_attr_state.attr, + &dev_attr_identity.attr, + &dev_attr_status.attr, + &dev_attr_reason.attr, + &dev_attr_timeleft.attr, + &dev_attr_timeout.attr, + NULL, +}; + +static const struct attribute_group wdt_group = { + .attrs = wdt_attrs, +}; + +static int watchdog_open(struct inode *inode, struct file *file) +{ + struct cpld_wdt_private *wdt; + + wdt = container_of(file->private_data, struct cpld_wdt_private, mdev); + + /* If the watchdog is alive we don't need to start it again */ + + if (test_and_set_bit(0, &wdt->wdat.opened)) + return -EBUSY; + + //watchdog_start(wdt); + + if (nowayout) + __module_get(THIS_MODULE); + + wdt->wdat.expect_close = 0; + + + return nonseekable_open(inode, file); +} + +static int watchdog_release(struct inode *inode, struct file *file) +{ + struct cpld_wdt_private *p; + p = container_of(file->private_data, struct cpld_wdt_private, mdev); + + if(!p) + return -EINVAL; + + clear_bit(0, &p->wdat.opened); + + if (!p->wdat.expect_close) { + //watchdog_keepalive(p); + //pr_crit("Unexpected close, Not stopping watchdog!\n"); + } else if (!nowayout) { + //pr_crit("Cpld Watchdog Stopped!\n"); + watchdog_stop(p); + } + return 0; +} + +/* + * watchdog_write: + * @file: file handle to the watchdog + * @buf: buffer to write + * @count: count of bytes + * @ppos: pointer to the position to write. No seeks allowed + * + * A write to a watchdog device is defined as a keepalive signal. Any + * write of data will do, as we we don't define content meaning. + */ + +static ssize_t watchdog_write(struct file *file, const char __user *buf, + size_t count, loff_t *ppos) +{ + struct cpld_wdt_private *p; + p = container_of(file->private_data, struct cpld_wdt_private, mdev); + + if(!p) + return -EINVAL; + + + if (count) { + if (!nowayout) { + size_t i; + + /* In case it was set long ago */ + bool expect_close = false; + + for (i = 0; i != count; i++) { + char c; + if (get_user(c, buf + i)) + return -EFAULT; + expect_close = (c == 'V'); + } + + /* Properly order writes across fork()ed processes */ + mutex_lock(&p->wdat.lock); + p->wdat.expect_close = expect_close; + mutex_unlock(&p->wdat.lock); + } + + /* someone wrote to us, we should restart timer */ + watchdog_keepalive(p); + } + return count; +} + +/* + * watchdog_ioctl: + * @inode: inode of the device + * @file: file handle to the device + * @cmd: watchdog command + * @arg: argument pointer + * + * The watchdog API defines a common set of functions for all watchdogs + * according to their available features. + */ +static long watchdog_ioctl(struct file *file, unsigned int cmd, + unsigned long arg) +{ + int status; + int new_options; + int new_timeout; + unsigned int val; + union { + struct watchdog_info __user *ident; + int __user *i; + } uarg; + + uarg.i = (int __user *)arg; + + struct cpld_wdt_private *p; + p = container_of(file->private_data, struct cpld_wdt_private, mdev); + if(!p) + return -EINVAL; + + switch (cmd) { + case WDIOC_GETSUPPORT: + return copy_to_user(uarg.ident, &p->wdat.ident, + sizeof(p->wdat.ident)) ? -EFAULT : 0; + + case WDIOC_GETSTATUS: + status = watchdog_is_running(p); + return put_user(status, uarg.i); + + case WDIOC_GETBOOTSTATUS: + //status = watchdog_get_bootstatus(p); + return put_user(status, uarg.i); + + case WDIOC_SETOPTIONS: + if (get_user(new_options, uarg.i)){ + return -EFAULT; + } + + if (new_options & WDIOS_DISABLECARD){ + return watchdog_stop(p); + } + + if (new_options & WDIOS_ENABLECARD){ + return watchdog_start(p); + } + + return 0; + + case WDIOC_KEEPALIVE: + watchdog_keepalive(p); + return 0; + + case WDIOC_SETTIMEOUT: + if (get_user(new_timeout, uarg.i)) + return -EFAULT; + new_timeout = new_timeout*1000; + if (watchdog_set_timeout(p, new_timeout)) + return -EINVAL; + + val = watchdog_get_timeout(p); + return put_user(val, uarg.i); + case WDIOC_GETTIMEOUT: + val = watchdog_get_timeout(p); + return put_user(val, uarg.i); + + case WDIOC_GETTIMELEFT: + val = watchdog_get_timeleft(p); + return put_user(val, uarg.i); + default: + return -ENOTTY; + + } +} + +static int watchdog_notify_sys(struct notifier_block *this, unsigned long code, + void *unused) +{ + if (code == SYS_DOWN || code == SYS_HALT) + //watchdog_stop(p); + + pr_err("CPLD Watchdog did not Stop!\n"); + return NOTIFY_DONE; +} + +static const struct file_operations watchdog_fops = { + .owner = THIS_MODULE, + .llseek = no_llseek, + .open = watchdog_open, + .release = watchdog_release, + .write = watchdog_write, + .unlocked_ioctl = watchdog_ioctl, +}; + +static struct miscdevice watchdog_miscdev = { + //.minor = WATCHDOG_MINOR, + .name = DEV_NAME, + .fops = &watchdog_fops, +}; + +static struct notifier_block watchdog_notifier = { + .notifier_call = watchdog_notify_sys, +}; + +static int cpld_wdt_probe(struct platform_device *pdev) +{ + int wdt_reboot_cause, err = 0; + unsigned char ver = 0; + struct device *dev = &pdev->dev; + + struct cpld_wdt_private *p; + + p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL); + if (!p) + return -ENOMEM; + + + mutex_init(&(p->wdat.lock)); + + p->wdat.ident.options = WDIOC_SETTIMEOUT + | WDIOF_MAGICCLOSE + | WDIOF_KEEPALIVEPING + | WDIOC_GETTIMELEFT; + + snprintf(p->wdat.ident.identity, + sizeof(p->wdat.ident.identity), "%s", DRV_NAME); + + wdt_reboot_cause = inb(REBOOT_CAUSE_REG); // REBOOT_CAUSE + p->wdat.caused_reboot = wdt_reboot_cause; + ver = inb(WDT_CONTROL_BASE); + pr_info("Watchdog CPLD Version:0x%02x\n", + ver); + + if (timeout) { + if (timeout <= 0 + || timeout > max_timeout) { + pr_err("starting timeout out of range\n"); + err = -EINVAL; + return err; + } + + //watchdog_start(p); + + + if (timeout > MAX_TIMER_VALUE) { + watchdog_set_timeout(p, MAX_TIMER_VALUE); + } else { + watchdog_set_timeout(p, timeout); + } + + if (nowayout) + __module_get(THIS_MODULE); + + pr_info("watchdog started with initial timeout of %u Second(s)\n", + timeout/1000); + } + + err = watchdog_set_timeout(p, timeout); + if (err) + return err; + + err = register_reboot_notifier(&watchdog_notifier); + if (err) + return err; + p->mdev = watchdog_miscdev; + err = misc_register(&p->mdev); + if (err) { + pr_err("cannot register miscdev on minor=%d\n", + watchdog_miscdev.minor); + return err;; + } + + /*p->wdat.res = platform_get_resource(pdev, IORESOURCE_IO, WDT_CONTROL_BASE); + if (!p->wdat.res) + return -ENODEV; + + if (!devm_request_region(dev, p->wdat.res->start, + resource_size(p->wdat.res), + pdev->name)) { + return -EBUSY; + } + */ + err = sysfs_create_group(&pdev->dev.kobj, &wdt_group); + if (err) { + printk(KERN_ERR "Cannot create sysfs for cpld_wdt.\n"); + return err; + } + + platform_set_drvdata(pdev, p); + dev_set_drvdata(dev, p); + + pr_info("initialized. sec (nowayout=%d)\n", + nowayout); + + return 0; +} + +static int cpld_wdt_remove(struct platform_device *pdev) +{ + struct cpld_wdt_private *p = platform_get_drvdata(pdev); + + if (p) { + sysfs_remove_group(&pdev->dev.kobj, &wdt_group); + misc_deregister(&p->mdev); + unregister_reboot_notifier(&watchdog_notifier); + } + return 0; +} + +static struct platform_driver cpld_wdt_driver = { + .probe = cpld_wdt_probe, + .remove = cpld_wdt_remove, + .driver = { + .name = DRV_NAME, + }, +}; + +static struct resource cpld_wdt_resources[] = { + { + .start = 0xA100, + .end = 0xA1F2, + .flags = IORESOURCE_IO, + }, +}; + +static void wdt_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device cpld_wdt_dev = { + .name = DRV_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(cpld_wdt_resources), + .resource = cpld_wdt_resources, + .dev = { + .release = wdt_dev_release, + } +}; + +static int __init cpld_wdt_init_module(void) +{ + int err = 0; + + err = platform_device_register(&cpld_wdt_dev); + err += platform_driver_register(&cpld_wdt_driver); + if(err < 0) + pr_info("Platform Device/Driver Register Failed. err:%d\n", err); + + pr_info("CPLD WatchDog Timer Driver v%s\n", DRV_VERSION); + return err; +} + +static void __exit cpld_wdt_cleanup_module(void) +{ + platform_driver_unregister(&cpld_wdt_driver); + platform_device_unregister(&cpld_wdt_dev); + pr_info("Watchdog Module Unloaded\n"); +} + +module_init(cpld_wdt_init_module); +module_exit(cpld_wdt_cleanup_module); + + +MODULE_DESCRIPTION("Cpld Watchdog Driver"); +MODULE_VERSION(DRV_VERSION); +MODULE_AUTHOR("Nicholas "); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/setup.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/setup.py new file mode 100644 index 000000000000..db095d23534a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/setup.py @@ -0,0 +1,27 @@ +import os +from setuptools import setup +os.listdir + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on Celestica Platforms based on PDDF', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.9', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/__init__.py new file mode 100644 index 000000000000..d3c24cb008dd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import platform diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/chassis.py similarity index 71% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/chassis.py rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/chassis.py index ed2e339461ac..e325c0af5569 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/chassis.py +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/chassis.py @@ -5,21 +5,24 @@ ############################################################################# import os import time +import sys +import subprocess +import re try: from sonic_platform_pddf_base.pddf_chassis import PddfChassis from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom from sonic_platform_base.chassis_base import ChassisBase - from sonic_platform.fan_drawer import FanDrawer + from sonic_platform.thermal import Thermal from sonic_platform.watchdog import Watchdog - import sys - import subprocess from sonic_py_common import device_info from sonic_platform_base.sfp_base import SfpBase except ImportError as e: raise ImportError(str(e) + "- required module not found") -NUM_COMPONENT = 2 +NUM_COMPONENTS = 4 +NUM_SENSORS = 4 +HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" class Chassis(PddfChassis): """ @@ -31,17 +34,23 @@ def __init__(self, pddf_data=None, pddf_plugin_data=None): PddfChassis.__init__(self, pddf_data, pddf_plugin_data) (self.platform, self.hwsku) = device_info.get_platform_and_hwsku() + self._watchdog = None + self._airflow_direction = None self.__initialize_components() - self.sfp_port_list = list(range(49, 56+1)) - for port_idx in self.sfp_port_list: - present = self.get_sfp(port_idx).get_presence() - self.sfp_status_dict[port_idx] = '1' if present else '0' + for sfp in self._sfp_list: + present = sfp.get_presence() + self.sfp_status_dict[sfp.index] = '1' if present else '0' + + # PDDF doesn't support CPU internal temperature sensor + # Hence it is created from chassis init override and + # handled appropriately in thermal APIs + self._thermal_list.append(Thermal(NUM_SENSORS)) def __initialize_components(self): from sonic_platform.component import Component - for index in range(0, NUM_COMPONENT): + for index in range(0, NUM_COMPONENTS): component = Component(index) self._component_list.append(component) @@ -99,12 +108,18 @@ def get_reboot_cause(self): with open("/sys/devices/platform/cpld_wdt/reason", "r") as f: hw_reboot_cause = f.read().strip() - if hw_reboot_cause == "0x77": + if hw_reboot_cause == "0x99": + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'NPU overload reset' + elif hw_reboot_cause == "0x88": + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'CPU overload reset' + elif hw_reboot_cause == "0x77": reboot_cause = self.REBOOT_CAUSE_WATCHDOG description = 'Hardware Watchdog Reset' elif hw_reboot_cause == "0x66": reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER - description = 'GPIO Request Warm Reset' + description = 'GPIO Warm Reset' elif hw_reboot_cause == "0x55": reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER description = 'CPU Cold Reset' @@ -112,19 +127,34 @@ def get_reboot_cause(self): reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE description = 'CPU Warm Reset' elif hw_reboot_cause == "0x33": - reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER description = 'Soft-Set Cold Reset' elif hw_reboot_cause == "0x22": - reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER description = 'Soft-Set Warm Reset' elif hw_reboot_cause == "0x11": reboot_cause = self.REBOOT_CAUSE_POWER_LOSS - description = 'Power Loss' + description = 'Power Loss' + elif hw_reboot_cause == "0x00": + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Cold Powercycle' + if os.path.isfile(HW_REBOOT_CAUSE_FILE): + with open(HW_REBOOT_CAUSE_FILE) as hw_cause_file: + reboot_info = hw_cause_file.readline().rstrip('\n') + match = re.search(r'Reason:(.*),Time:(.*)', reboot_info) + if match is not None: + if match.group(1) == 'temp_fatal': + description = 'Fatal temperature trip [Time:{}]'.format(match.group(2)) + elif match.group(1) == 'temp_critical': + description = 'Critical temperature reboot [Time:{}]'.format(match.group(2)) + elif match.group(1) == 'system': + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'System cold reboot' else: reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE description = 'Unkown Reason' - return (reboot_cause, description) + return (reboot_cause, description) def get_revision(self): version_str = self._eeprom.revision_str() @@ -133,23 +163,20 @@ def get_revision(self): return str(bytearray(version_str, 'ascii')[0]) return version_str - + @staticmethod def get_position_in_parent(): return -1 - + @staticmethod def is_replaceable(): return False def set_status_led(self, color): - color_dict = { - 'green': "STATUS_LED_COLOR_GREEN", - 'red': "STATUS_LED_COLOR_AMBER", - 'amber': "STATUS_LED_COLOR_AMBER", - 'off': "STATUS_LED_COLOR_OFF" - } - return self.set_system_led("SYS_LED", color_dict.get(color, "STATUS_LED_COLOR_OFF")) + if color == self.get_system_led("SYS_LED"): + return True + + return self.set_system_led("SYS_LED", color) def get_status_led(self): return self.get_system_led("SYS_LED") @@ -224,13 +251,14 @@ def get_change_event(self, timeout=0): time_period = timeout/float(1000) #Convert msecs to secs while time.time() < (start_time + time_period) or timeout == 0: - for port_idx in self.sfp_port_list: + for sfp in self._sfp_list: + port_idx = sfp.index if self.sfp_status_dict[port_idx] == SFP_REMOVED and \ - self.get_sfp(port_idx).get_presence() == SFP_PRESENT: + sfp.get_presence() == SFP_PRESENT: sfp_dict[port_idx] = SFP_INSERTED self.sfp_status_dict[port_idx] = SFP_INSERTED elif self.sfp_status_dict[port_idx] == SFP_INSERTED and \ - self.get_sfp(port_idx).get_presence() == SFP_ABSENT: + sfp.get_presence() == SFP_ABSENT: sfp_dict[port_idx] = SFP_REMOVED self.sfp_status_dict[port_idx] = SFP_REMOVED @@ -240,3 +268,21 @@ def get_change_event(self, timeout=0): time.sleep(0.5) return True, {'sfp':{}} # Timeout + + def get_airflow_direction(self): + if self._airflow_direction == None: + try: + vendor_extn = self._eeprom.get_vendor_extn() + airflow_type = vendor_extn.split()[2][2:4] # Either 0xFB or 0xBF + if airflow_type == 'FB': + direction = 'exhaust' + elif airflow_type == 'BF': + direction = 'intake' + else: + direction = 'N/A' + except (AttributeError, IndexError): + direction = 'N/A' + + self._airflow_direction = direction + + return self._airflow_direction diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/component.py similarity index 52% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/component.py rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/component.py index 3b68c5759b5a..23efdbda441a 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/component.py +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/component.py @@ -1,128 +1,168 @@ -#!/usr/bin/env python - -############################################################################# -# Celestica -# -# Component contains an implementation of SONiC Platform Base API and -# provides the components firmware management function -# -############################################################################# - -import subprocess -import time - -try: - from sonic_platform_base.component_base import ComponentBase - #from helper import APIHelper -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - -SWCPLD_VERSION_PATH = ['i2cget', '-y', '-f', '2', '0x32', '0'] -BIOS_VERSION_PATH = ['dmidecode', '-s', 'bios-version'] -COMPONENT_NAME_LIST = ["SWCPLD", "BIOS"] -COMPONENT_DES_LIST = ["Used for managing the chassis and SFP+ ports (49-56)", - "Basic Input/Output System"] - - -class Component(ComponentBase): - """Platform-specific Component class""" - - DEVICE_TYPE = "component" - - def __init__(self, component_index): - ComponentBase.__init__(self) - self.index = component_index - self.name = self.get_name() - - def __get_bios_version(self): - # Retrieves the BIOS firmware version - version = "N/A" - - try: - p = subprocess.Popen(BIOS_VERSION_PATH, stdout=subprocess.PIPE, universal_newlines=True) - data = p.communicate() - version = data[0].strip() - except IOError: - pass - - return version - - def __get_cpld_version(self): - version = "N/A" - try: - p = subprocess.Popen(SWCPLD_VERSION_PATH, stdout=subprocess.PIPE, universal_newlines=True) - data = p.communicate() - ver = int(data[0].strip(), 16) - version = "{0}.{1}".format(ver >> 4, ver & 0x0F) - except (IOError, ValueError): - pass - - return version - - def get_name(self): - """ - Retrieves the name of the component - Returns: - A string containing the name of the component - """ - return COMPONENT_NAME_LIST[self.index] - - def get_description(self): - """ - Retrieves the description of the component - Returns: - A string containing the description of the component - """ - return COMPONENT_DES_LIST[self.index] - - def get_firmware_version(self): - """ - Retrieves the firmware version of module - Returns: - string: The firmware versions of the module - """ - fw_version = None - - if self.name == "BIOS": - fw_version = self.__get_bios_version() - elif "CPLD" in self.name: - fw_version = self.__get_cpld_version() - - return fw_version - - def install_firmware(self, image_path): - """ - Install firmware to module - Args: - image_path: A string, path to firmware image - Returns: - A boolean, True if install successfully, False if not - """ - return False - - def update_firmware(self, image_path): - return False - - def get_available_firmware_version(self, image_path): - return 'N/A' - - def get_firmware_update_notification(self, image_path): - return "None" - - def get_model(self): - return 'N/A' - - def get_position_in_parent(self): - return -1 - - def get_presence(self): - return True - - def get_serial(self): - return 'N/A' - - def get_status(self): - return True - - def is_replaceable(self): - return False +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +import subprocess +import re + +try: + from sonic_platform_base.component_base import ComponentBase + #from helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +COMPONENT_NAME = 0 +COMPONENT_DESC = 1 +COMPONENT_VER_CMD = 2 +COMPONENT_VER_FN = 3 +BIOS_VERSION_CMD = ['dmidecode', '-s', 'bios-version'] +ONIE_VERSION_CMD = ['cat', '/host/machine.conf'] +SWCPLD_VERSION_CMD = ['i2cget', '-y', '-f', '2', '0x32', '0'] +SSD_VERSION_CMD = ['smartctl', '-i', '/dev/sda'] + + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + self.component_list = [["BIOS", "Basic Input/Output System", BIOS_VERSION_CMD, self.__get_cmd_output],\ + ["ONIE", "Open Network Install Environment", ONIE_VERSION_CMD, self.__get_onie_version],\ + ["CPLD SW", "CPLD for board functions, watchdog and port control SFP(49-56)", SWCPLD_VERSION_CMD, self.__get_cpld_version],\ + ["SSD", "Solid State Drive - {}", SSD_VERSION_CMD, self.__get_ssd_version]] + + ComponentBase.__init__(self) + self.index = component_index + self.name = self.get_name() + + def __get_cmd_output(self): + cmd = self.component_list[self.index][COMPONENT_VER_CMD] + version = "N/A" + + try: + p = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True) + data = p.communicate() + version = data[0].strip() + except IOError: + pass + + return version + + def __get_onie_version(self): + version = "N/A" + + ret = re.search(r"(?<=onie_version=).+[^\n]", self.__get_cmd_output()) + if ret != None: + version = ret.group(0) + + return version + + def __get_ssd_version(self): + version = "N/A" + + ret = re.search(r"Firmware Version: +(.*)[^\\]", self.__get_cmd_output()) + if ret != None: + try: + version = ret.group(1) + except (IndexError): + pass + + return version + + def __get_cpld_version(self): + version = "N/A" + + try: + ver = int(self.__get_cmd_output(), 16) + version = "{0}.{1}".format(ver >> 4, ver & 0x0F) + except (ValueError): + pass + + return version + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return self.component_list[self.index][COMPONENT_NAME] + + def __get_ssd_desc(self, desc_format): + description = "N/A" + + ret = re.search(r"Device Model: +(.*)[^\\]", self.__get_cmd_output()) + if ret != None: + try: + description = desc_format.format(ret.group(1)) + except (IndexError): + pass + + return description + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + # For SSD get the model name from device + if self.get_name() == "SSD": + return self.__get_ssd_desc(self.component_list[self.index][COMPONENT_DESC]) + + return self.component_list[self.index][COMPONENT_DESC] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + fw_version = self.component_list[self.index][COMPONENT_VER_FN]() + + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + return False + + def update_firmware(self, image_path): + return False + + def get_available_firmware_version(self, image_path): + return 'N/A' + + def get_firmware_update_notification(self, image_path): + return "None" + + def get_model(self): + return 'N/A' + + def get_position_in_parent(self): + return -1 + + def get_presence(self): + return True + + def get_serial(self): + return 'N/A' + + def get_status(self): + return True + + def is_replaceable(self): + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/eeprom.py similarity index 81% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/eeprom.py rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/eeprom.py index bc1ef6420b68..5379db32a5a0 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/eeprom.py +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/eeprom.py @@ -6,7 +6,7 @@ class Eeprom(PddfEeprom): - _TLV_DISPLAY_VENDOR_EXT = True + _TLV_DISPLAY_VENDOR_EXT = True _TLV_INFO_MAX_LEN = 256 pddf_obj = {} plugin_data = {} @@ -58,18 +58,11 @@ def __init__(self, pddf_data=None, pddf_plugin_data=None): else: name, value = self.decoder(None, tlv) - self.eeprom_tlv_dict[code] = value + self.eeprom_tlv_dict[code] = value.strip() if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32: break tlv_index += (eeprom[tlv_index+1]) + 2 - def vendor_ext_str(self): - """ - :return: the direction of fan(FB or BF, string) - """ - (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_VENDOR_EXT) - if not is_valid: - return "N/A" - return str(hex(int(results[2][2]))).replace("0x", "").upper() - # Provide the functions/variables below for which implementation is to be overwritten + def get_vendor_extn(self): + return self.eeprom_tlv_dict.get('0xFD', 'N/A') diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan.py new file mode 100644 index 000000000000..3a71e9723900 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan.py @@ -0,0 +1,153 @@ +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan + import subprocess +except ImportError as e: + raise ImportError(str(e) + "- required module not found") +# ------------------------------------------------------------------ +# HISTORY: +# 5/1/2022 (A.D.) +# add function:set_status_led, +# Solve the problem that when a fan is pulled out, the Fan LED on the front panel is still green Issue-#11525 +# ------------------------------------------------------------------ + +MIN_SPEED = 40 # Percentage + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + self.max_speed_rpm = 28600 #Max RPM from FAN spec + + # Remap LED color READ and OFF to AMBER as they are unsupported + self.STATUS_LED_COLOR_RED = "amber" + self.STATUS_LED_COLOR_OFF = "amber" + + def get_presence(self): + if not self.is_psu_fan: + # FANs on Ds1000 are all Fixed and present + return True + + #For PSU, FAN must be present when PSU is present + try: + cmd = ['i2cget', '-y', '-f', '0x2', '0x32', '0x41'] + p = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True) + data = p.communicate() + status = int(data[0].strip(), 16) + if (self.fans_psu_index == 1 and (status & 0x10) == 0) or \ + (self.fans_psu_index == 2 and (status & 0x20) == 0): + return True + except (IOError, ValueError): + pass + + def get_status(self): + if not self.is_psu_fan: + if not self.get_presence(): + return False + + # FANs must not be operated below MIN_SPEED + target_speed = self.get_target_speed() + if target_speed < MIN_SPEED: + return False + + # FANs target speed and actual speed must + # be within specified tolerance limits + current_speed = self.get_speed() + speed_tolerance = self.get_speed_tolerance() + if abs(target_speed - current_speed) > speed_tolerance: + return False + + return True + + return super().get_status() + + # Override get_speed as PDDF retrieves the speed from the + # set PWM value which is actually the target fan speed + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + if self.is_psu_fan: + return super().get_speed() + + # Percentage of current FAN speed against the max FAN speed + return round(super().get_speed_rpm() * 100 / self.max_speed_rpm) + + def get_direction(self): + """ + Retrieves the direction of fan + + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + if self.is_psu_fan: + # Ds1000 PSU module only has EXHAUST fan + return "exhaust" + + return super().get_direction() + + def get_status_led(self): + """ + Gets the state of the fan status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if self.is_psu_fan: + return "N/A" + + return super().get_status_led() + + def set_status_led(self, color): + """ + Sets the state of the fan module status LED + + Args: + color: A string representing the color with which to set the + fan module status LED + + Returns: + bool: True if status LED state is set successfully, False if not + """ + if self.is_psu_fan: + return False + + if self.get_status_led() == color: + return True + + return super().set_status_led(color) + + def get_name(self): + if self.is_psu_fan: + return "PSU {} Fan {}".format(self.fans_psu_index, self.fan_index) + else: + return "Fan {}".format(self.fantray_index) + + def is_under_speed(self): + speed = float(self.get_speed()) + target_speed = float(self.get_target_speed()) + speed_tolerance = self.get_speed_tolerance() + + speed_min_th = target_speed * (1 - float(speed_tolerance) / 100) + if speed < speed_min_th: + return True + else: + return False + + def is_over_speed(self): + speed = float(self.get_speed()) + target_speed = float(self.get_target_speed()) + speed_tolerance = self.get_speed_tolerance() + + speed_max_th = target_speed * (1 + float(speed_tolerance) / 100) + if speed > speed_max_th: + return True + else: + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan_drawer.py similarity index 91% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan_drawer.py rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan_drawer.py index ac80aad4b1eb..beec44630406 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan_drawer.py +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan_drawer.py @@ -6,7 +6,7 @@ ############################################################################# try: - from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer except ImportError as e: raise ImportError(str(e) + "- required module not found") @@ -16,8 +16,8 @@ class FanDrawer(PddfFanDrawer): def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): # idx is 0-based PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) - - + + def set_status_led(self, color): return self._fan_list[0].set_status_led(color) @@ -31,3 +31,6 @@ def get_serial(self): def get_model(self): model = "Unknown" return model + + def get_name(self): + return "Drawer {0}".format(self.fantray_index) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/pcie.py new file mode 100644 index 000000000000..0f8bc0830384 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/pcie.py @@ -0,0 +1,15 @@ +# +# pcie_base.py +# +# Abstract base class for implementing platform-specific +# PCIE functionality for SONiC +# + +try: + from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil +except ImportError as e: + raise ImportError (str(e) + " - required module not found") + +class Pcie(PcieUtil): + def __init__(self, platform_path): + PcieUtil.__init__(self, platform_path) diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/platform.py similarity index 100% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/platform.py rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/platform.py diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/psu.py similarity index 61% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/psu.py rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/psu.py index f1047bed740a..a3a7f6da8f34 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/psu.py +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/psu.py @@ -6,12 +6,12 @@ class Psu(PddfPsu): """PDDF Platform-Specific PSU class""" - + PLATFORM_PSU_CAPACITY = 550 def __init__(self, index, pddf_data=None, pddf_plugin_data=None): PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) - + # Provide the functions/variables below for which implementation is to be overwritten def get_capacity(self): """ @@ -71,3 +71,38 @@ def get_voltage_low_threshold(self): e.g. 12.1 """ return 11.4 + + def get_voltage(self): + """ + Retrieves current PSU voltage output + + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + # When AC power is not plugged into one of the PSU, the FAN of + # that PSU is driven using the power from the alternate PSU and + # because of this the PSU VOUT might read a small voltage value + # and it is misleading. Therefore the PSU VOUT is fetched from + # HW only when PSU status is OK + if self.get_status(): + return super().get_voltage() + + return 0.0 + + def get_status_led(self): + """ + Gets the state of the PSU status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + # In Ds1000 PSU LED is controlled by the PSU firmware, so soft + # simulating the LED in a generic way based on the PSU status + if self.get_presence(): + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_AMBER + + return "N/A" diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/sfp.py new file mode 100644 index 000000000000..9187edb1fdf3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/sfp.py @@ -0,0 +1,36 @@ +try: + from sonic_platform_pddf_base.pddf_sfp import PddfSfp +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + self.index = index+1 + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + return self.SFP_STATUS_OK + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + + SFP+ don't support reset, so raise the error of NotImplemented + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/thermal.py new file mode 100644 index 000000000000..b17dfa4457df --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/thermal.py @@ -0,0 +1,105 @@ +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +import subprocess + +HIGH_THRESHOLD = 0 +LOW_THRESHOLD = 1 +HIGH_CRIT_THRESHOLD = 2 +LOW_CRIT_THRESHOLD = 3 + +NUM_SENSORS = 4 +CPU_SENSOR_STR = "CPU Internal Temp" +thermal_limits = { + # : , , , + 'Front Right Temp': [50.0, None, None, None], + 'Front Left Temp': [50.0, None, None, None], + 'Rear Right Temp': [50.0, None, None, None], + 'ASIC External Temp': [100.0, None, 105.0, None], + CPU_SENSOR_STR: [88.0, None, 91.0, None] +} + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + # PDDF doesn't support CPU internal temperature sensor + # Hence it is created from chassis init override and + # handled appropriately in thermal APIs + self.thermal_index = index + 1 + self.is_psu_thermal = is_psu_thermal + if self.thermal_index <= NUM_SENSORS: + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + # Provide the functions/variables below for which implementation is to be overwritten + + def get_name(self): + if self.thermal_index <= NUM_SENSORS: + return super().get_name() + + return CPU_SENSOR_STR + + def get_temperature(self): + if self.thermal_index <= NUM_SENSORS: + return super().get_temperature() + + temperature = 0.0 + cmd = ['cat', '/sys/devices/platform/coretemp.0/hwmon/hwmon1/temp1_input'] + try: + p = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True) + data = p.communicate() + temperature = int(data[0].strip())/1000.0 + except (IOError, ValueError): + pass + + return temperature + + def get_low_threshold(self): + thermal_limit = thermal_limits.get(self.get_name(), None) + if thermal_limit != None: + return thermal_limit[LOW_THRESHOLD] + + return None + + def __get_psu_high_threshold(self): + thermal_limit = None + try: + cmd = ['i2cget', '-y', '-f', '4', str(0x58 + (self.thermals_psu_index - 1)), '0x51', 'w'] + p = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True) + data = p.communicate() + thermal_limit = int(data[0].strip(), 16) + except (IOError, ValueError): + pass + + return thermal_limit + + def get_high_threshold(self): + if self.is_psu_thermal: + return self.__get_psu_high_threshold() + + thermal_limit = thermal_limits.get(self.get_name(), None) + if thermal_limit != None: + return thermal_limit[HIGH_THRESHOLD] + + return None + + def get_low_critical_threshold(self): + thermal_limit = thermal_limits.get(self.get_name(), None) + if thermal_limit != None: + return thermal_limit[LOW_CRIT_THRESHOLD] + + return None + + def get_high_critical_threshold(self): + thermal_limit = thermal_limits.get(self.get_name(), None) + if thermal_limit != None: + return thermal_limit[HIGH_CRIT_THRESHOLD] + + return None + + def set_high_threshold(self, temperature): + raise NotImplementedError + + def set_low_threshold(self, temperature): + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/watchdog.py similarity index 98% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/watchdog.py rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/watchdog.py index 7973e8a3cfad..d43e1d74f5e3 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/watchdog.py +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/watchdog.py @@ -1,7 +1,7 @@ #!/usr/bin/env python ############################################################################# -# +# # Watchdog contains an implementation of SONiC Platform Base Watchdog API # ############################################################################# @@ -55,14 +55,14 @@ class CpldWatchdog(WatchdogBase): watchdog = None def __init__(self): global watchdog - self.status_path = "/sys/devices/platform/cpld_wdt/status" - self.state_path = "/sys/devices/platform/cpld_wdt/state" - self.timeout_path = "/sys/devices/platform/cpld_wdt/timeout" + self.status_path = "/sys/devices/platform/cpld_wdt/status" + self.state_path = "/sys/devices/platform/cpld_wdt/state" + self.timeout_path = "/sys/devices/platform/cpld_wdt/timeout" # Set default value with open("/sys/devices/platform/cpld_wdt/state", "r") as fd: txt = fd.read() - state = txt.strip() - self.armed = True if state == "active" else False + state = txt.strip() + self.armed = True if state == "active" else False self.timeout = DEFAULT_TIMEOUT if not watchdog: watchdog = os.open("/dev/cpld_wdt", os.O_RDWR) @@ -160,7 +160,7 @@ def arm(self, seconds): else: self._enable() self.armed = True - + ret = self.timeout except IOError as e: pass @@ -226,4 +226,3 @@ def __init__(self): CpldWatchdog.__init__(self) # Provide the functions/variables below for which implementation is to be overwritten - diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/ds1000_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/ds1000_platform_shutdown.sh new file mode 100755 index 000000000000..a1ea8ccbe4ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/ds1000_platform_shutdown.sh @@ -0,0 +1,26 @@ +#!/bin/bash +REBOOT_CAUSE_DIR="/host/reboot-cause" +HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +REBOOT_TIME=$(date) + +if [ $# -ne 1 ]; then + echo "Require reboot type" + exit 1 +fi + +if [ ! -d "$REBOOT_CAUSE_DIR" ]; then + mkdir $REBOOT_CAUSE_DIR +fi + +echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE} + +# Best effort to write buffered data onto the disk +sync ; sync ; sync ; sleep 3 + +# CPLD CPU cold power-cycle +i2cset -f -y 2 0x32 0x18 0x0 + +# System should reboot by now and avoid the script returning to caller +sleep 10 + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_post_device_create.sh new file mode 100755 index 000000000000..9fd8364e23b6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_post_device_create.sh @@ -0,0 +1,22 @@ +#!/bin/bash + +# Enable FAN WDT +sudo i2cset -y -f 2 0x32 0x30 0x01 + +# Set all FAN speed to 100% +sudo i2cset -y -f 2 0x32 0x32 0xff +sudo i2cset -y -f 2 0x32 0x36 0xff +sudo i2cset -y -f 2 0x32 0x3a 0xff + +# Set FAN LED status to GREEN +sudo i2cset -y -f 2 0x32 0x33 0x2 +sudo i2cset -y -f 2 0x32 0x37 0x2 +sudo i2cset -y -f 2 0x32 0x3b 0x2 + +# Set Alarm LED status to OFF, since it is unused in SONiC +sudo i2cset -y -f 2 0x32 0x44 0x00 + +# Set SYS LED status to GREEN +sudo i2cset -y -f 2 0x32 0x43 0xec + +echo -2 | tee /sys/bus/i2c/drivers/pca954x/*-00*/idle_state diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_pre_driver_install.sh similarity index 70% rename from platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_pre_driver_install.sh rename to platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_pre_driver_install.sh index 2b37a5d5f6ff..39b055c1e55a 100755 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_pre_driver_install.sh +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_pre_driver_install.sh @@ -1,5 +1,5 @@ #!/bin/bash -modprobe -r i2c_ismt +modprobe -r i2c_ismt sleep 0.1 modprobe -r i2c-i801 sleep 0.1 diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/service/ds1000-fan-control.service b/platform/broadcom/sonic-platform-modules-cel/ds1000/service/ds1000-fan-control.service new file mode 100644 index 000000000000..7269080b53bc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/service/ds1000-fan-control.service @@ -0,0 +1,17 @@ +[Unit] +Description=Ds1000 Fan Control service +After=pddf-platform-init.service +Requires=pddf-platform-init.service +BindsTo=pddf-platform-init.service + +[Service] +Type=simple +ExecStart=/usr/local/bin/ds1000_fanctld.py +KillSignal=SIGTERM +SuccessExitStatus=0 + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/systemd/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-cel/ds1000/systemd/pddf-platform-init.service new file mode 100644 index 000000000000..becd98ea602e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/systemd/pddf-platform-init.service @@ -0,0 +1,15 @@ +[Unit] +Description=PDDF module and device initialization service +Before=pmon.service watchdog-control.service ds1000-fan-control.service +Before=opennsl-modules.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/pddf_util.py install +ExecStop=/usr/local/bin/pddf_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target +WantedBy=opennsl-modules.service diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/utils/ds1000_fanctld.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/utils/ds1000_fanctld.py new file mode 100755 index 000000000000..9955568ac237 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/utils/ds1000_fanctld.py @@ -0,0 +1,346 @@ +#!/usr/bin/python3 +# +# Copyright (C) Celestica Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# 9/16/2021 (A.D.) +# ------------------------------------------------------------------ + +try: + import os + import sys + import getopt + import subprocess + import re + import time + import signal + from sonic_platform import platform + from sonic_py_common import daemon_base +except ImportError as e: + raise ImportError('%s - required module not found' % repr(e)) + +# Constants +NOMINAL_TEMP = 30 # degree C +MODULE_NAME = 'ds1000fanctld' +SP_LOW_TEMP = 0 +SP_HIGH_TEMP = 1 +SP_CRITICAL_TEMP = 2 +SP_FATAL_TEMP = 3 +SP_REF_TEMP = 4 +SP_FAN_SPEED = 5 +SP_VALIDATE = 6 + +# Daemon control platform specific constants +PDDF_INIT_WAIT = 30 #secs +POLL_INTERVAL = 10 #secs +CRITICAL_DURATION = 120 #secs +CRITICAL_LOG_INTERVAL = 20 #every 'n' secs +FAN_DUTY_MIN = 40 # percentage +FAN_DUTY_MAX = 100 #percentage +TEMP_HYST = 3 # degree C +NUM_FANS = 3 + +# Validation functions +def valid_if_exhaust(fan_dir): + if fan_dir == "EXHAUST": + return True + + return False + +def valid_if_intake(fan_dir): + if fan_dir == "INTAKE": + return True + + return False + +def valid_always(fan_dir): + return True + +def valid_never(fan_dir): + return False + +# Core data for Thermal FAN speed evaluation +# {: [low_temp, high_temp, critical_temp, fatal_temp, current_temp, fanspeed, validate_function]} +SENSOR_PARAM = { + 'Front Right Temp': [34, 47, None, None, NOMINAL_TEMP, FAN_DUTY_MIN, valid_if_exhaust], + 'Front Left Temp': [None, None, None, None, NOMINAL_TEMP, FAN_DUTY_MIN, valid_never], + 'Rear Right Temp': [34, 47, None, None, NOMINAL_TEMP, FAN_DUTY_MIN, valid_if_intake], + 'ASIC External Temp': [54, 69, 105, 110, NOMINAL_TEMP, FAN_DUTY_MIN, valid_always], + 'CPU Internal Temp': [69, 84, 91, 94, NOMINAL_TEMP, FAN_DUTY_MIN, valid_always] +} + +class Ds1000FanControl(daemon_base.DaemonBase): + global MODULE_NAME + global SENSOR_PARAM + + def __init__(self, log_level): + + str_to_log_level = { + 'ERROR' : self.LOG_PRIORITY_ERROR, \ + 'WARNING' : self.LOG_PRIORITY_WARNING, \ + 'NOTICE': self.LOG_PRIORITY_NOTICE, \ + 'INFO': self.LOG_PRIORITY_INFO, \ + 'DEBUG': self.LOG_PRIORITY_DEBUG + } + self.fan_list = [] + self.thermal_list = [] + + super(Ds1000FanControl, self).__init__(MODULE_NAME) + if log_level is not None: + self.set_min_log_priority(str_to_log_level.get(log_level)) + self.log_info("Forcing to loglevel {}".format(log_level)) + self.log_info("Starting up...") + + self.log_debug("Waiting {} secs for PDDF driver initialization".format(PDDF_INIT_WAIT)) + time.sleep(PDDF_INIT_WAIT) + + try: + self.critical_period = 0 + self.platform_chassis = platform.Platform().get_chassis() + + # Fetch FAN info + self.fan_list = self.platform_chassis.get_all_fans() + if len(self.fan_list) != NUM_FANS: + self.log_error("Fans detected({}) is not same as expected({}), so exiting..."\ + .format(len(self.fan_list), NUM_FANS)) + sys.exit(1) + + self.fan_dir = self.fan_list[0].get_direction() + self.log_debug("Fans direction is {}".format(self.fan_dir)) + + # Fetch THERMAL info + self.thermal_list = self.platform_chassis.get_all_thermals() + if len(self.thermal_list) != len(SENSOR_PARAM): + self.log_error("Thermals detected({}) is not same as expected({}), so exiting..."\ + .format(len(self.thermal_list), len(SENSOR_PARAM))) + sys.exit(1) + + # Initialize the thermal temperature dict + # {: [thermal_temp, fanspeed]} + for thermal in self.thermal_list: + thermal_name = thermal.get_name() + SENSOR_PARAM[thermal_name][SP_REF_TEMP] = thermal.get_temperature() + + except Exception as e: + self.log_error("Failed to init Ds1000FanControl due to {}, so exiting...".format(repr(e))) + sys.exit(1) + + # Signal handler + def signal_handler(self, sig, frame): + if sig == signal.SIGHUP: + self.log_notice("Caught SIGHUP - ignoring...") + elif sig == signal.SIGINT: + self.log_warning("Caught SIGINT - Setting all FAN speed to max({}%) and exiting... ".format(FAN_DUTY_MAX)) + self.set_all_fan_speed(FAN_DUTY_MAX) + sys.exit(0) + elif sig == signal.SIGTERM: + self.log_warning("Caught SIGTERM - Setting all FAN speed to max({}%) and exiting... ".format(FAN_DUTY_MAX)) + self.set_all_fan_speed(FAN_DUTY_MAX) + sys.exit(0) + else: + self.log_notice("Caught unhandled signal '" + sig + "'") + + + @staticmethod + def is_fan_operational(fan): + if fan.get_presence() and fan.get_status(): + return True + + return False + + @staticmethod + def get_speed_from_min_max(cur_temp, min_temp, max_temp, min_speed, max_speed): + if cur_temp <= min_temp: + speed = min_speed + elif cur_temp >= max_temp: + speed = max_speed + else: + multiplier = (max_speed - min_speed) / (max_temp - min_temp) + speed = int(((cur_temp - min_temp) * multiplier) + min_speed) + + return speed + + def thermal_shutdown(self, reason): + cmd = ['/usr/local/bin/ds1000_platform_shutdown.sh', reason] + + proc = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True) + proc.communicate() + if proc.returncode == 0: + return True + else: + self.log_error("Thermal {} shutdown failed with errorno {}"\ + .format(reason, proc.returncode)) + return False + + def get_fan_speed_from_thermals(self): + prominent_speed = FAN_DUTY_MIN + is_critical = False + + for thermal in self.thermal_list: + speed = prominent_speed + thermal_name = thermal.get_name() + thermal_temp = thermal.get_temperature() + thermal_info = SENSOR_PARAM[thermal_name] + thermal_ref = thermal_info[SP_REF_TEMP] + thermal_low = thermal_info[SP_LOW_TEMP] + thermal_high = thermal_info[SP_HIGH_TEMP] + thermal_critical = thermal_info[SP_CRITICAL_TEMP] + thermal_fatal = thermal_info[SP_FATAL_TEMP] + + if thermal_info[SP_VALIDATE](self.fan_dir): + self.log_debug("{} temperature is {}C".format(thermal_name, thermal_temp)) + if thermal_temp <= thermal_low: + SENSOR_PARAM[thermal_name][SP_REF_TEMP] = thermal_low + speed = FAN_DUTY_MIN + elif thermal_temp >= thermal_high: + SENSOR_PARAM[thermal_name][SP_REF_TEMP] = thermal_high + speed = FAN_DUTY_MAX + if thermal_fatal and thermal_temp >= thermal_fatal: + # Double check since immediate cold power-cycle + # is an expensive operation in field + if thermal.get_temperature() >= thermal_fatal: + self.log_warning("'{}' temperature ({}C) hit fatal limit ({}C)."\ + " Triggering immediate cold power-cycle"\ + .format(thermal_name, thermal_temp, thermal_fatal)) + self.thermal_shutdown('temp_fatal') + sys.exit(0) + else: + self.log_warning("'{}' temperature ({}C) hit fatal limit ({}C) intermittently"\ + .format(thermal_name, thermal_temp, thermal_fatal)) + elif thermal_critical and thermal_temp >= thermal_critical: + if self.critical_period < CRITICAL_DURATION: + if self.critical_period % CRITICAL_LOG_INTERVAL == 0: + self.log_warning("'{}' temperature ({}C) hit critical limit ({}C)."\ + " Triggering cold power-cycle in {} seconds"\ + .format(thermal_name, thermal_temp, thermal_critical,\ + (CRITICAL_DURATION - self.critical_period))) + is_critical = True + else: + self.log_warning("'{}' temperature ({}C) is in critical limit ({}C) for more"\ + " than {} seconds. Triggering cold power-cycle now"\ + .format(thermal_name, thermal_temp, thermal_critical,\ + CRITICAL_DURATION)) + self.thermal_shutdown('temp_critical') + sys.exit(0) + + else: + if thermal_temp > thermal_ref: + SENSOR_PARAM[thermal_name][SP_REF_TEMP] = thermal_temp + speed = self.get_speed_from_min_max(thermal_temp, thermal_low, thermal_high,\ + FAN_DUTY_MIN, FAN_DUTY_MAX) + elif thermal_ref - thermal_temp >= TEMP_HYST: + SENSOR_PARAM[thermal_name][SP_REF_TEMP] = thermal_temp + 1 + speed = self.get_speed_from_min_max(thermal_temp + 1, thermal_low, thermal_high,\ + FAN_DUTY_MIN, FAN_DUTY_MAX) + else: + speed = SENSOR_PARAM[thermal_name][SP_FAN_SPEED] + + self.log_debug("{} thermal speed is {}%".format(thermal_name, speed)) + SENSOR_PARAM[thermal_name][SP_FAN_SPEED] = speed + prominent_speed = max(prominent_speed, speed) + + if is_critical: + self.critical_period = self.critical_period + POLL_INTERVAL + elif self.critical_period > 0: + self.critical_period = 0 + self.log_notice("All thermals are now below critical limit."\ + " System cold power-cycle is now cancelled") + + self.log_debug("Prominent thermal speed is {}%".format(prominent_speed)) + + return prominent_speed + + def set_all_fan_speed(self, speed): + for fan in self.fan_list: + fan_name = fan.get_name() + try: + if fan.set_speed(speed): + self.log_debug("Set {} speed to {}%".format(fan_name, speed)) + else: + self.log_error("Set '{}' to speed {}% failed".format(fan_name, speed)) + except Exception as e: + self.log_error("Set '{}' to speed {}% failed due to {}".format(fan_name, speed, repr(e))) + + return False + + def run(self): + while True: + num_good_fans = 0 + dir_mismatch = False + for fan in self.fan_list: + if self.is_fan_operational(fan): + num_good_fans = num_good_fans + 1 + else: + self.log_notice("FAN '{}' is broken or not inserted".format(fan.get_name())) + + if self.fan_dir is None: + self.fan_dir = fan.get_direction() + elif self.fan_dir != fan.get_direction(): + dir_mismatch = True + self.log_debug("{} FANs are operational, there is{}direction mismatch"\ + .format('All' if num_good_fans == len(self.fan_list) else num_good_fans, + ' ' if dir_mismatch else ' no ')) + + # Always evaluate the thermals irrespective of the FAN state + speed = self.get_fan_speed_from_thermals() + + if dir_mismatch: + self.log_warning("Some FANs have incompatible direction. Please replace FANs immediately") + else: + if num_good_fans == len(self.fan_list): # Good FANs is equal to number of FANs + self.set_all_fan_speed(speed) + else: + if not num_good_fans: # None of the FANs are operational + self.log_warning("Overheating hazard!! All FANs are broken or not inserted") + else: + self.log_warning("Some FANs are broken or not inserted") + self.set_all_fan_speed(FAN_DUTY_MAX) + + time.sleep(POLL_INTERVAL) + +def main(argv): + log_level = None + valid_log_levels = ['ERROR', 'WARNING', 'NOTICE', 'INFO', 'DEBUG'] + + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv, 'hdl', ['log-level=']) + except getopt.GetoptError: + print('Usage: %s [-d] [-l ]' % sys.argv[0]) + sys.exit(1) + for opt, arg in opts: + if opt == '-h': + print('Usage: %s [-d] [-l ]\nlog_level - ERROR, WARNING, NOTICE, INFO, DEBUG' % sys.argv[0]) + sys.exit(1) + elif opt in ('-l', '--log-level'): + if log_level not in valid_log_levels: + print('Invalid log level %s' % arg) + sys.exit(1) + elif opt == '-d': + log_level = 'DEBUG' + + fanctl = Ds1000FanControl(log_level) + + fanctl.log_debug("Start daemon main loop") + # Loop forever, doing something useful hopefully: + fanctl.run() + fanctl.log_debug("Stop daemon main loop") + + sys.exit(0) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/classes/__init__.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/classes/__init__.py new file mode 100755 index 000000000000..e69de29bb2d1 diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/Makefile new file mode 100644 index 000000000000..51583c9fbbce --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/Makefile @@ -0,0 +1,5 @@ +TARGET:= pddf_custom_psu_driver_module +$(TARGET)-objs := ./psu_driver/pddf_psu_api.o ./psu_driver/pddf_psu_driver.o + +obj-m := $(TARGET).o +obj-m += mc24lc64t.o pddf_custom_fpga_algo.o pddf_custom_fpga_extend.o lpc_basecpld.o diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/lpc_basecpld.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/lpc_basecpld.c new file mode 100644 index 000000000000..f925b5d84564 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/lpc_basecpld.c @@ -0,0 +1,720 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * lpc_basecpld.c - The CPLD driver for the Base Board of ds2000 + * The driver implement sysfs to access CPLD register on the baseboard of ds2000 via LPC bus. + * + * Author: Nicholas Wu /Oscar Xu + * Copyright (C) 2022-2024 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "sys_cpld" +/** + * CPLD register address for read and write. + */ +#define VERSION_ADDR 0xA100 +#define SCRATCH_ADDR 0xA101 +#define PSU_LED_ADDR 0xA161 +#define SYS_LED_ADDR 0xA162 +#define ALARM_LED_ADDR 0xA163 +#define FAN_LED_ADDR 0xA165 +#define COME_CPLD_VER_ADDR 0xA1E0 + +#define CPLD_REGISTER_SIZE 0xFF + +/* LED CTRL */ + +enum FAN_LED { + fan_led_amb = 1, + fan_led_grn, + fan_led_off, + fan_led_auto = 0x10 +} fan_led; + +enum SYS_LED { + sys_led_both = 0, + sys_led_grn, + sys_led_amb, + sys_led_off +} sys_led; + +enum PWR_LED { + pwr_led_amb = 1, + pwr_led_grn, + pwr_led_off, + pwr_led_auto = 0x10 +} pwr_led; + +enum ALARM_LED { + alarm_led_both = 0, + alarm_led_grn, + alarm_led_amb, + alarm_led_off +} alarm_led; + +enum LED_CTRL { + led_on = 0, + led_blk_1hz, + led_blk_4hz, + led_off +} led_ctrl; + +#define LED_OFF "off" +#define LED_GREEN "green" +#define LED_AMBER "amber" +#define LED_HZ_GBNK "grn_bnk_1hz" +#define LED_HZ_ABNK "amb_bnk_1hz" +#define LED_QHZ_GBNK "grn_bnk_4hz" +#define LED_QHZ_ABNK "amb_bnk_4hz" +#define LED_HZ_GABNK "grn_amb_1hz" +#define LED_QHZ_GABNK "grn_amb_4hz" + +struct cpld_b_data { + struct mutex cpld_lock; + uint16_t read_addr; +}; + +struct cpld_b_data *cpld_data; + +/** + * Read the value from scratch register as hex string. + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t scratch_show(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + + mutex_lock(&cpld_data->cpld_lock); + data = inb(SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + + return sprintf(buf, "0x%2.2x\n", data); +} + +/** + * Set scratch register with specific hex string. + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t scratch_store(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + int ret = 0; + unsigned long data; + + mutex_lock(&cpld_data->cpld_lock); + ret = kstrtoul(buf, 0, &data); + if (ret != 0) { + mutex_unlock(&cpld_data->cpld_lock); + return ret; + } + outb(data, SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + + return count; +} + +/* CPLD version attributes */ +static ssize_t version_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int len = 0; + unsigned char value = 0; + + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + value = inb(VERSION_ADDR); + len = sprintf(buf, "%d.%d\n", value >> 4, value & 0x0F); + mutex_unlock(&cpld_data->cpld_lock); + + return len; +} + + +static ssize_t getreg_store(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + int ret = 0; + unsigned long addr; + + ret = kstrtoul(buf, 0, &addr); + if (ret != 0) { + return ret; + } + cpld_data->read_addr = addr; + + return count; +} + +static ssize_t getreg_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int len = 0; + + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + len = sprintf(buf, "0x%2.2x\n", inb(cpld_data->read_addr)); + mutex_unlock(&cpld_data->cpld_lock); + + return len; +} + +static ssize_t setreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + int ret = 0; + unsigned long addr; + unsigned long value; + char *tok; + char clone[20]; + char *pclone = clone; + + strscpy(clone, buf,sizeof(clone)); + + mutex_lock(&cpld_data->cpld_lock); + tok = strsep((char **)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + ret = kstrtoul(tok, 0, &addr); + if (ret != 0) { + mutex_unlock(&cpld_data->cpld_lock); + return ret; + } + + tok = strsep((char **)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + ret = kstrtoul(tok, 0, &value); + if (ret != 0) { + mutex_unlock(&cpld_data->cpld_lock); + return ret; + } + outb(value, addr); + mutex_unlock(&cpld_data->cpld_lock); + + return count; +} + +/** + * Read all CPLD register in binary mode. + * @return number of byte read. + */ +static ssize_t dump_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + unsigned long i = 0; + ssize_t status; + + mutex_lock(&cpld_data->cpld_lock); +begin: + if (i < count) { + buf[i++] = inb(VERSION_ADDR + off); + off++; + msleep(1); + goto begin; + } + status = count; + mutex_unlock(&cpld_data->cpld_lock); + + return status; +} + +/** + * @brief Show status led + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return led state - off/on/blink + */ +static ssize_t sys_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + unsigned char color = 0; + unsigned char control = 0; + + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + color = (data & 0x30) >> 4; + control = (data & 0x3); + + switch(color){ + case sys_led_both: + if ( control == led_blk_1hz){ + return sprintf(buf, "%s\n", LED_HZ_GABNK); + }else if(control == led_blk_4hz){ + return sprintf(buf, "%s\n", LED_QHZ_GABNK); + }else{ + break; + } + case sys_led_amb: + if ( control == led_blk_1hz){ + return sprintf(buf, "%s\n", LED_HZ_ABNK); + }else if(control == led_blk_4hz){ + return sprintf(buf, "%s\n", LED_QHZ_ABNK); + }else if(control == led_on){ + return sprintf(buf, "%s\n", LED_AMBER); + }else{ + break; + } + case sys_led_grn: + if ( control == led_blk_1hz){ + return sprintf(buf, "%s\n", LED_HZ_GBNK); + }else if(control == led_blk_4hz){ + return sprintf(buf, "%s\n", LED_QHZ_GBNK); + }else if(control == led_on){ + return sprintf(buf, "%s\n", LED_GREEN); + }else{ + break; + } + default: + break; + } + + return sprintf(buf, "%s\n", LED_OFF); +} + +/** + * @brief Set the status led + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value - off/on/blink + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t sys_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char data; + + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + if(sysfs_streq(buf, LED_OFF)){ + data &= 0xCC; + data |= sys_led_off << 4; + data |= led_off; + }else if(sysfs_streq(buf, LED_GREEN)){ + data &= 0xCC; + data |= sys_led_grn << 4; + data |= led_on; + }else if(sysfs_streq(buf, LED_AMBER)){ + data &= 0xCC; + data |= sys_led_amb << 4; + data |= led_on; + }else if(sysfs_streq(buf, LED_HZ_GBNK)){ + data &= 0xCC; + data |= sys_led_grn << 4; + data |= led_blk_1hz; + }else if(sysfs_streq(buf, LED_HZ_ABNK)){ + data &= 0xCC; + data |= sys_led_amb << 4; + data |= led_blk_1hz; + }else if(sysfs_streq(buf, LED_QHZ_GBNK)){ + data &= 0xCC; + data |= sys_led_grn << 4; + data |= led_blk_4hz; + }else if(sysfs_streq(buf, LED_QHZ_ABNK)){ + data &= 0xCC; + data |= sys_led_amb << 4; + data |= led_blk_4hz; + }else if(sysfs_streq(buf, LED_HZ_GABNK)){ + data &= 0xCC; + data |= sys_led_both << 4; + data |= led_blk_1hz; + }else if(sysfs_streq(buf, LED_QHZ_GABNK)){ + data &= 0xCC; + data |= sys_led_both << 4; + data |= led_blk_4hz; + }else{ + count = -EINVAL; + } + + outb(data, SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} + +/** + * @brief Show alarm led + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return led state - off/on/blink + */ +static ssize_t alarm_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + unsigned char color = 0; + unsigned char control = 0; + + mutex_lock(&cpld_data->cpld_lock); + data = inb(ALARM_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + color = (data & 0x30) >> 4; + control = (data & 0x3); + + switch(color){ + case alarm_led_both: + if ( control == led_blk_1hz){ + return sprintf(buf, "%s\n", LED_HZ_GABNK); + }else if(control == led_blk_4hz){ + return sprintf(buf, "%s\n", LED_QHZ_GABNK); + }else{ + break; + } + case alarm_led_amb: + if ( control == led_blk_1hz){ + return sprintf(buf, "%s\n", LED_HZ_ABNK); + }else if(control == led_blk_4hz){ + return sprintf(buf, "%s\n", LED_QHZ_ABNK); + }else if(control == led_on){ + return sprintf(buf, "%s\n", LED_AMBER); + }else{ + break; + } + case alarm_led_grn: + if ( control == led_blk_1hz){ + return sprintf(buf, "%s\n", LED_HZ_GBNK); + }else if(control == led_blk_4hz){ + return sprintf(buf, "%s\n", LED_QHZ_GBNK); + }else if(control == led_on){ + return sprintf(buf, "%s\n", LED_GREEN); + }else{ + break; + } + default: + break; + } + + return sprintf(buf, "%s\n", LED_OFF); +} + +/** + * @brief Set the alarm led + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value - off/on/blink + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t alarm_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char data; + + mutex_lock(&cpld_data->cpld_lock); + data = inb(ALARM_LED_ADDR); + if(sysfs_streq(buf, LED_OFF)){ + data &= 0xCC; + data |= alarm_led_off << 4; + data |= led_off; + }else if(sysfs_streq(buf, LED_GREEN)){ + data &= 0xCC; + data |= alarm_led_grn << 4; + data |= led_on; + }else if(sysfs_streq(buf, LED_AMBER)){ + data &= 0xCC; + data |= alarm_led_amb << 4; + data |= led_on; + }else if(sysfs_streq(buf, LED_HZ_GBNK)){ + data &= 0xCC; + data |= alarm_led_grn << 4; + data |= led_blk_1hz; + }else if(sysfs_streq(buf, LED_HZ_ABNK)){ + data &= 0xCC; + data |= alarm_led_amb << 4; + data |= led_blk_1hz; + }else if(sysfs_streq(buf, LED_QHZ_GBNK)){ + data &= 0xCC; + data |= alarm_led_grn << 4; + data |= led_blk_4hz; + }else if(sysfs_streq(buf, LED_QHZ_ABNK)){ + data &= 0xCC; + data |= alarm_led_amb << 4; + data |= led_blk_4hz; + }else if(sysfs_streq(buf, LED_HZ_GABNK)){ + data &= 0xCC; + data |= alarm_led_both << 4; + data |= led_blk_1hz; + }else if(sysfs_streq(buf, LED_QHZ_GABNK)){ + data &= 0xCC; + data |= alarm_led_both << 4; + data |= led_blk_4hz; + + }else{ + count = -EINVAL; + } + + outb(data, ALARM_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} + +static ssize_t pwr_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + + mutex_lock(&cpld_data->cpld_lock); + data = inb(PSU_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + if ((data & 0x10) != 0) + { + return sprintf(buf, "%s\n", "auto"); + } + data = data & 0x3; + return sprintf(buf, "%s\n", + data == pwr_led_grn ? "green" : data == pwr_led_amb ? "amber" : "off"); +} + + +static ssize_t pwr_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status, data; + + if (sysfs_streq(buf, "off")) { + led_status = pwr_led_off; + } else if (sysfs_streq(buf, "green")) { + led_status = pwr_led_grn; + } else if (sysfs_streq(buf, "amber")) { + led_status = pwr_led_amb; + } else if (sysfs_streq(buf, "auto")) { + led_status = pwr_led_auto; + } else { + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(PSU_LED_ADDR); + /* Set bit 4 as 0 to control pwrled by software */ + data = data & ~(0x13); + data = data | led_status; + outb(data, PSU_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} + +static ssize_t fan_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + + mutex_lock(&cpld_data->cpld_lock); + data = inb(FAN_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + if ((data & 0x10) != 0) + { + return sprintf(buf, "%s\n", "auto"); + } + data = data & 0x3; + return sprintf(buf, "%s\n", + data == fan_led_grn ? "green" : data == fan_led_amb ? "amber" : "off"); +} + + +static ssize_t fan_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status, data; + + if (sysfs_streq(buf, "off")) { + led_status = fan_led_off; + } else if (sysfs_streq(buf, "green")) { + led_status = fan_led_grn; + } else if (sysfs_streq(buf, "amber")) { + led_status = fan_led_amb; + } else if (sysfs_streq(buf, "auto")) { + led_status = fan_led_auto; + } else { + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(FAN_LED_ADDR); + /* Set bit 4 as 0 to control fanled by software */ + data = data & ~(0x13); + data = data | led_status; + outb(data, FAN_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} + +/* COME CPLD version attributes */ +static ssize_t come_cpld_version_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = -EIO; + // COME CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + len = sprintf(buf, "0x%2.2x\n",inb(COME_CPLD_VER_ADDR)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} + +static BIN_ATTR_RO(dump, CPLD_REGISTER_SIZE); +static DEVICE_ATTR_RO(version); +static DEVICE_ATTR_RW(scratch); +static DEVICE_ATTR_RW(getreg); +static DEVICE_ATTR_WO(setreg); +static DEVICE_ATTR_RW(sys_led); +static DEVICE_ATTR_RW(alarm_led); +static DEVICE_ATTR_RW(pwr_led); +static DEVICE_ATTR_RW(fan_led); +static DEVICE_ATTR_RO(come_cpld_version); + +static struct attribute *cpld_b_attrs[] = { + &dev_attr_version.attr, + &dev_attr_scratch.attr, + &dev_attr_getreg.attr, + &dev_attr_setreg.attr, + &dev_attr_sys_led.attr, + &dev_attr_alarm_led.attr, + &dev_attr_pwr_led.attr, + &dev_attr_fan_led.attr, + &dev_attr_come_cpld_version.attr, + NULL, +}; + +static struct bin_attribute *cpld_b_bin_attrs[] = { + &bin_attr_dump, + NULL, +}; + +static struct attribute_group cpld_b_attrs_grp = { + .attrs = cpld_b_attrs, + .bin_attrs = cpld_b_bin_attrs, +}; + +static struct resource cpld_b_resources[] = { + { + .start = 0xA100, + .end = 0xA1FF, + .flags = IORESOURCE_IO, + }, +}; + +static void cpld_b_dev_release(struct device *dev) +{ + return; +} + +static struct platform_device cpld_b_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(cpld_b_resources), + .resource = cpld_b_resources, + .dev = { + .release = cpld_b_dev_release, + } +}; + +static int cpld_b_drv_probe(struct platform_device *pdev) +{ + struct resource *res; + int err = 0; + + cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct cpld_b_data), + GFP_KERNEL); + if (!cpld_data) + return -ENOMEM; + + mutex_init(&cpld_data->cpld_lock); + + cpld_data->read_addr = VERSION_ADDR; + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (unlikely(!res)) { + dev_err(&pdev->dev, "Specified Resource Not Available...\n"); + return -ENODEV; + } + + err = sysfs_create_group(&pdev->dev.kobj, &cpld_b_attrs_grp); + if (err) { + dev_err(&pdev->dev, "Cannot create sysfs for baseboard CPLD\n"); + return err; + } + return 0; +} + +static int cpld_b_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &cpld_b_attrs_grp); + return 0; +} + +static struct platform_driver cpld_b_drv = { + .probe = cpld_b_drv_probe, + .remove = __exit_p(cpld_b_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int cpld_b_init(void) +{ + // Register platform device and platform driver + platform_device_register(&cpld_b_dev); + platform_driver_register(&cpld_b_drv); + return 0; +} + +void cpld_b_exit(void) +{ + // Unregister platform device and platform driver + platform_driver_unregister(&cpld_b_drv); + platform_device_unregister(&cpld_b_dev); +} + +module_init(cpld_b_init); +module_exit(cpld_b_exit); + + +MODULE_AUTHOR("Celestica Inc."); +MODULE_DESCRIPTION("LPC CPLD baseboard driver"); +MODULE_VERSION("0.0.2"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/mc24lc64t.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/mc24lc64t.c new file mode 100644 index 000000000000..4603b3d41065 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/mc24lc64t.c @@ -0,0 +1,171 @@ +/* + * mc24lc64t.c - driver for Microchip 24LC64T + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define EEPROM_SIZE 8192 //mc24lt64t eeprom size in bytes. + +struct mc24lc64t_data { + struct mutex update_lock; +}; + +static ssize_t mc24lc64t_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, read_time, i = 0; + int status; + + mutex_lock(&drvdata->update_lock); + + if (i2c_smbus_write_byte_data(client, off>>8, off)) + { + status = -EIO; + goto exit; + } + + msleep(1); + +begin: + + if (i < count) + { + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + do { + read_time = jiffies; + + status = i2c_smbus_read_byte(client); + if (status >= 0) + { + buf[i++] = status; + goto begin; + } + } while (time_before(read_time, timeout)); + + status = -ETIMEDOUT; + goto exit; + } + + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + + return status; +} + +static ssize_t mc24lc64t_write (struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count){ + + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, write_time, i = 0; + int status; + u16 value; + + mutex_lock(&drvdata->update_lock); + +begin: + if (i < count){ + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + value = (buf[i] << 8)| off; + do { + write_time = jiffies; + status = i2c_smbus_write_word_data(client, off>>8, value); + if (status >= 0) + { + // increase offset + off++; + // increase buffer index + i++; + goto begin; + } + } while (time_before(write_time, timeout)); + status = -ETIMEDOUT; + goto exit; + } + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + return status; +} + +static struct bin_attribute mc24lc64t_bit_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUGO, + }, + .size = EEPROM_SIZE, + .read = mc24lc64t_read, + .write = mc24lc64t_write, +}; + +static int mc24lc64t_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adapter = client->adapter; + struct mc24lc64t_data *drvdata; + int err; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA + | I2C_FUNC_SMBUS_READ_BYTE)) + return -EPFNOSUPPORT; + + if (!(drvdata = devm_kzalloc(&client->dev, + sizeof(struct mc24lc64t_data), GFP_KERNEL))) + return -ENOMEM; + + i2c_set_clientdata(client, drvdata); + mutex_init(&drvdata->update_lock); + + err = sysfs_create_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); + + return err; +} + +static void mc24lc64t_remove(struct i2c_client *client) +{ + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + sysfs_remove_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); +} + +static const struct i2c_device_id mc24lc64t_id[] = { + { "24lc64t", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mc24lc64t_id); + +static struct i2c_driver mc24lc64t_driver = { + .driver = { + .name = "mc24lc64t", + .owner = THIS_MODULE, + }, + .probe = mc24lc64t_probe, + .remove = mc24lc64t_remove, + .id_table = mc24lc64t_id, +}; + +module_i2c_driver(mc24lc64t_driver); + +MODULE_AUTHOR("Abhisit Sangjan "); +MODULE_DESCRIPTION("Microchip 24LC64T Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_algo.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_algo.c new file mode 100644 index 000000000000..32ed875df587 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_algo.c @@ -0,0 +1,631 @@ +/* +* +* Licensed under the GNU General Public License Version 2 +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +*/ + +/* +* pddf_xilinx_device_7021_algo.c +* Description: +* A sample i2c driver algorithms for Xilinx Corporation Device 7021 FPGA adapters +* +*********************************************************************************/ +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h" + +#define DEBUG 0 + +enum { + STATE_DONE = 0, + STATE_INIT, + STATE_ADDR, + STATE_ADDR10, + STATE_START, + STATE_WRITE, + STATE_READ, + STATE_STOP, + STATE_ERROR, +}; + +#define XIIC_MSB_OFFSET 0 +#define XIIC_REG_OFFSET (0x100 + XIIC_MSB_OFFSET) + +/* + * Register offsets in bytes from RegisterBase. Three is added to the + * base offset to access LSB (IBM style) of the word + */ +#define XIIC_CR_REG_OFFSET (0x00 + XIIC_REG_OFFSET) /* Control Register */ +#define XIIC_SR_REG_OFFSET (0x04 + XIIC_REG_OFFSET) /* Status Register */ +#define XIIC_DTR_REG_OFFSET (0x08 + XIIC_REG_OFFSET) /* Data Tx Register */ +#define XIIC_DRR_REG_OFFSET (0x0C + XIIC_REG_OFFSET) /* Data Rx Register */ +#define XIIC_ADR_REG_OFFSET (0x10 + XIIC_REG_OFFSET) /* Address Register */ +#define XIIC_TFO_REG_OFFSET (0x14 + XIIC_REG_OFFSET) /* Tx FIFO Occupancy */ +#define XIIC_RFO_REG_OFFSET (0x18 + XIIC_REG_OFFSET) /* Rx FIFO Occupancy */ +#define XIIC_TBA_REG_OFFSET (0x1C + XIIC_REG_OFFSET) /* 10 Bit Address reg */ +#define XIIC_RFD_REG_OFFSET (0x20 + XIIC_REG_OFFSET) /* Rx FIFO Depth reg */ +#define XIIC_GPO_REG_OFFSET (0x24 + XIIC_REG_OFFSET) /* Output Register */ + +/* Control Register masks */ +#define XIIC_CR_ENABLE_DEVICE_MASK 0x01 /* Device enable = 1 */ +#define XIIC_CR_TX_FIFO_RESET_MASK 0x02 /* Transmit FIFO reset=1 */ +#define XIIC_CR_MSMS_MASK 0x04 /* Master starts Txing=1 */ +#define XIIC_CR_DIR_IS_TX_MASK 0x08 /* Dir of tx. Txing=1 */ +#define XIIC_CR_NO_ACK_MASK 0x10 /* Tx Ack. NO ack = 1 */ +#define XIIC_CR_REPEATED_START_MASK 0x20 /* Repeated start = 1 */ +#define XIIC_CR_GENERAL_CALL_MASK 0x40 /* Gen Call enabled = 1 */ + +/* Status Register masks */ +#define XIIC_SR_GEN_CALL_MASK 0x01 /* 1=a mstr issued a GC */ +#define XIIC_SR_ADDR_AS_SLAVE_MASK 0x02 /* 1=when addr as slave */ +#define XIIC_SR_BUS_BUSY_MASK 0x04 /* 1 = bus is busy */ +#define XIIC_SR_MSTR_RDING_SLAVE_MASK 0x08 /* 1=Dir: mstr <-- slave */ +#define XIIC_SR_TX_FIFO_FULL_MASK 0x10 /* 1 = Tx FIFO full */ +#define XIIC_SR_RX_FIFO_FULL_MASK 0x20 /* 1 = Rx FIFO full */ +#define XIIC_SR_RX_FIFO_EMPTY_MASK 0x40 /* 1 = Rx FIFO empty */ +#define XIIC_SR_TX_FIFO_EMPTY_MASK 0x80 /* 1 = Tx FIFO empty */ + +/* Interrupt Status Register masks Interrupt occurs when... */ +#define XIIC_INTR_ARB_LOST_MASK 0x01 /* 1 = arbitration lost */ +#define XIIC_INTR_TX_ERROR_MASK 0x02 /* 1=Tx error/msg complete */ +#define XIIC_INTR_TX_EMPTY_MASK 0x04 /* 1 = Tx FIFO/reg empty */ +#define XIIC_INTR_RX_FULL_MASK 0x08 /* 1=Rx FIFO/reg=OCY level */ +#define XIIC_INTR_BNB_MASK 0x10 /* 1 = Bus not busy */ +#define XIIC_INTR_AAS_MASK 0x20 /* 1 = when addr as slave */ +#define XIIC_INTR_NAAS_MASK 0x40 /* 1 = not addr as slave */ +#define XIIC_INTR_TX_HALF_MASK 0x80 /* 1 = TX FIFO half empty */ + +/* The following constants specify the depth of the FIFOs */ +#define IIC_RX_FIFO_DEPTH 16 /* Rx fifo capacity */ +#define IIC_TX_FIFO_DEPTH 16 /* Tx fifo capacity */ + +/* + * Tx Fifo upper bit masks. + */ +#define XIIC_TX_DYN_START_MASK 0x0100 /* 1 = Set dynamic start */ +#define XIIC_TX_DYN_STOP_MASK 0x0200 /* 1 = Set dynamic stop */ + +/* + * The following constants define the register offsets for the Interrupt + * registers. There are some holes in the memory map for reserved addresses + * to allow other registers to be added and still match the memory map of the + * interrupt controller registers + */ +#define XIIC_IISR_OFFSET 0x20 /* Interrupt Status Register */ +#define XIIC_RESETR_OFFSET 0x40 /* Reset Register */ + +#define XIIC_RESET_MASK 0xAUL + +#define XIIC_PM_TIMEOUT 1000 /* ms */ +/* timeout waiting for the controller to respond */ +#define XIIC_I2C_TIMEOUT (msecs_to_jiffies(1000)) + +struct fpgalogic_i2c { + void __iomem *base; + u32 reg_shift; + u32 reg_io_width; + wait_queue_head_t wait; + struct i2c_msg *msg; + int pos; + int nmsgs; + int state; /* see STATE_ */ + int ip_clock_khz; + int bus_clock_khz; + void (*reg_set)(struct fpgalogic_i2c *i2c, int reg, u8 value); + u8 (*reg_get)(struct fpgalogic_i2c *i2c, int reg); + u32 timeout; + struct mutex lock; +}; +static struct fpgalogic_i2c fpgalogic_i2c[I2C_PCI_MAX_BUS]; +extern void __iomem * fpga_ctl_addr; +extern int (*ptr_fpgapci_read)(uint32_t); +extern int (*ptr_fpgapci_write)(uint32_t, uint32_t); +extern int (*pddf_i2c_pci_add_numbered_bus)(struct i2c_adapter *, int); +static int xiic_reinit(struct fpgalogic_i2c *i2c); + +void i2c_get_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_lock(&i2c->lock); +} + +/** + * i2c_release_mutex - release mutex + */ +void i2c_release_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_unlock(&i2c->lock); +} + +static inline void xiic_setreg32(struct fpgalogic_i2c *i2c, int reg, int value) +{ + (void)iowrite32(value, i2c->base + reg); +} + +static inline int xiic_getreg32(struct fpgalogic_i2c *i2c, int reg) +{ + u32 ret; + + ret = ioread32(i2c->base + reg); + + return ret; +} + +static inline void xiic_irq_clr(struct fpgalogic_i2c *i2c, u32 mask) +{ + u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + + xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask); +} + +static int xiic_clear_rx_fifo(struct fpgalogic_i2c *i2c) +{ + u8 sr; + unsigned long timeout; + + timeout = jiffies + XIIC_I2C_TIMEOUT; + for (sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET); + !(sr & XIIC_SR_RX_FIFO_EMPTY_MASK); + sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET)) { + xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + if (time_after(jiffies, timeout)) { + printk("Failed to clear rx fifo\n"); + return -ETIMEDOUT; + } + } + + return 0; +} + +/** + * Wait until something change in a given register + * @i2c: ocores I2C device instance + * @reg: register to query + * @mask: bitmask to apply on register value + * @val: expected result + * @timeout: timeout in jiffies + * + * Timeout is necessary to avoid to stay here forever when the chip + * does not answer correctly. + * + * Return: 0 on success, -ETIMEDOUT on timeout + */ +static int poll_wait(struct fpgalogic_i2c *i2c, + int reg, u8 mask, u8 val, + const unsigned long timeout) +{ + unsigned long j; + u8 status = 0; + + j = jiffies + timeout; + while (1) { + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, reg); + mutex_unlock(&i2c->lock); + if ((status & mask) == val) + break; + if (time_after(jiffies, j)) + return -ETIMEDOUT; + cpu_relax(); + cond_resched(); + } + return 0; +} + +/** + * Wait until is possible to process some data + * @i2c: ocores I2C device instance + * + * Used when the device is in polling mode (interrupts disabled). + * + * Return: 0 on success, -ETIMEDOUT on timeout + */ +static int ocores_poll_wait(struct fpgalogic_i2c *i2c) +{ + u8 mask = 0, status = 0; + int err = 0; + int val = 0; + int tmp = 0; + mutex_lock(&i2c->lock); + if (i2c->state == STATE_DONE) { + /* transfer is over */ + mask = XIIC_SR_BUS_BUSY_MASK; + } else if (i2c->state == STATE_WRITE || i2c->state == STATE_START){ + /* on going transfer */ + if (0 == i2c->msg->len){ + mask = XIIC_INTR_TX_ERROR_MASK; + } else { + mask = XIIC_SR_TX_FIFO_FULL_MASK; + } + } + else if (i2c->state == STATE_READ){ + /* on going receive */ + mask = XIIC_SR_TX_FIFO_EMPTY_MASK | XIIC_SR_RX_FIFO_EMPTY_MASK; + } + mutex_unlock(&i2c->lock); + // printk("Wait for: 0x%x\n", mask); + + /* + * once we are here we expect to get the expected result immediately + * so if after 50ms we timeout then something is broken. + */ + + if (1 == i2c->nmsgs && 0 == i2c->msg->len && i2c->state == STATE_START && !(i2c->msg->flags & I2C_M_RD)) { /* for i2cdetect I2C_SMBUS_QUICK mode*/ + err = poll_wait(i2c, XIIC_IISR_OFFSET, mask, mask, msecs_to_jiffies(50)); + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET); + mutex_unlock(&i2c->lock); + if (0 != err) { /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, means no such i2c device */ + err = 0; + } else { + err = -ETIMEDOUT; + } + } + else { + if (mask & XIIC_SR_TX_FIFO_EMPTY_MASK){ + err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, XIIC_SR_TX_FIFO_EMPTY_MASK, msecs_to_jiffies(50)); + mask &= ~XIIC_SR_TX_FIFO_EMPTY_MASK; + } + if (0 == err){ + err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, 0, msecs_to_jiffies(50)); + } + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + + if ((status & XIIC_INTR_ARB_LOST_MASK) || + ((status & XIIC_INTR_TX_ERROR_MASK) && + !(status & XIIC_INTR_RX_FULL_MASK) && + !(i2c->msg->flags & I2C_M_RD))) { /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, return */ + err = -ETIMEDOUT; + + if (status & XIIC_INTR_ARB_LOST_MASK) { + val = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET); + tmp = XIIC_CR_MSMS_MASK; + val &=(~tmp); + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val); + xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_ARB_LOST_MASK); + printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens\n", + __func__, XIIC_INTR_ARB_LOST_MASK); + } + if (status & XIIC_INTR_TX_ERROR_MASK) { + int sta = 0; + int cr = 0; + sta = xiic_getreg32(i2c,XIIC_SR_REG_OFFSET); + cr = xiic_getreg32(i2c,XIIC_CR_REG_OFFSET); + xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_TX_ERROR_MASK); + printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens; SR: bit 0x%x; CR: bit 0x%x\n", + __func__, status, sta, cr); + } + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + (void)xiic_reinit(i2c); + mutex_unlock(&i2c->lock); + return err; + } + mutex_unlock(&i2c->lock); + } + + return err; +} + +static void ocores_process(struct fpgalogic_i2c *i2c) +{ + struct i2c_msg *msg = i2c->msg; + //unsigned long flags; + u16 val; + + /* + * If we spin here because we are in timeout, so we are going + * to be in STATE_ERROR. See ocores_process_timeout() + */ + mutex_lock(&i2c->lock); + // printk("STATE: %d\n", i2c->state); + + if (i2c->state == STATE_START) { + i2c->state =(msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; + /* if it's the time sequence is 'start bit + address + read bit + stop bit' */ + if (i2c->state == STATE_READ){ + /* it's the last message so we include dynamic stop bit with length */ + val = msg->len | XIIC_TX_DYN_STOP_MASK; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val); + goto out; + } + } + if (i2c->state == STATE_READ){ + /* suit for I2C_FUNC_SMBUS_BLOCK_DATA */ + if (msg->flags & I2C_M_RECV_LEN) { + msg->len = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + msg->flags &= ~I2C_M_RECV_LEN; + msg->buf[i2c->pos++] = msg->len; + } + else { + msg->buf[i2c->pos++] = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + } + } else if (i2c->state == STATE_WRITE){ + /* if it reaches the last byte data to be sent */ + if ((i2c->pos == msg->len - 1) && (i2c->nmsgs == 1)){ + val = msg->buf[i2c->pos++] | XIIC_TX_DYN_STOP_MASK; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val); + i2c->state = STATE_DONE; + goto out; + /* if it is not the last byte data to be sent */ + } else if (i2c->pos < msg->len) { + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, msg->buf[i2c->pos++]); + goto out; + } + } + + /* end of msg? */ + if (i2c->pos == msg->len) { + i2c->nmsgs--; + i2c->pos = 0; + if (i2c->nmsgs) { + i2c->msg++; + msg = i2c->msg; + if (!(msg->flags & I2C_M_NOSTART)) /* send start? */{ + i2c->state = STATE_START; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msg) | XIIC_TX_DYN_START_MASK); + goto out; + } + } else { /* end? */ + i2c->state = STATE_DONE; + goto out; + } + } + +out: + mutex_unlock(&i2c->lock); + return ; +} + + +static int fpgai2c_poll(struct fpgalogic_i2c *i2c, + struct i2c_msg *msgs, int num) +{ + int ret = 0; + // u8 ctrl; + + mutex_lock(&i2c->lock); + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + /* Set receive Fifo depth to maximum (zero based). */ + xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1); + + /* Reset Tx Fifo. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); + + /* Enable IIC Device, remove Tx Fifo reset & disable general call. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_ENABLE_DEVICE_MASK); + + /* set i2c clock as 100Hz. */ + //xiic_setreg32(i2c, 0x13c, 0x7C); + + /* make sure RX fifo is empty */ + ret = xiic_clear_rx_fifo(i2c); + if (ret){ + mutex_unlock(&i2c->lock); + return ret; + } + + i2c->msg = msgs; + i2c->pos = 0; + i2c->nmsgs = num; + i2c->state = STATE_START; + + // printk("STATE: %d\n", i2c->state); + + if (msgs->len == 0 && num == 1){ /* suit for i2cdetect time sequence */ + u8 status = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + xiic_irq_clr(i2c, status); + /* send out the 1st byte data and stop bit */ + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK | XIIC_TX_DYN_STOP_MASK); + } else { + /* send out the 1st byte data */ + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK); + } + mutex_unlock(&i2c->lock); + while (1) { + int err; + + err = ocores_poll_wait(i2c); + if (err) { + i2c->state = STATE_ERROR; + break; + }else if (i2c->state == STATE_DONE){ + break; + } + ocores_process(i2c); + } + + return (i2c->state == STATE_DONE) ? num : -EIO; +} + +static int fpgai2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) +{ + struct fpgalogic_i2c *i2c = i2c_get_adapdata(adap); + int err = -EIO; + u8 retry = 0, max_retry = 0; + + if( ( (1 == msgs->len && (msgs->flags & I2C_M_RD)) || (0 == msgs->len && !(msgs->flags & I2C_M_RD)) ) && num == 1 ) /* I2C_SMBUS_QUICK or I2C_SMBUS_BYTE */ + max_retry = 1; + else + max_retry = 5; // retry 5 times if receive a NACK or other errors + while( (-EIO == err) && (retry < max_retry)) + { + err = fpgai2c_poll(i2c, msgs, num); + retry++; + } + + return err; + +} + +static u32 fpgai2c_func(struct i2c_adapter *adap) +{ +/* a typical full-I2C adapter would use the following */ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static const struct i2c_algorithm fpgai2c_algorithm= { + .master_xfer = fpgai2c_xfer, /*write I2C messages */ + .functionality = fpgai2c_func, /* what the adapter supports */ +}; + +static int xiic_reinit(struct fpgalogic_i2c *i2c) +{ + int ret; + int val = 0; + + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + + /* Set receive Fifo depth to maximum (zero based). */ + xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1); + + /* Reset Tx Fifo. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); + + /* Enable IIC Device, remove Tx Fifo reset & disable general call. */ + val |= XIIC_CR_ENABLE_DEVICE_MASK; + //val |= XIIC_CR_TX_FIFO_RESET_MASK; + //val |= XIIC_CR_MSMS_MASK; + val |= XIIC_CR_DIR_IS_TX_MASK; + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val); + + /* make sure RX fifo is empty */ + ret = xiic_clear_rx_fifo(i2c); + if (ret) + return ret; + + return 0; +} + +static int fpgai2c_init(struct fpgalogic_i2c *i2c) +{ + // int prescale; + // int diff; + // u8 ctrl; + int ret; + + + //i2c->reg_set = xiic_setreg32; + //i2c->reg_get = xiic_getreg32; + + ret = xiic_reinit(i2c); + if (ret < 0) { + printk("Cannot xiic_reinit\n"); + return ret; + } + + /* Initialize interrupt handlers if not already done */ + init_waitqueue_head(&i2c->wait); + return 0; +} + +static int adap_data_init(struct i2c_adapter *adap, int i2c_ch_index) +{ + struct fpgapci_devdata *pci_privdata = 0; + pci_privdata = (struct fpgapci_devdata*) dev_get_drvdata(adap->dev.parent); + + if (pci_privdata == 0) { + printk("[%s]: ERROR pci_privdata is 0\n", __FUNCTION__); + return -1; + } +#if DEBUG + pddf_dbg(FPGA, KERN_INFO "[%s] index: [%d] fpga_data__base_addr:0x%0x8lx" + " fpgapci_bar_len:0x%08lx fpga_i2c_ch_base_addr:0x%08lx ch_size=0x%x supported_i2c_ch=%d", + __FUNCTION__, i2c_ch_index, pci_privdata->fpga_data_base_addr, + pci_privdata->bar_length, pci_privdata->fpga_i2c_ch_base_addr, + pci_privdata->fpga_i2c_ch_size, pci_privdata->max_fpga_i2c_ch); +#endif + if (i2c_ch_index >= pci_privdata->max_fpga_i2c_ch || pci_privdata->max_fpga_i2c_ch > I2C_PCI_MAX_BUS) { + printk("[%s]: ERROR i2c_ch_index=%d max_ch_index=%d out of range: %d\n", + __FUNCTION__, i2c_ch_index, pci_privdata->max_fpga_i2c_ch, I2C_PCI_MAX_BUS); + return -1; + } +#ifdef __STDC_LIB_EXT1__ + memset_s(&fpgalogic_i2c[i2c_ch_index], sizeof(fpgalogic_i2c[0]), 0, sizeof(fpgalogic_i2c[0])); +#else + memset(&fpgalogic_i2c[i2c_ch_index], 0, sizeof(fpgalogic_i2c[0])); +#endif + + fpgalogic_i2c[i2c_ch_index].base = pci_privdata->fpga_i2c_ch_base_addr + + i2c_ch_index* pci_privdata->fpga_i2c_ch_size; + mutex_init(&fpgalogic_i2c[i2c_ch_index].lock); + fpgai2c_init(&fpgalogic_i2c[i2c_ch_index]); + + + adap->algo_data = &fpgalogic_i2c[i2c_ch_index]; + i2c_set_adapdata(adap, &fpgalogic_i2c[i2c_ch_index]); + return 0; +} + +static int pddf_i2c_pci_add_numbered_bus_default (struct i2c_adapter *adap, int i2c_ch_index) +{ + int ret = 0; + + adap_data_init(adap, i2c_ch_index); + adap->algo = &fpgai2c_algorithm; + + ret = i2c_add_numbered_adapter(adap); + return ret; +} + +/* + * FPGAPCI APIs + */ +int board_i2c_fpgapci_read(uint32_t offset) +{ + int data; + data=ioread32(fpga_ctl_addr+offset); + return data; +} + + +int board_i2c_fpgapci_write(uint32_t offset, uint32_t value) +{ + iowrite32(value, fpga_ctl_addr+offset); + return (0); +} + + +static int __init pddf_xilinx_device_7021_algo_init(void) +{ + pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__); + pddf_i2c_pci_add_numbered_bus = pddf_i2c_pci_add_numbered_bus_default; + ptr_fpgapci_read = board_i2c_fpgapci_read; + ptr_fpgapci_write = board_i2c_fpgapci_write; + return 0; +} + +static void __exit pddf_xilinx_device_7021_algo_exit(void) +{ + pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__); + + pddf_i2c_pci_add_numbered_bus = NULL; + ptr_fpgapci_read = NULL; + ptr_fpgapci_write = NULL; + return; +} + + +module_init (pddf_xilinx_device_7021_algo_init); +module_exit (pddf_xilinx_device_7021_algo_exit); +MODULE_DESCRIPTION("Xilinx Corporation Device 7021 FPGAPCIe I2C-Bus algorithm"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_extend.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_extend.c new file mode 100644 index 000000000000..4ea09f09404f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_extend.c @@ -0,0 +1,372 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * fpga-cls.c - front panel port control. + * + * Copyright (C) 2019 Celestica Corp. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h" + +#define FPGA_VERSION_ADDR 0x0000 +#define FPGA_SCRATCH_ADDR 0x0004 +#define FPGA_BCM_TEMP_ADDR 0x001c +#define FPGA_BCM_TEMP_LOW_ADDR 0x0078 +#define FPGA_BCM_TEMP_HIGH_ADDR 0x0080 +#define FPGA_REG_SPACE_SIZE 0x2000 + + +/* + * fpga_priv - port fpga private data + * @dev: device for reference + * @base: virtual base address + * @num_ports: number of front panel ports + * @fp_devs: list of front panel port devices + */ +struct fpga_priv { + void __iomem *base; + struct mutex fpga_lock; // For FPGA internal lock + void __iomem * fpga_read_addr; +}; + +extern void __iomem * fpga_ctl_addr; + +/** + * Show the value of the register set by 'set_fpga_reg_address' + * If the address is not set by 'set_fpga_reg_address' first, + * The version register is selected by default. + * @param buf register value in hextring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + // read data from the address + uint32_t data; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + data = ioread32(fpga->fpga_read_addr); + return sprintf(buf, "0x%8.8x\n", data); +} +/** + * Store the register address + * @param buf address wanted to be read value of + * @return number of bytes stored, or an error code + */ +static ssize_t set_fpga_reg_address(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t addr; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + addr = (uint32_t)strtoul(buf, &last, 16); + if (addr == 0 && buf == last) { + return -EINVAL; + } + fpga->fpga_read_addr = fpga->base + addr; + return count; +} +/** + * Show value of fpga scratch register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_scratch(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + + return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + FPGA_SCRATCH_ADDR) & 0xffffffff); +} +/** + * Store value of fpga scratch register + * @param buf scratch register value passing from user space + * @return number of bytes stored, or an error code + */ +static ssize_t set_fpga_scratch(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t data; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + data = (uint32_t)strtoul(buf, &last, 16); + if (data == 0 && buf == last) { + return -EINVAL; + } + iowrite32(data, fpga->base + FPGA_SCRATCH_ADDR); + return count; +} + +/** + * Show value of fpga version register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_version(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + + return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + FPGA_VERSION_ADDR) & 0xffffffff); +} + + +/** + * Store a value in a specific register address + * @param buf the value and address in format '0xhhhh 0xhhhhhhhh' + * @return number of bytes sent by user space, or an error code + */ +static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // register are 4 bytes + uint32_t addr; + uint32_t value; + uint32_t mode = 8; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + strscpy(clone, buf, count); + mutex_lock(&fpga->fpga_lock); + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + addr = (uint32_t)strtoul(tok, &last, 16); + if (addr == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + value = (uint32_t)strtoul(tok, &last, 16); + if (value == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mode = 32; + } else { + mode = (uint32_t)strtoul(tok, &last, 10); + if (mode == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + } + if (mode == 32) { + iowrite32(value, fpga->base + addr); + } else if (mode == 8) { + iowrite8(value, fpga->base + addr); + } else { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + mutex_unlock(&fpga->fpga_lock); + return count; +} + +/** + * Read all FPGA register in binary mode. + * @param buf Raw transceivers port startus and control register values + * @return number of bytes read, or an error code + */ +static ssize_t dump_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + unsigned long i = 0; + ssize_t status; + u8 read_reg; + struct device *dev = kobj_to_dev(kobj); + struct fpga_priv *fpga = dev_get_drvdata(dev); + + if ( off + count > FPGA_REG_SPACE_SIZE ) { + return -EINVAL; + } + mutex_lock(&fpga->fpga_lock); + while (i < count) { + read_reg = ioread8(fpga->base + off + i); + buf[i++] = read_reg; + } + status = count; + mutex_unlock(&fpga->fpga_lock); + return status; +} + +/** + * Show value of fpga bcm switch internal temp sensor register calculated by FPGA + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_bcm_temp_fpga(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + uint32_t reg_val = ioread32(fpga->base + FPGA_BCM_TEMP_ADDR) & 0x3ffff; + + return sprintf(buf, "0x%08x\n", reg_val); +} + +/** + * Show value of fpga bcm switch internal temp sensor register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_bcm_temp(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + u8 low_byte = ioread32(fpga->base + FPGA_BCM_TEMP_LOW_ADDR) & 0xff; + u8 high_byte = ioread32(fpga->base + FPGA_BCM_TEMP_HIGH_ADDR) & 0xff; + + return sprintf(buf, "0x%02x%02x\n", high_byte, low_byte); +} + +/* FPGA attributes */ +static DEVICE_ATTR( getreg, 0600, get_fpga_reg_value, set_fpga_reg_address); +static DEVICE_ATTR( setreg, 0200, NULL , set_fpga_reg_value); +static DEVICE_ATTR( scratch, 0600, get_fpga_scratch, set_fpga_scratch); +static DEVICE_ATTR( version, 0400, get_fpga_version, NULL); +static DEVICE_ATTR( bcm_temp_fpga, 0400, get_fpga_bcm_temp_fpga, NULL); +static DEVICE_ATTR( bcm_temp, 0400, get_fpga_bcm_temp, NULL); +static BIN_ATTR_RO( dump, FPGA_REG_SPACE_SIZE); + +static struct bin_attribute *fpga_bin_attrs[] = { + &bin_attr_dump, + NULL, +}; + +static struct attribute *fpga_attrs[] = { + &dev_attr_getreg.attr, + &dev_attr_scratch.attr, + &dev_attr_version.attr, + &dev_attr_bcm_temp_fpga.attr, + &dev_attr_bcm_temp.attr, + &dev_attr_setreg.attr, + NULL, +}; + +static struct attribute_group fpga_attr_grp = { + .attrs = fpga_attrs, + .bin_attrs = fpga_bin_attrs, +}; + + +static int cls_fpga_probe(struct platform_device *pdev) +{ + struct fpga_priv *fpga; + int ret = -ENOMEM; + + if (!fpga_ctl_addr){ + printk(KERN_WARNING, "fpga_ctl_addr is null"); + return ret; + } + + fpga = devm_kzalloc(&pdev->dev, sizeof(struct fpga_priv), GFP_KERNEL); + if (!fpga){ + ret = -ENOMEM; + goto err_exit; + } + + mutex_init(&fpga->fpga_lock); + dev_set_drvdata(&pdev->dev, fpga); + fpga->base = fpga_ctl_addr; + + printk("FPGA version: 0x%x\n", ioread32(fpga->base + FPGA_VERSION_ADDR)); + + ret = sysfs_create_group(&pdev->dev.kobj, &fpga_attr_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create FPGA system sysfs attributes\n"); + goto err_remove_fpga; + } + + return 0; + +err_remove_fpga: + sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp); +mem_unmap: + iounmap(fpga->base); +err_exit: + return ret; +} + +static int cls_fpga_remove(struct platform_device *pdev) +{ + struct fpga_priv *fpga = dev_get_drvdata(&pdev->dev); + + sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp); + iounmap(fpga->base); + return 0; +} + +static void fpga_dev_release( struct device * dev) +{ + return; +} +static struct resource cls_fpga_resources[] = { + { + .start = NULL, + .end = NULL, + .flags = IORESOURCE_IO, + }, +}; + +static struct platform_device cls_fpga_dev = { + .name = "fpga_sysfs", + .id = -1, + .num_resources = ARRAY_SIZE(cls_fpga_resources), + .resource = cls_fpga_resources, + .dev = { + .release = fpga_dev_release, + } +}; + +static struct platform_driver cls_fpga_driver = { + .probe = cls_fpga_probe, + .remove = cls_fpga_remove, + .driver = { + .name = "fpga_sysfs", + }, +}; + +static int __init drv_init(void) +{ + int rc = 0; + + rc = platform_device_register(&cls_fpga_dev); + rc += platform_driver_register(&cls_fpga_driver); + printk("fpga drv_init:%d\n", rc); + return rc; +} + +static void __exit drv_exit(void) +{ + platform_driver_unregister(&cls_fpga_driver); + platform_device_unregister(&cls_fpga_dev); + printk("fpga drv_exit.\n"); +} + +module_init(drv_init); +module_exit(drv_exit); + +MODULE_AUTHOR("Nicholas Wu"); +MODULE_DESCRIPTION("Celestica fpga access/control driver"); +MODULE_VERSION("2.0.0"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:cls-fpga"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pmbus.h new file mode 100644 index 000000000000..cb6dbe29c0bf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pmbus.h @@ -0,0 +1,504 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * pmbus.h - Common defines and structures for PMBus devices + * + * Copyright (c) 2010, 2011 Ericsson AB. + * Copyright (c) 2012 Guenter Roeck + */ + +#ifndef PMBUS_H +#define PMBUS_H + +#include +#include + +/* + * Registers + */ +enum pmbus_regs { + PMBUS_PAGE = 0x00, + PMBUS_OPERATION = 0x01, + PMBUS_ON_OFF_CONFIG = 0x02, + PMBUS_CLEAR_FAULTS = 0x03, + PMBUS_PHASE = 0x04, + + PMBUS_WRITE_PROTECT = 0x10, + + PMBUS_CAPABILITY = 0x19, + PMBUS_QUERY = 0x1A, + + PMBUS_VOUT_MODE = 0x20, + PMBUS_VOUT_COMMAND = 0x21, + PMBUS_VOUT_TRIM = 0x22, + PMBUS_VOUT_CAL_OFFSET = 0x23, + PMBUS_VOUT_MAX = 0x24, + PMBUS_VOUT_MARGIN_HIGH = 0x25, + PMBUS_VOUT_MARGIN_LOW = 0x26, + PMBUS_VOUT_TRANSITION_RATE = 0x27, + PMBUS_VOUT_DROOP = 0x28, + PMBUS_VOUT_SCALE_LOOP = 0x29, + PMBUS_VOUT_SCALE_MONITOR = 0x2A, + + PMBUS_COEFFICIENTS = 0x30, + PMBUS_POUT_MAX = 0x31, + + PMBUS_FAN_CONFIG_12 = 0x3A, + PMBUS_FAN_COMMAND_1 = 0x3B, + PMBUS_FAN_COMMAND_2 = 0x3C, + PMBUS_FAN_CONFIG_34 = 0x3D, + PMBUS_FAN_COMMAND_3 = 0x3E, + PMBUS_FAN_COMMAND_4 = 0x3F, + + PMBUS_VOUT_OV_FAULT_LIMIT = 0x40, + PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41, + PMBUS_VOUT_OV_WARN_LIMIT = 0x42, + PMBUS_VOUT_UV_WARN_LIMIT = 0x43, + PMBUS_VOUT_UV_FAULT_LIMIT = 0x44, + PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45, + PMBUS_IOUT_OC_FAULT_LIMIT = 0x46, + PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47, + PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48, + PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49, + PMBUS_IOUT_OC_WARN_LIMIT = 0x4A, + PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B, + PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C, + + PMBUS_OT_FAULT_LIMIT = 0x4F, + PMBUS_OT_FAULT_RESPONSE = 0x50, + PMBUS_OT_WARN_LIMIT = 0x51, + PMBUS_UT_WARN_LIMIT = 0x52, + PMBUS_UT_FAULT_LIMIT = 0x53, + PMBUS_UT_FAULT_RESPONSE = 0x54, + PMBUS_VIN_OV_FAULT_LIMIT = 0x55, + PMBUS_VIN_OV_FAULT_RESPONSE = 0x56, + PMBUS_VIN_OV_WARN_LIMIT = 0x57, + PMBUS_VIN_UV_WARN_LIMIT = 0x58, + PMBUS_VIN_UV_FAULT_LIMIT = 0x59, + + PMBUS_IIN_OC_FAULT_LIMIT = 0x5B, + PMBUS_IIN_OC_WARN_LIMIT = 0x5D, + + PMBUS_POUT_OP_FAULT_LIMIT = 0x68, + PMBUS_POUT_OP_WARN_LIMIT = 0x6A, + PMBUS_PIN_OP_WARN_LIMIT = 0x6B, + + PMBUS_STATUS_BYTE = 0x78, + PMBUS_STATUS_WORD = 0x79, + PMBUS_STATUS_VOUT = 0x7A, + PMBUS_STATUS_IOUT = 0x7B, + PMBUS_STATUS_INPUT = 0x7C, + PMBUS_STATUS_TEMPERATURE = 0x7D, + PMBUS_STATUS_CML = 0x7E, + PMBUS_STATUS_OTHER = 0x7F, + PMBUS_STATUS_MFR_SPECIFIC = 0x80, + PMBUS_STATUS_FAN_12 = 0x81, + PMBUS_STATUS_FAN_34 = 0x82, + + PMBUS_READ_VIN = 0x88, + PMBUS_READ_IIN = 0x89, + PMBUS_READ_VCAP = 0x8A, + PMBUS_READ_VOUT = 0x8B, + PMBUS_READ_IOUT = 0x8C, + PMBUS_READ_TEMPERATURE_1 = 0x8D, + PMBUS_READ_TEMPERATURE_2 = 0x8E, + PMBUS_READ_TEMPERATURE_3 = 0x8F, + PMBUS_READ_FAN_SPEED_1 = 0x90, + PMBUS_READ_FAN_SPEED_2 = 0x91, + PMBUS_READ_FAN_SPEED_3 = 0x92, + PMBUS_READ_FAN_SPEED_4 = 0x93, + PMBUS_READ_DUTY_CYCLE = 0x94, + PMBUS_READ_FREQUENCY = 0x95, + PMBUS_READ_POUT = 0x96, + PMBUS_READ_PIN = 0x97, + + PMBUS_REVISION = 0x98, + PMBUS_MFR_ID = 0x99, + PMBUS_MFR_MODEL = 0x9A, + PMBUS_MFR_REVISION = 0x9B, + PMBUS_MFR_LOCATION = 0x9C, + PMBUS_MFR_DATE = 0x9D, + PMBUS_MFR_SERIAL = 0x9E, + + PMBUS_MFR_VIN_MIN = 0xA0, + PMBUS_MFR_VIN_MAX = 0xA1, + PMBUS_MFR_IIN_MAX = 0xA2, + PMBUS_MFR_PIN_MAX = 0xA3, + PMBUS_MFR_VOUT_MIN = 0xA4, + PMBUS_MFR_VOUT_MAX = 0xA5, + PMBUS_MFR_IOUT_MAX = 0xA6, + PMBUS_MFR_POUT_MAX = 0xA7, + + PMBUS_IC_DEVICE_ID = 0xAD, + PMBUS_IC_DEVICE_REV = 0xAE, + + PMBUS_MFR_MAX_TEMP_1 = 0xC0, + PMBUS_MFR_MAX_TEMP_2 = 0xC1, + PMBUS_MFR_MAX_TEMP_3 = 0xC2, + +/* + * Virtual registers. + * Useful to support attributes which are not supported by standard PMBus + * registers but exist as manufacturer specific registers on individual chips. + * Must be mapped to real registers in device specific code. + * + * Semantics: + * Virtual registers are all word size. + * READ registers are read-only; writes are either ignored or return an error. + * RESET registers are read/write. Reading reset registers returns zero + * (used for detection), writing any value causes the associated history to be + * reset. + * Virtual registers have to be handled in device specific driver code. Chip + * driver code returns non-negative register values if a virtual register is + * supported, or a negative error code if not. The chip driver may return + * -ENODATA or any other error code in this case, though an error code other + * than -ENODATA is handled more efficiently and thus preferred. Either case, + * the calling PMBus core code will abort if the chip driver returns an error + * code when reading or writing virtual registers. + */ + PMBUS_VIRT_BASE = 0x100, + PMBUS_VIRT_READ_TEMP_AVG, + PMBUS_VIRT_READ_TEMP_MIN, + PMBUS_VIRT_READ_TEMP_MAX, + PMBUS_VIRT_RESET_TEMP_HISTORY, + PMBUS_VIRT_READ_VIN_AVG, + PMBUS_VIRT_READ_VIN_MIN, + PMBUS_VIRT_READ_VIN_MAX, + PMBUS_VIRT_RESET_VIN_HISTORY, + PMBUS_VIRT_READ_IIN_AVG, + PMBUS_VIRT_READ_IIN_MIN, + PMBUS_VIRT_READ_IIN_MAX, + PMBUS_VIRT_RESET_IIN_HISTORY, + PMBUS_VIRT_READ_PIN_AVG, + PMBUS_VIRT_READ_PIN_MIN, + PMBUS_VIRT_READ_PIN_MAX, + PMBUS_VIRT_RESET_PIN_HISTORY, + PMBUS_VIRT_READ_POUT_AVG, + PMBUS_VIRT_READ_POUT_MIN, + PMBUS_VIRT_READ_POUT_MAX, + PMBUS_VIRT_RESET_POUT_HISTORY, + PMBUS_VIRT_READ_VOUT_AVG, + PMBUS_VIRT_READ_VOUT_MIN, + PMBUS_VIRT_READ_VOUT_MAX, + PMBUS_VIRT_RESET_VOUT_HISTORY, + PMBUS_VIRT_READ_IOUT_AVG, + PMBUS_VIRT_READ_IOUT_MIN, + PMBUS_VIRT_READ_IOUT_MAX, + PMBUS_VIRT_RESET_IOUT_HISTORY, + PMBUS_VIRT_READ_TEMP2_AVG, + PMBUS_VIRT_READ_TEMP2_MIN, + PMBUS_VIRT_READ_TEMP2_MAX, + PMBUS_VIRT_RESET_TEMP2_HISTORY, + + PMBUS_VIRT_READ_VMON, + PMBUS_VIRT_VMON_UV_WARN_LIMIT, + PMBUS_VIRT_VMON_OV_WARN_LIMIT, + PMBUS_VIRT_VMON_UV_FAULT_LIMIT, + PMBUS_VIRT_VMON_OV_FAULT_LIMIT, + PMBUS_VIRT_STATUS_VMON, + + /* + * RPM and PWM Fan control + * + * Drivers wanting to expose PWM control must define the behaviour of + * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the + * {read,write}_word_data callback. + * + * pmbus core provides a default implementation for + * PMBUS_VIRT_FAN_TARGET_[1-4]. + * + * TARGET, PWM and PWM_ENABLE members must be defined sequentially; + * pmbus core uses the difference between the provided register and + * it's _1 counterpart to calculate the FAN/PWM ID. + */ + PMBUS_VIRT_FAN_TARGET_1, + PMBUS_VIRT_FAN_TARGET_2, + PMBUS_VIRT_FAN_TARGET_3, + PMBUS_VIRT_FAN_TARGET_4, + PMBUS_VIRT_PWM_1, + PMBUS_VIRT_PWM_2, + PMBUS_VIRT_PWM_3, + PMBUS_VIRT_PWM_4, + PMBUS_VIRT_PWM_ENABLE_1, + PMBUS_VIRT_PWM_ENABLE_2, + PMBUS_VIRT_PWM_ENABLE_3, + PMBUS_VIRT_PWM_ENABLE_4, + + /* Samples for average + * + * Drivers wanting to expose functionality for changing the number of + * samples used for average values should implement support in + * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it + * applies to all types of measurements, or any number of specific + * PMBUS_VIRT_*_SAMPLES registers to allow for individual control. + */ + PMBUS_VIRT_SAMPLES, + PMBUS_VIRT_IN_SAMPLES, + PMBUS_VIRT_CURR_SAMPLES, + PMBUS_VIRT_POWER_SAMPLES, + PMBUS_VIRT_TEMP_SAMPLES, +}; + +/* + * OPERATION + */ +#define PB_OPERATION_CONTROL_ON BIT(7) + +/* + * WRITE_PROTECT + */ +#define PB_WP_ALL BIT(7) /* all but WRITE_PROTECT */ +#define PB_WP_OP BIT(6) /* all but WP, OPERATION, PAGE */ +#define PB_WP_VOUT BIT(5) /* all but WP, OPERATION, PAGE, VOUT, ON_OFF */ + +#define PB_WP_ANY (PB_WP_ALL | PB_WP_OP | PB_WP_VOUT) + +/* + * CAPABILITY + */ +#define PB_CAPABILITY_SMBALERT BIT(4) +#define PB_CAPABILITY_ERROR_CHECK BIT(7) + +/* + * VOUT_MODE + */ +#define PB_VOUT_MODE_MODE_MASK 0xe0 +#define PB_VOUT_MODE_PARAM_MASK 0x1f + +#define PB_VOUT_MODE_LINEAR 0x00 +#define PB_VOUT_MODE_VID 0x20 +#define PB_VOUT_MODE_DIRECT 0x40 + +/* + * Fan configuration + */ +#define PB_FAN_2_PULSE_MASK (BIT(0) | BIT(1)) +#define PB_FAN_2_RPM BIT(2) +#define PB_FAN_2_INSTALLED BIT(3) +#define PB_FAN_1_PULSE_MASK (BIT(4) | BIT(5)) +#define PB_FAN_1_RPM BIT(6) +#define PB_FAN_1_INSTALLED BIT(7) + +enum pmbus_fan_mode { percent = 0, rpm }; + +/* + * STATUS_BYTE, STATUS_WORD (lower) + */ +#define PB_STATUS_NONE_ABOVE BIT(0) +#define PB_STATUS_CML BIT(1) +#define PB_STATUS_TEMPERATURE BIT(2) +#define PB_STATUS_VIN_UV BIT(3) +#define PB_STATUS_IOUT_OC BIT(4) +#define PB_STATUS_VOUT_OV BIT(5) +#define PB_STATUS_OFF BIT(6) +#define PB_STATUS_BUSY BIT(7) + +/* + * STATUS_WORD (upper) + */ +#define PB_STATUS_UNKNOWN BIT(8) +#define PB_STATUS_OTHER BIT(9) +#define PB_STATUS_FANS BIT(10) +#define PB_STATUS_POWER_GOOD_N BIT(11) +#define PB_STATUS_WORD_MFR BIT(12) +#define PB_STATUS_INPUT BIT(13) +#define PB_STATUS_IOUT_POUT BIT(14) +#define PB_STATUS_VOUT BIT(15) + +/* + * STATUS_IOUT + */ +#define PB_POUT_OP_WARNING BIT(0) +#define PB_POUT_OP_FAULT BIT(1) +#define PB_POWER_LIMITING BIT(2) +#define PB_CURRENT_SHARE_FAULT BIT(3) +#define PB_IOUT_UC_FAULT BIT(4) +#define PB_IOUT_OC_WARNING BIT(5) +#define PB_IOUT_OC_LV_FAULT BIT(6) +#define PB_IOUT_OC_FAULT BIT(7) + +/* + * STATUS_VOUT, STATUS_INPUT + */ +#define PB_VOLTAGE_VIN_OFF BIT(3) +#define PB_VOLTAGE_UV_FAULT BIT(4) +#define PB_VOLTAGE_UV_WARNING BIT(5) +#define PB_VOLTAGE_OV_WARNING BIT(6) +#define PB_VOLTAGE_OV_FAULT BIT(7) + +/* + * STATUS_INPUT + */ +#define PB_PIN_OP_WARNING BIT(0) +#define PB_IIN_OC_WARNING BIT(1) +#define PB_IIN_OC_FAULT BIT(2) + +/* + * STATUS_TEMPERATURE + */ +#define PB_TEMP_UT_FAULT BIT(4) +#define PB_TEMP_UT_WARNING BIT(5) +#define PB_TEMP_OT_WARNING BIT(6) +#define PB_TEMP_OT_FAULT BIT(7) + +/* + * STATUS_FAN + */ +#define PB_FAN_AIRFLOW_WARNING BIT(0) +#define PB_FAN_AIRFLOW_FAULT BIT(1) +#define PB_FAN_FAN2_SPEED_OVERRIDE BIT(2) +#define PB_FAN_FAN1_SPEED_OVERRIDE BIT(3) +#define PB_FAN_FAN2_WARNING BIT(4) +#define PB_FAN_FAN1_WARNING BIT(5) +#define PB_FAN_FAN2_FAULT BIT(6) +#define PB_FAN_FAN1_FAULT BIT(7) + +/* + * CML_FAULT_STATUS + */ +#define PB_CML_FAULT_OTHER_MEM_LOGIC BIT(0) +#define PB_CML_FAULT_OTHER_COMM BIT(1) +#define PB_CML_FAULT_PROCESSOR BIT(3) +#define PB_CML_FAULT_MEMORY BIT(4) +#define PB_CML_FAULT_PACKET_ERROR BIT(5) +#define PB_CML_FAULT_INVALID_DATA BIT(6) +#define PB_CML_FAULT_INVALID_COMMAND BIT(7) + +enum pmbus_sensor_classes { + PSC_VOLTAGE_IN = 0, + PSC_VOLTAGE_OUT, + PSC_CURRENT_IN, + PSC_CURRENT_OUT, + PSC_POWER, + PSC_TEMPERATURE, + PSC_FAN, + PSC_PWM, + PSC_NUM_CLASSES /* Number of power sensor classes */ +}; + +#define PMBUS_PAGES 32 /* Per PMBus specification */ +#define PMBUS_PHASES 10 /* Maximum number of phases per page */ + +/* Functionality bit mask */ +#define PMBUS_HAVE_VIN BIT(0) +#define PMBUS_HAVE_VCAP BIT(1) +#define PMBUS_HAVE_VOUT BIT(2) +#define PMBUS_HAVE_IIN BIT(3) +#define PMBUS_HAVE_IOUT BIT(4) +#define PMBUS_HAVE_PIN BIT(5) +#define PMBUS_HAVE_POUT BIT(6) +#define PMBUS_HAVE_FAN12 BIT(7) +#define PMBUS_HAVE_FAN34 BIT(8) +#define PMBUS_HAVE_TEMP BIT(9) +#define PMBUS_HAVE_TEMP2 BIT(10) +#define PMBUS_HAVE_TEMP3 BIT(11) +#define PMBUS_HAVE_STATUS_VOUT BIT(12) +#define PMBUS_HAVE_STATUS_IOUT BIT(13) +#define PMBUS_HAVE_STATUS_INPUT BIT(14) +#define PMBUS_HAVE_STATUS_TEMP BIT(15) +#define PMBUS_HAVE_STATUS_FAN12 BIT(16) +#define PMBUS_HAVE_STATUS_FAN34 BIT(17) +#define PMBUS_HAVE_VMON BIT(18) +#define PMBUS_HAVE_STATUS_VMON BIT(19) +#define PMBUS_HAVE_PWM12 BIT(20) +#define PMBUS_HAVE_PWM34 BIT(21) +#define PMBUS_HAVE_SAMPLES BIT(22) + +#define PMBUS_PHASE_VIRTUAL BIT(30) /* Phases on this page are virtual */ +#define PMBUS_PAGE_VIRTUAL BIT(31) /* Page is virtual */ + +enum pmbus_data_format { linear = 0, direct, vid }; +enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv }; + +struct pmbus_driver_info { + int pages; /* Total number of pages */ + u8 phases[PMBUS_PAGES]; /* Number of phases per page */ + enum pmbus_data_format format[PSC_NUM_CLASSES]; + enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */ + /* + * Support one set of coefficients for each sensor type + * Used for chips providing data in direct mode. + */ + int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ + int b[PSC_NUM_CLASSES]; /* offset */ + int R[PSC_NUM_CLASSES]; /* exponent */ + + u32 func[PMBUS_PAGES]; /* Functionality, per page */ + u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */ + /* + * The following functions map manufacturing specific register values + * to PMBus standard register values. Specify only if mapping is + * necessary. + * Functions return the register value (read) or zero (write) if + * successful. A return value of -ENODATA indicates that there is no + * manufacturer specific register, but that a standard PMBus register + * may exist. Any other negative return value indicates that the + * register does not exist, and that no attempt should be made to read + * the standard register. + */ + int (*read_byte_data)(struct i2c_client *client, int page, int reg); + int (*read_word_data)(struct i2c_client *client, int page, int phase, + int reg); + int (*write_word_data)(struct i2c_client *client, int page, int reg, + u16 word); + int (*write_byte)(struct i2c_client *client, int page, u8 value); + /* + * The identify function determines supported PMBus functionality. + * This function is only necessary if a chip driver supports multiple + * chips, and the chip functionality is not pre-determined. + */ + int (*identify)(struct i2c_client *client, + struct pmbus_driver_info *info); + + /* Regulator functionality, if supported by this chip driver. */ + int num_regulators; + const struct regulator_desc *reg_desc; + + /* custom attributes */ + const struct attribute_group **groups; +}; + +/* Regulator ops */ + +extern const struct regulator_ops pmbus_regulator_ops; + +/* Macro for filling in array of struct regulator_desc */ +#define PMBUS_REGULATOR(_name, _id) \ + [_id] = { \ + .name = (_name # _id), \ + .id = (_id), \ + .of_match = of_match_ptr(_name # _id), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &pmbus_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +/* Function declarations */ + +void pmbus_clear_cache(struct i2c_client *client); +int pmbus_set_page(struct i2c_client *client, int page, int phase); +int pmbus_read_word_data(struct i2c_client *client, int page, int phase, + u8 reg); +int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg, + u16 word); +int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); +int pmbus_write_byte(struct i2c_client *client, int page, u8 value); +int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, + u8 value); +int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg, + u8 mask, u8 value); +void pmbus_clear_faults(struct i2c_client *client); +bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); +bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); +int pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info); +const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client + *client); +int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode); +int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode); +int pmbus_update_fan(struct i2c_client *client, int page, int id, + u8 config, u8 mask, u16 command); +struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client); + +#endif /* PMBUS_H */ diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.c new file mode 100644 index 000000000000..338417125569 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.c @@ -0,0 +1,478 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description of various APIs related to PSU component + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h" +#include "pddf_psu_driver.h" + + +#define PSU_REG_VOUT_MODE 0x20 +#define PSU_REG_READ_VOUT 0x8b + +/*#define PSU_DEBUG*/ +#ifdef PSU_DEBUG +#define psu_dbg(...) printk(__VA_ARGS__) +#else +#define psu_dbg(...) +#endif + + +void get_psu_duplicate_sysfs(int idx, char *str) +{ + switch (idx) + { + case PSU_V_OUT: + strscpy(str, "in3_input", ATTR_NAME_LEN); + break; + case PSU_I_OUT: + strscpy(str, "curr2_input", ATTR_NAME_LEN); + break; + case PSU_P_OUT: + strscpy(str, "power2_input", ATTR_NAME_LEN); + break; + case PSU_FAN1_SPEED: + strscpy(str, "fan1_input", ATTR_NAME_LEN); + break; + case PSU_TEMP1_INPUT: + strscpy(str, "temp1_input", ATTR_NAME_LEN); + break; + default: + break; + } + + return; +} + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static u8 psu_get_vout_mode(struct i2c_client *client) +{ + u8 status = 0, retry = 10; + uint8_t offset = PSU_REG_VOUT_MODE; + + while (retry) + { + status = i2c_smbus_read_byte_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) + { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + printk(KERN_ERR "%s: Get PSU Vout mode failed\n", __func__); + return 0; + } + else + { + /*printk(KERN_ERR "%s: vout_mode reg value 0x%x\n", __func__, status);*/ + return status; + } +} + +static u16 psu_get_v_out(struct i2c_client *client) +{ + u16 status = 0, retry = 10; + uint8_t offset = PSU_REG_READ_VOUT; + + while (retry) { + status = i2c_smbus_read_word_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + printk(KERN_ERR "%s: Get PSU Vout failed\n", __func__); + return 0; + } + else + { + /*printk(KERN_ERR "%s: vout reg value 0x%x\n", __func__, status);*/ + return status; + } +} + +int psu_update_hw(struct device *dev, struct psu_attr_info *info, PSU_DATA_ATTR *udata) +{ + int status = 0; + struct i2c_client *client = to_i2c_client(dev); + PSU_SYSFS_ATTR_DATA *sysfs_attr_data = NULL; + + + mutex_lock(&info->update_lock); + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_set != NULL) + { + status = (sysfs_attr_data->pre_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: pre_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + if (sysfs_attr_data->do_set != NULL) + { + status = (sysfs_attr_data->do_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: do_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + + } + if (sysfs_attr_data->post_set != NULL) + { + status = (sysfs_attr_data->post_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: post_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + + mutex_unlock(&info->update_lock); + + return 0; +} + + +int psu_update_attr(struct device *dev, struct psu_attr_info *data, PSU_DATA_ATTR *udata) +{ + int status = 0; + struct i2c_client *client = to_i2c_client(dev); + PSU_SYSFS_ATTR_DATA *sysfs_attr_data=NULL; + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || !data->valid) + { + dev_dbg(&client->dev, "Starting update for %s\n", data->name); + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_get != NULL) + { + status = (sysfs_attr_data->pre_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: pre_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + if (sysfs_attr_data->do_get != NULL) + { + status = (sysfs_attr_data->do_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: do_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + + } + if (sysfs_attr_data->post_get != NULL) + { + status = (sysfs_attr_data->post_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: post_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + return 0; +} + +ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data); + PSU_DATA_ATTR *usr_data = NULL; + struct psu_attr_info *sysfs_attr_info = NULL; + int i, status=0; + u16 value = 0; + u8 vout_mode = 0; + int exponent, mantissa; + int multiplier = 1000; + char new_str[ATTR_NAME_LEN] = ""; + PSU_SYSFS_ATTR_DATA *ptr = NULL; + + for (i=0;inum_attr;i++) + { + ptr = (PSU_SYSFS_ATTR_DATA *)pdata->psu_attrs[i].access_data; + get_psu_duplicate_sysfs(ptr->index , new_str); + if ( strcmp(attr->dev_attr.attr.name, pdata->psu_attrs[i].aname) == 0 || strcmp(attr->dev_attr.attr.name, new_str) == 0 ) + { + sysfs_attr_info = &data->attr_info[i]; + usr_data = &pdata->psu_attrs[i]; + strscpy(new_str, "", ATTR_NAME_LEN); + } + } + + if (sysfs_attr_info==NULL || usr_data==NULL) + { + printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name); + goto exit; + } + + psu_update_attr(dev, sysfs_attr_info, usr_data); + + switch(attr->index) + { + case PSU_PRESENT: + case PSU_POWER_GOOD: + status = sysfs_attr_info->val.intval; + return sprintf(buf, "%d\n", status); + break; + case PSU_MODEL_NAME: + case PSU_MFR_ID: + case PSU_SERIAL_NUM: + case PSU_FAN_DIR: + return sprintf(buf, "%s\n", sysfs_attr_info->val.strval); + break; + case PSU_V_OUT: + value = psu_get_v_out(client); + vout_mode = psu_get_vout_mode(client); + if ((vout_mode >> 5) == 0) + exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f); + else + exponent = 0; + + mantissa = value; + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + + case PSU_V_OUT_MIN: + case PSU_V_OUT_MAX: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + vout_mode = psu_get_vout_mode(client); + if ((vout_mode >> 5) == 0) + exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f); + else + exponent = 0; + mantissa = two_complement_to_int(value & 0xffff, 16, 0xffff); + + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + case PSU_I_OUT: + case PSU_V_IN: + case PSU_I_IN: + case PSU_P_OUT_MAX: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + case PSU_P_IN: + case PSU_P_OUT: + multiplier = 1000000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + + break; + case PSU_FAN1_SPEED: + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent)); + else + return sprintf(buf, "%d\n", (mantissa) / (1 << -exponent)); + + break; + case PSU_TEMP1_INPUT: + case PSU_TEMP1_HIGH_THRESHOLD: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + + break; + default: + printk(KERN_ERR "%s: Unable to find attribute index for %s\n", __FUNCTION__, usr_data->aname); + goto exit; + } + +exit: + return sprintf(buf, "%d\n", status); +} + + +ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data); + PSU_DATA_ATTR *usr_data = NULL; + struct psu_attr_info *sysfs_attr_info = NULL; + int i; + + for (i=0;inum_attr;i++) + { + if (strcmp(data->attr_info[i].name, attr->dev_attr.attr.name) == 0 && strcmp(pdata->psu_attrs[i].aname, attr->dev_attr.attr.name) == 0) + { + sysfs_attr_info = &data->attr_info[i]; + usr_data = &pdata->psu_attrs[i]; + } + } + + if (sysfs_attr_info==NULL || usr_data==NULL) { + printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name); + goto exit; + } + + switch(attr->index) + { + /*No write attributes for now in PSU*/ + default: + goto exit; + } + + psu_update_hw(dev, sysfs_attr_info, usr_data); + +exit: + return count; +} + +extern int board_i2c_cpld_read_new(unsigned short cpld_addr, char *name, u8 reg); +int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + int status = 0; + int val = 0; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + + + if (strncmp(adata->devtype, "cpld", strlen("cpld")) == 0) + { + val = board_i2c_cpld_read_new(adata->devaddr, adata->devname, adata->offset); + if (val < 0){ + return val; + } + padata->val.intval = ((val & adata->mask) == adata->cmpval); + psu_dbg(KERN_ERR "%s: byte_value = 0x%x\n", __FUNCTION__, padata->val.intval); + } + + return status; +} + +int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + int status = 0, retry = 10; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + char buf[32]=""; //temporary placeholder for block data + uint8_t offset = (uint8_t)adata->offset; + int data_len = adata->len; + + while (retry) + { + status = i2c_smbus_read_i2c_block_data((struct i2c_client *)client, offset, data_len-1, buf); + if (unlikely(status<0)) + { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + buf[0] = '\0'; + dev_dbg(&((struct i2c_client *)client)->dev, "unable to read block of data from (0x%x)\n", ((struct i2c_client *)client)->addr); + } + else + { + buf[data_len-1] = '\0'; + } + + if (strncmp(adata->devtype, "pmbus", strlen("pmbus")) == 0) + strscpy(padata->val.strval, buf+1, data_len-1); + else + strscpy(padata->val.strval, buf, data_len); + + psu_dbg(KERN_ERR "%s: status = %d, buf block: %s\n", __FUNCTION__, status, padata->val.strval); + return 0; +} + +int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + + int status = 0, retry = 10; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + uint8_t offset = (uint8_t)adata->offset; + + while (retry) { + status = i2c_smbus_read_word_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + padata->val.shortval = 0; + dev_dbg(&((struct i2c_client *)client)->dev, "unable to read a word from (0x%x)\n", ((struct i2c_client *)client)->addr); + } + else + { + padata->val.shortval = status; + } + + psu_dbg(KERN_ERR "%s: word value : %d\n", __FUNCTION__, padata->val.shortval); + return 0; +} diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.h b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.h new file mode 100644 index 000000000000..24e4ea02e7ec --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.h @@ -0,0 +1,31 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * PSU driver related api declarations + */ + +#ifndef __PDDF_PSU_API_H__ +#define __PDDF_PSU_API_H__ + +extern void get_psu_duplicate_sysfs(int idx, char *str); +extern ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf); +extern ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + +extern int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data); +extern int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data); +extern int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data); + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_defs.h b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_defs.h new file mode 100644 index 000000000000..60e81a9f5878 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_defs.h @@ -0,0 +1,90 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description: + * Platform PSU defines/structures header file + */ + +#ifndef __PDDF_PSU_DEFS_H__ +#define __PDDF_PSU_DEFS_H__ + + +#define MAX_NUM_PSU 5 +#define MAX_PSU_ATTRS 32 +#define ATTR_NAME_LEN 32 +#define STR_ATTR_SIZE 32 +#define DEV_TYPE_LEN 32 + +/* Each client has this additional data + */ + +typedef struct PSU_DATA_ATTR +{ + char aname[ATTR_NAME_LEN]; // attr name, taken from enum psu_sysfs_attributes + char devtype[DEV_TYPE_LEN]; // either a 'eeprom' or 'cpld', or 'pmbus' attribute + char devname[DEV_TYPE_LEN]; // Name of the device from where this sysfs attr is read + uint32_t devaddr; + uint32_t offset; + uint32_t mask; + uint32_t cmpval; + uint32_t len; + void *access_data; + +}PSU_DATA_ATTR; + +typedef struct PSU_SYSFS_ATTR_DATA +{ + int index; + unsigned short mode; + ssize_t (*show)(struct device *dev, struct device_attribute *da, char *buf); + int (*pre_get)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*do_get)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*post_get)(void *client, PSU_DATA_ATTR *adata, void *data); + ssize_t (*store)(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + int (*pre_set)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*do_set)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*post_set)(void *client, PSU_DATA_ATTR *adata, void *data); + void *data; +} PSU_SYSFS_ATTR_DATA; + +typedef struct PSU_SYSFS_ATTR_DATA_ENTRY +{ + char name[ATTR_NAME_LEN]; + PSU_SYSFS_ATTR_DATA *a_ptr; +} PSU_SYSFS_ATTR_DATA_ENTRY; + + +/* PSU CLIENT DATA - PLATFORM DATA FOR PSU CLIENT */ +typedef struct PSU_DATA +{ + int idx; // psu index + int num_psu_fans; + PSU_DATA_ATTR psu_attr; + int len; // no of valid attributes for this psu client + PSU_DATA_ATTR psu_attrs[MAX_PSU_ATTRS]; +}PSU_DATA; + +typedef struct PSU_PDATA +{ + int idx; // psu index + int num_psu_fans; // num of fans supported by the PSU + int len; // no of valid attributes for this psu client + PSU_DATA_ATTR *psu_attrs; +}PSU_PDATA; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.c new file mode 100644 index 000000000000..fa5d31a0866a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.c @@ -0,0 +1,398 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module driver for PSU + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_driver.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_api.h" + + +static unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +struct pddf_ops_t pddf_psu_ops = { + .pre_init = NULL, + .post_init = NULL, + + .pre_probe = NULL, + .post_probe = NULL, + + .pre_remove = NULL, + .post_remove = NULL, + + .pre_exit = NULL, + .post_exit = NULL, +}; +EXPORT_SYMBOL(pddf_psu_ops); + + +PSU_SYSFS_ATTR_DATA access_psu_present = {PSU_PRESENT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_present); + +PSU_SYSFS_ATTR_DATA access_psu_model_name = {PSU_MODEL_NAME, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_model_name); + +PSU_SYSFS_ATTR_DATA access_psu_power_good = {PSU_POWER_GOOD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_power_good); + +PSU_SYSFS_ATTR_DATA access_psu_mfr_id = {PSU_MFR_ID, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_mfr_id); + +PSU_SYSFS_ATTR_DATA access_psu_serial_num = {PSU_SERIAL_NUM, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_serial_num); + +PSU_SYSFS_ATTR_DATA access_psu_fan_dir = {PSU_FAN_DIR, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_fan_dir); + +PSU_SYSFS_ATTR_DATA access_psu_v_out = {PSU_V_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out); + +PSU_SYSFS_ATTR_DATA access_psu_v_out_min = {PSU_V_OUT_MIN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out_min); + +PSU_SYSFS_ATTR_DATA access_psu_v_out_max = {PSU_V_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out_max); + +PSU_SYSFS_ATTR_DATA access_psu_i_out = {PSU_I_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_i_out); + +PSU_SYSFS_ATTR_DATA access_psu_p_out = {PSU_P_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_out); + +PSU_SYSFS_ATTR_DATA access_psu_p_out_max = {PSU_P_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_out_max); + +PSU_SYSFS_ATTR_DATA access_psu_fan1_speed_rpm = {PSU_FAN1_SPEED, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_fan1_speed_rpm); + +PSU_SYSFS_ATTR_DATA access_psu_temp1_input = {PSU_TEMP1_INPUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_temp1_input); + +PSU_SYSFS_ATTR_DATA access_psu_temp1_high_threshold = {PSU_TEMP1_HIGH_THRESHOLD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_temp1_high_threshold); + +PSU_SYSFS_ATTR_DATA access_psu_v_in = {PSU_V_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_in); + +PSU_SYSFS_ATTR_DATA access_psu_i_in = {PSU_I_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_i_in); + +PSU_SYSFS_ATTR_DATA access_psu_p_in = {PSU_P_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_in); + +PSU_SYSFS_ATTR_DATA_ENTRY psu_sysfs_attr_data_tbl[]= +{ + { "psu_present", &access_psu_present}, + { "psu_model_name", &access_psu_model_name}, + { "psu_power_good" , &access_psu_power_good}, + { "psu_mfr_id" , &access_psu_mfr_id}, + { "psu_serial_num" , &access_psu_serial_num}, + { "psu_fan_dir" , &access_psu_fan_dir}, + { "psu_v_out" , &access_psu_v_out}, + { "psu_v_out_min" , &access_psu_v_out_min}, + { "psu_v_out_max" , &access_psu_v_out_max}, + { "psu_i_out" , &access_psu_i_out}, + { "psu_p_out" , &access_psu_p_out}, + { "psu_p_out_max" , &access_psu_p_out_max}, + { "psu_fan1_speed_rpm" , &access_psu_fan1_speed_rpm}, + { "psu_temp1_input" , &access_psu_temp1_input}, + { "psu_temp1_high_threshold" , &access_psu_temp1_high_threshold}, + { "psu_v_in" , &access_psu_v_in}, + { "psu_i_in" , &access_psu_i_in}, + { "psu_p_in" , &access_psu_p_in} +}; + +void *get_psu_access_data(char *name) +{ + int i=0; + for(i=0; i<(sizeof(psu_sysfs_attr_data_tbl)/sizeof(psu_sysfs_attr_data_tbl[0])); i++) + { + if(strcmp(name, psu_sysfs_attr_data_tbl[i].name) ==0) + { + return &psu_sysfs_attr_data_tbl[i]; + } + } + return NULL; +} +EXPORT_SYMBOL(get_psu_access_data); + + +static int psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct psu_data *data; + int status =0; + int i,num, j=0; + PSU_PDATA *psu_platform_data; + PSU_DATA_ATTR *data_attr; + PSU_SYSFS_ATTR_DATA_ENTRY *sysfs_data_entry; + char new_str[ATTR_NAME_LEN] = ""; + + + if (client == NULL) { + printk("NULL Client.. \n"); + goto exit; + } + + if (pddf_psu_ops.pre_probe) + { + status = (pddf_psu_ops.pre_probe)(client, dev_id); + if (status != 0) + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + dev_info(&client->dev, "chip found\n"); + + /* Take control of the platform data */ + psu_platform_data = (PSU_PDATA *)(client->dev.platform_data); + num = psu_platform_data->len; + data->index = psu_platform_data->idx - 1; + data->num_psu_fans = psu_platform_data->num_psu_fans; + data->num_attr = num; + + + + /* Create and Add supported attr in the 'attributes' list */ + for (i=0; ipsu_attrs + i; + sysfs_data_entry = get_psu_access_data(data_attr->aname); + if (sysfs_data_entry == NULL) + { + printk(KERN_ERR "%s: Wrong attribute name provided by user '%s'\n", __FUNCTION__, data_attr->aname); + continue; + } + + dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL); + dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1]; + strscpy((char *)dy_ptr->dev_attr.attr.name, data_attr->aname, ATTR_NAME_LEN); + dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode; + dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show; + dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store; + dy_ptr->index = sysfs_data_entry->a_ptr->index; + + data->psu_attribute_list[i] = &dy_ptr->dev_attr.attr; + strscpy(data->attr_info[i].name, data_attr->aname, ATTR_NAME_LEN); + data->attr_info[i].valid = 0; + mutex_init(&data->attr_info[i].update_lock); + + /*Create a duplicate entry*/ + get_psu_duplicate_sysfs(dy_ptr->index, new_str); + if (strcmp(new_str,"")) + { + dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL); + dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1]; + strscpy((char *)dy_ptr->dev_attr.attr.name, new_str, ATTR_NAME_LEN); + dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode; + dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show; + dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store; + dy_ptr->index = sysfs_data_entry->a_ptr->index; + + data->psu_attribute_list[num+j] = &dy_ptr->dev_attr.attr; + j++; + strscpy(new_str,"", ATTR_NAME_LEN); + } + } + data->psu_attribute_list[i+j] = NULL; + data->psu_attribute_group.attrs = data->psu_attribute_list; + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &data->psu_attribute_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register_with_info(&client->dev, client->name, NULL, NULL, NULL); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + /* Add a support for post probe function */ + if (pddf_psu_ops.post_probe) + { + status = (pddf_psu_ops.post_probe)(client, dev_id); + if (status != 0) + goto exit_remove; + } + + return 0; + + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group); +exit_free: + /* Free all the allocated attributes */ + for (i=0;data->psu_attribute_list[i]!=NULL;i++) + { + struct sensor_device_attribute *ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i]; + kfree(ptr); + data->psu_attribute_list[i] = NULL; + pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__); + } + kfree(data); +exit: + return status; +} + +static void psu_remove(struct i2c_client *client) +{ + int i=0, ret = 0; + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *platdata = (PSU_PDATA *)client->dev.platform_data; // use dev_get_platdata() + PSU_DATA_ATTR *platdata_sub = platdata->psu_attrs; + struct sensor_device_attribute *ptr = NULL; + + if (pddf_psu_ops.pre_remove) + { + ret = (pddf_psu_ops.pre_remove)(client); + if (ret!=0) + printk(KERN_ERR "FAN pre_remove function failed\n"); + } + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group); + for (i=0; data->psu_attribute_list[i]!=NULL; i++) + { + ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i]; + kfree(ptr); + data->psu_attribute_list[i] = NULL; + } + pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__); + kfree(data); + if (platdata_sub) { + printk(KERN_DEBUG "%s: Freeing platform subdata\n", __FUNCTION__); + kfree(platdata_sub); + } + if (platdata) { + printk(KERN_DEBUG "%s: Freeing platform data\n", __FUNCTION__); + kfree(platdata); + } + + if (pddf_psu_ops.post_remove) + { + ret = (pddf_psu_ops.post_remove)(client); + if (ret!=0) + printk(KERN_ERR "FAN post_remove function failed\n"); + } +} + +enum psu_intf +{ + eeprom_intf, + smbus_intf +}; + +static const struct i2c_device_id psu_id[] = { + {"psu_eeprom", eeprom_intf}, + {"psu_pmbus", smbus_intf}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, psu_id); + +static struct i2c_driver psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "psu", + }, + .probe = psu_probe, + .remove = psu_remove, + .id_table = psu_id, + .address_list = normal_i2c, +}; + +int example_fun(void) +{ + pddf_dbg(PSU, KERN_ERR "CALLING FUN...\n"); + return 0; +} +EXPORT_SYMBOL(example_fun); + + +int psu_init(void) +{ + int status = 0; + + if (pddf_psu_ops.pre_init) + { + status = (pddf_psu_ops.pre_init)(); + if (status!=0) + return status; + } + + pddf_dbg(PSU, KERN_ERR "GENERIC_PSU_DRIVER.. init Invoked..\n"); + status = i2c_add_driver(&psu_driver); + if (status!=0) + return status; + + if (pddf_psu_ops.post_init) + { + status = (pddf_psu_ops.post_init)(); + if (status!=0) + return status; + } + + return status; +} +EXPORT_SYMBOL(psu_init); + +void psu_exit(void) +{ + pddf_dbg(PSU, "GENERIC_PSU_DRIVER.. exit\n"); + if (pddf_psu_ops.pre_exit) (pddf_psu_ops.pre_exit)(); + i2c_del_driver(&psu_driver); + if (pddf_psu_ops.post_exit) (pddf_psu_ops.post_exit)(); +} +EXPORT_SYMBOL(psu_exit); + +module_init(psu_init); +module_exit(psu_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("psu driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.h b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.h new file mode 100644 index 000000000000..a94cf7441dbc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.h @@ -0,0 +1,70 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * PSU driver data structures + */ +#ifndef __PDDF_PSU_DRIVER_H__ +#define __PDDF_PSU_DRIVER_H__ + +enum psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD, + PSU_MFR_ID, + PSU_SERIAL_NUM, + PSU_FAN_DIR, + PSU_V_OUT, + PSU_V_OUT_MIN, + PSU_V_OUT_MAX, + PSU_I_OUT, + PSU_P_OUT, /* This is in micro watts to comply with lm-sensors */ + PSU_P_OUT_MAX, + PSU_FAN1_SPEED, + PSU_TEMP1_INPUT, + PSU_TEMP1_HIGH_THRESHOLD, + PSU_V_IN, + PSU_I_IN, + PSU_P_IN, + PSU_ATTR_MAX +}; + + +/* Every client has psu_data which is divided into per attribute data */ +struct psu_attr_info { + char name[ATTR_NAME_LEN]; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status; + union { + char strval[STR_ATTR_SIZE]; + int intval; + u16 shortval; + u8 charval; + }val; +}; +struct psu_data { + struct device *hwmon_dev; + u8 index; + int num_psu_fans; + int num_attr; + struct attribute *psu_attribute_list[MAX_PSU_ATTRS]; + struct attribute_group psu_attribute_group; + struct psu_attr_info attr_info[MAX_PSU_ATTRS]; +}; + + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/setup.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/setup.py similarity index 98% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/setup.py rename to platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/setup.py index 159e26656138..a1535165bb66 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/setup.py +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/setup.py @@ -1,4 +1,5 @@ import os +import sys from setuptools import setup os.listdir diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/__init__.py similarity index 63% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/__init__.py rename to platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/__init__.py index 0533d11584e1..21d9cd445e31 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/__init__.py +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/__init__.py @@ -1,4 +1,4 @@ # All the derived classes for PDDF __all__ = ["platform", "chassis", "sfp", "psu", "thermal"] -from sonic_platform import * #[py/polluting-import] - +from . import platform +from . import chassis diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/chassis.py new file mode 100644 index 000000000000..74a4a0ff899c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/chassis.py @@ -0,0 +1,242 @@ +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + from sonic_platform_pddf_base.pddf_chassis import PddfChassis + import sys + import subprocess + import time + import os + import re + import shutil + from . import helper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_SFP = 56 +GETREG_PATH="/sys/devices/platform/sys_cpld/getreg" +SETREG_PATH="/sys/devices/platform/sys_cpld/setreg" +SET_SYS_STATUS_LED="echo {} {} > {}" +SET_SYS_STATUS_LED_IPMI="0x3A 0x39 0x02 0x00 {}" +GET_REBOOT_CAUSE="echo '0xA107' > {} && cat {}".format(GETREG_PATH, GETREG_PATH) + +ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt" + +BMC_EXIST = helper.APIHelper().is_bmc_present() + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + sfp_status_dict={} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + + for port_idx in range(1, NUM_SFP+1): + present = self.get_sfp(port_idx).get_presence() + self.sfp_status_dict[port_idx] = '1' if present else '0' + + # Component firmware version initialization + from sonic_platform.component import Component + if BMC_EXIST: + NUM_COMPONENT = 10 + else: + NUM_COMPONENT = 7 + for i in range(0, NUM_COMPONENT): + component = Component(i) + self._component_list.append(component) + + def _getstatusoutput(self, cmd): + status = 0 + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = ret + else: + return data + + return status, data + + def initizalize_system_led(self): + return True + + def get_status_led(self): + return self.get_system_led("SYS_LED") + + def set_status_led(self, color): + if color == self.get_status_led(): + return False + + if BMC_EXIST: + sys_led_color_map = { + 'off': '00', + 'green': '01', + 'amber': '02', + 'amber_blink_1hz': '03', + 'amber_blink_4hz': '04', + 'green_blink_1hz': '05', + 'green_blink_4hz': '06', + 'alternate_blink_1hz': '07', + 'alternate_blink_4hz': '08' + } + color_val = sys_led_color_map.get(color.lower(), None) + if color_val is None: + print("SYS LED color %s not support!" % color) + return False + + status, _ = helper.APIHelper().ipmi_raw(SET_SYS_STATUS_LED_IPMI.format(color_val)) + return status + else: + color_val="0xd0" + if color == "green": + color_val="0xd0" + elif color == "amber": + color_val="0xe0" + + cmd=SET_SYS_STATUS_LED.format("0xA162", color_val, SETREG_PATH) + status, res = self._getstatusoutput(cmd) + + if status != 0: + return False + else: + return True + + def get_sfp(self, index): + """ + Retrieves sfp represented by (1-based) index + For Quanta the index in sfputil.py starts from 1, so override + Args: + index: An integer, the index (1-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 1. + Returns: + An object dervied from SfpBase representing the specified sfp + """ + sfp = None + + try: + if (index == 0): + raise IndexError + sfp = self._sfp_list[index-1] + except IndexError: + sys.stderr.write("override: SFP index {} out of range (1-{})\n".format( + index, len(self._sfp_list))) + + return sfp + + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + # Newer baseboard CPLD to get reboot cause from CPLD register + hw_reboot_cause = "" + status, hw_reboot_cause = self._getstatusoutput(GET_REBOOT_CAUSE) + if status != 0: + pass + + # This tmp copy is to retain the reboot-cause only for the current boot + if os.path.isfile(ORG_HW_REBOOT_CAUSE_FILE): + shutil.move(ORG_HW_REBOOT_CAUSE_FILE, TMP_HW_REBOOT_CAUSE_FILE) + + if hw_reboot_cause == "0x33" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE): + with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file: + reboot_info = hw_cause_file.readline().rstrip('\n') + match = re.search(r'Reason:(.*),Time:(.*)', reboot_info) + if match is not None: + if match.group(1) == 'system': + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'System cold reboot' + return (reboot_cause, description) + + if hw_reboot_cause == "0x77": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + description = 'Power Cycle Reset' + elif hw_reboot_cause == "0x66": + reboot_cause = self.REBOOT_CAUSE_WATCHDOG + description = 'Hardware Watchdog Reset' + elif hw_reboot_cause == "0x44": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'CPU Warm Reset' + elif hw_reboot_cause == "0x33": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'Soft-Set Cold Reset' + elif hw_reboot_cause == "0x22": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'Soft-Set Warm Reset' + elif hw_reboot_cause == "0x11": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + description = 'Power On Reset' + else: + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Hardware reason' + + return (reboot_cause, description) + + def get_change_event(self, timeout=0): + sfp_dict = {} + + SFP_REMOVED = '0' + SFP_INSERTED = '1' + + SFP_PRESENT = True + SFP_ABSENT = False + + start_time = time.time() + time_period = timeout/float(1000) #Convert msecs to secs + + while time.time() < (start_time + time_period) or timeout == 0: + for port_idx in range(1, NUM_SFP+1): + if self.sfp_status_dict[port_idx] == SFP_REMOVED and \ + self.get_sfp(port_idx).get_presence() == SFP_PRESENT: + sfp_dict[port_idx] = SFP_INSERTED + self.sfp_status_dict[port_idx] = SFP_INSERTED + elif self.sfp_status_dict[port_idx] == SFP_INSERTED and \ + self.get_sfp(port_idx).get_presence() == SFP_ABSENT: + sfp_dict[port_idx] = SFP_REMOVED + self.sfp_status_dict[port_idx] = SFP_REMOVED + + if sfp_dict: + return True, {'sfp':sfp_dict} + + time.sleep(0.5) + + return True, {'sfp':{}} # Timeout + + def get_watchdog(self): + """ + Retreives hardware watchdog device on this chassis + + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + """ + try: + if self._watchdog is None: + from sonic_platform.cpld_watchdog import Watchdog + # Create the watchdog Instance + self._watchdog = Watchdog() + + except Exception as e: + print("Fail to load watchdog due to {}".format(e)) + return self._watchdog + + def get_revision(self): + """ + Retrieves the hardware revision for the chassis + Returns: + A string containing the hardware revision for this chassis. + """ + return self._eeprom.revision_str().encode('utf-8').hex() diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/component.py new file mode 100644 index 000000000000..bfa9e49ab0f7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/component.py @@ -0,0 +1,214 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +import subprocess +import re + +try: + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +COMPONENT_LIST = [ + ("BIOS", "Basic input/output System"), + ("ONIE", "Open Network Install Environment"), + ("BMC", "Baseboard Management Controller"), + ("FPGA", "FPGA for transceiver EEPROM access and other component I2C access"), + ("CPLD COMe", "COMe board CPLD"), + ("CPLD BASE", "CPLD for board functions, fan control and watchdog"), + ("CPLD SW1", "CPLD for port control SFP(1-24)"), + ("CPLD SW2", "CPLD for port control SFP(25-48), QSFP(49-56)"), + ("ASIC PCIe", "ASIC PCIe Firmware"), + ("SSD", "Solid State Drive - {}") +] +NAME_INDEX = 0 +DESCRIPTION_INDEX = 1 + +BIOS_VERSION_CMD = "dmidecode -s bios-version" +ONIE_VERSION_CMD = "cat /host/machine.conf" +FPGA_VERSION_PATH = "/sys/bus/platform/devices/fpga_sysfs/version" +COME_CPLD_VERSION_CMD = "cat /sys/devices/platform/sys_cpld/come_cpld_version" +SWCPLD1_VERSION_CMD = "i2cget -y -f 102 0x30 0x0" +SWCPLD2_VERSION_CMD = "i2cget -y -f 102 0x31 0x0" +GETREG_PATH="/sys/devices/platform/sys_cpld/getreg" +BASECPLD_VERSION_CMD="echo '0xA100' > {} && cat {}".format(GETREG_PATH, GETREG_PATH) +BMC_PRESENCE="echo '0xA108' > {} && cat {}".format(GETREG_PATH, GETREG_PATH) +SSD_VERSION_CMD = "smartctl -i /dev/sda" +ASIC_PCIE_VERSION_CMD = "bcmcmd 'pciephy fw version' | grep 'PCIe FW version' | cut -d ' ' -f 4" + +UNKNOWN_VER = "Unknown" + +class Component(): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + ComponentBase.__init__(self) + self.index = component_index + self.name = self.get_name() + + def __get_cpld_ver(self): + cpld_version_dict = dict() + cpld_ver_info = { + 'CPLD BASE': self.__get_basecpld_ver(), + 'CPLD SW1': self.__get_swcpld1_ver(), + 'CPLD SW2': self.__get_swcpld2_ver(), + 'CPLD COMe': self.__get_comecpld_ver() + } + for cpld_name, cpld_ver in cpld_ver_info.items(): + cpld_ver_str = "{}.{}".format(int(cpld_ver[2], 16), int( + cpld_ver[3], 16)) if cpld_ver else UNKNOWN_VER + cpld_version_dict[cpld_name] = cpld_ver_str + + return cpld_version_dict + + def __get_asic_pcie_ver(self): + status, raw_ver=self.run_command(ASIC_PCIE_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_bios_ver(self): + status, raw_ver=self.run_command(BIOS_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_comecpld_ver(self): + status, raw_ver=self.run_command(COME_CPLD_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_basecpld_ver(self): + status, raw_ver=self.run_command(BASECPLD_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_swcpld1_ver(self): + status, raw_ver=self.run_command(SWCPLD1_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_swcpld2_ver(self): + status, raw_ver=self.run_command(SWCPLD2_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_bmc_presence(self): + status, raw_ver=self.run_command(BMC_PRESENCE) + if status and raw_ver == "0x00": + return True + else: + return False + + def __get_bmc_ver(self): + cmd="ipmitool mc info | grep 'Firmware Revision'" + status, raw_ver=self.run_command(cmd) + if status: + bmc_ver=raw_ver.split(':')[-1].strip() + return {"BMC":bmc_ver} + else: + return {"BMC":"N/A"} + + def __get_fpga_version(self): + status, fpga_version = self.run_command("cat %s" % FPGA_VERSION_PATH) + if not status: + return UNKNOWN_VER + return fpga_version.replace("0x", "") + + def __get_onie_ver(self): + onie_ver = "N/A" + status, raw_onie_data = self.run_command(ONIE_VERSION_CMD) + if status: + ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data) + if ret != None: + onie_ver = ret.group(0) + return onie_ver + + def __get_ssd_ver(self): + ssd_ver = "N/A" + status, raw_ssd_data = self.run_command(SSD_VERSION_CMD) + if status: + ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data) + if ret != None: + ssd_ver = ret.group(1) + return ssd_ver + + def __get_ssd_desc(self, desc_format): + description = "N/A" + status, raw_ssd_data = self.run_command(SSD_VERSION_CMD) + if status: + ret = re.search(r"Device Model: +(.*)[^\\]", raw_ssd_data) + if ret != None: + try: + description = desc_format.format(ret.group(1)) + except (IndexError): + pass + return description + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][NAME_INDEX] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + # For SSD get the model name from device + if self.get_name() == "SSD": + return self.__get_ssd_desc(COMPONENT_LIST[self.index][1]) + + return COMPONENT_LIST[self.index][DESCRIPTION_INDEX] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version_info = { + "ONIE": self.__get_onie_ver(), + "SSD": self.__get_ssd_ver(), + "BIOS": self.__get_bios_ver(), + "FPGA": self.__get_fpga_version(), + "ASIC PCIe": self.__get_asic_pcie_ver(), + } + fw_version_info.update(self.__get_cpld_ver()) + if self.__get_bmc_presence(): + fw_version_info.update(self.__get_bmc_ver()) + return fw_version_info.get(self.name, UNKNOWN_VER) + + def run_command(self, cmd): + status = True + result = "" + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/cpld_watchdog.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/cpld_watchdog.py new file mode 100644 index 000000000000..b828dbf65887 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/cpld_watchdog.py @@ -0,0 +1,228 @@ +#!/usr/bin/env python + +############################################################################# +# +# Watchdog contains an implementation of SONiC Platform Base Watchdog API +# +############################################################################# +try: + import ctypes + import fcntl + import os + import subprocess + import time + import array + import syslog + from .helper import APIHelper + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +LPC_CPLD_GETREG_PATH = "/sys/bus/platform/devices/sys_cpld/getreg" +LPC_CPLD_SETREG_PATH = "/sys/bus/platform/devices/sys_cpld/setreg" +LPC_WDT_SET_TIMER_L_REG = '0xa183' +LPC_WDT_SET_TIMER_M_REG = '0xa182' +LPC_WDT_SET_TIMER_H_REG = '0xa181' +LPC_WDT_TIMER_L_REG = '0xa186' +LPC_WDT_TIMER_M_REG = '0xa185' +LPC_WDT_TIMER_H_REG = '0xa184' +LPC_WDT_CTRL_REG = '0xa187' +LPC_WDT_ARM_REG = '0xa188' + +WDT_ENABLE = 0x1 +WDT_DISABLE = 0x0 +WDT_COMMON_ERROR = -1 +DEFAULT_TIMEOUT = 180 + +class CpldWatchdog(WatchdogBase): + + def __init__(self): + WatchdogBase.__init__(self) + # Set default value + self._api_helper = APIHelper() + self._ka_count = int(1) + self.armed = True if self._active() else False + self.timeout = self._gettimeout() if self.armed else DEFAULT_TIMEOUT + #self._disable() + + def _lpc_get(self, reg): + return self._api_helper.lpc_getreg(LPC_CPLD_GETREG_PATH, reg) + + def _lpc_set(self, reg, val): + if type(val) is int: + val = hex(val) + return self._api_helper.lpc_setreg(LPC_CPLD_SETREG_PATH, reg, val) + + def _active(self): + """ + WDT is active or not + """ + data = self._lpc_get(LPC_WDT_CTRL_REG) + return True if data == "0x01" else False + + def _enable(self): + """ + Turn on the watchdog timer + """ + status = self._lpc_set(LPC_WDT_CTRL_REG, WDT_ENABLE) + if not status: + pass + + def _disable(self): + """ + Turn off the watchdog timer + """ + status = self._lpc_set(LPC_WDT_CTRL_REG, WDT_DISABLE) + if not status: + pass + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + if bool(self._ka_count % 2): + status = self._lpc_set(LPC_WDT_ARM_REG, WDT_ENABLE) + else: + status = self._lpc_set(LPC_WDT_ARM_REG, WDT_DISABLE) + + if not status: + syslog.syslog(syslog.LOG_ERR, "Feed Watchdog failed") + + self._ka_count = self._ka_count + 1 + if (self._ka_count >= 11): + self._ka_count = 1 + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + ms = seconds * 1000 + ms_low_byte = ms & 0xff + ms_media_byte = (ms >> 8) & 0xff + ms_high_byte = (ms >> 16) & 0xff + self._lpc_set(LPC_WDT_SET_TIMER_L_REG, ms_low_byte) + self._lpc_set(LPC_WDT_SET_TIMER_M_REG, ms_media_byte) + self._lpc_set(LPC_WDT_SET_TIMER_H_REG, ms_high_byte) + return self._gettimeout() + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + data = [0, 0, 0] + data[0] = self._lpc_get(LPC_WDT_SET_TIMER_L_REG) + data[1] = self._lpc_get(LPC_WDT_SET_TIMER_M_REG) + data[2] = self._lpc_get(LPC_WDT_SET_TIMER_H_REG) + seconds = int((int(data[2], 16) << 16 + | int(data[1], 16) << 8 + | int(data[0], 16)) / 1000) + return seconds + + def _gettimeleft(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + data = [0, 0, 0] + data[0] = self._lpc_get(LPC_WDT_TIMER_L_REG) + data[1] = self._lpc_get(LPC_WDT_TIMER_M_REG) + data[2] = self._lpc_get(LPC_WDT_TIMER_H_REG) + seconds = int((int(data[2], 16) << 16 + | int(data[1], 16) << 8 + | int(data[0], 16)) / 1000) + + return seconds + + ################################################################# + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + + ret = WDT_COMMON_ERROR + if seconds < 0: + return ret + + try: + if self.armed: + self._keepalive() + if self.timeout != seconds: + self._disable() + time.sleep(1) + self.timeout = self._settimeout(seconds) + self._enable() + else: + self.timeout = self._settimeout(seconds) + self._keepalive() + self._enable() + self.armed = True + + ret = self.timeout + except IOError as e: + pass + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + self._disable() + self.armed = False + disarmed = True + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + + return self.armed + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Returns: + An integer specifying the number of seconds remaining on thei + watchdog timer. If the watchdog is not armed, returns -1. + """ + + timeleft = WDT_COMMON_ERROR + + if self.armed: + try: + timeleft = self._gettimeleft() + except IOError: + pass + + return timeleft + +class Watchdog(CpldWatchdog): + """PDDF Platform-Specific Watchdog Class""" + + def __init__(self): + CpldWatchdog.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/eeprom.py new file mode 100644 index 000000000000..7550fed99950 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/eeprom.py @@ -0,0 +1,78 @@ +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom + import os +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +EEPROM_TMP_FILE = '/tmp/eeprom_dump.bin' + +class Eeprom(PddfEeprom): + + _TLV_DISPLAY_VENDOR_EXT = True + _TLV_INFO_MAX_LEN = 256 + pddf_obj = {} + plugin_data = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + if not pddf_data or not pddf_plugin_data: + raise ValueError('PDDF JSON data error') + + self.pddf_obj = pddf_data + self.plugin_data = pddf_plugin_data + + # system EEPROM always has device name EEPROM1 + self.eeprom_path = self.pddf_obj.get_path("EEPROM1", "eeprom") + if self.eeprom_path is None: + return + + super(PddfEeprom, self).__init__(self.eeprom_path, 0, '', True) + self.eeprom_tlv_dict = dict() + + try: + if os.path.exists(EEPROM_TMP_FILE): + with open(EEPROM_TMP_FILE, 'rb') as b_fd: + self.eeprom_data = bytearray(b_fd.read()) + else: + self.eeprom_data = self.read_eeprom() + with open(EEPROM_TMP_FILE, 'wb') as b_fd: + b_fd.write(self.eeprom_data) + os.chmod(EEPROM_TMP_FILE, 0o444) + except Exception as e: + self.eeprom_data = "N/A" + raise RuntimeError("PddfEeprom is not Programmed - Error: {}".format(str(e))) + else: + eeprom = self.eeprom_data + + if not self.is_valid_tlvinfo_header(eeprom): + return + + total_length = ((eeprom[9]) << 8) | (eeprom[10]) + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < self._TLV_INFO_MAX_LEN and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + + (eeprom[tlv_index + 1])] + code = "0x%02X" % ((tlv[0])) + + if (tlv[0]) == self._TLV_CODE_VENDOR_EXT: + name = "Vendor Extension" + value = "" + if self._TLV_DISPLAY_VENDOR_EXT: + for c in tlv[2:2 + tlv[1]]: + value += "0x%02X " % c + else: + name, value = self.decoder(None, tlv) + + self.eeprom_tlv_dict[code] = value + if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32: + break + + tlv_index += (eeprom[tlv_index+1]) + 2 + + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan.py new file mode 100644 index 000000000000..1edef7f9f458 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan.py @@ -0,0 +1,192 @@ +import os + +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +SET_FAN_STATUS_LED_CMD = "0x3A 0x39 0x02 {} {}" +BMC_EXIST = APIHelper().is_bmc_present() + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + self.helper = APIHelper() + + def get_presence(self): + """ + Retrieves the presence of fan + """ + if self.is_psu_fan: + from sonic_platform.platform import Platform + return Platform().get_chassis().get_psu(self.fans_psu_index-1).get_presence() + + return super().get_presence() + + def get_direction(self): + """ + Retrieves the direction of fan + + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + Or N/A if fan removed or abnormal + """ + if not self.get_status(): + return 'N/A' + + return super().get_direction() + + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + target_speed = 0 + if self.is_psu_fan: + # Target speed not usually supported for PSU fans + raise NotImplementedError + else: + fan_name = self.get_name() + f_r_fan = "Front" if fan_name.endswith("1") else "Rear" + speed_rpm = self.get_speed_rpm() + if(self.plugin_data['FAN']['FAN_MAX_RPM_SPEED'][f_r_fan].isnumeric()): + max_fan_rpm = int(self.plugin_data['FAN']['FAN_MAX_RPM_SPEED'][f_r_fan]) + else: + return target_speed + speed_percentage = round(int((speed_rpm * 100) / max_fan_rpm)) + target_speed = speed_percentage + + return target_speed + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + fan_name = self.get_name() + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return 0 + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return 0 + else: + speed = int(float(output['status'])) + + max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED']) + speed_percentage = round((speed*100)/max_speed) + if speed_percentage >= 100: + speed_percentage = 100 + return speed_percentage + else: + idx = (self.fantray_index-1)*self.platform['num_fans_pertray'] + self.fan_index + attr = "fan" + str(idx) + "_input" + output = self.pddf_obj.get_attr_name_output("FAN-CTRL", attr) + + if not output: + return 0 + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return 0 + else: + speed = int(float(output['status'])) + + f_r_fan = "Front" if fan_name.endswith("1") else "Rear" + if(self.plugin_data['FAN']['FAN_MAX_RPM_SPEED'][f_r_fan].isnumeric()): + max_speed = int(self.plugin_data['FAN']['FAN_MAX_RPM_SPEED'][f_r_fan]) + else: + return 0; + speed_percentage = round((speed*100)/max_speed) + if speed_percentage >= 100: + speed_percentage = 100 + + return speed_percentage + + def get_status_led(self): + if not self.get_presence(): + return self.STATUS_LED_COLOR_OFF + if self.is_psu_fan: + # Usually no led for psu_fan hence raise a NotImplementedError + raise NotImplementedError + else: + fan_led_device = "FANTRAY{}".format(self.fantray_index) + "_LED" + if (not fan_led_device in self.pddf_obj.data.keys()): + # Implement a generic status_led color scheme + if self.get_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_OFF + + result, color = self.pddf_obj.get_system_led_color(fan_led_device) + return (color) + + def is_under_speed(self): + speed = float(self.get_speed()) + target_speed = float(self.get_target_speed()) + speed_tolerance = self.get_speed_tolerance() + + speed_min_th = target_speed * (1 - float(speed_tolerance) / 100) + if speed < speed_min_th: + return True + else: + return False + + def is_over_speed(self): + speed = float(self.get_speed()) + target_speed = float(self.get_target_speed()) + speed_tolerance = self.get_speed_tolerance() + + speed_max_th = target_speed * (1 + float(speed_tolerance) / 100) + if speed > speed_max_th: + return True + else: + return False + + def set_status_led(self,color): + if self.is_psu_fan: + return super().set_status_led(color) + + if color == self.get_status_led(): + return False + + if BMC_EXIST: + fan_led_color_map = { + 'off': '00', + 'green': '01', + 'amber': '02', + 'red': '02' + } + + fan_index_val = hex(self.fantray_index + 3) + + color_val = fan_led_color_map.get(color.lower(), None) + + if fan_index_val is None: + return False + + if color_val is None: + return False + + status, _ = self.helper.ipmi_raw(SET_FAN_STATUS_LED_CMD.format(fan_index_val,color_val)) + + return status + else: + return self.set_system_led("SYS_LED", color) + diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..3b9bb607f632 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan_drawer.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/helper.py new file mode 100644 index 000000000000..58451d4011bf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/helper.py @@ -0,0 +1,143 @@ +import fcntl +import os +import struct +import subprocess +from mmap import * + +GETREG_PATH="/sys/devices/platform/sys_cpld/getreg" +BMC_PRESENCE="echo '0xA108' > {} && cat {}".format(GETREG_PATH, GETREG_PATH) + +class APIHelper(): + def pci_get_value(self, resource, offset): + status = True + result = "" + try: + fd = os.open(resource, os.O_RDWR) + mm = mmap(fd, 0) + mm.seek(int(offset)) + read_data_stream = mm.read(4) + result = struct.unpack('I', read_data_stream) + except: + status = False + return status, result + + def get_cmd_output(self, cmd): + status = 0 + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = ret + + return status, data + + def read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + def read_one_line_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.readline() + return data.strip() + except IOError: + pass + return None + + def write_txt_file(self, file_path, value): + try: + with open(file_path, 'w') as fd: + fd.write(str(value)) + except Exception: + return False + return True + + def lpc_getreg(self, getreg_path, reg): + """ + Get the cpld reg through lpc interface + + Args: + getreg_path: getreg sysfs path + reg: 16 bits reg addr in hex str format + + Returns: + A str, register value in hex str format + """ + file = open(getreg_path, 'w+') + # Acquire an exclusive lock on the file + fcntl.flock(file, fcntl.LOCK_EX) + + try: + file.write(reg) + file.flush() + + # Seek to the beginning of the file + file.seek(0) + + # Read the content of the file + result = file.readline().strip() + finally: + # Release the lock and close the file + fcntl.flock(file, fcntl.LOCK_UN) + file.close() + + return result + + def lpc_setreg(self, setreg_path, reg, val): + """ + Set the cpld reg through lpc interface + + Args: + setreg_path: setreg sysfs path + reg: 16 bits reg addr in hex str format + val: 8 bits register value in hex str format + + Returns: + A boolean, True if speed is set successfully, False if not + """ + status = True + file = open(setreg_path, 'w') + # Acquire an exclusive lock on the file + fcntl.flock(file, fcntl.LOCK_EX) + + try: + data = "{} {}".format(reg, val) + file.write(data) + file.flush() + except: + status = False + finally: + # Release the lock and close the file + fcntl.flock(file, fcntl.LOCK_UN) + file.close() + + return status + + @staticmethod + def ipmi_raw(cmd): + status = True + result = "" + cmd = "ipmitool raw {}".format(str(cmd)) + ret, raw_data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = raw_data + + return status, result + + def is_bmc_present(self): + """ + Get the BMC card present status + + Returns: + A boolean, True if present, False if absent + """ + status, presence = self.get_cmd_output(BMC_PRESENCE) + if status == 0 and presence == "0x00": + return True + else: + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/platform.py new file mode 100644 index 000000000000..8595e80692df --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/platform.py @@ -0,0 +1,23 @@ +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/psu.py new file mode 100644 index 000000000000..2bfee698b244 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/psu.py @@ -0,0 +1,33 @@ +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_capacity(self): + return 550 + + def get_type(self): + return 'AC' + + def get_voltage_low_threshold(self): + return 4 + + def get_voltage_high_threshold(self): + return 13 + + def get_status_led(self): + if self.get_presence(): + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_AMBER + else: + return self.STATUS_LED_COLOR_OFF diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/sfp.py new file mode 100644 index 000000000000..418222cea7cc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/sfp.py @@ -0,0 +1,110 @@ +#!/usr/bin/env python + +try: + import ast + from sonic_platform_pddf_base.pddf_sfp import PddfSfp + from sonic_platform_base.sonic_xcvr.api.public.c_cmis import CmisApi +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def reset(self): + if self.port_index > 0 and self.port_index < 49: + return False + return super().reset() + + def get_presence(self): + presence = PddfSfp.get_presence(self) + if not presence and self._xcvr_api != None: + self._xcvr_api = None + + return presence + + def get_xcvr_api(self): + if self._xcvr_api is None and self.get_presence(): + self.refresh_xcvr_api() + + # Find and update the right optoe driver + api_to_driver_map = {\ + 'Sff8636Api': 'optoe1',\ + 'Sff8472Api': 'optoe2',\ + 'CmisApi': 'optoe3',\ + 'CCmisApi': 'optoe3',\ + 'Sff8436Api': 'sff8436'\ + } + create_dev = False + path_list = self.eeprom_path.split('/') + name_path = '/'.join(path_list[:-1]) + '/name' + del_dev_path = '/'.join(path_list[:-2]) + '/delete_device' + new_dev_path = '/'.join(path_list[:-2]) + '/new_device' + api_name = type(self._xcvr_api).__name__ + new_driver = api_to_driver_map.get(api_name, 'optoe1') + + try: + with open(name_path, 'r') as fd: + cur_driver = fd.readline().strip() + except FileNotFoundError: + create_dev = True + else: + if cur_driver != new_driver: + with open(del_dev_path, 'w') as fd: + fd.write("0x50") + create_dev = True + + if create_dev: + with open(new_dev_path, 'w') as fd: + fd.write("{} 0x50".format(new_driver)) + + if api_name == 'Sff8636Api' or \ + api_name == 'Sff8436Api': + self.write_eeprom(93,1,bytes([0x04])) + + return self._xcvr_api + + def get_platform_media_key(self, transceiver_dict, port_speed, lane_count): + api = self.get_xcvr_api() + api_name = type(api).__name__ + if api_name in ['CmisApi', 'CCmisApi']: + is_cmis = True + else: + is_cmis = False + + # Per lane speed + media_key = str(int(port_speed / lane_count)) + if is_cmis: + media_compliance_code = transceiver_dict['specification_compliance'] + if 'copper' in media_compliance_code: + media_len = transceiver_dict['cable_length'] + media_key += '-copper-' + str(media_len) + 'M' + else: + media_key += '-optical' + else: + media_compliance_dict = ast.literal_eval(transceiver_dict['specification_compliance']) + eth_compliance_str = '10/40G Ethernet Compliance Code' + ext_compliance_str = 'Extended Specification Compliance' + media_compliance_code = '' + if eth_compliance_str in media_compliance_dict: + media_compliance_code = media_compliance_dict[eth_compliance_str] + if ext_compliance_str in media_compliance_dict: + media_compliance_code = media_compliance_code + ' ' + media_compliance_dict[ext_compliance_str] + if 'CR' in media_compliance_code or "copper" in transceiver_dict['specification_compliance'].lower(): + media_len = transceiver_dict['cable_length'] + media_key += '-copper-' + str(media_len) + 'M' + else: + media_key += '-optical' + + return {\ + 'vendor_key': '',\ + 'media_key': media_key,\ + 'lane_speed_key': ''\ + } diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/thermal.py new file mode 100644 index 000000000000..0ead57d0bb30 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/thermal.py @@ -0,0 +1,13 @@ +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/watchdog.py new file mode 100644 index 000000000000..1bfd5faaea75 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/watchdog.py @@ -0,0 +1,15 @@ +try: + from sonic_platform_pddf_base.pddf_watchdog import PddfWatchdog +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Watchdog(PddfWatchdog): + """PDDF Platform-Specific Watchdog Class""" + + def __init__(self): + PddfWatchdog.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten + diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/ds2000_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/ds2000_platform_shutdown.sh new file mode 100644 index 000000000000..f0f6e3523c11 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/ds2000_platform_shutdown.sh @@ -0,0 +1,42 @@ +#!/bin/bash +REBOOT_CAUSE_DIR="/host/reboot-cause" +HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +REBOOT_TIME=$(date) + +if [ $# -ne 1 ]; then + echo "Require reboot type" + exit 1 +fi + +if [ ! -d "$REBOOT_CAUSE_DIR" ]; then + mkdir $REBOOT_CAUSE_DIR +fi + +echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE} + +# Best effort to write buffered data onto the disk +sync ; sync ; sync ; sleep 3 + +# Get BMC mode +GETREG_PATH="/sys/devices/platform/sys_cpld/getreg" +BMC_PRESENCE=`echo '0xA108' > $GETREG_PATH && cat $GETREG_PATH` +echo "BMC card ${BMC_PRESENCE}" + +if [ ${BMC_PRESENCE} == "0x00" ]; then + # Set all LEDs to BMC's control + ipmitool raw 0x3a 0x42 0x02 0x01 &> /dev/null + + # BMC cold power-cyle + ipmitool chassis power cycle &> /dev/null +else + # Set System LED to booting pattern + i2cset -f -y 100 0x0d 0x62 0x02 &> /dev/null + + # CPLD cold power-cyle + i2cset -f -y 100 0x0d 0x64 0x00 &> /dev/null +fi + +# System should reboot by now and avoid the script returning to caller +sleep 10 + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_post_device_create.sh new file mode 100755 index 000000000000..fa09e6e686a4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_post_device_create.sh @@ -0,0 +1,26 @@ +#!/bin/bash +# Set SYS_LED to Green, assuming everything came up fine. +#ipmitool raw 0x3A 0x0C 0x00 0x03 0x62 0xdc + +# Enable thermal shutdown by default +#i2cset -y -f 103 0x0d 0x75 0x1 + +# Load fpga extend driver after fpga device created +modprobe pddf_custom_fpga_extend + +SETREG_PATH="/sys/devices/platform/sys_cpld/setreg" +GETREG_PATH="/sys/devices/platform/sys_cpld/getreg" +BMC_PRESENCE=`echo '0xA108' > $GETREG_PATH && cat $GETREG_PATH` +#Set off Alarm LED +if [ ${BMC_PRESENCE} == "0x00" ]; then + # Set all LEDs to Manual control + ipmitool raw 0x3a 0x42 0x02 0x00 &> /dev/null + + # Set Alarm LED to OFF + ipmitool raw 0x3a 0x39 0x02 0x01 0x00 &> /dev/null +else + i2cset -f -y 100 0x0d 0x63 0x33 &> /dev/null +fi + +# enable FPGA control port status +echo '0xA130 0x01' > ${SETREG_PATH} diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_pre_driver_install.sh new file mode 100755 index 000000000000..9a8cb8a46e39 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_pre_driver_install.sh @@ -0,0 +1,14 @@ +#!/bin/bash +# Has customized those drivers,so rename them to lose effect +psu_driver=pddf_psu_driver_module.ko +fan_driver=pddf_fan_driver_module.ko +ker_name=$(uname -r) +driver_path=/usr/lib/modules/${ker_name}/extra/ +if [ -e ${driver_path}${psu_driver} ]; then + mv ${driver_path}${psu_driver} ${driver_path}${psu_driver}-bk +fi + +#if [ -e ${driver_path}${fan_driver} ]; then +# mv ${driver_path}${fan_driver} ${driver_path}${fan_driver}-bk +#fi +echo 'pddf psu,fan driver module has rename now' diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/platform_sensors.py new file mode 100644 index 000000000000..1a2c682234c5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/platform_sensors.py @@ -0,0 +1,178 @@ +#!/usr/bin/python +# +# Silverstone-v2 platform sensors. This script get the sensor data from BMC +# using ipmitool and display them in lm-sensor alike format. +# +# The following data is support: +# 1. Temperature sensors +# 2. PSUs +# 3. Fan Drawers + +import sys +import logging +import subprocess + +IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist'] +MAX_NUM_FANS = 4 +MAX_NUM_PSUS = 2 + +SENSOR_NAME = 0 +SENSOR_VAL = 4 + +sensor_dict = {} + +def ipmi_sensor_dump(cmd): + ''' Execute ipmitool command return dump output + exit if any error occur. + ''' + global sensor_dict + sensor_dump = '' + + try: + sensor_dump = subprocess.check_output(IPMI_SDR_CMD, universal_newlines=True) + except subprocess.CalledProcessError as e: + logging.error('Error! Failed to execute: {}'.format(cmd)) + sys.exit(1) + + for line in sensor_dump.splitlines(): + sensor_info = line.split('|') + sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip() + + return True + +def get_reading_by_name(sensor_name, sdr_elist_dump): + ''' + Search for the match sensor name, return sensor + reading value and unit, return object epmtry string + if search not match. + + The output of sensor dump: + TEMP_FB_U52 | 00h | ok | 7.1 | 31 degrees C + TEMP_FB_U17 | 01h | ok | 7.1 | 27 degrees C + TEMP_SW_U52 | 02h | ok | 7.1 | 30 degrees C + Fan2_Status | 07h | ok | 29.2 | Present + Fan2_Front | 0Eh | ok | 29.2 | 12000 RPM + Fan2_Rear | 46h | ok | 29.2 | 14700 RPM + PSU2_Status | 39h | ok | 10.2 | Presence detected + PSU2_Fan | 3Dh | ok | 10.2 | 16000 RPM + PSU2_VIn | 3Ah | ok | 10.2 | 234.30 Volts + PSU2_CIn | 3Bh | ok | 10.2 | 0.80 Amps + ''' + found = '' + + for line in sdr_elist_dump.splitlines(): + line = line.decode() + if sensor_name in line: + found = line.strip() + break + + if not found: + logging.error('Cannot find sensor name:' + sensor_name) + + else: + try: + found = found.split('|')[4] + except IndexError: + logging.error('Cannot get sensor data of:' + sensor_name) + + logging.basicConfig(level=logging.DEBUG) + return found + + +def read_temperature_sensors(): + sensor_list = [\ + ('Base_Temp_U5', 'Baseboard Left Temp'),\ + ('Base_Temp_U56', 'Baseboard Right Temp'),\ + ('Switch_Temp_U28', 'Switchboard Left Temp'),\ + ('Switch_Temp_U29', 'Switchboard Right Temp'),\ + ('CPU_Temp', 'CPU Internal Temp'),\ + ('Switch_Temp_U30', 'ASIC External Rear Temp'),\ + ('Switch_Temp_U31', 'ASIC External Front Temp'),\ + ('VDD_ANLG_Temp', 'VDD ANLG Temp'),\ + ('VDD_CORE_Temp', 'VDD CORE Temp')\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Temperature Sensors\n" + output += "Adapter: IPMI adapter\n" + for sensor in sensor_list: + output += sensor_format.format('{}:'.format(sensor[1]),\ + sensor_dict[sensor[0]],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_fan_sensors(num_fans): + + sensor_list = [\ + ('Fan{}_Status', 'Fan Drawer {} Status'),\ + ('Fan{}_Front', 'Fan {} front'),\ + ('Fan{}_Rear', 'Fan {} rear'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Fan Drawers\n" + output += "Adapter: IPMI adapter\n" + for fan_num in range(1, num_fans+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(fan_num) + display_sensor_name = sensor[1].format(fan_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_psu_sensors(num_psus): + + sensor_list = [\ + ('PSU{}_Status', 'PSU {} Status'),\ + ('PSU{}_Fan', 'PSU {} Fan 1'),\ + ('PSU{}_VIn', 'PSU {} Input Voltage'),\ + ('PSU{}_CIn', 'PSU {} Input Current'),\ + ('PSU{}_PIn', 'PSU {} Input Power'),\ + ('PSU{}_Temp1', 'PSU {} Temp1'),\ + ('PSU{}_Temp2', 'PSU {} Temp2'),\ + ('PSU{}_VOut', 'PSU {} Output Voltage'),\ + ('PSU{}_COut', 'PSU {} Output Current'),\ + ('PSU{}_POut', 'PSU {} Output Power'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "PSU\n" + output += "Adapter: IPMI adapter\n" + for psu_num in range(1, num_psus+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(psu_num) + display_sensor_name = sensor[1].format(psu_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def main(): + output_string = '' + + if ipmi_sensor_dump(IPMI_SDR_CMD): + output_string += read_temperature_sensors() + output_string += read_psu_sensors(MAX_NUM_PSUS) + output_string += read_fan_sensors(MAX_NUM_FANS) + + print(output_string) + + +if __name__ == '__main__': + main() diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pre_pddf_init.sh b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pre_pddf_init.sh new file mode 100755 index 000000000000..e32b0c9cbfc1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pre_pddf_init.sh @@ -0,0 +1,31 @@ +#!/bin/bash + +# Probe Baseboard CPLD driver +modprobe lpc_basecpld +sleep 1 + +# Get BMC mode +PLATFORM=`sed -n 's/onie_platform=\(.*\)/\1/p' /host/machine.conf` +GETREG_PATH="/sys/devices/platform/sys_cpld/getreg" +BMC_PRESENCE=`echo '0xA108' > $GETREG_PATH && cat $GETREG_PATH` +echo "Platform ${PLATFORM} BMC card ${BMC_PRESENCE}" + +# Copy pddf-device.json according to bmc mode +PDDF_JSON="pddf-device.json" +PDDF_JSON_BMC="pddf-device-bmc.json" +PDDF_JSON_NONBMC="pddf-device-nonbmc.json" +PDDF_JSON_PATH="/usr/share/sonic/device/${PLATFORM}/pddf" + +COMPONENTS_JSON="platform_components.json" +COMPONENTS_JSON_BMC="platform_components-bmc.json" +COMPONENTS_JSON_NONBMC="platform_components-nonbmc.json" +COMPONENTS_JSON_PATH="/usr/share/sonic/device/${PLATFORM}/" + +if [ ${BMC_PRESENCE} == "0x00" ]; then + cp ${PDDF_JSON_PATH}/${PDDF_JSON_BMC} ${PDDF_JSON_PATH}/${PDDF_JSON} + cp ${COMPONENTS_JSON_PATH}/${COMPONENTS_JSON_BMC} ${COMPONENTS_JSON_PATH}/${COMPONENTS_JSON} +else + # BMC Card absent + cp ${PDDF_JSON_PATH}/${PDDF_JSON_NONBMC} ${PDDF_JSON_PATH}/${PDDF_JSON} + cp ${COMPONENTS_JSON_PATH}/${COMPONENTS_JSON_NONBMC} ${COMPONENTS_JSON_PATH}/${COMPONENTS_JSON} +fi diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/sensors new file mode 100644 index 000000000000..5d740a9eb7d7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/sensors @@ -0,0 +1,11 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@" +docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@" diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/ds2000-pddf-platform-monitor.service b/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/ds2000-pddf-platform-monitor.service new file mode 100644 index 000000000000..5043d3d02755 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/ds2000-pddf-platform-monitor.service @@ -0,0 +1,17 @@ +[Unit] +Description=DS2000 Platform background monitor service +After=pmon.service +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/pddf_fan_control_sensor_refresh.py +Restart=always +RestartSec=30s +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/pddf-platform-init.service new file mode 100644 index 000000000000..c62769508895 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/pddf-platform-init.service @@ -0,0 +1,15 @@ +[Unit] +Description=PDDF module and device initialization service +Before=pmon.service watchdog-control.service ztp.service +After=platform-init.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStartPre=-/usr/local/bin/pre_pddf_init.sh +ExecStart=/usr/local/bin/pddf_util.py install +ExecStop=/usr/local/bin/pddf_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/CPUPIDRegulation.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/CPUPIDRegulation.py new file mode 100755 index 000000000000..f38bb7c9fe80 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/CPUPIDRegulation.py @@ -0,0 +1,152 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/6/19 17:01 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Perform fan PWM PID control according to the CPU temperature provided by the Thermal team + +try: + import os + import sys + import getopt + import subprocess + import statistics + import logging + import logging.config + import time # this is only being used as part of the example + import signal + from sonic_platform import platform +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Defaults +FUNCTION_NAME = 'FanControl' +DUTY_MAX = 100 +CPU_TEMP_MAX = 90 +TEMP_DIFF = 15 # abs(Tk - Tk-1) limit +CPU_TEMPERATURE = "cat /sys/class/thermal/thermal_zone1/temp" + +# PID Defaults Value +PWM_LIST = [35] # [PWMk-1] +T_LIST = [] # [Tk-2, Tk-1, Tk] +Kp = 3 +Ki = 0.5 +Kd = 0.2 +SET_POINT = 78 +PWM_MIN = 35 +PWM_MAX = 100 + + +class CPUPIDRegulation(object): + """ + Make a class we can use to capture stdout and sterr in the log + """ + # static temp var + _ori_temp = 0 + _new_perc = DUTY_MAX / 2 + syslog = logging.getLogger("[" + FUNCTION_NAME + "]") + init_fan_temperature = [0, 0] + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address='/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + self.syslog.setLevel(logging.WARNING) + self.syslog.addHandler(sys_handler) + self.platform_chassis_obj = platform.Platform().get_chassis() + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='a', + level=log_level, + format='[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + logging.debug('SET. logfile:%s / loglevel:%d' % (log_file, log_level)) + + def get_cpu_temperature(self): + """ + Get CPU temperature + """ + try: + temp = int(os.popen(CPU_TEMPERATURE).read().strip()) / 1000 + return temp + except Exception as E: + self.syslog.warning("Can't Get CPU temperature! Cause:%s" % str(E)) + logging.warning("Can't Get CPU temperature! Cause:%s" % str(E)) + return False + + def exception_data_handling(self): + """ + Get the temperature of CPU, and confirm whether the obtained value meets the conditions: + 1. The temperature range is 0~130; + 2. The temperature difference from the last time is within 15 + Otherwise, loop 5 times to get the temperature value again: + 1. if can't get the int value of temperature, return False; + 2. all temperatures are int, return the temperatures average value + """ + re_try = False + cpu_temp = self.get_cpu_temperature() + if cpu_temp >= CPU_TEMP_MAX: + logging.critical("The current temperature(%d) of CPU is higher than the high crirical 90 degrees" % cpu_temp) + + if cpu_temp is False: + re_try = True + elif cpu_temp not in range(CPU_TEMP_MAX+1): + re_try = True + elif T_LIST and abs(cpu_temp - T_LIST[-1]) > TEMP_DIFF: + re_try = True + + if re_try: + error_temp_list = list() + for _ in range(5): + cpu_temp = self.get_cpu_temperature() + if (type(cpu_temp) is int) and \ + (cpu_temp in range(CPU_TEMP_MAX+1)) and \ + (abs(cpu_temp - T_LIST[-1]) <= TEMP_DIFF): + return cpu_temp + else: + error_temp_list.append(cpu_temp) + if False in error_temp_list: + return False + return statistics.mean(error_temp_list) + return cpu_temp + + def pid_control(self): + """ + PID adjustment according to CPU Internal Temperature + :return: fans pwm + """ + cpu_temp = self.exception_data_handling() + if not cpu_temp: + return DUTY_MAX + if len(T_LIST) < 2: + T_LIST.append(float(cpu_temp)) + logging.info("Init CPU PID Control T_LIST:%s" % T_LIST) + return PWM_LIST[0] + else: + T_LIST.append(float(cpu_temp)) + pwm_k = PWM_LIST[0] + Kp * (T_LIST[2] - T_LIST[1]) + \ + Ki * (T_LIST[2] - SET_POINT) + \ + Kd * (T_LIST[2] - 2 * T_LIST[1] + T_LIST[0]) + if pwm_k < PWM_MIN: + #logging.info("CPU PID PWM calculation value:%d < %d, %d will be used"% (pwm_k, PWM_MIN, PWM_MIN)) + pwm_k = PWM_MIN + elif pwm_k > PWM_MAX: + logging.info("CPU PID PWM calculation value > %d, %d will be used" + % (PWM_MAX, PWM_MAX)) + pwm_k = PWM_MAX + PWM_LIST[0] = pwm_k + #logging.info("CPU PID: PWM=%d Temp list=%s" % (pwm_k, T_LIST)) + T_LIST.pop(0) + return pwm_k diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanControl.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanControl.py new file mode 100755 index 000000000000..c89daae72114 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanControl.py @@ -0,0 +1,253 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/6/19 17:44 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Fan control strategy main program + +try: + import re + import os + import sys + import getopt + import subprocess + import logging + import logging.config + import time # this is only being used as part of the example + import signal + from sonic_platform import platform + from . import CPUPIDRegulation + from . import FanLinearAdjustment + from . import SwitchInternalPIDRegulation +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +FUNCTION_NAME = "FanControl" +ERROR_COLOR = "amber" +NORMAL_COLOR = "green" +DUTY_MAX = 100 +FAN_NUMBER = 4 +PSU_NUMBER = 2 +SENSOR_NUMBER = 6 +Fan_Front_MAX = 29125 +Fan_Front_MIN = 1370 +Fan_Rear_MAX = 25375 +Fan_Rear_MIN = 1370 +FAN_STATUS_LIST = [True, True, True, True] + + +class FanControl(object): + """ + Make a class we can use to capture stdout and sterr in the log + """ + # static temp var + _ori_temp = 0 + _new_perc = DUTY_MAX / 2 + syslog = logging.getLogger("[" + FUNCTION_NAME + "]") + init_fan_temperature = [0, 0] + + def __init__(self, log_file, log_level): + self.FanLinearAdjustment = FanLinearAdjustment.FanLinearAdjustment(log_file, log_level, DUTY_MAX, FAN_NUMBER, + PSU_NUMBER, SENSOR_NUMBER) + self.SwitchInternalPIDRegulation = SwitchInternalPIDRegulation.SwitchInternalPIDRegulation(log_file, log_level) + self.CPUPIDRegulation = CPUPIDRegulation.CPUPIDRegulation(log_file, log_level) + # Needs a logger and a logger level + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address='/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + self.syslog.setLevel(logging.WARNING) + self.syslog.addHandler(sys_handler) + self.platform_chassis_obj = platform.Platform().get_chassis() + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='a', + level=log_level, + format='[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + logging.debug('SET. logfile:%s / loglevel:%d' % (log_file, log_level)) + + def get_psu_status(self, fan_duty_list): + """ + Get PSU Status.If one PSU not OK, all of the fans pwm will increase to 100 + :param fan_duty_list: A list.TO app the fans target pwm + """ + psu_status_list = [True, True] + for psu_index in range(PSU_NUMBER): + psu_presence = self.platform_chassis_obj.get_psu(psu_index).get_presence() + psu_status = self.platform_chassis_obj.get_psu(psu_index).get_status() + if not psu_presence: + psu_status_list[psu_index] = False + logging.critical( + "psu%s was error,presence:%s, status:%s" % (psu_index + 1, str(psu_presence), str(psu_status))) + + if False in psu_status_list: + fan_duty_list.append(DUTY_MAX) + + def get_fan_presence(self): + """ + Get all of fans status(fan drawer) + :return: A list indicating the status of all groups fans + """ + fan_presence_list = [True, True, True, True] # Default state: fans are OK + for fan_drawer_index in range(FAN_NUMBER): + fan_drawer = self.platform_chassis_obj.get_fan_drawer(fan_drawer_index) + fan0_presence = fan_drawer.get_fan(0).get_presence() + if not fan0_presence: + logging.warning("%s not presence"% (fan_drawer.get_fan(0).get_name())) + fan1_presence = fan_drawer.get_fan(1).get_presence() + if not fan1_presence: + logging.warning("%s not presence"% (fan_drawer.get_fan(1).get_name())) + if not fan0_presence and not fan1_presence: + fan_presence_list[fan_drawer_index] = False + logging.critical("Fan Drawer-%s not presence"% (str(fan_drawer_index + 1))) + return fan_presence_list + + def check_fans_presence(self, fan_duty_list): + """ + check all fans presence or not + """ + fans_presence_list = self.get_fan_presence() + fans_not_presence_num = fans_presence_list.count(False) + if fans_not_presence_num != 0: # all fans broken, power off + logging.critical("Some fan not presence, change others fan speed to max!") + fan_duty_list.append(DUTY_MAX) + + def set_fans_pwm_by_rpm(self, fan_duty_list): + """ + Set fans pwm by fans rpm. If all fans normal or 1 fan broken, + manage the fans follow thermal policy. + More than 1 fans broken, Will increase the fan speed to 100% + :param fan_duty_list: A list.TO app the fans target pwm + """ + fan_rpm_error_list = list() + for fan in self.platform_chassis_obj.get_all_fans(): + fan_name = fan.get_name() + fan_speed_rpm = fan.get_speed_rpm() + if fan_name.endswith("1") and (fan_speed_rpm not in range(Fan_Front_MIN, Fan_Front_MAX + 1)): + fan_rpm_error_list.append(fan_name) + if fan_name.endswith("2") and (fan_speed_rpm not in range(Fan_Rear_MIN, Fan_Rear_MAX + 1)): + fan_rpm_error_list.append(fan_name) + if not fan_rpm_error_list: + for fan_drawer_index in range(FAN_NUMBER): + if FAN_STATUS_LIST[fan_drawer_index] == False: + FAN_STATUS_LIST[fan_drawer_index] = True + self.platform_chassis_obj.get_fan_drawer(fan_drawer_index).set_status_led(NORMAL_COLOR) + return None + if len(fan_rpm_error_list) >= 2: + logging.critical("%s rpm less than the set minimum speed. " + "Will increase the fan speed to 100%%" % fan_rpm_error_list) + fan_duty_list.append(DUTY_MAX) + else: + logging.warning("%s rpm less than the set minimum speed. Fans pwm isn't changed" % fan_rpm_error_list) + + fan_modules_index_list = list(set(int(re.findall(r"Fantray(\d)_\d", x)[0]) for x in fan_rpm_error_list)) + for error_fan_drawer in fan_modules_index_list: + if FAN_STATUS_LIST[error_fan_drawer-1] == True: + FAN_STATUS_LIST[error_fan_drawer-1] = False + logging.warning("Fantray%d will be set to %s " % (error_fan_drawer, ERROR_COLOR)) + self.platform_chassis_obj.get_fan_drawer(error_fan_drawer-1).set_status_led(ERROR_COLOR) + + logging.warning("The STA front panel light will be set to %s " % ERROR_COLOR) + self.platform_chassis_obj.set_status_led(ERROR_COLOR) + + def get_linear_pid_pwm(self, fan_duty_list): + """ + Get the pwm value of liner regulation, cpu pid adjustment, switch internal pid adjustment + :param fan_duty_list: A list.TO app the fans target pwm + """ + linear_regulation = self.FanLinearAdjustment.linear_control() + cpu_pid_adjustment = self.CPUPIDRegulation.pid_control() + sw_pid_adjustment = self.SwitchInternalPIDRegulation.pid_control() + #logging.info("linear regulation PWM:%d, cpu pid PWM:%d, sw pid PWM:%d" % (linear_regulation, cpu_pid_adjustment, sw_pid_adjustment)) + fan_duty_list.append(linear_regulation) + fan_duty_list.append(cpu_pid_adjustment) + fan_duty_list.append(sw_pid_adjustment) + + def manage_fans(self): + """ + Set the fan speed according to the Fan Control Strategy + """ + fan_duty_speed_list = list() + + # Fan speed setting judgment-PSU + self.get_psu_status(fan_duty_speed_list) + + # Fan speed setting judgment-FAN presence + self.check_fans_presence(fan_duty_speed_list) + + # Fan speed setting judgment-FAN SPEED + self.set_fans_pwm_by_rpm(fan_duty_speed_list) + + # Fan speed setting judgment-linear and cpu pid and sw pid + self.get_linear_pid_pwm(fan_duty_speed_list) + + self._new_perc = max(fan_duty_speed_list) + if self._new_perc < 35: + self._new_perc = 35 + if self._new_perc > 100: + self._new_perc = 100 + fan_index = 0 + for fan in self.platform_chassis_obj.get_all_fans(): + fan_index += 1 + fan_rpm = fan.get_speed() + #logging.info("Get before setting fan speed: %s" % fan_rpm) + set_stat = fan.set_speed(self._new_perc) + if set_stat is False: + #logging.info('PASS. Set Fan%d duty_cycle (%d)' % (fan_index, self._new_perc)) + #else: + logging.error('FAIL. Set Fan%d duty_cycle (%d)' % (fan_index, self._new_perc)) + + +def handler(signum, frame): + logging.warning('Cause signal %d, will set all fan speed to max.' % signum) + platform_chassis = platform.Platform().get_chassis() + set_error = list() + fan_index = 1 + for fan in platform_chassis.get_all_fans(): + set_stat = fan.set_speed(DUTY_MAX) + fan_drawer = fan_index//2 + if not set_stat: + set_error.append(fan_drawer) + fan_index += 1 + if set_error: + logging.error('Fail. Set Fantray %s to (%d) failed' % (list(set(set_error)), DUTY_MAX)) + sys.exit(0) + + +def main(argv): + log_file = '/var/log/%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv, 'hdlt:', ['lfile=']) + except getopt.GetoptError: + print('Usage: %s [-d] [-l ]' % sys.argv[0]) + return 0 + for opt, arg in opts: + if opt == '-h': + print('Usage: %s [-d] [-l ]' % sys.argv[0]) + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + + signal.signal(signal.SIGINT, handler) + signal.signal(signal.SIGTERM, handler) + monitor = FanControl(log_file, log_level) + # Loop forever, doing something useful hopefully: + time.sleep(30) + while True: + monitor.manage_fans() + time.sleep(4) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanLinearAdjustment.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanLinearAdjustment.py new file mode 100755 index 000000000000..1e3d7d761886 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanLinearAdjustment.py @@ -0,0 +1,195 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/6/16 17:00 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Fan PWM confirmation according to Thermal team's fan linear control strategy + +try: + import sys + import getopt + import subprocess + import logging + import logging.config + import time # this is only being used as part of the example + import signal + from sonic_platform import platform +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Defaults +FUNCTION_NAME = "FanControl" + + +class FanLinearAdjustment(object): + """ + Make a class we can use to capture stdout and sterr in the log + """ + syslog = logging.getLogger("[" + FUNCTION_NAME + "]") + # u5 u56 u28 u29 + init_fan_temperature = [0, 0] + + def __init__(self, log_file, log_level, duty_max, fan_num, psu_num, sensor_num): + self.duty_max = duty_max + self.fan_num = fan_num + self.psu_num = psu_num + self.sensor_num = sensor_num + self.last_pwm = 0 + # Needs a logger and a logger level + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address='/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + self.syslog.setLevel(logging.WARNING) + self.syslog.addHandler(sys_handler) + self.platform_chassis_obj = platform.Platform().get_chassis() + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='a', + level=log_level, + format='[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.info: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + logging.info('SET. logfile:%s / loglevel:%d' % (log_file, log_level)) + + def get_all_temperature(self): + """ + Get u5 u56 u28 u29 temperature + return: [u5, u56, u28, u29 ] + """ + all_temperature_list = list() + for sensor_index in range(self.sensor_num): + temp = self.platform_chassis_obj.get_thermal(sensor_index).get_temperature() + if temp is None or str(temp).strip() == "": + return False + all_temperature_list.append(temp) + u5 = all_temperature_list[0] + u56 = all_temperature_list[1] + b2f = max(u5,u56) + if u5 <= -5: + logging.critical("The current temperature(%f) of u5 is lower than the low crirical -5 degrees." % u5) + elif u5 >= 58: + logging.critical("The current temperature(%f) of u5 is higher than the high critical 58 degrees." % u5) + elif u5 >= 55: + logging.critical("The current temperature(%f) of u5 is higher than the high warning 55 degrees." % u5) + if u56 <= -5: + logging.critical("The current temperature(%f) of u56 is lower than the low crirical -5 degrees." % u56) + elif u56 >= 58: + logging.critical("The current temperature(%f) of u56 is higher than the high critical 58 degrees." % u56) + elif u56 >= 55: + logging.critical("The current temperature(%f) of u56 is higher than the high warning 55 degrees." % u56) + u28 = all_temperature_list[4] + u29 = all_temperature_list[5] + f2b = max(u28, u29) + if u28 <= -5: + logging.critical("The current temperature(%f) of u28 is lower than the low crirical -5 degrees." % u28) + elif u28 >= 63: + logging.critical("The current temperature(%f) of u28 is higher than the high critical 63 degrees." % u28) + elif u28 >= 58: + logging.critical("The current temperature(%f) of u28 is higher than the high warning 58 degrees." % u28) + if u29 <= -5: + logging.critical("The current temperature(%f) of u29 is lower than the low crirical -5 degrees." % u29) + elif u29 >= 63: + logging.critical("The current temperature(%f) of u29 is higher than the high critical 63 degrees." % u29) + elif u29 >= 58: + logging.critical("The current temperature(%f) of u29 is higher than the high warning 58 degrees." % u29) + #logging.info("[u5:%s, u56:%s, u28:%s, u29:%s]" % (u5, u56, u28, u29)) + return [b2f, f2b] + + def get_fan_pwm_by_temperature(self, temp_list): + """ + According to the sensor temperature, the temperature rise and fall are judged, + and the fan speed with the highest speed is selected + :param temp_list: Sensor temperature list + :return: According to the sensor temperature, select the maximum expected fan value at each point(int) + """ + fan_direction = "NA" + for fan in self.platform_chassis_obj.get_all_fans(): + fan_status = fan.get_status() + if fan_status: + fan_direction = fan.get_direction() + #logging.info("fan direction: %s. INTAKE=B2F, EXHAUST=F2B" % str(fan_direction)) + break + all_temp = self.get_all_temperature() + if all_temp is False: + # According to Thermal suggestion, when the temperature can't be + # obtained, set the fan to full speed + logging.error("Can't get u5/u56/u28/u29 temperature, Will increase the fan speed to 100%%") + return self.duty_max + + # B2F=intake: U17 temperature， F2B-EXHAUST: U16 temperature + #logging.info("[B2F:%s, F2B:%s]" % (all_temp[0], all_temp[1])) + sensor_index = 0 if fan_direction == "INTAKE" else 1 + sensor_temp = float(all_temp[sensor_index]) + #logging.info("Use to adjustment sensor=%s, index=%s, last tem=%s" % (sensor_temp, sensor_index, temp_list[sensor_index] )) + temp_ascend = True + diff_temp = temp_list[sensor_index] - sensor_temp + if diff_temp > 0: + temp_ascend = False + + if sensor_index == 0: + if not temp_ascend: # B2F: U5,U56 temperature down + if sensor_temp <= 25: + sensor_temp_pwm = 35 + elif sensor_temp >= 45: + sensor_temp_pwm = self.duty_max + else: + sensor_temp_pwm = int((65 / 20) * (sensor_temp - 25) + 35) + else: # U5,U56 temperature up + if sensor_temp <= 28: + sensor_temp_pwm = 35 + elif sensor_temp >= 48: + sensor_temp_pwm = self.duty_max + else: + sensor_temp_pwm = int((65 / 20) * (sensor_temp - 28) + 35) + + return self.choose_pwm(temp_ascend, self.last_pwm, sensor_temp_pwm) + else: + if not temp_ascend: # F2B: U28,U29 temperature down + if sensor_temp <= 41: + sensor_temp_pwm = 35 + elif sensor_temp >= 51: + sensor_temp_pwm = 90 + else: + sensor_temp_pwm = int((55 / 10) * (sensor_temp - 41) + 35) + else: # U17 temperature up + if sensor_temp <= 44: + sensor_temp_pwm = 35 + elif sensor_temp >= 54: + sensor_temp_pwm = 90 + else: + sensor_temp_pwm = int((55 / 10) * (sensor_temp - 44) + 35) + return self.choose_pwm(temp_ascend, self.last_pwm, sensor_temp_pwm) + + @staticmethod + def choose_pwm(status, last_pwm, now_pwm): + """ + choose the pwm with Thermal rules + :param status: Temperature rises (True) or falls(False) + :param last_pwm:last pwm value + :param now_pwm:Calculated pwm from current temperature + :return:int.The pwm value + """ + if status: + return last_pwm if last_pwm >= now_pwm else now_pwm + else: + return now_pwm if last_pwm >= now_pwm else last_pwm + + def linear_control(self): + """ + According to linear adjustment return the fans pwm + :return: fans pwm + """ + new_perc = self.get_fan_pwm_by_temperature(self.init_fan_temperature) + self.init_fan_temperature = self.get_all_temperature() + self.last_pwm = new_perc + return new_perc diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/SwitchInternalPIDRegulation.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/SwitchInternalPIDRegulation.py new file mode 100755 index 000000000000..17992e830e86 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/SwitchInternalPIDRegulation.py @@ -0,0 +1,162 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/6/19 16:26 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Perform fan PWM PID control according to the Switch Internal temperature provided by the Thermal team + +try: + import os + import sys + import getopt + import subprocess + import statistics + import logging + import logging.config + import time # this is only being used as part of the example + import signal + from sonic_platform import platform +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Defaults +FUNCTION_NAME = 'FanControl' +DUTY_MAX = 100 +SW_TEMP_MAX = 125 +SW_MAJOR_ALARM = 105 +SW_SHUTDOWN = 120 +SW_CRITICAL = 110 +TEMP_DIFF = 15 # abs(Tk - Tk-1) limit +SWITCH_INTERNAL_PEAK_TEMP = "bcmcmd 'show temp' | grep maximum | cut -d ' ' -f 5" + +# PID Defaults Value +PWM_LIST = [35] # [PWMk-1] +T_LIST = [] # [Tk-2, Tk-1, Tk] +Kp = 2.5 +Ki = 0.5 +Kd = 0.3 +SET_POINT = 86 +PWM_MIN = 35 +PWM_MAX = 100 + + +class SwitchInternalPIDRegulation(object): + """ + Make a class we can use to capture stdout and sterr in the log + """ + _new_perc = DUTY_MAX / 2 + syslog = logging.getLogger("[" + FUNCTION_NAME + "]") + + def __init__(self, log_file, log_level): + # Needs a logger and a logger level + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address='/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + self.syslog.setLevel(logging.WARNING) + self.syslog.addHandler(sys_handler) + self.platform_chassis_obj = platform.Platform().get_chassis() + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='a', + level=log_level, + format='[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + logging.debug('SET. logfile:%s / loglevel:%d' % (log_file, log_level)) + + def get_switch_internal_temperature(self): + """ + Get Switch internal temperature + """ + try: + value = subprocess.check_output(SWITCH_INTERNAL_PEAK_TEMP, shell=True,universal_newlines=True, stderr=subprocess.STDOUT)[:-1] + return int(float(value)) + except Exception as E: + self.syslog.warning("Can't Get switch internal temperature! Cause:%s" % str(E)) + logging.warning("Can't Get switch internal temperature! Cause:%s" % str(E)) + return False + + def exception_data_handling(self): + """ + Get the temperature of Switch Internal, and confirm whether the obtained value meets the conditions: + 1. The temperature range is 0~150; + 2. The temperature difference from the last time is within 15 + Otherwise, loop 5 times to get the temperature value again: + 1. if can't get the int value of temperature, return False; + 2. all temperatures are int, return the temperatures average value + """ + re_try = False + sw_temp = self.get_switch_internal_temperature() + if sw_temp is False: + re_try = True + elif sw_temp not in range(SW_TEMP_MAX+1): + re_try = True + elif T_LIST and abs(sw_temp - T_LIST[-1]) > TEMP_DIFF: + re_try = True + + if re_try: + error_temp_list = list() + while len(error_temp_list) < 5: + sw_temp = self.get_switch_internal_temperature() + if (type(sw_temp) is int) and \ + (sw_temp in range(SW_TEMP_MAX+1)) and \ + (abs(sw_temp - T_LIST[-1]) <= TEMP_DIFF): + return sw_temp + else: + error_temp_list.append(sw_temp) + if False in error_temp_list: + return False + return statistics.mean(error_temp_list) + return sw_temp + + def pid_control(self): + """ + PID adjustment according to Switch Internal Temperature + :return: fans pwm + """ + sw_temp = self.exception_data_handling() + if not sw_temp: + return 50 + + if sw_temp >= SW_SHUTDOWN: + logging.critical("The Switch Internal temperature exceeds %sC, DUT will reboot after 30 seconds" % SW_SHUTDOWN) + time.sleep(30) + os.popen("reboot") + elif sw_temp >= SW_CRITICAL: + logging.critical("High temperature critical warning: switch internal temperature %sC, High critical %sC" + % (sw_temp, SW_CRITICAL)) + elif sw_temp >= SW_MAJOR_ALARM: + logging.critical("High temperature warning: switch internal temperature %sC, High warning %sC" + % (sw_temp, SW_MAJOR_ALARM)) + + if len(T_LIST) < 2: + T_LIST.append(float(sw_temp)) + self.syslog.debug("Init Switch Internal PID Control T_LIST:%s" % T_LIST) + logging.info("Init Switch Internal PID Control T_LIST:%s" % T_LIST) + return PWM_LIST[0] + else: + T_LIST.append(float(sw_temp)) + pwm_k = PWM_LIST[0] + Kp * (T_LIST[2] - T_LIST[1]) + \ + Ki * (T_LIST[2] - SET_POINT) + \ + Kd * (T_LIST[2] - 2 * T_LIST[1] + T_LIST[0]) + if pwm_k < PWM_MIN: + #logging.info("Switch Internal PID PWM calculation value < %d, %d will be used"% (PWM_MIN, PWM_MIN)) + pwm_k = PWM_MIN + elif pwm_k > PWM_MAX: + logging.critical("Switch Internal PID PWM calculation value > %d, %d will be used" + % (PWM_MAX, PWM_MAX)) + pwm_k = PWM_MAX + PWM_LIST[0] = pwm_k + #logging.info("Switch Internal PID: PWM=%d Temp list=%s" % (pwm_k, T_LIST)) + T_LIST.pop(0) + return pwm_k diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/__init__.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/__init__.py new file mode 100755 index 000000000000..fd2df8085779 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/__init__.py @@ -0,0 +1,5 @@ +# -*- coding: utf-8 -*-# + +# @Time : 2023/6/20 16:01 +# @Mail : yajiang@celestica.com +# @Author : jiang tao diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/pddf_fan_control_sensor_refresh.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/pddf_fan_control_sensor_refresh.py new file mode 100755 index 000000000000..f47aadb53c1f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/pddf_fan_control_sensor_refresh.py @@ -0,0 +1,20 @@ +#!/usr/bin/python +# -*- coding: utf-8 -*-# + +# @Time : 2023/7/31 13:15 +# @Mail : yajiang@celestica.com +# @Author : jiang tao + +import sys +import os +import json +sys.path.append(r"/usr/local/bin") +from FanControl import FanControl + + +pddf_device_path = '/usr/share/sonic/platform/pddf/pddf-device.json' +with open(pddf_device_path) as f: + json_data = json.load(f) +bmc_present = json_data["PLATFORM"]["bmc_present"] +if bmc_present == "False": + FanControl.main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/Makefile new file mode 100644 index 000000000000..183bf0a20059 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/Makefile @@ -0,0 +1,8 @@ +LED_TARGET:= pddf_custom_led_module +$(LED_TARGET)-objs := ./led_driver/pddf_custom_led_module.o + +PSU_TARGET:= pddf_custom_psu_driver_module +$(PSU_TARGET)-objs := ./psu_driver/pddf_psu_api.o ./psu_driver/pddf_psu_driver.o + +obj-m := mc24lc64t.o baseboard_cpld.o pddf_custom_fpga_algo.o pddf_custom_fpga_extend.o +obj-m += $(LED_TARGET).o $(PSU_TARGET).o diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/baseboard_cpld.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/baseboard_cpld.c new file mode 100644 index 000000000000..54d4c1514815 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/baseboard_cpld.c @@ -0,0 +1,414 @@ +/* + * baseboard_cpld.c - driver for DS3000 Base Board CPLD + * This driver implement sysfs for CPLD register access using LPC bus. + * Copyright (C) 2019 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "baseboard" +/** + * CPLD register address for read and write. + */ +#define VERSION_ADDR 0xA100 +#define SCRATCH_ADDR 0xA101 +#define SYS_LED_ADDR 0xA162 +#define CARD_PRES_ADDR 0xA108 +#define COME_CPLD_VER_ADDR 0xA1E0 + +#define CPLD_REGISTER_SIZE 0x77 + +struct baseboard_cpld_data { + struct mutex cpld_lock; + uint16_t read_addr; +}; + +struct baseboard_cpld_data *cpld_data; + +/** + * Read the value from scratch register as hex string. + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t scratch_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf,"0x%2.2x\n", data); +} + +/** + * Set scratch register with specific hex string. + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t scratch_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned long data; + char *last; + + mutex_lock(&cpld_data->cpld_lock); + data = (uint16_t)strtoul(buf,&last,16); + if(data == 0 && buf == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + outb(data, SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(scratch); + + +/* CPLD version attributes */ +static ssize_t version_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = -EIO; + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + len = sprintf(buf, "0x%2.2x\n",inb(VERSION_ADDR)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RO(version); + + +static ssize_t getreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // CPLD register is one byte + uint16_t addr; + char *last; + + addr = (uint16_t)strtoul(buf,&last,16); + if(addr == 0 && buf == last){ + return -EINVAL; + } + cpld_data->read_addr = addr; + return count; +} + +static ssize_t getreg_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = -EIO; + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + len = sprintf(buf, "0x%2.2x\n",inb(cpld_data->read_addr)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RW(getreg); + +static ssize_t setreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // CPLD register is one byte + uint16_t addr; + uint8_t value; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + + strscpy(clone, buf, count); + + mutex_lock(&cpld_data->cpld_lock); + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + addr = (uint16_t)strtoul(tok,&last,16); + if(addr == 0 && tok == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + value = (uint8_t)strtoul(tok,&last,16); + if(value == 0 && tok == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + outb(value,addr); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_WO(setreg); + +/** + * Show system led status - on/off/1hz/4hz + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t sys_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + data = data & 0x3; + return sprintf(buf, "%s\n", + data == 0x03 ? "off" : data == 0x02 ? "4hz" : data ==0x01 ? "1hz": "on"); +} + +/** + * Set the status of system led - on/off/1hz/4hz + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t sys_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status,data; + if(sysfs_streq(buf, "off")){ + led_status = 0x03; + }else if(sysfs_streq(buf, "4hz")){ + led_status = 0x02; + }else if(sysfs_streq(buf, "1hz")){ + led_status = 0x01; + }else if(sysfs_streq(buf, "on")){ + led_status = 0x00; + }else{ + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + data = data & ~(0x3); + data = data | led_status; + outb(data, SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(sys_led); + +/** + * Show system led color - both/green/yellow/none + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t sys_led_color_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + data = (data >> 4) & 0x3; + return sprintf(buf, "%s\n", + data == 0x03 ? "off" : data == 0x02 ? "yellow" : data ==0x01 ? "green": "both"); +} + +/** + * Set the color of system led - both/green/yellow/none + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t sys_led_color_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status,data; + if(sysfs_streq(buf, "off")){ + led_status = 0x03; + }else if(sysfs_streq(buf, "yellow")){ + led_status = 0x02; + }else if(sysfs_streq(buf, "green")){ + led_status = 0x01; + }else if(sysfs_streq(buf, "both")){ + led_status = 0x00; + }else{ + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + data = data & ~( 0x3 << 4); + data = data | (led_status << 4); + outb(data, SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(sys_led_color); + +/** + * Show BMC card presence + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return string absent or present of BMC card. + */ +static ssize_t bmc_presence_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(CARD_PRES_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + data = data & 0x1; + return sprintf(buf, "%s\n", + data == 0x01 ? "absent" : "present"); +} +static DEVICE_ATTR_RO(bmc_presence); + +/* COME CPLD version attributes */ +static ssize_t come_cpld_version_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = -EIO; + // COME CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + len = sprintf(buf, "0x%2.2x\n",inb(COME_CPLD_VER_ADDR)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RO(come_cpld_version); + +static struct attribute *baseboard_cpld_attrs[] = { + &dev_attr_version.attr, + &dev_attr_scratch.attr, + &dev_attr_getreg.attr, + &dev_attr_setreg.attr, + &dev_attr_sys_led.attr, + &dev_attr_sys_led_color.attr, + &dev_attr_bmc_presence.attr, + &dev_attr_come_cpld_version.attr, + NULL, +}; + +static struct attribute_group baseboard_cpld_attrs_grp = { + .attrs = baseboard_cpld_attrs, +}; + +static struct resource baseboard_cpld_resources[] = { + { + .start = 0xA100, + .end = 0xA1FF, + .flags = IORESOURCE_IO, + }, +}; + +static void baseboard_cpld_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device baseboard_cpld_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(baseboard_cpld_resources), + .resource = baseboard_cpld_resources, + .dev = { + .release = baseboard_cpld_dev_release, + } +}; + +static int baseboard_cpld_drv_probe(struct platform_device *pdev) +{ + struct resource *res; + int ret =0; + + cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct baseboard_cpld_data), + GFP_KERNEL); + if (!cpld_data) + return -ENOMEM; + + mutex_init(&cpld_data->cpld_lock); + + cpld_data->read_addr = VERSION_ADDR; + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (unlikely(!res)) { + printk(KERN_ERR "Specified Resource Not Available...\n"); + return -1; + } + + ret = sysfs_create_group(&pdev->dev.kobj, &baseboard_cpld_attrs_grp); + if (ret) { + printk(KERN_ERR "Cannot create sysfs for baseboard CPLD\n"); + } + return 0; +} + +static int baseboard_cpld_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &baseboard_cpld_attrs_grp); + return 0; +} + +static struct platform_driver baseboard_cpld_drv = { + .probe = baseboard_cpld_drv_probe, + .remove = __exit_p(baseboard_cpld_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int baseboard_cpld_init(void) +{ + // Register platform device and platform driver + platform_device_register(&baseboard_cpld_dev); + platform_driver_register(&baseboard_cpld_drv); + return 0; +} + +void baseboard_cpld_exit(void) +{ + // Unregister platform device and platform driver + platform_driver_unregister(&baseboard_cpld_drv); + platform_device_unregister(&baseboard_cpld_dev); +} + +module_init(baseboard_cpld_init); +module_exit(baseboard_cpld_exit); + +MODULE_AUTHOR("Pradchaya Phucharoen "); +MODULE_DESCRIPTION("Celestica DS3000 Baseboard CPLD Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_defs.h b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_defs.h new file mode 100644 index 000000000000..e786e567d433 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_defs.h @@ -0,0 +1,149 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * Platform LED related defines and structures + */ + + +/***************************************** + * kobj list + *****************************************/ + +struct kobject *platform_kobj=NULL; +struct kobject *led_kobj=NULL; + +struct kobject *state_attr_kobj=NULL; +struct kobject *cur_state_kobj=NULL; + +/***************************************** + * Static Data provided from user + * space JSON data file + *****************************************/ +#define NAME_SIZE 32 +#define VALUE_SIZE 5 +typedef enum { + STATUS_LED_COLOR_OFF=0, + STATUS_LED_COLOR_GREEN=1, + STATUS_LED_COLOR_YELLOW=2, + STATUS_LED_COLOR_RED=3, + STATUS_LED_COLOR_BLUE=4, + STATUS_LED_COLOR_GREEN_BLINK=5, + STATUS_LED_COLOR_YELLOW_BLINK=6, + STATUS_LED_COLOR_RED_BLINK=7, + STATUS_LED_COLOR_BLUE_BLINK=8, + STATUS_LED_COLOR_AMBER, + STATUS_LED_COLOR_AMBER_BLINK, + MAX_LED_STATUS +}LED_STATUS; + +char* LED_STATUS_STR[] = { + "off", + "green", + "yellow", + "red", + "blue", + "green_blink", + "yellow_blink", + "red_blink", + "blue_blink", + "amber", + "amber_blink" +}; + + +typedef struct +{ + char bits[NAME_SIZE]; + int pos; + int mask_bits; +}MASK_BITS; + +typedef struct +{ + int swpld_addr; + int swpld_addr_offset; + MASK_BITS bits; + u8 reg_values[VALUE_SIZE]; + char value[NAME_SIZE]; + char attr_devtype[NAME_SIZE]; + char attr_devname[NAME_SIZE]; +} LED_DATA; + +typedef struct +{ + int state; + char color[NAME_SIZE]; +/* S3IP System LED RW sysfs */ + int sys_led; + int bmc_led; + int fan_led; + int psu_led; + int loc_led; +/* S3IP Power LED RO sysfs */ + int psu1_led; + int psu2_led; +/* S3IP Fantray LED RO sysfs */ + int fantray1_led; + int fantray2_led; + int fantray3_led; + int fantray4_led; + int fantray5_led; + int fantray6_led; + int fantray7_led; +} CUR_STATE_DATA; + +typedef struct +{ + CUR_STATE_DATA cur_state; + char device_name[NAME_SIZE]; + int index; + LED_DATA data[MAX_LED_STATUS]; + int swpld_addr; + int swpld_addr_offset; + char attr_devtype[NAME_SIZE]; + char attr_devname[NAME_SIZE]; +} LED_OPS_DATA; + +typedef enum{ + LED_SYS, + LED_PSU, + LED_FAN, + LED_FANTRAY, + LED_DIAG, + LED_LOC, + LED_BMC, + LED_TYPE_MAX +} LED_TYPE; +char* LED_TYPE_STR[LED_TYPE_MAX] = +{ + "LED_SYS", + "LED_PSU", + "LED_FAN", + "LED_FANTRAY", + "LED_DIAG", + "LED_LOC", + "LED_BMC" +}; + +/***************************************** + * Data exported from kernel for + * user space plugin to get/set + *****************************************/ +#define PDDF_LED_DATA_ATTR( _prefix, _name, _mode, _show, _store, _type, _len, _addr) \ + struct pddf_data_attribute pddf_dev_##_prefix##_attr_##_name = { .dev_attr = __ATTR(_name, _mode, _show, _store), \ + .type = _type , \ + .len = _len , \ + .addr = _addr } diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_module.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_module.c new file mode 100644 index 000000000000..8f0da48b4d98 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_module.c @@ -0,0 +1,873 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module to manage various LEDs of a switch + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include "pddf_custom_led_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include +#include +#include + +#define DEBUG 0 +#define MAX_PSU_NUM 2 +#define MAX_FANTRAY_NUM 7 +LED_OPS_DATA sys_led_ops_data[1]={0}; +LED_OPS_DATA psu_led_ops_data[MAX_PSU_NUM]={0}; +LED_OPS_DATA diag_led_ops_data[1]= {0}; +LED_OPS_DATA fan_led_ops_data[1]= {0}; +LED_OPS_DATA loc_led_ops_data[1]= {0}; +LED_OPS_DATA bmc_led_ops_data[1]= {0}; +LED_OPS_DATA fantray_led_ops_data[MAX_FANTRAY_NUM]={0}; +LED_OPS_DATA temp_data={0}; +LED_OPS_DATA* dev_list[LED_TYPE_MAX] = { + sys_led_ops_data, + psu_led_ops_data, + fan_led_ops_data, + fantray_led_ops_data, + diag_led_ops_data, + loc_led_ops_data, + bmc_led_ops_data, + NULL +}; +int num_psus = 0; +int num_fantrays = 0; + +extern int board_i2c_cpld_read_new(unsigned short cpld_addr, char *name, u8 reg); +extern int board_i2c_cpld_write_new(unsigned short cpld_addr, char *name, u8 reg, u8 value); +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); +extern int board_i2c_fpga_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_fpga_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern ssize_t show_pddf_data(struct device *dev, struct device_attribute *da, char *buf); +extern ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +extern ssize_t show_pddf_s3ip_data(struct device *dev, struct device_attribute *da, char *buf); +extern ssize_t store_pddf_s3ip_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + +static LED_STATUS find_state_index(const char* state_str) { + int index; + char *ptr = (char *)state_str; + while (*ptr && *ptr!= '\n' && *ptr !='\0') ptr++; + *ptr='\0'; + for ( index = 0; index < MAX_LED_STATUS; index++) { + if (strcmp(state_str, LED_STATUS_STR[index]) == 0 ) { + return index; + } + } + return MAX_LED_STATUS; +} + +static LED_TYPE get_dev_type(char* name) +{ + LED_TYPE ret = LED_TYPE_MAX; + if(strcasecmp(name, "SYS_LED") == 0) { + ret = LED_SYS; + } else if(strcasecmp(name, "FAN_LED") == 0) { + ret = LED_FAN; + } else if(strstr(name, "PSU_LED")) { + ret = LED_PSU; + } else if(strcasecmp(name, "DIAG_LED") == 0) { + ret = LED_DIAG; + } else if(strcasecmp(name, "LOC_LED") == 0) { + ret = LED_LOC; + } else if(strstr(name, "FANTRAY_LED")) { + ret = LED_FANTRAY; + } +#if DEBUG > 1 + pddf_dbg(LED, KERN_INFO "LED get_dev_type: %s; %d\n", name, ret); +#endif + return (ret); +} +static int dev_index_check(LED_TYPE type, int index) +{ +#if DEBUG + pddf_dbg(LED, "dev_index_check: type:%s[%d] index:%d num_psus:%d num_fantrays:%d\n", + LED_TYPE_STR[type], type, index, num_psus, num_fantrays); +#endif + switch(type) + { + case LED_PSU: + if(index >= MAX_PSU_NUM) return (-1); + break; + case LED_FANTRAY: + if(index >= MAX_FANTRAY_NUM) return (-1); + break; + default: + if(index >= 1) return (-1); + break; + } + return (0); +} + +static LED_OPS_DATA* find_led_ops_data(struct device_attribute *da) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr = (LED_OPS_DATA*)_ptr->addr; + LED_TYPE led_type; + if(!ptr || strlen(ptr->device_name) == 0 ) return (NULL); + + if((led_type=get_dev_type(ptr->device_name)) == LED_TYPE_MAX) { + printk(KERN_ERR "PDDF_LED ERROR *%s Unsupported Led Type\n", __func__); + return (NULL); + } + if(dev_index_check(led_type, ptr->index) == -1) { + printk(KERN_ERR "PDDF_LED ERROR %s invalid index: %d for type:%s;%d\n", __func__, ptr->index, ptr->device_name, led_type); + return (NULL); + } +#if DEBUG > 1 + pddf_dbg(LED, "find_led_ops_data: name:%s; index=%d tempAddr:%p actualAddr:%p\n", + ptr->device_name, ptr->index, ptr, dev_list[led_type]+ptr->index); +#endif + return (dev_list[led_type]+ptr->index); +} + +static void print_led_data(LED_OPS_DATA *ptr, LED_STATUS state) +{ + int i = 0; + if(!ptr) return ; + pddf_dbg(LED, KERN_INFO "Print %s index:%d num_psus:%d num_fantrays:%d ADDR=%p\n", + ptr->device_name, ptr->index, num_psus, num_fantrays, ptr); + pddf_dbg(LED, KERN_INFO "\tindex: %d\n", ptr->index); + pddf_dbg(LED, KERN_INFO "\tdevtype/devname: %s:%s\n", ptr->attr_devtype, ptr->attr_devname); + pddf_dbg(LED, KERN_INFO "\tcur_state: %d; %s \n", ptr->cur_state.state, ptr->cur_state.color); + for (i = 0; i< MAX_LED_STATUS; i++) { + if(ptr->data[i].swpld_addr && (i == state || state == -1)) { + pddf_dbg(LED, KERN_INFO "\t\t[%s]: addr/offset:0x%x;0x%x color:%s; value:[%s][0x%x][0x%x] mask_bits: 0x%x;" + "pos:%d attr_devtype:%s attr_devname:%s\n",LED_STATUS_STR[i], ptr->data[i].swpld_addr, + ptr->data[i].swpld_addr_offset, LED_STATUS_STR[i], ptr->data[i].value, + ptr->data[i].reg_values[0], ptr->data[i].reg_values[1], ptr->data[i].bits.mask_bits, + ptr->data[i].bits.pos, ptr->data[i].attr_devtype, ptr->data[i].attr_devname); + } + } +} + +ssize_t get_status_led(struct device_attribute *da) +{ + int ret=0; + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* temp_data_ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + uint32_t color_val=0, sys_val=0; + int state=0; + int cpld_type=0; + int j; + + if (!ops_ptr) { + pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot find LED Ptr", __func__); + return (-1); + } + + if (ops_ptr->swpld_addr == 0x0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: device: %s %d not configured\n", __func__, + temp_data_ptr->device_name, temp_data_ptr->index); + return (-1); + } + + if (strcmp(ops_ptr->attr_devtype, "cpld") == 0) { + cpld_type = 1; + sys_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset); + } else if (strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) { + sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return (-1); + } + + if (sys_val < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x read failed\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return sys_val; + } + + strscpy(temp_data.cur_state.color, "None", NAME_SIZE); + for (state=0; statedata[state].bits.mask_bits); + for (j = 0; j < VALUE_SIZE && ops_ptr->data[state].reg_values[j] != 0xff; j++) { + if ((color_val ^ (ops_ptr->data[state].reg_values[j] << ops_ptr->data[state].bits.pos)) == 0) { + strscpy(temp_data.cur_state.color, LED_STATUS_STR[state], NAME_SIZE); + break; + } + } + } +#if DEBUG + pddf_dbg(LED, KERN_ERR "Get : %s:%d addr/offset:0x%x; 0x%x devtype:%s;%s value=0x%x [%s]\n", + ops_ptr->device_name, ops_ptr->index, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, + ops_ptr->attr_devtype, cpld_type? "cpld": "fpgai2c", sys_val, temp_data.cur_state.color); +#endif + return(ret); +} + +ssize_t set_status_led(struct device_attribute *da) +{ + int ret=0; + uint32_t sys_val=0, new_val=0, read_val=0; + LED_STATUS cur_state = MAX_LED_STATUS; + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* temp_data_ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + char* _buf=temp_data_ptr->cur_state.color; + int cpld_type = 0; + + if (!ops_ptr) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: Cannot find LED Ptr", __func__); + return (-1); + } + + if (ops_ptr->swpld_addr == 0x0) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: device: %s %d not configured\n", + __func__, ops_ptr->device_name, ops_ptr->index); + return (-1); + } + + pddf_dbg(LED, KERN_ERR "%s: Set [%s;%d] color[%s]\n", __func__, + temp_data_ptr->device_name, temp_data_ptr->index, + temp_data_ptr->cur_state.color); + cur_state = find_state_index(_buf); + + if (cur_state == MAX_LED_STATUS) { + pddf_dbg(LED, KERN_ERR "ERROR %s: not supported: %s\n", _buf, __func__); + return (-1); + } + + if (ops_ptr->data[cur_state].swpld_addr != 0x0) { + if (strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) { + cpld_type = 1; + sys_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset); + } else if (strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) { + sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype); + return (-1); + } + + if (sys_val < 0){ + return sys_val; + } + + + new_val = (sys_val & ops_ptr->data[cur_state].bits.mask_bits) | + (ops_ptr->data[cur_state].reg_values[0] << ops_ptr->data[cur_state].bits.pos); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s state %d; %s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, cur_state, _buf); + return (-1); + } + + if (strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) { + ret = board_i2c_cpld_write_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset, new_val); + read_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset); + } else if (strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) { + ret = board_i2c_fpga_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, (uint8_t)new_val); + read_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype); + return (-1); + } + +#if DEBUG + pddf_dbg(LED, KERN_ERR "Set color:%s; 0x%x:0x%x sys_val:0x%x new_val:0x%x devtype:%s w_ret:0x%x read:0x%x devtype:%s\n", + LED_STATUS_STR[cur_state], ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, sys_val, new_val, + cpld_type? "cpld":"fpgai2c", ret, read_val, ops_ptr->data[cur_state].attr_devtype); +#endif + + return(ret); +} + + +ssize_t show_pddf_data(struct device *dev, struct device_attribute *da, + char *buf) +{ + int ret = 0; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + switch (ptr->type) + { + case PDDF_CHAR: + ret = sprintf(buf, "%s\n", ptr->addr); + break; + case PDDF_INT_DEC: + ret = sprintf(buf, "%d\n", *(int*)(ptr->addr)); + break; + case PDDF_INT_HEX: + ret = sprintf(buf, "0x%x\n", *(int*)(ptr->addr)); + break; + case PDDF_USHORT: + ret = sprintf(buf, "0x%x\n", *(unsigned short *)(ptr->addr)); + break; + case PDDF_UINT32: + ret = sprintf(buf, "0x%x\n", *(uint32_t *)(ptr->addr)); + break; + default: + break; + } +#if DEBUG > 1 + pddf_dbg(LED, "[ READ ] DATA ATTR PTR [%s] TYPE:%d, Value:[%s]\n", + ptr->dev_attr.attr.name, ptr->type, buf); +#endif + return ret; +} + +ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int ret = 0, num = 0; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + switch (ptr->type) + { + case PDDF_CHAR: + memcpy(ptr->addr, buf, strlen(buf)-1); // to discard newline char form buf + ptr->addr[strlen(buf)-1] = '\0'; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_CHAR VALUE:%s\n", + ptr->dev_attr.attr.name, ptr->addr); +#endif + break; + case PDDF_INT_DEC: + ret = kstrtoint(buf,10,&num); + if (ret==0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_DEC VALUE:%d\n", + ptr->dev_attr.attr.name, *(int *)(ptr->addr)); +#endif + break; + case PDDF_INT_HEX: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_HEX VALUE:0x%x\n", + ptr->dev_attr.attr.name, *(int *)(ptr->addr)); +#endif + break; + case PDDF_USHORT: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(unsigned short *)(ptr->addr) = (unsigned short)num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_USHORT VALUE:%x\n", + ptr->dev_attr.attr.name, *(unsigned short *)(ptr->addr)); +#endif + break; + case PDDF_UINT32: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(uint32_t *)(ptr->addr) = (uint32_t)num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_UINT32 VALUE:%d\n", + ptr->dev_attr.attr.name, *(uint32_t *)(ptr->addr)); +#endif + break; + default: + break; + } + return count; +} + +ssize_t show_pddf_s3ip_data(struct device *dev, struct device_attribute *da, + char *buf) +{ + int ret = 0; + pddf_dbg(LED, KERN_ERR " %s", __FUNCTION__); + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + if (_ptr == NULL) { + pddf_dbg(LED, KERN_ERR "%s return", __FUNCTION__); + return -1; + } + LED_OPS_DATA* ops_ptr=(LED_OPS_DATA*)_ptr->addr; + uint32_t color_val=0, sys_val=0; + int state=0, j; + int cpld_type=0; + if (!ops_ptr) { + pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot find LED Ptr", __func__); + return (-1); + } + if (ops_ptr->swpld_addr == 0x0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: device: %s %d not configured\n", __func__, + ops_ptr->device_name, ops_ptr->index); + return (-1); + } + if ( strcmp(ops_ptr->attr_devtype, "cpld") == 0) { + cpld_type=1; + sys_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else if ( strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) { + sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return (-1); + } + + if (sys_val < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x read failed\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return sys_val; + } + for (state=0; statedata[state].bits.mask_bits); + for (j = 0; j < VALUE_SIZE && ops_ptr->data[state].reg_values[j] != 0xff; j++) { + if ((color_val ^ (ops_ptr->data[state].reg_values[j] << ops_ptr->data[state].bits.pos))==0) { + ret = sprintf(buf, "%d\n", state); + break; + } + } + } +#if DEBUG + pddf_dbg(LED, KERN_ERR "Get : %s:%d addr/offset:0x%x; 0x%x devtype:%s;%s value=0x%x [%d]\n", + ops_ptr->device_name, ops_ptr->index, ops_ptr->swpld_addr, + ops_ptr->swpld_addr_offset, ops_ptr->attr_devtype, cpld_type? "cpld": "fpgai2c", sys_val, state); +#endif + return ret; +} + +ssize_t store_pddf_s3ip_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int ret = 0; + int cur_state = 0; + uint32_t sys_val=0, new_val=0, read_val=0; + int cpld_type=0; + + pddf_dbg(LED, KERN_ERR "%s: %s;%d", __FUNCTION__, buf, cur_state); + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + ret = kstrtoint(buf,10,&cur_state); + if (_ptr == NULL || cur_state >= MAX_LED_STATUS || ret !=0) { + pddf_dbg(LED, KERN_ERR "%s return", __FUNCTION__); + return -1; + } + LED_OPS_DATA* ops_ptr=(LED_OPS_DATA*)_ptr->addr; + + if ( strcmp(ops_ptr->attr_devtype, "cpld") == 0) { + cpld_type=1; + sys_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else if ( strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) { + sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return (-1); + } + + new_val = (sys_val & ops_ptr->data[cur_state].bits.mask_bits) | + (ops_ptr->data[cur_state].reg_values[0] << ops_ptr->data[cur_state].bits.pos); + + if ( strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) { + ret = board_i2c_cpld_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, new_val); + read_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else if ( strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) { + ret = board_i2c_fpga_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, (uint8_t)new_val); + read_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype); + return (-1); + } + +#if DEBUG + pddf_dbg(LED, KERN_INFO "Set color:%s; 0x%x:0x%x sys_val:0x%x new_val:0x%x devtype:%s w_ret:0x%x read:0x%x devtype:%s\n", + LED_STATUS_STR[cur_state], ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, + sys_val, new_val, cpld_type? "cpld":"fpgai2c", ret, read_val, ops_ptr->data[cur_state].attr_devtype); +#endif + return count; +} + + +static int load_led_ops_data(struct device_attribute *da, LED_STATUS state) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr = (LED_OPS_DATA*)_ptr->addr; + LED_TYPE led_type; + LED_OPS_DATA* ops_ptr = NULL; + int i = 0; + char *token = NULL, *value_ptr = NULL; + + if(!ptr || strlen(ptr->device_name)==0 ) { + pddf_dbg(LED, KERN_INFO "SYSTEM_LED: load_led_ops_data return -1 device_name:%s\n", ptr? ptr->device_name:"NULL"); + return(-1); + } + + if(ptr->device_name) + { + pddf_dbg(LED, KERN_INFO "[%s]: load_led_ops_data: index=%d addr=0x%x;0x%x devtype:%s devname=%s valu=%s\n", + ptr->device_name, ptr->index, ptr->swpld_addr, ptr->swpld_addr_offset, ptr->attr_devtype, ptr->attr_devname, ptr->data[0].value); + } + if((led_type=get_dev_type(ptr->device_name))==LED_TYPE_MAX) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR *%s Unsupported Led Type\n", __func__); + return(-1); + } + if(dev_index_check(led_type, ptr->index)==-1) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s invalid index: %d for type:%d\n", __func__, ptr->index, led_type); + return(-1); + } + ops_ptr = dev_list[led_type]+ptr->index; + + memcpy(ops_ptr->device_name, ptr->device_name, sizeof(ops_ptr->device_name)); + ops_ptr->index = ptr->index; + memcpy(&ops_ptr->data[state], &ptr->data[0], sizeof(LED_DATA)); + ops_ptr->data[state].swpld_addr = ptr->swpld_addr; + ops_ptr->data[state].swpld_addr_offset = ptr->swpld_addr_offset; + ops_ptr->swpld_addr = ptr->swpld_addr; + ops_ptr->swpld_addr_offset = ptr->swpld_addr_offset; + memcpy(ops_ptr->data[state].attr_devtype, ptr->attr_devtype, sizeof(ops_ptr->data[state].attr_devtype)); + memcpy(ops_ptr->data[state].attr_devname, ptr->attr_devname, sizeof(ops_ptr->data[state].attr_devname)); + memcpy(ops_ptr->attr_devtype, ptr->attr_devtype, sizeof(ops_ptr->attr_devtype)); + memcpy(ops_ptr->attr_devname, ptr->attr_devname, sizeof(ops_ptr->attr_devname)); +#ifdef __STDC_LIB_EXT1__ + memset_s(ops_ptr->data[state].reg_values, sizeof(ops_ptr->data[state].reg_values), 0xff, sizeof(ops_ptr->data[state].reg_values)); +#else + memset(ops_ptr->data[state].reg_values, 0xff, sizeof(ops_ptr->data[state].reg_values)); +#endif + value_ptr = kzalloc(sizeof(ops_ptr->data[state].value), GFP_KERNEL); + if (value_ptr) { + memcpy(value_ptr, ops_ptr->data[state].value, sizeof(ops_ptr->data[state].value)); + while((token = strsep((char**)&value_ptr,";")) != NULL && i < VALUE_SIZE) { + if (kstrtou8(token, 16, &ops_ptr->data[state].reg_values[i])) { + pddf_dbg(LED, KERN_ERR "load_led_ops_data: [%s] conversion error\n", token); + } + i++; + } + kfree(value_ptr); + } + + print_led_data(dev_list[led_type]+ptr->index, state); + + memset(ptr, 0, sizeof(LED_OPS_DATA)); + return (0); +} + +static int show_led_ops_data(struct device_attribute *da) +{ + LED_OPS_DATA* ops_ptr = find_led_ops_data(da); + print_led_data(ops_ptr, -1); + return(0); +} + +static int verify_led_ops_data(struct device_attribute *da) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + + if(ops_ptr) + memcpy(ptr, ops_ptr, sizeof(LED_OPS_DATA)); + else + { + pddf_dbg(LED, "SYSTEM_LED: verify_led_ops_data: Failed to find ops_ptr name:%s; index=%d\n", ptr->device_name, ptr->index); + } + return (0); +} + + +ssize_t dev_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ +#if DEBUG + pddf_dbg(LED, KERN_INFO "dev_operation [%s]\n", buf); +#endif + if(strncmp(buf, "show", strlen("show")) == 0) { + show_led_ops_data(da); + } + else if(strncmp(buf, "verify", strlen("verify")) == 0) { + verify_led_ops_data(da); + } + else if(strncmp(buf, "get_status", strlen("get_status")) == 0) { + get_status_led(da); + } + else if(strncmp(buf, "set_status", strlen("set_status")) == 0) { + set_status_led(da); + } + else { + LED_STATUS index = find_state_index(buf); + if (index < MAX_LED_STATUS) { + load_led_ops_data(da, index); + } else { + printk(KERN_ERR "PDDF_ERROR: %s: Invalid value for dev_ops %s\n", __FUNCTION__, buf); + } + } + return (count); +} + +ssize_t store_config_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int ret, num; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + if(strncmp(ptr->dev_attr.attr.name, "num_psus", strlen("num_psus")) == 0) { + ret = kstrtoint(buf,10,&num); + if (ret==0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, "[ WRITE ] ATTR CONFIG [%s] VALUE:%d; %d\n", + ptr->dev_attr.attr.name, num, num_psus); +#endif + return(count); + } + if (strncmp(ptr->dev_attr.attr.name, "num_fantrays", strlen("num_fantrays")) ==0) { + ret = kstrtoint(buf, 10, &num); + if (ret == 0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, "[ WRITE ] ATTR CONFIG [%s] VALUE:%d; %d\n", + ptr->dev_attr.attr.name, num, num_fantrays); +#endif + return (count); + } + return (count); +} + +ssize_t store_bits_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int len = 0, num1 = 0, num2 = 0, i=0, rc1=0, rc2=0; + char mask=0xFF; + char *pptr=NULL; + char bits[NAME_SIZE]; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + MASK_BITS* bits_ptr=(MASK_BITS*)(ptr->addr); + memcpy(bits_ptr->bits, buf, strlen(buf)-1); // to discard newline char form buf + bits_ptr->bits[strlen(buf)-1] = '\0'; + if((pptr=strstr(buf,":")) != NULL) { + len = pptr-buf; + sprintf(bits, buf); + bits[len] = '\0'; + rc1 = kstrtoint(bits, 16, &num1); + if (rc1 == 0) + { + sprintf(bits, ++pptr); + rc2 = kstrtoint(bits, 16, &num2); + if (rc2 == 0) + { + for (i=num2; i<=num1; i++) { + mask &= ~(1 << i); + } + bits_ptr->mask_bits = mask; + bits_ptr->pos = num2; + } + } + } else { + rc1 = kstrtoint(buf, 16, &num1); + if (rc1 == 0) + { + bits_ptr->mask_bits = mask & ~(1 << num1); + bits_ptr->pos = num1; + } + } +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR Bits [%s] VALUE:%s mask:0x%x; pos:0x%x\n", + ptr->dev_attr.attr.name, bits_ptr->bits, bits_ptr->mask_bits, bits_ptr->pos); +#endif + return (count); +} + +/************************************************************************** + * platform/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(platform, num_psus, S_IWUSR|S_IRUGO, show_pddf_data, + store_config_data, PDDF_INT_DEC, sizeof(int), (void*)&num_psus); +PDDF_LED_DATA_ATTR(platform, num_fantrays, S_IWUSR|S_IRUGO, show_pddf_data, + store_config_data, PDDF_INT_DEC, sizeof(int), (void*)&num_fantrays); + +struct attribute* attrs_platform[]={ + &pddf_dev_platform_attr_num_psus.dev_attr.attr, + &pddf_dev_platform_attr_num_fantrays.dev_attr.attr, + NULL, +}; +struct attribute_group attr_group_platform={ + .attrs = attrs_platform, +}; + +/************************************************************************** + * led/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(dev, device_name, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.device_name); +PDDF_LED_DATA_ATTR(dev, attr_devtype, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.attr_devtype); +PDDF_LED_DATA_ATTR(dev, attr_devname, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.attr_devname); +PDDF_LED_DATA_ATTR(dev, index, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_DEC, sizeof(int), (void*)&temp_data.index); +PDDF_LED_DATA_ATTR(dev, swpld_addr, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&temp_data.swpld_addr); +PDDF_LED_DATA_ATTR(dev, swpld_addr_offset, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&temp_data.swpld_addr_offset); +PDDF_LED_DATA_ATTR(dev, dev_ops , S_IWUSR, NULL, + dev_operation, PDDF_CHAR, NAME_SIZE, (void*)&temp_data); + +struct attribute* attrs_dev[] = { + &pddf_dev_dev_attr_device_name.dev_attr.attr, + &pddf_dev_dev_attr_attr_devtype.dev_attr.attr, + &pddf_dev_dev_attr_attr_devname.dev_attr.attr, + &pddf_dev_dev_attr_index.dev_attr.attr, + &pddf_dev_dev_attr_swpld_addr.dev_attr.attr, + &pddf_dev_dev_attr_swpld_addr_offset.dev_attr.attr, + &pddf_dev_dev_attr_dev_ops.dev_attr.attr, + NULL, +}; + +struct attribute_group attr_group_dev = { + .attrs = attrs_dev, +}; + +/************************************************************************** + * state_attr/ attributes + **************************************************************************/ +#define LED_DEV_STATE_ATTR_GROUP(name, func) \ + PDDF_LED_DATA_ATTR(name, bits, S_IWUSR|S_IRUGO, show_pddf_data, \ + store_bits_data, PDDF_CHAR, NAME_SIZE, func.bits.bits); \ + PDDF_LED_DATA_ATTR(name, value, S_IWUSR|S_IRUGO, show_pddf_data, \ + store_pddf_data, PDDF_CHAR, NAME_SIZE, func.value); \ + struct attribute* attrs_##name[]={ \ + &pddf_dev_##name##_attr_bits.dev_attr.attr, \ + &pddf_dev_##name##_attr_value.dev_attr.attr, \ + NULL, \ + }; \ + struct attribute_group attr_group_##name={ \ + .attrs = attrs_##name, \ + }; \ + + +LED_DEV_STATE_ATTR_GROUP(state_attr, (void*)&temp_data.data[0]) + +/************************************************************************** + * cur_state/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(cur_state, color, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.cur_state.color); +PDDF_LED_DATA_ATTR(cur_state, sys_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&sys_led_ops_data); +PDDF_LED_DATA_ATTR(cur_state, loc_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, NAME_SIZE, (void*)&loc_led_ops_data); +PDDF_LED_DATA_ATTR(cur_state, bmc_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&bmc_led_ops_data); +PDDF_LED_DATA_ATTR(cur_state, fan_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&fan_led_ops_data); +PDDF_LED_DATA_ATTR(cur_state, psu_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), NULL); +PDDF_LED_DATA_ATTR(cur_state, psu1_led, S_IRUGO, show_pddf_s3ip_data, + NULL, PDDF_INT_DEC, sizeof(int), (void *)&psu_led_ops_data[0]); +PDDF_LED_DATA_ATTR(cur_state, psu2_led, S_IRUGO, show_pddf_s3ip_data, + NULL, PDDF_INT_DEC, sizeof(int), (void *)&psu_led_ops_data[1]); +PDDF_LED_DATA_ATTR(cur_state, fantray1_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[0]); +PDDF_LED_DATA_ATTR(cur_state, fantray2_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[1]); +PDDF_LED_DATA_ATTR(cur_state, fantray3_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[2]); +PDDF_LED_DATA_ATTR(cur_state, fantray4_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[3]); +PDDF_LED_DATA_ATTR(cur_state, fantray5_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[4]); +PDDF_LED_DATA_ATTR(cur_state, fantray6_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[5]); +PDDF_LED_DATA_ATTR(cur_state, fantray7_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[6]); + + +struct attribute* attrs_cur_state[] = { + &pddf_dev_cur_state_attr_color.dev_attr.attr, + &pddf_dev_cur_state_attr_sys_led.dev_attr.attr, + &pddf_dev_cur_state_attr_loc_led.dev_attr.attr, + &pddf_dev_cur_state_attr_bmc_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fan_led.dev_attr.attr, + &pddf_dev_cur_state_attr_psu_led.dev_attr.attr, + &pddf_dev_cur_state_attr_psu1_led.dev_attr.attr, + &pddf_dev_cur_state_attr_psu2_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray1_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray2_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray3_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray4_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray5_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray6_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray7_led.dev_attr.attr, + NULL, +}; + +struct attribute_group attr_group_cur_state={ + .attrs = attrs_cur_state, +}; + +/*************************************************************************/ +#define KOBJ_FREE(obj) \ + if(obj) kobject_put(obj); \ + +void free_kobjs(void) +{ + KOBJ_FREE(cur_state_kobj) + KOBJ_FREE(state_attr_kobj) + KOBJ_FREE(led_kobj) + KOBJ_FREE(platform_kobj) +} + +int KBOJ_CREATE(char* name, struct kobject* parent, struct kobject** child) +{ + if (parent) { + *child = kobject_create_and_add(name, parent); + } else { + printk(KERN_ERR "PDDF_LED ERROR to create %s kobj; null parent\n", name); + free_kobjs(); + return (-ENOMEM); + } + return (0); +} + +int LED_DEV_ATTR_CREATE(struct kobject *kobj, const struct attribute_group *attr, const char* name) +{ + int status = sysfs_create_group(kobj, attr); + if(status) { + pddf_dbg(LED, KERN_ERR "Driver ERROR: sysfs_create %s failed rc=%d\n", name, status); + } + return (status); +} + + +static int __init led_init(void) { + struct kobject *device_kobj; + pddf_dbg(LED, KERN_INFO "PDDF GENERIC LED MODULE init..\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + KBOJ_CREATE("platform", device_kobj, &platform_kobj); + KBOJ_CREATE("led", device_kobj, &led_kobj); + KBOJ_CREATE("state_attr", led_kobj, &state_attr_kobj); + KBOJ_CREATE("cur_state", led_kobj, &cur_state_kobj); + + LED_DEV_ATTR_CREATE(platform_kobj, &attr_group_platform, "attr_group_platform"); + LED_DEV_ATTR_CREATE(led_kobj, &attr_group_dev, "attr_group_dev"); + LED_DEV_ATTR_CREATE(state_attr_kobj, &attr_group_state_attr, "attr_group_state_attr"); + LED_DEV_ATTR_CREATE(cur_state_kobj, &attr_group_cur_state, "attr_group_cur_state"); + return (0); +} + + +static void __exit led_exit(void) { + pddf_dbg(LED, "PDDF GENERIC LED MODULE exit..\n"); + free_kobjs(); +} + +module_init(led_init); +module_exit(led_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/mc24lc64t.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/mc24lc64t.c new file mode 100644 index 000000000000..638d59d653ec --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/mc24lc64t.c @@ -0,0 +1,172 @@ +/* + * mc24lc64t.c - driver for Microchip 24LC64T + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define EEPROM_SIZE 8192 //mc24lt64t eeprom size in bytes. + +struct mc24lc64t_data { + struct mutex update_lock; +}; + +static ssize_t mc24lc64t_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, read_time, i = 0; + int status; + + mutex_lock(&drvdata->update_lock); + + if (i2c_smbus_write_byte_data(client, off>>8, off)) + { + status = -EIO; + goto exit; + } + + msleep(1); + +begin: + + if (i < count) + { + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + do { + read_time = jiffies; + + status = i2c_smbus_read_byte(client); + if (status >= 0) + { + buf[i++] = status; + goto begin; + } + } while (time_before(read_time, timeout)); + + status = -ETIMEDOUT; + goto exit; + } + + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + + return status; +} + + +static ssize_t mc24lc64t_write (struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count){ + + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, write_time, i = 0; + int status; + u16 value; + + mutex_lock(&drvdata->update_lock); + +begin: + if (i < count){ + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + value = (buf[i] << 8 | ( off &0xff)); + do { + write_time = jiffies; + status = i2c_smbus_write_word_data(client, off>>8, value); + if (status >= 0) + { + // increase offset + off++; + // increase buffer index + i++; + goto begin; + } + } while (time_before(write_time, timeout)); + status = -ETIMEDOUT; + goto exit; + } + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + return status; +} + + +static struct bin_attribute mc24lc64t_bit_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUGO, + }, + .size = EEPROM_SIZE, + .read = mc24lc64t_read, + .write = mc24lc64t_write, +}; + +static int mc24lc64t_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adapter = client->adapter; + struct mc24lc64t_data *drvdata; + int err; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA + | I2C_FUNC_SMBUS_READ_BYTE)) + return -EPFNOSUPPORT; + + if (!(drvdata = devm_kzalloc(&client->dev, + sizeof(struct mc24lc64t_data), GFP_KERNEL))) + return -ENOMEM; + + i2c_set_clientdata(client, drvdata); + mutex_init(&drvdata->update_lock); + + err = sysfs_create_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); + return err; +} + +static void mc24lc64t_remove(struct i2c_client *client) +{ + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + sysfs_remove_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); +} + +static const struct i2c_device_id mc24lc64t_id[] = { + { "24lc64t", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mc24lc64t_id); + +static struct i2c_driver mc24lc64t_driver = { + .driver = { + .name = "mc24lc64t", + .owner = THIS_MODULE, + }, + .probe = mc24lc64t_probe, + .remove = mc24lc64t_remove, + .id_table = mc24lc64t_id, +}; + +module_i2c_driver(mc24lc64t_driver); + +MODULE_AUTHOR("Abhisit Sangjan "); +MODULE_DESCRIPTION("Microchip 24LC64T Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_algo.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_algo.c new file mode 100644 index 000000000000..45fdcb4c9665 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_algo.c @@ -0,0 +1,626 @@ +/* + * pddf_custom_fpga_algo.c - driver algorithm for FPGAPCIE AXI IIC. + * + * Copyright (C) 2023 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h" + +#define DEBUG_KERN 0 + +enum { + STATE_DONE = 0, + STATE_INIT, + STATE_ADDR, + STATE_ADDR10, + STATE_START, + STATE_WRITE, + STATE_READ, + STATE_STOP, + STATE_ERROR, +}; + +#define XIIC_MSB_OFFSET 0 +#define XIIC_REG_OFFSET (0x100 + XIIC_MSB_OFFSET) + +/* + * Register offsets in bytes from RegisterBase. Three is added to the + * base offset to access LSB (IBM style) of the word + */ +#define XIIC_CR_REG_OFFSET (0x00 + XIIC_REG_OFFSET) /* Control Register */ +#define XIIC_SR_REG_OFFSET (0x04 + XIIC_REG_OFFSET) /* Status Register */ +#define XIIC_DTR_REG_OFFSET (0x08 + XIIC_REG_OFFSET) /* Data Tx Register */ +#define XIIC_DRR_REG_OFFSET (0x0C + XIIC_REG_OFFSET) /* Data Rx Register */ +#define XIIC_ADR_REG_OFFSET (0x10 + XIIC_REG_OFFSET) /* Address Register */ +#define XIIC_TFO_REG_OFFSET (0x14 + XIIC_REG_OFFSET) /* Tx FIFO Occupancy */ +#define XIIC_RFO_REG_OFFSET (0x18 + XIIC_REG_OFFSET) /* Rx FIFO Occupancy */ +#define XIIC_TBA_REG_OFFSET (0x1C + XIIC_REG_OFFSET) /* 10 Bit Address reg */ +#define XIIC_RFD_REG_OFFSET (0x20 + XIIC_REG_OFFSET) /* Rx FIFO Depth reg */ +#define XIIC_GPO_REG_OFFSET (0x24 + XIIC_REG_OFFSET) /* Output Register */ + +/* Control Register masks */ +#define XIIC_CR_ENABLE_DEVICE_MASK 0x01 /* Device enable = 1 */ +#define XIIC_CR_TX_FIFO_RESET_MASK 0x02 /* Transmit FIFO reset=1 */ +#define XIIC_CR_MSMS_MASK 0x04 /* Master starts Txing=1 */ +#define XIIC_CR_DIR_IS_TX_MASK 0x08 /* Dir of tx. Txing=1 */ +#define XIIC_CR_NO_ACK_MASK 0x10 /* Tx Ack. NO ack = 1 */ +#define XIIC_CR_REPEATED_START_MASK 0x20 /* Repeated start = 1 */ +#define XIIC_CR_GENERAL_CALL_MASK 0x40 /* Gen Call enabled = 1 */ + +/* Status Register masks */ +#define XIIC_SR_GEN_CALL_MASK 0x01 /* 1=a mstr issued a GC */ +#define XIIC_SR_ADDR_AS_SLAVE_MASK 0x02 /* 1=when addr as slave */ +#define XIIC_SR_BUS_BUSY_MASK 0x04 /* 1 = bus is busy */ +#define XIIC_SR_MSTR_RDING_SLAVE_MASK 0x08 /* 1=Dir: mstr <-- slave */ +#define XIIC_SR_TX_FIFO_FULL_MASK 0x10 /* 1 = Tx FIFO full */ +#define XIIC_SR_RX_FIFO_FULL_MASK 0x20 /* 1 = Rx FIFO full */ +#define XIIC_SR_RX_FIFO_EMPTY_MASK 0x40 /* 1 = Rx FIFO empty */ +#define XIIC_SR_TX_FIFO_EMPTY_MASK 0x80 /* 1 = Tx FIFO empty */ + +/* Interrupt Status Register masks Interrupt occurs when... */ +#define XIIC_INTR_ARB_LOST_MASK 0x01 /* 1 = arbitration lost */ +#define XIIC_INTR_TX_ERROR_MASK 0x02 /* 1=Tx error/msg complete */ +#define XIIC_INTR_TX_EMPTY_MASK 0x04 /* 1 = Tx FIFO/reg empty */ +#define XIIC_INTR_RX_FULL_MASK 0x08 /* 1=Rx FIFO/reg=OCY level */ +#define XIIC_INTR_BNB_MASK 0x10 /* 1 = Bus not busy */ +#define XIIC_INTR_AAS_MASK 0x20 /* 1 = when addr as slave */ +#define XIIC_INTR_NAAS_MASK 0x40 /* 1 = not addr as slave */ +#define XIIC_INTR_TX_HALF_MASK 0x80 /* 1 = TX FIFO half empty */ + +/* The following constants specify the depth of the FIFOs */ +#define IIC_RX_FIFO_DEPTH 16 /* Rx fifo capacity */ +#define IIC_TX_FIFO_DEPTH 16 /* Tx fifo capacity */ + +/* + * Tx Fifo upper bit masks. + */ +#define XIIC_TX_DYN_START_MASK 0x0100 /* 1 = Set dynamic start */ +#define XIIC_TX_DYN_STOP_MASK 0x0200 /* 1 = Set dynamic stop */ + +/* + * The following constants define the register offsets for the Interrupt + * registers. There are some holes in the memory map for reserved addresses + * to allow other registers to be added and still match the memory map of the + * interrupt controller registers + */ +#define XIIC_IISR_OFFSET 0x20 /* Interrupt Status Register */ +#define XIIC_RESETR_OFFSET 0x40 /* Reset Register */ + +#define XIIC_RESET_MASK 0xAUL + +#define XIIC_PM_TIMEOUT 1000 /* ms */ +/* timeout waiting for the controller to respond */ +#define XIIC_I2C_TIMEOUT (msecs_to_jiffies(1000)) + +struct fpgalogic_i2c { + void __iomem *base; + u32 reg_shift; + u32 reg_io_width; + wait_queue_head_t wait; + struct i2c_msg *msg; + int pos; + int nmsgs; + int state; /* see STATE_ */ + int ip_clock_khz; + int bus_clock_khz; + void (*reg_set)(struct fpgalogic_i2c *i2c, int reg, u8 value); + u8 (*reg_get)(struct fpgalogic_i2c *i2c, int reg); + u32 timeout; + struct mutex lock; +}; + +static struct fpgalogic_i2c fpgalogic_i2c[I2C_PCI_MAX_BUS]; +extern void __iomem * fpga_ctl_addr; +extern int (*ptr_fpgapci_read)(uint32_t); +extern int (*ptr_fpgapci_write)(uint32_t, uint32_t); +extern int (*pddf_i2c_pci_add_numbered_bus)(struct i2c_adapter *, int); +static int xiic_reinit(struct fpgalogic_i2c *i2c); + + +void i2c_get_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_lock(&i2c->lock); +} + +/** + * i2c_release_mutex - release mutex + */ +void i2c_release_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_unlock(&i2c->lock); +} + +static inline void xiic_setreg32(struct fpgalogic_i2c *i2c, int reg, int value) +{ + (void)iowrite32(value, i2c->base + reg); +} + +static inline int xiic_getreg32(struct fpgalogic_i2c *i2c, int reg) +{ + u32 ret; + + ret = ioread32(i2c->base + reg); + + return ret; +} + +static inline void xiic_irq_clr(struct fpgalogic_i2c *i2c, u32 mask) +{ + u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + + xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask); +} + +static int xiic_clear_rx_fifo(struct fpgalogic_i2c *i2c) +{ + u8 sr; + unsigned long timeout; + + timeout = jiffies + XIIC_I2C_TIMEOUT; + for (sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET); + !(sr & XIIC_SR_RX_FIFO_EMPTY_MASK); + sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET)) { + xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + if (time_after(jiffies, timeout)) { + printk("Failed to clear rx fifo\n"); + return -ETIMEDOUT; + } + } + + return 0; +} + +/** + * Wait until something change in a given register + * @i2c: AXI IIC device instance + * @reg: register to query + * @mask: bitmask to apply on register value + * @val: expected result + * @timeout: timeout in jiffies + * + * Timeout is necessary to avoid to stay here forever when the chip + * does not answer correctly. + * + * Return: 0 on success, -ETIMEDOUT on timeout + */ +static int poll_wait(struct fpgalogic_i2c *i2c, + int reg, u8 mask, u8 val, + const unsigned long timeout) +{ + unsigned long j; + u8 status = 0; + + j = jiffies + timeout; + while (1) { + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, reg); + mutex_unlock(&i2c->lock); + if ((status & mask) == val) + break; + if (time_after(jiffies, j)) + return -ETIMEDOUT; + cpu_relax(); + cond_resched(); + } + return 0; +} + +/** + * Wait until is possible to process some data + * @i2c: AXI IIC device instance + * + * Used when the device is in polling mode (interrupts disabled). + * + * Return: 0 on success, -ETIMEDOUT on timeout + */ +static int xiic_poll_wait(struct fpgalogic_i2c *i2c) +{ + u8 mask = 0, status = 0; + int err = 0; + int val = 0; + int tmp = 0; + mutex_lock(&i2c->lock); + if (i2c->state == STATE_DONE) { + /* transfer is over */ + mask = XIIC_SR_BUS_BUSY_MASK; + } else if (i2c->state == STATE_WRITE || i2c->state == STATE_START){ + /* on going transfer */ + if (0 == i2c->msg->len){ + mask = XIIC_INTR_TX_ERROR_MASK; + } else { + mask = XIIC_SR_TX_FIFO_FULL_MASK; + } + } + else if (i2c->state == STATE_READ){ + /* on going receive */ + mask = XIIC_SR_TX_FIFO_EMPTY_MASK | XIIC_SR_RX_FIFO_EMPTY_MASK; + } + mutex_unlock(&i2c->lock); + // printk("Wait for: 0x%x\n", mask); + + /* + * once we are here we expect to get the expected result immediately + * so if after 50ms we timeout then something is broken. + */ + + if (1 == i2c->nmsgs && 0 == i2c->msg->len && i2c->state == STATE_START && !(i2c->msg->flags & I2C_M_RD)) { /* for i2cdetect I2C_SMBUS_QUICK mode*/ + err = poll_wait(i2c, XIIC_IISR_OFFSET, mask, mask, msecs_to_jiffies(50)); + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET); + mutex_unlock(&i2c->lock); + if (0 != err) { /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, means no such i2c device */ + err = 0; + } else { + err = -ETIMEDOUT; + } + } else { + if (mask & XIIC_SR_TX_FIFO_EMPTY_MASK){ + err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, XIIC_SR_TX_FIFO_EMPTY_MASK, msecs_to_jiffies(50)); + mask &= ~XIIC_SR_TX_FIFO_EMPTY_MASK; + } + if (0 == err){ + err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, 0, msecs_to_jiffies(50)); + } + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + + if ((status & XIIC_INTR_ARB_LOST_MASK) || + ((status & XIIC_INTR_TX_ERROR_MASK) && + !(status & XIIC_INTR_RX_FULL_MASK) && + !(i2c->msg->flags & I2C_M_RD))) { /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, return */ + err = -ETIMEDOUT; + + if (status & XIIC_INTR_ARB_LOST_MASK) { + val = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET); + tmp = XIIC_CR_MSMS_MASK; + val &=(~tmp); + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val); + xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_ARB_LOST_MASK); + printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens\n", + __func__, XIIC_INTR_ARB_LOST_MASK); + } + if (status & XIIC_INTR_TX_ERROR_MASK) { + int sta = 0; + int cr = 0; + sta = xiic_getreg32(i2c,XIIC_SR_REG_OFFSET); + cr = xiic_getreg32(i2c,XIIC_CR_REG_OFFSET); + xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_TX_ERROR_MASK); + printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens; SR: bit 0x%x; CR: bit 0x%x\n", + __func__, status, sta, cr); + } + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + (void)xiic_reinit(i2c); + mutex_unlock(&i2c->lock); + return err; + } + mutex_unlock(&i2c->lock); + } + + if (err) + printk("%s: STATUS timeout, bit 0x%x did not clear in 50ms\n", + __func__, status); + return err; +} + +static void xiic_process(struct fpgalogic_i2c *i2c) +{ + struct i2c_msg *msg = i2c->msg; + //unsigned long flags; + u16 val; + + /* + * If we spin here because we are in timeout, so we are going + * to be in STATE_ERROR. + */ + mutex_lock(&i2c->lock); + // printk("STATE: %d\n", i2c->state); + + if (i2c->state == STATE_START) { + i2c->state =(msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; + /* if it's the time sequence is 'start bit + address + read bit + stop bit' */ + if (i2c->state == STATE_READ){ + /* it's the last message so we include dynamic stop bit with length */ + val = msg->len | XIIC_TX_DYN_STOP_MASK; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val); + goto out; + } + } + if (i2c->state == STATE_READ){ + /* suit for I2C_FUNC_SMBUS_BLOCK_DATA */ + if (msg->flags & I2C_M_RECV_LEN) { + msg->len = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + msg->flags &= ~I2C_M_RECV_LEN; + msg->buf[i2c->pos++] = msg->len; + } + else { + msg->buf[i2c->pos++] = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + } + } else if (i2c->state == STATE_WRITE){ + /* if it reaches the last byte data to be sent */ + if ((i2c->pos == msg->len - 1) && (i2c->nmsgs == 1)){ + val = msg->buf[i2c->pos++] | XIIC_TX_DYN_STOP_MASK; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val); + i2c->state = STATE_DONE; + goto out; + /* if it is not the last byte data to be sent */ + } else if (i2c->pos < msg->len) { + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, msg->buf[i2c->pos++]); + goto out; + } + } + + /* end of msg? */ + if (i2c->pos == msg->len) { + i2c->nmsgs--; + i2c->pos = 0; + if (i2c->nmsgs) { + i2c->msg++; + msg = i2c->msg; + if (!(msg->flags & I2C_M_NOSTART)) /* send start? */{ + i2c->state = STATE_START; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msg) | XIIC_TX_DYN_START_MASK); + goto out; + } + } else { /* end? */ + i2c->state = STATE_DONE; + goto out; + } + } + +out: + mutex_unlock(&i2c->lock); + return ; +} + +static int fpga_axi_iic_poll(struct fpgalogic_i2c *i2c, + struct i2c_msg *msgs, int num) +{ + int ret = 0; + // u8 ctrl; + + mutex_lock(&i2c->lock); + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + /* Set receive Fifo depth to maximum (zero based). */ + xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1); + + /* Reset Tx Fifo. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); + + /* Enable IIC Device, remove Tx Fifo reset & disable general call. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_ENABLE_DEVICE_MASK); + + /* set i2c clock as 100Hz. */ + //xiic_setreg32(i2c, 0x13c, 0x7C); + + /* make sure RX fifo is empty */ + ret = xiic_clear_rx_fifo(i2c); + if (ret){ + mutex_unlock(&i2c->lock); + return ret; + } + + i2c->msg = msgs; + i2c->pos = 0; + i2c->nmsgs = num; + i2c->state = STATE_START; + + // printk("STATE: %d\n", i2c->state); + + if (msgs->len == 0 && num == 1){ /* suit for i2cdetect time sequence */ + u8 status = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + xiic_irq_clr(i2c, status); + /* send out the 1st byte data and stop bit */ + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK | XIIC_TX_DYN_STOP_MASK); + } else { + /* send out the 1st byte data */ + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK); + } + mutex_unlock(&i2c->lock); + while (1) { + int err; + + err = xiic_poll_wait(i2c); + if (err) { + i2c->state = STATE_ERROR; + break; + }else if (i2c->state == STATE_DONE){ + break; + } + xiic_process(i2c); + } + + return (i2c->state == STATE_DONE) ? num : -EIO; +} + +static int fpga_axi_iic_access(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) +{ + struct fpgalogic_i2c *i2c = i2c_get_adapdata(adap); + int err = -EIO; + u8 retry = 0, max_retry = 0; + + if(((1 == msgs->len && (msgs->flags & I2C_M_RD)) + || (0 == msgs->len && !(msgs->flags & I2C_M_RD)) ) && num == 1 ) /* I2C_SMBUS_QUICK or I2C_SMBUS_BYTE */ + max_retry = 1; + else + max_retry = 5; // retry 5 times if receive a NACK or other errors + + while((-EIO == err) && (retry < max_retry)) + { + err = fpga_axi_iic_poll(i2c, msgs, num); + retry++; + } + + return err; +} + +/** + * A callback function show available smbus functions. + */ +static u32 fpga_axi_iic_func(struct i2c_adapter *adap) +{ + /* a typical full-I2C adapter would use the following */ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static const struct i2c_algorithm axi_iic_algorithm = { + .master_xfer = fpga_axi_iic_access, + .functionality = fpga_axi_iic_func, +}; + +static int xiic_reinit(struct fpgalogic_i2c *i2c) +{ + int ret; + int val = 0; + + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + + /* Set receive Fifo depth to maximum (zero based). */ + xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1); + + /* Reset Tx Fifo. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); + + /* Enable IIC Device, remove Tx Fifo reset & disable general call. */ + val |= XIIC_CR_ENABLE_DEVICE_MASK; + //val |= XIIC_CR_TX_FIFO_RESET_MASK; + //val |= XIIC_CR_MSMS_MASK; + val |= XIIC_CR_DIR_IS_TX_MASK; + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val); + + /* make sure RX fifo is empty */ + ret = xiic_clear_rx_fifo(i2c); + if (ret) + return ret; + + return 0; +} + +static int fpgai2c_init(struct fpgalogic_i2c *i2c) +{ + // int prescale; + // int diff; + // u8 ctrl; + int ret; + + + //i2c->reg_set = xiic_setreg32; + //i2c->reg_get = xiic_getreg32; + + ret = xiic_reinit(i2c); + if (ret < 0) { + printk("Cannot xiic_reinit\n"); + return ret; + } + + /* Initialize interrupt handlers if not already done */ + init_waitqueue_head(&i2c->wait); + return 0; +}; + +static int adap_data_init(struct i2c_adapter *adap, int i2c_ch_index) +{ + struct fpgapci_devdata *pci_privdata = 0; + pci_privdata = (struct fpgapci_devdata*) dev_get_drvdata(adap->dev.parent); + + if (pci_privdata == 0) { + printk("[%s]: ERROR pci_privdata is 0\n", __FUNCTION__); + return -1; + } +#ifdef DEBUG_KERN + pddf_dbg(FPGA, KERN_INFO "[%s] index: [%d] fpga_data__base_addr:0x%0x8lx" + " fpgapci_bar_len:0x%08lx fpga_i2c_ch_base_addr:0x%08lx ch_size=0x%x supported_i2c_ch=%d", + __FUNCTION__, i2c_ch_index, pci_privdata->fpga_data_base_addr, + pci_privdata->bar_length, pci_privdata->fpga_i2c_ch_base_addr, + pci_privdata->fpga_i2c_ch_size, pci_privdata->max_fpga_i2c_ch); +#endif + if (i2c_ch_index >= pci_privdata->max_fpga_i2c_ch + || pci_privdata->max_fpga_i2c_ch > I2C_PCI_MAX_BUS){ + printk("[%s]: ERROR i2c_ch_index=%d max_ch_index=%d out of range: %d\n", + __FUNCTION__, i2c_ch_index, pci_privdata->max_fpga_i2c_ch, I2C_PCI_MAX_BUS); + return -1; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(&fpgalogic_i2c[i2c_ch_index], sizeof(fpgalogic_i2c[0]), 0, sizeof(fpgalogic_i2c[0])); +#else + memset(&fpgalogic_i2c[i2c_ch_index], 0, sizeof(fpgalogic_i2c[0])); +#endif + fpgalogic_i2c[i2c_ch_index].base = pci_privdata->fpga_i2c_ch_base_addr + + i2c_ch_index* pci_privdata->fpga_i2c_ch_size; + mutex_init(&fpgalogic_i2c[i2c_ch_index].lock); + fpgai2c_init(&fpgalogic_i2c[i2c_ch_index]); + + adap->algo_data = &fpgalogic_i2c[i2c_ch_index]; + i2c_set_adapdata(adap, &fpgalogic_i2c[i2c_ch_index]); + return 0; +} + +static int pddf_i2c_pci_add_numbered_bus_default (struct i2c_adapter *adap, int i2c_ch_index) +{ + int ret = 0; + + adap_data_init(adap, i2c_ch_index); + adap->algo = &axi_iic_algorithm; + ret = i2c_add_numbered_adapter(adap); + return ret; +} + +/* + * FPGAPCI APIs + */ +static int board_i2c_fpgapci_read(uint32_t offset) +{ + int data; + data=ioread32(fpga_ctl_addr+offset); + return data; +} + + +static int board_i2c_fpgapci_write(uint32_t offset, uint32_t value) +{ + iowrite32(value, fpga_ctl_addr+offset); + return (0); +} + + +static int __init pddf_custom_fpga_algo_init(void) +{ + pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__); + pddf_i2c_pci_add_numbered_bus = &pddf_i2c_pci_add_numbered_bus_default; + ptr_fpgapci_read = board_i2c_fpgapci_read; + ptr_fpgapci_write = board_i2c_fpgapci_write; + return 0; +} +static void __exit pddf_custom_fpga_algo_exit(void) +{ + pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__); + pddf_i2c_pci_add_numbered_bus = NULL; + ptr_fpgapci_read = NULL; + ptr_fpgapci_write = NULL; + return; +} + +module_init(pddf_custom_fpga_algo_init); +module_exit(pddf_custom_fpga_algo_exit); + +MODULE_DESCRIPTION("Module driver algorithm for 7021 FPGAPCIe AXI IIC"); +MODULE_VERSION("1.0.0"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_extend.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_extend.c new file mode 100644 index 000000000000..4ea09f09404f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_extend.c @@ -0,0 +1,372 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * fpga-cls.c - front panel port control. + * + * Copyright (C) 2019 Celestica Corp. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h" + +#define FPGA_VERSION_ADDR 0x0000 +#define FPGA_SCRATCH_ADDR 0x0004 +#define FPGA_BCM_TEMP_ADDR 0x001c +#define FPGA_BCM_TEMP_LOW_ADDR 0x0078 +#define FPGA_BCM_TEMP_HIGH_ADDR 0x0080 +#define FPGA_REG_SPACE_SIZE 0x2000 + + +/* + * fpga_priv - port fpga private data + * @dev: device for reference + * @base: virtual base address + * @num_ports: number of front panel ports + * @fp_devs: list of front panel port devices + */ +struct fpga_priv { + void __iomem *base; + struct mutex fpga_lock; // For FPGA internal lock + void __iomem * fpga_read_addr; +}; + +extern void __iomem * fpga_ctl_addr; + +/** + * Show the value of the register set by 'set_fpga_reg_address' + * If the address is not set by 'set_fpga_reg_address' first, + * The version register is selected by default. + * @param buf register value in hextring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + // read data from the address + uint32_t data; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + data = ioread32(fpga->fpga_read_addr); + return sprintf(buf, "0x%8.8x\n", data); +} +/** + * Store the register address + * @param buf address wanted to be read value of + * @return number of bytes stored, or an error code + */ +static ssize_t set_fpga_reg_address(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t addr; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + addr = (uint32_t)strtoul(buf, &last, 16); + if (addr == 0 && buf == last) { + return -EINVAL; + } + fpga->fpga_read_addr = fpga->base + addr; + return count; +} +/** + * Show value of fpga scratch register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_scratch(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + + return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + FPGA_SCRATCH_ADDR) & 0xffffffff); +} +/** + * Store value of fpga scratch register + * @param buf scratch register value passing from user space + * @return number of bytes stored, or an error code + */ +static ssize_t set_fpga_scratch(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t data; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + data = (uint32_t)strtoul(buf, &last, 16); + if (data == 0 && buf == last) { + return -EINVAL; + } + iowrite32(data, fpga->base + FPGA_SCRATCH_ADDR); + return count; +} + +/** + * Show value of fpga version register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_version(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + + return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + FPGA_VERSION_ADDR) & 0xffffffff); +} + + +/** + * Store a value in a specific register address + * @param buf the value and address in format '0xhhhh 0xhhhhhhhh' + * @return number of bytes sent by user space, or an error code + */ +static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // register are 4 bytes + uint32_t addr; + uint32_t value; + uint32_t mode = 8; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + strscpy(clone, buf, count); + mutex_lock(&fpga->fpga_lock); + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + addr = (uint32_t)strtoul(tok, &last, 16); + if (addr == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + value = (uint32_t)strtoul(tok, &last, 16); + if (value == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mode = 32; + } else { + mode = (uint32_t)strtoul(tok, &last, 10); + if (mode == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + } + if (mode == 32) { + iowrite32(value, fpga->base + addr); + } else if (mode == 8) { + iowrite8(value, fpga->base + addr); + } else { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + mutex_unlock(&fpga->fpga_lock); + return count; +} + +/** + * Read all FPGA register in binary mode. + * @param buf Raw transceivers port startus and control register values + * @return number of bytes read, or an error code + */ +static ssize_t dump_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + unsigned long i = 0; + ssize_t status; + u8 read_reg; + struct device *dev = kobj_to_dev(kobj); + struct fpga_priv *fpga = dev_get_drvdata(dev); + + if ( off + count > FPGA_REG_SPACE_SIZE ) { + return -EINVAL; + } + mutex_lock(&fpga->fpga_lock); + while (i < count) { + read_reg = ioread8(fpga->base + off + i); + buf[i++] = read_reg; + } + status = count; + mutex_unlock(&fpga->fpga_lock); + return status; +} + +/** + * Show value of fpga bcm switch internal temp sensor register calculated by FPGA + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_bcm_temp_fpga(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + uint32_t reg_val = ioread32(fpga->base + FPGA_BCM_TEMP_ADDR) & 0x3ffff; + + return sprintf(buf, "0x%08x\n", reg_val); +} + +/** + * Show value of fpga bcm switch internal temp sensor register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_bcm_temp(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + u8 low_byte = ioread32(fpga->base + FPGA_BCM_TEMP_LOW_ADDR) & 0xff; + u8 high_byte = ioread32(fpga->base + FPGA_BCM_TEMP_HIGH_ADDR) & 0xff; + + return sprintf(buf, "0x%02x%02x\n", high_byte, low_byte); +} + +/* FPGA attributes */ +static DEVICE_ATTR( getreg, 0600, get_fpga_reg_value, set_fpga_reg_address); +static DEVICE_ATTR( setreg, 0200, NULL , set_fpga_reg_value); +static DEVICE_ATTR( scratch, 0600, get_fpga_scratch, set_fpga_scratch); +static DEVICE_ATTR( version, 0400, get_fpga_version, NULL); +static DEVICE_ATTR( bcm_temp_fpga, 0400, get_fpga_bcm_temp_fpga, NULL); +static DEVICE_ATTR( bcm_temp, 0400, get_fpga_bcm_temp, NULL); +static BIN_ATTR_RO( dump, FPGA_REG_SPACE_SIZE); + +static struct bin_attribute *fpga_bin_attrs[] = { + &bin_attr_dump, + NULL, +}; + +static struct attribute *fpga_attrs[] = { + &dev_attr_getreg.attr, + &dev_attr_scratch.attr, + &dev_attr_version.attr, + &dev_attr_bcm_temp_fpga.attr, + &dev_attr_bcm_temp.attr, + &dev_attr_setreg.attr, + NULL, +}; + +static struct attribute_group fpga_attr_grp = { + .attrs = fpga_attrs, + .bin_attrs = fpga_bin_attrs, +}; + + +static int cls_fpga_probe(struct platform_device *pdev) +{ + struct fpga_priv *fpga; + int ret = -ENOMEM; + + if (!fpga_ctl_addr){ + printk(KERN_WARNING, "fpga_ctl_addr is null"); + return ret; + } + + fpga = devm_kzalloc(&pdev->dev, sizeof(struct fpga_priv), GFP_KERNEL); + if (!fpga){ + ret = -ENOMEM; + goto err_exit; + } + + mutex_init(&fpga->fpga_lock); + dev_set_drvdata(&pdev->dev, fpga); + fpga->base = fpga_ctl_addr; + + printk("FPGA version: 0x%x\n", ioread32(fpga->base + FPGA_VERSION_ADDR)); + + ret = sysfs_create_group(&pdev->dev.kobj, &fpga_attr_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create FPGA system sysfs attributes\n"); + goto err_remove_fpga; + } + + return 0; + +err_remove_fpga: + sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp); +mem_unmap: + iounmap(fpga->base); +err_exit: + return ret; +} + +static int cls_fpga_remove(struct platform_device *pdev) +{ + struct fpga_priv *fpga = dev_get_drvdata(&pdev->dev); + + sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp); + iounmap(fpga->base); + return 0; +} + +static void fpga_dev_release( struct device * dev) +{ + return; +} +static struct resource cls_fpga_resources[] = { + { + .start = NULL, + .end = NULL, + .flags = IORESOURCE_IO, + }, +}; + +static struct platform_device cls_fpga_dev = { + .name = "fpga_sysfs", + .id = -1, + .num_resources = ARRAY_SIZE(cls_fpga_resources), + .resource = cls_fpga_resources, + .dev = { + .release = fpga_dev_release, + } +}; + +static struct platform_driver cls_fpga_driver = { + .probe = cls_fpga_probe, + .remove = cls_fpga_remove, + .driver = { + .name = "fpga_sysfs", + }, +}; + +static int __init drv_init(void) +{ + int rc = 0; + + rc = platform_device_register(&cls_fpga_dev); + rc += platform_driver_register(&cls_fpga_driver); + printk("fpga drv_init:%d\n", rc); + return rc; +} + +static void __exit drv_exit(void) +{ + platform_driver_unregister(&cls_fpga_driver); + platform_device_unregister(&cls_fpga_dev); + printk("fpga drv_exit.\n"); +} + +module_init(drv_init); +module_exit(drv_exit); + +MODULE_AUTHOR("Nicholas Wu"); +MODULE_DESCRIPTION("Celestica fpga access/control driver"); +MODULE_VERSION("2.0.0"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:cls-fpga"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.c new file mode 100644 index 000000000000..338417125569 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.c @@ -0,0 +1,478 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description of various APIs related to PSU component + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h" +#include "pddf_psu_driver.h" + + +#define PSU_REG_VOUT_MODE 0x20 +#define PSU_REG_READ_VOUT 0x8b + +/*#define PSU_DEBUG*/ +#ifdef PSU_DEBUG +#define psu_dbg(...) printk(__VA_ARGS__) +#else +#define psu_dbg(...) +#endif + + +void get_psu_duplicate_sysfs(int idx, char *str) +{ + switch (idx) + { + case PSU_V_OUT: + strscpy(str, "in3_input", ATTR_NAME_LEN); + break; + case PSU_I_OUT: + strscpy(str, "curr2_input", ATTR_NAME_LEN); + break; + case PSU_P_OUT: + strscpy(str, "power2_input", ATTR_NAME_LEN); + break; + case PSU_FAN1_SPEED: + strscpy(str, "fan1_input", ATTR_NAME_LEN); + break; + case PSU_TEMP1_INPUT: + strscpy(str, "temp1_input", ATTR_NAME_LEN); + break; + default: + break; + } + + return; +} + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static u8 psu_get_vout_mode(struct i2c_client *client) +{ + u8 status = 0, retry = 10; + uint8_t offset = PSU_REG_VOUT_MODE; + + while (retry) + { + status = i2c_smbus_read_byte_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) + { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + printk(KERN_ERR "%s: Get PSU Vout mode failed\n", __func__); + return 0; + } + else + { + /*printk(KERN_ERR "%s: vout_mode reg value 0x%x\n", __func__, status);*/ + return status; + } +} + +static u16 psu_get_v_out(struct i2c_client *client) +{ + u16 status = 0, retry = 10; + uint8_t offset = PSU_REG_READ_VOUT; + + while (retry) { + status = i2c_smbus_read_word_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + printk(KERN_ERR "%s: Get PSU Vout failed\n", __func__); + return 0; + } + else + { + /*printk(KERN_ERR "%s: vout reg value 0x%x\n", __func__, status);*/ + return status; + } +} + +int psu_update_hw(struct device *dev, struct psu_attr_info *info, PSU_DATA_ATTR *udata) +{ + int status = 0; + struct i2c_client *client = to_i2c_client(dev); + PSU_SYSFS_ATTR_DATA *sysfs_attr_data = NULL; + + + mutex_lock(&info->update_lock); + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_set != NULL) + { + status = (sysfs_attr_data->pre_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: pre_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + if (sysfs_attr_data->do_set != NULL) + { + status = (sysfs_attr_data->do_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: do_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + + } + if (sysfs_attr_data->post_set != NULL) + { + status = (sysfs_attr_data->post_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: post_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + + mutex_unlock(&info->update_lock); + + return 0; +} + + +int psu_update_attr(struct device *dev, struct psu_attr_info *data, PSU_DATA_ATTR *udata) +{ + int status = 0; + struct i2c_client *client = to_i2c_client(dev); + PSU_SYSFS_ATTR_DATA *sysfs_attr_data=NULL; + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || !data->valid) + { + dev_dbg(&client->dev, "Starting update for %s\n", data->name); + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_get != NULL) + { + status = (sysfs_attr_data->pre_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: pre_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + if (sysfs_attr_data->do_get != NULL) + { + status = (sysfs_attr_data->do_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: do_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + + } + if (sysfs_attr_data->post_get != NULL) + { + status = (sysfs_attr_data->post_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: post_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + return 0; +} + +ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data); + PSU_DATA_ATTR *usr_data = NULL; + struct psu_attr_info *sysfs_attr_info = NULL; + int i, status=0; + u16 value = 0; + u8 vout_mode = 0; + int exponent, mantissa; + int multiplier = 1000; + char new_str[ATTR_NAME_LEN] = ""; + PSU_SYSFS_ATTR_DATA *ptr = NULL; + + for (i=0;inum_attr;i++) + { + ptr = (PSU_SYSFS_ATTR_DATA *)pdata->psu_attrs[i].access_data; + get_psu_duplicate_sysfs(ptr->index , new_str); + if ( strcmp(attr->dev_attr.attr.name, pdata->psu_attrs[i].aname) == 0 || strcmp(attr->dev_attr.attr.name, new_str) == 0 ) + { + sysfs_attr_info = &data->attr_info[i]; + usr_data = &pdata->psu_attrs[i]; + strscpy(new_str, "", ATTR_NAME_LEN); + } + } + + if (sysfs_attr_info==NULL || usr_data==NULL) + { + printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name); + goto exit; + } + + psu_update_attr(dev, sysfs_attr_info, usr_data); + + switch(attr->index) + { + case PSU_PRESENT: + case PSU_POWER_GOOD: + status = sysfs_attr_info->val.intval; + return sprintf(buf, "%d\n", status); + break; + case PSU_MODEL_NAME: + case PSU_MFR_ID: + case PSU_SERIAL_NUM: + case PSU_FAN_DIR: + return sprintf(buf, "%s\n", sysfs_attr_info->val.strval); + break; + case PSU_V_OUT: + value = psu_get_v_out(client); + vout_mode = psu_get_vout_mode(client); + if ((vout_mode >> 5) == 0) + exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f); + else + exponent = 0; + + mantissa = value; + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + + case PSU_V_OUT_MIN: + case PSU_V_OUT_MAX: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + vout_mode = psu_get_vout_mode(client); + if ((vout_mode >> 5) == 0) + exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f); + else + exponent = 0; + mantissa = two_complement_to_int(value & 0xffff, 16, 0xffff); + + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + case PSU_I_OUT: + case PSU_V_IN: + case PSU_I_IN: + case PSU_P_OUT_MAX: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + case PSU_P_IN: + case PSU_P_OUT: + multiplier = 1000000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + + break; + case PSU_FAN1_SPEED: + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent)); + else + return sprintf(buf, "%d\n", (mantissa) / (1 << -exponent)); + + break; + case PSU_TEMP1_INPUT: + case PSU_TEMP1_HIGH_THRESHOLD: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + + break; + default: + printk(KERN_ERR "%s: Unable to find attribute index for %s\n", __FUNCTION__, usr_data->aname); + goto exit; + } + +exit: + return sprintf(buf, "%d\n", status); +} + + +ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data); + PSU_DATA_ATTR *usr_data = NULL; + struct psu_attr_info *sysfs_attr_info = NULL; + int i; + + for (i=0;inum_attr;i++) + { + if (strcmp(data->attr_info[i].name, attr->dev_attr.attr.name) == 0 && strcmp(pdata->psu_attrs[i].aname, attr->dev_attr.attr.name) == 0) + { + sysfs_attr_info = &data->attr_info[i]; + usr_data = &pdata->psu_attrs[i]; + } + } + + if (sysfs_attr_info==NULL || usr_data==NULL) { + printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name); + goto exit; + } + + switch(attr->index) + { + /*No write attributes for now in PSU*/ + default: + goto exit; + } + + psu_update_hw(dev, sysfs_attr_info, usr_data); + +exit: + return count; +} + +extern int board_i2c_cpld_read_new(unsigned short cpld_addr, char *name, u8 reg); +int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + int status = 0; + int val = 0; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + + + if (strncmp(adata->devtype, "cpld", strlen("cpld")) == 0) + { + val = board_i2c_cpld_read_new(adata->devaddr, adata->devname, adata->offset); + if (val < 0){ + return val; + } + padata->val.intval = ((val & adata->mask) == adata->cmpval); + psu_dbg(KERN_ERR "%s: byte_value = 0x%x\n", __FUNCTION__, padata->val.intval); + } + + return status; +} + +int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + int status = 0, retry = 10; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + char buf[32]=""; //temporary placeholder for block data + uint8_t offset = (uint8_t)adata->offset; + int data_len = adata->len; + + while (retry) + { + status = i2c_smbus_read_i2c_block_data((struct i2c_client *)client, offset, data_len-1, buf); + if (unlikely(status<0)) + { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + buf[0] = '\0'; + dev_dbg(&((struct i2c_client *)client)->dev, "unable to read block of data from (0x%x)\n", ((struct i2c_client *)client)->addr); + } + else + { + buf[data_len-1] = '\0'; + } + + if (strncmp(adata->devtype, "pmbus", strlen("pmbus")) == 0) + strscpy(padata->val.strval, buf+1, data_len-1); + else + strscpy(padata->val.strval, buf, data_len); + + psu_dbg(KERN_ERR "%s: status = %d, buf block: %s\n", __FUNCTION__, status, padata->val.strval); + return 0; +} + +int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + + int status = 0, retry = 10; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + uint8_t offset = (uint8_t)adata->offset; + + while (retry) { + status = i2c_smbus_read_word_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + padata->val.shortval = 0; + dev_dbg(&((struct i2c_client *)client)->dev, "unable to read a word from (0x%x)\n", ((struct i2c_client *)client)->addr); + } + else + { + padata->val.shortval = status; + } + + psu_dbg(KERN_ERR "%s: word value : %d\n", __FUNCTION__, padata->val.shortval); + return 0; +} diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.h b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.h new file mode 100644 index 000000000000..24e4ea02e7ec --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.h @@ -0,0 +1,31 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * PSU driver related api declarations + */ + +#ifndef __PDDF_PSU_API_H__ +#define __PDDF_PSU_API_H__ + +extern void get_psu_duplicate_sysfs(int idx, char *str); +extern ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf); +extern ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + +extern int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data); +extern int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data); +extern int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data); + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_defs.h b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_defs.h new file mode 100644 index 000000000000..60e81a9f5878 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_defs.h @@ -0,0 +1,90 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description: + * Platform PSU defines/structures header file + */ + +#ifndef __PDDF_PSU_DEFS_H__ +#define __PDDF_PSU_DEFS_H__ + + +#define MAX_NUM_PSU 5 +#define MAX_PSU_ATTRS 32 +#define ATTR_NAME_LEN 32 +#define STR_ATTR_SIZE 32 +#define DEV_TYPE_LEN 32 + +/* Each client has this additional data + */ + +typedef struct PSU_DATA_ATTR +{ + char aname[ATTR_NAME_LEN]; // attr name, taken from enum psu_sysfs_attributes + char devtype[DEV_TYPE_LEN]; // either a 'eeprom' or 'cpld', or 'pmbus' attribute + char devname[DEV_TYPE_LEN]; // Name of the device from where this sysfs attr is read + uint32_t devaddr; + uint32_t offset; + uint32_t mask; + uint32_t cmpval; + uint32_t len; + void *access_data; + +}PSU_DATA_ATTR; + +typedef struct PSU_SYSFS_ATTR_DATA +{ + int index; + unsigned short mode; + ssize_t (*show)(struct device *dev, struct device_attribute *da, char *buf); + int (*pre_get)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*do_get)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*post_get)(void *client, PSU_DATA_ATTR *adata, void *data); + ssize_t (*store)(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + int (*pre_set)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*do_set)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*post_set)(void *client, PSU_DATA_ATTR *adata, void *data); + void *data; +} PSU_SYSFS_ATTR_DATA; + +typedef struct PSU_SYSFS_ATTR_DATA_ENTRY +{ + char name[ATTR_NAME_LEN]; + PSU_SYSFS_ATTR_DATA *a_ptr; +} PSU_SYSFS_ATTR_DATA_ENTRY; + + +/* PSU CLIENT DATA - PLATFORM DATA FOR PSU CLIENT */ +typedef struct PSU_DATA +{ + int idx; // psu index + int num_psu_fans; + PSU_DATA_ATTR psu_attr; + int len; // no of valid attributes for this psu client + PSU_DATA_ATTR psu_attrs[MAX_PSU_ATTRS]; +}PSU_DATA; + +typedef struct PSU_PDATA +{ + int idx; // psu index + int num_psu_fans; // num of fans supported by the PSU + int len; // no of valid attributes for this psu client + PSU_DATA_ATTR *psu_attrs; +}PSU_PDATA; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.c new file mode 100644 index 000000000000..fa5d31a0866a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.c @@ -0,0 +1,398 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module driver for PSU + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_driver.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_api.h" + + +static unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +struct pddf_ops_t pddf_psu_ops = { + .pre_init = NULL, + .post_init = NULL, + + .pre_probe = NULL, + .post_probe = NULL, + + .pre_remove = NULL, + .post_remove = NULL, + + .pre_exit = NULL, + .post_exit = NULL, +}; +EXPORT_SYMBOL(pddf_psu_ops); + + +PSU_SYSFS_ATTR_DATA access_psu_present = {PSU_PRESENT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_present); + +PSU_SYSFS_ATTR_DATA access_psu_model_name = {PSU_MODEL_NAME, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_model_name); + +PSU_SYSFS_ATTR_DATA access_psu_power_good = {PSU_POWER_GOOD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_power_good); + +PSU_SYSFS_ATTR_DATA access_psu_mfr_id = {PSU_MFR_ID, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_mfr_id); + +PSU_SYSFS_ATTR_DATA access_psu_serial_num = {PSU_SERIAL_NUM, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_serial_num); + +PSU_SYSFS_ATTR_DATA access_psu_fan_dir = {PSU_FAN_DIR, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_fan_dir); + +PSU_SYSFS_ATTR_DATA access_psu_v_out = {PSU_V_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out); + +PSU_SYSFS_ATTR_DATA access_psu_v_out_min = {PSU_V_OUT_MIN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out_min); + +PSU_SYSFS_ATTR_DATA access_psu_v_out_max = {PSU_V_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out_max); + +PSU_SYSFS_ATTR_DATA access_psu_i_out = {PSU_I_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_i_out); + +PSU_SYSFS_ATTR_DATA access_psu_p_out = {PSU_P_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_out); + +PSU_SYSFS_ATTR_DATA access_psu_p_out_max = {PSU_P_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_out_max); + +PSU_SYSFS_ATTR_DATA access_psu_fan1_speed_rpm = {PSU_FAN1_SPEED, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_fan1_speed_rpm); + +PSU_SYSFS_ATTR_DATA access_psu_temp1_input = {PSU_TEMP1_INPUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_temp1_input); + +PSU_SYSFS_ATTR_DATA access_psu_temp1_high_threshold = {PSU_TEMP1_HIGH_THRESHOLD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_temp1_high_threshold); + +PSU_SYSFS_ATTR_DATA access_psu_v_in = {PSU_V_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_in); + +PSU_SYSFS_ATTR_DATA access_psu_i_in = {PSU_I_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_i_in); + +PSU_SYSFS_ATTR_DATA access_psu_p_in = {PSU_P_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_in); + +PSU_SYSFS_ATTR_DATA_ENTRY psu_sysfs_attr_data_tbl[]= +{ + { "psu_present", &access_psu_present}, + { "psu_model_name", &access_psu_model_name}, + { "psu_power_good" , &access_psu_power_good}, + { "psu_mfr_id" , &access_psu_mfr_id}, + { "psu_serial_num" , &access_psu_serial_num}, + { "psu_fan_dir" , &access_psu_fan_dir}, + { "psu_v_out" , &access_psu_v_out}, + { "psu_v_out_min" , &access_psu_v_out_min}, + { "psu_v_out_max" , &access_psu_v_out_max}, + { "psu_i_out" , &access_psu_i_out}, + { "psu_p_out" , &access_psu_p_out}, + { "psu_p_out_max" , &access_psu_p_out_max}, + { "psu_fan1_speed_rpm" , &access_psu_fan1_speed_rpm}, + { "psu_temp1_input" , &access_psu_temp1_input}, + { "psu_temp1_high_threshold" , &access_psu_temp1_high_threshold}, + { "psu_v_in" , &access_psu_v_in}, + { "psu_i_in" , &access_psu_i_in}, + { "psu_p_in" , &access_psu_p_in} +}; + +void *get_psu_access_data(char *name) +{ + int i=0; + for(i=0; i<(sizeof(psu_sysfs_attr_data_tbl)/sizeof(psu_sysfs_attr_data_tbl[0])); i++) + { + if(strcmp(name, psu_sysfs_attr_data_tbl[i].name) ==0) + { + return &psu_sysfs_attr_data_tbl[i]; + } + } + return NULL; +} +EXPORT_SYMBOL(get_psu_access_data); + + +static int psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct psu_data *data; + int status =0; + int i,num, j=0; + PSU_PDATA *psu_platform_data; + PSU_DATA_ATTR *data_attr; + PSU_SYSFS_ATTR_DATA_ENTRY *sysfs_data_entry; + char new_str[ATTR_NAME_LEN] = ""; + + + if (client == NULL) { + printk("NULL Client.. \n"); + goto exit; + } + + if (pddf_psu_ops.pre_probe) + { + status = (pddf_psu_ops.pre_probe)(client, dev_id); + if (status != 0) + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + dev_info(&client->dev, "chip found\n"); + + /* Take control of the platform data */ + psu_platform_data = (PSU_PDATA *)(client->dev.platform_data); + num = psu_platform_data->len; + data->index = psu_platform_data->idx - 1; + data->num_psu_fans = psu_platform_data->num_psu_fans; + data->num_attr = num; + + + + /* Create and Add supported attr in the 'attributes' list */ + for (i=0; ipsu_attrs + i; + sysfs_data_entry = get_psu_access_data(data_attr->aname); + if (sysfs_data_entry == NULL) + { + printk(KERN_ERR "%s: Wrong attribute name provided by user '%s'\n", __FUNCTION__, data_attr->aname); + continue; + } + + dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL); + dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1]; + strscpy((char *)dy_ptr->dev_attr.attr.name, data_attr->aname, ATTR_NAME_LEN); + dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode; + dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show; + dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store; + dy_ptr->index = sysfs_data_entry->a_ptr->index; + + data->psu_attribute_list[i] = &dy_ptr->dev_attr.attr; + strscpy(data->attr_info[i].name, data_attr->aname, ATTR_NAME_LEN); + data->attr_info[i].valid = 0; + mutex_init(&data->attr_info[i].update_lock); + + /*Create a duplicate entry*/ + get_psu_duplicate_sysfs(dy_ptr->index, new_str); + if (strcmp(new_str,"")) + { + dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL); + dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1]; + strscpy((char *)dy_ptr->dev_attr.attr.name, new_str, ATTR_NAME_LEN); + dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode; + dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show; + dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store; + dy_ptr->index = sysfs_data_entry->a_ptr->index; + + data->psu_attribute_list[num+j] = &dy_ptr->dev_attr.attr; + j++; + strscpy(new_str,"", ATTR_NAME_LEN); + } + } + data->psu_attribute_list[i+j] = NULL; + data->psu_attribute_group.attrs = data->psu_attribute_list; + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &data->psu_attribute_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register_with_info(&client->dev, client->name, NULL, NULL, NULL); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + /* Add a support for post probe function */ + if (pddf_psu_ops.post_probe) + { + status = (pddf_psu_ops.post_probe)(client, dev_id); + if (status != 0) + goto exit_remove; + } + + return 0; + + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group); +exit_free: + /* Free all the allocated attributes */ + for (i=0;data->psu_attribute_list[i]!=NULL;i++) + { + struct sensor_device_attribute *ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i]; + kfree(ptr); + data->psu_attribute_list[i] = NULL; + pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__); + } + kfree(data); +exit: + return status; +} + +static void psu_remove(struct i2c_client *client) +{ + int i=0, ret = 0; + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *platdata = (PSU_PDATA *)client->dev.platform_data; // use dev_get_platdata() + PSU_DATA_ATTR *platdata_sub = platdata->psu_attrs; + struct sensor_device_attribute *ptr = NULL; + + if (pddf_psu_ops.pre_remove) + { + ret = (pddf_psu_ops.pre_remove)(client); + if (ret!=0) + printk(KERN_ERR "FAN pre_remove function failed\n"); + } + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group); + for (i=0; data->psu_attribute_list[i]!=NULL; i++) + { + ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i]; + kfree(ptr); + data->psu_attribute_list[i] = NULL; + } + pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__); + kfree(data); + if (platdata_sub) { + printk(KERN_DEBUG "%s: Freeing platform subdata\n", __FUNCTION__); + kfree(platdata_sub); + } + if (platdata) { + printk(KERN_DEBUG "%s: Freeing platform data\n", __FUNCTION__); + kfree(platdata); + } + + if (pddf_psu_ops.post_remove) + { + ret = (pddf_psu_ops.post_remove)(client); + if (ret!=0) + printk(KERN_ERR "FAN post_remove function failed\n"); + } +} + +enum psu_intf +{ + eeprom_intf, + smbus_intf +}; + +static const struct i2c_device_id psu_id[] = { + {"psu_eeprom", eeprom_intf}, + {"psu_pmbus", smbus_intf}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, psu_id); + +static struct i2c_driver psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "psu", + }, + .probe = psu_probe, + .remove = psu_remove, + .id_table = psu_id, + .address_list = normal_i2c, +}; + +int example_fun(void) +{ + pddf_dbg(PSU, KERN_ERR "CALLING FUN...\n"); + return 0; +} +EXPORT_SYMBOL(example_fun); + + +int psu_init(void) +{ + int status = 0; + + if (pddf_psu_ops.pre_init) + { + status = (pddf_psu_ops.pre_init)(); + if (status!=0) + return status; + } + + pddf_dbg(PSU, KERN_ERR "GENERIC_PSU_DRIVER.. init Invoked..\n"); + status = i2c_add_driver(&psu_driver); + if (status!=0) + return status; + + if (pddf_psu_ops.post_init) + { + status = (pddf_psu_ops.post_init)(); + if (status!=0) + return status; + } + + return status; +} +EXPORT_SYMBOL(psu_init); + +void psu_exit(void) +{ + pddf_dbg(PSU, "GENERIC_PSU_DRIVER.. exit\n"); + if (pddf_psu_ops.pre_exit) (pddf_psu_ops.pre_exit)(); + i2c_del_driver(&psu_driver); + if (pddf_psu_ops.post_exit) (pddf_psu_ops.post_exit)(); +} +EXPORT_SYMBOL(psu_exit); + +module_init(psu_init); +module_exit(psu_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("psu driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.h b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.h new file mode 100644 index 000000000000..a94cf7441dbc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.h @@ -0,0 +1,70 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * PSU driver data structures + */ +#ifndef __PDDF_PSU_DRIVER_H__ +#define __PDDF_PSU_DRIVER_H__ + +enum psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD, + PSU_MFR_ID, + PSU_SERIAL_NUM, + PSU_FAN_DIR, + PSU_V_OUT, + PSU_V_OUT_MIN, + PSU_V_OUT_MAX, + PSU_I_OUT, + PSU_P_OUT, /* This is in micro watts to comply with lm-sensors */ + PSU_P_OUT_MAX, + PSU_FAN1_SPEED, + PSU_TEMP1_INPUT, + PSU_TEMP1_HIGH_THRESHOLD, + PSU_V_IN, + PSU_I_IN, + PSU_P_IN, + PSU_ATTR_MAX +}; + + +/* Every client has psu_data which is divided into per attribute data */ +struct psu_attr_info { + char name[ATTR_NAME_LEN]; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status; + union { + char strval[STR_ATTR_SIZE]; + int intval; + u16 shortval; + u8 charval; + }val; +}; +struct psu_data { + struct device *hwmon_dev; + u8 index; + int num_psu_fans; + int num_attr; + struct attribute *psu_attribute_list[MAX_PSU_ATTRS]; + struct attribute_group psu_attribute_group; + struct psu_attr_info attr_info[MAX_PSU_ATTRS]; +}; + + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switchboard.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/switchboard_fpga.c similarity index 67% rename from platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switchboard.c rename to platform/broadcom/sonic-platform-modules-cel/ds3000/modules/switchboard_fpga.c index e41b64badefc..305253403625 100644 --- a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switchboard.c +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/switchboard_fpga.c @@ -1,9 +1,9 @@ /* - * switchboard.c - driver for Silverstone Switch board FPGA/CPLD. + * switchboard_fpga.c - driver for ds3000 Switch board FPGA/CPLD. * * Author: Pradchaya Phucharoen * - * Copyright (C) 2018 Celestica Corp. + * Copyright (C) 2019 Celestica Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -14,18 +14,18 @@ * \--sys * \--devices * \--platform - * \--silverstone + * \--switchboard * |--FPGA * |--CPLD1 * |--CPLD2 * \--SFF * |--QSFP[1..32] - * \--SFP[1..2] + * \--SFP1 * */ #ifndef TEST_MODE -#define MOD_VERSION "1.2.0" +#define MOD_VERSION "2.2.0" #else #define MOD_VERSION "TEST" #endif @@ -35,7 +35,6 @@ #include #include #include -#include #include #include #include @@ -43,7 +42,6 @@ #include #include #include -#include #include #include #include @@ -55,9 +53,9 @@ static int majorNumber; -#define CLASS_NAME "silverstone_fpga" +#define CLASS_NAME "ds3000_fpga" #define DRIVER_NAME "switchboard" -#define FPGA_PCI_NAME "Silverstone_fpga_pci" +#define FPGA_PCI_NAME "ds3000_fpga_pci" #define DEVICE_NAME "fwupgrade" @@ -72,7 +70,6 @@ static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr, static int fpgafw_init(void); static void fpgafw_exit(void); - /* ======================================== FPGA PCIe BAR 0 Registers @@ -88,11 +85,7 @@ I2C_CH7 0x00000700 - 0x00000710. I2C_CH8 0x00000800 - 0x00000810. I2C_CH9 0x00000900 - 0x00000910. I2C_CH10 0x00000A00 - 0x00000A10. -I2C_CH11 0x00000B00 - 0x00000B10. -I2C_CH12 0x00000C00 - 0x00000C10. -I2C_CH13 0x00000D00 - 0x00000D10. SPI Master 0x00001200 - 0x00001300. -DPLL SPI Master 0x00001320 - 0x0000132F. PORT XCVR 0x00004000 - 0x00004FFF. */ @@ -115,6 +108,7 @@ PORT XCVR 0x00004000 - 0x00004FFF. #define FPGA_MISC_CTRL 0x0050 #define FPGA_MISC_STATUS 0x0054 #define FPGA_AVS_VID_STATUS 0x0068 +#define FPGA_FEATURE_CARD_GPIO 0x0070 #define FPGA_PORT_XCVR_READY 0x000c /* I2C_MASTER BASE ADDR */ @@ -133,11 +127,7 @@ PORT XCVR 0x00004000 - 0x00004FFF. #define I2C_MASTER_CH_8 8 #define I2C_MASTER_CH_9 9 #define I2C_MASTER_CH_10 10 -#define I2C_MASTER_CH_11 11 -#define I2C_MASTER_CH_12 12 -#define I2C_MASTER_CH_13 13 - -#define I2C_MASTER_CH_TOTAL I2C_MASTER_CH_5 +#define I2C_MASTER_CH_TOTAL I2C_MASTER_CH_10 /* SPI_MASTER */ #define SPI_MASTER_WR_EN 0x1200 /* one bit */ @@ -193,7 +183,6 @@ PORT XCVR 0x00004000 - 0x00004FFF. */ #define INTR_INT_N 5 #define INTR_PRESENT 4 -#define INTR_TXFAULT 2 #define INTR_RXLOS 1 #define INTR_MODABS 0 @@ -208,7 +197,6 @@ PORT XCVR 0x00004000 - 0x00004FFF. */ #define MASK_INT_N 5 #define MASK_PRESENT 4 -#define MASK_TXFAULT 2 #define MASK_RXLOS 1 #define MASK_MODABS 0 @@ -249,17 +237,19 @@ enum { * */ + #define VIRTUAL_I2C_QSFP_PORT 32 -#define VIRTUAL_I2C_SFP_PORT 2 +#define VIRTUAL_I2C_SFP_PORT 1 #define SFF_PORT_TOTAL VIRTUAL_I2C_QSFP_PORT + VIRTUAL_I2C_SFP_PORT -#define VIRTUAL_I2C_BUS_OFFSET 10 +#define VIRTUAL_I2C_BUS_OFFSET 2 #define CPLD1_SLAVE_ADDR 0x30 #define CPLD2_SLAVE_ADDR 0x31 -static struct class* fpgafwclass = NULL; // < The device-driver class struct pointer -static struct device* fpgafwdev = NULL; // < The device-driver device struct pointer +static struct class* fpgafwclass = NULL; ///< The device-driver class struct pointer +static struct device* fpgafwdev = NULL; ///< The device-driver device struct pointer +static struct platform_device *ds3000_dev; #define PCI_VENDOR_ID_TEST 0x1af4 @@ -308,38 +298,31 @@ struct i2c_dev_data { /* PREDEFINED I2C SWITCH DEVICE TOPOLOGY */ static struct i2c_switch fpga_i2c_bus_dev[] = { - /* BUS3 QSFP Exported as virtual bus */ - {I2C_MASTER_CH_3, 0x71, 2, QSFP, "QSFP1"}, {I2C_MASTER_CH_3, 0x71, 3, QSFP, "QSFP2"}, - {I2C_MASTER_CH_3, 0x71, 0, QSFP, "QSFP3"}, {I2C_MASTER_CH_3, 0x71, 1, QSFP, "QSFP4"}, - {I2C_MASTER_CH_3, 0x71, 6, QSFP, "QSFP5"}, {I2C_MASTER_CH_3, 0x71, 5, QSFP, "QSFP6"}, - {I2C_MASTER_CH_3, 0x73, 7, QSFP, "QSFP7"}, {I2C_MASTER_CH_3, 0x71, 4, QSFP, "QSFP8"}, - - {I2C_MASTER_CH_3, 0x73, 4, QSFP, "QSFP9"}, {I2C_MASTER_CH_3, 0x73, 3, QSFP, "QSFP10"}, - {I2C_MASTER_CH_3, 0x73, 6, QSFP, "QSFP11"}, {I2C_MASTER_CH_3, 0x73, 2, QSFP, "QSFP12"}, - {I2C_MASTER_CH_3, 0x73, 1, QSFP, "QSFP13"}, {I2C_MASTER_CH_3, 0x73, 5, QSFP, "QSFP14"}, - {I2C_MASTER_CH_3, 0x71, 7, QSFP, "QSFP15"}, {I2C_MASTER_CH_3, 0x73, 0, QSFP, "QSFP16"}, - - {I2C_MASTER_CH_3, 0x72, 1, QSFP, "QSFP17"}, {I2C_MASTER_CH_3, 0x72, 7, QSFP, "QSFP18"}, - {I2C_MASTER_CH_3, 0x72, 4, QSFP, "QSFP19"}, {I2C_MASTER_CH_3, 0x72, 0, QSFP, "QSFP20"}, - {I2C_MASTER_CH_3, 0x72, 5, QSFP, "QSFP21"}, {I2C_MASTER_CH_3, 0x72, 2, QSFP, "QSFP22"}, - {I2C_MASTER_CH_3, 0x70, 5, QSFP, "QSFP23"}, {I2C_MASTER_CH_3, 0x72, 6, QSFP, "QSFP24"}, - - {I2C_MASTER_CH_3, 0x72, 3, QSFP, "QSFP25"}, {I2C_MASTER_CH_3, 0x70, 6, QSFP, "QSFP26"}, - {I2C_MASTER_CH_3, 0x70, 0, QSFP, "QSFP27"}, {I2C_MASTER_CH_3, 0x70, 7, QSFP, "QSFP28"}, - {I2C_MASTER_CH_3, 0x70, 2, QSFP, "QSFP29"}, {I2C_MASTER_CH_3, 0x70, 4, QSFP, "QSFP30"}, - {I2C_MASTER_CH_3, 0x70, 3, QSFP, "QSFP31"}, {I2C_MASTER_CH_3, 0x70, 1, QSFP, "QSFP32"}, + /* BUS2 QSFP Exported as virtual bus */ + {I2C_MASTER_CH_2, 0x72, 0, QSFP, "QSFP1"}, {I2C_MASTER_CH_2, 0x72, 1, QSFP, "QSFP2"}, + {I2C_MASTER_CH_2, 0x72, 2, QSFP, "QSFP3"}, {I2C_MASTER_CH_2, 0x72, 3, QSFP, "QSFP4"}, + {I2C_MASTER_CH_2, 0x72, 4, QSFP, "QSFP5"}, {I2C_MASTER_CH_2, 0x72, 5, QSFP, "QSFP6"}, + {I2C_MASTER_CH_2, 0x72, 6, QSFP, "QSFP7"}, {I2C_MASTER_CH_2, 0x72, 7, QSFP, "QSFP8"}, + {I2C_MASTER_CH_2, 0x73, 0, QSFP, "QSFP9"}, {I2C_MASTER_CH_2, 0x73, 1, QSFP, "QSFP10"}, + {I2C_MASTER_CH_2, 0x73, 2, QSFP, "QSFP11"}, {I2C_MASTER_CH_2, 0x73, 3, QSFP, "QSFP12"}, + {I2C_MASTER_CH_2, 0x73, 4, QSFP, "QSFP13"}, {I2C_MASTER_CH_2, 0x73, 5, QSFP, "QSFP14"}, + {I2C_MASTER_CH_2, 0x73, 6, QSFP, "QSFP15"}, {I2C_MASTER_CH_2, 0x73, 7, QSFP, "QSFP16"}, + {I2C_MASTER_CH_2, 0x74, 0, QSFP, "QSFP17"}, {I2C_MASTER_CH_2, 0x74, 1, QSFP, "QSFP18"}, + {I2C_MASTER_CH_2, 0x74, 2, QSFP, "QSFP19"}, {I2C_MASTER_CH_2, 0x74, 3, QSFP, "QSFP20"}, + {I2C_MASTER_CH_2, 0x74, 4, QSFP, "QSFP21"}, {I2C_MASTER_CH_2, 0x74, 5, QSFP, "QSFP22"}, + {I2C_MASTER_CH_2, 0x74, 6, QSFP, "QSFP23"}, {I2C_MASTER_CH_2, 0x74, 7, QSFP, "QSFP24"}, + {I2C_MASTER_CH_2, 0x75, 0, QSFP, "QSFP25"}, {I2C_MASTER_CH_2, 0x75, 1, QSFP, "QSFP26"}, + {I2C_MASTER_CH_2, 0x75, 2, QSFP, "QSFP27"}, {I2C_MASTER_CH_2, 0x75, 3, QSFP, "QSFP28"}, + {I2C_MASTER_CH_2, 0x75, 4, QSFP, "QSFP29"}, {I2C_MASTER_CH_2, 0x75, 5, QSFP, "QSFP30"}, + {I2C_MASTER_CH_2, 0x75, 6, QSFP, "QSFP31"}, {I2C_MASTER_CH_2, 0x75, 7, QSFP, "QSFP32"}, /* BUS1 SFP+ Exported as virtual bus */ - {I2C_MASTER_CH_1, 0xFF, 0, SFP, "SFP1"}, - /* BUS2 SFP+ Exported as virtual bus */ - {I2C_MASTER_CH_2, 0xFF, 0, SFP, "SFP2"}, - /* BUS4 CPLD Access via I2C */ - {I2C_MASTER_CH_4, 0xFF, 0, NONE, "CPLD_S"}, - /* BUS5 CPLD_B */ - {I2C_MASTER_CH_5, 0xFF, 0, NONE, "CPLD_B"}, + {I2C_MASTER_CH_1, 0x72, 0, SFP, "SFP1"}, + /* BUS3 Switchboard CPLD */ + {I2C_MASTER_CH_3, 0xFF, 0, NONE, "I2C_3"}, }; #define VIRTUAL_I2C_PORT_LENGTH ARRAY_SIZE(fpga_i2c_bus_dev) -#define SW_I2C_CPLD_INDEX SFF_PORT_TOTAL +#define VIRTUAL_I2C_CPLD_INDEX SFF_PORT_TOTAL struct fpga_device { /* data mmio region */ @@ -354,7 +337,7 @@ static struct fpga_device fpga_dev = { .data_mmio_len = 0, }; -struct silverstone_fpga_data { +struct ds3000_fpga_data { struct device *sff_devices[SFF_PORT_TOTAL]; struct i2c_client *sff_i2c_clients[SFF_PORT_TOTAL]; struct i2c_adapter *i2c_adapter[VIRTUAL_I2C_PORT_LENGTH]; @@ -369,7 +352,7 @@ struct sff_device_data { enum PORT_TYPE port_type; }; -struct silverstone_fpga_data *fpga_data; +struct ds3000_fpga_data *fpga_data; /* * Kernel object for other module drivers. @@ -385,18 +368,6 @@ static struct kobject *cpld2 = NULL; */ static struct device *sff_dev = NULL; - -static ssize_t version_show(struct device *dev, struct device_attribute *devattr, - char *buf) -{ - u32 version; - - mutex_lock(&fpga_data->fpga_lock); - version = ioread32(fpga_dev.data_base_addr + FPGA_VERSION); - mutex_unlock(&fpga_data->fpga_lock); - return sprintf(buf, "%d.%d\n", version >> 16, version & 0xFFFF); -} - /** * Show the value of the register set by 'set_fpga_reg_address' * If the address is not set by 'set_fpga_reg_address' first, @@ -404,75 +375,86 @@ static ssize_t version_show(struct device *dev, struct device_attribute *devattr * @param buf register value in hextring * @return number of bytes read, or an error code */ -static ssize_t get_fpga_reg_value(struct device *dev, struct device_attribute *devattr, - char *buf) +static ssize_t get_fpga_reg_value(struct device *dev, + struct device_attribute *attr, char *buf) { // read data from the address uint32_t data; data = ioread32(fpga_data->fpga_read_addr); return sprintf(buf, "0x%8.8x\n", data); } + /** * Store the register address * @param buf address wanted to be read value of * @return number of bytes stored, or an error code */ -static ssize_t set_fpga_reg_address(struct device *dev, struct device_attribute *devattr, +static ssize_t set_fpga_reg_address(struct device *dev, + struct device_attribute *attr, const char *buf, size_t count) { + ssize_t status; uint32_t addr; - char *last; - addr = (uint32_t)strtoul(buf, &last, 16); - if (addr == 0 && buf == last) { - return -EINVAL; + status = kstrtou32(buf, 0, &addr); + if (status == 0) { + fpga_data->fpga_read_addr = fpga_dev.data_base_addr + addr; + status = count; } - fpga_data->fpga_read_addr = fpga_dev.data_base_addr + addr; - return count; + return status; } + /** * Show value of fpga scratch register * @param buf register value in hexstring * @return number of bytes read, or an error code */ -static ssize_t get_fpga_scratch(struct device *dev, struct device_attribute *devattr, - char *buf) +static ssize_t get_fpga_scratch(struct device *dev, + struct device_attribute *attr, char *buf) { - return sprintf(buf, "0x%8.8x\n", ioread32(fpga_dev.data_base_addr + FPGA_SCRATCH) & 0xffffffff); + uint32_t data; + data = ioread32(fpga_dev.data_base_addr + FPGA_SCRATCH); + data &= 0xffffffff; + return sprintf(buf, "0x%8.8x\n", data); } + /** * Store value of fpga scratch register * @param buf scratch register value passing from user space * @return number of bytes stored, or an error code */ -static ssize_t set_fpga_scratch(struct device *dev, struct device_attribute *devattr, +static ssize_t set_fpga_scratch(struct device *dev, + struct device_attribute *attr, const char *buf, size_t count) { + ssize_t status; uint32_t data; - char *last; - data = (uint32_t)strtoul(buf, &last, 16); - if (data == 0 && buf == last) { - return -EINVAL; + + status = kstrtou32(buf, 0, &data); + if (status == 0) { + iowrite32(data, fpga_dev.data_base_addr + FPGA_SCRATCH); + status = count; } - iowrite32(data, fpga_dev.data_base_addr + FPGA_SCRATCH); - return count; + return status; } + /** * Store a value in a specific register address * @param buf the value and address in format '0xhhhh 0xhhhhhhhh' * @return number of bytes sent by user space, or an error code */ -static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *devattr, +static ssize_t set_fpga_reg_value(struct device *dev, + struct device_attribute *attr, const char *buf, size_t count) { - // register are 4 bytes + //register is 4 bytes uint32_t addr; uint32_t value; uint32_t mode = 8; char *tok; char clone[count]; char *pclone = clone; - char *last; + ssize_t status; strcpy(clone, buf); @@ -482,8 +464,8 @@ static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *d mutex_unlock(&fpga_data->fpga_lock); return -EINVAL; } - addr = (uint32_t)strtoul(tok, &last, 16); - if (addr == 0 && tok == last) { + status = kstrtou32(tok, 0, &addr); + if (status != 0) { mutex_unlock(&fpga_data->fpga_lock); return -EINVAL; } @@ -492,8 +474,8 @@ static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *d mutex_unlock(&fpga_data->fpga_lock); return -EINVAL; } - value = (uint32_t)strtoul(tok, &last, 16); - if (value == 0 && tok == last) { + status = kstrtou32(tok, 0, &value); + if (status != 0) { mutex_unlock(&fpga_data->fpga_lock); return -EINVAL; } @@ -501,8 +483,8 @@ static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *d if (tok == NULL) { mode = 32; } else { - mode = (uint32_t)strtoul(tok, &last, 10); - if (mode == 0 && tok == last) { + status = kstrtou32(tok, 0, &mode); + if (status != 0) { mutex_unlock(&fpga_data->fpga_lock); return -EINVAL; } @@ -521,8 +503,6 @@ static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *d /** * Show FPGA port XCVR ready status - * @param buf 1 if the functin is ready, 0 if not. - * @return number of bytes read, or an error code */ static ssize_t ready_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -540,14 +520,12 @@ static DEVICE_ATTR( getreg, 0600, get_fpga_reg_value, set_fpga_reg_address); static DEVICE_ATTR( scratch, 0600, get_fpga_scratch, set_fpga_scratch); static DEVICE_ATTR( setreg, 0200, NULL , set_fpga_reg_value); static DEVICE_ATTR_RO(ready); -static DEVICE_ATTR_RO(version); static struct attribute *fpga_attrs[] = { &dev_attr_getreg.attr, &dev_attr_scratch.attr, &dev_attr_setreg.attr, &dev_attr_ready.attr, - &dev_attr_version.attr, NULL, }; @@ -555,78 +533,90 @@ static struct attribute_group fpga_attr_grp = { .attrs = fpga_attrs, }; -static ssize_t cpld1_version_show(struct device *dev, - struct device_attribute *attr, char *buf) +/* SW CPLDs attributes */ +static ssize_t cpld1_getreg_show(struct device *dev, + struct device_attribute *attr, char *buf) { - u8 version; + // CPLD register is one byte + uint8_t data; int err; - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], - CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x00, - I2C_SMBUS_BYTE_DATA, - (union i2c_smbus_data *)&version); + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, + I2C_SMBUS_READ, fpga_data->cpld1_read_addr, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + if (err < 0) return err; - return sprintf(buf, "%d.%d\n", version >> 4, version & 0x0F); -} -struct device_attribute dev_attr_cpld1_version = __ATTR(version, 0444, cpld1_version_show , NULL); -/* SW CPLDs attributes */ -static ssize_t cpld1_getreg_show(struct device *dev, struct device_attribute *attr, char *buf) -{ - // CPLD register is one byte - uint8_t data; - fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, fpga_data->cpld1_read_addr, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); return sprintf(buf, "0x%2.2x\n", data); } -static ssize_t cpld1_getreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) + +static ssize_t cpld1_getreg_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { + ssize_t status; uint8_t addr; - char *last; - addr = (uint8_t)strtoul(buf, &last, 16); - if (addr == 0 && buf == last) { - return -EINVAL; + + status = kstrtou8(buf, 0, &addr); + if (status == 0) { + fpga_data->cpld1_read_addr = addr; + status = count; } - fpga_data->cpld1_read_addr = addr; - return size; + return status; } -struct device_attribute dev_attr_cpld1_getreg = __ATTR(getreg, 0600, cpld1_getreg_show, cpld1_getreg_store); -static ssize_t cpld1_scratch_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t cpld1_scratch_show(struct device *dev, + struct device_attribute *attr, char *buf) { // CPLD register is one byte - __u8 data; + uint8_t data; int err; - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x01, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x01, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); if (err < 0) return err; + return sprintf(buf, "0x%2.2x\n", data); } -static ssize_t cpld1_scratch_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) + +static ssize_t cpld1_scratch_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { // CPLD register is one byte - __u8 data; - char *last; + uint8_t data; + ssize_t status; int err; - data = (uint8_t)strtoul(buf, &last, 16); - if (data == 0 && buf == last) { - return -EINVAL; + + status = kstrtou8(buf, 0, &data); + if (status != 0) { + return status; } - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x01, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x01, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); if (err < 0) return err; - return size; + + return count; } -struct device_attribute dev_attr_cpld1_scratch = __ATTR(scratch, 0600, cpld1_scratch_show, cpld1_scratch_store); -static ssize_t cpld1_setreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t cpld1_setreg_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { uint8_t addr, value; char *tok; - char clone[size]; + char clone[count]; char *pclone = clone; + ssize_t status; int err; - char *last; strcpy(clone, buf); @@ -634,29 +624,33 @@ static ssize_t cpld1_setreg_store(struct device *dev, struct device_attribute *a if (tok == NULL) { return -EINVAL; } - addr = (uint8_t)strtoul(tok, &last, 16); - if (addr == 0 && tok == last) { + status = kstrtou8(tok, 0, &addr); + if (status != 0) { return -EINVAL; } tok = strsep((char**)&pclone, " "); if (tok == NULL) { return -EINVAL; } - value = (uint8_t)strtoul(tok, &last, 16); - if (value == 0 && tok == last) { + status = kstrtou8(tok, 0, &value); + if (status != 0) { return -EINVAL; } - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, addr, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&value); + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, addr, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&value); if (err < 0) return err; - return size; + return count; } + +struct device_attribute dev_attr_cpld1_getreg = __ATTR(getreg, 0600, cpld1_getreg_show, cpld1_getreg_store); +struct device_attribute dev_attr_cpld1_scratch = __ATTR(scratch, 0600, cpld1_scratch_show, cpld1_scratch_store); struct device_attribute dev_attr_cpld1_setreg = __ATTR(setreg, 0200, NULL, cpld1_setreg_store); static struct attribute *cpld1_attrs[] = { - &dev_attr_cpld1_version.attr, &dev_attr_cpld1_getreg.attr, &dev_attr_cpld1_scratch.attr, &dev_attr_cpld1_setreg.attr, @@ -667,80 +661,86 @@ static struct attribute_group cpld1_attr_grp = { .attrs = cpld1_attrs, }; -static ssize_t cpld2_version_show(struct device *dev, - struct device_attribute *attr, char *buf) +static ssize_t cpld2_getreg_show(struct device *dev, + struct device_attribute *attr, char *buf) { - u8 version; + // CPLD register is one byte + uint8_t data; int err; - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], - CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x00, - I2C_SMBUS_BYTE_DATA, - (union i2c_smbus_data *)&version); + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, fpga_data->cpld2_read_addr, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); if (err < 0) return err; - return sprintf(buf, "%d.%d\n", version >> 4, version & 0x0F); -} -struct device_attribute dev_attr_cpld2_version = __ATTR(version, 0444, cpld2_version_show , NULL); -static ssize_t cpld2_getreg_show(struct device *dev, struct device_attribute *attr, char *buf) -{ - // CPLD register is one byte - uint8_t data; - fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, fpga_data->cpld2_read_addr, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); return sprintf(buf, "0x%2.2x\n", data); } -static ssize_t cpld2_getreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t cpld2_getreg_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { // CPLD register is one byte - uint32_t addr; - char *last; - addr = (uint8_t)strtoul(buf, &last, 16); - if (addr == 0 && buf == last) { - return -EINVAL; + uint8_t addr; + ssize_t status; + + status = kstrtou8(buf, 0, &addr); + if (status == 0) { + fpga_data->cpld2_read_addr = addr; + status = count; } - fpga_data->cpld2_read_addr = addr; - return size; + return status; } -struct device_attribute dev_attr_cpld2_getreg = __ATTR(getreg, 0600, cpld2_getreg_show, cpld2_getreg_store); -static ssize_t cpld2_scratch_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t cpld2_scratch_show(struct device *dev, + struct device_attribute *attr, char *buf) { // CPLD register is one byte - __u8 data; + uint8_t data; int err; - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x01, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x01, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); if (err < 0) return err; + return sprintf(buf, "0x%2.2x\n", data); } -static ssize_t cpld2_scratch_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t cpld2_scratch_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { // CPLD register is one byte - __u8 data; - char *last; + uint8_t data; int err; + ssize_t status; - data = (uint8_t)strtoul(buf, &last, 16); - if (data == 0 && buf == last) { + status = kstrtou8(buf, 0, &data); + if (status != 0) { return -EINVAL; } - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x01, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x01, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); if (err < 0) return err; - return size; + + return count; } -struct device_attribute dev_attr_cpld2_scratch = __ATTR(scratch, 0600, cpld2_scratch_show, cpld2_scratch_store); -static ssize_t cpld2_setreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t cpld2_setreg_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { uint8_t addr, value; char *tok; - char clone[size]; + char clone[count]; char *pclone = clone; + ssize_t status; int err; - char *last; strcpy(clone, buf); @@ -748,29 +748,33 @@ static ssize_t cpld2_setreg_store(struct device *dev, struct device_attribute *a if (tok == NULL) { return -EINVAL; } - addr = (uint8_t)strtoul(tok, &last, 16); - if (addr == 0 && tok == last) { + status = kstrtou8(tok, 0, &addr); + if (status != 0) { return -EINVAL; } tok = strsep((char**)&pclone, " "); if (tok == NULL) { return -EINVAL; } - value = (uint8_t)strtoul(tok, &last, 16); - if (value == 0 && tok == last) { + status = kstrtou8(tok, 0, &value); + if (status != 0) { return -EINVAL; } - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, addr, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&value); + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, addr, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&value); if (err < 0) return err; - return size; + return count; } + +struct device_attribute dev_attr_cpld2_getreg = __ATTR(getreg, 0600, cpld2_getreg_show, cpld2_getreg_store); +struct device_attribute dev_attr_cpld2_scratch = __ATTR(scratch, 0600, cpld2_scratch_show, cpld2_scratch_store); struct device_attribute dev_attr_cpld2_setreg = __ATTR(setreg, 0200, NULL, cpld2_setreg_store); static struct attribute *cpld2_attrs[] = { - &dev_attr_cpld2_version.attr, &dev_attr_cpld2_getreg.attr, &dev_attr_cpld2_scratch.attr, &dev_attr_cpld2_setreg.attr, @@ -782,7 +786,8 @@ static struct attribute_group cpld2_attr_grp = { }; /* QSFP/SFP+ attributes */ -static ssize_t qsfp_modirq_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t qsfp_modirq_show(struct device *dev, + struct device_attribute *attr, char *buf) { u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); @@ -796,7 +801,8 @@ static ssize_t qsfp_modirq_show(struct device *dev, struct device_attribute *att } DEVICE_ATTR_RO(qsfp_modirq); -static ssize_t qsfp_modprs_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t qsfp_modprs_show(struct device *dev, + struct device_attribute *attr, char *buf) { u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); @@ -810,7 +816,8 @@ static ssize_t qsfp_modprs_show(struct device *dev, struct device_attribute *att } DEVICE_ATTR_RO(qsfp_modprs); -static ssize_t sfp_txfault_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t sfp_txfault_show(struct device *dev, + struct device_attribute *attr, char *buf) { u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); @@ -824,7 +831,8 @@ static ssize_t sfp_txfault_show(struct device *dev, struct device_attribute *att } DEVICE_ATTR_RO(sfp_txfault); -static ssize_t sfp_rxlos_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t sfp_rxlos_show(struct device *dev, + struct device_attribute *attr, char *buf) { u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); @@ -838,7 +846,8 @@ static ssize_t sfp_rxlos_show(struct device *dev, struct device_attribute *attr, } DEVICE_ATTR_RO(sfp_rxlos); -static ssize_t sfp_modabs_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t sfp_modabs_show(struct device *dev, + struct device_attribute *attr, char *buf) { u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); @@ -852,7 +861,8 @@ static ssize_t sfp_modabs_show(struct device *dev, struct device_attribute *attr } DEVICE_ATTR_RO(sfp_modabs); -static ssize_t qsfp_lpmode_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t qsfp_lpmode_show(struct device *dev, + struct device_attribute *attr, char *buf) { u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); @@ -864,33 +874,36 @@ static ssize_t qsfp_lpmode_show(struct device *dev, struct device_attribute *att mutex_unlock(&fpga_data->fpga_lock); return sprintf(buf, "%d\n", (data >> CTRL_LPMOD) & 1U); } -static ssize_t qsfp_lpmode_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t qsfp_lpmode_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { ssize_t status; - long value; + uint32_t value; u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); unsigned int portid = dev_data->portid; unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid - 1) * 0x10; mutex_lock(&fpga_data->fpga_lock); - status = kstrtol(buf, 0, &value); + status = kstrtou32(buf, 0, &value); if (status == 0) { - // if value is 0, disable the lpmode + // check if value is 0 clear data = ioread32(fpga_dev.data_base_addr + REGISTER); if (!value) data = data & ~( (u32)0x1 << CTRL_LPMOD); else data = data | ((u32)0x1 << CTRL_LPMOD); iowrite32(data, fpga_dev.data_base_addr + REGISTER); - status = size; + status = count; } mutex_unlock(&fpga_data->fpga_lock); return status; } DEVICE_ATTR_RW(qsfp_lpmode); -static ssize_t qsfp_reset_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t qsfp_reset_show(struct device *dev, + struct device_attribute *attr, char *buf) { u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); @@ -903,33 +916,136 @@ static ssize_t qsfp_reset_show(struct device *dev, struct device_attribute *attr return sprintf(buf, "%d\n", (data >> CTRL_RST) & 1U); } -static ssize_t qsfp_reset_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t qsfp_reset_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { ssize_t status; - long value; + uint32_t value; u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); unsigned int portid = dev_data->portid; unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid - 1) * 0x10; mutex_lock(&fpga_data->fpga_lock); - status = kstrtol(buf, 0, &value); + status = kstrtou32(buf, 0, &value); if (status == 0) { - // if value is 0, reset signal is low + // check if value is 0 clear data = ioread32(fpga_dev.data_base_addr + REGISTER); if (!value) data = data & ~( (u32)0x1 << CTRL_RST); else data = data | ((u32)0x1 << CTRL_RST); iowrite32(data, fpga_dev.data_base_addr + REGISTER); - status = size; + status = count; } mutex_unlock(&fpga_data->fpga_lock); return status; } DEVICE_ATTR_RW(qsfp_reset); -static ssize_t sfp_txdisable_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t qsfp_isr_flags_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + u8 valid_bits; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_INT_STATUS_BASE + (portid - 1) * 0x10; + valid_bits = BIT(INTR_INT_N) | BIT(INTR_PRESENT); + + mutex_lock(&fpga_data->fpga_lock); + data = (u8) ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + + /* + * Unify the return pattern to 2-bit + * [1] : module interrupt + * [0] : presence + */ + data = data & valid_bits; + data = data >> 4; + + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t qsfp_isr_flags_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status; + u32 value; + u8 valid_bits; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_INT_STATUS_BASE + (portid - 1) * 0x10; + valid_bits = BIT(INTR_INT_N) | BIT(INTR_PRESENT); + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtou32(buf, 0, &value); + if (status == 0) { + value = value << 4; + value = value & valid_bits; + iowrite32(value, fpga_dev.data_base_addr + REGISTER); + status = count; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(qsfp_isr_flags); + +static ssize_t qsfp_isr_mask_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u32 data; + u8 valid_bits; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_INT_MASK_BASE + (portid - 1) * 0x10; + valid_bits = BIT(INTR_INT_N) | BIT(INTR_PRESENT); + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + + /* + * Unify the return pattern to 2-bit + * [1] : module interrupt + * [0] : presence + */ + data = data & valid_bits; + data = data >> 4; + + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t qsfp_isr_mask_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status; + u32 value; + u8 valid_bits; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_INT_MASK_BASE + (portid - 1) * 0x10; + valid_bits = BIT(INTR_INT_N) | BIT(INTR_PRESENT); + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtou32(buf, 0, &value); + if (status == 0) { + value = value << 4; + value = value & valid_bits; + iowrite32(value, fpga_dev.data_base_addr + REGISTER); + status = count; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(qsfp_isr_mask); + +static ssize_t sfp_txdisable_show(struct device *dev, + struct device_attribute *attr, char *buf) { u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); @@ -941,7 +1057,9 @@ static ssize_t sfp_txdisable_show(struct device *dev, struct device_attribute *a mutex_unlock(&fpga_data->fpga_lock); return sprintf(buf, "%d\n", (data >> CTRL_TXDIS) & 1U); } -static ssize_t sfp_txdisable_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t sfp_txdisable_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { ssize_t status; long value; @@ -960,22 +1078,112 @@ static ssize_t sfp_txdisable_store(struct device *dev, struct device_attribute * else data = data | ((u32)0x1 << CTRL_TXDIS); iowrite32(data, fpga_dev.data_base_addr + REGISTER); - status = size; + status = count; } mutex_unlock(&fpga_data->fpga_lock); return status; } DEVICE_ATTR_RW(sfp_txdisable); +static ssize_t sfp_isr_flags_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + u8 valid_bits; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_INT_STATUS_BASE + (portid - 1) * 0x10; + valid_bits = BIT(INTR_RXLOS) | BIT(INTR_MODABS); + + mutex_lock(&fpga_data->fpga_lock); + data = (u8) ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + + data = data & valid_bits; + + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t sfp_isr_flags_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status; + u32 value; + u8 valid_bits; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_INT_STATUS_BASE + (portid - 1) * 0x10; + valid_bits = BIT(INTR_INT_N) | BIT(INTR_PRESENT); + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtou32(buf, 0, &value); + if (status == 0) { + value = value & valid_bits; + iowrite32(value, fpga_dev.data_base_addr + REGISTER); + status = count; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(sfp_isr_flags); + +static ssize_t sfp_isr_mask_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u32 data; + u8 valid_bits; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_INT_MASK_BASE + (portid - 1) * 0x10; + valid_bits = BIT(INTR_RXLOS) | BIT(INTR_MODABS); + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + + data = data & valid_bits; + + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t sfp_isr_mask_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status; + u32 value; + u8 valid_bits; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_INT_MASK_BASE + (portid - 1) * 0x10; + valid_bits = BIT(INTR_RXLOS) | BIT(INTR_MODABS); + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtou32(buf, 0, &value); + if (status == 0) { + value = value & valid_bits; + iowrite32(value, fpga_dev.data_base_addr + REGISTER); + status = count; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(sfp_isr_mask); + static struct attribute *sff_attrs[] = { &dev_attr_qsfp_modirq.attr, &dev_attr_qsfp_modprs.attr, &dev_attr_qsfp_lpmode.attr, &dev_attr_qsfp_reset.attr, + &dev_attr_qsfp_isr_flags.attr, + &dev_attr_qsfp_isr_mask.attr, &dev_attr_sfp_txfault.attr, &dev_attr_sfp_rxlos.attr, &dev_attr_sfp_modabs.attr, &dev_attr_sfp_txdisable.attr, + &dev_attr_sfp_isr_flags.attr, + &dev_attr_sfp_isr_mask.attr, NULL, }; @@ -989,22 +1197,30 @@ static const struct attribute_group *sff_attr_grps[] = { }; -static ssize_t port_led_mode_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t port_led_mode_show(struct device *dev, + struct device_attribute *attr, char *buf) { // value can be "nomal", "test" __u8 led_mode_1, led_mode_2; int err; - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1); + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1); if (err < 0) return err; - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_2); + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_2); if (err < 0) return err; + return sprintf(buf, "%s %s\n", led_mode_1 ? "test" : "normal", led_mode_2 ? "test" : "normal"); } -static ssize_t port_led_mode_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t port_led_mode_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { int status; __u8 led_mode_1; @@ -1015,62 +1231,65 @@ static ssize_t port_led_mode_store(struct device *dev, struct device_attribute * } else { return -EINVAL; } - status = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, - I2C_SMBUS_WRITE, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1); - status = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, - I2C_SMBUS_WRITE, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1); - return size; + status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x09, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1); + status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x09, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1); + return count; } DEVICE_ATTR_RW(port_led_mode); // Only work when port_led_mode set to 1 -static ssize_t port_led_color_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t port_led_color_show(struct device *dev, + struct device_attribute *attr, char *buf) { - // value can be R/G/B/C/M/Y/W/OFF + // value can be "off", "green", "amber", "both" __u8 led_color1, led_color2; int err; - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color1); + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x0A, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color1); if (err < 0) return err; - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color2); + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x0A, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color2); if (err < 0) return err; return sprintf(buf, "%s %s\n", - led_color1 == 0x07 ? "off" : led_color1 == 0x06 ? "green" : led_color1 == 0x05 ? "red" : led_color1 == 0x04 ? - "yellow" : led_color1 == 0x03 ? "blue" : led_color1 == 0x02 ? "cyan" : led_color1 == 0x01 ? "magenta" : "white", - led_color1 == 0x07 ? "off" : led_color1 == 0x06 ? "green" : led_color1 == 0x05 ? "red" : led_color1 == 0x04 ? - "yellow" : led_color1 == 0x03 ? "blue" : led_color1 == 0x02 ? "cyan" : led_color1 == 0x01 ? "magenta" : "white"); + led_color1 == 0x03 ? "off" : led_color1 == 0x02 ? "green" : led_color1 == 0x01 ? "amber" : "both", + led_color2 == 0x03 ? "off" : led_color2 == 0x02 ? "green" : led_color2 == 0x01 ? "amber" : "both"); } -static ssize_t port_led_color_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t port_led_color_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { int status; __u8 led_color; if (sysfs_streq(buf, "off")) { - led_color = 0x07; - } else if (sysfs_streq(buf, "green")) { - led_color = 0x06; - } else if (sysfs_streq(buf, "red")) { - led_color = 0x05; - } else if (sysfs_streq(buf, "yellow")) { - led_color = 0x04; - } else if (sysfs_streq(buf, "blue")) { led_color = 0x03; - } else if (sysfs_streq(buf, "cyan")) { + } else if (sysfs_streq(buf, "green")) { led_color = 0x02; - } else if (sysfs_streq(buf, "magenta")) { + } else if (sysfs_streq(buf, "amber")) { led_color = 0x01; - } else if (sysfs_streq(buf, "white")) { + } else if (sysfs_streq(buf, "both")) { led_color = 0x00; } else { status = -EINVAL; return status; } - status = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, - I2C_SMBUS_WRITE, 0x0A, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color); - status = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, - I2C_SMBUS_WRITE, 0x0A, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color); - return size; + status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, + I2C_SMBUS_WRITE, 0x0A, I2C_SMBUS_BYTE_DATA, + (union i2c_smbus_data*)&led_color); + status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, + I2C_SMBUS_WRITE, 0x0A, I2C_SMBUS_BYTE_DATA, + (union i2c_smbus_data*)&led_color); + return count; } DEVICE_ATTR_RW(port_led_color); @@ -1084,7 +1303,7 @@ static struct attribute_group sff_led_test_grp = { .attrs = sff_led_test, }; -static struct device * silverstone_sff_init(int portid) { +static struct device * ds3000_sff_init(int portid) { struct sff_device_data *new_data; struct device *new_device; @@ -1096,7 +1315,9 @@ static struct device * silverstone_sff_init(int portid) { /* The QSFP port ID start from 1 */ new_data->portid = portid + 1; new_data->port_type = fpga_i2c_bus_dev[portid].port_type; - new_device = device_create_with_groups(fpgafwclass, sff_dev, MKDEV(0, 0), new_data, sff_attr_grps, "%s", fpga_i2c_bus_dev[portid].calling_name); + new_device = device_create_with_groups(fpgafwclass, sff_dev, + MKDEV(0, 0), new_data, sff_attr_grps, "%s", + fpga_i2c_bus_dev[portid].calling_name); if (IS_ERR(new_device)) { printk(KERN_ALERT "Cannot create sff device @port%d", portid); kfree(new_data); @@ -1195,37 +1416,34 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, struct i2c_dev_data *dev_data; void __iomem *pci_bar; unsigned int portid, master_bus; + unsigned int REG_FDR0; unsigned int REG_CR0; unsigned int REG_SR0; unsigned int REG_DR0; unsigned int REG_ID0; + REG_FDR0 = 0; + REG_CR0 = 0; + REG_SR0 = 0; + REG_DR0 = 0; + REG_ID0 = 0; + /* Write the command register */ dev_data = i2c_get_adapdata(adapter); portid = dev_data->portid; pci_bar = fpga_dev.data_base_addr; - master_bus = dev_data->pca9548.master_bus; - REG_FDR0 = I2C_MASTER_FREQ_1 + (master_bus - 1) * 0x0100; - REG_CR0 = I2C_MASTER_CTRL_1 + (master_bus - 1) * 0x0100; - REG_SR0 = I2C_MASTER_STATUS_1 + (master_bus - 1) * 0x0100; - REG_DR0 = I2C_MASTER_DATA_1 + (master_bus - 1) * 0x0100; - REG_ID0 = I2C_MASTER_PORT_ID_1 + (master_bus - 1) * 0x0100; - - if (master_bus < I2C_MASTER_CH_1 || master_bus > I2C_MASTER_CH_TOTAL) { - error = -EINVAL; - goto Done; - } #ifdef DEBUG_KERN - printk(KERN_INFO "portid %2d|@ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-10s|CMD %2.2X " + printk(KERN_INFO "portid %2d|@ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-15s|CMD %2.2X " , portid, addr, flags, rw, rw == 1 ? "READ " : "WRITE" , size, size == 0 ? "QUICK" : size == 1 ? "BYTE" : size == 2 ? "BYTE_DATA" : size == 3 ? "WORD_DATA" : size == 4 ? "PROC_CALL" : - size == 5 ? "BLOCK_DATA" : "ERROR" + size == 5 ? "BLOCK_DATA" : + size == 8 ? "I2C_BLOCK_DATA" : "ERROR" , cmd); #endif /* Map the size to what the chip understands */ @@ -1235,6 +1453,7 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, case I2C_SMBUS_BYTE_DATA: case I2C_SMBUS_WORD_DATA: case I2C_SMBUS_BLOCK_DATA: + case I2C_SMBUS_I2C_BLOCK_DATA: break; default: printk(KERN_INFO "Unsupported transaction %d\n", size); @@ -1242,12 +1461,27 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, goto Done; } + master_bus = dev_data->pca9548.master_bus; + + if (master_bus < I2C_MASTER_CH_1 || master_bus > I2C_MASTER_CH_TOTAL) { + error = -ENXIO; + goto Done; + } + + REG_FDR0 = I2C_MASTER_FREQ_1 + (master_bus - 1) * 0x0100; + REG_CR0 = I2C_MASTER_CTRL_1 + (master_bus - 1) * 0x0100; + REG_SR0 = I2C_MASTER_STATUS_1 + (master_bus - 1) * 0x0100; + REG_DR0 = I2C_MASTER_DATA_1 + (master_bus - 1) * 0x0100; + REG_ID0 = I2C_MASTER_PORT_ID_1 + (master_bus - 1) * 0x0100; + iowrite8(portid, pci_bar + REG_ID0); ////[S][ADDR/R] - //Clear status register + // Clear status register iowrite8(0, pci_bar + REG_SR0); - iowrite8(1 << I2C_CR_BIT_MIEN | 1 << I2C_CR_BIT_MTX | 1 << I2C_CR_BIT_MSTA , pci_bar + REG_CR0); + iowrite8(1 << I2C_CR_BIT_MIEN | + 1 << I2C_CR_BIT_MTX | + 1 << I2C_CR_BIT_MSTA , pci_bar + REG_CR0); SET_REG_BIT_H(pci_bar + REG_CR0, I2C_CR_BIT_MEN); if (rw == I2C_SMBUS_READ && @@ -1274,9 +1508,10 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, if (size == I2C_SMBUS_BYTE_DATA || size == I2C_SMBUS_WORD_DATA || size == I2C_SMBUS_BLOCK_DATA || + size == I2C_SMBUS_I2C_BLOCK_DATA || (size == I2C_SMBUS_BYTE && rw == I2C_SMBUS_WRITE)) { - //sent command code to data register + // sent command code to data register iowrite8(cmd, pci_bar + REG_DR0); info( "MS Send CMD 0x%2.2X", cmd); @@ -1294,14 +1529,15 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, case I2C_SMBUS_WORD_DATA: cnt = 2; break; case I2C_SMBUS_BLOCK_DATA: - // in block data mode keep number of byte in block[0] + case I2C_SMBUS_I2C_BLOCK_DATA: + /* In block data modes keep number of byte in block[0] */ cnt = data->block[0]; break; default: cnt = 0; break; } - // [CNT] used only bloack data write + // [CNT] used only block data write if (size == I2C_SMBUS_BLOCK_DATA && rw == I2C_SMBUS_WRITE) { iowrite8(cnt, pci_bar + REG_DR0); @@ -1320,11 +1556,12 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, size == I2C_SMBUS_BYTE || size == I2C_SMBUS_BYTE_DATA || size == I2C_SMBUS_WORD_DATA || - size == I2C_SMBUS_BLOCK_DATA + size == I2C_SMBUS_BLOCK_DATA || + size == I2C_SMBUS_I2C_BLOCK_DATA )) { - int bid = 0; + bid = 0; info( "MS prepare to sent [%d bytes]", cnt); - if (size == I2C_SMBUS_BLOCK_DATA ) { + if (size == I2C_SMBUS_BLOCK_DATA || size == I2C_SMBUS_I2C_BLOCK_DATA) { bid = 1; // block[0] is cnt; cnt += 1; // offset from block[0] } @@ -1338,13 +1575,15 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, goto Done; } } + } - //REPEATE START + // REPEATE START if ( rw == I2C_SMBUS_READ && ( size == I2C_SMBUS_BYTE_DATA || size == I2C_SMBUS_WORD_DATA || - size == I2C_SMBUS_BLOCK_DATA + size == I2C_SMBUS_BLOCK_DATA || + size == I2C_SMBUS_I2C_BLOCK_DATA )) { info( "MS Repeated Start"); @@ -1370,7 +1609,8 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, size == I2C_SMBUS_BYTE || size == I2C_SMBUS_BYTE_DATA || size == I2C_SMBUS_WORD_DATA || - size == I2C_SMBUS_BLOCK_DATA + size == I2C_SMBUS_BLOCK_DATA || + size == I2C_SMBUS_I2C_BLOCK_DATA )) { switch (size) { @@ -1380,12 +1620,15 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, case I2C_SMBUS_WORD_DATA: cnt = 2; break; case I2C_SMBUS_BLOCK_DATA: - //will be changed after recived first data + // will be changed after recived first data cnt = 3; break; + case I2C_SMBUS_I2C_BLOCK_DATA: + cnt = data->block[0]; break; default: cnt = 0; break; } + bid = 0; info( "MS Receive"); //set to Receive mode @@ -1395,7 +1638,7 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, for (bid = -1; bid < cnt; bid++) { - // Wait {A} + // Wait for byte transfer error = i2c_wait_ack(adapter, 12, 0); if (error < 0) { goto Done; @@ -1415,8 +1658,12 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, info ( "SET STOP in read loop"); SET_REG_BIT_L(pci_bar + REG_CR0, I2C_CR_BIT_MSTA); } - data->block[bid] = ioread8(pci_bar + REG_DR0); - + if (size == I2C_SMBUS_I2C_BLOCK_DATA) { + // block[0] is read length + data->block[bid + 1] = ioread8(pci_bar + REG_DR0); + } else { + data->block[bid] = ioread8(pci_bar + REG_DR0); + } info( "DATA IN [%d] %2.2X", bid, data->block[bid]); if (size == I2C_SMBUS_BLOCK_DATA && bid == 0) { @@ -1426,9 +1673,8 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, } } - //[P] + // [P] SET_REG_BIT_L(pci_bar + REG_CR0, I2C_CR_BIT_MSTA); - i2c_wait_ack(adapter, 12, 0); info( "MS STOP"); Done: @@ -1481,28 +1727,38 @@ static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr, if ( prev_switch != switch_addr && prev_switch != 0 ) { // reset prev_port PCA9548 chip retry = 3; - while(retry--){ - error = smbus_access(adapter, (u16)(prev_switch), flags, I2C_SMBUS_WRITE, 0x00, I2C_SMBUS_BYTE, NULL); - if(error >= 0){ + while (retry--) { + error = smbus_access(adapter, (u16)(prev_switch), flags, + I2C_SMBUS_WRITE, 0x00, + I2C_SMBUS_BYTE, NULL); + if (error >= 0) { break; - }else{ - dev_dbg(&adapter->dev,"Failed to deselect ch %d of 0x%x, CODE %d\n", prev_ch, prev_switch, error); + } else { + dev_dbg(&adapter->dev, + "Failed to deselect ch %d of 0x%x, CODE %d\n", + prev_ch, prev_switch, error); } } - if(retry == 0) + if (retry < 0) { goto release_unlock; + } // set PCA9548 to current channel retry = 3; - while(retry--){ - error = smbus_access(adapter, switch_addr, flags, I2C_SMBUS_WRITE, 1 << channel, I2C_SMBUS_BYTE, NULL); - if(error >= 0){ + while (retry--) { + error = smbus_access(adapter, switch_addr, flags, + I2C_SMBUS_WRITE, 1 << channel, + I2C_SMBUS_BYTE, NULL); + if (error >= 0) { break; - }else{ - dev_dbg(&adapter->dev,"Failed to select ch %d of 0x%x, CODE %d\n", channel, switch_addr, error); + } else { + dev_dbg(&adapter->dev, + "Failed to deselect ch %d of 0x%x, CODE %d\n", + prev_ch, prev_switch, error); } } - if(retry == 0) + if (retry < 0) { goto release_unlock; + } // update lasted port fpga_i2c_lasted_access_port[master_bus - 1] = switch_addr << 8 | channel; @@ -1511,16 +1767,21 @@ static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr, if ( prev_ch != channel || prev_switch == 0 ) { // set new PCA9548 at switch_addr to current retry = 3; - while(retry--){ - error = smbus_access(adapter, switch_addr, flags, I2C_SMBUS_WRITE, 1 << channel, I2C_SMBUS_BYTE, NULL); - if(error >= 0){ + while (retry--) { + error = smbus_access(adapter, switch_addr, flags, + I2C_SMBUS_WRITE, 1 << channel, + I2C_SMBUS_BYTE, NULL); + if (error >= 0) { break; - }else{ - dev_dbg(&adapter->dev,"Failed to select ch %d of 0x%x, CODE %d\n", channel, switch_addr, error); + } else { + dev_dbg(&adapter->dev, + "Failed to deselect ch %d of 0x%x, CODE %d\n", + prev_ch, prev_switch, error); } } - if(retry == 0) + if (retry < 0) { goto release_unlock; + } // update lasted port fpga_i2c_lasted_access_port[master_bus - 1] = switch_addr << 8 | channel; } @@ -1529,22 +1790,24 @@ static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr, // Do SMBus communication error = smbus_access(adapter, addr, flags, rw, cmd, size, data); - if(error < 0){ - dev_dbg( &adapter->dev,"smbus_xfer failed (%d) @ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-10s|CMD %2.2X " - , error, addr, flags, rw, rw == 1 ? "READ " : "WRITE" - , size, size == 0 ? "QUICK" : - size == 1 ? "BYTE" : - size == 2 ? "BYTE_DATA" : - size == 3 ? "WORD_DATA" : - size == 4 ? "PROC_CALL" : - size == 5 ? "BLOCK_DATA" : - size == 8 ? "I2C_BLOCK_DATA" : "ERROR" - , cmd); + if (error < 0) { + dev_dbg( &adapter->dev, + "smbus_xfer failed (%d) @ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-10s|CMD %2.2X " + , error, addr, flags, rw, rw == 1 ? "READ " : "WRITE" + , size, size == 0 ? "QUICK" : + size == 1 ? "BYTE" : + size == 2 ? "BYTE_DATA" : + size == 3 ? "WORD_DATA" : + size == 4 ? "PROC_CALL" : + size == 5 ? "BLOCK_DATA" : + size == 8 ? "I2C_BLOCK_DATA" : "ERROR" + , cmd); } release_unlock: mutex_unlock(&fpga_i2c_master_locks[master_bus - 1]); - dev_dbg(&adapter->dev,"switch ch %d of 0x%x -> ch %d of 0x%x\n", prev_ch, prev_switch, channel, switch_addr); + dev_dbg(&adapter->dev, "switch ch %d of 0x%x -> ch %d of 0x%x\n", + prev_ch, prev_switch, channel, switch_addr); return error; } @@ -1559,10 +1822,11 @@ static u32 fpga_i2c_func(struct i2c_adapter *a) I2C_FUNC_SMBUS_BYTE | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | - I2C_FUNC_SMBUS_BLOCK_DATA; + I2C_FUNC_SMBUS_BLOCK_DATA | + I2C_FUNC_SMBUS_I2C_BLOCK; } -static const struct i2c_algorithm silverstone_i2c_algorithm = { +static const struct i2c_algorithm ds3000_i2c_algorithm = { .smbus_xfer = fpga_i2c_access, .functionality = fpga_i2c_func, }; @@ -1577,23 +1841,24 @@ static const struct i2c_algorithm silverstone_i2c_algorithm = { * When bus_number_offset is -1, created adapter with dynamic bus number. * Otherwise create adapter at i2c bus = bus_number_offset + portid. */ -static struct i2c_adapter * silverstone_i2c_init(struct platform_device *pdev, int portid, int bus_number_offset) +static struct i2c_adapter * ds3000_i2c_init(struct platform_device *pdev, + int portid, int bus_number_offset) { int error; - struct i2c_adapter *new_adapter; struct i2c_dev_data *new_data; void __iomem *i2c_freq_base_reg; new_adapter = kzalloc(sizeof(*new_adapter), GFP_KERNEL); if (!new_adapter) { - printk(KERN_ALERT "Cannot alloc i2c adapter for %s", fpga_i2c_bus_dev[portid].calling_name); + printk(KERN_ALERT "Cannot alloc i2c adapter for %s", + fpga_i2c_bus_dev[portid].calling_name); return NULL; } new_adapter->owner = THIS_MODULE; new_adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; - new_adapter->algo = &silverstone_i2c_algorithm; + new_adapter->algo = &ds3000_i2c_algorithm; /* If the bus offset is -1, use dynamic bus number */ if (bus_number_offset == -1) { new_adapter->nr = -1; @@ -1603,7 +1868,8 @@ static struct i2c_adapter * silverstone_i2c_init(struct platform_device *pdev, i new_data = kzalloc(sizeof(*new_data), GFP_KERNEL); if (!new_data) { - printk(KERN_ALERT "Cannot alloc i2c data for %s", fpga_i2c_bus_dev[portid].calling_name); + printk(KERN_ALERT "Cannot alloc i2c data for %s", + fpga_i2c_bus_dev[portid].calling_name); kfree_sensitive(new_adapter); return NULL; } @@ -1631,32 +1897,16 @@ static struct i2c_adapter * silverstone_i2c_init(struct platform_device *pdev, i return new_adapter; }; -static void silverstone_dev_release( struct device * dev) -{ - return; -} - -static struct platform_device silverstone_dev = { - .name = DRIVER_NAME, - .id = -1, - .num_resources = 0, - .resource = NULL, - .dev = { - .release = silverstone_dev_release, - } -}; - /** * Board info for QSFP/SFP+ eeprom. - * Note: Using OOM optoe as I2C eeprom driver. - * https://www.opencompute.org/wiki/Networking/SpecsAndDesigns#Open_Optical_Monitoring + * Note: Using sff8436 as I2C eeprom driver. */ static struct i2c_board_info sff8436_eeprom_info[] = { - { I2C_BOARD_INFO("optoe1", 0x50) }, //For QSFP w/ sff8436 - { I2C_BOARD_INFO("optoe2", 0x50) }, //For SFP+ w/ sff8472 + { I2C_BOARD_INFO("optoe1", 0x50) }, + { I2C_BOARD_INFO("optoe2", 0x50) }, }; -static int silverstone_drv_probe(struct platform_device *pdev) +static int ds3000_drv_probe(struct platform_device *pdev) { int ret = 0; int portid_count; @@ -1667,7 +1917,7 @@ static int silverstone_drv_probe(struct platform_device *pdev) /* The device class need to be instantiated before this function called */ BUG_ON(fpgafwclass == NULL); - fpga_data = devm_kzalloc(&pdev->dev, sizeof(struct silverstone_fpga_data), + fpga_data = devm_kzalloc(&pdev->dev, sizeof(struct ds3000_fpga_data), GFP_KERNEL); if (!fpga_data) @@ -1679,6 +1929,7 @@ static int silverstone_drv_probe(struct platform_device *pdev) fpga_data->cpld2_read_addr = 0x00; mutex_init(&fpga_data->fpga_lock); + for (ret = I2C_MASTER_CH_1 ; ret <= I2C_MASTER_CH_TOTAL; ret++) { mutex_init(&fpga_i2c_master_locks[ret - 1]); } @@ -1777,14 +2028,15 @@ static int silverstone_drv_probe(struct platform_device *pdev) } for (portid_count = 0 ; portid_count < VIRTUAL_I2C_PORT_LENGTH ; portid_count++) { - fpga_data->i2c_adapter[portid_count] = silverstone_i2c_init(pdev, portid_count, VIRTUAL_I2C_BUS_OFFSET); + fpga_data->i2c_adapter[portid_count] = ds3000_i2c_init(pdev, portid_count, VIRTUAL_I2C_BUS_OFFSET); } + /* Init SFF devices */ for (portid_count = 0; portid_count < SFF_PORT_TOTAL; portid_count++) { struct i2c_adapter *i2c_adap = fpga_data->i2c_adapter[portid_count]; if (i2c_adap) { - fpga_data->sff_devices[portid_count] = silverstone_sff_init(portid_count); + fpga_data->sff_devices[portid_count] = ds3000_sff_init(portid_count); sff_data = dev_get_drvdata(fpga_data->sff_devices[portid_count]); BUG_ON(sff_data == NULL); if ( sff_data->port_type == QSFP ) { @@ -1797,19 +2049,21 @@ static int silverstone_drv_probe(struct platform_device *pdev) &fpga_data->sff_i2c_clients[portid_count]->dev.kobj, "i2c"); } + } + printk(KERN_INFO "Virtual I2C buses created\n"); + #ifdef TEST_MODE return 0; #endif - fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, + fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x00, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&cpld1_version); - fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, + fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x00, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&cpld2_version); - printk(KERN_INFO "Switch CPLD1 VERSION: %2.2x\n", cpld1_version); - printk(KERN_INFO "Switch CPLD2 VERSION: %2.2x\n", cpld2_version); - + printk(KERN_INFO "CPLD1 VERSON: %2.2x\n", cpld1_version); + printk(KERN_INFO "CPLD2 VERSON: %2.2x\n", cpld2_version); /* Init I2C buses that has PCA9548 switch device. */ for (portid_count = 0; portid_count < VIRTUAL_I2C_PORT_LENGTH; portid_count++) { @@ -1826,7 +2080,8 @@ static int silverstone_drv_probe(struct platform_device *pdev) if (prev_i2c_switch != ( (master_bus << 8) | switch_addr) ) { // Found the bus with PCA9548, trying to clear all switch in it. - smbus_access(fpga_data->i2c_adapter[portid_count], switch_addr, 0x00, I2C_SMBUS_WRITE, 0x00, I2C_SMBUS_BYTE, NULL); + smbus_access(fpga_data->i2c_adapter[portid_count], switch_addr, 0x00, + I2C_SMBUS_WRITE, 0x00, I2C_SMBUS_BYTE, NULL); prev_i2c_switch = ( master_bus << 8 ) | switch_addr; } } @@ -1834,7 +2089,7 @@ static int silverstone_drv_probe(struct platform_device *pdev) return 0; } -static int silverstone_drv_remove(struct platform_device *pdev) +static int ds3000_drv_remove(struct platform_device *pdev) { int portid_count; struct sff_device_data *rem_data; @@ -1872,20 +2127,20 @@ static int silverstone_drv_remove(struct platform_device *pdev) return 0; } +static struct platform_driver ds3000_drv = { + .probe = ds3000_drv_probe, + .remove = __exit_p(ds3000_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + #ifdef TEST_MODE #define FPGA_PCI_BAR_NUM 2 #else #define FPGA_PCI_BAR_NUM 0 #endif -static struct platform_driver silverstone_drv = { - .probe = silverstone_drv_probe, - .remove = __exit_p(silverstone_drv_remove), - .driver = { - .name = DRIVER_NAME, - }, -}; - static const struct pci_device_id fpga_id_table[] = { { PCI_VDEVICE(XILINX, FPGA_PCIE_DEVICE_ID) }, { PCI_VDEVICE(TEST, TEST_PCIE_DEVICE_ID) }, @@ -1934,11 +2189,15 @@ static int fpga_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) printk(KERN_INFO ""); fpga_version = ioread32(fpga_dev.data_base_addr); printk(KERN_INFO "FPGA VERSION : %8.8x\n", fpga_version); - fpgafw_init(); - platform_device_register(&silverstone_dev); - platform_driver_register(&silverstone_drv); + if ((err = fpgafw_init()) < 0) { + goto pci_unmap; + } + ds3000_dev = platform_device_register_simple(DRIVER_NAME, -1, NULL, 0); + platform_driver_register(&ds3000_drv); return 0; +pci_unmap: + pci_iounmap(pdev, fpga_dev.data_base_addr); pci_release: pci_release_regions(pdev); pci_disable: @@ -1948,8 +2207,8 @@ static int fpga_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) static void fpga_pci_remove(struct pci_dev *pdev) { - platform_driver_unregister(&silverstone_drv); - platform_device_unregister(&silverstone_dev); + platform_driver_unregister(&ds3000_drv); + platform_device_unregister(ds3000_dev); fpgafw_exit(); pci_iounmap(pdev, fpga_dev.data_base_addr); pci_release_regions(pdev); @@ -1974,7 +2233,8 @@ struct fpga_reg_data { uint32_t value; }; -static long fpgafw_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { +static long fpgafw_unlocked_ioctl(struct file *file, unsigned int cmd, + unsigned long arg) { int ret = 0; struct fpga_reg_data data; mutex_lock(&fpga_data->fpga_lock); @@ -2065,25 +2325,24 @@ static int fpgafw_init(void) { // Register the device driver fpgafwdev = device_create(fpgafwclass, NULL, MKDEV(majorNumber, 0), NULL, DEVICE_NAME); - if (IS_ERR(fpgafwdev)) { // Clean up if there is an error + if (IS_ERR(fpgafwdev)) { // Clean up if there is an error class_destroy(fpgafwclass); // Repeated code but the alternative is goto statements unregister_chrdev(majorNumber, DEVICE_NAME); printk(KERN_ALERT "Failed to create the FW upgrade device node\n"); return PTR_ERR(fpgafwdev); } - printk(KERN_INFO "FPGA fw upgrade device node created correctly\n"); + printk(KERN_INFO "FPGA fw upgrade device node created correctly\n"); // Made it! device was initialized return 0; } static void fpgafw_exit(void) { device_destroy(fpgafwclass, MKDEV(majorNumber, 0)); // remove the device - class_unregister(fpgafwclass); // unregister the device class class_destroy(fpgafwclass); // remove the device class unregister_chrdev(majorNumber, DEVICE_NAME); // unregister the major number printk(KERN_INFO "Goodbye!\n"); } -int silverstone_init(void) +int ds3000_init(void) { int rc; rc = pci_register_driver(&pci_dev_ops); @@ -2092,15 +2351,15 @@ int silverstone_init(void) return 0; } -void silverstone_exit(void) +void ds3000_exit(void) { pci_unregister_driver(&pci_dev_ops); } -module_init(silverstone_init); -module_exit(silverstone_exit); +module_init(ds3000_init); +module_exit(ds3000_exit); -MODULE_AUTHOR("Celestica Inc."); -MODULE_DESCRIPTION("Celestica Silverstone platform driver"); +MODULE_AUTHOR("Pradchaya P. "); +MODULE_DESCRIPTION("Celestica ds3000 switchboard driver"); MODULE_VERSION(MOD_VERSION); MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/setup.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/setup.py new file mode 100644 index 000000000000..02fcfff6aea1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/setup.py @@ -0,0 +1,28 @@ +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on Celestica Platforms based on PDDF', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.9', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/__init__.py new file mode 100644 index 000000000000..21d9cd445e31 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal"] +from . import platform +from . import chassis diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/chassis.py new file mode 100644 index 000000000000..00fe4a2457a2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/chassis.py @@ -0,0 +1,295 @@ +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import os + import re + import shutil + import subprocess + from . import component + from .event import XcvrEvent + from .helper import APIHelper + from .thermal import ThermalMon, THERMAL_MONITOR_SENSORS + from sonic_py_common import logger + from sonic_platform_pddf_base.pddf_chassis import PddfChassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +RESET_SOURCE_OS_REG = '0xa106' +LPC_SYSLED_REG = '0xa162' +LPC_GETREG_PATH = "/sys/bus/platform/devices/baseboard/getreg" +LPC_SETREG_PATH = "/sys/bus/platform/devices/baseboard/setreg" +LED_CTRL_MODE_GET_CMD = "ipmitool raw 0x3a 0x42 0x01" + +ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt" + +SYSLOG_IDENTIFIER = "Chassis" +helper_logger = logger.Logger(SYSLOG_IDENTIFIER) + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + SYSLED_COLOR_VAL_MAP = { + 'off': '0xff', + 'green': '0xdc', + 'amber': '0xec', + 'amber_blink': '0xee', + 'amber_blink_4hz': '0xee', + 'amber_blink_1hz': '0xed', + 'green_blink': '0xde', + 'green_blink_4hz': '0xde', + 'green_blink_1hz': '0xdd' + } + + SYSLED_VAL_COLOR_MAP = { + '0xff': 'off', + '0xdc': 'green', + '0xec': 'amber', + '0xee': 'amber_blink_4hz', + '0xed': 'amber_blink_1hz', + '0xde': 'green_blink_4hz', + '0xdd': 'green_blink_1hz' + } + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._api_helper = APIHelper() + + for index in range(self.platform_inventory['num_components']): + component_obj = component.Component(index) + self._component_list.append(component_obj) + + if not self._api_helper.is_bmc_present(): + thermal_count = len(self._thermal_list) + for idx, name in enumerate(THERMAL_MONITOR_SENSORS): + thermal = ThermalMon(thermal_count + idx, name) + self._thermal_list.append(thermal) + + def initizalize_system_led(self): + """ + This function is not defined in chassis base class, + system-health command would invoke chassis.initizalize_system_led(), + add this stub function just to let the command sucessfully execute + """ + pass + + def get_status_led(self): + """ + Gets the state of the system LED + Args: + None + Returns: + A string, one of the valid LED color strings which could be vendor + specified. + """ + led_status = self._api_helper.lpc_getreg(LPC_GETREG_PATH, LPC_SYSLED_REG) + color = self.SYSLED_VAL_COLOR_MAP.get(led_status, 'unknown') + return color + + def set_status_led(self, color): + """ + Sets the state of the system LED + Args: + color: A string representing the color with which to set the + system LED + Returns: + bool: True if system LED state is set successfully, False if not + """ + if self._api_helper.is_bmc_present(): + led_mode_cmd = LED_CTRL_MODE_GET_CMD + if os.getuid() != 0: + cmd = "sudo " + cmd + led_mode_cmd = "sudo " + led_mode_cmd + status, mode = self._api_helper.get_cmd_output(led_mode_cmd) + # led take automatic control mode, led not settable + if status != 0 or mode.strip() == "01": + helper_logger.log_info("SYS LED takes automatic ctrl mode!") + return False + + # Set SYS_LED through baseboard cpld + color_val = self.SYSLED_COLOR_VAL_MAP.get(color, None) + if color_val == None: + helper_logger.log_error("SYS LED color {} not support!".format(color)) + return False + + status = self._api_helper.lpc_setreg(LPC_SETREG_PATH, LPC_SYSLED_REG, color_val) + + return status + + def get_sfp(self, index): + """ + Retrieves sfp represented by (1-based) index + For Quanta the index in sfputil.py starts from 1, so override + Args: + index: An integer, the index (1-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 1. + Returns: + An object dervied from SfpBase representing the specified sfp + """ + sfp = None + + try: + if (index == 0): + raise IndexError + sfp = self._sfp_list[index-1] + except IndexError: + sys.stderr.write("override: SFP index {} out of range (1-{})\n".format( + index, len(self._sfp_list))) + + return sfp + # Provide the functions/variables below for which implementation is to be overwritten + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + hw_reboot_cause = self._api_helper.lpc_getreg(LPC_GETREG_PATH, RESET_SOURCE_OS_REG) + + if hw_reboot_cause == "0x33" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE): + with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file: + reboot_info = hw_cause_file.readline().rstrip('\n') + match = re.search(r'Reason:(.*),Time:(.*)', reboot_info) + description = 'CPU cold reset' + if match is not None: + if match.group(1) == 'system': + return (self.REBOOT_CAUSE_NON_HARDWARE, 'System cold reboot') + elif hw_reboot_cause == "0x99": + reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC + description = 'ASIC Overload Reboot' + elif hw_reboot_cause == "0x88": + reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_CPU + description = 'CPU Overload Reboot' + elif hw_reboot_cause == "0x66": + reboot_cause = self.REBOOT_CAUSE_WATCHDOG + description = 'Hardware Watchdog Reset' + elif hw_reboot_cause == "0x55": + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'CPU Cold Reset' + elif hw_reboot_cause == "0x44": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'CPU Warm Reset' + elif hw_reboot_cause == "0x33": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'Soft-Set Cold Reset' + elif hw_reboot_cause == "0x22": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'Soft-Set Warm Reset' + elif hw_reboot_cause == "0x11": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + description = 'Power Off Reset' + elif hw_reboot_cause == "0x00": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + description = 'Power Cycle Reset' + else: + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Hardware reason' + + return (reboot_cause, description) + + def get_watchdog(self): + """ + Retreives hardware watchdog device on this chassis + + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + """ + try: + if self._watchdog is None: + from sonic_platform.cpld_watchdog import Watchdog + # Create the watchdog Instance from cpld watchdog + self._watchdog = Watchdog() + + except Exception as e: + helper_logger.log_error("Fail to load watchdog due to {}".format(e)) + return self._watchdog + + ############################################################## + ###################### Event methods ######################### + ############################################################## + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - True if call successful, False if not; + - A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, + where device_id is the device ID for this device and + device_event, + status='1' represents device inserted, + status='0' represents device removed. + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0'}} + indicates that fan 0 has been removed, fan 2 + has been inserted and sfp 11 has been removed. + """ + # SFP event + if self.get_num_sfps() == 0: + for index in range(self.platform_inventory['num_ports']): + sfp = Sfp(index, self.pddf_obj, self.plugin_data) + self._sfp_list.append(sfp) + + succeed, sfp_event = XcvrEvent(self._sfp_list).get_xcvr_event(timeout) + if succeed: + return True, {'sfp': sfp_event} + + return False, {'sfp': {}} + + def get_serial(self): + """ + Retrieves the serial number of the chassis (Service tag) + Returns: + string: Serial number of chassis + """ + return self._eeprom.serial_number_str() + + def get_revision(self): + """ + Retrieves the hardware revision for the chassis + Returns: + A string containing the hardware revision for this chassis. + """ + return self._eeprom.revision_str() + + def get_system_airflow(self): + """ + Retrieve system airflow + Returns: + string: INTAKE or EXHAUST + """ + airflow = self.get_serial()[5:8] + if airflow == "B2F": + return "INTAKE" + elif airflow == "F2B": + return "EXHAUST" + return "Unknown" + + def get_thermal_manager(self): + """ + Retrieves thermal manager class on this chasssis + + Returns: + A class derived from ThermalManagerBase representing the + specified thermal manager + """ + if not self._api_helper.is_bmc_present(): + from .thermal_manager import ThermalManager + return ThermalManager + return None diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/component.py new file mode 100644 index 000000000000..d6abdeb8c968 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/component.py @@ -0,0 +1,321 @@ +try: + import re + import subprocess + from .helper import APIHelper + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +BMC_EXIST =APIHelper().is_bmc_present() +FPGA_VERSION_PATH = "/sys/bus/platform/devices/fpga_sysfs/version" +Bios_Version_Cmd = "dmidecode -t bios | grep Version" + +BIOS_VERSION_CMD = "dmidecode -s bios-version" +ONIE_VERSION_CMD = "cat /host/machine.conf" +SWCPLD1_VERSION_CMD = "i2cget -y -f 102 0x30 0x0 | tr a-z A-Z | cut -d 'X' -f 2" +SWCPLD2_VERSION_CMD = "i2cget -y -f 102 0x31 0x0 | tr a-z A-Z | cut -d 'X' -f 2" +BASECPLD_VERSION_CMD = "cat /sys/devices/platform/baseboard/version | tr a-z A-Z | cut -d 'X' -f 2" +COME_CPLD_VERSION_CMD = "cat /sys/devices/platform/baseboard/come_cpld_version | tr a-z A-Z | cut -d 'X' -f 2" +SSD_VERSION_CMD = "smartctl -i /dev/sda" +ASIC_PCIE_VERSION_CMD = "bcmcmd 'pciephy fw version' | grep 'PCIe FW version' | cut -d ' ' -f 4" + + +COMPONENT_NAME_LIST = ["BIOS", "ONIE", "BMC", "FPGA", "CPLD COMe", "CPLD BASE", + "CPLD SW1", "CPLD SW2", "ASIC PCIe", "SSD"] +COMPONENT_DES_LIST = ["Basic input/output System", + "Open Network Install Environment", + "Baseboard Management Controller", + "FPGA for transceiver EEPROM access and other component I2C access", + "COMe board CPLD", + "CPLD for board functions, fan control and watchdog", + "CPLD for port control QSFP(1-16)", + "CPLD for port control QSFP(17-32), SFP(33)", + "ASIC PCIe Firmware", + "Solid State Drive - {}"] + +UNKNOWN_VER = "Unknown" + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + ComponentBase.__init__(self) + self.index = component_index + self.helper = APIHelper() + self.name = self.get_name() + + def get_firmware_version(self): + """ + Retrieves the available firmware version of the component + + Note: the firmware version will be read from image + + Args: + image_path: A string, path to firmware image + + Returns: + A string containing the available firmware version of the component + """ + fw_version_info = { + "ONIE": self.__get_onie_ver(), + "SSD": self.__get_ssd_ver(), + "BIOS": self.__get_bios_ver(), + "FPGA": self.__get_fpga_version(), + "ASIC PCIe": self.__get_asic_pcie_ver(), + } + fw_version_info.update(self.__get_cpld_ver()) + if self.__get_bmc_presence(): + fw_version_info.update(self.__get_bmc_ver()) + return fw_version_info.get(self.name, UNKNOWN_VER) + + def get_firmware_update_notification(self, image_path): + """ + Retrieves a notification on what should be done in order to complete + the component firmware update + + Args: + image_path: A string, path to firmware image + + Returns: + A string containing the component firmware update notification if required. + By default 'None' value will be used, which indicates that no actions are required + """ + type = self.get_type() + if type == 'bios': + return "BIOS will be updated, please wait for completion and reboot the device to take effect!" + elif type == 'cpld' or type == 'fpga': + return "{} will be updated, please wait for completion and power reboot device to take effect!".format(type.upper()) + elif type == 'bmc': + return "BMC image will be updated, please wait for completion!" + return None + + def install_firmware(self, image_path): + """ + Installs firmware to the component + + This API performs firmware installation only: this may/may not be the same as firmware update. + In case platform component requires some extra steps (apart from calling Low Level Utility) + to load the installed firmware (e.g, reboot, power cycle, etc.) - this must be done manually by user + + Note: in case immediate actions are required to complete the component firmware update + (e.g., reboot, power cycle, etc.) - will be done automatically by API and no return value provided + + Args: + image_path: A string, path to firmware image + + Returns: + A boolean, True if install was successful, False if not + """ + #if self.component_data == None: + self.component_data = self._get_component_data() + pre_cmd = self.component_data['pre-update'] + update_cmd = self.component_data['update'] + post_cmd = self.component_data['post-update'] + if pre_cmd != None: + status, _ = self._api_helper.get_cmd_output(pre_cmd) + if status != 0: + return False + if update_cmd != None: + update_cmd = update_cmd.format(image_path) + status, _ = self._api_helper.get_cmd_output(update_cmd) + if status != 0: + return False + if post_cmd != None: + status, _ = self._api_helper.get_cmd_output(post_cmd) + if status != 0: + return False + + return True + + def update_firmware(self, image_path): + """ + Updates firmware of the component + + This API performs firmware update: it assumes firmware installation and loading in a single call. + In case platform component requires some extra steps (apart from calling Low Level Utility) + to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically by API + + Args: + image_path: A string, path to firmware image + + Returns: + Boolean False if image_path doesn't exist instead of throwing an exception error + Nothing when the update is successful + + Raises: + RuntimeError: update failed + """ + status = self.install_firmware(image_path) + if not status: + return status + + type = self.get_type() + if type == 'fpga' or type == 'cpld': + # TODO:: power cycle FPGA or CPLD + pass + + return True + + def auto_update_firmware(self, image_path, boot_type): + """ + Updates firmware of the component + + This API performs firmware update automatically based on boot_type: it assumes firmware installation + and/or creating a loading task during the reboot, if needed, in a single call. + In case platform component requires some extra steps (apart from calling Low Level Utility) + to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically during the reboot. + The loading task will be created by API. + + Args: + image_path: A string, path to firmware image + boot_type: A string, reboot type following the upgrade + - none/fast/warm/cold + + Returns: + Output: A return code + return_code: An integer number, status of component firmware auto-update + - return code of a positive number indicates successful auto-update + - status_installed = 1 + - status_updated = 2 + - status_scheduled = 3 + - return_code of a negative number indicates failed auto-update + - status_err_boot_type = -1 + - status_err_image = -2 + - status_err_unknown = -3 + + Raises: + RuntimeError: auto-update failure cause + """ + raise NotImplementedError + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_NAME_LIST[self.index] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + # For SSD get the model name from device + if self.get_name() == "SSD": + return "Solid State Drive - {}".format(self.__get_ssd_model()) + + return COMPONENT_DES_LIST[self.index] + + def __get_cpld_ver(self): + cpld_version_dict = dict() + cpld_ver_info = { + 'CPLD BASE': self.__get_basecpld_ver(), + 'CPLD SW1': self.__get_swcpld1_ver(), + 'CPLD SW2': self.__get_swcpld2_ver(), + 'CPLD COMe': self.__get_comecpld_ver(), + } + + for cpld_name, cpld_ver in cpld_ver_info.items(): + ver1 = int(cpld_ver.strip()) / 10 + ver2 = int(cpld_ver.strip()) % 10 + version = "%d.%d" % (ver1,ver2) + cpld_version_dict[cpld_name] = version + return cpld_version_dict + + def __get_asic_pcie_ver(self): + status, raw_ver=self.helper.run_command(ASIC_PCIE_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_bios_ver(self): + status, raw_ver=self.helper.run_command(BIOS_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_basecpld_ver(self): + status, raw_ver=self.helper.run_command(BASECPLD_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_comecpld_ver(self): + status, raw_ver=self.helper.run_command(COME_CPLD_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_swcpld1_ver(self): + status, raw_ver=self.helper.run_command(SWCPLD1_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_swcpld2_ver(self): + status, raw_ver=self.helper.run_command(SWCPLD2_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_bmc_presence(self): + if BMC_EXIST: + return True + else: + return False + + def __get_bmc_ver(self): + cmd="ipmitool mc info | grep 'Firmware Revision'" + status, raw_ver=self.helper.run_command(cmd) + if status: + bmc_ver=raw_ver.split(':')[-1].strip() + return {"BMC":bmc_ver} + else: + return {"BMC":"N/A"} + + def __get_fpga_version(self): + status, fpga_version = self.helper.run_command("cat %s" % FPGA_VERSION_PATH) + if not status: + return UNKNOWN_VER + return fpga_version.replace("0x", "") + + def __get_onie_ver(self): + onie_ver = "N/A" + status, raw_onie_data = self.helper.run_command(ONIE_VERSION_CMD) + if status: + ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data) + if ret != None: + onie_ver = ret.group(0) + return onie_ver + + def __get_ssd_ver(self): + ssd_ver = "N/A" + status, raw_ssd_data = self.helper.run_command(SSD_VERSION_CMD) + if status: + ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data) + if ret != None: + ssd_ver = ret.group(1) + return ssd_ver + + def __get_ssd_model(self): + model = "N/A" + + status, raw_ssd_data = self.helper.run_command(SSD_VERSION_CMD) + if status: + ret = re.search(r"Device Model: +(.*)[^\\]", raw_ssd_data) + if ret != None: + try: + model = ret.group(1) + except (IndexError): + pass + return model diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/cpld_watchdog.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/cpld_watchdog.py new file mode 100644 index 000000000000..7889ce15f83f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/cpld_watchdog.py @@ -0,0 +1,228 @@ +#!/usr/bin/env python + +############################################################################# +# +# Watchdog contains an implementation of SONiC Platform Base Watchdog API +# +############################################################################# +try: + import ctypes + import fcntl + import os + import subprocess + import time + import array + import syslog + from .helper import APIHelper + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +LPC_CPLD_GETREG_PATH = "/sys/bus/platform/devices/baseboard/getreg" +LPC_CPLD_SETREG_PATH = "/sys/bus/platform/devices/baseboard/setreg" +LPC_WDT_SET_TIMER_L_REG = '0xa183' +LPC_WDT_SET_TIMER_M_REG = '0xa182' +LPC_WDT_SET_TIMER_H_REG = '0xa181' +LPC_WDT_TIMER_L_REG = '0xa186' +LPC_WDT_TIMER_M_REG = '0xa185' +LPC_WDT_TIMER_H_REG = '0xa184' +LPC_WDT_CTRL_REG = '0xa187' +LPC_WDT_ARM_REG = '0xa188' + +WDT_ENABLE = 0x1 +WDT_DISABLE = 0x0 +WDT_COMMON_ERROR = -1 +DEFAULT_TIMEOUT = 180 + +class CpldWatchdog(WatchdogBase): + + def __init__(self): + WatchdogBase.__init__(self) + # Set default value + self._api_helper = APIHelper() + self._ka_count = int(1) + self.armed = True if self._active() else False + self.timeout = self._gettimeout() if self.armed else DEFAULT_TIMEOUT + #self._disable() + + def _lpc_get(self, reg): + return self._api_helper.lpc_getreg(LPC_CPLD_GETREG_PATH, reg) + + def _lpc_set(self, reg, val): + if type(val) is int: + val = hex(val) + return self._api_helper.lpc_setreg(LPC_CPLD_SETREG_PATH, reg, val) + + def _active(self): + """ + WDT is active or not + """ + data = self._lpc_get(LPC_WDT_CTRL_REG) + return True if data == "0x01" else False + + def _enable(self): + """ + Turn on the watchdog timer + """ + status = self._lpc_set(LPC_WDT_CTRL_REG, WDT_ENABLE) + if not status: + pass + + def _disable(self): + """ + Turn off the watchdog timer + """ + status = self._lpc_set(LPC_WDT_CTRL_REG, WDT_DISABLE) + if not status: + pass + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + if bool(self._ka_count % 2): + status = self._lpc_set(LPC_WDT_ARM_REG, WDT_ENABLE) + else: + status = self._lpc_set(LPC_WDT_ARM_REG, WDT_DISABLE) + + if not status: + syslog.syslog(syslog.LOG_ERR, "Feed Watchdog failed") + + self._ka_count = self._ka_count + 1 + if (self._ka_count >= 11): + self._ka_count = 1 + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + ms = seconds * 1000 + ms_low_byte = ms & 0xff + ms_media_byte = (ms >> 8) & 0xff + ms_high_byte = (ms >> 16) & 0xff + self._lpc_set(LPC_WDT_SET_TIMER_L_REG, ms_low_byte) + self._lpc_set(LPC_WDT_SET_TIMER_M_REG, ms_media_byte) + self._lpc_set(LPC_WDT_SET_TIMER_H_REG, ms_high_byte) + return self._gettimeout() + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + data = [0, 0, 0] + data[0] = self._lpc_get(LPC_WDT_SET_TIMER_L_REG) + data[1] = self._lpc_get(LPC_WDT_SET_TIMER_M_REG) + data[2] = self._lpc_get(LPC_WDT_SET_TIMER_H_REG) + seconds = int((int(data[2], 16) << 16 + | int(data[1], 16) << 8 + | int(data[0], 16)) / 1000) + return seconds + + def _gettimeleft(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + data = [0, 0, 0] + data[0] = self._lpc_get(LPC_WDT_TIMER_L_REG) + data[1] = self._lpc_get(LPC_WDT_TIMER_M_REG) + data[2] = self._lpc_get(LPC_WDT_TIMER_H_REG) + seconds = int((int(data[2], 16) << 16 + | int(data[1], 16) << 8 + | int(data[0], 16)) / 1000) + + return seconds + + ################################################################# + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + + ret = WDT_COMMON_ERROR + if seconds < 0: + return ret + + try: + if self.armed: + self._keepalive() + if self.timeout != seconds: + self._disable() + time.sleep(1) + self.timeout = self._settimeout(seconds) + self._enable() + else: + self.timeout = self._settimeout(seconds) + self._keepalive() + self._enable() + self.armed = True + ret = self.timeout + except IOError as e: + pass + + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + self._disable() + self.armed = False + disarmed = True + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + + return self.armed + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Returns: + An integer specifying the number of seconds remaining on thei + watchdog timer. If the watchdog is not armed, returns -1. + """ + + timeleft = WDT_COMMON_ERROR + + if self.armed: + try: + timeleft = self._gettimeleft() + except IOError: + pass + + return timeleft + +class Watchdog(CpldWatchdog): + """PDDF Platform-Specific Watchdog Class""" + + def __init__(self): + CpldWatchdog.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/eeprom.py new file mode 100644 index 000000000000..cb3c825516e7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/eeprom.py @@ -0,0 +1,84 @@ +try: + import os + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +EEPROM_TMP_FILE = '/tmp/eeprom_dump.bin' + +class Eeprom(PddfEeprom): + + _TLV_DISPLAY_VENDOR_EXT = True + _TLV_INFO_MAX_LEN = 256 + pddf_obj = {} + plugin_data = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + if not pddf_data or not pddf_plugin_data: + raise ValueError('PDDF JSON data error') + + self.pddf_obj = pddf_data + self.plugin_data = pddf_plugin_data + + # system EEPROM always has device name EEPROM1 + self.eeprom_path = self.pddf_obj.get_path("EEPROM1", "eeprom") + if self.eeprom_path is None: + return + + super(PddfEeprom, self).__init__(self.eeprom_path, 0, '', True) + self.eeprom_tlv_dict = dict() + try: + if os.path.exists(EEPROM_TMP_FILE): + with open(EEPROM_TMP_FILE, 'rb') as b_fd: + self.eeprom_data = bytearray(b_fd.read()) + else: + self.eeprom_data = self.read_eeprom() + with open(EEPROM_TMP_FILE, 'wb') as b_fd: + b_fd.write(self.eeprom_data) + os.chmod(EEPROM_TMP_FILE, 0o444) + except Exception as e: + self.eeprom_data = "N/A" + raise RuntimeError("PddfEeprom is not Programmed - Error: {}".format(str(e))) + else: + eeprom = self.eeprom_data + + if not self.is_valid_tlvinfo_header(eeprom): + return + + total_length = ((eeprom[9]) << 8) | (eeprom[10]) + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < self._TLV_INFO_MAX_LEN and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + + (eeprom[tlv_index + 1])] + code = "0x%02X" % ((tlv[0])) + + if (tlv[0]) == self._TLV_CODE_VENDOR_EXT: + name = "Vendor Extension" + value = "" + if self._TLV_DISPLAY_VENDOR_EXT: + for c in tlv[2:2 + tlv[1]]: + value += "0x%02X " % c + else: + name, value = self.decoder(None, tlv) + + self.eeprom_tlv_dict[code] = value + if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32: + break + + tlv_index += (eeprom[tlv_index+1]) + 2 + + + # Provide the functions/variables below for which implementation is to be overwritten + def revision_str(self): + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_DEVICE_VERSION) + if not is_valid: + "N/A" + if type(results[2]) is bytearray: + return str(int.from_bytes(results[2], byteorder='little')) + + return results[2].decode('ascii') diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/event.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/event.py new file mode 100644 index 000000000000..86a1390cd6b7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/event.py @@ -0,0 +1,52 @@ +try: + import time + from sonic_py_common.logger import Logger +except ImportError as e: + raise ImportError(repr(e) + " - required module not found") + +class XcvrEvent: + ''' Listen to insert/remove QSFP/SFP+ events ''' + + def __init__(self, sfp_list): + self._sfp_list = sfp_list + self._logger = Logger() + + xcvr_change_event_data = {'valid': 0, 'last': 0, 'present': 0} + + def get_xcvr_event(self, timeout): + port_dict = {} + + # Using polling mode + now = time.time() + + if timeout < 1000: + timeout = 1000 + timeout = timeout / float(1000) # Convert to secs + + if now < (self.xcvr_change_event_data['last'] + timeout) \ + and self.xcvr_change_event_data['valid']: + return True, port_dict + + bitmap = 0 + for sfp in self._sfp_list: + modpres = sfp.get_presence() + index = sfp.port_index - 1 + if modpres: + bitmap = bitmap | (1 << index) + + changed_ports = self.xcvr_change_event_data['present'] ^ bitmap + if changed_ports: + for sfp in self._sfp_list: + index = sfp.port_index - 1 + if changed_ports & (1 << index): + if (bitmap & (1 << index)) == 0: + port_dict[str(index + 1)] = '0' + else: + port_dict[str(index + 1)] = '1' + + # Update the cache dict + self.xcvr_change_event_data['present'] = bitmap + self.xcvr_change_event_data['last'] = now + self.xcvr_change_event_data['valid'] = 1 + + return True, port_dict diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan.py new file mode 100644 index 000000000000..e50a7d70e2e6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan.py @@ -0,0 +1,246 @@ +import os + +try: + from .helper import APIHelper + from sonic_platform_pddf_base.pddf_fan import PddfFan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +SET_FAN_STATUS_LED_CMD = "0x3A 0x39 0x02 {} {}" +BMC_EXIST = APIHelper().is_bmc_present() + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + BMC_FAN_FSC_STATUS_CMD = "ipmitool raw 0x3a 0x26 0x00" + LPC_CPLD_SETREG_PATH = "/sys/bus/platform/devices/baseboard/setreg" + FAN_PWM_CTRL_REG_MAP = { + 1: '0xa1b2', + 2: '0xa1b8', + 3: '0xa1c4', + 4: '0xa1ca' + } + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + self._api_helper = APIHelper() + + def get_presence(self): + """ + Retrieves the presence of fan + """ + if self.is_psu_fan: + return super().get_presence() + return super().get_presence() + + def get_direction(self): + """ + Retrieves the direction of fan + + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + Or N/A if fan removed or abnormal + """ + if not self.get_status(): + return "N/A" + + if self.is_psu_fan: + from sonic_platform.psu import Psu + psu = Psu(self.fans_psu_index - 1, self.pddf_obj, self.plugin_data) + model = psu.get_model() + if model in ["FSP550-20FM", "G1251-0550WNA"]: + return "EXHAUST" + elif model in ["FSP550-29FM", "G1251-0550WRA"]: + return "INTAKE" + return "Unknown" + + return super().get_direction() + + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + target_speed = 0 + if self.is_psu_fan: + # PSU fan not controllable, return current speed + return self.get_speed() + else: + speed_rpm = self.get_speed_rpm() + if self.fan_index == 1: + if(self.plugin_data['FAN']['FRONT_FAN_MAX_RPM_SPEED'].isnumeric()): + max_fan_rpm = int(self.plugin_data['FAN']['FRONT_FAN_MAX_RPM_SPEED']) + else: + return target_speed + else: + if(self.plugin_data['FAN']['REAR_FAN_MAX_RPM_SPEED'].isnumeric()): + max_fan_rpm = int(self.plugin_data['FAN']['REAR_FAN_MAX_RPM_SPEED']) + else: + return target_speed + speed_percentage = round(int((speed_rpm * 100) / max_fan_rpm)) + target_speed = speed_percentage + + return target_speed + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return 0 + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return 0 + else: + speed = int(float(output['status'])) + + max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED']) + speed_percentage = round((speed*100)/max_speed) + return speed_percentage if speed_percentage <= 100 else 100 + else: + # Get fan rpm instead of fan pwm + idx = (self.fantray_index-1)*self.platform['num_fans_pertray'] + self.fan_index + attr = "fan" + str(idx) + "_input" + output = self.pddf_obj.get_attr_name_output("FAN-CTRL", attr) + + if not output: + return 0 + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return 0 + else: + speed = int(float(output['status'])) + + if self.fan_index == 1: + max_speed = int(self.plugin_data['FAN']['FRONT_FAN_MAX_RPM_SPEED']) + else: + max_speed = int(self.plugin_data['FAN']['REAR_FAN_MAX_RPM_SPEED']) + speed_percentage = round((speed*100)/max_speed) + + return speed_percentage if speed_percentage <= 100 else 100 + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + if self.is_psu_fan: + print("Setting PSU fan speed is not allowed") + return False + + if speed < 0 or speed > 100: + print("Error: Invalid speed %d. Please provide a valid speed percentage" % speed) + return False + + if 'duty_cycle_to_pwm' not in self.plugin_data['FAN']: + print("Setting fan speed is not allowed !") + return False + + if(self.plugin_data['FAN']['duty_cycle_to_pwm'].isnumeric()) + duty_cycle_to_pwm = int(self.plugin_data['FAN']['duty_cycle_to_pwm']) + else: + return False + pwm = int(round(duty_cycle_to_pwm(speed))) + + if self._api_helper.is_bmc_present(): + status, data = self._api_helper.get_cmd_output(self.BMC_FAN_FSC_STATUS_CMD) + if status != 0: + print("Error: failed to get BMC FSC status") + return False + if data == '01': + # Enable BMC FSC mode + return False + + # FAN 1 & 2 in same fantray share the same register, skip Fan2 setting + if self.fan_index == 2: + return True + # Set FAN PWM through baseboard CPLD + reg = self.FAN_PWM_CTRL_REG_MAP.get(self.fantray_index) + status = self._api_helper.lpc_setreg(self.LPC_CPLD_SETREG_PATH, reg, hex(pwm)) + + return status + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + return 15 if "PSU" in self.get_name() else 25 + + def is_under_speed(self): + speed = float(self.get_speed()) + target_speed = float(self.get_target_speed()) + speed_tolerance = self.get_speed_tolerance() + + speed_min_th = target_speed * (1 - float(speed_tolerance) / 100) + if speed < speed_min_th: + return True + else: + return False + + def is_over_speed(self): + speed = float(self.get_speed()) + target_speed = float(self.get_target_speed()) + speed_tolerance = self.get_speed_tolerance() + + speed_max_th = target_speed * (1 + float(speed_tolerance) / 100) + if speed > speed_max_th: + return True + else: + return False + + def set_status_led(self,color): + if self.is_psu_fan: + return super().set_status_led(color) + + if color == self.get_status_led(): + return False + + if BMC_EXIST: + fan_led_color_map = { + 'off': '00', + 'green': '01', + 'amber': '02', + 'red': '02' + } + + fan_index_val = hex(self.fantray_index + 3) + + color_val = fan_led_color_map.get(color.lower(), None) + + if fan_index_val is None: + return False + + if color_val is None: + return False + + status, _ = self._api_helper.ipmi_raw(SET_FAN_STATUS_LED_CMD.format(fan_index_val,color_val)) + + return status + else: + return self.set_system_led("SYS_LED", color) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..3b582835accd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan_drawer.py @@ -0,0 +1,28 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_presence(self): + status = False + # Usually if a tray is removed, all the fans inside it are absent + if self._fan_list and len(self._fan_list) == 2: + status = self._fan_list[0].get_presence() or self._fan_list[1].get_presence() + else: + status = self._fan_list[0].get_presence() + return status + + def get_name(self): + return "Fantray {0}".format(self.fantray_index) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/helper.py new file mode 100644 index 000000000000..7ec1f23e950c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/helper.py @@ -0,0 +1,139 @@ +import fcntl +import os +import struct +import subprocess +from mmap import * + +BMC_PRES_SYS_PATH = '/sys/bus/platform/devices/baseboard/bmc_presence' + +class APIHelper(): + def pci_get_value(self, resource, offset): + status = True + result = "" + try: + fd = os.open(resource, os.O_RDWR) + mm = mmap(fd, 0) + mm.seek(int(offset)) + read_data_stream = mm.read(4) + result = struct.unpack('I', read_data_stream) + except: + status = False + return status, result + + def get_cmd_output(self, cmd): + status = 0 + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = ret + + return status, data + + def read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + def read_one_line_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.readline() + return data.strip() + except IOError: + pass + return None + + def write_txt_file(self, file_path, value): + try: + with open(file_path, 'w') as fd: + fd.write(str(value)) + except Exception: + return False + return True + + def lpc_getreg(self, getreg_path, reg): + """ + Get the cpld reg through lpc interface + + Args: + getreg_path: getreg sysfs path + reg: 16 bits reg addr in hex str format + + Returns: + A str, register value in hex str format + """ + file = open(getreg_path, 'w+') + # Acquire an exclusive lock on the file + fcntl.flock(file, fcntl.LOCK_EX) + + try: + file.write(reg) + file.flush() + + # Seek to the beginning of the file + file.seek(0) + + # Read the content of the file + result = file.readline().strip() + finally: + # Release the lock and close the file + fcntl.flock(file, fcntl.LOCK_UN) + file.close() + + return result + + def lpc_setreg(self, setreg_path, reg, val): + """ + Set the cpld reg through lpc interface + + Args: + setreg_path: setreg sysfs path + reg: 16 bits reg addr in hex str format + val: 8 bits register value in hex str format + + Returns: + A boolean, True if speed is set successfully, False if not + """ + status = True + file = open(setreg_path, 'w') + # Acquire an exclusive lock on the file + fcntl.flock(file, fcntl.LOCK_EX) + + try: + data = "{} {}".format(reg, val) + file.write(data) + file.flush() + except: + status = False + finally: + # Release the lock and close the file + fcntl.flock(file, fcntl.LOCK_UN) + file.close() + + return status + + def is_bmc_present(self): + """ + Get the BMC card present status + + Returns: + A boolean, True if present, False if absent + """ + presence = self.read_txt_file(BMC_PRES_SYS_PATH) + if presence == None: + print("Failed to get BMC card presence status") + return True if presence == "present" else False + + def run_command(self,cmd): + status = True + result = "" + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/pcie.py new file mode 100644 index 000000000000..6c01e694fdb3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/pcie.py @@ -0,0 +1,10 @@ +try: + from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Pcie(PcieUtil): + """Celestica Platform-specific PCIe class""" + + def __init__(self, platform_path): + PcieUtil.__init__(self, platform_path) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/platform.py new file mode 100644 index 000000000000..8595e80692df --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/platform.py @@ -0,0 +1,23 @@ +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/psu.py new file mode 100644 index 000000000000..27ea301e307a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/psu.py @@ -0,0 +1,49 @@ +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu + from .helper import APIHelper +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +LPC_GETREG_PATH = "/sys/bus/platform/devices/baseboard/getreg" +LPC_PSU_STATUS_REG = '0xa160' +LPC_PSU_POWER_STATUS_OFFSET = 0 +LPC_PSU_PRES_STATUS_OFFSET = 2 + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + self._api_helper = APIHelper() + + # Provide the functions/variables below for which implementation is to be overwritten + def get_capacity(self): + return 550 + + def get_type(self): + return 'AC' + + def get_revision(self): + """ + Retrieves the revision of the device + Returns: + string: revision of device + """ + if not self.get_presence(): + return 'N/A' + + if self._api_helper.is_bmc_present(): + cmd = "ipmitool fru list {} | grep 'Product Version'".format(5 - self.psu_index) + status, output = self._api_helper.get_cmd_output(cmd) + if status == 0: + rev = output.split()[-1] + return rev + else: + # Get the revision information from FRU + cmd = "i2cget -y -f {} {} 0x2d w".format(42 + self.psu_index - 1, hex(0x52 + self.psu_index - 1)) + status, output = self._api_helper.get_cmd_output(cmd) + if status == 0: + rev = bytes.fromhex(output.strip('0x')).decode('utf-8') + # swap to change the endian difference + return rev[::-1] + return 'N/A' diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/sfp.py new file mode 100644 index 000000000000..5f88fb99704b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/sfp.py @@ -0,0 +1,183 @@ +#!/usr/bin/env python + +try: + import ast + import syslog + import time + from multiprocessing import Lock + from sonic_platform_pddf_base.pddf_sfp import PddfSfp + from sonic_platform_base.sonic_xcvr.api.public.c_cmis import CmisApi +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.eeprom_lock = Lock() + + # Provide the functions/variables below for which implementation is to be overwritten + # Add reties to work around FPGAPCI 0050/eeprom: offset 0x0: sometimes read failed + def __read_eeprom(self, offset, num_bytes): + """ + read eeprom specfic bytes beginning from a random offset with size as num_bytes + + Args: + offset : + Integer, the offset from which the read transaction will start + num_bytes: + Integer, the number of bytes to be read + + Returns: + bytearray, if raw sequence of bytes are read correctly from the offset of size num_bytes + None, if the read_eeprom fails + """ + buf = None + eeprom_raw = [] + sysfs_sfp_i2c_client_eeprom_path = self.eeprom_path + + if not self.get_presence(): + return None + + sysfsfile_eeprom = None + attempts = 0 + max_retries = 5 + success = False + while attempts < max_retries and not success: + try: + if attempts > 0: + time.sleep(0.2) + sysfsfile_eeprom = open(sysfs_sfp_i2c_client_eeprom_path, "rb", 0) + sysfsfile_eeprom.seek(offset) + buf = sysfsfile_eeprom.read(num_bytes) + success = True + except Exception as ex: + attempts += 1 + # Eliminate the redundant errors by showing errors only for lower page and page 0 + if attempts == max_retries: + if offset < 256: + syslog.syslog(syslog.LOG_INFO, "port {0}: {1}: offset {2}: read reach retry limit, refer to last eeprom cache".format(self.port_index, sysfs_sfp_i2c_client_eeprom_path, hex(offset))) + return None + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + + if buf is None: + return None + + for x in buf: + eeprom_raw.append(x) + + while len(eeprom_raw) < num_bytes: + eeprom_raw.append(0) + return bytes(eeprom_raw) + + # Read out any bytes from any offset + def read_eeprom(self, offset, num_bytes): + """ + read eeprom specfic bytes beginning from a random offset with size as num_bytes + + Args: + offset : + Integer, the offset from which the read transaction will start + num_bytes: + Integer, the number of bytes to be read + + Returns: + bytearray, if raw sequence of bytes are read correctly from the offset of size num_bytes + None, if the read_eeprom fails + """ + self.eeprom_lock.acquire() + bytes = self.__read_eeprom(offset, num_bytes) + self.eeprom_lock.release() + return bytes + + def get_presence(self): + presence = PddfSfp.get_presence(self) + if not presence and self._xcvr_api != None: + self._xcvr_api = None + + return presence + + def get_xcvr_api(self): + if self._xcvr_api is None and self.get_presence(): + self.refresh_xcvr_api() + + # Find and update the right optoe driver + api_to_driver_map = {\ + 'Sff8636Api': 'optoe1',\ + 'Sff8472Api': 'optoe2',\ + 'CmisApi': 'optoe3',\ + 'CCmisApi': 'optoe3',\ + 'Sff8436Api': 'sff8436'\ + } + create_dev = False + path_list = self.eeprom_path.split('/') + name_path = '/'.join(path_list[:-1]) + '/name' + del_dev_path = '/'.join(path_list[:-2]) + '/delete_device' + new_dev_path = '/'.join(path_list[:-2]) + '/new_device' + api_name = type(self._xcvr_api).__name__ + new_driver = api_to_driver_map.get(api_name, 'optoe1') + + try: + with open(name_path, 'r') as fd: + cur_driver = fd.readline().strip() + except FileNotFoundError: + create_dev = True + else: + if cur_driver != new_driver: + with open(del_dev_path, 'w') as fd: + fd.write("0x50") + create_dev = True + + if create_dev: + with open(new_dev_path, 'w') as fd: + fd.write("{} 0x50".format(new_driver)) + + if api_name == 'Sff8636Api' or \ + api_name == 'Sff8436Api': + self.write_eeprom(93,1,bytes([0x04])) + + return self._xcvr_api + + def get_platform_media_key(self, transceiver_dict, port_speed, lane_count): + api = self.get_xcvr_api() + api_name = type(api).__name__ + if api_name in ['CmisApi', 'CCmisApi']: + is_cmis = True + else: + is_cmis = False + + # Per lane speed + media_key = str(int(port_speed / lane_count)) + if is_cmis: + media_compliance_code = transceiver_dict['specification_compliance'] + if 'copper' in media_compliance_code: + media_len = transceiver_dict['cable_length'] + media_key += '-copper-' + str(media_len) + 'M' + else: + media_key += '-optical' + else: + media_compliance_dict = ast.literal_eval(transceiver_dict['specification_compliance']) + eth_compliance_str = '10/40G Ethernet Compliance Code' + ext_compliance_str = 'Extended Specification Compliance' + media_compliance_code = '' + if eth_compliance_str in media_compliance_dict: + media_compliance_code = media_compliance_dict[eth_compliance_str] + if ext_compliance_str in media_compliance_dict: + media_compliance_code = media_compliance_code + ' ' + media_compliance_dict[ext_compliance_str] + if 'CR' in media_compliance_code or "copper" in transceiver_dict['specification_compliance'].lower(): + media_len = transceiver_dict['cable_length'] + media_key += '-copper-' + str(media_len) + 'M' + else: + media_key += '-optical' + + return {\ + 'vendor_key': '',\ + 'media_key': media_key,\ + 'lane_speed_key': ''\ + } diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal.py new file mode 100644 index 000000000000..ac73015d1ea3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal.py @@ -0,0 +1,56 @@ +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal + from sonic_platform_base.thermal_base import ThermalBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +SENSORS_LOW_THRESHOLD_MAP = {"Base_Temp_U5": -5, "Base_Temp_U56": -5, + "Switch_Temp_U28": -5, "Switch_Temp_U29": -5} + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_high_threshold(self): + if self.is_psu_thermal: + device = "PSU{}".format(self.thermals_psu_index) + output = self.pddf_obj.get_attr_name_output(device, "psu_temp1_high_threshold") + if not output: + return None + + temp1 = output['status'] + # temperature returned is in milli celcius + return float(temp1)/1000 + else: + return super().get_high_threshold() + + def get_low_threshold(self): + low_threshold = SENSORS_LOW_THRESHOLD_MAP.get(self.get_name(), None) + if low_threshold != None: + return low_threshold + return super().get_low_threshold() + + +BCM_TEMP_GET_CMD = "cat /sys/devices/platform/fpga_sysfs/bcm_temp" +THERMAL_MONITOR_SENSORS = ["CPU_Temp", "BCM_SW_Temp", "VDD_CORE_Temp", "VDD_ANLG_Temp"] +THERMAL_THRESHOLDS = { "CPU_Temp": { "high_threshold": 89, "low_threshold": 'N/A', "high_crit_threshold": 93, + "temp_cmd": "r=$(cat /sys/class/thermal/thermal_zone1/temp) && printf '%.1f' $(($r / 1000))" }, + "BCM_SW_Temp": { "high_threshold": 110, "low_threshold": 'N/A', "high_crit_threshold": 120, + "temp_cmd": "r=$(cat /sys/devices/platform/fpga_sysfs/bcm_temp) && printf '%.1f' $(((434100 - ((12500000 / $r - 1) * 535) + 5000) / 1000))"}, + "VDD_CORE_Temp": { "high_threshold": 120, "low_threshold": 'N/A', "high_crit_threshold": 'N/A', + "temp_cmd": "r=$(cat /sys/class/hwmon/hwmon45/temp1_input) && printf '%.1f' $(($r / 1000))" }, + "VDD_ANLG_Temp": { "high_threshold": 120, "low_threshold": 'N/A', "high_crit_threshold": 'N/A', + "temp_cmd": "r=$(cat /sys/class/hwmon/hwmon44/temp1_input) && printf '%.1f' $(($r / 1000))" }} + +class ThermalMon(ThermalBase): + def __init__(self, index, name): + self.thermal_index = index + 1 + self.thermal_name = name + self._helper = APIHelper() + diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_actions.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_actions.py new file mode 100644 index 000000000000..8be043d94310 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_actions.py @@ -0,0 +1,341 @@ +from sonic_platform_base.sonic_thermal_control.thermal_action_base import ThermalPolicyActionBase +from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object +from .helper import APIHelper + +from sonic_py_common import logger + +sonic_logger = logger.Logger('thermal_actions') + + +class SetFanSpeedAction(ThermalPolicyActionBase): + """ + Base thermal action class to set speed for fans + """ + # JSON field definition + JSON_FIELD_SPEED = 'speed' + + def __init__(self): + """ + Constructor of SetFanSpeedAction + """ + self.default_speed = 50 + self.hightemp_speed = 100 + self.speed = self.default_speed + + def load_from_json(self, json_obj): + """ + Construct SetFanSpeedAction via JSON. JSON example: + { + "type": "fan.all.set_speed" + "speed": "100" + } + :param json_obj: A JSON object representing a SetFanSpeedAction action. + :return: + """ + if SetFanSpeedAction.JSON_FIELD_SPEED in json_obj: + speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_SPEED]) + if speed < 0 or speed > 100: + raise ValueError('SetFanSpeedAction invalid speed value {} in JSON policy file, valid value should be [0, 100]'. + format(speed)) + self.speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_SPEED]) + else: + raise ValueError('SetFanSpeedAction missing mandatory field {} in JSON policy file'. + format(SetFanSpeedAction.JSON_FIELD_SPEED)) + + @classmethod + def set_all_fan_speed(cls, thermal_info_dict, speed): + from .thermal_infos import FanInfo + if FanInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[FanInfo.INFO_NAME], FanInfo): + fan_info_obj = thermal_info_dict[FanInfo.INFO_NAME] + for fan in fan_info_obj.get_all_fans(): + fan.set_speed(int(speed)) + + +@thermal_json_object('fan.all.set_speed') +class SetAllFanSpeedAction(SetFanSpeedAction): + """ + Action to set speed for all fans + """ + def execute(self, thermal_info_dict): + """ + Set speed for all fans + :param thermal_info_dict: A dictionary stores all thermal information. + :return: + """ + SetAllFanSpeedAction.set_all_fan_speed(thermal_info_dict, self.speed) + + +class LinearFanController(): + """ + Common Linear FAN Controller for B2F and F2B + """ + def __init__(self, low_temp, high_temp, hyst_temp, low_pwm, high_pwm): + self._low_temp = low_temp + self._high_temp = high_temp + self._hyst_temp = hyst_temp + self._low_pwm = low_pwm + self._high_pwm = high_pwm + self._linear_slope = (high_pwm - low_pwm) / (high_temp - low_temp) + self._last_pwm = None + + def calc_fan_speed(self, thermal_data): + temp = thermal_data.curr_temp + descend = thermal_data.temp_descend + + low_temp = self._low_temp - self._hyst_temp if descend else self._low_temp + high_temp = self._high_temp - self._hyst_temp if descend else self._high_temp + if temp <= low_temp: + sonic_logger.log_debug("[LinearController] temp: {} equal or lower than low temp: {}, set to lowest pwm: {}".format(temp, low_temp, self._low_pwm)) + self._last_pwm = self._low_pwm + return self._low_pwm + elif temp >= high_temp: + sonic_logger.log_debug("[LinearController] temp: {} equal or higher than high temp: {}, set to highest pwm: {}".format(temp, high_temp, self._high_pwm)) + self._last_pwm = self._high_pwm + return self._high_pwm + else: + pwm = float(self._linear_slope * (temp - low_temp) + self._low_pwm) + if descend: + if self._last_pwm != None and pwm > self._last_pwm: + pwm = self._last_pwm + else: + if self._last_pwm != None and pwm < self._last_pwm: + pwm = self._last_pwm + self._last_pwm = pwm + sonic_logger.log_debug("[LinearController] temp: {}, slope: {}, low_temp: {}, low_pwm: {}, set to pwm: {}".format(temp, self._linear_slope, low_temp, self._low_pwm, pwm)) + return pwm + +class PIDFanController(): + """ + Common FAN PID controller for CPU and BCM Temp + """ + MAX_SPEED = 255 + MIN_SPEED = 89 + def __init__(self, setpoint, p_val, i_val, d_val): + self._setpoint = setpoint + self._p = p_val + self._i = i_val + self._d = d_val + self._curr_speed = self.MIN_SPEED + + def calc_fan_speed(self, thermal_data): + hist2_temp = thermal_data.hist2_temp + hist1_temp = thermal_data.hist1_temp + temp = thermal_data.curr_temp + + if hist2_temp == None or hist1_temp == None: + return round(self._curr_speed / 2.55) + speed = self._curr_speed + self._p * (temp - hist1_temp) \ + + self._i * (temp - self._setpoint) + self._d * (temp - 2 * hist1_temp + hist2_temp) + if speed > self.MAX_SPEED: + speed = self.MAX_SPEED + elif speed < self.MIN_SPEED: + speed = self.MIN_SPEED + self._curr_speed = speed + speed_percent = float(speed / 2.55) + sonic_logger.log_debug("[PIDController] setpoint: {} p: {} i: {} d: {}, temp: {} hist_temp1: {} hist_temp2: {}, pwm: {}, percent: {}".format(self._setpoint, self._p, self._i, self._d, temp, hist1_temp, hist2_temp, speed, speed_percent)) + return speed_percent + + +@thermal_json_object('thermal.temp_check_and_fsc_algo_control') +class ThermalAlgorithmAction(SetFanSpeedAction): + """ + Action to check thermal sensor temperature change status and set speed for all fans + """ + THERMAL_LOG_LEVEL = "thermal_log_level" + CPU_PID_PARAMS = "cpu_pid_params" + BCM_PID_PARAMS = "bcm_pid_params" + F2B_LINEAR_PARAMS = "f2b_linear_params" + B2F_LINEAR_PARAMS = "b2f_linear_params" + + def __init__(self): + SetFanSpeedAction.__init__(self) + self.sys_airflow = None + self.cpu_pid_params = None + self.bcm_pid_params = None + self.f2b_linear_params = None + self.b2f_linear_params = None + self.cpu_fan_controller = None + self.bcm_fan_controller = None + self.linear_fan_controller = None + + def load_from_json(self, json_obj): + """ + Construct ThermalAlgorithmAction via JSON. JSON example: + { + "type": "thermal.temp_check_and_fsc_algo_control", + "cpu_pid_params": [82, 3, 0.5, 0.2], + "bcm_pid_params": [88, 4, 0.3, 0.4], + "f2b_linear_params": [34, 54, 3, 35, 100], + "b2f_linear_params": [28, 48, 3, 35, 100] + } + :param json_obj: A JSON object representing a ThermalAlgorithmAction action. + :return: + """ + if self.THERMAL_LOG_LEVEL in json_obj: + thermal_log_level = json_obj[self.THERMAL_LOG_LEVEL] + if not isinstance(thermal_log_level, int) or thermal_log_level not in range(0,8): + raise ValueError('ThermalAlgorithmAction invalid thermal log level, a interger in range 0-7 is required') + sonic_logger.set_min_log_priority(thermal_log_level) + if self.CPU_PID_PARAMS in json_obj: + cpu_pid_params = json_obj[self.CPU_PID_PARAMS] + if not isinstance(cpu_pid_params, list) or len(cpu_pid_params) != 4: + raise ValueError('ThermalAlgorithmAction invalid SetPoint PID {} in JSON policy file, valid value should be [point, p, i, d]'. + format(cpu_pid_params)) + self.cpu_pid_params = cpu_pid_params + else: + raise ValueError('ThermalAlgorithmAction missing mandatory field [setpoint, p, i, d] in JSON policy file') + + if self.BCM_PID_PARAMS in json_obj: + bcm_pid_params = json_obj[self.BCM_PID_PARAMS] + if not isinstance(bcm_pid_params, list) or len(bcm_pid_params) != 4: + raise ValueError('ThermalAlgorithmAction invalid SetPoint PID {} in JSON policy file, valid value should be [point, p, i, d]'. + format(bcm_pid_params)) + self.bcm_pid_params = bcm_pid_params + else: + raise ValueError('ThermalAlgorithmAction missing mandatory field [setpoint, p, i, d] in JSON policy file') + + if self.F2B_LINEAR_PARAMS in json_obj: + f2b_linear_params = json_obj[self.F2B_LINEAR_PARAMS] + if not isinstance(f2b_linear_params, list) or len(f2b_linear_params) != 5: + raise ValueError('ThermalAlgorithmAction invalid SetPoint PID {} in JSON policy file, valid value should be [point, p, i, d]'. + format(f2b_linear_params)) + self.f2b_linear_params = f2b_linear_params + else: + raise ValueError('ThermalAlgorithmAction missing mandatory field [low_temp, high_temp, hyst_temp, low_pwm, high_pwm] in JSON policy file') + + if self.B2F_LINEAR_PARAMS in json_obj: + b2f_linear_params = json_obj[self.B2F_LINEAR_PARAMS] + if not isinstance(b2f_linear_params, list) or len(b2f_linear_params) != 5: + raise ValueError('ThermalAlgorithmAction invalid SetPoint PID {} in JSON policy file, valid value should be [point, p, i, d]'. + format(b2f_linear_params)) + self.b2f_linear_params = b2f_linear_params + else: + raise ValueError('ThermalAlgorithmAction missing mandatory field [low_temp, high_temp, hyst_temp, low_pwm, high_pwm] in JSON policy file') + + sonic_logger.log_info("[ThermalAlgorithmAction] cpu_pid: {}, bcm_pid: {}, f2b_linear: {}, b2f_linear: {}".format(self.cpu_pid_params, self.bcm_pid_params, self.f2b_linear_params, self.b2f_linear_params)) + + def execute(self, thermal_info_dict): + """ + Check check thermal sensor temperature change status and set speed for all fans + :param thermal_info_dict: A dictionary stores all thermal information. + :return: + """ + if self.sys_airflow == None: + from .thermal_infos import ChassisInfo + if ChassisInfo.INFO_NAME in thermal_info_dict: + chassis_info_obj = thermal_info_dict[ChassisInfo.INFO_NAME] + chassis = chassis_info_obj.get_chassis() + self.sys_airflow = chassis.get_system_airflow() + + if self.cpu_fan_controller == None: + self.cpu_fan_controller = PIDFanController(self.cpu_pid_params[0], self.cpu_pid_params[1], + self.cpu_pid_params[2], self.cpu_pid_params[3]) + if self.bcm_fan_controller == None: + self.bcm_fan_controller = PIDFanController(self.bcm_pid_params[0], self.bcm_pid_params[1], + self.bcm_pid_params[2], self.bcm_pid_params[3]) + if self.linear_fan_controller == None: + if self.sys_airflow == 'INTAKE': + linear_params = self.b2f_linear_params + else: + linear_params = self.f2b_linear_params + self.linear_fan_controller = LinearFanController(linear_params[0], linear_params[1], linear_params[2], \ + linear_params[3], linear_params[4]) + + from .thermal_infos import ThermalInfo + if ThermalInfo.INFO_NAME in thermal_info_dict and \ + isinstance(thermal_info_dict[ThermalInfo.INFO_NAME], ThermalInfo): + + thermal_info_obj = thermal_info_dict[ThermalInfo.INFO_NAME] + thermals_data = thermal_info_obj.get_thermals_data() + cpu_thermal_data = thermals_data["CPU_Temp"] + cpu_fan_pwm = self.cpu_fan_controller.calc_fan_speed(cpu_thermal_data) + bcm_thermal_data = thermals_data["BCM_SW_Temp"] + bcm_fan_pwm = self.bcm_fan_controller.calc_fan_speed(bcm_thermal_data) + if self.sys_airflow == 'INTAKE': + thermal_data = thermals_data["Base_Temp_U5"] + linear_fan_pwm1 = self.linear_fan_controller.calc_fan_speed(thermal_data) + thermal_data = thermals_data["Base_Temp_U56"] + linear_fan_pwm2 = self.linear_fan_controller.calc_fan_speed(thermal_data) + else: + thermal_data = thermals_data["Switch_Temp_U28"] + linear_fan_pwm1 = self.linear_fan_controller.calc_fan_speed(thermal_data) + thermal_data = thermals_data["Switch_Temp_U29"] + linear_fan_pwm2 = self.linear_fan_controller.calc_fan_speed(thermal_data) + target_fan_pwm = max(cpu_fan_pwm, bcm_fan_pwm, linear_fan_pwm1, linear_fan_pwm2) + sonic_logger.log_info("[ThermalAlgorithmAction] cpu_pid_pwm: {}, bcm_pid_pwm: {}, linear_fan_pwm: {}, linear_fan_pwm2: {}, target_pwm: {}".format(cpu_fan_pwm, bcm_fan_pwm, linear_fan_pwm1, linear_fan_pwm2, target_fan_pwm)) + SetAllFanSpeedAction.set_all_fan_speed(thermal_info_dict, round(target_fan_pwm)) + + +@thermal_json_object('switch.shutdown') +class SwitchPolicyAction(ThermalPolicyActionBase): + """ + Base class for thermal action. Once all thermal conditions in a thermal policy are matched, + all predefined thermal action will be executed. + """ + def execute(self, thermal_info_dict): + """ + Take action when thermal condition matches. For example, adjust speed of fan or shut + down the switch. + :param thermal_info_dict: A dictionary stores all thermal information. + :return: + """ + sonic_logger.log_warning("Alarm for temperature critical is detected, shutdown Device") + # Wait for 30s then shutdown + import time + time.sleep(30) + # Power off COMe through CPLD + CPLD_POWRE_OFF_CMD = "echo 0xa120 0xfc > /sys/bus/platform/devices/baseboard/setreg" + api_helper = APIHelper() + api_helper.get_cmd_output(CPLD_POWER_OFF_CMD) + + +@thermal_json_object('thermal_control.control') +class ControlThermalAlgoAction(ThermalPolicyActionBase): + """ + Action to control the thermal control algorithm + """ + # JSON field definition + JSON_FIELD_STATUS = 'status' + + def __init__(self): + self.status = True + + def load_from_json(self, json_obj): + """ + Construct ControlThermalAlgoAction via JSON. JSON example: + { + "type": "thermal_control.control" + "status": "true" + } + :param json_obj: A JSON object representing a ControlThermalAlgoAction action. + :return: + """ + if ControlThermalAlgoAction.JSON_FIELD_STATUS in json_obj: + status_str = json_obj[ControlThermalAlgoAction.JSON_FIELD_STATUS].lower() + if status_str == 'true': + self.status = True + elif status_str == 'false': + self.status = False + else: + raise ValueError('Invalid {} field value, please specify true of false'. + format(ControlThermalAlgoAction.JSON_FIELD_STATUS)) + else: + raise ValueError('ControlThermalAlgoAction ' + 'missing mandatory field {} in JSON policy file'. + format(ControlThermalAlgoAction.JSON_FIELD_STATUS)) + + def execute(self, thermal_info_dict): + """ + Disable thermal control algorithm + :param thermal_info_dict: A dictionary stores all thermal information. + :return: + """ + from .thermal_infos import ChassisInfo + if ChassisInfo.INFO_NAME in thermal_info_dict: + chassis_info_obj = thermal_info_dict[ChassisInfo.INFO_NAME] + chassis = chassis_info_obj.get_chassis() + thermal_manager = chassis.get_thermal_manager() + if self.status: + thermal_manager.start_thermal_control_algorithm() + else: + thermal_manager.stop_thermal_control_algorithm() diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_conditions.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_conditions.py new file mode 100644 index 000000000000..c8bb51ef966c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_conditions.py @@ -0,0 +1,121 @@ +from sonic_platform_base.sonic_thermal_control.thermal_condition_base import ThermalPolicyConditionBase +from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object + + +class FanCondition(ThermalPolicyConditionBase): + def get_fan_info(self, thermal_info_dict): + from .thermal_infos import FanInfo + if FanInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[FanInfo.INFO_NAME], FanInfo): + return thermal_info_dict[FanInfo.INFO_NAME] + else: + return None + +@thermal_json_object('fantray.any.absence') +class AnyFantrayAbsenceCondition(FanCondition): + def is_match(self, thermal_info_dict): + fan_info_obj = self.get_fan_info(thermal_info_dict) + return len(fan_info_obj.get_absence_fantrays()) > 0 if fan_info_obj else False + +@thermal_json_object('fantray.all.absence') +class AllFantrayAbsenceCondition(FanCondition): + def is_match(self, thermal_info_dict): + fan_info_obj = self.get_fan_info(thermal_info_dict) + return len(fan_info_obj.get_presence_fantrays()) == 0 if fan_info_obj else False + +@thermal_json_object('fantray.all.presence') +class AllFantrayPresenceCondition(FanCondition): + def is_match(self, thermal_info_dict): + fan_info_obj = self.get_fan_info(thermal_info_dict) + return len(fan_info_obj.get_absence_fantrays()) == 0 if fan_info_obj else True + +@thermal_json_object('fan.rotor.more_than_one.failed') +class FanRotorMoreThanOneFailedCondition(FanCondition): + def is_match(self, thermal_info_dict): + fan_info_obj = self.get_fan_info(thermal_info_dict) + return len(fan_info_obj.get_absence_fans()) > 1 if fan_info_obj else False + +@thermal_json_object('fan.rotor.less_than_two.failed') +class FanRotorLessThanTwoFailedCondition(FanCondition): + def is_match(self, thermal_info_dict): + fan_info_obj = self.get_fan_info(thermal_info_dict) + return len(fan_info_obj.get_absence_fans()) < 2 if fan_info_obj else True + +class PsuCondition(ThermalPolicyConditionBase): + def get_psu_info(self, thermal_info_dict): + from .thermal_infos import PsuInfo + if PsuInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[PsuInfo.INFO_NAME], PsuInfo): + return thermal_info_dict[PsuInfo.INFO_NAME] + else: + return None + +@thermal_json_object('psu.any.absence') +class AnyPsuAbsenceCondition(PsuCondition): + def is_match(self, thermal_info_dict): + psu_info_obj = self.get_psu_info(thermal_info_dict) + return len(psu_info_obj.get_absence_psus()) > 0 if psu_info_obj else False + +@thermal_json_object('psu.all.absence') +class AllPsuAbsenceCondition(PsuCondition): + def is_match(self, thermal_info_dict): + psu_info_obj = self.get_psu_info(thermal_info_dict) + return len(psu_info_obj.get_presence_psus()) == 0 if psu_info_obj else False + +@thermal_json_object('psu.all.presence') +class AllPsuPresenceCondition(PsuCondition): + def is_match(self, thermal_info_dict): + psu_info_obj = self.get_psu_info(thermal_info_dict) + return len(psu_info_obj.get_absence_psus()) == 0 if psu_info_obj else True + + +class ThermalCondition(ThermalPolicyConditionBase): + def get_thermal_info(self, thermal_info_dict): + from .thermal_infos import ThermalInfo + if ThermalInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[ThermalInfo.INFO_NAME], ThermalInfo): + return thermal_info_dict[ThermalInfo.INFO_NAME] + else: + return None + +@thermal_json_object('thermal.over.high_critical_threshold') +class ThermalOverHighCriticalCondition(ThermalCondition): + def is_match(self, thermal_info_dict): + thermal_info_obj = self.get_thermal_info(thermal_info_dict) + if thermal_info_obj: + return thermal_info_obj.is_any_over_high_critical_threshold() + else: + return False + +@thermal_json_object('thermal.any.over.high_threshold') +class AnyThermalOverHighThresholdCondition(ThermalCondition): + def is_match(self, thermal_info_dict): + thermal_info_obj = self.get_thermal_info(thermal_info_dict) + if thermal_info_obj: + return thermal_info_obj.is_any_warm_up_and_over_high_threshold() + else: + return False + +@thermal_json_object('thermal.any.below.low_threshold') +class AnyThermalBelowLowThresholdCondition(ThermalCondition): + def is_match(self, thermal_info_dict): + thermal_info_obj = self.get_thermal_info(thermal_info_dict) + if thermal_info_obj: + return thermal_info_obj.is_any_cool_down_and_below_low_threshold() + else: + return False + +@thermal_json_object('thermal.all.below.high_threshold') +class AnyThermalOverHighThresholdCondition(ThermalCondition): + def is_match(self, thermal_info_dict): + thermal_info_obj = self.get_thermal_info(thermal_info_dict) + if thermal_info_obj: + return not thermal_info_obj.is_any_warm_up_and_over_high_threshold() + else: + return True + +@thermal_json_object('thermal.all.over.low_threshold') +class AnyThermalBelowLowThresholdCondition(ThermalCondition): + def is_match(self, thermal_info_dict): + thermal_info_obj = self.get_thermal_info(thermal_info_dict) + if thermal_info_obj: + return not thermal_info_obj.is_any_cool_down_and_below_low_threshold() + else: + return True diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_infos.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_infos.py new file mode 100644 index 000000000000..4925637f8cb3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_infos.py @@ -0,0 +1,362 @@ +from sonic_platform_base.sonic_thermal_control.thermal_info_base import ThermalPolicyInfoBase +from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object +from sonic_py_common import logger + +sonic_logger = logger.Logger('thermal_infos') + +@thermal_json_object('fan_info') +class FanInfo(ThermalPolicyInfoBase): + """ + Fan information needed by thermal policy + """ + + # Fan information name + INFO_NAME = 'fan_info' + FAN_LOW_WARNING_SPEED = 1370 + FAN_FRONT_HIGH_WARNING_SPEED = 29125 + FAN_REAR_HIGH_WARNING_SPEED = 25375 + + def __init__(self): + self._all_fans = set() + self._absence_fans = set() + self._presence_fans = set() + self._absence_fantrays = set() + self._presence_fantrays = set() + self._low_warning_fans = set() + self._high_warning_fans = set() + self._status_changed = False + + def collect(self, chassis): + """ + Collect absence and presence fans. + :param chassis: The chassis object + :return: + """ + self._status_changed = False + try: + for fantray in chassis.get_all_fan_drawers(): + if fantray.get_presence() and fantray not in self._presence_fantrays: + self._presence_fantrays.add(fantray) + self._status_changed = True + if fantray in self._absence_fantrays: + self._absence_fantrays.remove(fantray) + elif not fantray.get_presence() and fantray not in self._absence_fantrays: + self._absence_fantrays.add(fantray) + self._status_changed = True + if fantray in self._presence_fantrays: + self._presence_fantrays.remove(fantray) + + for fan in fantray.get_all_fans(): + if fan.get_presence() and fantray not in self._presence_fans: + self._presence_fans.add(fan) + self._status_changed = True + if fan in self._absence_fans: + self._absence_fans.remove(fan) + elif not fan.get_presence() and fan not in self._absence_fans: + self._absence_fans.add(fan) + self._status_changed = True + if fan in self._presence_fans: + self._presence_fans.remove(fan) + + fan_name = fan.get_name() + fan_rpm = fan.get_speed_rpm() + if fan not in self._all_fans: + self._all_fans.add(fan) + # FAN Low speed warning + if fan_rpm < self.FAN_LOW_WARNING_SPEED and fan not in self._low_warning_fans: + self._low_warning_fans.add(fan) + sonic_logger.log_warning("FAN {} speed {}, low speed warning".format(fan_name, fan_rpm)) + elif fan_rpm > self.FAN_LOW_WARNING_SPEED and fan in self._low_warning_fans: + sonic_logger.log_notice("FAN {}, restore from low speed warning".format(fan_name)) + self._low_warning_fans.remove(fan) + # FAN high speed warning + if fan.fan_index == 1: + if fan_rpm > self.FAN_FRONT_HIGH_WARNING_SPEED and fan not in self._high_warning_fans: + self._high_warning_fans.add(fan) + sonic_logger.log_warning("FAN {} speed {}, high speed warning".format(fan_name, fan_rpm)) + elif fan_rpm > self.FAN_FRONT_HIGH_WARNING_SPEED and fan in self._high_warning_fans: + self._high_warning_fans.remove(fan) + sonic_logger.log_notice("FAN {}, restore from high speed warning".format(fan_name)) + else: + if fan_rpm > self.FAN_REAR_HIGH_WARNING_SPEED and fan not in self._high_warning_fans: + self._high_warning_fans.add(fan) + sonic_logger.log_warning("FAN {} speed {}, high speed warning".format(fan_name, fan_rpm)) + elif fan_rpm > self.FAN_REAR_HIGH_WARNING_SPEED and fan in self._high_warning_fans: + self._high_warning_fans.remove(fan) + sonic_logger.log_notice("FAN {}, restore from high speed warning".format(fan_name)) + except Exception as e: + sonic_logger.log_warning("Catch exception: {}, File: {}, Line: {}".format(type(e).__name__, __file__, e.__traceback__.tb_lineno)) + + def get_all_fans(self): + """ + Retrieves all fans + :return: A set of fans + """ + return self._all_fans + + def get_absence_fantrays(self): + """ + Retrieves absence fans + :return: A set of absence fantrays + """ + return self._absence_fantrays + + def get_presence_fantrays(self): + """ + Retrieves presence fans + :return: A set of presence fantrays + """ + return self._presence_fantrays + + def get_absence_fans(self): + """ + Retrieves absence fans + :return: A set of absence fans + """ + return self._absence_fans + + def get_presence_fans(self): + """ + Retrieves presence fans + :return: A set of presence fans + """ + return self._presence_fans + + def get_low_warning_fans(self): + """ + Retrieves low rpm warning fans + :return: A set of low rpm warning fans + """ + return self._low_warning_fans + + def get_high_warning_fans(self): + """ + Retrieves high rpm warning fans + :return: A set of high rpm warning fans + """ + return self._high_warning_fans + + def is_status_changed(self): + """ + Retrieves if the status of fan information changed + :return: True if status changed else False + """ + return self._status_changed + + +@thermal_json_object('psu_info') +class PsuInfo(ThermalPolicyInfoBase): + """ + PSU information needed by thermal policy + """ + INFO_NAME = 'psu_info' + PSU_TEMP_HIGH_WARNING_THRESHOLD = 65 + + def __init__(self): + self._absence_psus = set() + self._presence_psus = set() + self._high_warning_psus = set() + self._status_changed = False + + def collect(self, chassis): + """ + Collect absence and presence PSUs. + :param chassis: The chassis object + :return: + """ + self._status_changed = False + try: + for psu in chassis.get_all_psus(): + if psu.get_presence() and psu not in self._presence_psus: + self._presence_psus.add(psu) + self._status_changed = True + if psu in self._absence_psus: + self._absence_psus.remove(psu) + elif (not psu.get_presence()) and psu not in self._absence_psus: + self._absence_psus.add(psu) + self._status_changed = True + if psu in self._presence_psus: + self._presence_psus.remove(psu) + # PSU Temp high warning + psu_name = psu.get_name() + psu_temp = psu.get_temperature() + if psu_temp != None and psu_temp != 'N/A': + if psu_temp > self.PSU_TEMP_HIGH_WARNING_THRESHOLD and psu not in self._high_warning_psus: + self._high_warning_psus.add(psu) + sonic_logger.log_warning("PSU {} temp {}, high temperature warning".format(psu_name, psu_temp)) + elif psu_temp < self.PSU_TEMP_HIGH_WARNING_THRESHOLD and psu in self._high_warning_psus: + self._high_warning_psus.remove(psu) + sonic_logger.log_notice("PSU {} restore from high temperature warning".format(psu_name)) + except Exception as e: + sonic_logger.log_warning("Catch exception: {}, File: {}, Line: {}".format(type(e).__name__, __file__, e.__traceback__.tb_lineno)) + + def get_absence_psus(self): + """ + Retrieves presence PSUs + :return: A set of absence PSUs + """ + return self._absence_psus + + def get_presence_psus(self): + """ + Retrieves presence PSUs + :return: A set of presence fans + """ + return self._presence_psus + + def get_high_warning_psus(self): + """ + Retrieves high temperature warning PSUs + :return: A set of high temp fans + """ + return self._high_warning_psus + + def is_status_changed(self): + """ + Retrieves if the status of PSU information changed + :return: True if status changed else False + """ + return self._status_changed + + +class ThermalData(): + def __init__(self, name): + self.name = name + self.hist2_temp = None + self.hist1_temp = None + self.curr_temp = None + self.temp_descend = False + + def update_temp(self, temp): + self.hist2_temp = self.hist1_temp + self.hist1_temp = self.curr_temp + self.curr_temp = temp + return self + + def update_temp_trend(self): + if self.hist1_temp == None: + self.temp_descend = False + elif self.curr_temp < self.hist1_temp: + self.temp_descend = True + else: + self.temp_descend = False + return self + +@thermal_json_object('thermal_info') +class ThermalInfo(ThermalPolicyInfoBase): + """ + Thermal information needed by thermal policy + """ + + # Fan information name + INFO_NAME = 'thermal_info' + THERMAL_SHUTDOWN_TEMP_MAP = {"CPU_Temp": 93, "BCM_SW_Temp": 120} + + def __init__(self): + self.init = False + self._high_warning_thermals = set() + self._low_warning_thermals = set() + self._high_shutdown_thermals = set() + self._thermals_data = {} + + def collect(self, chassis): + """ + Collect thermal sensor temperature change status + :param chassis: The chassis object + :return: + """ + try: + for thermal in chassis.get_all_thermals(): + name = thermal.get_name() + temp = thermal.get_temperature() + if temp == None or temp == 'N/A': + continue + high_threshold = thermal.get_high_threshold() + low_threshold = thermal.get_low_threshold() + thermal_shutdown = self.THERMAL_SHUTDOWN_TEMP_MAP.get(name, None) + + # Collect thermal data + thermal_data = self._thermals_data.get(name, None) + if thermal_data == None: + thermal_data = ThermalData(name) + self._thermals_data[name] = thermal_data + thermal_data.update_temp(temp).update_temp_trend() + + # Handle high threshold condition + if high_threshold != None and high_threshold != 'N/A': + if temp > high_threshold and thermal not in self._high_warning_thermals: + self._high_warning_thermals.add(thermal) + sonic_logger.log_warning("Thermal {} temp {}, high threshold warning".format(name, temp)) + if thermal_shutdown != None and temp > thermal_shutdown: + self._high_shutdown_thermals.add(thermal) + sonic_logger.log_warning("Thermal {} temp {}, high temp shutdown warning".format(name, temp)) + elif temp < (high_threshold - 3) and thermal in self._high_warning_thermals: + self._high_warning_thermals.remove(thermal) + sonic_logger.log_notice("Thermal {}, restore from high threshold warning".format(name)) + if thermal in self._high_shutdown_thermals: + self._high_shutdown_thermals.remove(thermal) + + # Handle low threshold condition + if low_threshold != None and low_threshold != 'N/A': + if temp < low_threshold and thermal not in self._low_warning_thermals: + self._low_warning_thermals.add(thermal) + sonic_logger.log_warning("Thermal {} temp {}, low threshold warning".format(name, temp)) + elif temp > (low_threshold + 3) and thermal in self._low_warning_thermals: + self._low_warning_thermals.remove(thermal) + sonic_logger.log_notice("Thermal {}, restore from low threshold warning".format(name)) + except Exception as e: + sonic_logger.log_warning("Catch exception: {}, File: {}, Line: {}".format(type(e).__name__, __file__, e.__traceback__.tb_lineno)) + + def is_any_warm_up_and_over_high_threshold(self): + """ + Retrieves if the temperature is warm up and over high threshold + :return: True if the temperature is warm up and over high threshold else False + """ + return len(self._high_warning_thermals) > 0 + + def is_any_cool_down_and_below_low_threshold(self): + """ + Retrieves if the temperature is cold down and below low threshold + :return: True if the temperature is cold down and below low threshold else False + """ + return len(self._low_warning_thermals) > 0 + + def is_any_over_high_critical_threshold(self): + """ + Retrieves if the temperature is over high critical threshold + :return: True if the temperature is over high critical threshold else False + """ + return len(self._high_shutdown_thermals) > 0 + + def get_thermals_data(self): + """ + Retrieves all the thermal data + :return: thermal data dict using thermal name as key + """ + return self._thermals_data + + +@thermal_json_object('chassis_info') +class ChassisInfo(ThermalPolicyInfoBase): + """ + Chassis information needed by thermal policy + """ + INFO_NAME = 'chassis_info' + + def __init__(self): + self._chassis = None + + def collect(self, chassis): + """ + Collect platform chassis. + :param chassis: The chassis object + :return: + """ + self._chassis = chassis + + def get_chassis(self): + """ + Retrieves platform chassis object + :return: A platform chassis object. + """ + return self._chassis diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_manager.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_manager.py new file mode 100644 index 000000000000..fb9557270f05 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_manager.py @@ -0,0 +1,21 @@ +from sonic_platform_base.sonic_thermal_control.thermal_manager_base import ThermalManagerBase +from .thermal_infos import * +from .thermal_conditions import * +from .thermal_actions import * + +class ThermalManager(ThermalManagerBase): + @classmethod + def initialize(cls): + """ + Initialize thermal manager, including register thermal condition types and thermal action types + and any other vendor specific initialization. + """ + return True + + @classmethod + def deinitialize(cls): + """ + Destroy thermal manager, including any vendor specific cleanup. + :return: + """ + return True diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/watchdog.py new file mode 100644 index 000000000000..90b5ee352c08 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/watchdog.py @@ -0,0 +1,14 @@ +try: + from sonic_platform_pddf_base.pddf_watchdog import PddfWatchdog +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Watchdog(PddfWatchdog): + """PDDF Platform-Specific Watchdog Class""" + + def __init__(self): + PddfWatchdog.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform_setup.py new file mode 100644 index 000000000000..a1535165bb66 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform_setup.py @@ -0,0 +1,28 @@ +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on Celestica Platforms based on PDDF', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/ds3000_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/ds3000_platform_shutdown.sh new file mode 100755 index 000000000000..89c53b2ccb7c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/ds3000_platform_shutdown.sh @@ -0,0 +1,39 @@ +#!/bin/bash +REBOOT_CAUSE_DIR="/host/reboot-cause" +HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +REBOOT_TIME=$(date) + +if [ $# -ne 1 ]; then + echo "Require reboot type" + exit 1 +fi + +if [ ! -d "$REBOOT_CAUSE_DIR" ]; then + mkdir $REBOOT_CAUSE_DIR +fi + +echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE} + +# Best effort to write buffered data onto the disk +sync ; sync ; sync ; sleep 3 + +bmc_present=`cat /sys/bus/platform/devices/baseboard/bmc_presence` + +if [[ "$bmc_present" == "present" ]]; then + # Set all LEDs to BMC's control + ipmitool raw 0x3a 0x42 0x02 0x01 &> /dev/null + + # BMC cold power-cyle + ipmitool chassis power cycle &> /dev/null +else + # Set System LED to booting pattern + i2cset -f -y 100 0x0d 0x62 0x02 &> /dev/null + + # CPLD cold power-cyle + i2cset -f -y 100 0x0d 0x64 0x00 &> /dev/null +fi + +# System should reboot by now and avoid the script returning to caller +sleep 10 + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_post_device_create.sh new file mode 100755 index 000000000000..95e4def3f903 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_post_device_create.sh @@ -0,0 +1,37 @@ +#!/bin/bash + +declare -r CPLD_SETREG="/sys/bus/platform/devices/baseboard/setreg" +declare -r CPLD_GETREG="/sys/bus/platform/devices/baseboard/getreg" + +# Load fpga extend driver after fpga device created +modprobe pddf_custom_fpga_extend + +# attach ucd90120 devices, bus 107, devices 0x34 and 0x35 +echo "ucd90120 0x34" > /sys/bus/i2c/devices/i2c-107/new_device +echo "ucd90120 0x35" > /sys/bus/i2c/devices/i2c-107/new_device + +# attach mp2975 devices, bus 108, devices 0x70 and 0x7a +echo "mp2975 0x70" > /sys/bus/i2c/devices/i2c-108/new_device +echo "mp2975 0x7a" > /sys/bus/i2c/devices/i2c-108/new_device + +# Set SYS_LED to Green, assuming everything came up fine. +echo "0xa162 0xdc" > ${CPLD_SETREG} + +# Disable CPLD thermal shutdown by default +echo "0xa175 0x0" > ${CPLD_SETREG} + +BMC_PRESENCE_SYS_PATH="/sys/bus/platform/devices/baseboard/bmc_presence" +BMC_PRESENCE=`cat ${BMC_PRESENCE_SYS_PATH}` + +#Set off Alarm LED +if [ ${BMC_PRESENCE} == "present" ]; then + # Set all LEDs to Manual control + ipmitool raw 0x3a 0x42 0x02 0x00 &> /dev/null + # Set Alarm LED to OFF + ipmitool raw 0x3a 0x39 0x02 0x01 0x00 &> /dev/null + + #Set CPLD Fan LED register to BMC control + ipmitool raw 0x3a 0x64 0x00 0x02 0x65 0x10 &> /dev/null +else + i2cset -f -y 100 0x0d 0x63 0x33 &> /dev/null +fi diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_pre_driver_install.sh new file mode 100755 index 000000000000..29bc603d447c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_pre_driver_install.sh @@ -0,0 +1,11 @@ +#!/bin/bash + +# Has customized those drivers,so rename them to lose effect +psu_driver=pddf_psu_driver_module.ko +ker_name=$(uname -r) +driver_path=/usr/lib/modules/${ker_name}/extra/ +if [ -e ${driver_path}${psu_driver} ]; then + mv ${driver_path}${psu_driver} ${driver_path}${psu_driver}-bk +fi + +echo 'pddf psu driver module has rename now' diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/platform_sensors.py new file mode 100644 index 000000000000..8cab9ee29554 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/platform_sensors.py @@ -0,0 +1,179 @@ +#!/usr/bin/python +# +# Silverstone-v2 platform sensors. This script get the sensor data from BMC +# using ipmitool and display them in lm-sensor alike format. +# +# The following data is support: +# 1. Temperature sensors +# 2. PSUs +# 3. Fan Drawers + +import sys +import logging +import subprocess + +IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist'] +MAX_NUM_FANS = 4 +MAX_NUM_PSUS = 2 + +SENSOR_NAME = 0 +SENSOR_VAL = 4 + +sensor_dict = {} + +def ipmi_sensor_dump(cmd): + ''' Execute ipmitool command return dump output + exit if any error occur. + ''' + global sensor_dict + sensor_dump = '' + + try: + sensor_dump = subprocess.check_output(IPMI_SDR_CMD, universal_newlines=True) + except subprocess.CalledProcessError as e: + logging.error('Error! Failed to execute: {}'.format(cmd)) + sys.exit(1) + + for line in sensor_dump.splitlines(): + sensor_info = line.split('|') + sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip() + + return True + +def get_reading_by_name(sensor_name, sdr_elist_dump): + ''' + Search for the match sensor name, return sensor + reading value and unit, return object epmtry string + if search not match. + + The output of sensor dump: + TEMP_FB_U52 | 00h | ok | 7.1 | 31 degrees C + TEMP_FB_U17 | 01h | ok | 7.1 | 27 degrees C + TEMP_SW_U52 | 02h | ok | 7.1 | 30 degrees C + Fan2_Status | 07h | ok | 29.2 | Present + Fan2_Front | 0Eh | ok | 29.2 | 12000 RPM + Fan2_Rear | 46h | ok | 29.2 | 14700 RPM + PSU2_Status | 39h | ok | 10.2 | Presence detected + PSU2_Fan | 3Dh | ok | 10.2 | 16000 RPM + PSU2_VIn | 3Ah | ok | 10.2 | 234.30 Volts + PSU2_CIn | 3Bh | ok | 10.2 | 0.80 Amps + ''' + found = '' + + for line in sdr_elist_dump.splitlines(): + line = line.decode() + if sensor_name in line: + found = line.strip() + break + + if not found: + logging.error('Cannot find sensor name:' + sensor_name) + + else: + try: + found = found.split('|')[4] + except IndexError: + logging.error('Cannot get sensor data of:' + sensor_name) + + logging.basicConfig(level=logging.DEBUG) + return found + + +def read_temperature_sensors(): + sensor_list = [\ + ('Base_Temp_U5', 'Baseboard Left Temp'),\ + ('Base_Temp_U56', 'Baseboard Right Temp'),\ + ('Switch_Temp_U28', 'Switchboard Left Temp'),\ + ('Switch_Temp_U29', 'Switchboard Right Temp'),\ + ('CPU_Temp', 'CPU Internal Temp'),\ + ('Switch_Temp_U17', 'ASIC External Front Temp'),\ + ('Switch_Temp_U18', 'ASIC External Rear Temp'),\ + ('TEMP_SW_Internal', 'ASIC Internal Temp'),\ + ('VDD_ANLG_Temp', 'MP2975 VDD ANLG Temp'),\ + ('VDD_CORE_Temp', 'MP2975 VDD CORE Temp')\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Temperature Sensors\n" + output += "Adapter: IPMI adapter\n" + for sensor in sensor_list: + output += sensor_format.format('{}:'.format(sensor[1]),\ + sensor_dict[sensor[0]],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_fan_sensors(num_fans): + + sensor_list = [\ + ('Fan{}_Status', 'Fan Drawer {} Status'),\ + ('Fan{}_Front', 'Fan {} front'),\ + ('Fan{}_Rear', 'Fan {} rear'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Fan Drawers\n" + output += "Adapter: IPMI adapter\n" + for fan_num in range(1, num_fans+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(fan_num) + display_sensor_name = sensor[1].format(fan_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_psu_sensors(num_psus): + + sensor_list = [\ + ('PSU{}_Status', 'PSU {} Status'),\ + ('PSU{}_Fan', 'PSU {} Fan 1'),\ + ('PSU{}_VIn', 'PSU {} Input Voltage'),\ + ('PSU{}_CIn', 'PSU {} Input Current'),\ + ('PSU{}_PIn', 'PSU {} Input Power'),\ + ('PSU{}_Temp1', 'PSU {} Temp1'),\ + ('PSU{}_Temp2', 'PSU {} Temp2'),\ + ('PSU{}_VOut', 'PSU {} Output Voltage'),\ + ('PSU{}_COut', 'PSU {} Output Current'),\ + ('PSU{}_POut', 'PSU {} Output Power'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "PSU\n" + output += "Adapter: IPMI adapter\n" + for psu_num in range(1, num_psus+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(psu_num) + display_sensor_name = sensor[1].format(psu_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def main(): + output_string = '' + + if ipmi_sensor_dump(IPMI_SDR_CMD): + output_string += read_temperature_sensors() + output_string += read_psu_sensors(MAX_NUM_PSUS) + output_string += read_fan_sensors(MAX_NUM_FANS) + + print(output_string) + + +if __name__ == '__main__': + main() diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pre_pddf_init.sh b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pre_pddf_init.sh new file mode 100755 index 000000000000..2556858cdab9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pre_pddf_init.sh @@ -0,0 +1,30 @@ +#!/bin/bash + +# Probe Baseboard CPLD driver +modprobe baseboard_cpld +sleep 1 + +# Get BMC mode +PLATFORM=`sed -n 's/onie_platform=\(.*\)/\1/p' /host/machine.conf` +BMC_PRESENCE_SYS_PATH="/sys/bus/platform/devices/baseboard/bmc_presence" +BMC_PRESENCE=`cat ${BMC_PRESENCE_SYS_PATH}` +echo "Platform ${PLATFORM} BMC card ${BMC_PRESENCE}" + +# Copy pddf-device.json according to bmc mode +PDDF_JSON="pddf-device.json" +PDDF_JSON_BMC="pddf-device-bmc.json" +PDDF_JSON_NONBMC="pddf-device-nonbmc.json" +PDDF_JSON_PATH="/usr/share/sonic/device/${PLATFORM}/pddf" +PLATFORM_COMPONENTS_FILE="/usr/share/sonic/device/${PLATFORM}/platform_components.json" +if [ ${BMC_PRESENCE} == "present" ]; then + cp ${PDDF_JSON_PATH}/${PDDF_JSON_BMC} ${PDDF_JSON_PATH}/${PDDF_JSON} + # Add BMC component if BMC exists + if ! grep -q "BMC" ${PLATFORM_COMPONENTS_FILE}; then + sed -i '6i \ "BMC": {},' ${PLATFORM_COMPONENTS_FILE} + fi +else + # BMC Card absent + cp ${PDDF_JSON_PATH}/${PDDF_JSON_NONBMC} ${PDDF_JSON_PATH}/${PDDF_JSON} + # Remove BMC component for NonBMC + sed -i '/"BMC"/d' ${PLATFORM_COMPONENTS_FILE} +fi diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/sensors new file mode 100644 index 000000000000..5d740a9eb7d7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/sensors @@ -0,0 +1,11 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@" +docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@" diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/systemd/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-cel/ds3000/systemd/pddf-platform-init.service new file mode 100644 index 000000000000..f4098b34b60e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/systemd/pddf-platform-init.service @@ -0,0 +1,16 @@ +[Unit] +Description=PDDF module and device initialization service +Before=pmon.service watchdog-control.service +Before=opennsl-modules.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStartPre=-/usr/local/bin/pre_pddf_init.sh +ExecStart=/usr/local/bin/pddf_util.py install +ExecStop=/usr/local/bin/pddf_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target +WantedBy=opennsl-modules.service diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/afulnx_64 b/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/afulnx_64 new file mode 100755 index 000000000000..0ba1549c2891 Binary files /dev/null and b/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/afulnx_64 differ diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/fpga_prog b/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/fpga_prog new file mode 100755 index 000000000000..3227da590a0a Binary files /dev/null and b/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/fpga_prog differ diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/ispvm b/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/ispvm new file mode 100755 index 000000000000..f8e216556ebe Binary files /dev/null and b/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/ispvm differ diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/pddf_switch_svc.py new file mode 100644 index 000000000000..319178d62a41 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/pddf_switch_svc.py @@ -0,0 +1,83 @@ +#!/usr/bin/env python +# Script to stop and start the respective platforms default services. +# This will be used while switching the pddf->non-pddf mode and vice versa +import os +import sys +import commands + +def check_pddf_support(): + return True + +def stop_platform_svc(): + status, output = commands.getstatusoutput("systemctl stop xxxx-platform-init.service") + if status: + print "Stop xxxx-platform-init.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl disable xxxx-platform-init.service") + if status: + print "Disable xxxx-platform-init.service failed %d"%status + return False + + status, output = commands.getstatusoutput("/usr/local/bin/xxxx_util.py clean") + if status: + print "xxxx_util.py clean command failed %d"%status + return False + + # HACK , stop the pddf-platform-init service if it is active + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service along with other platform serives failed %d"%status + return False + + return True + +def start_platform_svc(): + status, output = commands.getstatusoutput("/usr/local/bin/xxxx_util.py install") + if status: + print "xxxx_util.py install command failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl enable xxxx-platform-init.service") + if status: + print "Enable xxxx-platform-init.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl start xxxx-platform-init.service") + if status: + print "Start xxxx-platform-init.service failed %d"%status + return False + + return True + +def start_platform_pddf(): + # Enable PDDF 2.0 object class for xxxx + status, output = commands.getstatusoutput("mkdir /usr/share/sonic/platform/sonic_platform") + if status: + print "Unable to create 2.0 object class folder /usr/share/sonic/platform/sonic_platform" + return False + + status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service") + if status: + print "Start pddf-platform-init.service failed %d"%status + return False + + return True + +def stop_platform_pddf(): + # Disable PDDF 2.0 object class for xxxx + status, output = commands.getstatusoutput("rm -r /usr/share/sonic/platform/sonic_platform") + if status: + print "Unable to delete 2.0 object class folder /usr/share/sonic/platform/sonic_platform" + return False + + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service failed %d"%status + return False + + return True + +def main(): + pass + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/pid_config_questone2.ini b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/pid_config_questone2.ini new file mode 100644 index 000000000000..7227dd6273c2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/pid_config_questone2.ini @@ -0,0 +1,19 @@ +#[PID thermal control setting] +[PID enable] +PID_enable=0 + +[SWITCH_TEMP] +setpoint = 95 +P = 3 +I = 0.5 +D = 0.5 +min_output = 76 + +[CPU_TEMP] +setpoint = -15 +P = 3 +I = 0.5 +D = 0.5 +min_output = 76 + + diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modprobe.conf b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modprobe.conf new file mode 100644 index 000000000000..57a28ea72eac --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modprobe.conf @@ -0,0 +1 @@ +options switchboard_fpga allow_unsafe_i2c_access=1 \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modules.conf b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modules.conf new file mode 100644 index 000000000000..574c48f7a66f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modules.conf @@ -0,0 +1,16 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus + +i2c-mux-gpio +i2c-mux-pca954x +8021q + diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/Makefile new file mode 100644 index 000000000000..c32df8e5e6e1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/Makefile @@ -0,0 +1 @@ +obj-m := mc24lc64t.o questone2_switchboard.o questone2_baseboard_cpld.o diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/modules/mc24lc64t.c b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/mc24lc64t.c new file mode 100644 index 000000000000..4603b3d41065 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/mc24lc64t.c @@ -0,0 +1,171 @@ +/* + * mc24lc64t.c - driver for Microchip 24LC64T + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define EEPROM_SIZE 8192 //mc24lt64t eeprom size in bytes. + +struct mc24lc64t_data { + struct mutex update_lock; +}; + +static ssize_t mc24lc64t_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, read_time, i = 0; + int status; + + mutex_lock(&drvdata->update_lock); + + if (i2c_smbus_write_byte_data(client, off>>8, off)) + { + status = -EIO; + goto exit; + } + + msleep(1); + +begin: + + if (i < count) + { + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + do { + read_time = jiffies; + + status = i2c_smbus_read_byte(client); + if (status >= 0) + { + buf[i++] = status; + goto begin; + } + } while (time_before(read_time, timeout)); + + status = -ETIMEDOUT; + goto exit; + } + + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + + return status; +} + +static ssize_t mc24lc64t_write (struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count){ + + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, write_time, i = 0; + int status; + u16 value; + + mutex_lock(&drvdata->update_lock); + +begin: + if (i < count){ + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + value = (buf[i] << 8)| off; + do { + write_time = jiffies; + status = i2c_smbus_write_word_data(client, off>>8, value); + if (status >= 0) + { + // increase offset + off++; + // increase buffer index + i++; + goto begin; + } + } while (time_before(write_time, timeout)); + status = -ETIMEDOUT; + goto exit; + } + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + return status; +} + +static struct bin_attribute mc24lc64t_bit_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUGO, + }, + .size = EEPROM_SIZE, + .read = mc24lc64t_read, + .write = mc24lc64t_write, +}; + +static int mc24lc64t_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adapter = client->adapter; + struct mc24lc64t_data *drvdata; + int err; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA + | I2C_FUNC_SMBUS_READ_BYTE)) + return -EPFNOSUPPORT; + + if (!(drvdata = devm_kzalloc(&client->dev, + sizeof(struct mc24lc64t_data), GFP_KERNEL))) + return -ENOMEM; + + i2c_set_clientdata(client, drvdata); + mutex_init(&drvdata->update_lock); + + err = sysfs_create_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); + + return err; +} + +static void mc24lc64t_remove(struct i2c_client *client) +{ + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + sysfs_remove_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); +} + +static const struct i2c_device_id mc24lc64t_id[] = { + { "24lc64t", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mc24lc64t_id); + +static struct i2c_driver mc24lc64t_driver = { + .driver = { + .name = "mc24lc64t", + .owner = THIS_MODULE, + }, + .probe = mc24lc64t_probe, + .remove = mc24lc64t_remove, + .id_table = mc24lc64t_id, +}; + +module_i2c_driver(mc24lc64t_driver); + +MODULE_AUTHOR("Abhisit Sangjan "); +MODULE_DESCRIPTION("Microchip 24LC64T Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_baseboard_cpld.c b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_baseboard_cpld.c new file mode 100644 index 000000000000..20c353ee5d00 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_baseboard_cpld.c @@ -0,0 +1,408 @@ +/* + * seastone2_baseboard_cpld.c - driver for Seastone2 Base Board CPLD + * This driver implement sysfs for CPLD register access using LPC bus. + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "sys_cpld" +/** + * CPLD register address for read and write. + */ +#define VERSION_ADDR 0xA100 +#define SCRATCH_ADDR 0xA101 +#define SYS_LED_ADDR 0xA162 +#define THERMAL_ADDR 0xA176 +#define CPLD_REGISTER_SIZE 0x77 + +struct baseboard_cpld_data { + struct mutex cpld_lock; + uint16_t read_addr; +}; + +struct baseboard_cpld_data *cpld_data; + +/** + * Read the value from scratch register as hex string. + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t scratch_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf,"0x%2.2x\n", data); +} + +/** + * Set scratch register with specific hex string. + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t scratch_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned long data; + char *last; + + mutex_lock(&cpld_data->cpld_lock); + data = (uint16_t)strtoul(buf,&last,16); + if(data == 0 && buf == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + outb(data, SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(scratch); + + +/* CPLD version attributes */ +static ssize_t version_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + int len = sprintf(buf, "0x%2.2x\n",inb(VERSION_ADDR)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RO(version); + + +static ssize_t getreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // CPLD register is one byte + uint16_t addr; + char *last; + + addr = (uint16_t)strtoul(buf,&last,16); + if(addr == 0 && buf == last){ + return -EINVAL; + } + cpld_data->read_addr = addr; + return count; +} + +static ssize_t getreg_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + int len = sprintf(buf, "0x%2.2x\n",inb(cpld_data->read_addr)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RW(getreg); + +static ssize_t setreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // CPLD register is one byte + uint16_t addr; + uint8_t value; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + + strscpy(clone, buf, count); + + mutex_lock(&cpld_data->cpld_lock); + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + addr = (uint16_t)strtoul(tok,&last,16); + if(addr == 0 && tok == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + value = (uint8_t)strtoul(tok,&last,16); + if(value == 0 && tok == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + outb(value,addr); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_WO(setreg); + +/** + * Read all CPLD register in binary mode. + * @return number of byte read. + */ +static ssize_t dump_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + unsigned long i=0; + ssize_t status; + + mutex_lock(&cpld_data->cpld_lock); +begin: + if(i < count){ + buf[i++] = inb(VERSION_ADDR + off); + off++; + msleep(1); + goto begin; + } + status = count; +exit: + mutex_unlock(&cpld_data->cpld_lock); + return status; +} +static BIN_ATTR_RO(dump, CPLD_REGISTER_SIZE); + +/** + * Show system led status - on/off/1k/4k + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t sys_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + data = data & 0x3; + return sprintf(buf, "%s\n", + data == 0x03 ? "off" : data == 0x02 ? "4k" : data ==0x01 ? "1k": "on"); +} + +/** + * Set the status of system led - on/off/1k/4k + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t sys_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status,data; + if(sysfs_streq(buf, "off")){ + led_status = 0x03; + }else if(sysfs_streq(buf, "4k")){ + led_status = 0x02; + }else if(sysfs_streq(buf, "1k")){ + led_status = 0x01; + }else if(sysfs_streq(buf, "on")){ + led_status = 0x00; + }else{ + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + data = data & ~(0x3); + data = data | led_status; + outb(data, SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(sys_led); + +/** + * Show system led color - both/green/yellow/none + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t sys_led_color_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + data = (data >> 4) & 0x3; + return sprintf(buf, "%s\n", + data == 0x03 ? "off" : data == 0x02 ? "yellow" : data ==0x01 ? "green": "both"); +} + +/** + * Set the color of system led - both/green/yellow/none + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t sys_led_color_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status,data; + if(sysfs_streq(buf, "off")){ + led_status = 0x03; + }else if(sysfs_streq(buf, "yellow")){ + led_status = 0x02; + }else if(sysfs_streq(buf, "green")){ + led_status = 0x01; + }else if(sysfs_streq(buf, "both")){ + led_status = 0x00; + }else{ + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + data = data & ~( 0x3 << 4); + data = data | (led_status << 4); + outb(data, SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(sys_led_color); + +static struct attribute *baseboard_cpld_attrs[] = { + &dev_attr_version.attr, + &dev_attr_scratch.attr, + &dev_attr_getreg.attr, + &dev_attr_setreg.attr, + &dev_attr_sys_led.attr, + &dev_attr_sys_led_color.attr, + NULL, +}; + +static struct bin_attribute *baseboard_cpld_bin_attrs[] = { + &bin_attr_dump, + NULL, +}; + +static struct attribute_group baseboard_cpld_attrs_grp = { + .attrs = baseboard_cpld_attrs, + .bin_attrs = baseboard_cpld_bin_attrs, +}; + +static struct resource baseboard_cpld_resources[] = { + { + .start = 0xA100, + .end = 0xA1FF, + .flags = IORESOURCE_IO, + }, +}; + +static void baseboard_cpld_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device baseboard_cpld_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(baseboard_cpld_resources), + .resource = baseboard_cpld_resources, + .dev = { + .release = baseboard_cpld_dev_release, + } +}; + +static int baseboard_cpld_drv_probe(struct platform_device *pdev) +{ + struct resource *res; + int ret =0; + int portid_count; + + cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct baseboard_cpld_data), + GFP_KERNEL); + if (!cpld_data) + return -ENOMEM; + + mutex_init(&cpld_data->cpld_lock); + + cpld_data->read_addr = VERSION_ADDR; + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (unlikely(!res)) { + printk(KERN_ERR "Specified Resource Not Available...\n"); + return -1; + } + + ret = sysfs_create_group(&pdev->dev.kobj, &baseboard_cpld_attrs_grp); + if (ret) { + printk(KERN_ERR "Cannot create sysfs for baseboard CPLD\n"); + } + return 0; +} + +static int baseboard_cpld_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &baseboard_cpld_attrs_grp); + return 0; +} + +static struct platform_driver baseboard_cpld_drv = { + .probe = baseboard_cpld_drv_probe, + .remove = __exit_p(baseboard_cpld_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int baseboard_cpld_init(void) +{ + // Register platform device and platform driver + platform_device_register(&baseboard_cpld_dev); + platform_driver_register(&baseboard_cpld_drv); + return 0; +} + +void baseboard_cpld_exit(void) +{ + // Unregister platform device and platform driver + platform_driver_unregister(&baseboard_cpld_drv); + platform_device_unregister(&baseboard_cpld_dev); +} + +module_init(baseboard_cpld_init); +module_exit(baseboard_cpld_exit); + +MODULE_AUTHOR("Pradchaya Phucharoen "); +MODULE_DESCRIPTION("Celestica Seastone2/Questone2 Baseboard CPLD Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_switchboard.c b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_switchboard.c new file mode 100644 index 000000000000..945d5f26c875 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_switchboard.c @@ -0,0 +1,2211 @@ +/* + * seastone_switchboard.c - driver for seastone2/questone2 Switch board FPGA/CPLD. + * + * Author: Pradchaya Phucharoen + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * / + * \--sys + * \--devices + * \--platform + * \--seastone2 + * |--FPGA + * |--CPLD1 + * |--CPLD2 + * \--SFF + * |--QSFP[1..32] + * \--SFP[1..2] + * + */ + +#ifndef TEST_MODE +#define MOD_VERSION "2.0.0" +#else +#define MOD_VERSION "TEST" +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + + +static int majorNumber; +#ifdef SEASTONE2 +#define CLASS_NAME "seastone2_fpga" +#define DRIVER_NAME "seastone2" +#define FPGA_PCI_NAME "Seastone2_fpga_pci" +#else +#define CLASS_NAME "questone2_fpga" +#define DRIVER_NAME "questone2" +#define FPGA_PCI_NAME "questone2_fpga_pci" +#endif +#define DEVICE_NAME "fwupgrade" + + +static int smbus_access(struct i2c_adapter *adapter, u16 addr, + unsigned short flags, char rw, u8 cmd, + int size, union i2c_smbus_data *data); + +static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr, + unsigned short flags, char rw, u8 cmd, + int size, union i2c_smbus_data *data); + +static int fpgafw_init(void); +static void fpgafw_exit(void); + + +/* +======================================== +FPGA PCIe BAR 0 Registers +======================================== +Misc Control 0x00000000 – 0x000000FF. +I2C_CH1 0x00000100 - 0x00000110 +I2C_CH2 0x00000200 - 0x00000210. +I2C_CH3 0x00000300 - 0x00000310. +I2C_CH4 0x00000400 - 0x00000410. +I2C_CH5 0x00000500 - 0x00000510. +I2C_CH6 0x00000600 - 0x00000610. +I2C_CH7 0x00000700 - 0x00000710. +I2C_CH8 0x00000800 - 0x00000810. +I2C_CH9 0x00000900 - 0x00000910. +I2C_CH10 0x00000A00 - 0x00000A10. +SPI Master 0x00001200 - 0x00001300. +PORT XCVR 0x00004000 - 0x00004FFF. +*/ + +/* MISC */ +#define FPGA_VERSION 0x0000 +#define FPGA_VERSION_MJ_MSK 0xff00 +#define FPGA_VERSION_MN_MSK 0x00ff +#define FPGA_SCRATCH 0x0004 +#define FPGA_BROAD_TYPE 0x0008 +#define FPGA_BROAD_REV_MSK 0x0038 +#define FPGA_BROAD_ID_MSK 0x0007 +#define FPGA_PLL_STATUS 0x0014 +#define BMC_I2C_SCRATCH 0x0020 +#define FPGA_SLAVE_CPLD_REST 0x0030 +#define FPGA_PERIPH_RESET_CTRL 0x0034 +#define FPGA_INT_STATUS 0x0040 +#define FPGA_INT_SRC_STATUS 0x0044 +#define FPGA_INT_FLAG 0x0048 +#define FPGA_INT_MASK 0x004c +#define FPGA_MISC_CTRL 0x0050 +#define FPGA_MISC_STATUS 0x0054 +#define FPGA_AVS_VID_STATUS 0x0068 +#define FPGA_FEATURE_CARD_GPIO 0x0070 +#define FPGA_PORT_XCVR_READY 0x000c + +/* I2C_MASTER BASE ADDR */ +#define I2C_MASTER_FREQ_1 0x0100 +#define I2C_MASTER_CTRL_1 0x0104 +#define I2C_MASTER_STATUS_1 0x0108 +#define I2C_MASTER_DATA_1 0x010c +#define I2C_MASTER_PORT_ID_1 0x0110 +#define I2C_MASTER_CH_1 1 +#define I2C_MASTER_CH_2 2 +#define I2C_MASTER_CH_3 3 +#define I2C_MASTER_CH_4 4 +#define I2C_MASTER_CH_5 5 +#define I2C_MASTER_CH_6 6 +#define I2C_MASTER_CH_7 7 +#define I2C_MASTER_CH_8 8 +#define I2C_MASTER_CH_9 9 +#define I2C_MASTER_CH_10 10 +#define I2C_MASTER_CH_TOTAL I2C_MASTER_CH_10 + +/* SPI_MASTER */ +#define SPI_MASTER_WR_EN 0x1200 /* one bit */ +#define SPI_MASTER_WR_DATA 0x1204 /* 32 bits */ +#define SPI_MASTER_CHK_ID 0x1208 /* one bit */ +#define SPI_MASTER_VERIFY 0x120c /* one bit */ +#define SPI_MASTER_STATUS 0x1210 /* 15 bits */ +#define SPI_MASTER_MODULE_RST 0x1214 /* one bit */ + +/* FPGA FRONT PANEL PORT MGMT */ +#define SFF_PORT_CTRL_BASE 0x4000 +#define SFF_PORT_STATUS_BASE 0x4004 +#define SFF_PORT_INT_STATUS_BASE 0x4008 +#define SFF_PORT_INT_MASK_BASE 0x400c + +#define PORT_XCVR_REGISTER_SIZE 0x1000 + +/* PORT CTRL REGISTER +[31:7] RSVD +[6] LPMOD 6 +[5] RSVD +[4] RST 4 +[3:1] RSVD +[0] TXDIS 0 +*/ +#define CTRL_LPMOD 6 +#define CTRL_RST 4 +#define CTRL_TXDIS 0 + +/* PORT STATUS REGISTER +[31:6] RSVD +[5] IRQ 5 +[4] PRESENT 4 +[3] RSVD +[2] TXFAULT 2 +[1] RXLOS 1 +[0] MODABS 0 +*/ +#define STAT_IRQ 5 +#define STAT_PRESENT 4 +#define STAT_TXFAULT 2 +#define STAT_RXLOS 1 +#define STAT_MODABS 0 + +/* PORT INTRPT REGISTER +[31:6] RSVD +[5] INT_N 5 +[4] PRESENT 4 +[3] RSVD +[2] RSVD +[1] RXLOS 1 +[0] MODABS 0 +*/ +#define INTR_INT_N 5 +#define INTR_PRESENT 4 +#define INTR_TXFAULT 2 +#define INTR_RXLOS 1 +#define INTR_MODABS 0 + +/* PORT INT MASK REGISTER +[31:6] RSVD +[5] INT_N 5 +[4] PRESENT 4 +[3] RSVD +[2] RSVD +[1] RXLOS_INT 1 +[0] MODABS 0 +*/ +#define MASK_INT_N 5 +#define MASK_PRESENT 4 +#define MASK_TXFAULT 2 +#define MASK_RXLOS 1 +#define MASK_MODABS 0 + +enum { + I2C_SR_BIT_RXAK = 0, + I2C_SR_BIT_MIF, + I2C_SR_BIT_SRW, + I2C_SR_BIT_BCSTM, + I2C_SR_BIT_MAL, + I2C_SR_BIT_MBB, + I2C_SR_BIT_MAAS, + I2C_SR_BIT_MCF +}; + +enum { + I2C_CR_BIT_BCST = 0, + I2C_CR_BIT_RSTA = 2, + I2C_CR_BIT_TXAK, + I2C_CR_BIT_MTX, + I2C_CR_BIT_MSTA, + I2C_CR_BIT_MIEN, + I2C_CR_BIT_MEN, +}; + +/** + * + * The function is i2c algorithm implement to allow master access to + * correct endpoint devices trough the PCA9548 switch devices. + * + * FPGA I2C Master [mutex resource] + * | + * | + * --------------------------- + * | PCA9548(s) | + * ---1--2--3--4--5--6--7--8-- + * | | | | | | | | + * EEPROM ... EEPROM + * + */ + + +#ifdef SEASTONE2 +#define VIRTUAL_I2C_QSFP_PORT 32 +#define VIRTUAL_I2C_SFP_PORT 1 +#define VIRTUAL_I2C_CPLD_PORT 1 +#define VIRTUAL_I2C_POWER_CHIP_PORT 1 +#define VIRTUAL_I2C_CPLD_B_PORT 1 +#define VIRTUAL_I2C_PSU 1 +#define VIRTUAL_I2C_FAN_TRAY 4 +#define VIRTUAL_I2C_POWER_MON 1 +#define VIRTUAL_I2C_LM75 1 + +#define VIRTUAL_I2C_PORT_LENGTH \ + VIRTUAL_I2C_SFP_PORT+VIRTUAL_I2C_QSFP_PORT+VIRTUAL_I2C_POWER_CHIP_PORT+VIRTUAL_I2C_CPLD_PORT+VIRTUAL_I2C_CPLD_B_PORT+VIRTUAL_I2C_PSU+VIRTUAL_I2C_FAN_TRAY+VIRTUAL_I2C_POWER_MON+VIRTUAL_I2C_LM75 + +#define SFF_PORT_TOTAL VIRTUAL_I2C_QSFP_PORT+VIRTUAL_I2C_SFP_PORT +#else +#define VIRTUAL_I2C_SFP_PORT 48 +#define VIRTUAL_I2C_QSFP_PORT 8 +#define VIRTUAL_I2C_CPLD_PORT 1 +#define VIRTUAL_I2C_POWER_CHIP_PORT 1 +#define VIRTUAL_I2C_CPLD_B_PORT 1 +#define VIRTUAL_I2C_PSU 1 +#define VIRTUAL_I2C_FAN_TRAY 4 +#define VIRTUAL_I2C_POWER_MON 1 +#define VIRTUAL_I2C_LM75 1 + +#define VIRTUAL_I2C_PORT_LENGTH \ + VIRTUAL_I2C_SFP_PORT+VIRTUAL_I2C_QSFP_PORT+VIRTUAL_I2C_POWER_CHIP_PORT+VIRTUAL_I2C_CPLD_PORT+VIRTUAL_I2C_CPLD_B_PORT+VIRTUAL_I2C_PSU+VIRTUAL_I2C_FAN_TRAY+VIRTUAL_I2C_POWER_MON+VIRTUAL_I2C_LM75 + +#define SFF_PORT_TOTAL VIRTUAL_I2C_QSFP_PORT+VIRTUAL_I2C_SFP_PORT +#endif + +#define VIRTUAL_I2C_CPLD_INDEX SFF_PORT_TOTAL + +#define VIRTUAL_I2C_BUS_OFFSET 2 +#define CPLD1_SLAVE_ADDR 0x30 +#define CPLD2_SLAVE_ADDR 0x31 + +static struct class* fpgafwclass = NULL; ///< The device-driver class struct pointer +static struct device* fpgafwdev = NULL; ///< The device-driver device struct pointer + +#define PCI_VENDOR_ID_TEST 0x1af4 + +#ifndef PCI_VENDOR_ID_XILINX +#define PCI_VENDOR_ID_XILINX 0x10EE +#endif + +#define FPGA_PCIE_DEVICE_ID 0x7021 +#define TEST_PCIE_DEVICE_ID 0x1110 + + +#ifdef DEBUG_KERN +#define info(fmt,args...) printk(KERN_INFO "line %3d : "fmt,__LINE__,##args) +#define check(REG) printk(KERN_INFO "line %3d : %-8s = %2.2X",__LINE__,#REG,ioread8(REG)); +#else +#define info(fmt,args...) +#define check(REG) +#endif + +#define GET_REG_BIT(REG,BIT) ((ioread8(REG) >> BIT) & 0x01) +#define SET_REG_BIT_H(REG,BIT) iowrite8(ioread8(REG) | (0x01 << BIT),REG) +#define SET_REG_BIT_L(REG,BIT) iowrite8(ioread8(REG) & ~(0x01 << BIT),REG) + +static struct mutex fpga_i2c_master_locks[I2C_MASTER_CH_TOTAL]; +/* Store lasted switch address and channel */ +static uint16_t fpga_i2c_lasted_access_port[I2C_MASTER_CH_TOTAL]; + +enum PORT_TYPE { + NONE, + QSFP, + SFP +}; + +struct i2c_switch{ + unsigned char master_bus; // I2C bus number + unsigned char switch_addr; // PCA9548 device address, 0xFF if directly connect to a bus. + unsigned char channel; // PCA9548 channel number. If the switch_addr is 0xFF, this value is ignored. + enum PORT_TYPE port_type; // QSFP/SFP tranceiver port type. + char calling_name[20]; // Calling name. +}; + +struct i2c_dev_data { + int portid; + struct i2c_switch pca9548; +}; + +#ifdef SEASTONE2 +/* PREDEFINED I2C SWITCH DEVICE TOPOLOGY */ +static struct i2c_switch fpga_i2c_bus_dev[] = { + /* BUS2 QSFP Exported as virtual bus */ + {I2C_MASTER_CH_2,0x72,0,QSFP,"QSFP1"}, {I2C_MASTER_CH_2,0x72,1,QSFP,"QSFP2"}, {I2C_MASTER_CH_2,0x72,2,QSFP,"QSFP3"}, {I2C_MASTER_CH_2,0x72,3,QSFP,"QSFP4"}, + {I2C_MASTER_CH_2,0x72,4,QSFP,"QSFP5"}, {I2C_MASTER_CH_2,0x72,5,QSFP,"QSFP6"}, {I2C_MASTER_CH_2,0x72,6,QSFP,"QSFP7"}, {I2C_MASTER_CH_2,0x72,7,QSFP,"QSFP8"}, + {I2C_MASTER_CH_2,0x73,0,QSFP,"QSFP9"}, {I2C_MASTER_CH_2,0x73,1,QSFP,"QSFP10"},{I2C_MASTER_CH_2,0x73,2,QSFP,"QSFP11"},{I2C_MASTER_CH_2,0x73,3,QSFP,"QSFP12"}, + {I2C_MASTER_CH_2,0x73,4,QSFP,"QSFP13"},{I2C_MASTER_CH_2,0x73,5,QSFP,"QSFP14"},{I2C_MASTER_CH_2,0x73,6,QSFP,"QSFP15"},{I2C_MASTER_CH_2,0x73,7,QSFP,"QSFP16"}, + {I2C_MASTER_CH_2,0x74,0,QSFP,"QSFP17"},{I2C_MASTER_CH_2,0x74,1,QSFP,"QSFP18"},{I2C_MASTER_CH_2,0x74,2,QSFP,"QSFP19"},{I2C_MASTER_CH_2,0x74,3,QSFP,"QSFP20"}, + {I2C_MASTER_CH_2,0x74,4,QSFP,"QSFP21"},{I2C_MASTER_CH_2,0x74,5,QSFP,"QSFP22"},{I2C_MASTER_CH_2,0x74,6,QSFP,"QSFP23"},{I2C_MASTER_CH_2,0x74,7,QSFP,"QSFP24"}, + {I2C_MASTER_CH_2,0x75,0,QSFP,"QSFP25"},{I2C_MASTER_CH_2,0x75,1,QSFP,"QSFP26"},{I2C_MASTER_CH_2,0x75,2,QSFP,"QSFP27"},{I2C_MASTER_CH_2,0x75,3,QSFP,"QSFP28"}, + {I2C_MASTER_CH_2,0x75,4,QSFP,"QSFP29"},{I2C_MASTER_CH_2,0x75,5,QSFP,"QSFP30"},{I2C_MASTER_CH_2,0x75,6,QSFP,"QSFP31"},{I2C_MASTER_CH_2,0x75,7,QSFP,"QSFP32"}, + /* BUS1 SFP+ Exported as virtual bus */ + {I2C_MASTER_CH_1,0x72,0,SFP,"SFP1"},{I2C_MASTER_CH_1,0x72,1,SFP,"SFP2"}, + /* BUS3 CPLD Access via SYSFS */ + {I2C_MASTER_CH_3,0xFF,0,NONE,"CPLD"}, + /* BUS5 POWER CHIP Exported as virtual bus */ + {I2C_MASTER_CH_5,0xFF,0,NONE,"POWER"}, + /* BUS4 CPLD_B */ + {I2C_MASTER_CH_4,0xFF,0,NONE,"CPLD_B"}, + /* BUS6 PSU */ + {I2C_MASTER_CH_6,0xFF,0,NONE,"PSU"}, + /* BUS7 FAN */ + /* Channel 2 is no hardware connected */ + {I2C_MASTER_CH_7,0x77,0,NONE,"FAN5"},{I2C_MASTER_CH_7,0x77,1,NONE,"FAN4"},{I2C_MASTER_CH_7,0x77,3,NONE,"FAN2"},{I2C_MASTER_CH_7,0x77,4,NONE,"FAN1"}, + /* BUS8 POWER MONITOR */ + {I2C_MASTER_CH_8,0xFF,0,NONE,"UCD90120"}, + /* BUS9 LM75 */ + {I2C_MASTER_CH_9,0xFF,0,NONE,"LM75"}, +}; +#else +/* PREDEFINED I2C SWITCH DEVICE TOPOLOGY */ +static struct i2c_switch fpga_i2c_bus_dev[] = { + /* BUS1 SFP Exported as virtual bus */ + {I2C_MASTER_CH_10,0x72,0,SFP,"SFP1"}, {I2C_MASTER_CH_10,0x72,1,SFP,"SFP2"}, {I2C_MASTER_CH_10,0x72,2,SFP,"SFP3"}, {I2C_MASTER_CH_10,0x72,3,SFP,"SFP4"}, + {I2C_MASTER_CH_10,0x72,4,SFP,"SFP5"}, {I2C_MASTER_CH_10,0x72,5,SFP,"SFP6"}, {I2C_MASTER_CH_10,0x72,6,SFP,"SFP7"}, {I2C_MASTER_CH_10,0x72,7,SFP,"SFP8"}, + {I2C_MASTER_CH_10,0x73,0,SFP,"SFP9"}, {I2C_MASTER_CH_10,0x73,1,SFP,"SFP10"},{I2C_MASTER_CH_10,0x73,2,SFP,"SFP11"},{I2C_MASTER_CH_10,0x73,3,SFP,"SFP12"}, + {I2C_MASTER_CH_10,0x73,4,SFP,"SFP13"},{I2C_MASTER_CH_10,0x73,5,SFP,"SFP14"},{I2C_MASTER_CH_10,0x73,6,SFP,"SFP15"},{I2C_MASTER_CH_10,0x73,7,SFP,"SFP16"}, + {I2C_MASTER_CH_10,0x74,0,SFP,"SFP17"},{I2C_MASTER_CH_10,0x74,1,SFP,"SFP18"},{I2C_MASTER_CH_10,0x74,2,SFP,"SFP19"},{I2C_MASTER_CH_10,0x74,3,SFP,"SFP20"}, + {I2C_MASTER_CH_10,0x74,4,SFP,"SFP21"},{I2C_MASTER_CH_10,0x74,5,SFP,"SFP22"},{I2C_MASTER_CH_10,0x74,6,SFP,"SFP23"},{I2C_MASTER_CH_10,0x74,7,SFP,"SFP24"}, + {I2C_MASTER_CH_10,0x75,0,SFP,"SFP25"},{I2C_MASTER_CH_10,0x75,1,SFP,"SFP26"},{I2C_MASTER_CH_10,0x75,2,SFP,"SFP27"},{I2C_MASTER_CH_10,0x75,3,SFP,"SFP28"}, + {I2C_MASTER_CH_10,0x75,4,SFP,"SFP29"},{I2C_MASTER_CH_10,0x75,5,SFP,"SFP30"},{I2C_MASTER_CH_10,0x75,6,SFP,"SFP31"},{I2C_MASTER_CH_10,0x75,7,SFP,"SFP32"}, + {I2C_MASTER_CH_10,0x76,0,SFP,"SFP33"},{I2C_MASTER_CH_10,0x76,1,SFP,"SFP34"},{I2C_MASTER_CH_10,0x76,2,SFP,"SFP35"},{I2C_MASTER_CH_10,0x76,3,SFP,"SFP36"}, + {I2C_MASTER_CH_10,0x76,4,SFP,"SFP37"},{I2C_MASTER_CH_10,0x76,5,SFP,"SFP38"},{I2C_MASTER_CH_10,0x76,6,SFP,"SFP39"},{I2C_MASTER_CH_10,0x76,7,SFP,"SFP40"}, + {I2C_MASTER_CH_10,0x77,0,SFP,"SFP41"},{I2C_MASTER_CH_10,0x77,1,SFP,"SFP42"},{I2C_MASTER_CH_10,0x77,2,SFP,"SFP43"},{I2C_MASTER_CH_10,0x77,3,SFP,"SFP44"}, + {I2C_MASTER_CH_10,0x77,4,SFP,"SFP45"},{I2C_MASTER_CH_10,0x77,5,SFP,"SFP46"},{I2C_MASTER_CH_10,0x77,6,SFP,"SFP47"},{I2C_MASTER_CH_10,0x77,7,SFP,"SFP48"}, + /* BUS2 QSFP28 Exported as virtual bus */ + {I2C_MASTER_CH_2,0x74,4,QSFP,"QSFP1"},{I2C_MASTER_CH_2,0x74,5,QSFP,"QSFP2"},{I2C_MASTER_CH_2,0x74,6,QSFP,"QSFP3"},{I2C_MASTER_CH_2,0x74,7,QSFP,"QSFP4"}, + {I2C_MASTER_CH_2,0x74,0,QSFP,"QSFP5"},{I2C_MASTER_CH_2,0x74,1,QSFP,"QSFP6"},{I2C_MASTER_CH_2,0x74,2,QSFP,"QSFP7"},{I2C_MASTER_CH_2,0x74,3,QSFP,"QSFP8"}, + /* BUS3 CPLD Access via SYSFS */ + {I2C_MASTER_CH_3,0xFF,0,NONE,"CPLD"}, + /* BUS5 POWER CHIP Exported as virtual bus */ + {I2C_MASTER_CH_5,0xFF,0,NONE,"POWER"}, + /* BUS4 CPLD_B */ + {I2C_MASTER_CH_4,0xFF,0,NONE,"CPLD_B"}, + /* BUS6 PSU */ + {I2C_MASTER_CH_6,0xFF,0,NONE,"PSU"}, + /* BUS7 FAN */ + /* Channel 2 is no hardware connected */ + {I2C_MASTER_CH_7,0x77,0,NONE,"FAN5"},{I2C_MASTER_CH_7,0x77,1,NONE,"FAN4"},{I2C_MASTER_CH_7,0x77,3,NONE,"FAN2"},{I2C_MASTER_CH_7,0x77,4,NONE,"FAN1"}, + /* BUS8 UCD90120 */ + {I2C_MASTER_CH_8,0xFF,0,NONE,"UCD90120"}, + /* BUS9 TEMP SENSOR LM75 */ + {I2C_MASTER_CH_9,0xFF,0,NONE,"LM75"} +}; +#endif +struct fpga_device{ + /* data mmio region */ + void __iomem *data_base_addr; + resource_size_t data_mmio_start; + resource_size_t data_mmio_len; +}; + +static struct fpga_device fpga_dev = { + .data_base_addr = NULL, + .data_mmio_start = NULL, + .data_mmio_len = NULL, +}; + +struct seastone2_fpga_data { + struct device *sff_devices[SFF_PORT_TOTAL]; + struct i2c_client *sff_i2c_clients[SFF_PORT_TOTAL]; + struct i2c_adapter *i2c_adapter[VIRTUAL_I2C_PORT_LENGTH]; + struct mutex fpga_lock; // For FPGA internal lock + unsigned long fpga_read_addr; + uint8_t cpld1_read_addr; + uint8_t cpld2_read_addr; +}; + +struct sff_device_data { + int portid; + enum PORT_TYPE port_type; +}; + +struct seastone2_fpga_data *fpga_data; + +/* + * Kernel object for other module drivers. + * Other module can use these kobject as a parent. + */ + +static struct kobject *fpga = NULL; +static struct kobject *cpld1 = NULL; +static struct kobject *cpld2 = NULL; + +/** + * Device node in sysfs tree. + */ +static struct device *sff_dev = NULL; + +/** + * [get_fpga_reg_value description] + * @param dev [description] + * @param devattr [description] + * @param buf [description] + * @return [description] + */ +static ssize_t get_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + // read data from the address + uint32_t data; + data = ioread32(fpga_data->fpga_read_addr); + return sprintf(buf,"0x%8.8x\n",data); +} +/** + * [set_fpga_reg_address description] + * @param dev [description] + * @param devattr [description] + * @param buf [description] + * @param count [description] + * @return [description] + */ +static ssize_t set_fpga_reg_address(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t addr; + char *last; + + addr = (uint32_t)strtoul(buf,&last,16); + if(addr == 0 && buf == last){ + return -EINVAL; + } + fpga_data->fpga_read_addr = fpga_dev.data_base_addr+addr; + return count; +} +/** + * [get_fpga_scratch description] + * @param dev [description] + * @param devattr [description] + * @param buf [description] + * @return [description] + */ +static ssize_t get_fpga_scratch(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + return sprintf(buf,"0x%8.8x\n", ioread32(fpga_dev.data_base_addr+FPGA_SCRATCH) & 0xffffffff); +} +/** + * [set_fpga_scratch description] + * @param dev [description] + * @param devattr [description] + * @param buf [description] + * @param count [description] + * @return [description] + */ +static ssize_t set_fpga_scratch(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t data; + char *last; + data = (uint32_t)strtoul(buf,&last,16); + if(data == 0 && buf == last){ + return -EINVAL; + } + iowrite32(data, fpga_dev.data_base_addr+FPGA_SCRATCH); + return count; +} +/** + * [set_fpga_reg_value description] + * @param dev [description] + * @param devattr [description] + * @param buf [description] + * @return [description] + */ +static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + //register is 4 bytes + uint32_t addr; + uint32_t value; + uint32_t mode = 8; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + + strscpy(clone, buf, count); + + mutex_lock(&fpga_data->fpga_lock); + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + addr = (uint32_t)strtoul(tok,&last,16); + if(addr == 0 && tok == last){ + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + value = (uint32_t)strtoul(tok,&last,16); + if(value == 0 && tok == last){ + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mode = 32; + }else{ + mode = (uint32_t)strtoul(tok,&last,10); + if(mode == 0 && tok == last){ + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + } + if(mode == 32){ + iowrite32(value, fpga_dev.data_base_addr+addr); + }else if(mode == 8){ + iowrite8(value, fpga_dev.data_base_addr+addr); + }else{ + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + mutex_unlock(&fpga_data->fpga_lock); + return count; +} + +/** + * Read all FPGA XCVR register in binary mode. + * @param filp [description] + * @param kobj [description] + * @param attr [description] + * @param buf [description] + * @param off [description] + * @param count [description] + * @return [description] + */ +static ssize_t dump_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + unsigned long i=0; + ssize_t status; + u8 read_reg; + + if( off + count > PORT_XCVR_REGISTER_SIZE ){ + return -EINVAL; + } + mutex_lock(&fpga_data->fpga_lock); + while(i < count){ + read_reg = ioread8(fpga_dev.data_base_addr + SFF_PORT_CTRL_BASE + off + i); + buf[i++] = read_reg; + } + status = count; + mutex_unlock(&fpga_data->fpga_lock); + return status; +} + +/** + * Show FPGA port XCVR ready status + * @param dev [description] + * @param attr [description] + * @param buf [description] + * @return [description] + */ +static ssize_t ready_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int REGISTER = FPGA_PORT_XCVR_READY; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> 0) & 1U); +} + +/* FPGA attributes */ +static DEVICE_ATTR( getreg, 0600, get_fpga_reg_value, set_fpga_reg_address); +static DEVICE_ATTR( scratch, 0600, get_fpga_scratch, set_fpga_scratch); +static DEVICE_ATTR( setreg, 0200, NULL , set_fpga_reg_value); +static DEVICE_ATTR_RO(ready); +static BIN_ATTR_RO( dump, PORT_XCVR_REGISTER_SIZE); + +static struct bin_attribute *fpga_bin_attrs[] = { + &bin_attr_dump, + NULL, +}; + +static struct attribute *fpga_attrs[] = { + &dev_attr_getreg.attr, + &dev_attr_scratch.attr, + &dev_attr_setreg.attr, + &dev_attr_ready.attr, + NULL, +}; + +static struct attribute_group fpga_attr_grp = { + .attrs = fpga_attrs, + .bin_attrs = fpga_bin_attrs, +}; + +/* SW CPLDs attributes */ +static ssize_t cpld1_getreg_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + uint8_t data; + int err; + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, + I2C_SMBUS_READ, fpga_data->cpld1_read_addr, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + + if (err < 0) + return err; + + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t cpld1_getreg_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status; + uint8_t addr; + + status = kstrtou8(buf, 0, &addr); + if (status == 0) { + fpga_data->cpld1_read_addr = addr; + status = count; + } + return status; +} +struct device_attribute dev_attr_cpld1_getreg = __ATTR(getreg, 0600, cpld1_getreg_show, cpld1_getreg_store); + +static ssize_t cpld1_dump_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + uint8_t data; + fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_READ,fpga_data->cpld1_read_addr,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data); + return sprintf(buf,"0x%2.2x\n",data); +} +static ssize_t cpld1_dump_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + uint8_t addr; + char *last; + addr = (uint8_t)strtoul(buf,&last,16); + if(addr == 0 && buf == last){ + return -EINVAL; + } + fpga_data->cpld1_read_addr = addr; + return size; +} +struct device_attribute dev_attr_cpld1_dump = __ATTR(dump,0600,cpld1_dump_show,cpld1_dump_store); + +static ssize_t cpld1_scratch_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + __u8 data; + int err; + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x01,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data); + if(err < 0) + return err; + return sprintf(buf, "0x%2.2x\n",data); +} +static ssize_t cpld1_scratch_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + // CPLD register is one byte + __u8 data; + char *last; + int err; + data = (uint8_t)strtoul(buf,&last,16); + if(data == 0 && buf == last){ + return -EINVAL; + } + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_WRITE,0x01,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data); + if(err < 0) + return err; + return size; +} +struct device_attribute dev_attr_cpld1_scratch = __ATTR(scratch,0600,cpld1_scratch_show,cpld1_scratch_store); + +static ssize_t cpld1_setreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + + uint8_t addr,value; + char *tok; + char clone[size]; + char *pclone = clone; + int err; + char *last; + + strscpy(clone, buf, size); + + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + return sprintf(buf,"ERROR line %d",__LINE__); + } + addr = (uint8_t)strtoul(tok,&last,16); + if(addr == 0 && tok == last){ + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + return sprintf(buf,"ERROR line %d",__LINE__); + } + value = (uint8_t)strtoul(tok,&last,16); + if(value == 0 && tok == last){ + return -EINVAL; + } + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_WRITE,addr,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&value); + if(err < 0) + return sprintf(buf,"ERROR line %d",__LINE__); + + return size; +} +struct device_attribute dev_attr_cpld1_setreg = __ATTR(setreg,0200,NULL,cpld1_setreg_store); + +static struct attribute *cpld1_attrs[] = { + &dev_attr_cpld1_getreg.attr, + &dev_attr_cpld1_dump.attr, + &dev_attr_cpld1_scratch.attr, + &dev_attr_cpld1_setreg.attr, + NULL, +}; + +static struct attribute_group cpld1_attr_grp = { + .attrs = cpld1_attrs, +}; + +static ssize_t cpld2_getreg_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + uint8_t data; + int err; + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, fpga_data->cpld2_read_addr, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + if (err < 0) + return err; + + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t cpld2_getreg_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + // CPLD register is one byte + uint8_t addr; + ssize_t status; + + status = kstrtou8(buf, 0, &addr); + if (status == 0) { + fpga_data->cpld2_read_addr = addr; + status = count; + } + return status; +} +struct device_attribute dev_attr_cpld2_getreg = __ATTR(getreg, 0600, cpld2_getreg_show, cpld2_getreg_store); + +static ssize_t cpld2_dump_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + uint8_t data; + fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_READ,fpga_data->cpld2_read_addr,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data); + return sprintf(buf,"0x%2.2x\n",data); +} +static ssize_t cpld2_dump_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + // CPLD register is one byte + uint32_t addr; + char *last; + addr = (uint8_t)strtoul(buf,&last,16); + if(addr == 0 && buf == last){ + return -EINVAL; + } + fpga_data->cpld2_read_addr = addr; + return size; +} +struct device_attribute dev_attr_cpld2_dump = __ATTR(dump,0600,cpld2_dump_show,cpld2_dump_store); + +static ssize_t cpld2_scratch_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + __u8 data; + int err; + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x01,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data); + if(err < 0) + return err; + return sprintf(buf, "0x%2.2x\n",data); +} +static ssize_t cpld2_scratch_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + // CPLD register is one byte + __u8 data; + char *last; + int err; + + data = (uint8_t)strtoul(buf,&last,16); + if(data == 0 && buf == last){ + return -EINVAL; + } + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_WRITE,0x01,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data); + if(err < 0) + return err; + return size; +} +struct device_attribute dev_attr_cpld2_scratch = __ATTR(scratch,0600,cpld2_scratch_show,cpld2_scratch_store); + +static ssize_t cpld2_setreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + uint8_t addr,value; + char *tok; + char clone[size]; + char *pclone = clone; + int err; + char *last; + + strscpy(clone, buf, size); + + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + return -EINVAL; + } + addr = (uint8_t)strtoul(tok,&last,16); + if(addr == 0 && tok == last){ + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + return -EINVAL; + } + value = (uint8_t)strtoul(tok,&last,16); + if(value == 0 && tok == last){ + return -EINVAL; + } + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_WRITE,addr,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&value); + if(err < 0) + return err; + + return size; +} +struct device_attribute dev_attr_cpld2_setreg = __ATTR(setreg,0200,NULL,cpld2_setreg_store); + +static struct attribute *cpld2_attrs[] = { + &dev_attr_cpld2_getreg.attr, + &dev_attr_cpld2_dump.attr, + &dev_attr_cpld2_scratch.attr, + &dev_attr_cpld2_setreg.attr, + NULL, +}; + +static struct attribute_group cpld2_attr_grp = { + .attrs = cpld2_attrs, +}; + +/* QSFP/SFP+ attributes */ +static ssize_t qsfp_modirq_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> STAT_IRQ) & 1U); +} +DEVICE_ATTR_RO(qsfp_modirq); + +static ssize_t qsfp_modprs_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> STAT_PRESENT) & 1U); +} +DEVICE_ATTR_RO(qsfp_modprs); + +static ssize_t sfp_txfault_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> STAT_TXFAULT) & 1U); +} +DEVICE_ATTR_RO(sfp_txfault); + +static ssize_t sfp_rxlos_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> STAT_RXLOS) & 1U); +} +DEVICE_ATTR_RO(sfp_rxlos); + +static ssize_t sfp_modabs_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> STAT_MODABS) & 1U); +} +DEVICE_ATTR_RO(sfp_modabs); + +static ssize_t qsfp_lpmode_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> CTRL_LPMOD) & 1U); +} +static ssize_t qsfp_lpmode_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + ssize_t status; + long value; + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtol(buf, 0, &value); + if (status == 0) { + // check if value is 0 clear + data = ioread32(fpga_dev.data_base_addr+REGISTER); + if(!value) + data = data & ~( (u32)0x1 << CTRL_LPMOD); + else + data = data | ((u32)0x1 << CTRL_LPMOD); + iowrite32(data,fpga_dev.data_base_addr+REGISTER); + status = size; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(qsfp_lpmode); + +static ssize_t qsfp_reset_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> CTRL_RST) & 1U); +} + +static ssize_t qsfp_reset_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + ssize_t status; + long value; + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtol(buf, 0, &value); + if (status == 0) { + // check if value is 0 clear + data = ioread32(fpga_dev.data_base_addr+REGISTER); + if(!value) + data = data & ~( (u32)0x1 << CTRL_RST); + else + data = data | ((u32)0x1 << CTRL_RST); + iowrite32(data,fpga_dev.data_base_addr+REGISTER); + status = size; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(qsfp_reset); + +static ssize_t sfp_txdisable_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> CTRL_TXDIS) & 1U); +} +static ssize_t sfp_txdisable_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + ssize_t status; + long value; + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtol(buf, 0, &value); + if (status == 0) { + // check if value is 0 clear + data = ioread32(fpga_dev.data_base_addr+REGISTER); + if(!value) + data = data & ~( (u32)0x1 << CTRL_TXDIS); + else + data = data | ((u32)0x1 << CTRL_TXDIS); + iowrite32(data,fpga_dev.data_base_addr+REGISTER); + status = size; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(sfp_txdisable); + +static struct attribute *sff_attrs[] = { + &dev_attr_qsfp_modirq.attr, + &dev_attr_qsfp_modprs.attr, + &dev_attr_qsfp_lpmode.attr, + &dev_attr_qsfp_reset.attr, + &dev_attr_sfp_txfault.attr, + &dev_attr_sfp_rxlos.attr, + &dev_attr_sfp_modabs.attr, + &dev_attr_sfp_txdisable.attr, + NULL, +}; + +static struct attribute_group sff_attr_grp = { + .attrs = sff_attrs, +}; + +static const struct attribute_group *sff_attr_grps[] = { + &sff_attr_grp, + NULL +}; + + +static ssize_t port_led_mode_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // value can be "nomal", "test" + __u8 led_mode_1,led_mode_2; + int err; + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_mode_1); + if(err < 0) + return err; + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_mode_2); + if(err < 0) + return err; + return sprintf(buf, "%s %s\n", + led_mode_1 ? "test" : "normal", + led_mode_2 ? "test" : "normal"); +} +static ssize_t port_led_mode_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + int status; + __u8 led_mode_1; + if(sysfs_streq(buf, "test")){ + led_mode_1 = 0x01; + }else if(sysfs_streq(buf, "normal")){ + led_mode_1 = 0x00; + }else{ + return -EINVAL; + } + status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00, + I2C_SMBUS_WRITE,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_mode_1); + status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00, + I2C_SMBUS_WRITE,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_mode_1); + return size; +} +DEVICE_ATTR_RW(port_led_mode); + +// Only work when port_led_mode set to 1 +static ssize_t port_led_color_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // value can be "off", "green", "amber", "both" + __u8 led_color1,led_color2; + int err; + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_color1); + if(err < 0) + return err; + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_color2); + if(err < 0) + return err; + return sprintf(buf, "%s %s\n", + led_color1 == 0x03 ? "off" : led_color1 == 0x02 ? "green" : led_color1 ==0x01 ? "amber": "both", + led_color2 == 0x03 ? "off" : led_color2 == 0x02 ? "green" : led_color2 ==0x01 ? "amber": "both"); +} + +static ssize_t port_led_color_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + int status; + __u8 led_color; + if(sysfs_streq(buf, "off")){ + led_color = 0x03; + }else if(sysfs_streq(buf, "green")){ + led_color = 0x02; + }else if(sysfs_streq(buf, "amber")){ + led_color = 0x01; + }else if(sysfs_streq(buf, "both")){ + led_color = 0x00; + }else{ + status = -EINVAL; + return status; + } + status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00, + I2C_SMBUS_WRITE,0x0A,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_color); + status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00, + I2C_SMBUS_WRITE,0x0A,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_color); + return size; +} +DEVICE_ATTR_RW(port_led_color); + +static struct attribute *sff_led_test[] = { + &dev_attr_port_led_mode.attr, + &dev_attr_port_led_color.attr, + NULL, +}; + +static struct attribute_group sff_led_test_grp = { + .attrs = sff_led_test, +}; + +static struct device * seastone2_sff_init(int portid){ + struct sff_device_data *new_data; + struct device *new_device; + + new_data = kzalloc(sizeof(*new_data), GFP_KERNEL); + if (!new_data) { + printk(KERN_ALERT "Cannot alloc sff device data @port%d", portid); + return NULL; + } + /* The QSFP port ID start from 1 */ + new_data->portid = portid+1; + new_data->port_type = fpga_i2c_bus_dev[portid].port_type; + new_device = device_create_with_groups(fpgafwclass, sff_dev, MKDEV(0,0), new_data, sff_attr_grps, "%s",fpga_i2c_bus_dev[portid].calling_name); + if (IS_ERR(new_device)) { + printk(KERN_ALERT "Cannot create sff device @port%d", portid); + kfree(new_data); + return NULL; + } + return new_device; +} + +static int i2c_wait_ack(struct i2c_adapter *a,unsigned long timeout,int writing){ + int error = 0; + int Status; + + struct i2c_dev_data *new_data = i2c_get_adapdata(a); + void __iomem *pci_bar = fpga_dev.data_base_addr; + + unsigned int REG_FDR0; + unsigned int REG_CR0; + unsigned int REG_SR0; + unsigned int REG_DR0; + unsigned int REG_ID0; + + unsigned int master_bus = new_data->pca9548.master_bus; + + if(master_bus < I2C_MASTER_CH_1 || master_bus > I2C_MASTER_CH_TOTAL){ + error = -ENXIO; + return error; + } + + REG_FDR0 = I2C_MASTER_FREQ_1 + (master_bus-1)*0x0100; + REG_CR0 = I2C_MASTER_CTRL_1 + (master_bus-1)*0x0100; + REG_SR0 = I2C_MASTER_STATUS_1 + (master_bus-1)*0x0100; + REG_DR0 = I2C_MASTER_DATA_1 + (master_bus-1)*0x0100; + REG_ID0 = I2C_MASTER_PORT_ID_1 + (master_bus-1)*0x0100; + + check(pci_bar+REG_SR0); + check(pci_bar+REG_CR0); + + timeout = jiffies + msecs_to_jiffies(timeout); + while(1){ + Status = ioread8(pci_bar+REG_SR0); + if(jiffies > timeout){ + info("Status %2.2X",Status); + info("Error Timeout"); + error = -ETIMEDOUT; + break; + } + + + if(Status & (1 << I2C_SR_BIT_MIF)){ + break; + } + + if(writing == 0 && (Status & (1<portid; + void __iomem *pci_bar = fpga_dev.data_base_addr; + +#ifdef DEBUG_KERN + printk(KERN_INFO "portid %2d|@ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-15s|CMD %2.2X " + ,portid,addr,flags,rw,rw == 1 ? "READ ":"WRITE" + ,size, size == 0 ? "QUICK" : + size == 1 ? "BYTE" : + size == 2 ? "BYTE_DATA" : + size == 3 ? "WORD_DATA" : + size == 4 ? "PROC_CALL" : + size == 5 ? "BLOCK_DATA" : + size == 8 ? "I2C_BLOCK_DATA" : "ERROR" + ,cmd); +#endif + /* Map the size to what the chip understands */ + switch (size) { + case I2C_SMBUS_QUICK: + case I2C_SMBUS_BYTE: + case I2C_SMBUS_BYTE_DATA: + case I2C_SMBUS_WORD_DATA: + case I2C_SMBUS_BLOCK_DATA: + case I2C_SMBUS_I2C_BLOCK_DATA: + break; + default: + printk(KERN_INFO "Unsupported transaction %d\n", size); + error = -EOPNOTSUPP; + goto Done; + } + + unsigned int REG_FDR0; + unsigned int REG_CR0; + unsigned int REG_SR0; + unsigned int REG_DR0; + unsigned int REG_ID0; + + unsigned int master_bus = dev_data->pca9548.master_bus; + + if(master_bus < I2C_MASTER_CH_1 || master_bus > I2C_MASTER_CH_TOTAL){ + error = -ENXIO; + goto Done; + } + + REG_FDR0 = I2C_MASTER_FREQ_1 + (master_bus-1)*0x0100; + REG_CR0 = I2C_MASTER_CTRL_1 + (master_bus-1)*0x0100; + REG_SR0 = I2C_MASTER_STATUS_1 + (master_bus-1)*0x0100; + REG_DR0 = I2C_MASTER_DATA_1 + (master_bus-1)*0x0100; + REG_ID0 = I2C_MASTER_PORT_ID_1 + (master_bus-1)*0x0100; + + iowrite8(portid,pci_bar+REG_ID0); + + int cnt=0; + + ////[S][ADDR/R] + // Clear status register + iowrite8(0,pci_bar+REG_SR0); + iowrite8(1 << I2C_CR_BIT_MIEN | 1 << I2C_CR_BIT_MTX | 1 << I2C_CR_BIT_MSTA ,pci_bar+REG_CR0); + SET_REG_BIT_H(pci_bar+REG_CR0,I2C_CR_BIT_MEN); + + if(rw == I2C_SMBUS_READ && + (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)){ + // sent device address with Read mode + iowrite8(addr << 1 | 0x01,pci_bar+REG_DR0); + }else{ + // sent device address with Write mode + iowrite8(addr << 1 | 0x00,pci_bar+REG_DR0); + } + + + + info( "MS Start"); + + //// Wait {A} + error = i2c_wait_ack(adapter,12,1); + if(error<0){ + info( "get error %d",error); + goto Done; + } + + //// [CMD]{A} + if(size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA || + size == I2C_SMBUS_I2C_BLOCK_DATA || + (size == I2C_SMBUS_BYTE && rw == I2C_SMBUS_WRITE)){ + + // sent command code to data register + iowrite8(cmd,pci_bar+REG_DR0); + info( "MS Send CMD 0x%2.2X",cmd); + + // Wait {A} + error = i2c_wait_ack(adapter,12,1); + if(error<0){ + info( "get error %d",error); + goto Done; + } + } + + switch(size){ + case I2C_SMBUS_BYTE_DATA: + cnt = 1; break; + case I2C_SMBUS_WORD_DATA: + cnt = 2; break; + case I2C_SMBUS_BLOCK_DATA: + case I2C_SMBUS_I2C_BLOCK_DATA: + /* In block data modes keep number of byte in block[0] */ + cnt = data->block[0]; + break; + default: + cnt = 0; break; + } + + // [CNT] used only block data write + if(size == I2C_SMBUS_BLOCK_DATA && rw == I2C_SMBUS_WRITE){ + + iowrite8(cnt,pci_bar+REG_DR0); + info( "MS Send CNT 0x%2.2X",cnt); + + // Wait {A} + error = i2c_wait_ack(adapter,12,1); + if(error<0){ + info( "get error %d",error); + goto Done; + } + } + + // [DATA]{A} + if( rw == I2C_SMBUS_WRITE && ( + size == I2C_SMBUS_BYTE || + size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA || + size == I2C_SMBUS_I2C_BLOCK_DATA + )){ + int bid=0; + info( "MS prepare to sent [%d bytes]",cnt); + if(size == I2C_SMBUS_BLOCK_DATA || size == I2C_SMBUS_I2C_BLOCK_DATA){ + bid=1; // block[0] is cnt; + cnt+=1; // offset from block[0] + } + for(;bidblock[bid],pci_bar+REG_DR0); + info( " Data > %2.2X",data->block[bid]); + // Wait {A} + error = i2c_wait_ack(adapter,12,1); + if(error<0){ + goto Done; + } + } + + } + + // REPEATE START + if( rw == I2C_SMBUS_READ && ( + size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA || + size == I2C_SMBUS_I2C_BLOCK_DATA + )){ + info( "MS Repeated Start"); + + SET_REG_BIT_L(pci_bar+REG_CR0,I2C_CR_BIT_MEN); + iowrite8(1 << I2C_CR_BIT_MIEN | + 1 << I2C_CR_BIT_MTX | + 1 << I2C_CR_BIT_MSTA | + 1 << I2C_CR_BIT_RSTA ,pci_bar+REG_CR0); + SET_REG_BIT_H(pci_bar+REG_CR0,I2C_CR_BIT_MEN); + + // sent Address with Read mode + iowrite8( addr<<1 | 0x1 ,pci_bar+REG_DR0); + + // Wait {A} + error = i2c_wait_ack(adapter,12,1); + if(error<0){ + goto Done; + } + + } + + if( rw == I2C_SMBUS_READ && ( + size == I2C_SMBUS_BYTE || + size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA || + size == I2C_SMBUS_I2C_BLOCK_DATA + )){ + + switch(size){ + case I2C_SMBUS_BYTE: + case I2C_SMBUS_BYTE_DATA: + cnt = 1; break; + case I2C_SMBUS_WORD_DATA: + cnt = 2; break; + case I2C_SMBUS_BLOCK_DATA: + // will be changed after recived first data + cnt = 3; break; + case I2C_SMBUS_I2C_BLOCK_DATA: + cnt = data->block[0]; break; + default: + cnt = 0; break; + } + + int bid = 0; + info( "MS Receive"); + + //set to Receive mode + iowrite8(1 << I2C_CR_BIT_MEN | + 1 << I2C_CR_BIT_MIEN | + 1 << I2C_CR_BIT_MSTA , pci_bar+REG_CR0); + + for(bid=-1;bidblock[bid+1] = ioread8(pci_bar+REG_DR0); + }else { + data->block[bid] = ioread8(pci_bar+REG_DR0); + } + info( "DATA IN [%d] %2.2X",bid,data->block[bid]); + + if(size == I2C_SMBUS_BLOCK_DATA && bid == 0){ + cnt = data->block[0] + 1; + } + } + } + } + +Stop: + // [P] + SET_REG_BIT_L(pci_bar+REG_CR0,I2C_CR_BIT_MSTA); + info( "MS STOP"); + +Done: + iowrite8(1<pca9548.master_bus; + unsigned char switch_addr = dev_data->pca9548.switch_addr; + unsigned char channel = dev_data->pca9548.channel; + + // Acquire the master resource. + mutex_lock(&fpga_i2c_master_locks[master_bus-1]); + uint16_t prev_port = fpga_i2c_lasted_access_port[master_bus-1]; + + if(switch_addr != 0xFF){ + // Check lasted access switch address on a master + if((unsigned char)(prev_port >> 8) == switch_addr){ + // check if channel is the same + if((unsigned char)(prev_port & 0x00FF) != channel){ + // set new PCA9548 at switch_addr to current + error= smbus_access(adapter,switch_addr,flags,I2C_SMBUS_WRITE,1 << channel,I2C_SMBUS_BYTE,NULL); + // update lasted port + fpga_i2c_lasted_access_port[master_bus-1] = switch_addr << 8 | channel; + } + }else{ + // reset prev_port PCA9548 chip + error= smbus_access(adapter,(u16)(prev_port >> 8),flags,I2C_SMBUS_WRITE,0x00,I2C_SMBUS_BYTE,NULL); + // set PCA9548 to current channel + error= smbus_access(adapter,switch_addr,flags,I2C_SMBUS_WRITE,1 << channel,I2C_SMBUS_BYTE,NULL); + // update lasted port + fpga_i2c_lasted_access_port[master_bus-1] = switch_addr << 8 | channel; + } + } + + // Do SMBus communication + error = smbus_access(adapter,addr,flags,rw,cmd,size,data); + // reset the channel + mutex_unlock(&fpga_i2c_master_locks[master_bus-1]); + return error; +} + + + +/** + * A callback function show available smbus functions. + */ +static u32 fpga_i2c_func(struct i2c_adapter *a) +{ + return I2C_FUNC_SMBUS_QUICK | + I2C_FUNC_SMBUS_BYTE | + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_BLOCK_DATA| + I2C_FUNC_SMBUS_I2C_BLOCK; +} + +static const struct i2c_algorithm seastone2_i2c_algorithm = { + .smbus_xfer = fpga_i2c_access, + .functionality = fpga_i2c_func, +}; + +/** + * Create virtual I2C bus adapter for switch devices + * @param pdev platform device pointer + * @param portid virtual i2c port id for switch device mapping + * @param bus_number_offset bus offset for virtual i2c adapter in system + * @return i2c adapter. + * + * When bus_number_offset is -1, created adapter with dynamic bus number. + * Otherwise create adapter at i2c bus = bus_number_offset + portid. + */ +static struct i2c_adapter * seastone2_i2c_init(struct platform_device *pdev, int portid, int bus_number_offset) +{ + int error; + + struct i2c_adapter *new_adapter; + struct i2c_dev_data *new_data; + + new_adapter = kzalloc(sizeof(*new_adapter), GFP_KERNEL); + if (!new_adapter){ + printk(KERN_ALERT "Cannot alloc i2c adapter for %s", fpga_i2c_bus_dev[portid].calling_name); + return NULL; + } + + new_adapter->owner = THIS_MODULE; + new_adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; + new_adapter->algo = &seastone2_i2c_algorithm; + /* If the bus offset is -1, use dynamic bus number */ + if (bus_number_offset == -1){ + new_adapter->nr = -1; + }else{ + new_adapter->nr = bus_number_offset + portid; + } + + new_data = kzalloc(sizeof(*new_data), GFP_KERNEL); + if (!new_data){ + printk(KERN_ALERT "Cannot alloc i2c data for %s", fpga_i2c_bus_dev[portid].calling_name); + kfree_sensitive(new_adapter); + return NULL; + } + + new_data->portid = portid; + new_data->pca9548.master_bus = fpga_i2c_bus_dev[portid].master_bus; + new_data->pca9548.switch_addr = fpga_i2c_bus_dev[portid].switch_addr; + new_data->pca9548.channel = fpga_i2c_bus_dev[portid].channel; + strscpy(new_data->pca9548.calling_name, fpga_i2c_bus_dev[portid].calling_name,sizeof(new_data->pca9548.calling_name)); + + snprintf(new_adapter->name, sizeof(new_adapter->name), + "SMBus I2C Adapter PortID: %s", new_data->pca9548.calling_name); + + void __iomem *i2c_freq_base_reg = fpga_dev.data_base_addr+I2C_MASTER_FREQ_1; + iowrite8(0x07,i2c_freq_base_reg+(new_data->pca9548.master_bus-1)*0x100); // 0x07 400kHz + i2c_set_adapdata(new_adapter,new_data); + error = i2c_add_numbered_adapter(new_adapter); + if(error < 0){ + printk(KERN_ALERT "Cannot add i2c adapter %s", new_data->pca9548.calling_name); + kfree_sensitive(new_adapter); + kfree_sensitive(new_data); + return NULL; + } + + return new_adapter; +}; + +// I/O resource need. +static struct resource seastone2_resources[] = { + { + .start = 0x10000000, + .end = 0x10001000, + .flags = IORESOURCE_MEM, + }, +}; + +static void seastone2_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device seastone2_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(seastone2_resources), + .resource = seastone2_resources, + .dev = { + .release = seastone2_dev_release, + } +}; + +/** + * Board info for QSFP/SFP+ eeprom. + * Note: Using sff8436 as I2C eeprom driver. + */ +static struct i2c_board_info sff8436_eeprom_info[] = { + { I2C_BOARD_INFO("optoe1", 0x50) }, + { I2C_BOARD_INFO("optoe2", 0x50) }, +}; + +static int seastone2_drv_probe(struct platform_device *pdev) +{ + struct resource *res; + int ret = 0; + int portid_count; + uint8_t cpld1_version, cpld2_version; + uint16_t prev_i2c_switch = 0; + + /* The device class need to be instantiated before this function called */ + BUG_ON(fpgafwclass == NULL); + + fpga_data = devm_kzalloc(&pdev->dev, sizeof(struct seastone2_fpga_data), + GFP_KERNEL); + + if (!fpga_data) + return -ENOMEM; + + // Set default read address to VERSION + fpga_data->fpga_read_addr = fpga_dev.data_base_addr+FPGA_VERSION; + fpga_data->cpld1_read_addr = 0x00; + fpga_data->cpld2_read_addr = 0x00; + + mutex_init(&fpga_data->fpga_lock); + for(ret=I2C_MASTER_CH_1 ;ret <= I2C_MASTER_CH_TOTAL; ret++){ + mutex_init(&fpga_i2c_master_locks[ret-1]); + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (unlikely(!res)) { + printk(KERN_ERR "Specified Resource Not Available...\n"); + kfree_sensitive(fpga_data); + return -1; + } + + fpga = kobject_create_and_add("FPGA", &pdev->dev.kobj); + if (!fpga){ + kfree_sensitive(fpga_data); + return -ENOMEM; + } + + ret = sysfs_create_group(fpga, &fpga_attr_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create FPGA sysfs attributes\n"); + kobject_put(fpga); + kfree_sensitive(fpga_data); + return ret; + } + + cpld1 = kobject_create_and_add("CPLD1", &pdev->dev.kobj); + if (!cpld1){ + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kfree_sensitive(fpga_data); + return -ENOMEM; + } + ret = sysfs_create_group(cpld1, &cpld1_attr_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create CPLD1 sysfs attributes\n"); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kfree_sensitive(fpga_data); + return ret; + } + + cpld2 = kobject_create_and_add("CPLD2", &pdev->dev.kobj); + if (!cpld2){ + sysfs_remove_group(cpld1, &cpld1_attr_grp); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kfree_sensitive(fpga_data); + return -ENOMEM; + } + ret = sysfs_create_group(cpld2, &cpld2_attr_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create CPLD2 sysfs attributes\n"); + kobject_put(cpld2); + sysfs_remove_group(cpld1, &cpld1_attr_grp); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kfree_sensitive(fpga_data); + return ret; + } + + sff_dev = device_create(fpgafwclass, NULL, MKDEV(0,0), NULL, "sff_device"); + if (IS_ERR(sff_dev)){ + printk(KERN_ERR "Failed to create sff device\n"); + sysfs_remove_group(cpld2, &cpld2_attr_grp); + kobject_put(cpld2); + sysfs_remove_group(cpld1, &cpld1_attr_grp); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kfree_sensitive(fpga_data); + return PTR_ERR(sff_dev); + } + + ret = sysfs_create_group(&sff_dev->kobj, &sff_led_test_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create SFF attributes\n"); + device_destroy(fpgafwclass, MKDEV(0,0)); + sysfs_remove_group(cpld2, &cpld2_attr_grp); + kobject_put(cpld2); + sysfs_remove_group(cpld1, &cpld1_attr_grp); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kfree_sensitive(fpga_data); + return ret; + } + + ret = sysfs_create_link(&pdev->dev.kobj,&sff_dev->kobj,"SFF"); + if (ret != 0){ + sysfs_remove_group(&sff_dev->kobj, &sff_led_test_grp); + device_destroy(fpgafwclass, MKDEV(0,0)); + sysfs_remove_group(cpld2, &cpld2_attr_grp); + kobject_put(cpld2); + sysfs_remove_group(cpld1, &cpld1_attr_grp); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kfree_sensitive(fpga_data); + return ret; + } + + for(portid_count=0 ; portid_count < VIRTUAL_I2C_PORT_LENGTH ; portid_count++){ + fpga_data->i2c_adapter[portid_count] = seastone2_i2c_init(pdev, portid_count, VIRTUAL_I2C_BUS_OFFSET); + } + + + /* Init SFF devices */ + for(portid_count=0; portid_count < SFF_PORT_TOTAL; portid_count++){ + struct i2c_adapter *i2c_adap = fpga_data->i2c_adapter[portid_count]; + if(i2c_adap){ + fpga_data->sff_devices[portid_count] = seastone2_sff_init(portid_count); + struct sff_device_data *sff_data = dev_get_drvdata(fpga_data->sff_devices[portid_count]); + BUG_ON(sff_data == NULL); + if( sff_data->port_type == QSFP ){ + fpga_data->sff_i2c_clients[portid_count] = i2c_new_client_device(i2c_adap, &sff8436_eeprom_info[0]); + }else{ + fpga_data->sff_i2c_clients[portid_count] = i2c_new_client_device(i2c_adap, &sff8436_eeprom_info[1]); + } + sff_data = NULL; + sysfs_create_link(&fpga_data->sff_devices[portid_count]->kobj, + &fpga_data->sff_i2c_clients[portid_count]->dev.kobj, + "i2c"); + } + + } + + printk(KERN_INFO "Virtual I2C buses created\n"); + +#ifdef TEST_MODE + return 0; +#endif + fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00, + I2C_SMBUS_READ,0x00,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&cpld1_version); + fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00, + I2C_SMBUS_READ,0x00,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&cpld2_version); + + printk(KERN_INFO "CPLD1 VERSON: %2.2x\n", cpld1_version); + printk(KERN_INFO "CPLD2 VERSON: %2.2x\n", cpld2_version); + + /* Init I2C buses that has PCA9548 switch device. */ + for(portid_count = 0; portid_count < VIRTUAL_I2C_PORT_LENGTH; portid_count++){ + + struct i2c_dev_data *dev_data; + dev_data = i2c_get_adapdata(fpga_data->i2c_adapter[portid_count]); + unsigned char master_bus = dev_data->pca9548.master_bus; + unsigned char switch_addr = dev_data->pca9548.switch_addr; + unsigned char channel = dev_data->pca9548.channel; + + if(switch_addr != 0xFF){ + + if(prev_i2c_switch != ( (master_bus << 8) | switch_addr) ){ + // Found the bus with PCA9548, trying to clear all switch in it. + smbus_access(fpga_data->i2c_adapter[portid_count],switch_addr,0x00,I2C_SMBUS_WRITE,0x00,I2C_SMBUS_BYTE,NULL); + prev_i2c_switch = ( master_bus << 8 ) | switch_addr; + } + } + } + return 0; +} + +static int seastone2_drv_remove(struct platform_device *pdev) +{ + int portid_count; + struct sff_device_data *rem_data; + + for(portid_count=0; portid_count < SFF_PORT_TOTAL; portid_count++){ + sysfs_remove_link(&fpga_data->sff_devices[portid_count]->kobj,"i2c"); + i2c_unregister_device(fpga_data->sff_i2c_clients[portid_count]); + } + + for(portid_count=0 ; portid_count < VIRTUAL_I2C_PORT_LENGTH ; portid_count++){ + if(fpga_data->i2c_adapter[portid_count] != NULL){ + info(KERN_INFO "<%x>",fpga_data->i2c_adapter[portid_count]); + i2c_del_adapter(fpga_data->i2c_adapter[portid_count]); + } + } + + for (portid_count=0; portid_count < SFF_PORT_TOTAL; portid_count++){ + if(fpga_data->sff_devices[portid_count] != NULL){ + rem_data = dev_get_drvdata(fpga_data->sff_devices[portid_count]); + device_unregister(fpga_data->sff_devices[portid_count]); + put_device(fpga_data->sff_devices[portid_count]); + kfree(rem_data); + } + } + + sysfs_remove_group(fpga, &fpga_attr_grp); + sysfs_remove_group(cpld1, &cpld1_attr_grp); + sysfs_remove_group(cpld2, &cpld2_attr_grp); + sysfs_remove_group(&sff_dev->kobj, &sff_led_test_grp); + kobject_put(fpga); + kobject_put(cpld1); + kobject_put(cpld2); + device_destroy(fpgafwclass, MKDEV(0,0)); + devm_kfree(&pdev->dev, fpga_data); + return 0; +} + +#ifdef TEST_MODE + #define FPGA_PCI_BAR_NUM 2 +#else + #define FPGA_PCI_BAR_NUM 0 +#endif + + + +static const struct pci_device_id fpga_id_table[] = { + { PCI_VDEVICE(XILINX, FPGA_PCIE_DEVICE_ID) }, + { PCI_VDEVICE(TEST, TEST_PCIE_DEVICE_ID) }, + {0, } +}; + +MODULE_DEVICE_TABLE(pci, fpga_id_table); + +static int fpga_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) +{ + int err; + struct device *dev = &pdev->dev; + if ((err = pci_enable_device(pdev))) { + dev_err(dev, "pci_enable_device probe error %d for device %s\n", + err, pci_name(pdev)); + return err; + } + + if ((err = pci_request_regions(pdev, FPGA_PCI_NAME)) < 0) { + dev_err(dev, "pci_request_regions error %d\n", err); + goto pci_disable; + } + + /* bar0: data mmio region */ + fpga_dev.data_mmio_start = pci_resource_start(pdev, FPGA_PCI_BAR_NUM); + fpga_dev.data_mmio_len = pci_resource_len(pdev, FPGA_PCI_BAR_NUM); + fpga_dev.data_base_addr = pci_iomap(pdev, FPGA_PCI_BAR_NUM, 0); + if (!fpga_dev.data_base_addr) { + dev_err(dev, "cannot iomap region of size %lu\n", + (unsigned long)fpga_dev.data_mmio_len); + goto pci_release; + } + dev_info(dev, "data_mmio iomap base = 0x%lx \n", + (unsigned long)fpga_dev.data_base_addr); + dev_info(dev, "data_mmio_start = 0x%lx data_mmio_len = %lu\n", + (unsigned long)fpga_dev.data_mmio_start, + (unsigned long)fpga_dev.data_mmio_len); + + printk(KERN_INFO "FPGA PCIe driver probe OK.\n"); + printk(KERN_INFO "FPGA ioremap registers of size %lu\n",(unsigned long)fpga_dev.data_mmio_len); + printk(KERN_INFO "FPGA Virtual BAR %d at %8.8lx - %8.8lx\n",FPGA_PCI_BAR_NUM,(unsigned long)fpga_dev.data_base_addr,(unsigned long)fpga_dev.data_base_addr+ (unsigned long)fpga_dev.data_mmio_len); + printk(KERN_INFO ""); + uint32_t buff = ioread32(fpga_dev.data_base_addr); + printk(KERN_INFO "FPGA VERSION : %8.8x\n", buff); + fpgafw_init(); + return 0; + +reg_release: + pci_iounmap(pdev, fpga_dev.data_base_addr); +pci_release: + pci_release_regions(pdev); +pci_disable: + pci_disable_device(pdev); + return -EBUSY; +} + +static void fpga_pci_remove(struct pci_dev *pdev) +{ + fpgafw_exit(); + pci_iounmap(pdev, fpga_dev.data_base_addr); + pci_release_regions(pdev); + pci_disable_device(pdev); + printk(KERN_INFO "FPGA PCIe driver remove OK.\n"); +}; + +static struct pci_driver pci_dev_ops = { + .name = FPGA_PCI_NAME, + .probe = fpga_pci_probe, + .remove = fpga_pci_remove, + .id_table = fpga_id_table, +}; + + +static struct platform_driver seastone2_drv = { + .probe = seastone2_drv_probe, + .remove = __exit_p(seastone2_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +enum{ + READREG, + WRITEREG +}; + +struct fpga_reg_data { + uint32_t addr; + uint32_t value; +}; + +static long fpgafw_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg){ + int ret = 0; + struct fpga_reg_data data; + mutex_lock(&fpga_data->fpga_lock); + +#ifdef TEST_MODE + static uint32_t status_reg; +#endif + // Switch function to read and write. + switch (cmd){ + case READREG: + if (copy_from_user(&data, (void __user*)arg, sizeof(data)) != 0){ + mutex_unlock(&fpga_data->fpga_lock); + return -EFAULT; + } + data.value = ioread32(fpga_dev.data_base_addr+data.addr); + if (copy_to_user((void __user*)arg ,&data, sizeof(data)) != 0){ + mutex_unlock(&fpga_data->fpga_lock); + return -EFAULT; + } +#ifdef TEST_MODE + if(data.addr == 0x1210){ + switch (status_reg){ + case 0x0000 : status_reg=0x8000; + break; + + case 0x8080 : status_reg=0x80C0; + break; + case 0x80C0 : status_reg=0x80F0; + break; + case 0x80F0 : status_reg=0x80F8; + break; + + } + iowrite32(status_reg,fpga_dev.data_base_addr+0x1210); + } +#endif + + + break; + case WRITEREG: + if (copy_from_user(&data, (void __user*)arg, sizeof(data)) != 0){ + mutex_unlock(&fpga_data->fpga_lock); + return -EFAULT; + } + iowrite32(data.value,fpga_dev.data_base_addr+data.addr); + +#ifdef TEST_MODE + if(data.addr == 0x1204){ + status_reg=0x8080; + iowrite32(status_reg,fpga_dev.data_base_addr+0x1210); + } +#endif + + break; + default: + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + mutex_unlock(&fpga_data->fpga_lock); + return ret; +} + + +const struct file_operations fpgafw_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = fpgafw_unlocked_ioctl, +}; + + +static int fpgafw_init(void){ + printk(KERN_INFO "Initializing the switchboard driver\n"); + // Try to dynamically allocate a major number for the device -- more difficult but worth it + majorNumber = register_chrdev(0, DEVICE_NAME, &fpgafw_fops); + if (majorNumber<0){ + printk(KERN_ALERT "Failed to register a major number\n"); + return majorNumber; + } + printk(KERN_INFO "Device registered correctly with major number %d\n", majorNumber); + + // Register the device class + fpgafwclass = class_create(THIS_MODULE, CLASS_NAME); + if (IS_ERR(fpgafwclass)){ // Check for error and clean up if there is + unregister_chrdev(majorNumber, DEVICE_NAME); + printk(KERN_ALERT "Failed to register device class\n"); + return PTR_ERR(fpgafwclass); // Correct way to return an error on a pointer + } + printk(KERN_INFO "Device class registered correctly\n"); + + // Register the device driver + fpgafwdev = device_create(fpgafwclass, NULL, MKDEV(majorNumber, 0), NULL, DEVICE_NAME); + if (IS_ERR(fpgafwdev)){ // Clean up if there is an error + class_destroy(fpgafwclass); // Repeated code but the alternative is goto statements + unregister_chrdev(majorNumber, DEVICE_NAME); + printk(KERN_ALERT "Failed to create the FW upgrade device node\n"); + return PTR_ERR(fpgafwdev); + } + printk(KERN_INFO "FPGA fw upgrade device node created correctly\n"); // Made it! device was initialized + return 0; +} + +static void fpgafw_exit(void){ + device_destroy(fpgafwclass, MKDEV(majorNumber, 0)); // remove the device + class_unregister(fpgafwclass); // unregister the device class + class_destroy(fpgafwclass); // remove the device class + unregister_chrdev(majorNumber, DEVICE_NAME); // unregister the major number + printk(KERN_INFO "Goodbye!\n"); +} + +int seastone2_init(void) +{ + int rc; + rc = pci_register_driver(&pci_dev_ops); + if (rc) + return rc; + if(fpga_dev.data_base_addr == NULL){ + printk(KERN_ALERT "FPGA PCIe device not found!\n"); + return -ENODEV; + } + platform_device_register(&seastone2_dev); + platform_driver_register(&seastone2_drv); + return 0; +} + +void seastone2_exit(void) +{ + platform_driver_unregister(&seastone2_drv); + platform_device_unregister(&seastone2_dev); + pci_unregister_driver(&pci_dev_ops); +} + +module_init(seastone2_init); +module_exit(seastone2_exit); + +MODULE_AUTHOR("Pradchaya P. pphuhcar@celestica.com"); +#ifdef SEASTONE2 +MODULE_DESCRIPTION("Celestica seastone2 platform driver"); +#else +MODULE_DESCRIPTION("Celestica questone2 platform driver"); +#endif +MODULE_VERSION(MOD_VERSION); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/platform_sensors.py new file mode 100755 index 000000000000..b600d48e8fb0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/platform_sensors.py @@ -0,0 +1,161 @@ +#!/usr/bin/python +# +# Silverstone platform sensors. This script get the sensor data from BMC +# using ipmitool and display them in lm-sensor alike format. +# +# The following data is support: +# 1. Temperature sensors +# 2. PSUs +# 3. Fan Drawers + +import sys +import logging +import subprocess + +IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist'] +MAX_NUM_FANS = 4 +MAX_NUM_PSUS = 2 + +SENSOR_NAME = 0 +SENSOR_VAL = 4 + +sensor_dict = {} + +def ipmi_sensor_dump(cmd): + ''' Execute ipmitool command return dump output + exit if any error occur. + ''' + global sensor_dict + sensor_dump = '' + + try: + sensor_dump = subprocess.check_output(IPMI_SDR_CMD, universal_newlines=True) + except subprocess.CalledProcessError as e: + logging.error('Error! Failed to execute: {}'.format(cmd)) + sys.exit(1) + + for line in sensor_dump.splitlines(): + sensor_info = line.split('|') + sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip() + + return True + +def get_reading_by_name(sensor_name, sdr_elist_dump): + found = '' + + for line in sdr_elist_dump.splitlines(): + line = line.decode() + if sensor_name in line: + found = line.strip() + break + + if not found: + logging.error('Cannot find sensor name:' + sensor_name) + + else: + try: + found = found.split('|')[4] + except IndexError: + logging.error('Cannot get sensor data of:' + sensor_name) + + logging.basicConfig(level=logging.DEBUG) + return found + + +def read_temperature_sensors(): + sensor_list = [\ + ('Base_Temp_U5', 'Baseboard Right Temp'),\ + ('Base_Temp_U7', 'Baseboard Left Temp'),\ + ('Switch_Temp_U31', 'ASIC External Front Temp'),\ + ('Switch_Temp_U30', 'ASIC External Rear Temp'),\ + ('Switch_Temp_U29', 'Switchboard Right Temp'),\ + ('Switch_Temp_U28', 'Switchboard Left Temp'),\ + ('CPU_Temp', 'CPU Internal Temp'),\ + ('Switch_U33_Temp', 'IR3595 Chip Temp'),\ + ('Switch_U21_Temp', 'IR3584 Chip Temp'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Temperature Sensors\n" + output += "Adapter: IPMI adapter\n" + for sensor in sensor_list: + output += sensor_format.format('{}:'.format(sensor[1]),\ + sensor_dict[sensor[0]],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_fan_sensors(num_fans): + + sensor_list = [\ + ('Fan{}_Status', 'Fan Drawer {} Status'),\ + ('Fan{}_Front', 'Fan {} front'),\ + ('Fan{}_Rear', 'Fan {} rear'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Fan Drawers\n" + output += "Adapter: IPMI adapter\n" + for fan_num in range(1, num_fans+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(fan_num) + display_sensor_name = sensor[1].format(fan_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_psu_sensors(num_psus): + + sensor_list = [\ + ('PSU{}_Status', 'PSU {} Status'),\ + ('PSU{}_Fan', 'PSU {} Fan 1'),\ + ('PSU{}_VIn', 'PSU {} Input Voltage'),\ + ('PSU{}_CIn', 'PSU {} Input Current'),\ + ('PSU{}_PIn', 'PSU {} Input Power'),\ + ('PSU{}_Temp1', 'PSU {} Ambient Temp'),\ + ('PSU{}_Temp2', 'PSU {} Hotspot Temp'),\ + ('PSU{}_VOut', 'PSU {} Output Voltage'),\ + ('PSU{}_COut', 'PSU {} Output Current'),\ + ('PSU{}_POut', 'PSU {} Output Power'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "PSU\n" + output += "Adapter: IPMI adapter\n" + for psu_num in range(1, num_psus+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format('L' if psu_num == 1 else 'R') + display_sensor_name = sensor[1].format(psu_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def main(): + output_string = '' + + if ipmi_sensor_dump(IPMI_SDR_CMD): + output_string += read_temperature_sensors() + output_string += read_psu_sensors(MAX_NUM_PSUS) + output_string += read_fan_sensors(MAX_NUM_FANS) + + print(output_string) + + +if __name__ == '__main__': + main() diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/questone2_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/questone2_platform_shutdown.sh new file mode 100755 index 000000000000..e04cac54fa98 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/questone2_platform_shutdown.sh @@ -0,0 +1,26 @@ +#!/bin/bash +REBOOT_CAUSE_DIR="/host/reboot-cause" +HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +REBOOT_TIME=$(date) + +if [ $# -ne 1 ]; then + echo "Require reboot type" + exit 1 +fi + +if [ ! -d "$REBOOT_CAUSE_DIR" ]; then + mkdir $REBOOT_CAUSE_DIR +fi + +echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE} + +# Best effort to write buffered data onto the disk +sync ; sync ; sync ; sleep 3 + +# BMC cold power-cyle +ipmitool chassis power cycle &> /dev/null + +# System should reboot by now and avoid the script returning to caller +sleep 10 + +exit 0 \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/sensors new file mode 100755 index 000000000000..5d740a9eb7d7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/sensors @@ -0,0 +1,11 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@" +docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@" diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/setup.py b/platform/broadcom/sonic-platform-modules-cel/questone2/setup.py new file mode 100644 index 000000000000..1bac52a180ac --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/setup.py @@ -0,0 +1,10 @@ +from setuptools import setup + +setup( + name='sonic_platform', + version='1.0', + description='Module to initialize Celestica B3010 platforms', + + packages=['sonic_platform'], + package_dir={'sonic_platform': 'sonic_platform'}, +) diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/__init__.py new file mode 100644 index 000000000000..d3c24cb008dd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import platform diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/chassis.py new file mode 100644 index 000000000000..85157d319298 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/chassis.py @@ -0,0 +1,464 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Chassis information which are available in the platform +# +############################################################################# + +try: + import sys + import time + import os + import re + import shutil + from sonic_platform_base.chassis_base import ChassisBase + from .helper import APIHelper + from sonic_platform_base.sfp_base import SfpBase + +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_FAN_DRAWER = 4 +NUM_FAN_PER_DRAWER = 2 +NUM_PSU = 2 +NUM_THERMAL = 13 +NUM_SFP = 56 +NUM_COMPONENT = 9 + +SFP_PORT_START = 1 +SFP_PORT_END = 48 +QSFP_PORT_START = 49 +QSFP_PORT_END = 56 + +REBOOT_CAUSE_REG = "0xA106" +BASE_CPLD_PLATFORM = "sys_cpld" +BASE_GETREG_PATH = "/sys/devices/platform/{}/getreg".format(BASE_CPLD_PLATFORM) +IPMI_GET_SYS_STATUS_LED="ipmitool raw 0x3A 0x0C 0x00 0x02 0x62" +IPMI_SET_SYS_STATUS_LED="ipmitool raw 0x3A 0x0C 0x00 0x03 0x62 {}" + +ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt" + +class Chassis(ChassisBase): + """Platform-specific Chassis class""" + sfp_status_dict={} + + #led color status + SYSLED_COLOR_VAL_MAP = {\ + 'off': '0x33',\ + 'green': '0x10',\ + 'green_blink_1hz': '0x11',\ + 'amber': '0x20'\ + } + + SYSLED_VAL_COLOR_DESC_MAP = { + 0x33: 'off',\ + 0x10: 'green',\ + 0x11: 'green_blink_1hz',\ + 0x20: 'amber'\ + } + + def __init__(self): + ChassisBase.__init__(self) + self._api_helper = APIHelper() + self.sfp_module_initialized = False + self.fan_module_initialized = False + self._watchdog = None + self._airflow_direction = None + self.__initialize_eeprom() + + self.__initialize_thermals() + self.__initialize_fan() + self.__initialize_psu() + self.__initialize_components() + + def __initialize_sfp(self): + if not self.sfp_module_initialized: + from sonic_platform.sfp import Sfp + for index in range(0, NUM_SFP): + sfp = Sfp(index) + self._sfp_list.append(sfp) + present = sfp.get_presence() + self.sfp_status_dict[sfp.index] = '1' if present else '0' + self.sfp_module_initialized = True + + def __initialize_psu(self): + from sonic_platform.psu import Psu + for index in range(0, NUM_PSU): + psu = Psu(index) + self._psu_list.append(psu) + + def __initialize_fan(self): + from sonic_platform.fan import Fan + from sonic_platform.fan_drawer import FanDrawer + for fand_index in range(0, NUM_FAN_DRAWER): + drawer_fan_list=[] + for fan_index in range(0, NUM_FAN_PER_DRAWER): + fan = Fan(fand_index, fan_index) + self._fan_list.append(fan) + drawer_fan_list.append(fan) + fan_drawer = FanDrawer(fand_index, drawer_fan_list) + self._fan_drawer_list.append(fan_drawer) + self.fan_module_initialized = True + + + def __initialize_thermals(self): + from sonic_platform.thermal import Thermal + for index in range(0, NUM_THERMAL): + thermal = Thermal(index) + self._thermal_list.append(thermal) + + def __initialize_eeprom(self): + from sonic_platform.eeprom import Eeprom + self._eeprom = Eeprom() + + def __initialize_components(self): + from sonic_platform.component import Component + for index in range(0, NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + def initizalize_system_led(self): + return True + + def get_status_led(self): + color_str = 'N/A' + status, output = self._api_helper.run_command(IPMI_GET_SYS_STATUS_LED) + if status: + color_val = int(output, 16) & 0x33 + color_str = self.SYSLED_VAL_COLOR_DESC_MAP.get(color_val, color_str) + + return color_str + + def set_status_led(self, color): + status = False + + color_val = self.SYSLED_COLOR_VAL_MAP.get(color, None) + if color_val != None: + cmd = IPMI_SET_SYS_STATUS_LED.format(color_val) + status, res = self._api_helper.run_command(cmd) + + return status + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.get_mac() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.get_serial() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self._eeprom.get_eeprom() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + hw_reboot_cause = self._api_helper.get_register_value( + BASE_GETREG_PATH, REBOOT_CAUSE_REG) + + + # This tmp copy is to retain the reboot-cause only for the current boot + if os.path.isfile(ORG_HW_REBOOT_CAUSE_FILE): + shutil.move(ORG_HW_REBOOT_CAUSE_FILE, TMP_HW_REBOOT_CAUSE_FILE) + + if hw_reboot_cause == "0x00" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE): + with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file: + reboot_info = hw_cause_file.readline().rstrip('\n') + match = re.search(r'Reason:(.*),Time:(.*)', reboot_info) + if match is not None: + if match.group(1) == 'system': + return (self.REBOOT_CAUSE_NON_HARDWARE, 'System cold reboot') + + + if hw_reboot_cause == "0x99": + reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC + description = 'ASIC Overload Reboot' + elif hw_reboot_cause == "0x88": + reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_CPU + description = 'CPU Overload Reboot' + elif hw_reboot_cause == "0x77": + reboot_cause = self.REBOOT_CAUSE_WATCHDOG + description = 'Hardware Watchdog Reset' + elif hw_reboot_cause == "0x55": + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'CPU Cold Reset' + elif hw_reboot_cause == "0x44": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'CPU Warm Reset' + elif hw_reboot_cause == "0x33": + # When NON_HARDWARE is used and device is powercycled via IPMI + # reboot cause computed as Unknown, Hence using HARDWARE_OTHER + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Soft-Set Cold Reset' + elif hw_reboot_cause == "0x22": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'Soft-Set Warm Reset' + elif hw_reboot_cause == "0x11": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + description = 'Power On Reset' + elif hw_reboot_cause == "0x00": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + description = 'Power Cycle Reset' + else: + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Hardware reason' + + return (reboot_cause, description) + + ############################################################## + ######################## SFP methods ######################### + ############################################################## + + def get_num_sfps(self): + """ + Retrieves the number of sfps available on this chassis + Returns: + An integer, the number of sfps available on this chassis + """ + self.__initialize_sfp() + + return len(self._sfp_list) + + def get_all_sfps(self): + """ + Retrieves all sfps available on this chassis + Returns: + A list of objects derived from SfpBase representing all sfps + available on this chassis + """ + self.__initialize_sfp() + + return self._sfp_list + + def get_sfp(self, index): + """ + Retrieves sfp represented by (0-based) index + Args: + index: An integer, the index (0-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 0. + For example, 0 for Ethernet1, 1 for Ethernet2 and so on. + Returns: + An object dervied from SfpBase representing the specified sfp + """ + sfp = None + self.__initialize_sfp() + + try: + sfp = self._sfp_list[index - 1] + except IndexError: + sys.stderr.write("SFP index {} out of range (0-{})\n".format( + index, len(self._sfp_list) - 1)) + return sfp + + ############################################################## + ####################### Other methods ######################## + ############################################################## + + def get_watchdog(self): + """ + Retreives hardware watchdog device on this chassis + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + """ + if self._watchdog is None: + from sonic_platform.watchdog import Watchdog + self._watchdog = Watchdog() + + return self._watchdog + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return self._api_helper.hwsku + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + return self._eeprom.get_pn() + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + return self.get_serial_number() + + def get_revision(self): + """ + Retrieves the hardware revision for the chassis + Returns: + A string containing the hardware revision for this chassis. + """ + return self._eeprom.get_revision() + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return True + + ############################################################## + ###################### Event methods ######################### + ############################################################## + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'fan' '' '0' Fan removed + '1' Fan inserted + + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + + 'voltage' '' '0' Vout normal + '1' Vout abnormal + -------------------------------------------------------------------- + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'}, + 'voltage':{'U20':'0', 'U21':'1'}} + Indicates that: + fan 0 has been removed, fan 2 has been inserted. + sfp 11 has been removed, sfp 12 has been inserted. + monitored voltage U20 became normal, voltage U21 became abnormal. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + sfp_dict = {} + + SFP_REMOVED = '0' + SFP_INSERTED = '1' + + SFP_PRESENT = True + SFP_ABSENT = False + + start_time = time.time() + time_period = timeout/float(1000) #Convert msecs to secs + + while time.time() < (start_time + time_period) or timeout == 0: + for sfp in self._sfp_list: + port_idx = sfp.index + if self.sfp_status_dict[port_idx] == SFP_REMOVED and \ + sfp.get_presence() == SFP_PRESENT: + sfp_dict[port_idx] = SFP_INSERTED + self.sfp_status_dict[port_idx] = SFP_INSERTED + elif self.sfp_status_dict[port_idx] == SFP_INSERTED and \ + sfp.get_presence() == SFP_ABSENT: + sfp_dict[port_idx] = SFP_REMOVED + self.sfp_status_dict[port_idx] = SFP_REMOVED + + if sfp_dict: + return True, {'sfp':sfp_dict} + + time.sleep(0.5) + + return True, {'sfp':{}} # Timeout + + def get_airflow_direction(self): + if self._airflow_direction == None: + try: + vendor_extn = self._eeprom.get_vendor_extn() + airflow_type = vendor_extn.split()[2][2:4] # Either 0xFB or 0xBF + if airflow_type == 'FB': + direction = 'exhaust' + elif airflow_type == 'BF': + direction = 'intake' + else: + direction = 'N/A' + except (AttributeError, IndexError): + direction = 'N/A' + + self._airflow_direction = direction + + return self._airflow_direction + + def get_port_or_cage_type(self, index): + """ + Retrieves sfp port or cage type corresponding to physical port + + Args: + index: An integer (>=0), the index of the sfp to retrieve. + + Returns: + The masks of all types of port or cage that can be supported on the port + Types are defined in sfp_base.py + """ + if index in range(1, 48+1): + return (SfpBase.SFP_PORT_TYPE_BIT_SFP_PLUS | SfpBase.SFP_PORT_TYPE_BIT_SFP28 | \ + SfpBase.SFP_PORT_TYPE_BIT_SFP) + elif index in range(49, 56+1): + return SfpBase.SFP_PORT_TYPE_BIT_QSFP28 + else: + raise NotImplementedError + + diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/component.py new file mode 100644 index 000000000000..185a62ef6a60 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/component.py @@ -0,0 +1,156 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +import os.path +import re + +try: + #from sonic_platform_base.component_base import ComponentBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NAME_IDX = 0 +DESC_IDX = 1 +VER_API_IDX = 2 + +BASE_CPLD_PLATFORM = "sys_cpld" +SW_CPLD_PLATFORM = "questone2" +PLATFORM_SYSFS_PATH = "/sys/devices/platform/" + +FPGA_GETREG_PATH = "{}/{}/FPGA/getreg".format( + PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM) +BASE_GETREG_PATH = "{}/{}/getreg".format( + PLATFORM_SYSFS_PATH, BASE_CPLD_PLATFORM) +SW_CPLD1_GETREG_PATH = "{}/{}/CPLD1/getreg".format( + PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM) +SW_CPLD2_GETREG_PATH = "{}/{}/CPLD2/getreg".format( + PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM) +BIOS_VER_PATH = "/sys/class/dmi/id/bios_version" + +BASE_CPLD_VER_REG = "0xA100" +COME_CPLD_VER_REG = "0xA1E0" +SW_CPLD_VER_REG = "0x00" +FPGA_VER_REG = "0x00" + +UNKNOWN_VER = "N/A" +ONIE_VER_CMD = "cat /host/machine.conf" +SSD_VER_CMD = "smartctl -i /dev/sda" + +class Component(): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + COMPONENT_LIST = [ + ("BIOS", "Basic input/output System", self.__get_bios_ver), + ("ONIE", "Open Network Install Environment", self.__get_onie_ver), + ("BMC", "Baseboard Management Controller", self.__get_bmc_ver), + ("FPGA", "FPGA for transceiver EEPROM access and other component I2C access", self.__get_fpga_ver), + ("CPLD COMe", "COMe board CPLD", self.__get_cpld_ver), + ("CPLD BASE", "CPLD for board functions, fan control and watchdog", self.__get_cpld_ver), + ("CPLD SW1", "CPLD for port control SFP(1-24)", self.__get_cpld_ver), + ("CPLD SW2", "CPLD for port control SFP(25-48) QSFP(49-56)", self.__get_cpld_ver), + ("SSD", "Solid State Drive - {}", self.__get_ssd_ver), + ] + + self.index = component_index + self.name = COMPONENT_LIST[self.index][NAME_IDX] + self.description = COMPONENT_LIST[self.index][DESC_IDX] + self.__get_version = COMPONENT_LIST[self.index][VER_API_IDX] + self._api_helper = APIHelper() + + def __get_bios_ver(self): + return self._api_helper.read_one_line_file(BIOS_VER_PATH) + + def __get_onie_ver(self): + onie_ver = "N/A" + status, raw_onie_data = self._api_helper.run_command(ONIE_VER_CMD) + if status: + ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data) + if ret != None: + onie_ver = ret.group(0) + return onie_ver + + def __get_bmc_ver(self): + cmd="ipmitool mc info | grep 'Firmware Revision'" + status, raw_ver=self._api_helper.run_command(cmd) + if status: + bmc_ver=raw_ver.split(':')[-1].strip() + return bmc_ver + else: + return UNKNOWN_VER + + def __get_fpga_ver(self): + version_raw = self._api_helper.get_register_value(FPGA_GETREG_PATH, FPGA_VER_REG) + return "{}.{}".format(int(version_raw[2:][:4], 16), int(version_raw[2:][4:], 16)) if version_raw else UNKNOWN_VER + + def __get_cpld_ver(self): + cpld_api_param = { + 'CPLD COMe': (BASE_GETREG_PATH, COME_CPLD_VER_REG), + 'CPLD BASE': (BASE_GETREG_PATH, BASE_CPLD_VER_REG), + 'CPLD SW1': (SW_CPLD1_GETREG_PATH, SW_CPLD_VER_REG), + 'CPLD SW2': (SW_CPLD2_GETREG_PATH, SW_CPLD_VER_REG), + } + api_param = cpld_api_param[self.name] + + cpld_ver = self._api_helper.get_register_value(api_param[0], api_param[1]) + return "{}.{}".format(int(cpld_ver[2], 16), int(cpld_ver[3], 16)) if cpld_ver else UNKNOWN_VER + + def __get_ssd_ver(self): + ssd_ver = "N/A" + status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD) + if status: + ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data) + if ret != None: + ssd_ver = ret.group(1) + return ssd_ver + + def __get_ssd_model(self): + model = "N/A" + + status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD) + if status: + ret = re.search(r"Device Model: +(.*)[^\\]", raw_ssd_data) + if ret != None: + try: + model = ret.group(1) + except (IndexError): + pass + return model + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return self.name + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + # For SSD get the model name from device + if self.name == "SSD": + return self.description.format(self.__get_ssd_model()) + + return self.description + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + return self.__get_version() diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/eeprom.py new file mode 100644 index 000000000000..ff08cd949891 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/eeprom.py @@ -0,0 +1,128 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import os + import sys + import re + import json + import fcntl + + if sys.version_info.major == 3: + from io import StringIO + else: + from cStringIO import StringIO + + from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +NULL = 'N/A' +EEPROM_TMP_FILE = '/tmp/eeprom_dump.json' + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + + EEPROM_DECODE_HEADLINES = 6 + + def __init__(self): + for i2cbus in range(2): + path_prefix = "/sys/class/i2c-adapter/i2c-{0}/".format(i2cbus) + with open(path_prefix + "name") as fd: + if 'SMBus iSMT adapter at ' in fd.readline(): + self._eeprom_path = path_prefix + "{0}-0056/eeprom".format(i2cbus) + break + super(Eeprom, self).__init__(self._eeprom_path, 0, '', True) + self._eeprom = self._load_eeprom() + + def __parse_output(self, decode_output): + decode_output.replace('\0', '') + lines = decode_output.split('\n') + lines = lines[self.EEPROM_DECODE_HEADLINES:] + _eeprom_info_dict = dict() + + for line in lines: + try: + match = re.search('(0x[0-9a-fA-F]{2})\s+\d+\s+(.+)', line) + if match is not None: + idx = match.group(1) + value = match.group(2).rstrip('\0') + + _eeprom_info_dict[idx] = value + except Exception: + pass + return _eeprom_info_dict + + def _load_eeprom(self): + eeprom_dict = {} + + if os.path.exists(EEPROM_TMP_FILE): + with open(EEPROM_TMP_FILE, 'r') as fd: + eeprom_dict = json.load(fd) + + return eeprom_dict + + original_stdout = sys.stdout + sys.stdout = StringIO() + rv = -1 + try: + rv = self.read_eeprom_db() + except BaseException: + pass + + if rv == 0: + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + eeprom_dict = self.__parse_output(decode_output) + else: + e = self.read_eeprom() + if e is None: + sys.stdout = original_stdout + return {} + + self.decode_eeprom(e) + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + + (is_valid, valid_crc) = self.is_checksum_valid(e) + if not is_valid: + return {} + + eeprom_dict = self.__parse_output(decode_output) + + if len(eeprom_dict) != 0: + with open(EEPROM_TMP_FILE, 'w') as fd: + fcntl.flock(fd, fcntl.LOCK_EX) + json.dump(eeprom_dict, fd) + fcntl.flock(fd, fcntl.LOCK_UN) + + return eeprom_dict + + def get_eeprom(self): + return self._eeprom + + def get_product(self): + return self._eeprom.get('0x21', NULL) + + def get_pn(self): + return self._eeprom.get('0x22', NULL) + + def get_serial(self): + return self._eeprom.get('0x23', NULL) + + def get_mac(self): + return self._eeprom.get('0x24', NULL) + + def get_revision(self): + return self._eeprom.get('0x26', NULL) + + def get_vendor_extn(self): + return self._eeprom.get('0xFD', NULL) diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan.py new file mode 100644 index 000000000000..6a1faa44ebbe --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan.py @@ -0,0 +1,345 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the fan status which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.fan_base import FanBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NOT_AVAILABLE = 'N/A' + +FAN_NAME_TEMPLATE = "{}Fan{}{}" +NUM_FAN_TRAYS = 4 +NUM_FANS_PER_TRAY = 2 +FAN_SPEED_TOLERANCE = 20 +MAX_RPM_FRONT=23000 +MAX_RPM_REAR=20500 +MAX_RPM_PSU=22600 +FAN_DIR_BASE = 0x41 +FAN_LED_BASE = 0x04 +FAN_FRU_BASE = 0x05 +FAN_STATUS_BASE = 0x00 +FAN_SID_BASE = 0x80 +PSU_FAN_SID_BASE = 0x8a +PSU_FRU_BASE = 0x03 + + +IPMI_FAN_DIR="ipmitool raw 0x3a 0x0c 0x00 0x02 {}" +IPMI_GET_SPEED="ipmitool raw 0x04 0x2d {}" +IPMI_GET_CPLD_PWM="ipmitool raw 0x3a 0x0c 0x00 0x02 {}" +IPMI_GET_PRESENCE="ipmitool raw 0x3a 0x03 0x03 {}" +IPMI_GET_MODEL="ipmitool fru list {} | grep 'Board Part Number'" +IPMI_GET_SERIAL="ipmitool fru list {} | grep 'Board Serial'" +IPMI_GET_PSU_MODEL="ipmitool fru list {} | grep 'Product Name'" +IPMI_GET_PSU_SPEED="ipmitool raw 0x04 0x2d {}" +IPMI_SET_STATUS_LED="ipmitool raw 0x3a 0x0a {} {}" +IPMI_GET_STATUS_LED="ipmitool raw 0x3a 0x0b {}" + +class Fan(FanBase): + """Platform-specific Fan class""" + + def __init__(self, fan_tray_index, fan_index=0, is_psu_fan=False, psu_index=0): + self.fan_index = fan_index + self.fan_tray_index = fan_tray_index + self.is_psu_fan = is_psu_fan + self._api_helper = APIHelper() + self.index = (self.fan_tray_index * 2) + self.fan_index + self.name = None + if self.is_psu_fan: + self.psu_index = psu_index + self.max_speed = MAX_RPM_PSU + self._fan_sid_offset = PSU_FAN_SID_BASE + self.psu_index + self._fan_status_offset = FAN_STATUS_BASE + NUM_FAN_TRAYS + self.psu_index + else: + self._fan_status_offset = FAN_STATUS_BASE + self.fan_tray_index + self._fan_fru_offset = FAN_FRU_BASE + self.fan_tray_index + self._fan_dir_offset = FAN_DIR_BASE + (self.fan_tray_index * 4) + if self.fan_tray_index > 1: + # Questone CPLD firmware is used and hence FAN 3 will be missing + # There are only 4 FAN trays in this platform + self._fan_dir_offset = self._fan_dir_offset + 4 + + self._fan_speed_offset = self._fan_dir_offset - 1 + self._fan_led_offset = FAN_LED_BASE + self.fan_tray_index + + if fan_index % 2 == 0: + # Front FAN + self.is_front = True + self.max_speed = MAX_RPM_FRONT + self._fan_sid_offset = FAN_SID_BASE + 1 + (self.fan_tray_index * NUM_FANS_PER_TRAY) + else: + # Rear FAN + self.is_front = False + self.max_speed = MAX_RPM_REAR + self._fan_sid_offset = FAN_SID_BASE + (self.fan_tray_index * NUM_FANS_PER_TRAY) + + def get_direction(self): + """ + Retrieves the direction of fan + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = NOT_AVAILABLE + + if self.is_psu_fan: + cmd = IPMI_GET_PSU_MODEL.format(PSU_FRU_BASE + self.psu_index) + status, output = self._api_helper.run_command(cmd) + if status and output: + model = output.split(':')[-1] + if len(model) > 0: + if model[-2:] == ' B': + direction = self.FAN_DIRECTION_INTAKE + else: + direction = self.FAN_DIRECTION_EXHAUST + else: + cmd = IPMI_FAN_DIR.format(self._fan_dir_offset) + status, output = self._api_helper.run_command(cmd) + if status: + dir_num = int(output, 16) & 0x0C + if dir_num == 0x0: + direction = self.FAN_DIRECTION_EXHAUST + elif dir_num == 0x8: + direction = self.FAN_DIRECTION_INTAKE + + return direction + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed = 0 + + if not self.is_psu_fan: + multiplier = 150.0 + else: + multiplier = 100.0 + + cmd = IPMI_GET_PSU_SPEED.format(self._fan_sid_offset) + status, output = self._api_helper.run_command(cmd) + if status: + raw_speed = output.split()[0] + rpm_speed = int(raw_speed, 16) * multiplier + speed = int((rpm_speed/self.max_speed) * 100) + + return speed + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + + Note: + speed_pc = pwm_target/255*100 + + 0 : when PWM mode is use + pwm : when pwm mode is not use + """ + target_speed = 0 + + if self.is_psu_fan: + # Ignored for tolerance check + return self.get_speed() + + cmd = IPMI_GET_CPLD_PWM.format(self._fan_speed_offset) + status, output = self._api_helper.run_command(cmd) + if status: + fan_pwm = int(output, 16) + target_speed = round(fan_pwm / 255 * 100) + + return target_speed + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + return FAN_SPEED_TOLERANCE + + def set_speed(self, speed): + """ + Sets the fan speed + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + Returns: + A boolean, True if speed is set successfully, False if not + Notes: + pwm setting mode must set as Manual + manual: systemctl stop fanctrl.service + auto: systemctl start fanctrl.service + """ + + # FAN speed is controlled by BCM always + return False + + def set_status_led(self, color): + """ + Sets the state of the fan module status LED + Args: + color: A string representing the color with which to set the + fan module status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + # There is no per Fan LED + return True + + def drawer_set_status_led(self, color): + status = False + + color_dict = {\ + self.STATUS_LED_COLOR_OFF: 0,\ + self.STATUS_LED_COLOR_AMBER: 1,\ + self.STATUS_LED_COLOR_RED: 1,\ + self.STATUS_LED_COLOR_GREEN: 2\ + } + + if not self.is_psu_fan: + cmd = IPMI_SET_STATUS_LED.format(self._fan_led_offset, color_dict.get(color, 0)) + status, _ = self._api_helper.run_command(cmd) + + return status + + + def get_status_led(self): + """ + Gets the state of the fan status LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + + Note: + Output + STATUS_LED_COLOR_GREEN = "green" + STATUS_LED_COLOR_AMBER = "amber" + STATUS_LED_COLOR_RED = "red" + STATUS_LED_COLOR_OFF = "off" + + Input + 0x1: green + 0x2: red + 0x3: off + """ + status = NOT_AVAILABLE + color_dict = {\ + 0: self.STATUS_LED_COLOR_OFF,\ + 1: self.STATUS_LED_COLOR_AMBER,\ + 2: self.STATUS_LED_COLOR_GREEN\ + } + + if not self.is_psu_fan: + cmd = IPMI_GET_STATUS_LED.format(self._fan_led_offset) + status, output = self._api_helper.run_command(cmd) + if status: + color = int(output, 16) + status = color_dict.get(color, status) + + return status + + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + + if not self.name: + if not self.is_psu_fan: + psu_name = "" + fan_id = " {}".format(self.fan_tray_index + 1) + fan_type = " Front" if self.is_front else " Rear" + else: + psu_name = "PSU {} ".format(self.psu_index + 1) + fan_id = " {}".format(self.fan_tray_index + 1) + fan_type = "" + + self.name = FAN_NAME_TEMPLATE.format(psu_name, fan_id, fan_type) + + return self.name + + def get_presence(self): + """ + Retrieves the presence of the FAN + Returns: + bool: True if FAN is present, False if not + """ + + presence = False + + cmd = IPMI_GET_PRESENCE.format(self._fan_status_offset) + status, output = self._api_helper.run_command(cmd) + if status and output == "00": + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + model = NOT_AVAILABLE + + if not self.is_psu_fan: + cmd = IPMI_GET_MODEL.format(self._fan_fru_offset) + status, output = self._api_helper.run_command(cmd) + if status and output: + return output.split()[-1] + + return model + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + serial = NOT_AVAILABLE + + if not self.is_psu_fan: + cmd = IPMI_GET_SERIAL.format(self._fan_fru_offset) + status, output = self._api_helper.run_command(cmd) + if status and output: + return output.split()[-1] + + return serial + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and self.get_speed() > 0 + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + if not self.is_psu_fan: + return True + + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..14ea5c900506 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan_drawer.py @@ -0,0 +1,82 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the fan status which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.fan_drawer_base import FanDrawerBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(FanDrawerBase): + + def __init__(self, index, fan_list): + FanDrawerBase.__init__(self) + + self._fan_list = fan_list + self._index = index + 1 + + def set_status_led(self, color): + """ + Sets the state of the fan drawer status LED + Args: + color: A string representing the color with which to set the + fan drawer status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + return self._fan_list[0].drawer_set_status_led(color) + + def get_status_led(self): + """ + Gets the state of the fan drawer LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + return self._fan_list[0].get_status_led() + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return 'Drawer {}'.format(self._index) + + def get_presence(self): + """ + Retrieves the presence of the FAN + Returns: + bool: True if FAN is present, False if not + """ + return self._fan_list[0].get_presence() + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + return self._fan_list[0].get_model() + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + return self._fan_list[0].get_serial() + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self._fan_list[0].get_status() diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/helper.py new file mode 100644 index 000000000000..7bcbd70a0a7c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/helper.py @@ -0,0 +1,191 @@ +#!/usr/bin/env python + +import os +import struct +import subprocess +from mmap import * +from sonic_py_common.device_info import get_platform_and_hwsku + +SCALE = 16 +BIN_BITS = 8 +EMPTY_STRING = "" +HOST_CHK_CMD = "docker > /dev/null 2>&1" + + +class APIHelper(): + + def __init__(self): + (self.platform, self.hwsku) = get_platform_and_hwsku() + + def get_register_value(self, getreg_path, register): + cmd = "echo {1} > {0}; cat {0}".format(getreg_path, register) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + return None + else: + return data + + def hex_to_bin(self, ini_string): + return bin(int(ini_string, SCALE)).zfill(BIN_BITS) + + def is_host(self): + rv, _ = subprocess.getstatusoutput(HOST_CHK_CMD) + return (rv == 0) + + def pci_get_value(self, resource, offset): + status = True + result = "" + try: + fd = os.open(resource, os.O_RDWR) + mm = mmap(fd, 0) + mm.seek(int(offset)) + read_data_stream = mm.read(4) + result = struct.unpack('I', read_data_stream) + except Exception: + status = False + return status, result + + def run_command(self, cmd): + status = True + result = "" + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + def read_one_line_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.readline() + return data.strip() + except IOError: + pass + return None + + def search_file_by_contain(self, directory, search_str, file_start): + for dirpath, dirnames, files in os.walk(directory): + for name in files: + file_path = os.path.join(dirpath, name) + if name.startswith(file_start) and search_str in self.read_txt_file(file_path): + return dirpath + return None + + def write_file(self, file_path, data): + try: + with open(file_path, 'w') as fd: + fd.write(str(data)) + return True + except Exception: + pass + return False + + def ipmi_raw(self, netfn, cmd): + status = True + result = "" + cmd = "ipmitool raw {} {}".format(str(netfn), str(cmd)) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def ipmi_fru_id(self, id, key=None): + status = True + result = "" + cmd = "ipmitool fru print {}".format(str( + id)) if not key else "ipmitool fru print {0} | grep '{1}' ".format(str(id), str(key)) + + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def ipmi_set_ss_thres(self, id, threshold_key, value): + status = True + result = "" + cmd = "ipmitool sensor thresh '{}' {} {}".format( + str(id), str(threshold_key), str(value)) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def fru_decode_product_serial(self, data): + + if data and data[4] != 00: + start_product_info = ord(data[4]) * 8 + start_format_version = start_product_info + start_product_info = start_format_version + 1 + start_product_Lang_code = start_product_info + 1 + start_product_Manu_name = start_product_Lang_code + 1 + start_product_Manu_name_length = ord(data[start_product_Manu_name]) & 0x0F + start_product_name = start_product_Manu_name + start_product_Manu_name_length + 1 + start_product_name_length = ord(data[start_product_name]) & 0x0F + start_product_module_number = start_product_name + start_product_name_length +1 + start_product_module_number_length = ord(data[start_product_module_number]) & 0x0F + start_product_version = start_product_module_number + start_product_module_number_length +1 + start_product_version_length = ord(data[start_product_version]) & 0x0F + start_product_serial_number = start_product_version + start_product_version_length +1 + start_product_serial_number_length = ord(data[start_product_serial_number]) & 0x1F + return data[start_product_serial_number+1:start_product_serial_number+start_product_serial_number_length+1] + return "N/A" + + def fru_decode_product_model(self, data): + if data and data[4] != 00: + start_product_info = ord(data[4]) * 8 + start_format_version = start_product_info + start_product_info = start_format_version + 1 + start_product_lang_code = start_product_info + 1 + start_product_manu_name = start_product_lang_code + 1 + start_product_manu_name_length = ord(data[start_product_manu_name]) & 0x1F + start_product_name = start_product_manu_name + start_product_manu_name_length + 1 + start_product_name_length = ord(data[start_product_name]) & 0x1F + start_product_module_number = start_product_name + start_product_name_length + 1 + start_product_module_number_length = ord(data[start_product_module_number]) & 0x1F + return data[start_product_module_number + 1: start_product_module_number +start_product_module_number_length + 1] + return "N/A" + + def fru_decode_product_name(self, data): + + if data and data[4] != 00: + start_product_info = ord(data[4]) * 8 + start_format_version = start_product_info + start_product_info = start_format_version + 1 + start_product_Lang_code = start_product_info + 1 + start_product_Manu_name = start_product_Lang_code + 1 + start_product_Manu_name_length = ord(data[start_product_Manu_name]) & 0x0F + start_product_name = start_product_Manu_name + start_product_Manu_name_length + 1 + start_product_name_length = ord(data[start_product_name]) & 0x0F + return data[start_product_name+1: start_product_name+start_product_name_length+1] + + return "N/A" + + def read_eeprom_sysfs(self,sys_path,sysfs_file): + sysfs_path = os.path.join(sys_path, sysfs_file) + try: + with open(sysfs_path, mode='rb', buffering=0) as fd: + data = fd.read(256) + return data + except Exception: + pass + return None diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/pcie.py new file mode 100644 index 000000000000..2f7931d42b01 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/pcie.py @@ -0,0 +1,15 @@ +# +# pcie_base.py +# +# Abstract base class for implementing platform-specific +# PCIE functionality for SONiC +# + +try: + from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil +except ImportError as e: + raise ImportError (str(e) + " - required module not found") + +class Pcie(PcieUtil): + def __init__(self, platform_path): + PcieUtil.__init__(self, platform_path) diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/platform.py new file mode 100644 index 000000000000..c9ba822ac0da --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/platform.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Platform(PlatformBase): + """Platform-specific Platform class""" + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() + diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/psu.py new file mode 100644 index 000000000000..8c36c61e1f98 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/psu.py @@ -0,0 +1,265 @@ +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.psu_base import PsuBase + from .helper import APIHelper + from sonic_platform.fan import Fan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +IPMI_SENSOR_NETFN = "0x04" +IPMI_SENSOR_READ_CMD = "0x2D {}" +IPMI_SENSOR_THRESH_CMD = "0x27 {}" +IPMI_FRU_MODEL_KEY = "Product Name" +IPMI_FRU_SERIAL_KEY = "Product Serial" + +MAX_PSU_POWER = 550 #Watts +psu_ipmi_id = {\ + 1: {\ + "TEMP": "0x0d",\ + "VOUT": "0x0f",\ + "COUT": "0x10",\ + "POUT": "0x11",\ + "STATUS": "0x72",\ + "FRU": 3,\ + }, + 2: {\ + "TEMP": "0x17",\ + "VOUT": "0x19",\ + "COUT": "0x1a",\ + "POUT": "0x1b",\ + "STATUS": "0x73",\ + "FRU": 4,\ + } +} + +ANALOG_READ_OFFSET = 0 +EVENT_0_7_OFFSET = 2 +EVENT_8_14_OFFSET = 3 + +FRU_SERIAL = 4 +FRU_MODEL = 1 + + +class Psu(PsuBase): + """Platform-specific Psu class""" + + def __init__(self, psu_index): + PsuBase.__init__(self) + self.index = psu_index+1 + # PSU has only one FAN + fan = Fan(0, 0, is_psu_fan=True, psu_index=psu_index) + self._fan_list.append(fan) + self._api_helper = APIHelper() + + def get_voltage(self): + """ + Retrieves current PSU voltage output + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + psu_voltage = 0.0 + psu_vout_key = psu_ipmi_id[self.index]['VOUT'] + status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\ + IPMI_SENSOR_READ_CMD.format(psu_vout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx10^-1 + psu_voltage = int(value, 16) / 10.0 + + return psu_voltage + + def get_voltage_high_threshold(self): + return 12.6 + + def get_voltage_low_threshold(self): + return 11.4 + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + Returns: + A float number, the electric current in amperes, e.g 15.4 + """ + psu_current = 0.0 + psu_cout_key = psu_ipmi_id[self.index]['COUT'] + status, output = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_cout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx3x10^-1 + psu_current = int(value, 16) * 3 / 10.0 + + return psu_current + + def get_power(self): + """ + Retrieves current energy supplied by PSU + Returns: + A float number, the power in watts, e.g. 302.6 + """ + psu_power = 0.0 + psu_pout_key = psu_ipmi_id[self.index]['POUT'] + status, output = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx5 + psu_power = int(value, 16) * 5 + return psu_power + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + Returns: + A boolean, True if PSU has stablized its output voltages and passed all + its internal self-tests, False if not. + """ + return self.get_status() + + def get_status_led(self): + """ + Gets the state of the PSU status LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if self.get_presence(): + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return "blinking green" + else: + return "N/A" + + def get_temperature(self): + """ + Retrieves current temperature reading from PSU + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + # PSU's ambient temperature sensor is considered as the PSU temperature + psu_temp = 0.0 + psu_temp_id = psu_ipmi_id[self.index]['TEMP'] + status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\ + IPMI_SENSOR_READ_CMD.format(psu_temp_id)) + if status: + value = output.split()[ANALOG_READ_OFFSET] + psu_temp = float(int(value, 16)) + + return psu_temp + + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + + return MAX_PSU_POWER + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return "PSU {}".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + psu_presence = False + psu_pstatus_key = psu_ipmi_id[self.index]['STATUS'] + status, raw_status_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key)) + status_byte = raw_status_read.split()[EVENT_0_7_OFFSET] + + if status: + psu_presence = True if int(status_byte, 16) & 0x01 == 0x01 else False + + return psu_presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + model = "Unknown" + if self.get_presence(): + ipmi_fru_idx = psu_ipmi_id[self.index]['FRU'] + status, raw_model = self._api_helper.ipmi_fru_id( + ipmi_fru_idx, IPMI_FRU_MODEL_KEY) + + fru_pn_list = raw_model.split(':')[-1] + model = fru_pn_list.strip() + else: + model = "N/A" + + return model + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + serial = "Unknown" + if self.get_presence(): + ipmi_fru_idx = psu_ipmi_id[self.index]['FRU'] + status, raw_serial = self._api_helper.ipmi_fru_id( + ipmi_fru_idx, IPMI_FRU_SERIAL_KEY) + + fru_sr_list = raw_serial.split(':')[-1] + serial = fru_sr_list.strip() + else: + model = "N/A" + + return serial + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + psu_status = False + psu_pstatus_key = psu_ipmi_id[self.index]['STATUS'] + status, raw_status_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key)) + status_byte = raw_status_read.split()[EVENT_0_7_OFFSET] + + if status: + psu_status = False if int(status_byte, 16) & 0x08 == 0x08 else True + + return psu_status + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return self.index + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/sfp.py new file mode 100644 index 000000000000..66950af04200 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/sfp.py @@ -0,0 +1,197 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Sfp contains an implementation of SONiC Platform Base API and +# provides the sfp device status which are available in the platform +# +############################################################################# +import time + +try: + from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +SFP_TYPE = "SFP" +QSFP_TYPE = "QSFP" + +QSFP_PORT_START = 49 +QSFP_PORT_END = 56 +SFP_PORT_START = 1 +SFP_PORT_END = 48 + +PORT_INFO_PATH = '/sys/class/questone2_fpga' +SFP_I2C_START = 2 + + +class Sfp(SfpOptoeBase): + """Platform-specific Sfp class""" + + # Path to QSFP sysfs + PLATFORM_ROOT_PATH = "/usr/share/sonic/device" + PMON_HWSKU_PATH = "/usr/share/sonic/hwsku" + + def __init__(self, sfp_index): + SfpOptoeBase.__init__(self) + # Init index + self.index = sfp_index + 1 + self.sfp_type, self.port_name = self.__get_sfp_info() + self._api_helper = APIHelper() + self.platform = self._api_helper.platform + self.hwsku = self._api_helper.hwsku + + # Init eeprom path + self.eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(SFP_I2C_START+sfp_index) + + def __get_sfp_info(self): + port_name = "Unknown" + sfp_type = "Unknown" + + if self.index >= QSFP_PORT_START and self.index <= QSFP_PORT_END: + sfp_type = QSFP_TYPE + port_name = sfp_type + str(self.index - QSFP_PORT_START + 1) + elif self.index >= SFP_PORT_START and self.index <= SFP_PORT_END: + sfp_type = SFP_TYPE + port_name = sfp_type + str(self.index) + return sfp_type, port_name + + def __get_path_to_port_config_file(self): + platform_path = "/".join([self.PLATFORM_ROOT_PATH, self.platform]) + hwsku_path = "/".join([platform_path, self.hwsku] + ) if self._api_helper.is_host() else self.PMON_HWSKU_PATH + return "/".join([hwsku_path, "port_config.ini"]) + + def get_eeprom_path(self): + return self.eeprom_path + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + Returns: + A Boolean, True if reset enabled, False if disabled + """ + reg_status = self._api_helper.read_one_line_file( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"])) + + return (int(reg_status) == 0) + + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + Returns: + A boolean, True if successful, False if not + """ + if self.sfp_type != QSFP_TYPE: + return False + + try: + reg_file = open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]), "w") + except IOError as e: + #print("Error: unable to open file: %s" % str(e)) + return False + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(0)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]), "w") + except IOError as e: + #print("Error: unable to open file: %s" % str(e)) + return False + + reg_file.seek(0) + reg_file.write(hex(1)) + reg_file.close() + + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + + try: + reg_file = open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"]), "w") + except IOError as e: + return False + + if lpmode: + value=1 + else: + value=0 + reg_file.write(hex(value)) + reg_file.close() + + return True + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + + reg_status = self._api_helper.read_one_line_file( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"])) + + return (int(reg_status) == 1) + + def get_position_in_parent(self): + return self.index + + def is_replaceable(self): + return True + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + sfputil_helper = SfpUtilHelper() + sfputil_helper.read_porttab_mappings( + self.__get_path_to_port_config_file()) + name = sfputil_helper.physical_to_logical[self.index] or "Unknown" + return name + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + # Get path for access port presence status + sysfs_filename = "sfp_modabs" if self.sfp_type == SFP_TYPE else "qsfp_modprs" + reg_path = "/".join([PORT_INFO_PATH, self.port_name, sysfs_filename]) + + content = self._api_helper.read_one_line_file(reg_path) + reg_value = int(content) + + return (reg_value == 0) + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and not self.get_reset_status() diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/thermal.py similarity index 50% rename from device/celestica/x86_64-cel_silverstone-r0/sonic_platform/thermal.py rename to platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/thermal.py index 9ecf12218d50..d3d96b1e3e73 100644 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/thermal.py +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/thermal.py @@ -19,9 +19,8 @@ IPMI_SENSOR_NETFN = "0x04" IPMI_SS_READ_CMD = "0x2D {}" IPMI_SS_THRESHOLD_CMD = "0x27 {}" -DEFUALT_LOWER_TRESHOLD = 0.0 HIGH_TRESHOLD_SET_KEY = "unc" - +DEFAULT_VAL = 'N/A' class Thermal(ThermalBase): """Platform-specific Thermal class""" @@ -30,26 +29,30 @@ def __init__(self, thermal_index): ThermalBase.__init__(self) self._api_helper = APIHelper() self.index = thermal_index - self.THERMAL_LIST = [ - ('TEMP_FAN_U52', 'Fan Tray Middle Temperature Sensor', '0x00'), - ('TEMP_FAN_U17', 'Fan Tray Right Temperature Sensor', '0x01'), - ('TEMP_SW_U52', 'Switchboard Left Inlet Temperature Sensor', '0x02'), - ('TEMP_SW_U16', 'Switchboard Right Inlet Temperature Sensor', '0x03'), - ('TEMP_BB_U3', 'Baseboard Temperature Sensor', '0x04'), - ('TEMP_CPU', 'CPU Internal Temperature Sensor', '0x05'), - ('TEMP_SW_Internal', 'ASIC Internal Temperature Sensor', '0x61'), - ('SW_U04_Temp', 'IR3595 Chip Left Temperature Sensor', '0x4F'), - ('SW_U14_Temp', 'IR3595 Chip Right Temperature Sensor', '0x56'), - ('SW_U4403_Temp', 'IR3584 Chip Temperature Sensor', '0x5D'), + thermal_list = [\ + ('Base_Temp_U5', '0x01', 'Baseboard Right Temp'),\ + ('Base_Temp_U7', '0x02', 'Baseboard Left Temp'),\ + ('Switch_Temp_U31', '0x03', 'ASIC External Front Temp'),\ + ('Switch_Temp_U30', '0x04', 'ASIC External Rear Temp'),\ + ('Switch_Temp_U29', '0x05', 'Switchboard Right Temp'),\ + ('Switch_Temp_U28', '0x06', 'Switchboard Left Temp'),\ + ('CPU_Temp', '0x07', 'CPU Internal Temp'),\ + ('Switch_U33_Temp', '0x4C', 'IR3595 Chip Temp'),\ + ('Switch_U21_Temp', '0x56', 'IR3584 Chip Temp'),\ + ('PSUL_Temp1', '0x0D', 'PSU 1 Ambient Temp'),\ + ('PSUL_Temp2', '0x0E', 'PSU 1 Hotspot Temp'),\ + ('PSUR_Temp1', '0x17', 'PSU 2 Ambient Temp'),\ + ('PSUR_Temp2', '0x18', 'PSU 2 Hotspot Temp'),\ ] - self.sensor_id = self.THERMAL_LIST[self.index][0] - self.sensor_des = self.THERMAL_LIST[self.index][1] - self.sensor_reading_addr = self.THERMAL_LIST[self.index][2] + self.sensor_id = thermal_list[self.index][0] + self.sensor_reading_addr = thermal_list[self.index][1] + self.sensor_name = thermal_list[self.index][2] - def __set_threshold(self, key, value): - print('{} {}'.format(key, value)) + temp = self.get_temperature(True) + self.minimum_thermal = temp + self.maximum_thermal = temp - def get_temperature(self): + def get_temperature(self, skip_record=False): """ Retrieves current temperature reading from thermal Returns: @@ -62,7 +65,20 @@ def get_temperature(self): if status and len(raw_ss_read.split()) > 0: ss_read = raw_ss_read.split()[0] temperature = float(int(ss_read, 16)) - return temperature + + if temperature != 0.0: + if not skip_record: + # Record maximum + if temperature > self.maximum_thermal: + self.maximum_thermal = temperature + + # Record minimum + if temperature < self.minimum_thermal: + self.minimum_thermal = temperature + + return temperature + else: + return DEFAULT_VAL def get_high_threshold(self): """ @@ -77,7 +93,10 @@ def get_high_threshold(self): if status and len(raw_up_thres_read.split()) > 6: ss_read = raw_up_thres_read.split()[4] high_threshold = float(int(ss_read, 16)) - return high_threshold + if high_threshold != 0.0: + return high_threshold + else: + return DEFAULT_VAL def get_low_threshold(self): """ @@ -86,7 +105,7 @@ def get_low_threshold(self): A float number, the low threshold temperature of thermal in Celsius up to nearest thousandth of one degree Celsius, e.g. 30.125 """ - return DEFUALT_LOWER_TRESHOLD + return DEFAULT_VAL def set_high_threshold(self, temperature): """ @@ -97,7 +116,8 @@ def set_high_threshold(self, temperature): Returns: A boolean, True if threshold is set successfully, False if not """ - status, ret_txt = self._api_helper.ipmi_set_ss_thres(self.sensor_id, HIGH_TRESHOLD_SET_KEY, temperature) + status, ret_txt = self._api_helper.ipmi_set_ss_thres( + self.sensor_id, HIGH_TRESHOLD_SET_KEY, temperature) return status def set_low_threshold(self, temperature): @@ -111,37 +131,61 @@ def set_low_threshold(self, temperature): """ return False - def get_name(self): + def get_high_critical_threshold(self): """ - Retrieves the name of the thermal device - Returns: - string: The name of the thermal device + Retrieves the high critical threshold temperature of thermal + Returns: + A float number, the high critical threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 """ - return self.THERMAL_LIST[self.index][0] + high_critical_threshold = 0.0 + status, raw_up_thres_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr)) + if status and len(raw_up_thres_read.split()) > 6: + ss_read = raw_up_thres_read.split()[5] + high_critical_threshold = float(int(ss_read, 16)) + if high_critical_threshold != 0.0: + return high_critical_threshold + else: + return DEFAULT_VAL - def get_presence(self): + def get_minimum_recorded(self): """ - Retrieves the presence of the device + Retrieves the minimum recorded temperature of thermal Returns: - bool: True if device is present, False if not + A float number, the minimum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 """ - return True if self.get_temperature() > 0 else False + return self.minimum_thermal - def get_model(self): + def get_maximum_recorded(self): """ - Retrieves the model number (or part number) of the device + Retrieves the maximum recorded temperature of thermal Returns: - string: Model/part number of device + A float number, the maximum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + return self.maximum_thermal + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the thermal device + Returns: + string: The name of the thermal device """ - return self.sensor_des + return self.sensor_name - def get_serial(self): + def get_presence(self): """ - Retrieves the serial number of the device + Retrieves the presence of the device Returns: - string: Serial number of device + bool: True if device is present, False if not """ - return "Unknown" + return True if self.get_temperature() > 0 else False def get_status(self): """ @@ -150,3 +194,11 @@ def get_status(self): A boolean value, True if device is operating properly, False if not """ return self.get_presence() + + def is_replaceable(self): + """ + Retrieves whether thermal module is replaceable + Returns: + A boolean value, True if replaceable, False if not + """ + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/watchdog.py new file mode 100644 index 000000000000..562b2177b442 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/watchdog.py @@ -0,0 +1,264 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica Qeastone2 +# +# Watchdog contains an implementation of SONiC Platform Base API +# +############################################################################# +import subprocess + +try: + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +I2C_WDT_BUS_ID=60 +I2C_WDT_DEV_ID=0x0d +I2C_WDT_RESET_SRC_REG=0x06 +I2C_WDT_CTRL_REG=0x81 +I2C_WDT_SET_TIMER_L_REG=0x82 +I2C_WDT_SET_TIMER_M_REG=0x83 +I2C_WDT_SET_TIMER_H_REG=0x84 +I2C_WDT_ARM_REG=0x85 +I2C_WDT_TIMER_L_REG=0x86 +I2C_WDT_TIMER_M_REG=0x87 +I2C_WDT_TIMER_H_REG=0x88 + +WDT_ENABLE=0x1 +WDT_DISABLE=0x0 +WDT_KEEPALIVE=0x1 +WDT_COMMON_ERROR=-1 +DEFAULT_TIMEOUT=180 + +class Watchdog(WatchdogBase): + + def __init__(self): + # Set default value + self.armed = True if self._active() else False + self.timeout = self._gettimeout() + #self._disable() + + def _i2cget_cmd(self, reg): + cmd = "i2cget -y -f {} {} {} b".format(I2C_WDT_BUS_ID, I2C_WDT_DEV_ID, + reg) + return cmd + + def _i2cset_cmd(self, reg, val): + cmd = "i2cset -y -f {} {} {} {}".format(I2C_WDT_BUS_ID, I2C_WDT_DEV_ID, + reg, val) + return cmd + + def _getstatusoutput(self, cmd): + ret,data = subprocess.getstatusoutput(cmd) + status = 0 + if ret != 0: + status = ret + + return status, data + + def _active(self): + """ + WDT is active or not + """ + status, data = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_CTRL_REG)) + if status: + pass + return True if data == "0x01" else False + + def _enable(self): + """ + Turn on the watchdog timer + """ + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_CTRL_REG, + WDT_ENABLE)) + if status: + pass + + def _disable(self): + """ + Turn off the watchdog timer + """ + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_CTRL_REG, + WDT_DISABLE)) + if status: + pass + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + self._settimeleft(0) + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_ARM_REG, + WDT_KEEPALIVE)) + if status: + pass + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + ms = seconds * 1000 + ms_low_byte = ms & 0xff + ms_media_byte = (ms >> 8) & 0xff + ms_high_byte = (ms >> 16) & 0xff + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_SET_TIMER_L_REG, + ms_low_byte)) + if status: + pass + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_SET_TIMER_M_REG, + ms_media_byte)) + if status: + pass + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_SET_TIMER_H_REG, + ms_high_byte)) + if status: + pass + return self._gettimeout() + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + data = [0, 0, 0] + status, data[0] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_SET_TIMER_L_REG)) + if status: + pass + status, data[1] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_SET_TIMER_M_REG)) + if status: + pass + status, data[2] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_SET_TIMER_H_REG)) + if status: + pass + seconds = int((int(data[2], 16) << 16 + | int(data[1], 16) << 8 + | int(data[0], 16)) / 1000) + + return seconds + + def _settimeleft(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + ms = seconds * 1000 + ms_low_byte = ms & 0xff + ms_media_byte = (ms >> 8) & 0xff + ms_high_byte = (ms >> 16) & 0xff + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_TIMER_L_REG, + ms_low_byte)) + if status: + pass + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_TIMER_M_REG, + ms_media_byte)) + if status: + pass + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_TIMER_H_REG, + ms_high_byte)) + if status: + pass + + def _gettimeleft(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + data = [0, 0, 0] + status, data[0] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_TIMER_L_REG)) + if status: + pass + status, data[1] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_TIMER_M_REG)) + if status: + pass + status, data[2] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_TIMER_H_REG)) + if status: + pass + seconds = int((int(data[2], 16) << 16 + | int(data[1], 16) << 8 + | int(data[0], 16)) / 1000) + + return (self.timeout - seconds) if (self.timeout > seconds) else -1 + + ################################################################# + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + + ret = WDT_COMMON_ERROR + if seconds < 0: + return ret + + try: + if self.timeout != seconds: + self.timeout = self._settimeout(seconds) + if self.armed: + self._keepalive() + else: + self._settimeout(seconds) + self._keepalive() + self._enable() + self.armed = True + ret = self.timeout + except IOError as e: + pass + + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + self._disable() + self.armed = False + disarmed = True + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + + return self.armed + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Returns: + An integer specifying the number of seconds remaining on thei + watchdog timer. If the watchdog is not armed, returns -1. + """ + + timeleft = WDT_COMMON_ERROR + + if self.armed: + try: + timeleft = self._gettimeleft() + except IOError: + pass + + return timeleft diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/systemd/platform-modules-questone2.service b/platform/broadcom/sonic-platform-modules-cel/questone2/systemd/platform-modules-questone2.service new file mode 100644 index 000000000000..c6ad69112edb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/systemd/platform-modules-questone2.service @@ -0,0 +1,13 @@ +[Unit] +Description=Celestica questone2 platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-questone2 start +ExecStop=-/etc/init.d/platform-modules-questone2 stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/modules/baseboard_cpld.c b/platform/broadcom/sonic-platform-modules-cel/seastone2/modules/baseboard_cpld.c index 07ab42c21686..593a8655aacb 100644 --- a/platform/broadcom/sonic-platform-modules-cel/seastone2/modules/baseboard_cpld.c +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/modules/baseboard_cpld.c @@ -375,4 +375,4 @@ module_exit(baseboard_cpld_exit); MODULE_AUTHOR("Pradchaya Phucharoen "); MODULE_DESCRIPTION("Celestica Seastone2 Baseboard CPLD Driver"); -MODULE_LICENSE("GPL"); \ No newline at end of file +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/platform_sensors.py new file mode 100755 index 000000000000..559a4315a30f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/platform_sensors.py @@ -0,0 +1,161 @@ +#!/usr/bin/python +# +# Silverstone platform sensors. This script get the sensor data from BMC +# using ipmitool and display them in lm-sensor alike format. +# +# The following data is support: +# 1. Temperature sensors +# 2. PSUs +# 3. Fan Drawers + +import sys +import logging +import subprocess + +IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist'] +MAX_NUM_FANS = 4 +MAX_NUM_PSUS = 2 + +SENSOR_NAME = 0 +SENSOR_VAL = 4 + +sensor_dict = {} + +def ipmi_sensor_dump(cmd): + ''' Execute ipmitool command return dump output + exit if any error occur. + ''' + global sensor_dict + sensor_dump = '' + + try: + sensor_dump = subprocess.check_output(IPMI_SDR_CMD, universal_newlines=True) + except subprocess.CalledProcessError as e: + logging.error('Error! Failed to execute: {}'.format(cmd)) + sys.exit(1) + + for line in sensor_dump.splitlines(): + sensor_info = line.split('|') + sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip() + + return True + +def get_reading_by_name(sensor_name, sdr_elist_dump): + found = '' + + for line in sdr_elist_dump.splitlines(): + line = line.decode() + if sensor_name in line: + found = line.strip() + break + + if not found: + logging.error('Cannot find sensor name:' + sensor_name) + + else: + try: + found = found.split('|')[4] + except IndexError: + logging.error('Cannot get sensor data of:' + sensor_name) + + logging.basicConfig(level=logging.DEBUG) + return found + + +def read_temperature_sensors(): + sensor_list = [\ + ('Base_Temp_U5', 'Baseboard Right Temp'),\ + ('Base_Temp_U7', 'Baseboard Left Temp'),\ + ('Switch_Temp_U1', 'ASIC External Front Temp'),\ + ('Switch_Temp_U18', 'ASIC External Rear Temp'),\ + ('Switch_Temp_U28', 'Switchboard Right Temp'),\ + ('Switch_Temp_U29', 'Switchboard Left Temp'),\ + ('CPU_Temp', 'CPU Internal Temp'),\ + ('Switch_U33_Temp', 'IR3595 Chip Temp'),\ + ('Switch_U21_Temp', 'IR3584 Chip Temp'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Temperature Sensors\n" + output += "Adapter: IPMI adapter\n" + for sensor in sensor_list: + output += sensor_format.format('{}:'.format(sensor[1]),\ + sensor_dict[sensor[0]],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_fan_sensors(num_fans): + + sensor_list = [\ + ('Fan{}_Status', 'Fan Drawer {} Status'),\ + ('Fan{}_Front', 'Fan {} front'),\ + ('Fan{}_Rear', 'Fan {} rear'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Fan Drawers\n" + output += "Adapter: IPMI adapter\n" + for fan_num in range(1, num_fans+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(fan_num) + display_sensor_name = sensor[1].format(fan_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_psu_sensors(num_psus): + + sensor_list = [\ + ('PSU{}_Status', 'PSU {} Status'),\ + ('PSU{}_Fan', 'PSU {} Fan 1'),\ + ('PSU{}_VIn', 'PSU {} Input Voltage'),\ + ('PSU{}_CIn', 'PSU {} Input Current'),\ + ('PSU{}_PIn', 'PSU {} Input Power'),\ + ('PSU{}_Temp1', 'PSU {} Ambient Temp'),\ + ('PSU{}_Temp2', 'PSU {} Hotspot Temp'),\ + ('PSU{}_VOut', 'PSU {} Output Voltage'),\ + ('PSU{}_COut', 'PSU {} Output Current'),\ + ('PSU{}_POut', 'PSU {} Output Power'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "PSU\n" + output += "Adapter: IPMI adapter\n" + for psu_num in range(1, num_psus+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format('L' if psu_num == 1 else 'R') + display_sensor_name = sensor[1].format(psu_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def main(): + output_string = '' + + if ipmi_sensor_dump(IPMI_SDR_CMD): + output_string += read_temperature_sensors() + output_string += read_psu_sensors(MAX_NUM_PSUS) + output_string += read_fan_sensors(MAX_NUM_FANS) + + print(output_string) + + +if __name__ == '__main__': + main() diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/seastone2_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/seastone2_platform_shutdown.sh new file mode 100755 index 000000000000..e04cac54fa98 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/seastone2_platform_shutdown.sh @@ -0,0 +1,26 @@ +#!/bin/bash +REBOOT_CAUSE_DIR="/host/reboot-cause" +HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +REBOOT_TIME=$(date) + +if [ $# -ne 1 ]; then + echo "Require reboot type" + exit 1 +fi + +if [ ! -d "$REBOOT_CAUSE_DIR" ]; then + mkdir $REBOOT_CAUSE_DIR +fi + +echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE} + +# Best effort to write buffered data onto the disk +sync ; sync ; sync ; sleep 3 + +# BMC cold power-cyle +ipmitool chassis power cycle &> /dev/null + +# System should reboot by now and avoid the script returning to caller +sleep 10 + +exit 0 \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/sensors new file mode 100755 index 000000000000..5d740a9eb7d7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/sensors @@ -0,0 +1,11 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@" +docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@" diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/setup.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/setup.py new file mode 100644 index 000000000000..8d253086b26d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/setup.py @@ -0,0 +1,31 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on Celestica Platforms', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Wirut Getbamrung', + maintainer_email='wgetbumr@celestica.com', + packages=[ + 'sonic_platform', + ], + package_dir={ + 'sonic_platform': 'sonic_platform'}, + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.9', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/__init__.py new file mode 100644 index 000000000000..d3c24cb008dd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import platform diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/chassis.py new file mode 100644 index 000000000000..56664cc6e8f2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/chassis.py @@ -0,0 +1,457 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Chassis information which are available in the platform +# +############################################################################# + +try: + import sys + import time + import os + import re + import shutil + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform_base.sfp_base import SfpBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_FAN_DRAWER = 4 +NUM_FAN_PER_DRAWER = 2 +NUM_PSU = 2 +NUM_THERMAL = 13 +NUM_SFP = 33 +NUM_COMPONENT = 9 + +REBOOT_CAUSE_REG = "0xA106" +BASE_CPLD_PLATFORM = "baseboard" +BASE_GETREG_PATH = "/sys/devices/platform/{}/getreg".format(BASE_CPLD_PLATFORM) +IPMI_GET_SYS_STATUS_LED="ipmitool raw 0x3A 0x0C 0x00 0x02 0x62" +IPMI_SET_SYS_STATUS_LED="ipmitool raw 0x3A 0x0C 0x00 0x03 0x62 {}" + +ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt" + +class Chassis(ChassisBase): + """Platform-specific Chassis class""" + sfp_status_dict={} + + #led color status + SYSLED_COLOR_VAL_MAP = {\ + 'off': '0x33',\ + 'green': '0x10',\ + 'green_blink_1hz': '0x11',\ + 'amber': '0x20'\ + } + + SYSLED_VAL_COLOR_DESC_MAP = { + 0x33: 'off',\ + 0x10: 'green',\ + 0x11: 'green_blink_1hz',\ + 0x20: 'amber'\ + } + + def __init__(self): + ChassisBase.__init__(self) + self._api_helper = APIHelper() + self.sfp_module_initialized = False + self.fan_module_initialized = False + self._watchdog = None + self._airflow_direction = None + self.__initialize_eeprom() + + self.__initialize_thermals() + self.__initialize_fan() + self.__initialize_psu() + self.__initialize_components() + + def __initialize_sfp(self): + if not self.sfp_module_initialized: + from sonic_platform.sfp import Sfp + for index in range(0, NUM_SFP): + sfp = Sfp(index) + self._sfp_list.append(sfp) + present = sfp.get_presence() + self.sfp_status_dict[sfp.index] = '1' if present else '0' + self.sfp_module_initialized = True + + def __initialize_psu(self): + from sonic_platform.psu import Psu + for index in range(0, NUM_PSU): + psu = Psu(index) + self._psu_list.append(psu) + + def __initialize_fan(self): + from sonic_platform.fan import Fan + from sonic_platform.fan_drawer import FanDrawer + for fand_index in range(0, NUM_FAN_DRAWER): + drawer_fan_list=[] + for fan_index in range(0, NUM_FAN_PER_DRAWER): + fan = Fan(fand_index, fan_index) + self._fan_list.append(fan) + drawer_fan_list.append(fan) + fan_drawer = FanDrawer(fand_index, drawer_fan_list) + self._fan_drawer_list.append(fan_drawer) + self.fan_module_initialized = True + + + def __initialize_thermals(self): + from sonic_platform.thermal import Thermal + for index in range(0, NUM_THERMAL): + thermal = Thermal(index) + self._thermal_list.append(thermal) + + def __initialize_eeprom(self): + from sonic_platform.eeprom import Eeprom + self._eeprom = Eeprom() + + def __initialize_components(self): + from sonic_platform.component import Component + for index in range(0, NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + def initizalize_system_led(self): + return True + + def get_status_led(self): + color_str = 'N/A' + status, output = self._api_helper.run_command(IPMI_GET_SYS_STATUS_LED) + if status: + color_val = int(output, 16) & 0x33 + color_str = self.SYSLED_VAL_COLOR_DESC_MAP.get(color_val, color_str) + + return color_str + + def set_status_led(self, color): + status = False + + color_val = self.SYSLED_COLOR_VAL_MAP.get(color, None) + if color_val != None: + cmd = IPMI_SET_SYS_STATUS_LED.format(color_val) + status, res = self._api_helper.run_command(cmd) + + return status + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.get_mac() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.get_serial() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self._eeprom.get_eeprom() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + hw_reboot_cause = self._api_helper.get_register_value( + BASE_GETREG_PATH, REBOOT_CAUSE_REG) + + + # This tmp copy is to retain the reboot-cause only for the current boot + if os.path.isfile(ORG_HW_REBOOT_CAUSE_FILE): + shutil.move(ORG_HW_REBOOT_CAUSE_FILE, TMP_HW_REBOOT_CAUSE_FILE) + + if hw_reboot_cause == "0x33" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE): + with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file: + reboot_info = hw_cause_file.readline().rstrip('\n') + match = re.search(r'Reason:(.*),Time:(.*)', reboot_info) + if match is not None: + if match.group(1) == 'system': + return (self.REBOOT_CAUSE_NON_HARDWARE, 'System cold reboot') + + + if hw_reboot_cause == "0x99": + reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC + description = 'ASIC Overload Reboot' + elif hw_reboot_cause == "0x88": + reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_CPU + description = 'CPU Overload Reboot' + elif hw_reboot_cause == "0x77": + reboot_cause = self.REBOOT_CAUSE_WATCHDOG + description = 'Hardware Watchdog Reset' + elif hw_reboot_cause == "0x55": + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'CPU Cold Reset' + elif hw_reboot_cause == "0x44": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'CPU Warm Reset' + elif hw_reboot_cause == "0x33": + # When NON_HARDWARE is used and device is powercycled via IPMI + # reboot cause computed as Unknown, Hence using HARDWARE_OTHER + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Soft-Set Cold Reset' + elif hw_reboot_cause == "0x22": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'Soft-Set Warm Reset' + elif hw_reboot_cause == "0x11": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + description = 'Power On Reset' + elif hw_reboot_cause == "0x00": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + description = 'Power Cycle Reset' + else: + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Hardware reason' + + return (reboot_cause, description) + + ############################################################## + ######################## SFP methods ######################### + ############################################################## + + def get_num_sfps(self): + """ + Retrieves the number of sfps available on this chassis + Returns: + An integer, the number of sfps available on this chassis + """ + self.__initialize_sfp() + + return len(self._sfp_list) + + def get_all_sfps(self): + """ + Retrieves all sfps available on this chassis + Returns: + A list of objects derived from SfpBase representing all sfps + available on this chassis + """ + self.__initialize_sfp() + + return self._sfp_list + + def get_sfp(self, index): + """ + Retrieves sfp represented by (0-based) index + Args: + index: An integer, the index (0-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 0. + For example, 0 for Ethernet1, 1 for Ethernet2 and so on. + Returns: + An object dervied from SfpBase representing the specified sfp + """ + sfp = None + self.__initialize_sfp() + + try: + sfp = self._sfp_list[index - 1] + except IndexError: + sys.stderr.write("SFP index {} out of range (0-{})\n".format( + index, len(self._sfp_list) - 1)) + return sfp + + ############################################################## + ####################### Other methods ######################## + ############################################################## + + def get_watchdog(self): + """ + Retreives hardware watchdog device on this chassis + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + """ + if self._watchdog is None: + from sonic_platform.watchdog import Watchdog + self._watchdog = Watchdog() + + return self._watchdog + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return self._api_helper.hwsku + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + return self._eeprom.get_pn() + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + return self.get_serial_number() + + def get_revision(self): + """ + Retrieves the hardware revision for the chassis + Returns: + A string containing the hardware revision for this chassis. + """ + return self._eeprom.get_revision() + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return True + + ############################################################## + ###################### Event methods ######################### + ############################################################## + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'fan' '' '0' Fan removed + '1' Fan inserted + + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + + 'voltage' '' '0' Vout normal + '1' Vout abnormal + -------------------------------------------------------------------- + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'}, + 'voltage':{'U20':'0', 'U21':'1'}} + Indicates that: + fan 0 has been removed, fan 2 has been inserted. + sfp 11 has been removed, sfp 12 has been inserted. + monitored voltage U20 became normal, voltage U21 became abnormal. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + sfp_dict = {} + + SFP_REMOVED = '0' + SFP_INSERTED = '1' + + SFP_PRESENT = True + SFP_ABSENT = False + + start_time = time.time() + time_period = timeout/float(1000) #Convert msecs to secs + + while time.time() < (start_time + time_period) or timeout == 0: + for sfp in self._sfp_list: + port_idx = sfp.index + if self.sfp_status_dict[port_idx] == SFP_REMOVED and \ + sfp.get_presence() == SFP_PRESENT: + sfp_dict[port_idx] = SFP_INSERTED + self.sfp_status_dict[port_idx] = SFP_INSERTED + elif self.sfp_status_dict[port_idx] == SFP_INSERTED and \ + sfp.get_presence() == SFP_ABSENT: + sfp_dict[port_idx] = SFP_REMOVED + self.sfp_status_dict[port_idx] = SFP_REMOVED + + if sfp_dict: + return True, {'sfp':sfp_dict} + + time.sleep(0.5) + + return True, {'sfp':{}} # Timeout + + def get_airflow_direction(self): + if self._airflow_direction == None: + try: + vendor_extn = self._eeprom.get_vendor_extn() + airflow_type = vendor_extn.split()[2][2:4] # Either 0xFB or 0xBF + if airflow_type == 'FB': + direction = 'exhaust' + elif airflow_type == 'BF': + direction = 'intake' + else: + direction = 'N/A' + except (AttributeError, IndexError): + direction = 'N/A' + + self._airflow_direction = direction + + return self._airflow_direction + + def get_port_or_cage_type(self, index): + """ + Retrieves sfp port or cage type corresponding to physical port + + Args: + index: An integer (>=0), the index of the sfp to retrieve. + + Returns: + The masks of all types of port or cage that can be supported on the port + Types are defined in sfp_base.py + """ + if index in range(1, 32+1): + return SfpBase.SFP_PORT_TYPE_BIT_QSFP28 + elif index == 33: + return SfpBase.SFP_PORT_TYPE_BIT_SFP_PLUS + else: + raise NotImplementedError + + diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/component.py new file mode 100644 index 000000000000..1f82f87e6731 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/component.py @@ -0,0 +1,156 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +import os.path +import re + +try: + #from sonic_platform_base.component_base import ComponentBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NAME_IDX = 0 +DESC_IDX = 1 +VER_API_IDX = 2 + +BASE_CPLD_PLATFORM = "baseboard" +SW_CPLD_PLATFORM = "switchboard" +PLATFORM_SYSFS_PATH = "/sys/devices/platform/" + +FPGA_GETREG_PATH = "{}/{}/FPGA/getreg".format( + PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM) +BASE_GETREG_PATH = "{}/{}/getreg".format( + PLATFORM_SYSFS_PATH, BASE_CPLD_PLATFORM) +SW_CPLD1_GETREG_PATH = "{}/{}/CPLD1/getreg".format( + PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM) +SW_CPLD2_GETREG_PATH = "{}/{}/CPLD2/getreg".format( + PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM) +BIOS_VER_PATH = "/sys/class/dmi/id/bios_version" + +BASE_CPLD_VER_REG = "0xA100" +COME_CPLD_VER_REG = "0xA1E0" +SW_CPLD_VER_REG = "0x00" +FPGA_VER_REG = "0x00" + +UNKNOWN_VER = "N/A" +ONIE_VER_CMD = "cat /host/machine.conf" +SSD_VER_CMD = "smartctl -i /dev/sda" + +class Component(): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + COMPONENT_LIST = [ + ("BIOS", "Basic input/output System", self.__get_bios_ver), + ("ONIE", "Open Network Install Environment", self.__get_onie_ver), + ("BMC", "Baseboard Management Controller", self.__get_bmc_ver), + ("FPGA", "FPGA for transceiver EEPROM access and other component I2C access", self.__get_fpga_ver), + ("CPLD COMe", "COMe board CPLD", self.__get_cpld_ver), + ("CPLD BASE", "CPLD for board functions, fan control and watchdog", self.__get_cpld_ver), + ("CPLD SW1", "CPLD for port control QSFP(1-16)", self.__get_cpld_ver), + ("CPLD SW2", "CPLD for port control QSFP(17-32) SFP(33)", self.__get_cpld_ver), + ("SSD", "Solid State Drive - {}", self.__get_ssd_ver), + ] + + self.index = component_index + self.name = COMPONENT_LIST[self.index][NAME_IDX] + self.description = COMPONENT_LIST[self.index][DESC_IDX] + self.__get_version = COMPONENT_LIST[self.index][VER_API_IDX] + self._api_helper = APIHelper() + + def __get_bios_ver(self): + return self._api_helper.read_one_line_file(BIOS_VER_PATH) + + def __get_onie_ver(self): + onie_ver = "N/A" + status, raw_onie_data = self._api_helper.run_command(ONIE_VER_CMD) + if status: + ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data) + if ret != None: + onie_ver = ret.group(0) + return onie_ver + + def __get_bmc_ver(self): + cmd="ipmitool mc info | grep 'Firmware Revision'" + status, raw_ver=self._api_helper.run_command(cmd) + if status: + bmc_ver=raw_ver.split(':')[-1].strip() + return bmc_ver + else: + return UNKNOWN_VER + + def __get_fpga_ver(self): + version_raw = self._api_helper.get_register_value(FPGA_GETREG_PATH, FPGA_VER_REG) + return "{}.{}".format(int(version_raw[2:][:4], 16), int(version_raw[2:][4:], 16)) if version_raw else UNKNOWN_VER + + def __get_cpld_ver(self): + cpld_api_param = { + 'CPLD COMe': (BASE_GETREG_PATH, COME_CPLD_VER_REG), + 'CPLD BASE': (BASE_GETREG_PATH, BASE_CPLD_VER_REG), + 'CPLD SW1': (SW_CPLD1_GETREG_PATH, SW_CPLD_VER_REG), + 'CPLD SW2': (SW_CPLD2_GETREG_PATH, SW_CPLD_VER_REG), + } + api_param = cpld_api_param[self.name] + + cpld_ver = self._api_helper.get_register_value(api_param[0], api_param[1]) + return "{}.{}".format(int(cpld_ver[2], 16), int(cpld_ver[3], 16)) if cpld_ver else UNKNOWN_VER + + def __get_ssd_ver(self): + ssd_ver = "N/A" + status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD) + if status: + ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data) + if ret != None: + ssd_ver = ret.group(1) + return ssd_ver + + def __get_ssd_model(self): + model = "N/A" + + status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD) + if status: + ret = re.search(r"Device Model: +(.*)[^\\]", raw_ssd_data) + if ret != None: + try: + model = ret.group(1) + except (IndexError): + pass + return model + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return self.name + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + # For SSD get the model name from device + if self.name == "SSD": + return self.description.format(self.__get_ssd_model()) + + return self.description + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + return self.__get_version() diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/eeprom.py new file mode 100644 index 000000000000..32afdc2751d5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/eeprom.py @@ -0,0 +1,128 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import os + import sys + import re + import json + import fcntl + + if sys.version_info.major == 3: + from io import StringIO + else: + from cStringIO import StringIO + + from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +NULL = 'N/A' +EEPROM_TMP_FILE = '/tmp/eeprom_dump.json' + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + + EEPROM_DECODE_HEADLINES = 6 + + def __init__(self): + for i2cbus in range(2): + path_prefix = "/sys/class/i2c-adapter/i2c-{}/".format(i2cbus) + with open(path_prefix + "name") as fd: + if 'SMBus iSMT adapter at ' in fd.readline(): + self._eeprom_path = path_prefix + "{}-0056/eeprom".format(i2cbus) + break + super(Eeprom, self).__init__(self._eeprom_path, 0, '', True) + self._eeprom = self._load_eeprom() + + def __parse_output(self, decode_output): + decode_output.replace('\0', '') + lines = decode_output.split('\n') + lines = lines[self.EEPROM_DECODE_HEADLINES:] + _eeprom_info_dict = dict() + + for line in lines: + try: + match = re.search('(0x[0-9a-fA-F]{2})\s+\d+\s+(.+)', line) + if match is not None: + idx = match.group(1) + value = match.group(2).rstrip('\0') + + _eeprom_info_dict[idx] = value + except Exception: + pass + return _eeprom_info_dict + + def _load_eeprom(self): + eeprom_dict = {} + + if os.path.exists(EEPROM_TMP_FILE): + with open(EEPROM_TMP_FILE, 'r') as fd: + eeprom_dict = json.load(fd) + + return eeprom_dict + + original_stdout = sys.stdout + sys.stdout = StringIO() + rv = -1 + try: + rv = self.read_eeprom_db() + except BaseException: + pass + + if rv == 0: + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + eeprom_dict = self.__parse_output(decode_output) + else: + e = self.read_eeprom() + if e is None: + sys.stdout = original_stdout + return {} + + self.decode_eeprom(e) + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + + (is_valid, valid_crc) = self.is_checksum_valid(e) + if not is_valid: + return {} + + eeprom_dict = self.__parse_output(decode_output) + + if len(eeprom_dict) != 0: + with open(EEPROM_TMP_FILE, 'w') as fd: + fcntl.flock(fd, fcntl.LOCK_EX) + json.dump(eeprom_dict, fd) + fcntl.flock(fd, fcntl.LOCK_UN) + + return eeprom_dict + + def get_eeprom(self): + return self._eeprom + + def get_product(self): + return self._eeprom.get('0x21', NULL) + + def get_pn(self): + return self._eeprom.get('0x22', NULL) + + def get_serial(self): + return self._eeprom.get('0x23', NULL) + + def get_mac(self): + return self._eeprom.get('0x24', NULL) + + def get_revision(self): + return self._eeprom.get('0x26', NULL) + + def get_vendor_extn(self): + return self._eeprom.get('0xFD', NULL) diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan.py new file mode 100644 index 000000000000..2b577ac40287 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan.py @@ -0,0 +1,345 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the fan status which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.fan_base import FanBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NOT_AVAILABLE = 'N/A' + +FAN_NAME_TEMPLATE = "{}Fan{}{}" +NUM_FAN_TRAYS = 4 +NUM_FANS_PER_TRAY = 2 +FAN_SPEED_TOLERANCE = 20 +MAX_RPM_FRONT=23000 +MAX_RPM_REAR=20500 +MAX_RPM_PSU=22600 +FAN_DIR_BASE = 0x41 +FAN_LED_BASE = 0x04 +FAN_FRU_BASE = 0x05 +FAN_STATUS_BASE = 0x00 +FAN_SID_BASE = 0x80 +PSU_FAN_SID_BASE = 0x8a +PSU_FRU_BASE = 0x03 + + +IPMI_FAN_DIR="ipmitool raw 0x3a 0x0c 0x00 0x02 {}" +IPMI_GET_SPEED="ipmitool raw 0x04 0x2d {}" +IPMI_GET_CPLD_PWM="ipmitool raw 0x3a 0x0c 0x00 0x02 {}" +IPMI_GET_PRESENCE="ipmitool raw 0x3a 0x03 0x03 {}" +IPMI_GET_MODEL="ipmitool fru list {} | grep 'Board Part Number'" +IPMI_GET_SERIAL="ipmitool fru list {} | grep 'Board Serial'" +IPMI_GET_PSU_MODEL="ipmitool fru list {} | grep 'Product Name'" +IPMI_GET_PSU_SPEED="ipmitool raw 0x04 0x2d {}" +IPMI_SET_STATUS_LED="ipmitool raw 0x3a 0x0a {} {}" +IPMI_GET_STATUS_LED="ipmitool raw 0x3a 0x0b {}" + +class Fan(FanBase): + """Platform-specific Fan class""" + + def __init__(self, fan_tray_index, fan_index=0, is_psu_fan=False, psu_index=0): + self.fan_index = fan_index + self.fan_tray_index = fan_tray_index + self.is_psu_fan = is_psu_fan + self._api_helper = APIHelper() + self.index = (self.fan_tray_index * 2) + self.fan_index + self.name = None + if self.is_psu_fan: + self.psu_index = psu_index + self.max_speed = MAX_RPM_PSU + self._fan_sid_offset = PSU_FAN_SID_BASE + self.psu_index + self._fan_status_offset = FAN_STATUS_BASE + NUM_FAN_TRAYS + self.psu_index + else: + self._fan_status_offset = FAN_STATUS_BASE + self.fan_tray_index + self._fan_fru_offset = FAN_FRU_BASE + self.fan_tray_index + self._fan_dir_offset = FAN_DIR_BASE + (self.fan_tray_index * 4) + if self.fan_tray_index > 1: + # Questone CPLD firmware is used and hence FAN 3 will be missing + # There are only 4 FAN trays in this platform + self._fan_dir_offset = self._fan_dir_offset + 4 + + self._fan_speed_offset = self._fan_dir_offset - 1 + self._fan_led_offset = FAN_LED_BASE + self.fan_tray_index + + if fan_index % 2 == 0: + # Front FAN + self.is_front = True + self.max_speed = MAX_RPM_FRONT + self._fan_sid_offset = FAN_SID_BASE + 1 + (self.fan_tray_index * NUM_FANS_PER_TRAY) + else: + # Rear FAN + self.is_front = False + self.max_speed = MAX_RPM_REAR + self._fan_sid_offset = FAN_SID_BASE + (self.fan_tray_index * NUM_FANS_PER_TRAY) + + def get_direction(self): + """ + Retrieves the direction of fan + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = NOT_AVAILABLE + + if self.is_psu_fan: + cmd = IPMI_GET_PSU_MODEL.format(PSU_FRU_BASE + self.psu_index) + status, output = self._api_helper.run_command(cmd) + if status and output: + model = output.split(':')[-1] + if len(model) > 0: + if model[-2:] == ' B': + direction = self.FAN_DIRECTION_INTAKE + else: + direction = self.FAN_DIRECTION_EXHAUST + else: + cmd = IPMI_FAN_DIR.format(self._fan_dir_offset) + status, output = self._api_helper.run_command(cmd) + if status: + dir_num = int(output, 16) & 0x0C + if dir_num == 0x0: + direction = self.FAN_DIRECTION_EXHAUST + elif dir_num == 0x8: + direction = self.FAN_DIRECTION_INTAKE + + return direction + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed = 0 + + if not self.is_psu_fan: + multiplier = 150.0 + else: + multiplier = 100.0 + + cmd = IPMI_GET_PSU_SPEED.format(self._fan_sid_offset) + status, output = self._api_helper.run_command(cmd) + if status: + raw_speed = output.split()[0] + rpm_speed = int(raw_speed, 16) * multiplier + speed = int((rpm_speed/self.max_speed) * 100) + + return speed + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + + Note: + speed_pc = pwm_target/255*100 + + 0 : when PWM mode is use + pwm : when pwm mode is not use + """ + target_speed = 0 + + if self.is_psu_fan: + # Ignored for tolerance check + return self.get_speed() + + cmd = IPMI_GET_CPLD_PWM.format(self._fan_speed_offset) + status, output = self._api_helper.run_command(cmd) + if status: + fan_pwm = int(output, 16) + target_speed = round(fan_pwm / 255 * 100) + + return target_speed + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + return FAN_SPEED_TOLERANCE + + def set_speed(self, speed): + """ + Sets the fan speed + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + Returns: + A boolean, True if speed is set successfully, False if not + Notes: + pwm setting mode must set as Manual + manual: systemctl stop fanctrl.service + auto: systemctl start fanctrl.service + """ + + # FAN speed is controlled by BCM always + return False + + def set_status_led(self, color): + """ + Sets the state of the fan module status LED + Args: + color: A string representing the color with which to set the + fan module status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + # There is no per Fan LED + return True + + def drawer_set_status_led(self, color): + status = False + + color_dict = {\ + self.STATUS_LED_COLOR_OFF: 0,\ + self.STATUS_LED_COLOR_AMBER: 1,\ + self.STATUS_LED_COLOR_RED: 1,\ + self.STATUS_LED_COLOR_GREEN: 2\ + } + + if not self.is_psu_fan: + cmd = IPMI_SET_STATUS_LED.format(self._fan_led_offset, color_dict.get(color, 0)) + status, _ = self._api_helper.run_command(cmd) + + return status + + + def get_status_led(self): + """ + Gets the state of the fan status LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + + Note: + Output + STATUS_LED_COLOR_GREEN = "green" + STATUS_LED_COLOR_AMBER = "amber" + STATUS_LED_COLOR_RED = "red" + STATUS_LED_COLOR_OFF = "off" + + Input + 0x1: green + 0x2: red + 0x3: off + """ + status = NOT_AVAILABLE + color_dict = {\ + 0: self.STATUS_LED_COLOR_OFF,\ + 1: self.STATUS_LED_COLOR_AMBER,\ + 2: self.STATUS_LED_COLOR_GREEN\ + } + + if not self.is_psu_fan: + cmd = IPMI_GET_STATUS_LED.format(self._fan_led_offset) + status, output = self._api_helper.run_command(cmd) + if status: + color = int(output, 16) + status = color_dict.get(color, status) + + return status + + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + + if not self.name: + if not self.is_psu_fan: + psu_name = "" + fan_id = " {}".format(self.fan_tray_index + 1) + fan_type = " Front" if self.is_front else " Rear" + else: + psu_name = "PSU {} ".format(self.psu_index + 1) + fan_id = " {}".format(self.fan_tray_index + 1) + fan_type = "" + + self.name = FAN_NAME_TEMPLATE.format(psu_name, fan_id, fan_type) + + return self.name + + def get_presence(self): + """ + Retrieves the presence of the FAN + Returns: + bool: True if FAN is present, False if not + """ + + presence = False + + cmd = IPMI_GET_PRESENCE.format(self._fan_status_offset) + status, output = self._api_helper.run_command(cmd) + if status and output == "00": + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + model = NOT_AVAILABLE + + if not self.is_psu_fan: + cmd = IPMI_GET_MODEL.format(self._fan_fru_offset) + status, output = self._api_helper.run_command(cmd) + if status and output: + return output.split()[-1] + + return model + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + serial = NOT_AVAILABLE + + if not self.is_psu_fan: + cmd = IPMI_GET_SERIAL.format(self._fan_fru_offset) + status, output = self._api_helper.run_command(cmd) + if status and output: + return output.split()[-1] + + return serial + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and self.get_speed() > 0 + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + if not self.is_psu_fan: + return True + + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..aea952d5822a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan_drawer.py @@ -0,0 +1,91 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the fan status which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.fan_drawer_base import FanDrawerBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(FanDrawerBase): + + def __init__(self, index, fan_list): + FanDrawerBase.__init__(self) + + self._fan_list = fan_list + self._index = index + 1 + + def set_status_led(self, color): + """ + Sets the state of the fan drawer status LED + Args: + color: A string representing the color with which to set the + fan drawer status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + return self._fan_list[0].drawer_set_status_led(color) + + def get_status_led(self): + """ + Gets the state of the fan drawer LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + return self._fan_list[0].get_status_led() + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return 'Drawer {}'.format(self._index) + + def get_presence(self): + """ + Retrieves the presence of the FAN + Returns: + bool: True if FAN is present, False if not + """ + return self._fan_list[0].get_presence() + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + return self._fan_list[0].get_model() + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + return self._fan_list[0].get_serial() + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self._fan_list[0].get_status() + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True + diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/helper.py new file mode 100644 index 000000000000..7bcbd70a0a7c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/helper.py @@ -0,0 +1,191 @@ +#!/usr/bin/env python + +import os +import struct +import subprocess +from mmap import * +from sonic_py_common.device_info import get_platform_and_hwsku + +SCALE = 16 +BIN_BITS = 8 +EMPTY_STRING = "" +HOST_CHK_CMD = "docker > /dev/null 2>&1" + + +class APIHelper(): + + def __init__(self): + (self.platform, self.hwsku) = get_platform_and_hwsku() + + def get_register_value(self, getreg_path, register): + cmd = "echo {1} > {0}; cat {0}".format(getreg_path, register) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + return None + else: + return data + + def hex_to_bin(self, ini_string): + return bin(int(ini_string, SCALE)).zfill(BIN_BITS) + + def is_host(self): + rv, _ = subprocess.getstatusoutput(HOST_CHK_CMD) + return (rv == 0) + + def pci_get_value(self, resource, offset): + status = True + result = "" + try: + fd = os.open(resource, os.O_RDWR) + mm = mmap(fd, 0) + mm.seek(int(offset)) + read_data_stream = mm.read(4) + result = struct.unpack('I', read_data_stream) + except Exception: + status = False + return status, result + + def run_command(self, cmd): + status = True + result = "" + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + def read_one_line_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.readline() + return data.strip() + except IOError: + pass + return None + + def search_file_by_contain(self, directory, search_str, file_start): + for dirpath, dirnames, files in os.walk(directory): + for name in files: + file_path = os.path.join(dirpath, name) + if name.startswith(file_start) and search_str in self.read_txt_file(file_path): + return dirpath + return None + + def write_file(self, file_path, data): + try: + with open(file_path, 'w') as fd: + fd.write(str(data)) + return True + except Exception: + pass + return False + + def ipmi_raw(self, netfn, cmd): + status = True + result = "" + cmd = "ipmitool raw {} {}".format(str(netfn), str(cmd)) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def ipmi_fru_id(self, id, key=None): + status = True + result = "" + cmd = "ipmitool fru print {}".format(str( + id)) if not key else "ipmitool fru print {0} | grep '{1}' ".format(str(id), str(key)) + + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def ipmi_set_ss_thres(self, id, threshold_key, value): + status = True + result = "" + cmd = "ipmitool sensor thresh '{}' {} {}".format( + str(id), str(threshold_key), str(value)) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def fru_decode_product_serial(self, data): + + if data and data[4] != 00: + start_product_info = ord(data[4]) * 8 + start_format_version = start_product_info + start_product_info = start_format_version + 1 + start_product_Lang_code = start_product_info + 1 + start_product_Manu_name = start_product_Lang_code + 1 + start_product_Manu_name_length = ord(data[start_product_Manu_name]) & 0x0F + start_product_name = start_product_Manu_name + start_product_Manu_name_length + 1 + start_product_name_length = ord(data[start_product_name]) & 0x0F + start_product_module_number = start_product_name + start_product_name_length +1 + start_product_module_number_length = ord(data[start_product_module_number]) & 0x0F + start_product_version = start_product_module_number + start_product_module_number_length +1 + start_product_version_length = ord(data[start_product_version]) & 0x0F + start_product_serial_number = start_product_version + start_product_version_length +1 + start_product_serial_number_length = ord(data[start_product_serial_number]) & 0x1F + return data[start_product_serial_number+1:start_product_serial_number+start_product_serial_number_length+1] + return "N/A" + + def fru_decode_product_model(self, data): + if data and data[4] != 00: + start_product_info = ord(data[4]) * 8 + start_format_version = start_product_info + start_product_info = start_format_version + 1 + start_product_lang_code = start_product_info + 1 + start_product_manu_name = start_product_lang_code + 1 + start_product_manu_name_length = ord(data[start_product_manu_name]) & 0x1F + start_product_name = start_product_manu_name + start_product_manu_name_length + 1 + start_product_name_length = ord(data[start_product_name]) & 0x1F + start_product_module_number = start_product_name + start_product_name_length + 1 + start_product_module_number_length = ord(data[start_product_module_number]) & 0x1F + return data[start_product_module_number + 1: start_product_module_number +start_product_module_number_length + 1] + return "N/A" + + def fru_decode_product_name(self, data): + + if data and data[4] != 00: + start_product_info = ord(data[4]) * 8 + start_format_version = start_product_info + start_product_info = start_format_version + 1 + start_product_Lang_code = start_product_info + 1 + start_product_Manu_name = start_product_Lang_code + 1 + start_product_Manu_name_length = ord(data[start_product_Manu_name]) & 0x0F + start_product_name = start_product_Manu_name + start_product_Manu_name_length + 1 + start_product_name_length = ord(data[start_product_name]) & 0x0F + return data[start_product_name+1: start_product_name+start_product_name_length+1] + + return "N/A" + + def read_eeprom_sysfs(self,sys_path,sysfs_file): + sysfs_path = os.path.join(sys_path, sysfs_file) + try: + with open(sysfs_path, mode='rb', buffering=0) as fd: + data = fd.read(256) + return data + except Exception: + pass + return None diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/pcie.py new file mode 100644 index 000000000000..2f7931d42b01 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/pcie.py @@ -0,0 +1,15 @@ +# +# pcie_base.py +# +# Abstract base class for implementing platform-specific +# PCIE functionality for SONiC +# + +try: + from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil +except ImportError as e: + raise ImportError (str(e) + " - required module not found") + +class Pcie(PcieUtil): + def __init__(self, platform_path): + PcieUtil.__init__(self, platform_path) diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/platform.py new file mode 100644 index 000000000000..c9ba822ac0da --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/platform.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Platform(PlatformBase): + """Platform-specific Platform class""" + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() + diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/psu.py new file mode 100644 index 000000000000..362463883ad9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/psu.py @@ -0,0 +1,273 @@ +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.psu_base import PsuBase + from .helper import APIHelper + from sonic_platform.fan import Fan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +IPMI_SENSOR_NETFN = "0x04" +IPMI_SENSOR_READ_CMD = "0x2D {}" +IPMI_SENSOR_THRESH_CMD = "0x27 {}" +IPMI_FRU_MODEL_KEY = "Product Name" +IPMI_FRU_SERIAL_KEY = "Product Serial" + +MAX_PSU_POWER = 550 #Watts +psu_ipmi_id = {\ + 1: {\ + "TEMP": "0x0d",\ + "VOUT": "0x0f",\ + "COUT": "0x10",\ + "POUT": "0x11",\ + "STATUS": "0x72",\ + "FRU": 3,\ + }, + 2: {\ + "TEMP": "0x17",\ + "VOUT": "0x19",\ + "COUT": "0x1a",\ + "POUT": "0x1b",\ + "STATUS": "0x73",\ + "FRU": 4,\ + } +} + +ANALOG_READ_OFFSET = 0 +EVENT_0_7_OFFSET = 2 +EVENT_8_14_OFFSET = 3 + +FRU_SERIAL = 4 +FRU_MODEL = 1 + + +class Psu(PsuBase): + """Platform-specific Psu class""" + + def __init__(self, psu_index): + PsuBase.__init__(self) + self.index = psu_index+1 + # PSU has only one FAN + fan = Fan(0, 0, is_psu_fan=True, psu_index=psu_index) + self._fan_list.append(fan) + self._api_helper = APIHelper() + + def get_voltage(self): + """ + Retrieves current PSU voltage output + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + psu_voltage = 0.0 + psu_vout_key = psu_ipmi_id[self.index]['VOUT'] + status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\ + IPMI_SENSOR_READ_CMD.format(psu_vout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx10^-1 + psu_voltage = int(value, 16) / 10.0 + + return psu_voltage + + def get_voltage_high_threshold(self): + return 12.6 + + def get_voltage_low_threshold(self): + return 11.4 + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + Returns: + A float number, the electric current in amperes, e.g 15.4 + """ + psu_current = 0.0 + psu_cout_key = psu_ipmi_id[self.index]['COUT'] + status, output = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_cout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx3x10^-1 + psu_current = int(value, 16) * 3 / 10.0 + + return psu_current + + def get_power(self): + """ + Retrieves current energy supplied by PSU + Returns: + A float number, the power in watts, e.g. 302.6 + """ + psu_power = 0.0 + psu_pout_key = psu_ipmi_id[self.index]['POUT'] + status, output = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx5 + psu_power = int(value, 16) * 5 + return psu_power + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + Returns: + A boolean, True if PSU has stablized its output voltages and passed all + its internal self-tests, False if not. + """ + return self.get_status() + + def get_status_led(self): + """ + Gets the state of the PSU status LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if self.get_presence(): + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return "blinking green" + else: + return "N/A" + + def get_temperature(self): + """ + Retrieves current temperature reading from PSU + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + # PSU's ambient temperature sensor is considered as the PSU temperature + psu_temp = 0.0 + psu_temp_id = psu_ipmi_id[self.index]['TEMP'] + status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\ + IPMI_SENSOR_READ_CMD.format(psu_temp_id)) + if status: + value = output.split()[ANALOG_READ_OFFSET] + psu_temp = float(int(value, 16)) + + return psu_temp + + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + + return MAX_PSU_POWER + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return "PSU {}".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + psu_presence = False + psu_pstatus_key = psu_ipmi_id[self.index]['STATUS'] + status, raw_status_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key)) + status_byte = raw_status_read.split()[EVENT_0_7_OFFSET] + + if status: + psu_presence = True if int(status_byte, 16) & 0x01 == 0x01 else False + + return psu_presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + model = "Unknown" + if self.get_presence(): + ipmi_fru_idx = psu_ipmi_id[self.index]['FRU'] + status, raw_model = self._api_helper.ipmi_fru_id( + ipmi_fru_idx, IPMI_FRU_MODEL_KEY) + + fru_pn_list = raw_model.split(':')[-1] + model = fru_pn_list.strip() + else: + model = "N/A" + + return model + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + serial = "Unknown" + if self.get_presence(): + ipmi_fru_idx = psu_ipmi_id[self.index]['FRU'] + status, raw_serial = self._api_helper.ipmi_fru_id( + ipmi_fru_idx, IPMI_FRU_SERIAL_KEY) + + fru_sr_list = raw_serial.split(':')[-1] + serial = fru_sr_list.strip() + else: + model = "N/A" + + return serial + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + psu_status = False + psu_pstatus_key = psu_ipmi_id[self.index]['STATUS'] + status, raw_status_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key)) + status_byte = raw_status_read.split()[EVENT_0_7_OFFSET] + + if status: + psu_status = False if int(status_byte, 16) & 0x08 == 0x08 else True + + return psu_status + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return self.index + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True + + def get_direction(self): + """ + Return the airflow direction of PSU FAN + Returns: + string: 'intake' or 'exhaust' + """ + self diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/sfp.py new file mode 100644 index 000000000000..9de0aea6277f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/sfp.py @@ -0,0 +1,198 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Sfp contains an implementation of SONiC Platform Base API and +# provides the sfp device status which are available in the platform +# +############################################################################# +import time + +try: + from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +SFP_TYPE = "SFP" +QSFP_TYPE = "QSFP" + +QSFP_PORT_START = 1 +QSFP_PORT_END = 32 +SFP_PORT_START = 33 +SFP_PORT_END = 33 + +PORT_INFO_PATH = '/sys/class/seastone2_fpga' +SFP_I2C_START = 2 + + +class Sfp(SfpOptoeBase): + """Platform-specific Sfp class""" + + # Path to QSFP sysfs + PLATFORM_ROOT_PATH = "/usr/share/sonic/device" + PMON_HWSKU_PATH = "/usr/share/sonic/hwsku" + + def __init__(self, sfp_index): + SfpOptoeBase.__init__(self) + # Init index + self.index = sfp_index + 1 + self.sfp_type, self.port_name = self.__get_sfp_info() + self._api_helper = APIHelper() + self.platform = self._api_helper.platform + self.hwsku = self._api_helper.hwsku + + # Init eeprom path + self.eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(SFP_I2C_START+sfp_index) + + def __get_sfp_info(self): + port_name = "Unknown" + sfp_type = "Unknown" + + if self.index >= QSFP_PORT_START and self.index <= QSFP_PORT_END: + sfp_type = QSFP_TYPE + port_name = sfp_type + str(self.index) + elif self.index >= SFP_PORT_START and self.index <= SFP_PORT_END: + sfp_type = SFP_TYPE + port_name = sfp_type + str(self.index - SFP_PORT_START + 1) + + return sfp_type, port_name + + def __get_path_to_port_config_file(self): + platform_path = "/".join([self.PLATFORM_ROOT_PATH, self.platform]) + hwsku_path = "/".join([platform_path, self.hwsku] + ) if self._api_helper.is_host() else self.PMON_HWSKU_PATH + return "/".join([hwsku_path, "port_config.ini"]) + + def get_eeprom_path(self): + return self.eeprom_path + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + Returns: + A Boolean, True if reset enabled, False if disabled + """ + reg_status = self._api_helper.read_one_line_file( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"])) + + return (int(reg_status) == 0) + + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + Returns: + A boolean, True if successful, False if not + """ + if self.sfp_type != QSFP_TYPE: + return False + + try: + reg_file = open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]), "w") + except IOError as e: + #print("Error: unable to open file: %s" % str(e)) + return False + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(0)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]), "w") + except IOError as e: + #print("Error: unable to open file: %s" % str(e)) + return False + + reg_file.seek(0) + reg_file.write(hex(1)) + reg_file.close() + + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + + try: + reg_file = open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"]), "w") + except IOError as e: + return False + + if lpmode: + value=1 + else: + value=0 + reg_file.write(hex(value)) + reg_file.close() + + return True + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + + reg_status = self._api_helper.read_one_line_file( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"])) + + return (int(reg_status) == 1) + + def get_position_in_parent(self): + return self.index + + def is_replaceable(self): + return True + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + sfputil_helper = SfpUtilHelper() + sfputil_helper.read_porttab_mappings( + self.__get_path_to_port_config_file()) + name = sfputil_helper.physical_to_logical[self.index] or "Unknown" + return name + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + # Get path for access port presence status + sysfs_filename = "sfp_modabs" if self.sfp_type == SFP_TYPE else "qsfp_modprs" + reg_path = "/".join([PORT_INFO_PATH, self.port_name, sysfs_filename]) + + content = self._api_helper.read_one_line_file(reg_path) + reg_value = int(content) + + return (reg_value == 0) + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and not self.get_reset_status() diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/thermal.py new file mode 100644 index 000000000000..1db171329a02 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/thermal.py @@ -0,0 +1,204 @@ +############################################################################# +# Celestica +# +# Thermal contains an implementation of SONiC Platform Base API and +# provides the thermal device status which are available in the platform +# +############################################################################# + +import os +import re +import os.path + +try: + from sonic_platform_base.thermal_base import ThermalBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +IPMI_SENSOR_NETFN = "0x04" +IPMI_SS_READ_CMD = "0x2D {}" +IPMI_SS_THRESHOLD_CMD = "0x27 {}" +HIGH_TRESHOLD_SET_KEY = "unc" +DEFAULT_VAL = 'N/A' + +class Thermal(ThermalBase): + """Platform-specific Thermal class""" + + def __init__(self, thermal_index): + ThermalBase.__init__(self) + self._api_helper = APIHelper() + self.index = thermal_index + thermal_list = [\ + ('Base_Temp_U5', '0x01', 'Baseboard Right Temp'),\ + ('Base_Temp_U7', '0x02', 'Baseboard Left Temp'),\ + ('Switch_Temp_U1', '0x03', 'ASIC External Front Temp'),\ + ('Switch_Temp_U18', '0x04', 'ASIC External Rear Temp'),\ + ('Switch_Temp_U28', '0x05', 'Switchboard Right Temp'),\ + ('Switch_Temp_U29', '0x06', 'Switchboard Left Temp'),\ + ('CPU_Temp', '0x07', 'CPU Internal Temp'),\ + ('Switch_U33_Temp', '0x4C', 'IR3595 Chip Temp'),\ + ('Switch_U21_Temp', '0x56', 'IR3584 Chip Temp'),\ + ('PSUL_Temp1', '0x0D', 'PSU 1 Ambient Temp'),\ + ('PSUL_Temp2', '0x0E', 'PSU 1 Hotspot Temp'),\ + ('PSUR_Temp1', '0x17', 'PSU 2 Ambient Temp'),\ + ('PSUR_Temp2', '0x18', 'PSU 2 Hotspot Temp'),\ + ] + self.sensor_id = thermal_list[self.index][0] + self.sensor_reading_addr = thermal_list[self.index][1] + self.sensor_name = thermal_list[self.index][2] + + temp = self.get_temperature(True) + self.minimum_thermal = temp + self.maximum_thermal = temp + + def get_temperature(self, skip_record=False): + """ + Retrieves current temperature reading from thermal + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + temperature = 0.0 + status, raw_ss_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(self.sensor_reading_addr)) + if status and len(raw_ss_read.split()) > 0: + ss_read = raw_ss_read.split()[0] + temperature = float(int(ss_read, 16)) + + if temperature != 0.0: + if not skip_record: + # Record maximum + if temperature > self.maximum_thermal: + self.maximum_thermal = temperature + + # Record minimum + if temperature < self.minimum_thermal: + self.minimum_thermal = temperature + + return temperature + else: + return DEFAULT_VAL + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + Returns: + A float number, the high threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + high_threshold = 0.0 + status, raw_up_thres_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr)) + if status and len(raw_up_thres_read.split()) > 6: + ss_read = raw_up_thres_read.split()[4] + high_threshold = float(int(ss_read, 16)) + if high_threshold != 0.0: + return high_threshold + else: + return DEFAULT_VAL + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal + Returns: + A float number, the low threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + return DEFAULT_VAL + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if not + """ + status, ret_txt = self._api_helper.ipmi_set_ss_thres( + self.sensor_id, HIGH_TRESHOLD_SET_KEY, temperature) + return status + + def set_low_threshold(self, temperature): + """ + Sets the low threshold temperature of thermal + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if not + """ + return False + + def get_high_critical_threshold(self): + """ + Retrieves the high critical threshold temperature of thermal + Returns: + A float number, the high critical threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + high_critical_threshold = 0.0 + status, raw_up_thres_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr)) + if status and len(raw_up_thres_read.split()) > 6: + ss_read = raw_up_thres_read.split()[5] + high_critical_threshold = float(int(ss_read, 16)) + if high_critical_threshold != 0.0: + return high_critical_threshold + else: + return DEFAULT_VAL + + def get_minimum_recorded(self): + """ + Retrieves the minimum recorded temperature of thermal + Returns: + A float number, the minimum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + return self.minimum_thermal + + def get_maximum_recorded(self): + """ + Retrieves the maximum recorded temperature of thermal + Returns: + A float number, the maximum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + return self.maximum_thermal + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the thermal device + Returns: + string: The name of the thermal device + """ + return self.sensor_name + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + return True if self.get_temperature() > 0 else False + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() + + def is_replaceable(self): + """ + Retrieves whether thermal module is replaceable + Returns: + A boolean value, True if replaceable, False if not + """ + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/watchdog.py new file mode 100644 index 000000000000..2290119674cb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/watchdog.py @@ -0,0 +1,274 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica Seastone2 +# +# Watchdog contains an implementation of SONiC Platform Base API +# +############################################################################# +import subprocess +import syslog +import fcntl + +try: + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +PLATFORM_CPLD_PATH = '/sys/devices/platform/baseboard/{}' +I2C_WDT_ARM_REG='0xA181' +I2C_WDT_SET_TIMER_L_REG='0xA182' +I2C_WDT_SET_TIMER_M_REG='0xA183' +I2C_WDT_SET_TIMER_H_REG='0xA184' +I2C_WDT_KEEPALIVE_REG='0xA185' +I2C_WDT_TIMER_L_REG='0xA186' +I2C_WDT_TIMER_M_REG='0xA187' +I2C_WDT_TIMER_H_REG='0xA188' + +WDT_ENABLE=0x1 +WDT_DISABLE=0x0 +WDT_KEEPALIVE=0x1 +WDT_COMMON_ERROR=-1 +DEFAULT_TIMEOUT=180 + +class Watchdog(WatchdogBase): + + def __init__(self): + # Set default value + self.armed = True if self._is_active() else False + self.timeout = self._gettimeout() + #self._disable() + + def _get_lpc_reg(self, reg): + file_path = PLATFORM_CPLD_PATH.format('getreg') + value = None + status = False + + try: + fd = open(file_path, "w+") + # Acquire an exclusive lock on the file + fcntl.flock(fd, fcntl.LOCK_EX) + fd.write(reg) + fd.flush() + fd.seek(0) + value = fd.readline().rstrip() + status = True + except (IOError, PermissionError, FileNotFoundError): + syslog.syslog(syslog.LOG_ERR, "Baseboard LPC getreg failed with {}",format(e)) + value = None + status = False + finally: + fcntl.flock(fd, fcntl.LOCK_UN) + fd.close() + + return status, value + + def _set_lpc_reg(self, reg, val): + status = False + file_path = PLATFORM_CPLD_PATH.format('setreg') + value = '{} {}'.format(reg, hex(val)) + + try: + fd = open(file_path, 'w') + fcntl.flock(fd, fcntl.LOCK_EX) + fd.write(value) + status = True + except (IOError, PermissionError, FileNotFoundError): + syslog.syslog(syslog.LOG_ERR, "Baseboard LPC setreg failed with {}",format(e)) + value = None + status = False + finally: + fcntl.flock(fd, fcntl.LOCK_UN) + fd.close() + + return status + + def _is_active(self): + """ + WDT is active or not + """ + status, data = self._get_lpc_reg(I2C_WDT_ARM_REG) + if status and data == "0x01": + return True + + return False + + def _enable(self): + """ + Turn on the watchdog timer + """ + self._settimeleft(0) + return self._set_lpc_reg(I2C_WDT_ARM_REG, WDT_ENABLE) + + def _disable(self): + """ + Turn off the watchdog timer + """ + return self._set_lpc_reg(I2C_WDT_ARM_REG, WDT_DISABLE) + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + self._settimeleft(0) + return self._set_lpc_reg(I2C_WDT_KEEPALIVE_REG, WDT_KEEPALIVE) + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + ms = seconds * 1000 + ms_low_byte = ms & 0xff + ms_media_byte = (ms >> 8) & 0xff + ms_high_byte = (ms >> 16) & 0xff + self._set_lpc_reg(I2C_WDT_SET_TIMER_L_REG, ms_low_byte) + self._set_lpc_reg(I2C_WDT_SET_TIMER_M_REG, ms_media_byte) + self._set_lpc_reg(I2C_WDT_SET_TIMER_H_REG, ms_high_byte) + + return self._gettimeout() + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + data = [0, 0, 0] + status, data[0] = self._get_lpc_reg(I2C_WDT_SET_TIMER_L_REG) + if not status: + return 0 + status, data[1] = self._get_lpc_reg(I2C_WDT_SET_TIMER_M_REG) + if not status: + return 0 + status, data[2] = self._get_lpc_reg(I2C_WDT_SET_TIMER_H_REG) + if not status: + return 0 + seconds = int((int(data[2], 16) << 16 + | int(data[1], 16) << 8 + | int(data[0], 16)) / 1000) + + return seconds + + def _settimeleft(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + ms = seconds * 1000 + ms_low_byte = ms & 0xff + ms_media_byte = (ms >> 8) & 0xff + ms_high_byte = (ms >> 16) & 0xff + self._set_lpc_reg(I2C_WDT_TIMER_L_REG, ms_low_byte) + self._set_lpc_reg(I2C_WDT_TIMER_M_REG, ms_media_byte) + self._set_lpc_reg(I2C_WDT_TIMER_H_REG, ms_high_byte) + + return True + + def _gettimeleft(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + data = [0, 0, 0] + status, data[0] = self._get_lpc_reg(I2C_WDT_TIMER_L_REG) + if not status: + return 0 + status, data[1] = self._get_lpc_reg(I2C_WDT_TIMER_M_REG) + if not status: + return 0 + status, data[2] = self._get_lpc_reg(I2C_WDT_TIMER_H_REG) + if not status: + return 0 + seconds = int((int(data[2], 16) << 16 + | int(data[1], 16) << 8 + | int(data[0], 16)) / 1000) + + return (self.timeout - seconds) if (self.timeout > seconds) else 0 + + ################################################################# + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + + ret = WDT_COMMON_ERROR + if seconds < 0: + return ret + + try: + if self.timeout != seconds: + self.timeout = self._settimeout(seconds) + if self.armed: + self._keepalive() + else: + status = self._enable() + if not status: + syslog.syslog(syslog.LOG_ERR, "Enable watchdog failed") + return ret + + self.armed = True + + ret = self.timeout + except IOError: + pass + + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + status = self._disable() + if status: + self.armed = False + disarmed = True + else: + syslog.syslog(syslog.LOG_ERR, "Disable watchdog failed") + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + + return self.armed + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Returns: + An integer specifying the number of seconds remaining on thei + watchdog timer. If the watchdog is not armed, returns -1. + """ + + timeleft = WDT_COMMON_ERROR + + if self.armed: + try: + timeleft = self._gettimeleft() + except IOError: + pass + + return timeleft diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/Makefile new file mode 100644 index 000000000000..641690d4871e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/Makefile @@ -0,0 +1,11 @@ +TARGET:= pddf_custom_fan_driver_module +$(TARGET)-objs := ./fan_driver/pddf_custom_fan_api.o ./fan_driver/pddf_custom_fan_driver.o + +TARGET1:= pddf_custom_led_module +$(TARGET1)-objs := ./led_driver/pddf_custom_led_module.o + +TARGET2:= pddf_custom_psu_driver_module +$(TARGET2)-objs := ./psu_driver/pddf_psu_api.o ./psu_driver/pddf_psu_driver.o + +obj-m := $(TARGET).o $(TARGET1).o $(TARGET2).o +obj-m += pddf_custom_fpga_algo.o pddf_custom_fpga_extend.o tps536c7.o pddf_custom_wdt.o pddf_custom_lpc_basecpld.o diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_api.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_api.c new file mode 100644 index 000000000000..6777690361b1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_api.c @@ -0,0 +1,656 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description of various APIs related to FAN component + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pddf_custom_fan_defs.h" +#include "pddf_custom_fan_driver.h" + +/*#define FAN_DEBUG*/ +#ifdef FAN_DEBUG +#define fan_dbg(...) printk(__VA_ARGS__) +#else +#define fan_dbg(...) +#endif + +extern void *get_device_table(char *name); + +void get_fan_duplicate_sysfs(int idx, char *str) +{ + switch (idx) + { + default: + break; + } + + return; +} + + +int fan_update_hw(struct device *dev, struct fan_attr_info *info, FAN_DATA_ATTR *udata) +{ + int status = 0; + struct i2c_client *client = to_i2c_client(dev); + FAN_SYSFS_ATTR_DATA *sysfs_attr_data = NULL; + + + mutex_lock(&info->update_lock); + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_set != NULL) + { + status = (sysfs_attr_data->pre_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: pre_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + if (sysfs_attr_data->do_set != NULL) + { + status = (sysfs_attr_data->do_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: do_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + + } + if (sysfs_attr_data->post_set != NULL) + { + status = (sysfs_attr_data->post_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: post_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + + mutex_unlock(&info->update_lock); + + return 0; +} + +int fan_update_attr(struct device *dev, struct fan_attr_info *info, FAN_DATA_ATTR *udata) +{ + int status = 0; + struct i2c_client *client = to_i2c_client(dev); + FAN_SYSFS_ATTR_DATA *sysfs_attr_data = NULL; + + + mutex_lock(&info->update_lock); + + if (time_after(jiffies, info->last_updated + HZ + HZ / 2) || !info->valid) + { + dev_dbg(&client->dev, "Starting pddf_fan update\n"); + info->valid = 0; + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_get != NULL) + { + status = (sysfs_attr_data->pre_get)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: pre_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + if (sysfs_attr_data->do_get != NULL) + { + status = (sysfs_attr_data->do_get)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: do_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + + } + if (sysfs_attr_data->post_get != NULL) + { + status = (sysfs_attr_data->post_get)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: post_get function fails for %s attribute.ret %d\n", __FUNCTION__, udata->aname, status); + } + + + info->last_updated = jiffies; + info->valid = 1; + } + + mutex_unlock(&info->update_lock); + + return 0; +} + +ssize_t fan_show_default(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct fan_data *data = i2c_get_clientdata(client); + FAN_PDATA *pdata = (FAN_PDATA *)(client->dev.platform_data); + FAN_DATA_ATTR *usr_data = NULL; + struct fan_attr_info *attr_info = NULL; + int i, status=0; + char new_str[ATTR_NAME_LEN] = ""; + FAN_SYSFS_ATTR_DATA *ptr = NULL; + + for (i=0;inum_attr;i++) + { + ptr = (FAN_SYSFS_ATTR_DATA *)pdata->fan_attrs[i].access_data; + get_fan_duplicate_sysfs(ptr->index , new_str); + if (strcmp(attr->dev_attr.attr.name, pdata->fan_attrs[i].aname) == 0 || strcmp(attr->dev_attr.attr.name, new_str) == 0) + { + attr_info = &data->attr_info[i]; + usr_data = &pdata->fan_attrs[i]; + strscpy(new_str, "", ATTR_NAME_LEN); + } + } + + if (attr_info==NULL || usr_data==NULL) + { + printk(KERN_ERR "%s is not supported attribute for this client\n", usr_data->aname); + goto exit; + } + + fan_update_attr(dev, attr_info, usr_data); + + /*Decide the o/p based on attribute type */ + switch(attr->index) + { + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + case FAN5_PRESENT: + case FAN6_PRESENT: + case FAN7_PRESENT: + case FAN8_PRESENT: + case FAN9_PRESENT: + case FAN10_PRESENT: + case FAN11_PRESENT: + case FAN12_PRESENT: + case FAN13_PRESENT: + case FAN14_PRESENT: + case FAN1_DIRECTION: + case FAN2_DIRECTION: + case FAN3_DIRECTION: + case FAN4_DIRECTION: + case FAN5_DIRECTION: + case FAN6_DIRECTION: + case FAN7_DIRECTION: + case FAN8_DIRECTION: + case FAN9_DIRECTION: + case FAN10_DIRECTION: + case FAN11_DIRECTION: + case FAN12_DIRECTION: + case FAN13_DIRECTION: + case FAN14_DIRECTION: + case FAN1_INPUT: + case FAN2_INPUT: + case FAN3_INPUT: + case FAN4_INPUT: + case FAN5_INPUT: + case FAN6_INPUT: + case FAN7_INPUT: + case FAN8_INPUT: + case FAN9_INPUT: + case FAN10_INPUT: + case FAN11_INPUT: + case FAN12_INPUT: + case FAN13_INPUT: + case FAN14_INPUT: + case FAN1_PWM: + case FAN2_PWM: + case FAN3_PWM: + case FAN4_PWM: + case FAN5_PWM: + case FAN6_PWM: + case FAN7_PWM: + case FAN8_PWM: + case FAN9_PWM: + case FAN10_PWM: + case FAN11_PWM: + case FAN12_PWM: + case FAN13_PWM: + case FAN14_PWM: + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + case FAN5_FAULT: + case FAN6_FAULT: + case FAN7_FAULT: + case FAN8_FAULT: + case FAN9_FAULT: + case FAN10_FAULT: + case FAN11_FAULT: + case FAN12_FAULT: + case FAN13_FAULT: + case FAN14_FAULT: + status = attr_info->val.intval; + break; + default: + fan_dbg(KERN_ERR "%s: Unable to find the attribute index for %s\n", __FUNCTION__, usr_data->aname); + status = 0; + } + +exit: + return sprintf(buf, "%d\n", status); +} + + +ssize_t fan_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct fan_data *data = i2c_get_clientdata(client); + FAN_PDATA *pdata = (FAN_PDATA *)(client->dev.platform_data); + FAN_DATA_ATTR *usr_data = NULL; + struct fan_attr_info *attr_info = NULL; + int i, ret ; + uint32_t val; + + for (i=0;inum_attr;i++) + { + if (strcmp(data->attr_info[i].name, attr->dev_attr.attr.name) == 0 && strcmp(pdata->fan_attrs[i].aname, attr->dev_attr.attr.name) == 0) + { + attr_info = &data->attr_info[i]; + usr_data = &pdata->fan_attrs[i]; + } + } + + if (attr_info==NULL || usr_data==NULL) { + printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name); + goto exit; + } + + switch(attr->index) + { + case FAN1_PWM: + case FAN2_PWM: + case FAN3_PWM: + case FAN4_PWM: + case FAN5_PWM: + case FAN6_PWM: + case FAN7_PWM: + case FAN8_PWM: + case FAN9_PWM: + case FAN10_PWM: + case FAN11_PWM: + case FAN12_PWM: + case FAN13_PWM: + case FAN14_PWM: + ret = kstrtoint(buf, 10, &val); + if (ret) + { + printk(KERN_ERR "%s: Unable to convert string into value for %s\n", __FUNCTION__, usr_data->aname); + return ret; + } + /*Update the value of attr_info here, and use it to update the HW values*/ + attr_info->val.intval = val; + break; + default: + printk(KERN_ERR "%s: Unable to find the attr index for %s\n", __FUNCTION__, usr_data->aname); + goto exit; + } + + fan_dbg(KERN_ERR "%s: pwm to be set is %d\n", __FUNCTION__, val); + fan_update_hw(dev, attr_info, usr_data); + +exit: + return count; +} + +int fan_cpld_client_read(FAN_DATA_ATTR *udata) +{ + int status = -1; + + if (udata!=NULL) + { + if (udata->len==1) + { + status = board_i2c_cpld_read(udata->devaddr , udata->offset); + } + else + { + /* Get the I2C client for the CPLD */ + struct i2c_client *client_ptr=NULL; + client_ptr = (struct i2c_client *)get_device_table(udata->devname); + if (client_ptr) + { + if (udata->len==2) + { + status = i2c_smbus_read_word_swapped(client_ptr, udata->offset); + } + else + printk(KERN_ERR "PDDF_FAN: Doesn't support block CPLD read yet"); + } + else + printk(KERN_ERR "Unable to get the client handle for %s\n", udata->devname); + } + + } + + return status; +} + +int fan_cpld_client_write(FAN_DATA_ATTR *udata, uint32_t val) +{ + int status = 0; + + if (udata->len==1) + { + status = board_i2c_cpld_write(udata->devaddr, udata->offset, val); + } + else + { + /* Get the I2C client for the CPLD */ + struct i2c_client *client_ptr=NULL; + client_ptr = (struct i2c_client *)get_device_table(udata->devname); + if (client_ptr) + { + if (udata->len==2) + { + uint8_t val_lsb = val & 0xFF; + uint8_t val_hsb = (val >> 8) & 0xFF; + /* TODO: Check this logic for LE and BE */ + status = i2c_smbus_write_byte_data(client_ptr, udata->offset, val_lsb); + if (status==0) status = i2c_smbus_write_byte_data(client_ptr, udata->offset+1, val_hsb); + } + else + printk(KERN_ERR "PDDF_FAN: Doesn't support block CPLD write yet"); + } + else + printk(KERN_ERR "Unable to get the client handle for %s\n", udata->devname); + } + + return status; +} + +int fan_fpgai2c_client_read(FAN_DATA_ATTR *udata) +{ + int status = -1; + + if (udata!=NULL) + { + if (udata->len==1) + { + status = board_i2c_fpga_read(udata->devaddr , udata->offset); + /*printk(KERN_ERR "### Reading offset 0x%x from 0x%x device ... val 0x%x\n", udata->offset, udata->devaddr, status);*/ + } + else + { + /* Get the I2C client for the FPGAI2C */ + struct i2c_client *client_ptr=NULL; + client_ptr = (struct i2c_client *)get_device_table(udata->devname); + if (client_ptr) + { + if (udata->len==2) + { + status = i2c_smbus_read_word_swapped(client_ptr, udata->offset); + } + else + printk(KERN_ERR "PDDF_FAN: Doesn't support block FPGAI2C read yet"); + } + else + printk(KERN_ERR "Unable to get the client handle for %s\n", udata->devname); + } + + } + + return status; +} + +int fan_fpgai2c_client_write(FAN_DATA_ATTR *udata, uint32_t val) +{ + int status = 0; + + if (udata->len==1) + { + status = board_i2c_fpga_write(udata->devaddr, udata->offset, val); + } + else + { + /* Get the I2C client for the FPGAI2C */ + struct i2c_client *client_ptr=NULL; + client_ptr = (struct i2c_client *)get_device_table(udata->devname); + if (client_ptr) + { + if (udata->len==2) + { + uint8_t val_lsb = val & 0xFF; + uint8_t val_hsb = (val >> 8) & 0xFF; + /* TODO: Check this logic for LE and BE */ + status = i2c_smbus_write_byte_data(client_ptr, udata->offset, val_lsb); + if (status==0) status = i2c_smbus_write_byte_data(client_ptr, udata->offset+1, val_hsb); + } + else + printk(KERN_ERR "PDDF_FAN: Doesn't support block FPGAI2C write yet"); + } + else + printk(KERN_ERR "Unable to get the client handle for %s\n", udata->devname); + } + + return status; +} + + +int sonic_i2c_get_fan_present_default(void *client, FAN_DATA_ATTR *udata, void *info) +{ + int status = 0; + int val = 0; + struct fan_attr_info *painfo = (struct fan_attr_info *)info; + + if (strcmp(udata->devtype, "cpld") == 0) + { + val = fan_cpld_client_read(udata); + } + else if (strcmp(udata->devtype, "fpgai2c") == 0) + { + val = fan_fpgai2c_client_read(udata); + } + else + { + val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset); + } + + if (val < 0) + status = val; + else + painfo->val.intval = ((val & udata->mask) == udata->cmpval); + + + return status; +} + +int sonic_i2c_get_fan_rpm_default(void *client, FAN_DATA_ATTR *udata, void *info) +{ + int status = 0; + int val = 0; + struct fan_attr_info *painfo = (struct fan_attr_info *)info; + + if (strcmp(udata->devtype, "cpld") == 0) + { + val = fan_cpld_client_read(udata); + } + else if (strcmp(udata->devtype, "fpgai2c") == 0) + { + val = fan_fpgai2c_client_read(udata); + } + else + { + if (udata->len == 1) + { + val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset); + } + else if (udata->len ==2) + { + val = i2c_smbus_read_word_swapped((struct i2c_client *)client, udata->offset); + + } + } + + if (val < 0) + status = val; + else + { + if (udata->is_divisor) + painfo->val.intval = udata->mult / (val >> 3); + else + painfo->val.intval = udata->mult * val; + } + + return status; +} + + +int sonic_i2c_get_fan_direction_default(void *client, FAN_DATA_ATTR *udata, void *info) +{ + int status = 0; + int val = 0; + struct fan_attr_info *painfo = (struct fan_attr_info *)info; + + if (strcmp(udata->devtype, "cpld") == 0) + { + val = fan_cpld_client_read(udata); + } + else if (strcmp(udata->devtype, "fpgai2c") == 0) + { + val = fan_fpgai2c_client_read(udata); + } + else + { + val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset); + } + + if (val < 0) + status = val; + else + painfo->val.intval = ((val & udata->mask) == udata->cmpval); + + return status; +} + + +int sonic_i2c_set_fan_pwm_default(struct i2c_client *client, FAN_DATA_ATTR *udata, void *info) +{ + int status = 0; + int val = 0; + struct fan_attr_info *painfo = (struct fan_attr_info *)info; + + val = painfo->val.intval & udata->mask; + + if (val > 255) + { + return -EINVAL; + } + + if (strcmp(udata->devtype, "cpld") == 0) + { + status = fan_cpld_client_write(udata, val); + } + else if (strcmp(udata->devtype, "fpgai2c") == 0) + { + status = fan_fpgai2c_client_write(udata, val); + } + else + { + if (udata->len == 1) + status = i2c_smbus_write_byte_data(client, udata->offset, val); + else if (udata->len == 2) + { + uint8_t val_lsb = val & 0xFF; + uint8_t val_hsb = (val >> 8) & 0xFF; + /* TODO: Check this logic for LE and BE */ + status = i2c_smbus_write_byte_data(client, udata->offset, val_lsb); + if (status == 0) status = i2c_smbus_write_byte_data(client, udata->offset+1, val_hsb); + } + else + { + printk(KERN_DEBUG "%s: pwm should be of len 1/2 bytes. Not setting the pwm as the length is %d\n", __FUNCTION__, udata->len); + } + } + + return status; +} + + +int sonic_i2c_get_fan_pwm_default(void *client, FAN_DATA_ATTR *udata, void *info) +{ + int status = 0; + int val = 0; + struct fan_attr_info *painfo = (struct fan_attr_info *)info; + + if (strcmp(udata->devtype, "cpld") == 0) + { + val = fan_cpld_client_read(udata); + } + else if (strcmp(udata->devtype, "fpgai2c") == 0) + { + val = fan_fpgai2c_client_read(udata); + } + else + { + if (udata->len == 1) + { + val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset); + } + else if (udata->len ==2) + { + val = i2c_smbus_read_word_swapped((struct i2c_client *)client, udata->offset); + + } + } + + if (val < 0) + status = val; + else + { + val = val & udata->mask; + painfo->val.intval = val; + } + return status; +} + +int sonic_i2c_get_fan_fault_default(void *client, FAN_DATA_ATTR *udata, void *info) +{ + int status = 0; + int val = 0; + struct fan_attr_info *painfo = (struct fan_attr_info *)info; + + /*Assuming fan fault to be denoted by 1 byte only*/ + if (strcmp(udata->devtype, "cpld") == 0) + { + val = fan_cpld_client_read(udata); + } + else if (strcmp(udata->devtype, "fpgai2c") == 0) + { + val = fan_fpgai2c_client_read(udata); + } + else + { + val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset); + } + + if (val < 0) + status = val; + else + painfo->val.intval = ((val & udata->mask) == udata->cmpval); + return status; +} + + +int pddf_fan_post_probe_default(struct i2c_client *client, const struct i2c_device_id *dev_id) +{ + + /*Dummy func for now - check the respective platform modules*/ + return 0; +} \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_defs.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_defs.h new file mode 100644 index 000000000000..24a91a291e8c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_defs.h @@ -0,0 +1,93 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description: + * Platform FAN defines/structures header file + */ + +#ifndef __PDDF_FAN_DEFS_H__ +#define __PDDF_FAN_DEFS_H__ + + +#define MAX_NUM_FAN 7 +#define MAX_FAN_ATTRS 128 +#define ATTR_NAME_LEN 32 +#define STR_ATTR_SIZE 32 +#define DEV_TYPE_LEN 32 + +/* Each client has this additional data + */ + +typedef struct FAN_DATA_ATTR +{ + char aname[ATTR_NAME_LEN]; // attr name, taken from enum fan_sysfs_attributes + char devtype[DEV_TYPE_LEN]; // Type of FAN controller, i.e EMC2305, EMC2302, or FAN-CPLD etc + char devname[DEV_TYPE_LEN]; // Name of the device from where this informatin is to be read + uint32_t devaddr; + uint32_t offset; + uint32_t mask; + uint32_t cmpval; + uint32_t len; + int mult; // Multiplication factor to get the actual data + uint8_t is_divisor; // Check if the value is a divisor and mult is dividend + void *access_data; + +}FAN_DATA_ATTR; + + +typedef struct FAN_SYSFS_ATTR_DATA +{ + int index; + unsigned short mode; + ssize_t (*show)(struct device *dev, struct device_attribute *da, char *buf); + int (*pre_get)(void *client, FAN_DATA_ATTR *adata, void *data); + int (*do_get)(void *client, FAN_DATA_ATTR *adata, void *data); + int (*post_get)(void *client, FAN_DATA_ATTR *adata, void *data); + ssize_t (*store)(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + int (*pre_set)(void *client, FAN_DATA_ATTR *adata, void *data); + int (*do_set)(void *client, FAN_DATA_ATTR *adata, void *data); + int (*post_set)(void *client, FAN_DATA_ATTR *adata, void *data); + void *data; +} FAN_SYSFS_ATTR_DATA; + +typedef struct FAN_SYSFS_ATTR_DATA_ENTRY +{ + char name[ATTR_NAME_LEN]; + FAN_SYSFS_ATTR_DATA *a_ptr; +} FAN_SYSFS_ATTR_DATA_ENTRY; + + +/* FAN CLIENT DATA - PLATFORM DATA FOR FAN CLIENT */ +typedef struct FAN_DATA +{ + int num_fantrays; // num of fans controlled by this fan client + FAN_DATA_ATTR fan_attr; + int len; // no of valid attributes for this fan client + FAN_DATA_ATTR fan_attrs[MAX_FAN_ATTRS]; +}FAN_DATA; + +typedef struct FAN_PDATA +{ + int num_fantrays; // num of fans controlled by this fan client + int len; // no of valid attributes for this fan client + FAN_DATA_ATTR *fan_attrs; +}FAN_PDATA; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern int board_i2c_fpga_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_fpga_write(unsigned short cpld_addr, u8 reg, u8 value); +#endif \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.c new file mode 100644 index 000000000000..1db3573c1c20 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.c @@ -0,0 +1,523 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel driver module for a FAN controller + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "pddf_custom_fan_defs.h" +#include "pddf_custom_fan_driver.h" +#include "../../../../../pddf/i2c/modules/include/pddf_fan_api.h" + +#define DRVNAME "pddf_costom_fan" + +struct pddf_ops_t pddf_fan_ops = { + .pre_init = NULL, + .post_init = NULL, + + .pre_probe = NULL, + .post_probe = pddf_fan_post_probe_default, + + .pre_remove = NULL, + .post_remove = NULL, + + .pre_exit = NULL, + .post_exit = NULL, +}; +EXPORT_SYMBOL(pddf_fan_ops); + + + +FAN_SYSFS_ATTR_DATA data_fan1_present = {FAN1_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan1_present); +FAN_SYSFS_ATTR_DATA data_fan2_present = {FAN2_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan2_present); +FAN_SYSFS_ATTR_DATA data_fan3_present = {FAN3_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan3_present); +FAN_SYSFS_ATTR_DATA data_fan4_present = {FAN4_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan4_present); +FAN_SYSFS_ATTR_DATA data_fan5_present = {FAN5_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan5_present); +FAN_SYSFS_ATTR_DATA data_fan6_present = {FAN6_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan6_present); +FAN_SYSFS_ATTR_DATA data_fan7_present = {FAN7_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan7_present); +FAN_SYSFS_ATTR_DATA data_fan8_present = {FAN8_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan8_present); +FAN_SYSFS_ATTR_DATA data_fan9_present = {FAN9_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan9_present); +FAN_SYSFS_ATTR_DATA data_fan10_present = {FAN10_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan10_present); +FAN_SYSFS_ATTR_DATA data_fan11_present = {FAN11_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan11_present); +FAN_SYSFS_ATTR_DATA data_fan12_present = {FAN12_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan12_present); +FAN_SYSFS_ATTR_DATA data_fan13_present = {FAN13_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan13_present); +FAN_SYSFS_ATTR_DATA data_fan14_present = {FAN14_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan14_present); + + +FAN_SYSFS_ATTR_DATA data_fan1_direction = {FAN1_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan1_direction); +FAN_SYSFS_ATTR_DATA data_fan2_direction = {FAN2_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan2_direction); +FAN_SYSFS_ATTR_DATA data_fan3_direction = {FAN3_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan3_direction); +FAN_SYSFS_ATTR_DATA data_fan4_direction = {FAN4_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan4_direction); +FAN_SYSFS_ATTR_DATA data_fan5_direction = {FAN5_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan5_direction); +FAN_SYSFS_ATTR_DATA data_fan6_direction = {FAN6_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan6_direction); +FAN_SYSFS_ATTR_DATA data_fan7_direction = {FAN7_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan7_direction); +FAN_SYSFS_ATTR_DATA data_fan8_direction = {FAN8_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan8_direction); +FAN_SYSFS_ATTR_DATA data_fan9_direction = {FAN9_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan9_direction); +FAN_SYSFS_ATTR_DATA data_fan10_direction = {FAN10_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan10_direction); +FAN_SYSFS_ATTR_DATA data_fan11_direction = {FAN11_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan11_direction); +FAN_SYSFS_ATTR_DATA data_fan12_direction = {FAN12_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan12_direction); +FAN_SYSFS_ATTR_DATA data_fan13_direction = {FAN13_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan13_direction); +FAN_SYSFS_ATTR_DATA data_fan14_direction = {FAN14_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan14_direction); + + +FAN_SYSFS_ATTR_DATA data_fan1_input = {FAN1_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan1_input); +FAN_SYSFS_ATTR_DATA data_fan2_input = {FAN2_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan2_input); +FAN_SYSFS_ATTR_DATA data_fan3_input = {FAN3_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan3_input); +FAN_SYSFS_ATTR_DATA data_fan4_input = {FAN4_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan4_input); +FAN_SYSFS_ATTR_DATA data_fan5_input = {FAN5_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan5_input); +FAN_SYSFS_ATTR_DATA data_fan6_input = {FAN6_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan6_input); +FAN_SYSFS_ATTR_DATA data_fan7_input = {FAN7_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan7_input); +FAN_SYSFS_ATTR_DATA data_fan8_input = {FAN8_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan8_input); +FAN_SYSFS_ATTR_DATA data_fan9_input = {FAN9_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan9_input); +FAN_SYSFS_ATTR_DATA data_fan10_input = {FAN10_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan10_input); +FAN_SYSFS_ATTR_DATA data_fan11_input = {FAN11_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan11_input); +FAN_SYSFS_ATTR_DATA data_fan12_input = {FAN12_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan12_input); +FAN_SYSFS_ATTR_DATA data_fan13_input = {FAN13_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan13_input); +FAN_SYSFS_ATTR_DATA data_fan14_input = {FAN14_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan14_input); + +FAN_SYSFS_ATTR_DATA data_fan1_pwm = {FAN1_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan1_pwm); +FAN_SYSFS_ATTR_DATA data_fan2_pwm = {FAN2_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan2_pwm); +FAN_SYSFS_ATTR_DATA data_fan3_pwm = {FAN3_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan3_pwm); +FAN_SYSFS_ATTR_DATA data_fan4_pwm = {FAN4_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan4_pwm); +FAN_SYSFS_ATTR_DATA data_fan5_pwm = {FAN5_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan5_pwm); +FAN_SYSFS_ATTR_DATA data_fan6_pwm = {FAN6_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan6_pwm); +FAN_SYSFS_ATTR_DATA data_fan7_pwm = {FAN7_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan7_pwm); +FAN_SYSFS_ATTR_DATA data_fan8_pwm = {FAN8_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan8_pwm); +FAN_SYSFS_ATTR_DATA data_fan9_pwm = {FAN9_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan9_pwm); +FAN_SYSFS_ATTR_DATA data_fan10_pwm = {FAN10_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan10_pwm); +FAN_SYSFS_ATTR_DATA data_fan11_pwm = {FAN11_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan11_pwm); +FAN_SYSFS_ATTR_DATA data_fan12_pwm = {FAN12_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan12_pwm); +FAN_SYSFS_ATTR_DATA data_fan13_pwm = {FAN13_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan13_pwm); +FAN_SYSFS_ATTR_DATA data_fan14_pwm = {FAN14_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan14_pwm); + + +FAN_SYSFS_ATTR_DATA data_fan1_fault = {FAN1_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan1_fault); +FAN_SYSFS_ATTR_DATA data_fan2_fault = {FAN2_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan2_fault); +FAN_SYSFS_ATTR_DATA data_fan3_fault = {FAN3_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan3_fault); +FAN_SYSFS_ATTR_DATA data_fan4_fault = {FAN4_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan4_fault); +FAN_SYSFS_ATTR_DATA data_fan5_fault = {FAN5_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan5_fault); +FAN_SYSFS_ATTR_DATA data_fan6_fault = {FAN6_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan6_fault); +FAN_SYSFS_ATTR_DATA data_fan7_fault = {FAN7_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan7_fault); +FAN_SYSFS_ATTR_DATA data_fan8_fault = {FAN8_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan8_fault); +FAN_SYSFS_ATTR_DATA data_fan9_fault = {FAN9_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan9_fault); +FAN_SYSFS_ATTR_DATA data_fan10_fault = {FAN10_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan10_fault); +FAN_SYSFS_ATTR_DATA data_fan11_fault = {FAN11_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan11_fault); +FAN_SYSFS_ATTR_DATA data_fan12_fault = {FAN12_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan12_fault); +FAN_SYSFS_ATTR_DATA data_fan13_fault = {FAN13_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan13_fault); +FAN_SYSFS_ATTR_DATA data_fan14_fault = {FAN14_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan14_fault); + + +FAN_SYSFS_ATTR_DATA_ENTRY fan_sysfs_attr_data_tbl[]= +{ + { "fan1_present", &data_fan1_present}, + { "fan2_present", &data_fan2_present}, + { "fan3_present", &data_fan3_present}, + { "fan4_present", &data_fan4_present}, + { "fan5_present", &data_fan5_present}, + { "fan6_present", &data_fan6_present}, + { "fan7_present", &data_fan7_present}, + { "fan8_present", &data_fan8_present}, + { "fan9_present", &data_fan9_present}, + { "fan10_present", &data_fan10_present}, + { "fan11_present", &data_fan11_present}, + { "fan12_present", &data_fan12_present}, + { "fan13_present", &data_fan13_present}, + { "fan14_present", &data_fan14_present}, + { "fan1_direction", &data_fan1_direction}, + { "fan2_direction", &data_fan2_direction}, + { "fan3_direction", &data_fan3_direction}, + { "fan4_direction", &data_fan4_direction}, + { "fan5_direction", &data_fan5_direction}, + { "fan6_direction", &data_fan6_direction}, + { "fan7_direction", &data_fan7_direction}, + { "fan8_direction", &data_fan8_direction}, + { "fan9_direction", &data_fan9_direction}, + { "fan10_direction", &data_fan10_direction}, + { "fan11_direction", &data_fan11_direction}, + { "fan12_direction", &data_fan12_direction}, + { "fan13_direction", &data_fan13_direction}, + { "fan14_direction", &data_fan14_direction}, + { "fan1_input", &data_fan1_input}, + { "fan2_input", &data_fan2_input}, + { "fan3_input", &data_fan3_input}, + { "fan4_input", &data_fan4_input}, + { "fan5_input", &data_fan5_input}, + { "fan6_input", &data_fan6_input}, + { "fan7_input", &data_fan7_input}, + { "fan8_input", &data_fan8_input}, + { "fan9_input", &data_fan9_input}, + { "fan10_input", &data_fan10_input}, + { "fan11_input", &data_fan11_input}, + { "fan12_input", &data_fan12_input}, + { "fan13_input", &data_fan13_input}, + { "fan14_input", &data_fan14_input}, + { "fan1_pwm", &data_fan1_pwm}, + { "fan2_pwm", &data_fan2_pwm}, + { "fan3_pwm", &data_fan3_pwm}, + { "fan4_pwm", &data_fan4_pwm}, + { "fan5_pwm", &data_fan5_pwm}, + { "fan6_pwm", &data_fan6_pwm}, + { "fan7_pwm", &data_fan7_pwm}, + { "fan8_pwm", &data_fan8_pwm}, + { "fan9_pwm", &data_fan9_pwm}, + { "fan10_pwm", &data_fan10_pwm}, + { "fan11_pwm", &data_fan11_pwm}, + { "fan12_pwm", &data_fan12_pwm}, + { "fan13_pwm", &data_fan13_pwm}, + { "fan14_pwm", &data_fan14_pwm}, + { "fan1_fault", &data_fan1_fault}, + { "fan2_fault", &data_fan2_fault}, + { "fan3_fault", &data_fan3_fault}, + { "fan4_fault", &data_fan4_fault}, + { "fan5_fault", &data_fan5_fault}, + { "fan6_fault", &data_fan6_fault}, + { "fan7_fault", &data_fan7_fault}, + { "fan8_fault", &data_fan8_fault}, + { "fan9_fault", &data_fan9_fault}, + { "fan10_fault", &data_fan10_fault}, + { "fan11_fault", &data_fan11_fault}, + { "fan12_fault", &data_fan12_fault}, + { "fan13_fault", &data_fan13_fault}, + { "fan14_fault", &data_fan14_fault}, +}; + +void *get_fan_access_data(char *name) +{ + int i=0; + for(i=0; i<(sizeof(fan_sysfs_attr_data_tbl)/sizeof(fan_sysfs_attr_data_tbl[0])); i++) + { + if(strcmp(name, fan_sysfs_attr_data_tbl[i].name) ==0) + { + return &fan_sysfs_attr_data_tbl[i]; + } + } + return NULL; +} +EXPORT_SYMBOL(get_fan_access_data); + + + +static int pddf_fan_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct fan_data *data; + int status=0,i,num, j=0; + FAN_PDATA *fan_platform_data; + FAN_DATA_ATTR *data_attr; + FAN_SYSFS_ATTR_DATA_ENTRY *sysfs_data_entry; + char new_str[ATTR_NAME_LEN] = ""; + + if (client == NULL) { + printk("NULL Client.. \n"); + goto exit; + } + + if (pddf_fan_ops.pre_probe) + { + status = (pddf_fan_ops.pre_probe)(client, dev_id); + if (status != 0) + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + status = -EIO; + goto exit; + } + + /* Add support for a pre probe function */ + data = kzalloc(sizeof(struct fan_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + dev_info(&client->dev, "chip found\n"); + + + /*Take control of the platform data*/ + fan_platform_data = (FAN_PDATA *)(client->dev.platform_data); + num = fan_platform_data->len; + data->num_attr = num; + + for (i=0;ifan_attrs + i; + sysfs_data_entry = get_fan_access_data(data_attr->aname); + if (sysfs_data_entry == NULL) + { + printk(KERN_ERR "%s: Wrong attribute name provided by user '%s'\n", __FUNCTION__, data_attr->aname); + continue; + } + + dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL); + dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1]; + strscpy((char *)dy_ptr->dev_attr.attr.name, data_attr->aname, ATTR_NAME_LEN); + dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode; + dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show; + dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store; + dy_ptr->index = sysfs_data_entry->a_ptr->index; + + data->fan_attribute_list[i] = &dy_ptr->dev_attr.attr; + strscpy(data->attr_info[i].name, data_attr->aname, ATTR_NAME_LEN); + data->attr_info[i].valid = 0; + mutex_init(&data->attr_info[i].update_lock); + + /*Create a duplicate entry*/ + get_fan_duplicate_sysfs(dy_ptr->index, new_str); + if (strcmp(new_str,"")) + { + dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL); + dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1]; + strscpy((char *)dy_ptr->dev_attr.attr.name, new_str, ATTR_NAME_LEN); + dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode; + dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show; + dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store; + dy_ptr->index = sysfs_data_entry->a_ptr->index; + + data->fan_attribute_list[num+j] = &dy_ptr->dev_attr.attr; + j++; + strscpy(new_str, "", ATTR_NAME_LEN); + } + } + data->fan_attribute_list[i+j] = NULL; + data->fan_attribute_group.attrs = data->fan_attribute_list; + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &data->fan_attribute_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register_with_info(&client->dev, client->name, NULL, NULL, NULL); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: fan '%s'\n", + dev_name(data->hwmon_dev), client->name); + + /* Add a support for post probe function */ + if (pddf_fan_ops.post_probe) + { + status = (pddf_fan_ops.post_probe)(client, dev_id); + if (status != 0) + goto exit_remove; + } + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &data->fan_attribute_group); +exit_free: + /* Free all the allocated attributes */ + for (i=0; data->fan_attribute_list[i]!=NULL; i++) + { + struct sensor_device_attribute *ptr = (struct sensor_device_attribute *)data->fan_attribute_list[i]; + kfree(ptr); + } + pddf_dbg(FAN, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__); + kfree(data); +exit: + return status; +} + +static void pddf_fan_remove(struct i2c_client *client) +{ + int i = 0, ret = 0; + struct sensor_device_attribute *ptr = NULL; + struct fan_data *data = i2c_get_clientdata(client); + FAN_PDATA *platdata = (FAN_PDATA *)client->dev.platform_data; + FAN_DATA_ATTR *platdata_sub = platdata->fan_attrs; + + if (pddf_fan_ops.pre_remove) + { + ret = (pddf_fan_ops.pre_remove)(client); + if (ret!=0) + printk(KERN_ERR "FAN pre_remove function failed\n"); + } + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->fan_attribute_group); + for (i=0; data->fan_attribute_list[i]!=NULL; i++) + { + ptr = (struct sensor_device_attribute *)data->fan_attribute_list[i]; + kfree(ptr); + } + pddf_dbg(FAN, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__); + kfree(data); + + if (platdata_sub) { + printk(KERN_DEBUG "%s: Freeing platform subdata\n", __FUNCTION__); + kfree(platdata_sub); + } + if (platdata) { + printk(KERN_DEBUG "%s: Freeing platform data\n", __FUNCTION__); + kfree(platdata); + } + + if (pddf_fan_ops.post_remove) + { + ret = (pddf_fan_ops.post_remove)(client); + if (ret!=0) + printk(KERN_ERR "FAN post_remove function failed\n"); + } +} + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +static const struct i2c_device_id pddf_fan_id[] = { + { "fan_ctrl", 0 }, + { "fan_cpld", 1 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, pddf_fan_id); + +static struct i2c_driver pddf_fan_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRVNAME, + }, + .probe = pddf_fan_probe, + .remove = pddf_fan_remove, + .id_table = pddf_fan_id, + .address_list = normal_i2c, +}; + +static int __init pddf_fan_init(void) +{ + int status = 0; + + if (pddf_fan_ops.pre_init) + { + status = (pddf_fan_ops.pre_init)(); + if (status!=0) + return status; + } + + status = i2c_add_driver(&pddf_fan_driver); + if (status!=0) + return status; + + if (pddf_fan_ops.post_init) + { + status = (pddf_fan_ops.post_init)(); + if (status!=0) + return status; + } + return status; + +} + +static void __exit pddf_fan_exit(void) +{ + if (pddf_fan_ops.pre_exit) (pddf_fan_ops.pre_exit)(); + i2c_del_driver(&pddf_fan_driver); + if (pddf_fan_ops.post_exit) (pddf_fan_ops.post_exit)(); +} + +module_init(pddf_fan_init); +module_exit(pddf_fan_exit); + +MODULE_AUTHOR("Broadcom, yajiang@celestica.com"); +MODULE_DESCRIPTION("pddf_fan driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.h new file mode 100644 index 000000000000..7dc1a2931c3a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.h @@ -0,0 +1,117 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * FAN driver related data structures + */ +#ifndef __PDDF_FAN_DRIVER_H__ +#define __PDDF_FAN_DRIVER_H__ + +enum fan_sysfs_attributes { + FAN1_PRESENT, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + FAN5_PRESENT, + FAN6_PRESENT, + FAN7_PRESENT, + FAN8_PRESENT, + FAN9_PRESENT, + FAN10_PRESENT, + FAN11_PRESENT, + FAN12_PRESENT, + FAN13_PRESENT, + FAN14_PRESENT, + FAN1_DIRECTION, + FAN2_DIRECTION, + FAN3_DIRECTION, + FAN4_DIRECTION, + FAN5_DIRECTION, + FAN6_DIRECTION, + FAN7_DIRECTION, + FAN8_DIRECTION, + FAN9_DIRECTION, + FAN10_DIRECTION, + FAN11_DIRECTION, + FAN12_DIRECTION, + FAN13_DIRECTION, + FAN14_DIRECTION, + FAN1_INPUT, + FAN2_INPUT, + FAN3_INPUT, + FAN4_INPUT, + FAN5_INPUT, + FAN6_INPUT, + FAN7_INPUT, + FAN8_INPUT, + FAN9_INPUT, + FAN10_INPUT, + FAN11_INPUT, + FAN12_INPUT, + FAN13_INPUT, + FAN14_INPUT, + FAN1_PWM, + FAN2_PWM, + FAN3_PWM, + FAN4_PWM, + FAN5_PWM, + FAN6_PWM, + FAN7_PWM, + FAN8_PWM, + FAN9_PWM, + FAN10_PWM, + FAN11_PWM, + FAN12_PWM, + FAN13_PWM, + FAN14_PWM, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT, + FAN5_FAULT, + FAN6_FAULT, + FAN7_FAULT, + FAN8_FAULT, + FAN9_FAULT, + FAN10_FAULT, + FAN11_FAULT, + FAN12_FAULT, + FAN13_FAULT, + FAN14_FAULT, + FAN_MAX_ATTR +}; +/* Each client has this additional data */ +struct fan_attr_info { + char name[ATTR_NAME_LEN]; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + union { + char strval[STR_ATTR_SIZE]; + int intval; + u16 shortval; + u8 charval; + }val; +}; + +struct fan_data { + struct device *hwmon_dev; + int num_attr; + struct attribute *fan_attribute_list[MAX_FAN_ATTRS]; + struct attribute_group fan_attribute_group; + struct fan_attr_info attr_info[MAX_FAN_ATTRS]; +}; + +#endif \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/readme.txt b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/readme.txt new file mode 100644 index 000000000000..923733e858c0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/readme.txt @@ -0,0 +1,4 @@ +5/23/2023: Added information about the seventh fan drawers + pddf_custom_fan_driver_module:Using + pddf_fan_driver_module:Abandoned + -yajiang@celestica.com diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_defs.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_defs.h new file mode 100644 index 000000000000..e786e567d433 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_defs.h @@ -0,0 +1,149 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * Platform LED related defines and structures + */ + + +/***************************************** + * kobj list + *****************************************/ + +struct kobject *platform_kobj=NULL; +struct kobject *led_kobj=NULL; + +struct kobject *state_attr_kobj=NULL; +struct kobject *cur_state_kobj=NULL; + +/***************************************** + * Static Data provided from user + * space JSON data file + *****************************************/ +#define NAME_SIZE 32 +#define VALUE_SIZE 5 +typedef enum { + STATUS_LED_COLOR_OFF=0, + STATUS_LED_COLOR_GREEN=1, + STATUS_LED_COLOR_YELLOW=2, + STATUS_LED_COLOR_RED=3, + STATUS_LED_COLOR_BLUE=4, + STATUS_LED_COLOR_GREEN_BLINK=5, + STATUS_LED_COLOR_YELLOW_BLINK=6, + STATUS_LED_COLOR_RED_BLINK=7, + STATUS_LED_COLOR_BLUE_BLINK=8, + STATUS_LED_COLOR_AMBER, + STATUS_LED_COLOR_AMBER_BLINK, + MAX_LED_STATUS +}LED_STATUS; + +char* LED_STATUS_STR[] = { + "off", + "green", + "yellow", + "red", + "blue", + "green_blink", + "yellow_blink", + "red_blink", + "blue_blink", + "amber", + "amber_blink" +}; + + +typedef struct +{ + char bits[NAME_SIZE]; + int pos; + int mask_bits; +}MASK_BITS; + +typedef struct +{ + int swpld_addr; + int swpld_addr_offset; + MASK_BITS bits; + u8 reg_values[VALUE_SIZE]; + char value[NAME_SIZE]; + char attr_devtype[NAME_SIZE]; + char attr_devname[NAME_SIZE]; +} LED_DATA; + +typedef struct +{ + int state; + char color[NAME_SIZE]; +/* S3IP System LED RW sysfs */ + int sys_led; + int bmc_led; + int fan_led; + int psu_led; + int loc_led; +/* S3IP Power LED RO sysfs */ + int psu1_led; + int psu2_led; +/* S3IP Fantray LED RO sysfs */ + int fantray1_led; + int fantray2_led; + int fantray3_led; + int fantray4_led; + int fantray5_led; + int fantray6_led; + int fantray7_led; +} CUR_STATE_DATA; + +typedef struct +{ + CUR_STATE_DATA cur_state; + char device_name[NAME_SIZE]; + int index; + LED_DATA data[MAX_LED_STATUS]; + int swpld_addr; + int swpld_addr_offset; + char attr_devtype[NAME_SIZE]; + char attr_devname[NAME_SIZE]; +} LED_OPS_DATA; + +typedef enum{ + LED_SYS, + LED_PSU, + LED_FAN, + LED_FANTRAY, + LED_DIAG, + LED_LOC, + LED_BMC, + LED_TYPE_MAX +} LED_TYPE; +char* LED_TYPE_STR[LED_TYPE_MAX] = +{ + "LED_SYS", + "LED_PSU", + "LED_FAN", + "LED_FANTRAY", + "LED_DIAG", + "LED_LOC", + "LED_BMC" +}; + +/***************************************** + * Data exported from kernel for + * user space plugin to get/set + *****************************************/ +#define PDDF_LED_DATA_ATTR( _prefix, _name, _mode, _show, _store, _type, _len, _addr) \ + struct pddf_data_attribute pddf_dev_##_prefix##_attr_##_name = { .dev_attr = __ATTR(_name, _mode, _show, _store), \ + .type = _type , \ + .len = _len , \ + .addr = _addr } diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_module.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_module.c new file mode 100644 index 000000000000..8f0da48b4d98 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_module.c @@ -0,0 +1,873 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module to manage various LEDs of a switch + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include "pddf_custom_led_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include +#include +#include + +#define DEBUG 0 +#define MAX_PSU_NUM 2 +#define MAX_FANTRAY_NUM 7 +LED_OPS_DATA sys_led_ops_data[1]={0}; +LED_OPS_DATA psu_led_ops_data[MAX_PSU_NUM]={0}; +LED_OPS_DATA diag_led_ops_data[1]= {0}; +LED_OPS_DATA fan_led_ops_data[1]= {0}; +LED_OPS_DATA loc_led_ops_data[1]= {0}; +LED_OPS_DATA bmc_led_ops_data[1]= {0}; +LED_OPS_DATA fantray_led_ops_data[MAX_FANTRAY_NUM]={0}; +LED_OPS_DATA temp_data={0}; +LED_OPS_DATA* dev_list[LED_TYPE_MAX] = { + sys_led_ops_data, + psu_led_ops_data, + fan_led_ops_data, + fantray_led_ops_data, + diag_led_ops_data, + loc_led_ops_data, + bmc_led_ops_data, + NULL +}; +int num_psus = 0; +int num_fantrays = 0; + +extern int board_i2c_cpld_read_new(unsigned short cpld_addr, char *name, u8 reg); +extern int board_i2c_cpld_write_new(unsigned short cpld_addr, char *name, u8 reg, u8 value); +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); +extern int board_i2c_fpga_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_fpga_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern ssize_t show_pddf_data(struct device *dev, struct device_attribute *da, char *buf); +extern ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +extern ssize_t show_pddf_s3ip_data(struct device *dev, struct device_attribute *da, char *buf); +extern ssize_t store_pddf_s3ip_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + +static LED_STATUS find_state_index(const char* state_str) { + int index; + char *ptr = (char *)state_str; + while (*ptr && *ptr!= '\n' && *ptr !='\0') ptr++; + *ptr='\0'; + for ( index = 0; index < MAX_LED_STATUS; index++) { + if (strcmp(state_str, LED_STATUS_STR[index]) == 0 ) { + return index; + } + } + return MAX_LED_STATUS; +} + +static LED_TYPE get_dev_type(char* name) +{ + LED_TYPE ret = LED_TYPE_MAX; + if(strcasecmp(name, "SYS_LED") == 0) { + ret = LED_SYS; + } else if(strcasecmp(name, "FAN_LED") == 0) { + ret = LED_FAN; + } else if(strstr(name, "PSU_LED")) { + ret = LED_PSU; + } else if(strcasecmp(name, "DIAG_LED") == 0) { + ret = LED_DIAG; + } else if(strcasecmp(name, "LOC_LED") == 0) { + ret = LED_LOC; + } else if(strstr(name, "FANTRAY_LED")) { + ret = LED_FANTRAY; + } +#if DEBUG > 1 + pddf_dbg(LED, KERN_INFO "LED get_dev_type: %s; %d\n", name, ret); +#endif + return (ret); +} +static int dev_index_check(LED_TYPE type, int index) +{ +#if DEBUG + pddf_dbg(LED, "dev_index_check: type:%s[%d] index:%d num_psus:%d num_fantrays:%d\n", + LED_TYPE_STR[type], type, index, num_psus, num_fantrays); +#endif + switch(type) + { + case LED_PSU: + if(index >= MAX_PSU_NUM) return (-1); + break; + case LED_FANTRAY: + if(index >= MAX_FANTRAY_NUM) return (-1); + break; + default: + if(index >= 1) return (-1); + break; + } + return (0); +} + +static LED_OPS_DATA* find_led_ops_data(struct device_attribute *da) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr = (LED_OPS_DATA*)_ptr->addr; + LED_TYPE led_type; + if(!ptr || strlen(ptr->device_name) == 0 ) return (NULL); + + if((led_type=get_dev_type(ptr->device_name)) == LED_TYPE_MAX) { + printk(KERN_ERR "PDDF_LED ERROR *%s Unsupported Led Type\n", __func__); + return (NULL); + } + if(dev_index_check(led_type, ptr->index) == -1) { + printk(KERN_ERR "PDDF_LED ERROR %s invalid index: %d for type:%s;%d\n", __func__, ptr->index, ptr->device_name, led_type); + return (NULL); + } +#if DEBUG > 1 + pddf_dbg(LED, "find_led_ops_data: name:%s; index=%d tempAddr:%p actualAddr:%p\n", + ptr->device_name, ptr->index, ptr, dev_list[led_type]+ptr->index); +#endif + return (dev_list[led_type]+ptr->index); +} + +static void print_led_data(LED_OPS_DATA *ptr, LED_STATUS state) +{ + int i = 0; + if(!ptr) return ; + pddf_dbg(LED, KERN_INFO "Print %s index:%d num_psus:%d num_fantrays:%d ADDR=%p\n", + ptr->device_name, ptr->index, num_psus, num_fantrays, ptr); + pddf_dbg(LED, KERN_INFO "\tindex: %d\n", ptr->index); + pddf_dbg(LED, KERN_INFO "\tdevtype/devname: %s:%s\n", ptr->attr_devtype, ptr->attr_devname); + pddf_dbg(LED, KERN_INFO "\tcur_state: %d; %s \n", ptr->cur_state.state, ptr->cur_state.color); + for (i = 0; i< MAX_LED_STATUS; i++) { + if(ptr->data[i].swpld_addr && (i == state || state == -1)) { + pddf_dbg(LED, KERN_INFO "\t\t[%s]: addr/offset:0x%x;0x%x color:%s; value:[%s][0x%x][0x%x] mask_bits: 0x%x;" + "pos:%d attr_devtype:%s attr_devname:%s\n",LED_STATUS_STR[i], ptr->data[i].swpld_addr, + ptr->data[i].swpld_addr_offset, LED_STATUS_STR[i], ptr->data[i].value, + ptr->data[i].reg_values[0], ptr->data[i].reg_values[1], ptr->data[i].bits.mask_bits, + ptr->data[i].bits.pos, ptr->data[i].attr_devtype, ptr->data[i].attr_devname); + } + } +} + +ssize_t get_status_led(struct device_attribute *da) +{ + int ret=0; + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* temp_data_ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + uint32_t color_val=0, sys_val=0; + int state=0; + int cpld_type=0; + int j; + + if (!ops_ptr) { + pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot find LED Ptr", __func__); + return (-1); + } + + if (ops_ptr->swpld_addr == 0x0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: device: %s %d not configured\n", __func__, + temp_data_ptr->device_name, temp_data_ptr->index); + return (-1); + } + + if (strcmp(ops_ptr->attr_devtype, "cpld") == 0) { + cpld_type = 1; + sys_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset); + } else if (strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) { + sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return (-1); + } + + if (sys_val < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x read failed\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return sys_val; + } + + strscpy(temp_data.cur_state.color, "None", NAME_SIZE); + for (state=0; statedata[state].bits.mask_bits); + for (j = 0; j < VALUE_SIZE && ops_ptr->data[state].reg_values[j] != 0xff; j++) { + if ((color_val ^ (ops_ptr->data[state].reg_values[j] << ops_ptr->data[state].bits.pos)) == 0) { + strscpy(temp_data.cur_state.color, LED_STATUS_STR[state], NAME_SIZE); + break; + } + } + } +#if DEBUG + pddf_dbg(LED, KERN_ERR "Get : %s:%d addr/offset:0x%x; 0x%x devtype:%s;%s value=0x%x [%s]\n", + ops_ptr->device_name, ops_ptr->index, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, + ops_ptr->attr_devtype, cpld_type? "cpld": "fpgai2c", sys_val, temp_data.cur_state.color); +#endif + return(ret); +} + +ssize_t set_status_led(struct device_attribute *da) +{ + int ret=0; + uint32_t sys_val=0, new_val=0, read_val=0; + LED_STATUS cur_state = MAX_LED_STATUS; + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* temp_data_ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + char* _buf=temp_data_ptr->cur_state.color; + int cpld_type = 0; + + if (!ops_ptr) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: Cannot find LED Ptr", __func__); + return (-1); + } + + if (ops_ptr->swpld_addr == 0x0) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: device: %s %d not configured\n", + __func__, ops_ptr->device_name, ops_ptr->index); + return (-1); + } + + pddf_dbg(LED, KERN_ERR "%s: Set [%s;%d] color[%s]\n", __func__, + temp_data_ptr->device_name, temp_data_ptr->index, + temp_data_ptr->cur_state.color); + cur_state = find_state_index(_buf); + + if (cur_state == MAX_LED_STATUS) { + pddf_dbg(LED, KERN_ERR "ERROR %s: not supported: %s\n", _buf, __func__); + return (-1); + } + + if (ops_ptr->data[cur_state].swpld_addr != 0x0) { + if (strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) { + cpld_type = 1; + sys_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset); + } else if (strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) { + sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype); + return (-1); + } + + if (sys_val < 0){ + return sys_val; + } + + + new_val = (sys_val & ops_ptr->data[cur_state].bits.mask_bits) | + (ops_ptr->data[cur_state].reg_values[0] << ops_ptr->data[cur_state].bits.pos); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s state %d; %s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, cur_state, _buf); + return (-1); + } + + if (strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) { + ret = board_i2c_cpld_write_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset, new_val); + read_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset); + } else if (strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) { + ret = board_i2c_fpga_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, (uint8_t)new_val); + read_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype); + return (-1); + } + +#if DEBUG + pddf_dbg(LED, KERN_ERR "Set color:%s; 0x%x:0x%x sys_val:0x%x new_val:0x%x devtype:%s w_ret:0x%x read:0x%x devtype:%s\n", + LED_STATUS_STR[cur_state], ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, sys_val, new_val, + cpld_type? "cpld":"fpgai2c", ret, read_val, ops_ptr->data[cur_state].attr_devtype); +#endif + + return(ret); +} + + +ssize_t show_pddf_data(struct device *dev, struct device_attribute *da, + char *buf) +{ + int ret = 0; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + switch (ptr->type) + { + case PDDF_CHAR: + ret = sprintf(buf, "%s\n", ptr->addr); + break; + case PDDF_INT_DEC: + ret = sprintf(buf, "%d\n", *(int*)(ptr->addr)); + break; + case PDDF_INT_HEX: + ret = sprintf(buf, "0x%x\n", *(int*)(ptr->addr)); + break; + case PDDF_USHORT: + ret = sprintf(buf, "0x%x\n", *(unsigned short *)(ptr->addr)); + break; + case PDDF_UINT32: + ret = sprintf(buf, "0x%x\n", *(uint32_t *)(ptr->addr)); + break; + default: + break; + } +#if DEBUG > 1 + pddf_dbg(LED, "[ READ ] DATA ATTR PTR [%s] TYPE:%d, Value:[%s]\n", + ptr->dev_attr.attr.name, ptr->type, buf); +#endif + return ret; +} + +ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int ret = 0, num = 0; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + switch (ptr->type) + { + case PDDF_CHAR: + memcpy(ptr->addr, buf, strlen(buf)-1); // to discard newline char form buf + ptr->addr[strlen(buf)-1] = '\0'; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_CHAR VALUE:%s\n", + ptr->dev_attr.attr.name, ptr->addr); +#endif + break; + case PDDF_INT_DEC: + ret = kstrtoint(buf,10,&num); + if (ret==0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_DEC VALUE:%d\n", + ptr->dev_attr.attr.name, *(int *)(ptr->addr)); +#endif + break; + case PDDF_INT_HEX: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_HEX VALUE:0x%x\n", + ptr->dev_attr.attr.name, *(int *)(ptr->addr)); +#endif + break; + case PDDF_USHORT: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(unsigned short *)(ptr->addr) = (unsigned short)num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_USHORT VALUE:%x\n", + ptr->dev_attr.attr.name, *(unsigned short *)(ptr->addr)); +#endif + break; + case PDDF_UINT32: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(uint32_t *)(ptr->addr) = (uint32_t)num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_UINT32 VALUE:%d\n", + ptr->dev_attr.attr.name, *(uint32_t *)(ptr->addr)); +#endif + break; + default: + break; + } + return count; +} + +ssize_t show_pddf_s3ip_data(struct device *dev, struct device_attribute *da, + char *buf) +{ + int ret = 0; + pddf_dbg(LED, KERN_ERR " %s", __FUNCTION__); + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + if (_ptr == NULL) { + pddf_dbg(LED, KERN_ERR "%s return", __FUNCTION__); + return -1; + } + LED_OPS_DATA* ops_ptr=(LED_OPS_DATA*)_ptr->addr; + uint32_t color_val=0, sys_val=0; + int state=0, j; + int cpld_type=0; + if (!ops_ptr) { + pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot find LED Ptr", __func__); + return (-1); + } + if (ops_ptr->swpld_addr == 0x0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: device: %s %d not configured\n", __func__, + ops_ptr->device_name, ops_ptr->index); + return (-1); + } + if ( strcmp(ops_ptr->attr_devtype, "cpld") == 0) { + cpld_type=1; + sys_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else if ( strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) { + sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return (-1); + } + + if (sys_val < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x read failed\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return sys_val; + } + for (state=0; statedata[state].bits.mask_bits); + for (j = 0; j < VALUE_SIZE && ops_ptr->data[state].reg_values[j] != 0xff; j++) { + if ((color_val ^ (ops_ptr->data[state].reg_values[j] << ops_ptr->data[state].bits.pos))==0) { + ret = sprintf(buf, "%d\n", state); + break; + } + } + } +#if DEBUG + pddf_dbg(LED, KERN_ERR "Get : %s:%d addr/offset:0x%x; 0x%x devtype:%s;%s value=0x%x [%d]\n", + ops_ptr->device_name, ops_ptr->index, ops_ptr->swpld_addr, + ops_ptr->swpld_addr_offset, ops_ptr->attr_devtype, cpld_type? "cpld": "fpgai2c", sys_val, state); +#endif + return ret; +} + +ssize_t store_pddf_s3ip_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int ret = 0; + int cur_state = 0; + uint32_t sys_val=0, new_val=0, read_val=0; + int cpld_type=0; + + pddf_dbg(LED, KERN_ERR "%s: %s;%d", __FUNCTION__, buf, cur_state); + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + ret = kstrtoint(buf,10,&cur_state); + if (_ptr == NULL || cur_state >= MAX_LED_STATUS || ret !=0) { + pddf_dbg(LED, KERN_ERR "%s return", __FUNCTION__); + return -1; + } + LED_OPS_DATA* ops_ptr=(LED_OPS_DATA*)_ptr->addr; + + if ( strcmp(ops_ptr->attr_devtype, "cpld") == 0) { + cpld_type=1; + sys_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else if ( strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) { + sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return (-1); + } + + new_val = (sys_val & ops_ptr->data[cur_state].bits.mask_bits) | + (ops_ptr->data[cur_state].reg_values[0] << ops_ptr->data[cur_state].bits.pos); + + if ( strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) { + ret = board_i2c_cpld_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, new_val); + read_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else if ( strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) { + ret = board_i2c_fpga_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, (uint8_t)new_val); + read_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype); + return (-1); + } + +#if DEBUG + pddf_dbg(LED, KERN_INFO "Set color:%s; 0x%x:0x%x sys_val:0x%x new_val:0x%x devtype:%s w_ret:0x%x read:0x%x devtype:%s\n", + LED_STATUS_STR[cur_state], ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, + sys_val, new_val, cpld_type? "cpld":"fpgai2c", ret, read_val, ops_ptr->data[cur_state].attr_devtype); +#endif + return count; +} + + +static int load_led_ops_data(struct device_attribute *da, LED_STATUS state) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr = (LED_OPS_DATA*)_ptr->addr; + LED_TYPE led_type; + LED_OPS_DATA* ops_ptr = NULL; + int i = 0; + char *token = NULL, *value_ptr = NULL; + + if(!ptr || strlen(ptr->device_name)==0 ) { + pddf_dbg(LED, KERN_INFO "SYSTEM_LED: load_led_ops_data return -1 device_name:%s\n", ptr? ptr->device_name:"NULL"); + return(-1); + } + + if(ptr->device_name) + { + pddf_dbg(LED, KERN_INFO "[%s]: load_led_ops_data: index=%d addr=0x%x;0x%x devtype:%s devname=%s valu=%s\n", + ptr->device_name, ptr->index, ptr->swpld_addr, ptr->swpld_addr_offset, ptr->attr_devtype, ptr->attr_devname, ptr->data[0].value); + } + if((led_type=get_dev_type(ptr->device_name))==LED_TYPE_MAX) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR *%s Unsupported Led Type\n", __func__); + return(-1); + } + if(dev_index_check(led_type, ptr->index)==-1) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s invalid index: %d for type:%d\n", __func__, ptr->index, led_type); + return(-1); + } + ops_ptr = dev_list[led_type]+ptr->index; + + memcpy(ops_ptr->device_name, ptr->device_name, sizeof(ops_ptr->device_name)); + ops_ptr->index = ptr->index; + memcpy(&ops_ptr->data[state], &ptr->data[0], sizeof(LED_DATA)); + ops_ptr->data[state].swpld_addr = ptr->swpld_addr; + ops_ptr->data[state].swpld_addr_offset = ptr->swpld_addr_offset; + ops_ptr->swpld_addr = ptr->swpld_addr; + ops_ptr->swpld_addr_offset = ptr->swpld_addr_offset; + memcpy(ops_ptr->data[state].attr_devtype, ptr->attr_devtype, sizeof(ops_ptr->data[state].attr_devtype)); + memcpy(ops_ptr->data[state].attr_devname, ptr->attr_devname, sizeof(ops_ptr->data[state].attr_devname)); + memcpy(ops_ptr->attr_devtype, ptr->attr_devtype, sizeof(ops_ptr->attr_devtype)); + memcpy(ops_ptr->attr_devname, ptr->attr_devname, sizeof(ops_ptr->attr_devname)); +#ifdef __STDC_LIB_EXT1__ + memset_s(ops_ptr->data[state].reg_values, sizeof(ops_ptr->data[state].reg_values), 0xff, sizeof(ops_ptr->data[state].reg_values)); +#else + memset(ops_ptr->data[state].reg_values, 0xff, sizeof(ops_ptr->data[state].reg_values)); +#endif + value_ptr = kzalloc(sizeof(ops_ptr->data[state].value), GFP_KERNEL); + if (value_ptr) { + memcpy(value_ptr, ops_ptr->data[state].value, sizeof(ops_ptr->data[state].value)); + while((token = strsep((char**)&value_ptr,";")) != NULL && i < VALUE_SIZE) { + if (kstrtou8(token, 16, &ops_ptr->data[state].reg_values[i])) { + pddf_dbg(LED, KERN_ERR "load_led_ops_data: [%s] conversion error\n", token); + } + i++; + } + kfree(value_ptr); + } + + print_led_data(dev_list[led_type]+ptr->index, state); + + memset(ptr, 0, sizeof(LED_OPS_DATA)); + return (0); +} + +static int show_led_ops_data(struct device_attribute *da) +{ + LED_OPS_DATA* ops_ptr = find_led_ops_data(da); + print_led_data(ops_ptr, -1); + return(0); +} + +static int verify_led_ops_data(struct device_attribute *da) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + + if(ops_ptr) + memcpy(ptr, ops_ptr, sizeof(LED_OPS_DATA)); + else + { + pddf_dbg(LED, "SYSTEM_LED: verify_led_ops_data: Failed to find ops_ptr name:%s; index=%d\n", ptr->device_name, ptr->index); + } + return (0); +} + + +ssize_t dev_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ +#if DEBUG + pddf_dbg(LED, KERN_INFO "dev_operation [%s]\n", buf); +#endif + if(strncmp(buf, "show", strlen("show")) == 0) { + show_led_ops_data(da); + } + else if(strncmp(buf, "verify", strlen("verify")) == 0) { + verify_led_ops_data(da); + } + else if(strncmp(buf, "get_status", strlen("get_status")) == 0) { + get_status_led(da); + } + else if(strncmp(buf, "set_status", strlen("set_status")) == 0) { + set_status_led(da); + } + else { + LED_STATUS index = find_state_index(buf); + if (index < MAX_LED_STATUS) { + load_led_ops_data(da, index); + } else { + printk(KERN_ERR "PDDF_ERROR: %s: Invalid value for dev_ops %s\n", __FUNCTION__, buf); + } + } + return (count); +} + +ssize_t store_config_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int ret, num; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + if(strncmp(ptr->dev_attr.attr.name, "num_psus", strlen("num_psus")) == 0) { + ret = kstrtoint(buf,10,&num); + if (ret==0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, "[ WRITE ] ATTR CONFIG [%s] VALUE:%d; %d\n", + ptr->dev_attr.attr.name, num, num_psus); +#endif + return(count); + } + if (strncmp(ptr->dev_attr.attr.name, "num_fantrays", strlen("num_fantrays")) ==0) { + ret = kstrtoint(buf, 10, &num); + if (ret == 0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, "[ WRITE ] ATTR CONFIG [%s] VALUE:%d; %d\n", + ptr->dev_attr.attr.name, num, num_fantrays); +#endif + return (count); + } + return (count); +} + +ssize_t store_bits_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int len = 0, num1 = 0, num2 = 0, i=0, rc1=0, rc2=0; + char mask=0xFF; + char *pptr=NULL; + char bits[NAME_SIZE]; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + MASK_BITS* bits_ptr=(MASK_BITS*)(ptr->addr); + memcpy(bits_ptr->bits, buf, strlen(buf)-1); // to discard newline char form buf + bits_ptr->bits[strlen(buf)-1] = '\0'; + if((pptr=strstr(buf,":")) != NULL) { + len = pptr-buf; + sprintf(bits, buf); + bits[len] = '\0'; + rc1 = kstrtoint(bits, 16, &num1); + if (rc1 == 0) + { + sprintf(bits, ++pptr); + rc2 = kstrtoint(bits, 16, &num2); + if (rc2 == 0) + { + for (i=num2; i<=num1; i++) { + mask &= ~(1 << i); + } + bits_ptr->mask_bits = mask; + bits_ptr->pos = num2; + } + } + } else { + rc1 = kstrtoint(buf, 16, &num1); + if (rc1 == 0) + { + bits_ptr->mask_bits = mask & ~(1 << num1); + bits_ptr->pos = num1; + } + } +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR Bits [%s] VALUE:%s mask:0x%x; pos:0x%x\n", + ptr->dev_attr.attr.name, bits_ptr->bits, bits_ptr->mask_bits, bits_ptr->pos); +#endif + return (count); +} + +/************************************************************************** + * platform/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(platform, num_psus, S_IWUSR|S_IRUGO, show_pddf_data, + store_config_data, PDDF_INT_DEC, sizeof(int), (void*)&num_psus); +PDDF_LED_DATA_ATTR(platform, num_fantrays, S_IWUSR|S_IRUGO, show_pddf_data, + store_config_data, PDDF_INT_DEC, sizeof(int), (void*)&num_fantrays); + +struct attribute* attrs_platform[]={ + &pddf_dev_platform_attr_num_psus.dev_attr.attr, + &pddf_dev_platform_attr_num_fantrays.dev_attr.attr, + NULL, +}; +struct attribute_group attr_group_platform={ + .attrs = attrs_platform, +}; + +/************************************************************************** + * led/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(dev, device_name, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.device_name); +PDDF_LED_DATA_ATTR(dev, attr_devtype, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.attr_devtype); +PDDF_LED_DATA_ATTR(dev, attr_devname, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.attr_devname); +PDDF_LED_DATA_ATTR(dev, index, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_DEC, sizeof(int), (void*)&temp_data.index); +PDDF_LED_DATA_ATTR(dev, swpld_addr, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&temp_data.swpld_addr); +PDDF_LED_DATA_ATTR(dev, swpld_addr_offset, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&temp_data.swpld_addr_offset); +PDDF_LED_DATA_ATTR(dev, dev_ops , S_IWUSR, NULL, + dev_operation, PDDF_CHAR, NAME_SIZE, (void*)&temp_data); + +struct attribute* attrs_dev[] = { + &pddf_dev_dev_attr_device_name.dev_attr.attr, + &pddf_dev_dev_attr_attr_devtype.dev_attr.attr, + &pddf_dev_dev_attr_attr_devname.dev_attr.attr, + &pddf_dev_dev_attr_index.dev_attr.attr, + &pddf_dev_dev_attr_swpld_addr.dev_attr.attr, + &pddf_dev_dev_attr_swpld_addr_offset.dev_attr.attr, + &pddf_dev_dev_attr_dev_ops.dev_attr.attr, + NULL, +}; + +struct attribute_group attr_group_dev = { + .attrs = attrs_dev, +}; + +/************************************************************************** + * state_attr/ attributes + **************************************************************************/ +#define LED_DEV_STATE_ATTR_GROUP(name, func) \ + PDDF_LED_DATA_ATTR(name, bits, S_IWUSR|S_IRUGO, show_pddf_data, \ + store_bits_data, PDDF_CHAR, NAME_SIZE, func.bits.bits); \ + PDDF_LED_DATA_ATTR(name, value, S_IWUSR|S_IRUGO, show_pddf_data, \ + store_pddf_data, PDDF_CHAR, NAME_SIZE, func.value); \ + struct attribute* attrs_##name[]={ \ + &pddf_dev_##name##_attr_bits.dev_attr.attr, \ + &pddf_dev_##name##_attr_value.dev_attr.attr, \ + NULL, \ + }; \ + struct attribute_group attr_group_##name={ \ + .attrs = attrs_##name, \ + }; \ + + +LED_DEV_STATE_ATTR_GROUP(state_attr, (void*)&temp_data.data[0]) + +/************************************************************************** + * cur_state/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(cur_state, color, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.cur_state.color); +PDDF_LED_DATA_ATTR(cur_state, sys_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&sys_led_ops_data); +PDDF_LED_DATA_ATTR(cur_state, loc_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, NAME_SIZE, (void*)&loc_led_ops_data); +PDDF_LED_DATA_ATTR(cur_state, bmc_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&bmc_led_ops_data); +PDDF_LED_DATA_ATTR(cur_state, fan_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&fan_led_ops_data); +PDDF_LED_DATA_ATTR(cur_state, psu_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), NULL); +PDDF_LED_DATA_ATTR(cur_state, psu1_led, S_IRUGO, show_pddf_s3ip_data, + NULL, PDDF_INT_DEC, sizeof(int), (void *)&psu_led_ops_data[0]); +PDDF_LED_DATA_ATTR(cur_state, psu2_led, S_IRUGO, show_pddf_s3ip_data, + NULL, PDDF_INT_DEC, sizeof(int), (void *)&psu_led_ops_data[1]); +PDDF_LED_DATA_ATTR(cur_state, fantray1_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[0]); +PDDF_LED_DATA_ATTR(cur_state, fantray2_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[1]); +PDDF_LED_DATA_ATTR(cur_state, fantray3_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[2]); +PDDF_LED_DATA_ATTR(cur_state, fantray4_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[3]); +PDDF_LED_DATA_ATTR(cur_state, fantray5_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[4]); +PDDF_LED_DATA_ATTR(cur_state, fantray6_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[5]); +PDDF_LED_DATA_ATTR(cur_state, fantray7_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[6]); + + +struct attribute* attrs_cur_state[] = { + &pddf_dev_cur_state_attr_color.dev_attr.attr, + &pddf_dev_cur_state_attr_sys_led.dev_attr.attr, + &pddf_dev_cur_state_attr_loc_led.dev_attr.attr, + &pddf_dev_cur_state_attr_bmc_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fan_led.dev_attr.attr, + &pddf_dev_cur_state_attr_psu_led.dev_attr.attr, + &pddf_dev_cur_state_attr_psu1_led.dev_attr.attr, + &pddf_dev_cur_state_attr_psu2_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray1_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray2_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray3_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray4_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray5_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray6_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray7_led.dev_attr.attr, + NULL, +}; + +struct attribute_group attr_group_cur_state={ + .attrs = attrs_cur_state, +}; + +/*************************************************************************/ +#define KOBJ_FREE(obj) \ + if(obj) kobject_put(obj); \ + +void free_kobjs(void) +{ + KOBJ_FREE(cur_state_kobj) + KOBJ_FREE(state_attr_kobj) + KOBJ_FREE(led_kobj) + KOBJ_FREE(platform_kobj) +} + +int KBOJ_CREATE(char* name, struct kobject* parent, struct kobject** child) +{ + if (parent) { + *child = kobject_create_and_add(name, parent); + } else { + printk(KERN_ERR "PDDF_LED ERROR to create %s kobj; null parent\n", name); + free_kobjs(); + return (-ENOMEM); + } + return (0); +} + +int LED_DEV_ATTR_CREATE(struct kobject *kobj, const struct attribute_group *attr, const char* name) +{ + int status = sysfs_create_group(kobj, attr); + if(status) { + pddf_dbg(LED, KERN_ERR "Driver ERROR: sysfs_create %s failed rc=%d\n", name, status); + } + return (status); +} + + +static int __init led_init(void) { + struct kobject *device_kobj; + pddf_dbg(LED, KERN_INFO "PDDF GENERIC LED MODULE init..\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + KBOJ_CREATE("platform", device_kobj, &platform_kobj); + KBOJ_CREATE("led", device_kobj, &led_kobj); + KBOJ_CREATE("state_attr", led_kobj, &state_attr_kobj); + KBOJ_CREATE("cur_state", led_kobj, &cur_state_kobj); + + LED_DEV_ATTR_CREATE(platform_kobj, &attr_group_platform, "attr_group_platform"); + LED_DEV_ATTR_CREATE(led_kobj, &attr_group_dev, "attr_group_dev"); + LED_DEV_ATTR_CREATE(state_attr_kobj, &attr_group_state_attr, "attr_group_state_attr"); + LED_DEV_ATTR_CREATE(cur_state_kobj, &attr_group_cur_state, "attr_group_cur_state"); + return (0); +} + + +static void __exit led_exit(void) { + pddf_dbg(LED, "PDDF GENERIC LED MODULE exit..\n"); + free_kobjs(); +} + +module_init(led_init); +module_exit(led_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_algo.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_algo.c new file mode 100644 index 000000000000..2c93c36f3f42 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_algo.c @@ -0,0 +1,634 @@ +/* +* +* Licensed under the GNU General Public License Version 2 +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +*/ + +/* +* pddf_xilinx_device_7021_algo.c +* Description: +* A sample i2c driver algorithms for Xilinx Corporation Device 7021 FPGA adapters +* +*********************************************************************************/ +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h" + +#define DEBUG 0 + +enum { + STATE_DONE = 0, + STATE_INIT, + STATE_ADDR, + STATE_ADDR10, + STATE_START, + STATE_WRITE, + STATE_READ, + STATE_STOP, + STATE_ERROR, +}; + +#define XIIC_MSB_OFFSET 0 +#define XIIC_REG_OFFSET (0x100 + XIIC_MSB_OFFSET) + +/* + * Register offsets in bytes from RegisterBase. Three is added to the + * base offset to access LSB (IBM style) of the word + */ +#define XIIC_CR_REG_OFFSET (0x00 + XIIC_REG_OFFSET) /* Control Register */ +#define XIIC_SR_REG_OFFSET (0x04 + XIIC_REG_OFFSET) /* Status Register */ +#define XIIC_DTR_REG_OFFSET (0x08 + XIIC_REG_OFFSET) /* Data Tx Register */ +#define XIIC_DRR_REG_OFFSET (0x0C + XIIC_REG_OFFSET) /* Data Rx Register */ +#define XIIC_ADR_REG_OFFSET (0x10 + XIIC_REG_OFFSET) /* Address Register */ +#define XIIC_TFO_REG_OFFSET (0x14 + XIIC_REG_OFFSET) /* Tx FIFO Occupancy */ +#define XIIC_RFO_REG_OFFSET (0x18 + XIIC_REG_OFFSET) /* Rx FIFO Occupancy */ +#define XIIC_TBA_REG_OFFSET (0x1C + XIIC_REG_OFFSET) /* 10 Bit Address reg */ +#define XIIC_RFD_REG_OFFSET (0x20 + XIIC_REG_OFFSET) /* Rx FIFO Depth reg */ +#define XIIC_GPO_REG_OFFSET (0x24 + XIIC_REG_OFFSET) /* Output Register */ + +/* Control Register masks */ +#define XIIC_CR_ENABLE_DEVICE_MASK 0x01 /* Device enable = 1 */ +#define XIIC_CR_TX_FIFO_RESET_MASK 0x02 /* Transmit FIFO reset=1 */ +#define XIIC_CR_MSMS_MASK 0x04 /* Master starts Txing=1 */ +#define XIIC_CR_DIR_IS_TX_MASK 0x08 /* Dir of tx. Txing=1 */ +#define XIIC_CR_NO_ACK_MASK 0x10 /* Tx Ack. NO ack = 1 */ +#define XIIC_CR_REPEATED_START_MASK 0x20 /* Repeated start = 1 */ +#define XIIC_CR_GENERAL_CALL_MASK 0x40 /* Gen Call enabled = 1 */ + +/* Status Register masks */ +#define XIIC_SR_GEN_CALL_MASK 0x01 /* 1=a mstr issued a GC */ +#define XIIC_SR_ADDR_AS_SLAVE_MASK 0x02 /* 1=when addr as slave */ +#define XIIC_SR_BUS_BUSY_MASK 0x04 /* 1 = bus is busy */ +#define XIIC_SR_MSTR_RDING_SLAVE_MASK 0x08 /* 1=Dir: mstr <-- slave */ +#define XIIC_SR_TX_FIFO_FULL_MASK 0x10 /* 1 = Tx FIFO full */ +#define XIIC_SR_RX_FIFO_FULL_MASK 0x20 /* 1 = Rx FIFO full */ +#define XIIC_SR_RX_FIFO_EMPTY_MASK 0x40 /* 1 = Rx FIFO empty */ +#define XIIC_SR_TX_FIFO_EMPTY_MASK 0x80 /* 1 = Tx FIFO empty */ + +/* Interrupt Status Register masks Interrupt occurs when... */ +#define XIIC_INTR_ARB_LOST_MASK 0x01 /* 1 = arbitration lost */ +#define XIIC_INTR_TX_ERROR_MASK 0x02 /* 1=Tx error/msg complete */ +#define XIIC_INTR_TX_EMPTY_MASK 0x04 /* 1 = Tx FIFO/reg empty */ +#define XIIC_INTR_RX_FULL_MASK 0x08 /* 1=Rx FIFO/reg=OCY level */ +#define XIIC_INTR_BNB_MASK 0x10 /* 1 = Bus not busy */ +#define XIIC_INTR_AAS_MASK 0x20 /* 1 = when addr as slave */ +#define XIIC_INTR_NAAS_MASK 0x40 /* 1 = not addr as slave */ +#define XIIC_INTR_TX_HALF_MASK 0x80 /* 1 = TX FIFO half empty */ + +/* The following constants specify the depth of the FIFOs */ +#define IIC_RX_FIFO_DEPTH 16 /* Rx fifo capacity */ +#define IIC_TX_FIFO_DEPTH 16 /* Tx fifo capacity */ + +/* + * Tx Fifo upper bit masks. + */ +#define XIIC_TX_DYN_START_MASK 0x0100 /* 1 = Set dynamic start */ +#define XIIC_TX_DYN_STOP_MASK 0x0200 /* 1 = Set dynamic stop */ + +/* + * The following constants define the register offsets for the Interrupt + * registers. There are some holes in the memory map for reserved addresses + * to allow other registers to be added and still match the memory map of the + * interrupt controller registers + */ +#define XIIC_IISR_OFFSET 0x20 /* Interrupt Status Register */ +#define XIIC_RESETR_OFFSET 0x40 /* Reset Register */ + +#define XIIC_RESET_MASK 0xAUL + +#define XIIC_PM_TIMEOUT 1000 /* ms */ +/* timeout waiting for the controller to respond */ +#define XIIC_I2C_TIMEOUT (msecs_to_jiffies(1000)) + +struct fpgalogic_i2c { + void __iomem *base; + u32 reg_shift; + u32 reg_io_width; + wait_queue_head_t wait; + struct i2c_msg *msg; + int pos; + int nmsgs; + int state; /* see STATE_ */ + int ip_clock_khz; + int bus_clock_khz; + void (*reg_set)(struct fpgalogic_i2c *i2c, int reg, u8 value); + u8 (*reg_get)(struct fpgalogic_i2c *i2c, int reg); + u32 timeout; + struct mutex lock; +}; +static struct fpgalogic_i2c fpgalogic_i2c[I2C_PCI_MAX_BUS]; +extern void __iomem * fpga_ctl_addr; +extern int (*ptr_fpgapci_read)(uint32_t); +extern int (*ptr_fpgapci_write)(uint32_t, uint32_t); +extern int (*pddf_i2c_pci_add_numbered_bus)(struct i2c_adapter *, int); +static int xiic_reinit(struct fpgalogic_i2c *i2c); + +void i2c_get_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_lock(&i2c->lock); +} + +/** + * i2c_release_mutex - release mutex + */ +void i2c_release_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_unlock(&i2c->lock); +} + +static inline void xiic_setreg32(struct fpgalogic_i2c *i2c, int reg, int value) +{ + (void)iowrite32(value, i2c->base + reg); +} + +static inline int xiic_getreg32(struct fpgalogic_i2c *i2c, int reg) +{ + u32 ret; + + ret = ioread32(i2c->base + reg); + + return ret; +} + +static inline void xiic_irq_clr(struct fpgalogic_i2c *i2c, u32 mask) +{ + u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + + xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask); +} + +static int xiic_clear_rx_fifo(struct fpgalogic_i2c *i2c) +{ + u8 sr; + unsigned long timeout; + + timeout = jiffies + XIIC_I2C_TIMEOUT; + for (sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET); + !(sr & XIIC_SR_RX_FIFO_EMPTY_MASK); + sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET)) { + xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + if (time_after(jiffies, timeout)) { + printk("Failed to clear rx fifo\n"); + return -ETIMEDOUT; + } + } + + return 0; +} + +/** + * Wait until something change in a given register + * @i2c: ocores I2C device instance + * @reg: register to query + * @mask: bitmask to apply on register value + * @val: expected result + * @timeout: timeout in jiffies + * + * Timeout is necessary to avoid to stay here forever when the chip + * does not answer correctly. + * + * Return: 0 on success, -ETIMEDOUT on timeout + */ +static int poll_wait(struct fpgalogic_i2c *i2c, + int reg, u8 mask, u8 val, + const unsigned long timeout) +{ + unsigned long j; + u8 status = 0; + + j = jiffies + timeout; + while (1) { + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, reg); + mutex_unlock(&i2c->lock); + if ((status & mask) == val) + break; + if (time_after(jiffies, j)) + return -ETIMEDOUT; + cpu_relax(); + cond_resched(); + } + return 0; +} + +/** + * Wait until is possible to process some data + * @i2c: ocores I2C device instance + * + * Used when the device is in polling mode (interrupts disabled). + * + * Return: 0 on success, -ETIMEDOUT on timeout + */ +static int ocores_poll_wait(struct fpgalogic_i2c *i2c) +{ + u8 mask = 0, status = 0; + int err = 0; + int val = 0; + int tmp = 0; + mutex_lock(&i2c->lock); + if (i2c->state == STATE_DONE) { + /* transfer is over */ + mask = XIIC_SR_BUS_BUSY_MASK; + } else if (i2c->state == STATE_WRITE || i2c->state == STATE_START){ + /* on going transfer */ + if (0 == i2c->msg->len){ + mask = XIIC_INTR_TX_ERROR_MASK; + } else { + mask = XIIC_SR_TX_FIFO_FULL_MASK; + } + } + else if (i2c->state == STATE_READ){ + /* on going receive */ + mask = XIIC_SR_TX_FIFO_EMPTY_MASK | XIIC_SR_RX_FIFO_EMPTY_MASK; + } + mutex_unlock(&i2c->lock); + // printk("Wait for: 0x%x\n", mask); + + /* + * once we are here we expect to get the expected result immediately + * so if after 50ms we timeout then something is broken. + */ + + if (1 == i2c->nmsgs && 0 == i2c->msg->len && i2c->state == STATE_START && !(i2c->msg->flags & I2C_M_RD)) { /* for i2cdetect I2C_SMBUS_QUICK mode*/ + err = poll_wait(i2c, XIIC_IISR_OFFSET, mask, mask, msecs_to_jiffies(50)); + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET); + mutex_unlock(&i2c->lock); + if (0 != err) { /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, means no such i2c device */ + err = 0; + } else { + err = -ETIMEDOUT; + } + } + else { + if (mask & XIIC_SR_TX_FIFO_EMPTY_MASK){ + err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, XIIC_SR_TX_FIFO_EMPTY_MASK, msecs_to_jiffies(50)); + mask &= ~XIIC_SR_TX_FIFO_EMPTY_MASK; + } + if (0 == err){ + err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, 0, msecs_to_jiffies(50)); + } + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + + if ((status & XIIC_INTR_ARB_LOST_MASK) || + ((status & XIIC_INTR_TX_ERROR_MASK) && + !(status & XIIC_INTR_RX_FULL_MASK) && + !(i2c->msg->flags & I2C_M_RD))) { /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, return */ + err = -ETIMEDOUT; + + if (status & XIIC_INTR_ARB_LOST_MASK) { + val = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET); + tmp = XIIC_CR_MSMS_MASK; + val &=(~tmp); + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val); + xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_ARB_LOST_MASK); + printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens\n", + __func__, XIIC_INTR_ARB_LOST_MASK); + } + if (status & XIIC_INTR_TX_ERROR_MASK) { + int sta = 0; + int cr = 0; + sta = xiic_getreg32(i2c,XIIC_SR_REG_OFFSET); + cr = xiic_getreg32(i2c,XIIC_CR_REG_OFFSET); + xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_TX_ERROR_MASK); + printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens; SR: bit 0x%x; CR: bit 0x%x\n", + __func__, status, sta, cr); + } + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + (void)xiic_reinit(i2c); + mutex_unlock(&i2c->lock); + return err; + } + mutex_unlock(&i2c->lock); + } + + if (err) + printk("%s: STATUS timeout, bit 0x%x did not clear in 50ms\n", + __func__, status); + return err; +} + +static void ocores_process(struct fpgalogic_i2c *i2c) +{ + struct i2c_msg *msg = i2c->msg; + //unsigned long flags; + u16 val; + + /* + * If we spin here because we are in timeout, so we are going + * to be in STATE_ERROR. See ocores_process_timeout() + */ + mutex_lock(&i2c->lock); + // printk("STATE: %d\n", i2c->state); + + if (i2c->state == STATE_START) { + i2c->state =(msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; + /* if it's the time sequence is 'start bit + address + read bit + stop bit' */ + if (i2c->state == STATE_READ){ + /* it's the last message so we include dynamic stop bit with length */ + val = msg->len | XIIC_TX_DYN_STOP_MASK; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val); + goto out; + } + } + if (i2c->state == STATE_READ){ + /* suit for I2C_FUNC_SMBUS_BLOCK_DATA */ + if (msg->flags & I2C_M_RECV_LEN) { + msg->len = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + msg->flags &= ~I2C_M_RECV_LEN; + msg->buf[i2c->pos++] = msg->len; + } + else { + msg->buf[i2c->pos++] = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + } + } else if (i2c->state == STATE_WRITE){ + /* if it reaches the last byte data to be sent */ + if ((i2c->pos == msg->len - 1) && (i2c->nmsgs == 1)){ + val = msg->buf[i2c->pos++] | XIIC_TX_DYN_STOP_MASK; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val); + i2c->state = STATE_DONE; + goto out; + /* if it is not the last byte data to be sent */ + } else if (i2c->pos < msg->len) { + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, msg->buf[i2c->pos++]); + goto out; + } + } + + /* end of msg? */ + if (i2c->pos == msg->len) { + i2c->nmsgs--; + i2c->pos = 0; + if (i2c->nmsgs) { + i2c->msg++; + msg = i2c->msg; + if (!(msg->flags & I2C_M_NOSTART)) /* send start? */{ + i2c->state = STATE_START; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msg) | XIIC_TX_DYN_START_MASK); + goto out; + } + } else { /* end? */ + i2c->state = STATE_DONE; + goto out; + } + } + +out: + mutex_unlock(&i2c->lock); + return ; +} + + +static int fpgai2c_poll(struct fpgalogic_i2c *i2c, + struct i2c_msg *msgs, int num) +{ + int ret = 0; + // u8 ctrl; + + mutex_lock(&i2c->lock); + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + /* Set receive Fifo depth to maximum (zero based). */ + xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1); + + /* Reset Tx Fifo. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); + + /* Enable IIC Device, remove Tx Fifo reset & disable general call. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_ENABLE_DEVICE_MASK); + + /* set i2c clock as 100Hz. */ + //xiic_setreg32(i2c, 0x13c, 0x7C); + + /* make sure RX fifo is empty */ + ret = xiic_clear_rx_fifo(i2c); + if (ret){ + mutex_unlock(&i2c->lock); + return ret; + } + + i2c->msg = msgs; + i2c->pos = 0; + i2c->nmsgs = num; + i2c->state = STATE_START; + + // printk("STATE: %d\n", i2c->state); + + if (msgs->len == 0 && num == 1){ /* suit for i2cdetect time sequence */ + u8 status = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + xiic_irq_clr(i2c, status); + /* send out the 1st byte data and stop bit */ + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK | XIIC_TX_DYN_STOP_MASK); + } else { + /* send out the 1st byte data */ + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK); + } + mutex_unlock(&i2c->lock); + while (1) { + int err; + + err = ocores_poll_wait(i2c); + if (err) { + i2c->state = STATE_ERROR; + break; + }else if (i2c->state == STATE_DONE){ + break; + } + ocores_process(i2c); + } + + return (i2c->state == STATE_DONE) ? num : -EIO; +} + +static int fpgai2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) +{ + struct fpgalogic_i2c *i2c = i2c_get_adapdata(adap); + int err = -EIO; + u8 retry = 0, max_retry = 0; + + if( ( (1 == msgs->len && (msgs->flags & I2C_M_RD)) || (0 == msgs->len && !(msgs->flags & I2C_M_RD)) ) && num == 1 ) /* I2C_SMBUS_QUICK or I2C_SMBUS_BYTE */ + max_retry = 1; + else + max_retry = 5; // retry 5 times if receive a NACK or other errors + while( (-EIO == err) && (retry < max_retry)) + { + err = fpgai2c_poll(i2c, msgs, num); + retry++; + } + + return err; + +} + +static u32 fpgai2c_func(struct i2c_adapter *adap) +{ +/* a typical full-I2C adapter would use the following */ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static const struct i2c_algorithm fpgai2c_algorithm= { + .master_xfer = fpgai2c_xfer, /*write I2C messages */ + .functionality = fpgai2c_func, /* what the adapter supports */ +}; + +static int xiic_reinit(struct fpgalogic_i2c *i2c) +{ + int ret; + int val = 0; + + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + + /* Set receive Fifo depth to maximum (zero based). */ + xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1); + + /* Reset Tx Fifo. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); + + /* Enable IIC Device, remove Tx Fifo reset & disable general call. */ + val |= XIIC_CR_ENABLE_DEVICE_MASK; + //val |= XIIC_CR_TX_FIFO_RESET_MASK; + //val |= XIIC_CR_MSMS_MASK; + val |= XIIC_CR_DIR_IS_TX_MASK; + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val); + + /* make sure RX fifo is empty */ + ret = xiic_clear_rx_fifo(i2c); + if (ret) + return ret; + + return 0; +} + +static int fpgai2c_init(struct fpgalogic_i2c *i2c) +{ + // int prescale; + // int diff; + // u8 ctrl; + int ret; + + + //i2c->reg_set = xiic_setreg32; + //i2c->reg_get = xiic_getreg32; + + ret = xiic_reinit(i2c); + if (ret < 0) { + printk("Cannot xiic_reinit\n"); + return ret; + } + + /* Initialize interrupt handlers if not already done */ + init_waitqueue_head(&i2c->wait); + return 0; +} + +static int adap_data_init(struct i2c_adapter *adap, int i2c_ch_index) +{ + struct fpgapci_devdata *pci_privdata = 0; + pci_privdata = (struct fpgapci_devdata*) dev_get_drvdata(adap->dev.parent); + + if (pci_privdata == 0) { + printk("[%s]: ERROR pci_privdata is 0\n", __FUNCTION__); + return -1; + } +#if DEBUG + pddf_dbg(FPGA, KERN_INFO "[%s] index: [%d] fpga_data__base_addr:0x%0x8lx" + " fpgapci_bar_len:0x%08lx fpga_i2c_ch_base_addr:0x%08lx ch_size=0x%x supported_i2c_ch=%d", + __FUNCTION__, i2c_ch_index, pci_privdata->fpga_data_base_addr, + pci_privdata->bar_length, pci_privdata->fpga_i2c_ch_base_addr, + pci_privdata->fpga_i2c_ch_size, pci_privdata->max_fpga_i2c_ch); +#endif + if (i2c_ch_index >= pci_privdata->max_fpga_i2c_ch || pci_privdata->max_fpga_i2c_ch > I2C_PCI_MAX_BUS) { + printk("[%s]: ERROR i2c_ch_index=%d max_ch_index=%d out of range: %d\n", + __FUNCTION__, i2c_ch_index, pci_privdata->max_fpga_i2c_ch, I2C_PCI_MAX_BUS); + return -1; + } +#ifdef __STDC_LIB_EXT1__ + memset_s(&fpgalogic_i2c[i2c_ch_index], sizeof(fpgalogic_i2c[0]), 0, sizeof(fpgalogic_i2c[0])); +#else + memset(&fpgalogic_i2c[i2c_ch_index], 0, sizeof(fpgalogic_i2c[0])); +#endif + + fpgalogic_i2c[i2c_ch_index].base = pci_privdata->fpga_i2c_ch_base_addr + + i2c_ch_index* pci_privdata->fpga_i2c_ch_size; + mutex_init(&fpgalogic_i2c[i2c_ch_index].lock); + fpgai2c_init(&fpgalogic_i2c[i2c_ch_index]); + + + adap->algo_data = &fpgalogic_i2c[i2c_ch_index]; + i2c_set_adapdata(adap, &fpgalogic_i2c[i2c_ch_index]); + return 0; +} + +static int pddf_i2c_pci_add_numbered_bus_default (struct i2c_adapter *adap, int i2c_ch_index) +{ + int ret = 0; + + adap_data_init(adap, i2c_ch_index); + adap->algo = &fpgai2c_algorithm; + + ret = i2c_add_numbered_adapter(adap); + return ret; +} + +/* + * FPGAPCI APIs + */ +int board_i2c_fpgapci_read(uint32_t offset) +{ + int data; + data=ioread32(fpga_ctl_addr+offset); + return data; +} + + +int board_i2c_fpgapci_write(uint32_t offset, uint32_t value) +{ + iowrite32(value, fpga_ctl_addr+offset); + return (0); +} + + +static int __init pddf_xilinx_device_7021_algo_init(void) +{ + pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__); + pddf_i2c_pci_add_numbered_bus = pddf_i2c_pci_add_numbered_bus_default; + ptr_fpgapci_read = board_i2c_fpgapci_read; + ptr_fpgapci_write = board_i2c_fpgapci_write; + return 0; +} + +static void __exit pddf_xilinx_device_7021_algo_exit(void) +{ + pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__); + + pddf_i2c_pci_add_numbered_bus = NULL; + ptr_fpgapci_read = NULL; + ptr_fpgapci_write = NULL; + return; +} + + +module_init (pddf_xilinx_device_7021_algo_init); +module_exit (pddf_xilinx_device_7021_algo_exit); +MODULE_DESCRIPTION("Xilinx Corporation Device 7021 FPGAPCIe I2C-Bus algorithm"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_extend.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_extend.c new file mode 100644 index 000000000000..7f7f19068aa2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_extend.c @@ -0,0 +1,340 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * fpga-cls.c - front panel port control. + * + * Pradchaya Phucharoen + * Copyright (C) 2019 Celestica Corp. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h" + +#define XILINX_FPGA_VERSION 0x0000 +#define XILINX_FPGA_SCRATCH 0x0004 +#define XILINX_FPGA_REG_SIZE 0x2000 + + +/* + * fpga_priv - port fpga private data + * @dev: device for reference + * @base: virtual base address + * @num_ports: number of front panel ports + * @fp_devs: list of front panel port devices + */ +struct fpga_priv { + void __iomem *base; + struct mutex fpga_lock; // For FPGA internal lock + void __iomem * fpga_read_addr; +}; + +extern void __iomem * fpga_ctl_addr; + +/** + * Show the value of the register set by 'set_fpga_reg_address' + * If the address is not set by 'set_fpga_reg_address' first, + * The version register is selected by default. + * @param buf register value in hextring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + // read data from the address + uint32_t data; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + data = ioread32(fpga->fpga_read_addr); + return sprintf(buf, "0x%8.8x\n", data); +} +/** + * Store the register address + * @param buf address wanted to be read value of + * @return number of bytes stored, or an error code + */ +static ssize_t set_fpga_reg_address(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t addr; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + addr = (uint32_t)strtoul(buf, &last, 16); + if (addr == 0 && buf == last) { + return -EINVAL; + } + fpga->fpga_read_addr = fpga->base + addr; + return count; +} +/** + * Show value of fpga scratch register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_scratch(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + + return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + XILINX_FPGA_SCRATCH) & 0xffffffff); +} +/** + * Store value of fpga scratch register + * @param buf scratch register value passing from user space + * @return number of bytes stored, or an error code + */ +static ssize_t set_fpga_scratch(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t data; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + data = (uint32_t)strtoul(buf, &last, 16); + if (data == 0 && buf == last) { + return -EINVAL; + } + iowrite32(data, fpga->base + XILINX_FPGA_SCRATCH); + return count; +} + +/** + * Show value of fpga version register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_version(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + + return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + XILINX_FPGA_VERSION) & 0xffffffff); +} + + +/** + * Store a value in a specific register address + * @param buf the value and address in format '0xhhhh 0xhhhhhhhh' + * @return number of bytes sent by user space, or an error code + */ +static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // register are 4 bytes + uint32_t addr; + uint32_t value; + uint32_t mode = 8; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + strscpy(clone, buf, count); + mutex_lock(&fpga->fpga_lock); + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + addr = (uint32_t)strtoul(tok, &last, 16); + if (addr == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + value = (uint32_t)strtoul(tok, &last, 16); + if (value == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mode = 32; + } else { + mode = (uint32_t)strtoul(tok, &last, 10); + if (mode == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + } + if (mode == 32) { + iowrite32(value, fpga->base + addr); + } else if (mode == 8) { + iowrite8(value, fpga->base + addr); + } else { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + mutex_unlock(&fpga->fpga_lock); + return count; +} + +/** + * Read all FPGA register in binary mode. + * @param buf Raw transceivers port startus and control register values + * @return number of bytes read, or an error code + */ +static ssize_t dump_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + unsigned long i = 0; + ssize_t status; + u8 read_reg; + struct device *dev = kobj_to_dev(kobj); + struct fpga_priv *fpga = dev_get_drvdata(dev); + + if ( off + count > XILINX_FPGA_REG_SIZE ) { + return -EINVAL; + } + mutex_lock(&fpga->fpga_lock); + while (i < count) { + read_reg = ioread8(fpga->base + off + i); + buf[i++] = read_reg; + } + status = count; + mutex_unlock(&fpga->fpga_lock); + return status; +} + + +/* FPGA attributes */ +static DEVICE_ATTR( getreg, 0600, get_fpga_reg_value, set_fpga_reg_address); +static DEVICE_ATTR( setreg, 0200, NULL , set_fpga_reg_value); +static DEVICE_ATTR( scratch, 0600, get_fpga_scratch, set_fpga_scratch); +static DEVICE_ATTR( version, 0400, get_fpga_version, NULL); +static BIN_ATTR_RO( dump, XILINX_FPGA_REG_SIZE); + +static struct bin_attribute *fpga_bin_attrs[] = { + &bin_attr_dump, + NULL, +}; + +static struct attribute *fpga_attrs[] = { + &dev_attr_getreg.attr, + &dev_attr_scratch.attr, + &dev_attr_version.attr, + &dev_attr_setreg.attr, + NULL, +}; + +static struct attribute_group fpga_attr_grp = { + .attrs = fpga_attrs, + .bin_attrs = fpga_bin_attrs, +}; + + +static int cls_fpga_probe(struct platform_device *pdev) +{ + + struct fpga_priv *fpga; + int ret = -ENOMEM; + + if (!fpga_ctl_addr){ + printk(KERN_WARNING, "fpga_ctl_addr is null"); + return ret; + } + + fpga = devm_kzalloc(&pdev->dev, sizeof(struct fpga_priv), GFP_KERNEL); + if (!fpga){ + ret = -ENOMEM; + goto err_exit; + } + + mutex_init(&fpga->fpga_lock); + dev_set_drvdata(&pdev->dev, fpga); + fpga->base = fpga_ctl_addr; + + printk("FPGA version: 0x%x\n", ioread32(fpga->base + XILINX_FPGA_VERSION)); + + ret = sysfs_create_group(&pdev->dev.kobj, &fpga_attr_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create FPGA system sysfs attributes\n"); + goto err_remove_fpga; + } + + return 0; + +err_remove_fpga: + sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp); +mem_unmap: + iounmap(fpga->base); +err_exit: + return ret; + +} + +static int cls_fpga_remove(struct platform_device *pdev) +{ + struct fpga_priv *fpga = dev_get_drvdata(&pdev->dev); + + sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp); + iounmap(fpga->base); + return 0; +} + +static void fpga_dev_release( struct device * dev) +{ + return; +} +static struct resource cls_fpga_resources[] = { + { + .start = NULL, + .end = NULL, + .flags = IORESOURCE_IO, + }, +}; + +static struct platform_device cls_fpga_dev = { + .name = "fpga_sysfs", + .id = -1, + .num_resources = ARRAY_SIZE(cls_fpga_resources), + .resource = cls_fpga_resources, + .dev = { + .release = fpga_dev_release, + } +}; + +static struct platform_driver cls_fpga_driver = { + .probe = cls_fpga_probe, + .remove = cls_fpga_remove, + .driver = { + .name = "fpga_sysfs", + }, +}; + +static int __init drv_init(void) +{ + int rc = 0; + + rc = platform_device_register(&cls_fpga_dev); + rc += platform_driver_register(&cls_fpga_driver); + printk("fpga drv_init:%d\n", rc); + return rc; +} + +static void __exit drv_exit(void) +{ + platform_driver_unregister(&cls_fpga_driver); + platform_device_unregister(&cls_fpga_dev); + printk("fpga drv_exit.\n"); +} + +module_init(drv_init); +module_exit(drv_exit); + +MODULE_AUTHOR("Nicholas Wu"); +MODULE_DESCRIPTION("Celestica fpga control driver"); +MODULE_VERSION("2.0.0"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:cls-fpga"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_lpc_basecpld.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_lpc_basecpld.c new file mode 100644 index 000000000000..08a9831785c9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_lpc_basecpld.c @@ -0,0 +1,441 @@ +/* + * cpld_b .c - The CPLD driver for the Base Board of cloverstone + * The driver implement sysfs to access CPLD register on the baseboard of cloverstone via LPC bus. + * Copyright (C) 2018 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "sys_cpld" +/** + * CPLD register address for read and write. + */ +#define VERSION_ADDR 0xA100 +#define BMC_PRESENT_ADDR 0xA108 +#define SCRATCH_ADDR 0xA101 +#define SYS_LED_ADDR 0xA162 +#define CPLD_REGISTER_SIZE 0xFF + +struct cpld_b_data { + struct mutex cpld_lock; + uint16_t read_addr; +}; + +struct cpld_b_data *cpld_data; + +/** + * Read the value from scratch register as hex string. + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t scratch_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf,"0x%2.2x\n", data); +} + +/** + * Set scratch register with specific hex string. + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t scratch_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned long data; + char *last; + + mutex_lock(&cpld_data->cpld_lock); + data = (uint16_t)strtoul(buf,&last,16); + if(data == 0 && buf == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + outb(data, SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(scratch); + + +/* CPLD version attributes */ +static ssize_t version_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = 0; + unsigned char value = 0; + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + value = inb(VERSION_ADDR); + len = sprintf(buf, "%d.%d\n", value >> 4, value & 0x0F); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RO(version); + + +/* BMC Present Status */ +static ssize_t bmc_present_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = 0; + unsigned char value = 0; + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + value = inb(BMC_PRESENT_ADDR); + len = sprintf(buf, "%d\n", value & 0x0F); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RO(bmc_present); + + +static ssize_t getreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // CPLD register is one byte + uint16_t addr; + char *last; + + addr = (uint16_t)strtoul(buf,&last,16); + if(addr == 0 && buf == last){ + return -EINVAL; + } + cpld_data->read_addr = addr; + return count; +} + +static ssize_t getreg_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = 0; + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + len = sprintf(buf, "0x%2.2x\n",inb(cpld_data->read_addr)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RW(getreg); + +static ssize_t setreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // CPLD register is one byte + uint16_t addr; + uint8_t value; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + + strscpy(clone, buf, count); + + mutex_lock(&cpld_data->cpld_lock); + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + addr = (uint16_t)strtoul(tok,&last,16); + if(addr == 0 && tok == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + value = (uint8_t)strtoul(tok,&last,16); + if(value == 0 && tok == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + outb(value,addr); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_WO(setreg); + +/** + * Read all CPLD register in binary mode. + * @return number of byte read. + */ +static ssize_t dump_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + unsigned long i=0; + ssize_t status; + + mutex_lock(&cpld_data->cpld_lock); +begin: + if(i < count){ + buf[i++] = inb(VERSION_ADDR + off); + off++; + msleep(1); + goto begin; + } + status = count; +exit: + mutex_unlock(&cpld_data->cpld_lock); + return status; +} +static BIN_ATTR_RO(dump, CPLD_REGISTER_SIZE); + +/** + * Show system led status - on/off/1k/4k + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t sys_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + data = data & 0x3; + return sprintf(buf, "%s\n", + data == 0x03 ? "off" : data == 0x02 ? "4k" : data ==0x01 ? "1k": "on"); +} + +/** + * Set the status of system led - on/off/1k/4k + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t sys_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status,data; + if(sysfs_streq(buf, "off")){ + led_status = 0x03; + }else if(sysfs_streq(buf, "4k")){ + led_status = 0x02; + }else if(sysfs_streq(buf, "1k")){ + led_status = 0x01; + }else if(sysfs_streq(buf, "on")){ + led_status = 0x00; + }else{ + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + data = data & ~(0x3); + data = data | led_status; + + /* if bit[5:4] is not configured to 01(green) or 10(yellow), + led will be off after set this filed */ + if(led_status == 0x00 && (0x0 == (data >> 4 & 0x3) || 0x3 == (data >> 4 & 0x3))){ + data = data & ~(0x3 << 4); + data = data | (0x01 << 4); /* set bit[5:4] to 01(green) defaultly */ + } else if(led_status == 0x01 || led_status == 0x02){ + data = data & ~(0x3 << 4); /* set bit[5:4] to 00(blink) defaultly */ + } + outb(data, SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(sys_led); + +/** + * Show system led color - both/green/yellow/none + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t sys_led_color_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + data = (data >> 4) & 0x3; + return sprintf(buf, "%s\n", + data == 0x03 ? "off" : data == 0x02 ? "yellow" : data ==0x01 ? "green": "both"); +} + +/** + * Set the color of system led - both/green/yellow/none + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t sys_led_color_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status,data; + if(sysfs_streq(buf, "off")){ + led_status = 0x03; + }else if(sysfs_streq(buf, "yellow")){ + led_status = 0x02; + }else if(sysfs_streq(buf, "green")){ + led_status = 0x01; + }else if(sysfs_streq(buf, "both")){ + led_status = 0x00; + }else{ + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + data = data & ~( 0x3 << 4); + data = data | (led_status << 4); + outb(data, SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(sys_led_color); + +static struct attribute *cpld_b_attrs[] = { + &dev_attr_bmc_present.attr, + &dev_attr_version.attr, + &dev_attr_scratch.attr, + &dev_attr_getreg.attr, + &dev_attr_setreg.attr, + &dev_attr_sys_led.attr, + &dev_attr_sys_led_color.attr, + NULL, +}; + +static struct bin_attribute *cpld_b_bin_attrs[] = { + &bin_attr_dump, + NULL, +}; + +static struct attribute_group cpld_b_attrs_grp = { + .attrs = cpld_b_attrs, + .bin_attrs = cpld_b_bin_attrs, +}; + +static struct resource cpld_b_resources[] = { + { + .start = 0xA100, + .end = 0xA1FF, + .flags = IORESOURCE_IO, + }, +}; + +static void cpld_b_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device cpld_b_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(cpld_b_resources), + .resource = cpld_b_resources, + .dev = { + .release = cpld_b_dev_release, + } +}; + +static int cpld_b_drv_probe(struct platform_device *pdev) +{ + struct resource *res; + int err = 0; + + cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct cpld_b_data), + GFP_KERNEL); + if (!cpld_data) + return -ENOMEM; + + mutex_init(&cpld_data->cpld_lock); + + cpld_data->read_addr = VERSION_ADDR; + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (unlikely(!res)) { + printk(KERN_ERR "Specified Resource Not Available...\n"); + return -ENODEV; + } + + err = sysfs_create_group(&pdev->dev.kobj, &cpld_b_attrs_grp); + if (err) { + printk(KERN_ERR "Cannot create sysfs for baseboard CPLD\n"); + return err; + } + return 0; +} + +static int cpld_b_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &cpld_b_attrs_grp); + return 0; +} + +static struct platform_driver cpld_b_drv = { + .probe = cpld_b_drv_probe, + .remove = __exit_p(cpld_b_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int cpld_b_init(void) +{ + // Register platform device and platform driver + platform_device_register(&cpld_b_dev); + platform_driver_register(&cpld_b_drv); + return 0; +} + +void cpld_b_exit(void) +{ + // Unregister platform device and platform driver + platform_driver_unregister(&cpld_b_drv); + platform_device_unregister(&cpld_b_dev); +} + +module_init(cpld_b_init); +module_exit(cpld_b_exit); + + +MODULE_AUTHOR("Celestica Inc."); +MODULE_DESCRIPTION("LPC CPLD baseboard driver"); +MODULE_VERSION("2.0.0"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/modules/pddf_custom_wdt.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_wdt.c similarity index 85% rename from platform/broadcom/sonic-platform-modules-cel/belgite/modules/pddf_custom_wdt.c rename to platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_wdt.c index 21ef0de9f31c..b26aabba64cd 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/modules/pddf_custom_wdt.c +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_wdt.c @@ -37,29 +37,25 @@ #define WDT_CONTROL_BASE 0xA100 #define TEST_SCRATCH_REG 0xA101 -#define REBOOT_CAUSE_REG 0xA105 -#define WDT_SET_TIMER_H_BIT_REG 0xA161 -#define WDT_SET_TIMER_M_BIT_REG 0xA162 -#define WDT_SET_TIMER_L_BIT_REG 0xA163 -#define WDT_TIMER_H_BIT_REG 0xA164 -#define WDT_TIMER_M_BIT_REG 0xA165 -#define WDT_TIMER_L_BIT_REG 0xA166 -#define WDT_ENABLE_REG 0xA167 -#define WDT_FEED_REG 0xA168 -#define WDT_PUNCH_REG 0xA169 +#define REBOOT_CAUSE_REG 0xA106 +#define WDT_SET_TIMER_H_BIT_REG 0xA181 +#define WDT_SET_TIMER_M_BIT_REG 0xA182 +#define WDT_SET_TIMER_L_BIT_REG 0xA183 +#define WDT_TIMER_H_BIT_REG 0xA184 +#define WDT_TIMER_M_BIT_REG 0xA185 +#define WDT_TIMER_L_BIT_REG 0xA186 +#define WDT_ENABLE_REG 0xA187 +#define WDT_FEED_REG 0xA188 +#define WDT_PUNCH_REG 0xA189 #define WDT_START_FEED 0x01 #define WDT_STOP_FEED 0x00 -#define POWER_CYCLE_RESET 0x00 + #define POWER_ON_RESET 0x11 #define SOFT_SET_WARM_RESET 0x22 #define SOFT_SET_COLD_RESET 0x33 #define CPU_WARM_RESET 0x44 -#define CPU_COLD_RESET 0x55 -#define CPU_GPIO_WARM_RESET 0x66 -#define WDT_RESET 0x77 -#define CPU_OVERLOAD_RESET 0x88 -#define INSUFFICIENT_FAN_SPEED_RESET 0xAA +#define WDT_RESET 0x66 #define MAX_TIMER_VALUE 0xffffff @@ -84,10 +80,10 @@ struct wdt_data { struct cpld_wdt_private { struct platform_device *pdev; - struct watchdog_device wddev; + struct watchdog_device wddev; struct cdev cdev; - struct miscdevice mdev; - bool suspended; + struct miscdevice mdev; + bool suspended; struct wdt_data wdat; }; @@ -271,10 +267,10 @@ static const struct watchdog_info ident = { static ssize_t identity_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct cpld_wdt_private *wdt = dev_get_drvdata(dev); + struct cpld_wdt_private *wdt = dev_get_drvdata(dev); if(!wdt) return -EINVAL; - return sprintf(buf, "%s\n", wdt->wdat.ident.identity); + return sprintf(buf, "%s\n", wdt->wdat.ident.identity); } static DEVICE_ATTR_RO(identity); @@ -283,12 +279,12 @@ static DEVICE_ATTR_RO(identity); static ssize_t state_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct cpld_wdt_private *wdt = dev_get_drvdata(dev); + struct cpld_wdt_private *wdt = dev_get_drvdata(dev); bool state = watchdog_is_running(wdt); if(true == state) return sprintf(buf, "active\n"); else - return sprintf(buf, "inactive\n"); + return sprintf(buf, "inactive\n"); } static DEVICE_ATTR_RO(state); @@ -309,11 +305,10 @@ static DEVICE_ATTR_RO(status); static ssize_t reason_show(struct device *dev, struct device_attribute *attr, char *buf) { - char bootstatus; + char bootstatus; struct cpld_wdt_private *wdt = dev_get_drvdata(dev); - if(!wdt) - return -EINVAL; - + if(!wdt) + return -EINVAL; bootstatus = watchdog_get_reason(wdt); return sprintf(buf, "0x%02x\n", bootstatus); @@ -344,7 +339,7 @@ static ssize_t timeout_show(struct device *dev, struct device_attribute *attr, unsigned int timeout; struct cpld_wdt_private *wdt = dev_get_drvdata(dev); if(!wdt) - return -EINVAL; + return -EINVAL; timeout = watchdog_get_timeout(wdt); @@ -371,7 +366,7 @@ static int watchdog_open(struct inode *inode, struct file *file) { struct cpld_wdt_private *wdt; - wdt = container_of(file->private_data, struct cpld_wdt_private, mdev); + wdt = container_of(file->private_data, struct cpld_wdt_private, mdev); /* If the watchdog is alive we don't need to start it again */ @@ -384,15 +379,13 @@ static int watchdog_open(struct inode *inode, struct file *file) __module_get(THIS_MODULE); wdt->wdat.expect_close = 0; - - return nonseekable_open(inode, file); } static int watchdog_release(struct inode *inode, struct file *file) { struct cpld_wdt_private *p; - p = container_of(file->private_data, struct cpld_wdt_private, mdev); + p = container_of(file->private_data, struct cpld_wdt_private, mdev); if(!p) return -EINVAL; @@ -523,8 +516,7 @@ static long watchdog_ioctl(struct file *file, unsigned int cmd, new_timeout = new_timeout*1000; if (watchdog_set_timeout(p, new_timeout)) return -EINVAL; - - val = watchdog_get_timeout(p); + val = watchdog_get_timeout(p); return put_user(val, uarg.i); case WDIOC_GETTIMEOUT: val = watchdog_get_timeout(p); @@ -578,15 +570,12 @@ static int cpld_wdt_probe(struct platform_device *pdev) p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL); if (!p) - return -ENOMEM; - - + return -ENOMEM; mutex_init(&(p->wdat.lock)); - - p->wdat.ident.options = WDIOC_SETTIMEOUT - | WDIOF_MAGICCLOSE - | WDIOF_KEEPALIVEPING - | WDIOC_GETTIMELEFT; + p->wdat.ident.options = WDIOC_SETTIMEOUT + | WDIOF_MAGICCLOSE + | WDIOF_KEEPALIVEPING + | WDIOC_GETTIMELEFT; snprintf(p->wdat.ident.identity, sizeof(p->wdat.ident.identity), "%s", DRV_NAME); @@ -597,13 +586,12 @@ static int cpld_wdt_probe(struct platform_device *pdev) pr_info("Watchdog CPLD Version:0x%02x\n", ver); - if (timeout) { - if (timeout <= 0 - || timeout > max_timeout) { + if (timeout) { + if (timeout <= 0 || timeout > max_timeout) { pr_err("starting timeout out of range\n"); err = -EINVAL; return err; - } + } //watchdog_start(p); @@ -617,68 +605,48 @@ static int cpld_wdt_probe(struct platform_device *pdev) if (nowayout) __module_get(THIS_MODULE); - pr_info("watchdog started with initial timeout of %u Second(s)\n", - timeout/1000); - } + pr_info("watchdog started with initial timeout of %u Second(s)\n", timeout/1000); + } err = watchdog_set_timeout(p, timeout); if (err) return err; - err = register_reboot_notifier(&watchdog_notifier); + err = register_reboot_notifier(&watchdog_notifier); if (err) return err; - p->mdev = watchdog_miscdev; - err = misc_register(&p->mdev); + p->mdev = watchdog_miscdev; + err = misc_register(&p->mdev); if (err) { - pr_err("cannot register miscdev on minor=%d\n", - watchdog_miscdev.minor); - return err;; - } - - /*p->wdat.res = platform_get_resource(pdev, IORESOURCE_IO, WDT_CONTROL_BASE); - if (!p->wdat.res) - return -ENODEV; + pr_err("cannot register miscdev on minor=%d\n", watchdog_miscdev.minor); + return err; + } - if (!devm_request_region(dev, p->wdat.res->start, - resource_size(p->wdat.res), - pdev->name)) { - return -EBUSY; - } - */ err = sysfs_create_group(&pdev->dev.kobj, &wdt_group); - if (err) { - printk(KERN_ERR "Cannot create sysfs for cpld_wdt.\n"); - return err; - } + if (err) { + printk(KERN_ERR "Cannot create sysfs for cpld_wdt.\n"); + return err; + } - platform_set_drvdata(pdev, p); - dev_set_drvdata(dev, p); + platform_set_drvdata(pdev, p); + dev_set_drvdata(dev, p); - pr_info("initialized. sec (nowayout=%d)\n", - nowayout); + pr_info("initialized. sec (nowayout=%d)\n", + nowayout); return 0; } static int cpld_wdt_remove(struct platform_device *pdev) { - struct cpld_wdt_private *p = platform_get_drvdata(pdev); - /* - if (!nowayout) - watchdog_stop(&p->wddev); - */ - if(!p) - return 0; - + struct cpld_wdt_private *p = platform_get_drvdata(pdev); + + if (p) { sysfs_remove_group(&pdev->dev.kobj, &wdt_group); - misc_deregister(&p->mdev); - - unregister_reboot_notifier(&watchdog_notifier); - - return 0; - + unregister_reboot_notifier(&watchdog_notifier); + } + return 0; } static struct platform_driver cpld_wdt_driver = { @@ -722,14 +690,14 @@ static int __init cpld_wdt_init_module(void) pr_info("Platform Device/Driver Register Failed. err:%d\n", err); pr_info("CPLD WatchDog Timer Driver v%s\n", DRV_VERSION); - return err; + return err; } static void __exit cpld_wdt_cleanup_module(void) { - platform_driver_unregister(&cpld_wdt_driver); + platform_driver_unregister(&cpld_wdt_driver); platform_device_unregister(&cpld_wdt_dev); - pr_info("Watchdog Module Unloaded\n"); + pr_info("Watchdog Module Unloaded\n"); } module_init(cpld_wdt_init_module); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pmbus.h new file mode 100644 index 000000000000..cb6dbe29c0bf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pmbus.h @@ -0,0 +1,504 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * pmbus.h - Common defines and structures for PMBus devices + * + * Copyright (c) 2010, 2011 Ericsson AB. + * Copyright (c) 2012 Guenter Roeck + */ + +#ifndef PMBUS_H +#define PMBUS_H + +#include +#include + +/* + * Registers + */ +enum pmbus_regs { + PMBUS_PAGE = 0x00, + PMBUS_OPERATION = 0x01, + PMBUS_ON_OFF_CONFIG = 0x02, + PMBUS_CLEAR_FAULTS = 0x03, + PMBUS_PHASE = 0x04, + + PMBUS_WRITE_PROTECT = 0x10, + + PMBUS_CAPABILITY = 0x19, + PMBUS_QUERY = 0x1A, + + PMBUS_VOUT_MODE = 0x20, + PMBUS_VOUT_COMMAND = 0x21, + PMBUS_VOUT_TRIM = 0x22, + PMBUS_VOUT_CAL_OFFSET = 0x23, + PMBUS_VOUT_MAX = 0x24, + PMBUS_VOUT_MARGIN_HIGH = 0x25, + PMBUS_VOUT_MARGIN_LOW = 0x26, + PMBUS_VOUT_TRANSITION_RATE = 0x27, + PMBUS_VOUT_DROOP = 0x28, + PMBUS_VOUT_SCALE_LOOP = 0x29, + PMBUS_VOUT_SCALE_MONITOR = 0x2A, + + PMBUS_COEFFICIENTS = 0x30, + PMBUS_POUT_MAX = 0x31, + + PMBUS_FAN_CONFIG_12 = 0x3A, + PMBUS_FAN_COMMAND_1 = 0x3B, + PMBUS_FAN_COMMAND_2 = 0x3C, + PMBUS_FAN_CONFIG_34 = 0x3D, + PMBUS_FAN_COMMAND_3 = 0x3E, + PMBUS_FAN_COMMAND_4 = 0x3F, + + PMBUS_VOUT_OV_FAULT_LIMIT = 0x40, + PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41, + PMBUS_VOUT_OV_WARN_LIMIT = 0x42, + PMBUS_VOUT_UV_WARN_LIMIT = 0x43, + PMBUS_VOUT_UV_FAULT_LIMIT = 0x44, + PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45, + PMBUS_IOUT_OC_FAULT_LIMIT = 0x46, + PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47, + PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48, + PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49, + PMBUS_IOUT_OC_WARN_LIMIT = 0x4A, + PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B, + PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C, + + PMBUS_OT_FAULT_LIMIT = 0x4F, + PMBUS_OT_FAULT_RESPONSE = 0x50, + PMBUS_OT_WARN_LIMIT = 0x51, + PMBUS_UT_WARN_LIMIT = 0x52, + PMBUS_UT_FAULT_LIMIT = 0x53, + PMBUS_UT_FAULT_RESPONSE = 0x54, + PMBUS_VIN_OV_FAULT_LIMIT = 0x55, + PMBUS_VIN_OV_FAULT_RESPONSE = 0x56, + PMBUS_VIN_OV_WARN_LIMIT = 0x57, + PMBUS_VIN_UV_WARN_LIMIT = 0x58, + PMBUS_VIN_UV_FAULT_LIMIT = 0x59, + + PMBUS_IIN_OC_FAULT_LIMIT = 0x5B, + PMBUS_IIN_OC_WARN_LIMIT = 0x5D, + + PMBUS_POUT_OP_FAULT_LIMIT = 0x68, + PMBUS_POUT_OP_WARN_LIMIT = 0x6A, + PMBUS_PIN_OP_WARN_LIMIT = 0x6B, + + PMBUS_STATUS_BYTE = 0x78, + PMBUS_STATUS_WORD = 0x79, + PMBUS_STATUS_VOUT = 0x7A, + PMBUS_STATUS_IOUT = 0x7B, + PMBUS_STATUS_INPUT = 0x7C, + PMBUS_STATUS_TEMPERATURE = 0x7D, + PMBUS_STATUS_CML = 0x7E, + PMBUS_STATUS_OTHER = 0x7F, + PMBUS_STATUS_MFR_SPECIFIC = 0x80, + PMBUS_STATUS_FAN_12 = 0x81, + PMBUS_STATUS_FAN_34 = 0x82, + + PMBUS_READ_VIN = 0x88, + PMBUS_READ_IIN = 0x89, + PMBUS_READ_VCAP = 0x8A, + PMBUS_READ_VOUT = 0x8B, + PMBUS_READ_IOUT = 0x8C, + PMBUS_READ_TEMPERATURE_1 = 0x8D, + PMBUS_READ_TEMPERATURE_2 = 0x8E, + PMBUS_READ_TEMPERATURE_3 = 0x8F, + PMBUS_READ_FAN_SPEED_1 = 0x90, + PMBUS_READ_FAN_SPEED_2 = 0x91, + PMBUS_READ_FAN_SPEED_3 = 0x92, + PMBUS_READ_FAN_SPEED_4 = 0x93, + PMBUS_READ_DUTY_CYCLE = 0x94, + PMBUS_READ_FREQUENCY = 0x95, + PMBUS_READ_POUT = 0x96, + PMBUS_READ_PIN = 0x97, + + PMBUS_REVISION = 0x98, + PMBUS_MFR_ID = 0x99, + PMBUS_MFR_MODEL = 0x9A, + PMBUS_MFR_REVISION = 0x9B, + PMBUS_MFR_LOCATION = 0x9C, + PMBUS_MFR_DATE = 0x9D, + PMBUS_MFR_SERIAL = 0x9E, + + PMBUS_MFR_VIN_MIN = 0xA0, + PMBUS_MFR_VIN_MAX = 0xA1, + PMBUS_MFR_IIN_MAX = 0xA2, + PMBUS_MFR_PIN_MAX = 0xA3, + PMBUS_MFR_VOUT_MIN = 0xA4, + PMBUS_MFR_VOUT_MAX = 0xA5, + PMBUS_MFR_IOUT_MAX = 0xA6, + PMBUS_MFR_POUT_MAX = 0xA7, + + PMBUS_IC_DEVICE_ID = 0xAD, + PMBUS_IC_DEVICE_REV = 0xAE, + + PMBUS_MFR_MAX_TEMP_1 = 0xC0, + PMBUS_MFR_MAX_TEMP_2 = 0xC1, + PMBUS_MFR_MAX_TEMP_3 = 0xC2, + +/* + * Virtual registers. + * Useful to support attributes which are not supported by standard PMBus + * registers but exist as manufacturer specific registers on individual chips. + * Must be mapped to real registers in device specific code. + * + * Semantics: + * Virtual registers are all word size. + * READ registers are read-only; writes are either ignored or return an error. + * RESET registers are read/write. Reading reset registers returns zero + * (used for detection), writing any value causes the associated history to be + * reset. + * Virtual registers have to be handled in device specific driver code. Chip + * driver code returns non-negative register values if a virtual register is + * supported, or a negative error code if not. The chip driver may return + * -ENODATA or any other error code in this case, though an error code other + * than -ENODATA is handled more efficiently and thus preferred. Either case, + * the calling PMBus core code will abort if the chip driver returns an error + * code when reading or writing virtual registers. + */ + PMBUS_VIRT_BASE = 0x100, + PMBUS_VIRT_READ_TEMP_AVG, + PMBUS_VIRT_READ_TEMP_MIN, + PMBUS_VIRT_READ_TEMP_MAX, + PMBUS_VIRT_RESET_TEMP_HISTORY, + PMBUS_VIRT_READ_VIN_AVG, + PMBUS_VIRT_READ_VIN_MIN, + PMBUS_VIRT_READ_VIN_MAX, + PMBUS_VIRT_RESET_VIN_HISTORY, + PMBUS_VIRT_READ_IIN_AVG, + PMBUS_VIRT_READ_IIN_MIN, + PMBUS_VIRT_READ_IIN_MAX, + PMBUS_VIRT_RESET_IIN_HISTORY, + PMBUS_VIRT_READ_PIN_AVG, + PMBUS_VIRT_READ_PIN_MIN, + PMBUS_VIRT_READ_PIN_MAX, + PMBUS_VIRT_RESET_PIN_HISTORY, + PMBUS_VIRT_READ_POUT_AVG, + PMBUS_VIRT_READ_POUT_MIN, + PMBUS_VIRT_READ_POUT_MAX, + PMBUS_VIRT_RESET_POUT_HISTORY, + PMBUS_VIRT_READ_VOUT_AVG, + PMBUS_VIRT_READ_VOUT_MIN, + PMBUS_VIRT_READ_VOUT_MAX, + PMBUS_VIRT_RESET_VOUT_HISTORY, + PMBUS_VIRT_READ_IOUT_AVG, + PMBUS_VIRT_READ_IOUT_MIN, + PMBUS_VIRT_READ_IOUT_MAX, + PMBUS_VIRT_RESET_IOUT_HISTORY, + PMBUS_VIRT_READ_TEMP2_AVG, + PMBUS_VIRT_READ_TEMP2_MIN, + PMBUS_VIRT_READ_TEMP2_MAX, + PMBUS_VIRT_RESET_TEMP2_HISTORY, + + PMBUS_VIRT_READ_VMON, + PMBUS_VIRT_VMON_UV_WARN_LIMIT, + PMBUS_VIRT_VMON_OV_WARN_LIMIT, + PMBUS_VIRT_VMON_UV_FAULT_LIMIT, + PMBUS_VIRT_VMON_OV_FAULT_LIMIT, + PMBUS_VIRT_STATUS_VMON, + + /* + * RPM and PWM Fan control + * + * Drivers wanting to expose PWM control must define the behaviour of + * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the + * {read,write}_word_data callback. + * + * pmbus core provides a default implementation for + * PMBUS_VIRT_FAN_TARGET_[1-4]. + * + * TARGET, PWM and PWM_ENABLE members must be defined sequentially; + * pmbus core uses the difference between the provided register and + * it's _1 counterpart to calculate the FAN/PWM ID. + */ + PMBUS_VIRT_FAN_TARGET_1, + PMBUS_VIRT_FAN_TARGET_2, + PMBUS_VIRT_FAN_TARGET_3, + PMBUS_VIRT_FAN_TARGET_4, + PMBUS_VIRT_PWM_1, + PMBUS_VIRT_PWM_2, + PMBUS_VIRT_PWM_3, + PMBUS_VIRT_PWM_4, + PMBUS_VIRT_PWM_ENABLE_1, + PMBUS_VIRT_PWM_ENABLE_2, + PMBUS_VIRT_PWM_ENABLE_3, + PMBUS_VIRT_PWM_ENABLE_4, + + /* Samples for average + * + * Drivers wanting to expose functionality for changing the number of + * samples used for average values should implement support in + * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it + * applies to all types of measurements, or any number of specific + * PMBUS_VIRT_*_SAMPLES registers to allow for individual control. + */ + PMBUS_VIRT_SAMPLES, + PMBUS_VIRT_IN_SAMPLES, + PMBUS_VIRT_CURR_SAMPLES, + PMBUS_VIRT_POWER_SAMPLES, + PMBUS_VIRT_TEMP_SAMPLES, +}; + +/* + * OPERATION + */ +#define PB_OPERATION_CONTROL_ON BIT(7) + +/* + * WRITE_PROTECT + */ +#define PB_WP_ALL BIT(7) /* all but WRITE_PROTECT */ +#define PB_WP_OP BIT(6) /* all but WP, OPERATION, PAGE */ +#define PB_WP_VOUT BIT(5) /* all but WP, OPERATION, PAGE, VOUT, ON_OFF */ + +#define PB_WP_ANY (PB_WP_ALL | PB_WP_OP | PB_WP_VOUT) + +/* + * CAPABILITY + */ +#define PB_CAPABILITY_SMBALERT BIT(4) +#define PB_CAPABILITY_ERROR_CHECK BIT(7) + +/* + * VOUT_MODE + */ +#define PB_VOUT_MODE_MODE_MASK 0xe0 +#define PB_VOUT_MODE_PARAM_MASK 0x1f + +#define PB_VOUT_MODE_LINEAR 0x00 +#define PB_VOUT_MODE_VID 0x20 +#define PB_VOUT_MODE_DIRECT 0x40 + +/* + * Fan configuration + */ +#define PB_FAN_2_PULSE_MASK (BIT(0) | BIT(1)) +#define PB_FAN_2_RPM BIT(2) +#define PB_FAN_2_INSTALLED BIT(3) +#define PB_FAN_1_PULSE_MASK (BIT(4) | BIT(5)) +#define PB_FAN_1_RPM BIT(6) +#define PB_FAN_1_INSTALLED BIT(7) + +enum pmbus_fan_mode { percent = 0, rpm }; + +/* + * STATUS_BYTE, STATUS_WORD (lower) + */ +#define PB_STATUS_NONE_ABOVE BIT(0) +#define PB_STATUS_CML BIT(1) +#define PB_STATUS_TEMPERATURE BIT(2) +#define PB_STATUS_VIN_UV BIT(3) +#define PB_STATUS_IOUT_OC BIT(4) +#define PB_STATUS_VOUT_OV BIT(5) +#define PB_STATUS_OFF BIT(6) +#define PB_STATUS_BUSY BIT(7) + +/* + * STATUS_WORD (upper) + */ +#define PB_STATUS_UNKNOWN BIT(8) +#define PB_STATUS_OTHER BIT(9) +#define PB_STATUS_FANS BIT(10) +#define PB_STATUS_POWER_GOOD_N BIT(11) +#define PB_STATUS_WORD_MFR BIT(12) +#define PB_STATUS_INPUT BIT(13) +#define PB_STATUS_IOUT_POUT BIT(14) +#define PB_STATUS_VOUT BIT(15) + +/* + * STATUS_IOUT + */ +#define PB_POUT_OP_WARNING BIT(0) +#define PB_POUT_OP_FAULT BIT(1) +#define PB_POWER_LIMITING BIT(2) +#define PB_CURRENT_SHARE_FAULT BIT(3) +#define PB_IOUT_UC_FAULT BIT(4) +#define PB_IOUT_OC_WARNING BIT(5) +#define PB_IOUT_OC_LV_FAULT BIT(6) +#define PB_IOUT_OC_FAULT BIT(7) + +/* + * STATUS_VOUT, STATUS_INPUT + */ +#define PB_VOLTAGE_VIN_OFF BIT(3) +#define PB_VOLTAGE_UV_FAULT BIT(4) +#define PB_VOLTAGE_UV_WARNING BIT(5) +#define PB_VOLTAGE_OV_WARNING BIT(6) +#define PB_VOLTAGE_OV_FAULT BIT(7) + +/* + * STATUS_INPUT + */ +#define PB_PIN_OP_WARNING BIT(0) +#define PB_IIN_OC_WARNING BIT(1) +#define PB_IIN_OC_FAULT BIT(2) + +/* + * STATUS_TEMPERATURE + */ +#define PB_TEMP_UT_FAULT BIT(4) +#define PB_TEMP_UT_WARNING BIT(5) +#define PB_TEMP_OT_WARNING BIT(6) +#define PB_TEMP_OT_FAULT BIT(7) + +/* + * STATUS_FAN + */ +#define PB_FAN_AIRFLOW_WARNING BIT(0) +#define PB_FAN_AIRFLOW_FAULT BIT(1) +#define PB_FAN_FAN2_SPEED_OVERRIDE BIT(2) +#define PB_FAN_FAN1_SPEED_OVERRIDE BIT(3) +#define PB_FAN_FAN2_WARNING BIT(4) +#define PB_FAN_FAN1_WARNING BIT(5) +#define PB_FAN_FAN2_FAULT BIT(6) +#define PB_FAN_FAN1_FAULT BIT(7) + +/* + * CML_FAULT_STATUS + */ +#define PB_CML_FAULT_OTHER_MEM_LOGIC BIT(0) +#define PB_CML_FAULT_OTHER_COMM BIT(1) +#define PB_CML_FAULT_PROCESSOR BIT(3) +#define PB_CML_FAULT_MEMORY BIT(4) +#define PB_CML_FAULT_PACKET_ERROR BIT(5) +#define PB_CML_FAULT_INVALID_DATA BIT(6) +#define PB_CML_FAULT_INVALID_COMMAND BIT(7) + +enum pmbus_sensor_classes { + PSC_VOLTAGE_IN = 0, + PSC_VOLTAGE_OUT, + PSC_CURRENT_IN, + PSC_CURRENT_OUT, + PSC_POWER, + PSC_TEMPERATURE, + PSC_FAN, + PSC_PWM, + PSC_NUM_CLASSES /* Number of power sensor classes */ +}; + +#define PMBUS_PAGES 32 /* Per PMBus specification */ +#define PMBUS_PHASES 10 /* Maximum number of phases per page */ + +/* Functionality bit mask */ +#define PMBUS_HAVE_VIN BIT(0) +#define PMBUS_HAVE_VCAP BIT(1) +#define PMBUS_HAVE_VOUT BIT(2) +#define PMBUS_HAVE_IIN BIT(3) +#define PMBUS_HAVE_IOUT BIT(4) +#define PMBUS_HAVE_PIN BIT(5) +#define PMBUS_HAVE_POUT BIT(6) +#define PMBUS_HAVE_FAN12 BIT(7) +#define PMBUS_HAVE_FAN34 BIT(8) +#define PMBUS_HAVE_TEMP BIT(9) +#define PMBUS_HAVE_TEMP2 BIT(10) +#define PMBUS_HAVE_TEMP3 BIT(11) +#define PMBUS_HAVE_STATUS_VOUT BIT(12) +#define PMBUS_HAVE_STATUS_IOUT BIT(13) +#define PMBUS_HAVE_STATUS_INPUT BIT(14) +#define PMBUS_HAVE_STATUS_TEMP BIT(15) +#define PMBUS_HAVE_STATUS_FAN12 BIT(16) +#define PMBUS_HAVE_STATUS_FAN34 BIT(17) +#define PMBUS_HAVE_VMON BIT(18) +#define PMBUS_HAVE_STATUS_VMON BIT(19) +#define PMBUS_HAVE_PWM12 BIT(20) +#define PMBUS_HAVE_PWM34 BIT(21) +#define PMBUS_HAVE_SAMPLES BIT(22) + +#define PMBUS_PHASE_VIRTUAL BIT(30) /* Phases on this page are virtual */ +#define PMBUS_PAGE_VIRTUAL BIT(31) /* Page is virtual */ + +enum pmbus_data_format { linear = 0, direct, vid }; +enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv }; + +struct pmbus_driver_info { + int pages; /* Total number of pages */ + u8 phases[PMBUS_PAGES]; /* Number of phases per page */ + enum pmbus_data_format format[PSC_NUM_CLASSES]; + enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */ + /* + * Support one set of coefficients for each sensor type + * Used for chips providing data in direct mode. + */ + int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ + int b[PSC_NUM_CLASSES]; /* offset */ + int R[PSC_NUM_CLASSES]; /* exponent */ + + u32 func[PMBUS_PAGES]; /* Functionality, per page */ + u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */ + /* + * The following functions map manufacturing specific register values + * to PMBus standard register values. Specify only if mapping is + * necessary. + * Functions return the register value (read) or zero (write) if + * successful. A return value of -ENODATA indicates that there is no + * manufacturer specific register, but that a standard PMBus register + * may exist. Any other negative return value indicates that the + * register does not exist, and that no attempt should be made to read + * the standard register. + */ + int (*read_byte_data)(struct i2c_client *client, int page, int reg); + int (*read_word_data)(struct i2c_client *client, int page, int phase, + int reg); + int (*write_word_data)(struct i2c_client *client, int page, int reg, + u16 word); + int (*write_byte)(struct i2c_client *client, int page, u8 value); + /* + * The identify function determines supported PMBus functionality. + * This function is only necessary if a chip driver supports multiple + * chips, and the chip functionality is not pre-determined. + */ + int (*identify)(struct i2c_client *client, + struct pmbus_driver_info *info); + + /* Regulator functionality, if supported by this chip driver. */ + int num_regulators; + const struct regulator_desc *reg_desc; + + /* custom attributes */ + const struct attribute_group **groups; +}; + +/* Regulator ops */ + +extern const struct regulator_ops pmbus_regulator_ops; + +/* Macro for filling in array of struct regulator_desc */ +#define PMBUS_REGULATOR(_name, _id) \ + [_id] = { \ + .name = (_name # _id), \ + .id = (_id), \ + .of_match = of_match_ptr(_name # _id), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &pmbus_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +/* Function declarations */ + +void pmbus_clear_cache(struct i2c_client *client); +int pmbus_set_page(struct i2c_client *client, int page, int phase); +int pmbus_read_word_data(struct i2c_client *client, int page, int phase, + u8 reg); +int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg, + u16 word); +int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); +int pmbus_write_byte(struct i2c_client *client, int page, u8 value); +int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, + u8 value); +int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg, + u8 mask, u8 value); +void pmbus_clear_faults(struct i2c_client *client); +bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); +bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); +int pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info); +const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client + *client); +int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode); +int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode); +int pmbus_update_fan(struct i2c_client *client, int page, int id, + u8 config, u8 mask, u16 command); +struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client); + +#endif /* PMBUS_H */ diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.c new file mode 100644 index 000000000000..338417125569 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.c @@ -0,0 +1,478 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description of various APIs related to PSU component + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h" +#include "pddf_psu_driver.h" + + +#define PSU_REG_VOUT_MODE 0x20 +#define PSU_REG_READ_VOUT 0x8b + +/*#define PSU_DEBUG*/ +#ifdef PSU_DEBUG +#define psu_dbg(...) printk(__VA_ARGS__) +#else +#define psu_dbg(...) +#endif + + +void get_psu_duplicate_sysfs(int idx, char *str) +{ + switch (idx) + { + case PSU_V_OUT: + strscpy(str, "in3_input", ATTR_NAME_LEN); + break; + case PSU_I_OUT: + strscpy(str, "curr2_input", ATTR_NAME_LEN); + break; + case PSU_P_OUT: + strscpy(str, "power2_input", ATTR_NAME_LEN); + break; + case PSU_FAN1_SPEED: + strscpy(str, "fan1_input", ATTR_NAME_LEN); + break; + case PSU_TEMP1_INPUT: + strscpy(str, "temp1_input", ATTR_NAME_LEN); + break; + default: + break; + } + + return; +} + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static u8 psu_get_vout_mode(struct i2c_client *client) +{ + u8 status = 0, retry = 10; + uint8_t offset = PSU_REG_VOUT_MODE; + + while (retry) + { + status = i2c_smbus_read_byte_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) + { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + printk(KERN_ERR "%s: Get PSU Vout mode failed\n", __func__); + return 0; + } + else + { + /*printk(KERN_ERR "%s: vout_mode reg value 0x%x\n", __func__, status);*/ + return status; + } +} + +static u16 psu_get_v_out(struct i2c_client *client) +{ + u16 status = 0, retry = 10; + uint8_t offset = PSU_REG_READ_VOUT; + + while (retry) { + status = i2c_smbus_read_word_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + printk(KERN_ERR "%s: Get PSU Vout failed\n", __func__); + return 0; + } + else + { + /*printk(KERN_ERR "%s: vout reg value 0x%x\n", __func__, status);*/ + return status; + } +} + +int psu_update_hw(struct device *dev, struct psu_attr_info *info, PSU_DATA_ATTR *udata) +{ + int status = 0; + struct i2c_client *client = to_i2c_client(dev); + PSU_SYSFS_ATTR_DATA *sysfs_attr_data = NULL; + + + mutex_lock(&info->update_lock); + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_set != NULL) + { + status = (sysfs_attr_data->pre_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: pre_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + if (sysfs_attr_data->do_set != NULL) + { + status = (sysfs_attr_data->do_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: do_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + + } + if (sysfs_attr_data->post_set != NULL) + { + status = (sysfs_attr_data->post_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: post_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + + mutex_unlock(&info->update_lock); + + return 0; +} + + +int psu_update_attr(struct device *dev, struct psu_attr_info *data, PSU_DATA_ATTR *udata) +{ + int status = 0; + struct i2c_client *client = to_i2c_client(dev); + PSU_SYSFS_ATTR_DATA *sysfs_attr_data=NULL; + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || !data->valid) + { + dev_dbg(&client->dev, "Starting update for %s\n", data->name); + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_get != NULL) + { + status = (sysfs_attr_data->pre_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: pre_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + if (sysfs_attr_data->do_get != NULL) + { + status = (sysfs_attr_data->do_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: do_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + + } + if (sysfs_attr_data->post_get != NULL) + { + status = (sysfs_attr_data->post_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: post_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + return 0; +} + +ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data); + PSU_DATA_ATTR *usr_data = NULL; + struct psu_attr_info *sysfs_attr_info = NULL; + int i, status=0; + u16 value = 0; + u8 vout_mode = 0; + int exponent, mantissa; + int multiplier = 1000; + char new_str[ATTR_NAME_LEN] = ""; + PSU_SYSFS_ATTR_DATA *ptr = NULL; + + for (i=0;inum_attr;i++) + { + ptr = (PSU_SYSFS_ATTR_DATA *)pdata->psu_attrs[i].access_data; + get_psu_duplicate_sysfs(ptr->index , new_str); + if ( strcmp(attr->dev_attr.attr.name, pdata->psu_attrs[i].aname) == 0 || strcmp(attr->dev_attr.attr.name, new_str) == 0 ) + { + sysfs_attr_info = &data->attr_info[i]; + usr_data = &pdata->psu_attrs[i]; + strscpy(new_str, "", ATTR_NAME_LEN); + } + } + + if (sysfs_attr_info==NULL || usr_data==NULL) + { + printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name); + goto exit; + } + + psu_update_attr(dev, sysfs_attr_info, usr_data); + + switch(attr->index) + { + case PSU_PRESENT: + case PSU_POWER_GOOD: + status = sysfs_attr_info->val.intval; + return sprintf(buf, "%d\n", status); + break; + case PSU_MODEL_NAME: + case PSU_MFR_ID: + case PSU_SERIAL_NUM: + case PSU_FAN_DIR: + return sprintf(buf, "%s\n", sysfs_attr_info->val.strval); + break; + case PSU_V_OUT: + value = psu_get_v_out(client); + vout_mode = psu_get_vout_mode(client); + if ((vout_mode >> 5) == 0) + exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f); + else + exponent = 0; + + mantissa = value; + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + + case PSU_V_OUT_MIN: + case PSU_V_OUT_MAX: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + vout_mode = psu_get_vout_mode(client); + if ((vout_mode >> 5) == 0) + exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f); + else + exponent = 0; + mantissa = two_complement_to_int(value & 0xffff, 16, 0xffff); + + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + case PSU_I_OUT: + case PSU_V_IN: + case PSU_I_IN: + case PSU_P_OUT_MAX: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + case PSU_P_IN: + case PSU_P_OUT: + multiplier = 1000000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + + break; + case PSU_FAN1_SPEED: + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent)); + else + return sprintf(buf, "%d\n", (mantissa) / (1 << -exponent)); + + break; + case PSU_TEMP1_INPUT: + case PSU_TEMP1_HIGH_THRESHOLD: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + + break; + default: + printk(KERN_ERR "%s: Unable to find attribute index for %s\n", __FUNCTION__, usr_data->aname); + goto exit; + } + +exit: + return sprintf(buf, "%d\n", status); +} + + +ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data); + PSU_DATA_ATTR *usr_data = NULL; + struct psu_attr_info *sysfs_attr_info = NULL; + int i; + + for (i=0;inum_attr;i++) + { + if (strcmp(data->attr_info[i].name, attr->dev_attr.attr.name) == 0 && strcmp(pdata->psu_attrs[i].aname, attr->dev_attr.attr.name) == 0) + { + sysfs_attr_info = &data->attr_info[i]; + usr_data = &pdata->psu_attrs[i]; + } + } + + if (sysfs_attr_info==NULL || usr_data==NULL) { + printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name); + goto exit; + } + + switch(attr->index) + { + /*No write attributes for now in PSU*/ + default: + goto exit; + } + + psu_update_hw(dev, sysfs_attr_info, usr_data); + +exit: + return count; +} + +extern int board_i2c_cpld_read_new(unsigned short cpld_addr, char *name, u8 reg); +int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + int status = 0; + int val = 0; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + + + if (strncmp(adata->devtype, "cpld", strlen("cpld")) == 0) + { + val = board_i2c_cpld_read_new(adata->devaddr, adata->devname, adata->offset); + if (val < 0){ + return val; + } + padata->val.intval = ((val & adata->mask) == adata->cmpval); + psu_dbg(KERN_ERR "%s: byte_value = 0x%x\n", __FUNCTION__, padata->val.intval); + } + + return status; +} + +int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + int status = 0, retry = 10; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + char buf[32]=""; //temporary placeholder for block data + uint8_t offset = (uint8_t)adata->offset; + int data_len = adata->len; + + while (retry) + { + status = i2c_smbus_read_i2c_block_data((struct i2c_client *)client, offset, data_len-1, buf); + if (unlikely(status<0)) + { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + buf[0] = '\0'; + dev_dbg(&((struct i2c_client *)client)->dev, "unable to read block of data from (0x%x)\n", ((struct i2c_client *)client)->addr); + } + else + { + buf[data_len-1] = '\0'; + } + + if (strncmp(adata->devtype, "pmbus", strlen("pmbus")) == 0) + strscpy(padata->val.strval, buf+1, data_len-1); + else + strscpy(padata->val.strval, buf, data_len); + + psu_dbg(KERN_ERR "%s: status = %d, buf block: %s\n", __FUNCTION__, status, padata->val.strval); + return 0; +} + +int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + + int status = 0, retry = 10; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + uint8_t offset = (uint8_t)adata->offset; + + while (retry) { + status = i2c_smbus_read_word_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + padata->val.shortval = 0; + dev_dbg(&((struct i2c_client *)client)->dev, "unable to read a word from (0x%x)\n", ((struct i2c_client *)client)->addr); + } + else + { + padata->val.shortval = status; + } + + psu_dbg(KERN_ERR "%s: word value : %d\n", __FUNCTION__, padata->val.shortval); + return 0; +} diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.h new file mode 100644 index 000000000000..24e4ea02e7ec --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.h @@ -0,0 +1,31 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * PSU driver related api declarations + */ + +#ifndef __PDDF_PSU_API_H__ +#define __PDDF_PSU_API_H__ + +extern void get_psu_duplicate_sysfs(int idx, char *str); +extern ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf); +extern ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + +extern int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data); +extern int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data); +extern int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data); + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_defs.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_defs.h new file mode 100644 index 000000000000..60e81a9f5878 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_defs.h @@ -0,0 +1,90 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description: + * Platform PSU defines/structures header file + */ + +#ifndef __PDDF_PSU_DEFS_H__ +#define __PDDF_PSU_DEFS_H__ + + +#define MAX_NUM_PSU 5 +#define MAX_PSU_ATTRS 32 +#define ATTR_NAME_LEN 32 +#define STR_ATTR_SIZE 32 +#define DEV_TYPE_LEN 32 + +/* Each client has this additional data + */ + +typedef struct PSU_DATA_ATTR +{ + char aname[ATTR_NAME_LEN]; // attr name, taken from enum psu_sysfs_attributes + char devtype[DEV_TYPE_LEN]; // either a 'eeprom' or 'cpld', or 'pmbus' attribute + char devname[DEV_TYPE_LEN]; // Name of the device from where this sysfs attr is read + uint32_t devaddr; + uint32_t offset; + uint32_t mask; + uint32_t cmpval; + uint32_t len; + void *access_data; + +}PSU_DATA_ATTR; + +typedef struct PSU_SYSFS_ATTR_DATA +{ + int index; + unsigned short mode; + ssize_t (*show)(struct device *dev, struct device_attribute *da, char *buf); + int (*pre_get)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*do_get)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*post_get)(void *client, PSU_DATA_ATTR *adata, void *data); + ssize_t (*store)(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + int (*pre_set)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*do_set)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*post_set)(void *client, PSU_DATA_ATTR *adata, void *data); + void *data; +} PSU_SYSFS_ATTR_DATA; + +typedef struct PSU_SYSFS_ATTR_DATA_ENTRY +{ + char name[ATTR_NAME_LEN]; + PSU_SYSFS_ATTR_DATA *a_ptr; +} PSU_SYSFS_ATTR_DATA_ENTRY; + + +/* PSU CLIENT DATA - PLATFORM DATA FOR PSU CLIENT */ +typedef struct PSU_DATA +{ + int idx; // psu index + int num_psu_fans; + PSU_DATA_ATTR psu_attr; + int len; // no of valid attributes for this psu client + PSU_DATA_ATTR psu_attrs[MAX_PSU_ATTRS]; +}PSU_DATA; + +typedef struct PSU_PDATA +{ + int idx; // psu index + int num_psu_fans; // num of fans supported by the PSU + int len; // no of valid attributes for this psu client + PSU_DATA_ATTR *psu_attrs; +}PSU_PDATA; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.c new file mode 100644 index 000000000000..fa5d31a0866a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.c @@ -0,0 +1,398 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module driver for PSU + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_driver.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_api.h" + + +static unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +struct pddf_ops_t pddf_psu_ops = { + .pre_init = NULL, + .post_init = NULL, + + .pre_probe = NULL, + .post_probe = NULL, + + .pre_remove = NULL, + .post_remove = NULL, + + .pre_exit = NULL, + .post_exit = NULL, +}; +EXPORT_SYMBOL(pddf_psu_ops); + + +PSU_SYSFS_ATTR_DATA access_psu_present = {PSU_PRESENT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_present); + +PSU_SYSFS_ATTR_DATA access_psu_model_name = {PSU_MODEL_NAME, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_model_name); + +PSU_SYSFS_ATTR_DATA access_psu_power_good = {PSU_POWER_GOOD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_power_good); + +PSU_SYSFS_ATTR_DATA access_psu_mfr_id = {PSU_MFR_ID, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_mfr_id); + +PSU_SYSFS_ATTR_DATA access_psu_serial_num = {PSU_SERIAL_NUM, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_serial_num); + +PSU_SYSFS_ATTR_DATA access_psu_fan_dir = {PSU_FAN_DIR, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_fan_dir); + +PSU_SYSFS_ATTR_DATA access_psu_v_out = {PSU_V_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out); + +PSU_SYSFS_ATTR_DATA access_psu_v_out_min = {PSU_V_OUT_MIN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out_min); + +PSU_SYSFS_ATTR_DATA access_psu_v_out_max = {PSU_V_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out_max); + +PSU_SYSFS_ATTR_DATA access_psu_i_out = {PSU_I_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_i_out); + +PSU_SYSFS_ATTR_DATA access_psu_p_out = {PSU_P_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_out); + +PSU_SYSFS_ATTR_DATA access_psu_p_out_max = {PSU_P_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_out_max); + +PSU_SYSFS_ATTR_DATA access_psu_fan1_speed_rpm = {PSU_FAN1_SPEED, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_fan1_speed_rpm); + +PSU_SYSFS_ATTR_DATA access_psu_temp1_input = {PSU_TEMP1_INPUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_temp1_input); + +PSU_SYSFS_ATTR_DATA access_psu_temp1_high_threshold = {PSU_TEMP1_HIGH_THRESHOLD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_temp1_high_threshold); + +PSU_SYSFS_ATTR_DATA access_psu_v_in = {PSU_V_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_in); + +PSU_SYSFS_ATTR_DATA access_psu_i_in = {PSU_I_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_i_in); + +PSU_SYSFS_ATTR_DATA access_psu_p_in = {PSU_P_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_in); + +PSU_SYSFS_ATTR_DATA_ENTRY psu_sysfs_attr_data_tbl[]= +{ + { "psu_present", &access_psu_present}, + { "psu_model_name", &access_psu_model_name}, + { "psu_power_good" , &access_psu_power_good}, + { "psu_mfr_id" , &access_psu_mfr_id}, + { "psu_serial_num" , &access_psu_serial_num}, + { "psu_fan_dir" , &access_psu_fan_dir}, + { "psu_v_out" , &access_psu_v_out}, + { "psu_v_out_min" , &access_psu_v_out_min}, + { "psu_v_out_max" , &access_psu_v_out_max}, + { "psu_i_out" , &access_psu_i_out}, + { "psu_p_out" , &access_psu_p_out}, + { "psu_p_out_max" , &access_psu_p_out_max}, + { "psu_fan1_speed_rpm" , &access_psu_fan1_speed_rpm}, + { "psu_temp1_input" , &access_psu_temp1_input}, + { "psu_temp1_high_threshold" , &access_psu_temp1_high_threshold}, + { "psu_v_in" , &access_psu_v_in}, + { "psu_i_in" , &access_psu_i_in}, + { "psu_p_in" , &access_psu_p_in} +}; + +void *get_psu_access_data(char *name) +{ + int i=0; + for(i=0; i<(sizeof(psu_sysfs_attr_data_tbl)/sizeof(psu_sysfs_attr_data_tbl[0])); i++) + { + if(strcmp(name, psu_sysfs_attr_data_tbl[i].name) ==0) + { + return &psu_sysfs_attr_data_tbl[i]; + } + } + return NULL; +} +EXPORT_SYMBOL(get_psu_access_data); + + +static int psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct psu_data *data; + int status =0; + int i,num, j=0; + PSU_PDATA *psu_platform_data; + PSU_DATA_ATTR *data_attr; + PSU_SYSFS_ATTR_DATA_ENTRY *sysfs_data_entry; + char new_str[ATTR_NAME_LEN] = ""; + + + if (client == NULL) { + printk("NULL Client.. \n"); + goto exit; + } + + if (pddf_psu_ops.pre_probe) + { + status = (pddf_psu_ops.pre_probe)(client, dev_id); + if (status != 0) + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + dev_info(&client->dev, "chip found\n"); + + /* Take control of the platform data */ + psu_platform_data = (PSU_PDATA *)(client->dev.platform_data); + num = psu_platform_data->len; + data->index = psu_platform_data->idx - 1; + data->num_psu_fans = psu_platform_data->num_psu_fans; + data->num_attr = num; + + + + /* Create and Add supported attr in the 'attributes' list */ + for (i=0; ipsu_attrs + i; + sysfs_data_entry = get_psu_access_data(data_attr->aname); + if (sysfs_data_entry == NULL) + { + printk(KERN_ERR "%s: Wrong attribute name provided by user '%s'\n", __FUNCTION__, data_attr->aname); + continue; + } + + dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL); + dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1]; + strscpy((char *)dy_ptr->dev_attr.attr.name, data_attr->aname, ATTR_NAME_LEN); + dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode; + dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show; + dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store; + dy_ptr->index = sysfs_data_entry->a_ptr->index; + + data->psu_attribute_list[i] = &dy_ptr->dev_attr.attr; + strscpy(data->attr_info[i].name, data_attr->aname, ATTR_NAME_LEN); + data->attr_info[i].valid = 0; + mutex_init(&data->attr_info[i].update_lock); + + /*Create a duplicate entry*/ + get_psu_duplicate_sysfs(dy_ptr->index, new_str); + if (strcmp(new_str,"")) + { + dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL); + dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1]; + strscpy((char *)dy_ptr->dev_attr.attr.name, new_str, ATTR_NAME_LEN); + dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode; + dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show; + dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store; + dy_ptr->index = sysfs_data_entry->a_ptr->index; + + data->psu_attribute_list[num+j] = &dy_ptr->dev_attr.attr; + j++; + strscpy(new_str,"", ATTR_NAME_LEN); + } + } + data->psu_attribute_list[i+j] = NULL; + data->psu_attribute_group.attrs = data->psu_attribute_list; + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &data->psu_attribute_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register_with_info(&client->dev, client->name, NULL, NULL, NULL); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + /* Add a support for post probe function */ + if (pddf_psu_ops.post_probe) + { + status = (pddf_psu_ops.post_probe)(client, dev_id); + if (status != 0) + goto exit_remove; + } + + return 0; + + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group); +exit_free: + /* Free all the allocated attributes */ + for (i=0;data->psu_attribute_list[i]!=NULL;i++) + { + struct sensor_device_attribute *ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i]; + kfree(ptr); + data->psu_attribute_list[i] = NULL; + pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__); + } + kfree(data); +exit: + return status; +} + +static void psu_remove(struct i2c_client *client) +{ + int i=0, ret = 0; + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *platdata = (PSU_PDATA *)client->dev.platform_data; // use dev_get_platdata() + PSU_DATA_ATTR *platdata_sub = platdata->psu_attrs; + struct sensor_device_attribute *ptr = NULL; + + if (pddf_psu_ops.pre_remove) + { + ret = (pddf_psu_ops.pre_remove)(client); + if (ret!=0) + printk(KERN_ERR "FAN pre_remove function failed\n"); + } + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group); + for (i=0; data->psu_attribute_list[i]!=NULL; i++) + { + ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i]; + kfree(ptr); + data->psu_attribute_list[i] = NULL; + } + pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__); + kfree(data); + if (platdata_sub) { + printk(KERN_DEBUG "%s: Freeing platform subdata\n", __FUNCTION__); + kfree(platdata_sub); + } + if (platdata) { + printk(KERN_DEBUG "%s: Freeing platform data\n", __FUNCTION__); + kfree(platdata); + } + + if (pddf_psu_ops.post_remove) + { + ret = (pddf_psu_ops.post_remove)(client); + if (ret!=0) + printk(KERN_ERR "FAN post_remove function failed\n"); + } +} + +enum psu_intf +{ + eeprom_intf, + smbus_intf +}; + +static const struct i2c_device_id psu_id[] = { + {"psu_eeprom", eeprom_intf}, + {"psu_pmbus", smbus_intf}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, psu_id); + +static struct i2c_driver psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "psu", + }, + .probe = psu_probe, + .remove = psu_remove, + .id_table = psu_id, + .address_list = normal_i2c, +}; + +int example_fun(void) +{ + pddf_dbg(PSU, KERN_ERR "CALLING FUN...\n"); + return 0; +} +EXPORT_SYMBOL(example_fun); + + +int psu_init(void) +{ + int status = 0; + + if (pddf_psu_ops.pre_init) + { + status = (pddf_psu_ops.pre_init)(); + if (status!=0) + return status; + } + + pddf_dbg(PSU, KERN_ERR "GENERIC_PSU_DRIVER.. init Invoked..\n"); + status = i2c_add_driver(&psu_driver); + if (status!=0) + return status; + + if (pddf_psu_ops.post_init) + { + status = (pddf_psu_ops.post_init)(); + if (status!=0) + return status; + } + + return status; +} +EXPORT_SYMBOL(psu_init); + +void psu_exit(void) +{ + pddf_dbg(PSU, "GENERIC_PSU_DRIVER.. exit\n"); + if (pddf_psu_ops.pre_exit) (pddf_psu_ops.pre_exit)(); + i2c_del_driver(&psu_driver); + if (pddf_psu_ops.post_exit) (pddf_psu_ops.post_exit)(); +} +EXPORT_SYMBOL(psu_exit); + +module_init(psu_init); +module_exit(psu_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("psu driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.h new file mode 100644 index 000000000000..a94cf7441dbc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.h @@ -0,0 +1,70 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * PSU driver data structures + */ +#ifndef __PDDF_PSU_DRIVER_H__ +#define __PDDF_PSU_DRIVER_H__ + +enum psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD, + PSU_MFR_ID, + PSU_SERIAL_NUM, + PSU_FAN_DIR, + PSU_V_OUT, + PSU_V_OUT_MIN, + PSU_V_OUT_MAX, + PSU_I_OUT, + PSU_P_OUT, /* This is in micro watts to comply with lm-sensors */ + PSU_P_OUT_MAX, + PSU_FAN1_SPEED, + PSU_TEMP1_INPUT, + PSU_TEMP1_HIGH_THRESHOLD, + PSU_V_IN, + PSU_I_IN, + PSU_P_IN, + PSU_ATTR_MAX +}; + + +/* Every client has psu_data which is divided into per attribute data */ +struct psu_attr_info { + char name[ATTR_NAME_LEN]; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status; + union { + char strval[STR_ATTR_SIZE]; + int intval; + u16 shortval; + u8 charval; + }val; +}; +struct psu_data { + struct device *hwmon_dev; + u8 index; + int num_psu_fans; + int num_attr; + struct attribute *psu_attribute_list[MAX_PSU_ATTRS]; + struct attribute_group psu_attribute_group; + struct psu_attr_info attr_info[MAX_PSU_ATTRS]; +}; + + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/tps536c7.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/tps536c7.c new file mode 100644 index 000000000000..3709503e621e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/tps536c7.c @@ -0,0 +1,133 @@ +/* + * Hardware monitoring driver for Texas Instruments TPS536C7 + * + * Copyright (c) 2017 Mellanox Technologies. All rights reserved. + * Copyright (c) 2017 Vadim Pasternak + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include "pmbus.h" + + +#define TPS536C7_PROT_VR12_5MV 0x01 /* VR12.0 mode, 5-mV DAC */ +#define TPS536C7_PROT_VR12_5_10MV 0x02 /* VR12.5 mode, 10-mV DAC */ +#define TPS536C7_PROT_VR13_10MV 0x04 /* VR13.0 mode, 10-mV DAC */ +#define TPS536C7_PROT_IMVP8_5MV 0x05 /* IMVP8 mode, 5-mV DAC */ +#define TPS536C7_PROT_VR13_5MV 0x07 /* VR13.0 mode, 5-mV DAC */ +#define TPS536C7_PAGE_NUM 1 + +static int tps536c7_identify(struct i2c_client *client, + struct pmbus_driver_info *info) +{ + u8 buf[I2C_SMBUS_BLOCK_MAX]; + int phases_a = 0, phases_b = 0; + int i, ret; + + + return 1; + + ret = i2c_smbus_read_block_data(client, PMBUS_IC_DEVICE_ID, buf); + if (ret < 0) + return ret; + + dev_err(&client->dev, "jjj device ID: %s\n", buf); + if (strncmp("TI\x53\x6C\x70", buf, 5)) { + dev_err(&client->dev, "Unexpected device ID: %s\n", buf); + return -ENODEV; + } + #if 0 + ret = i2c_smbus_read_block_data(client, TPS53676_USER_DATA_03, buf); + if (ret < 0) + return ret; + for (i = 0; i < 2 * TPS53676_MAX_PHASES; i += 2) { + if (buf[i + 1] & 0x80) { + if (buf[i] & 0x08) + phases_b++; + else + phases_a++; + } + } + + info->format[PSC_VOLTAGE_OUT] = linear; + info->pages = 1; + info->phases[0] = phases_a; + if (phases_b > 0) { + info->pages = 2; + info->phases[1] = phases_b; + } + #endif + + return 0; +} + +static struct pmbus_driver_info tps536c7_info = { + .pages = TPS536C7_PAGE_NUM, + .format[PSC_VOLTAGE_IN] = linear, + .format[PSC_VOLTAGE_OUT] = linear, + .format[PSC_TEMPERATURE] = linear, + .format[PSC_CURRENT_OUT] = linear, + .format[PSC_POWER] = linear, + .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | + PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | + PMBUS_HAVE_POUT, + .identify = tps536c7_identify, +}; + +static int tps536c7_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct pmbus_driver_info *info; + + info = devm_kzalloc(&client->dev, sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; + + memcpy(info, &tps536c7_info, sizeof(*info)); + + //return pmbus_do_probe(client, id, info); + return pmbus_do_probe(client, info); +} + +static const struct i2c_device_id tps536c7_id[] = { + {"tps536c7", 0}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, tps536c7_id); + +static const struct of_device_id tps536c7_of_match[] = { + {.compatible = "ti,tps536c7"}, + {} +}; +MODULE_DEVICE_TABLE(of, tps536c7_of_match); + +static struct i2c_driver tps536c7_driver = { + .driver = { + .name = "tps536c7", + .of_match_table = of_match_ptr(tps536c7_of_match), + }, + .probe = tps536c7_probe, + //.remove = pmbus_do_remove, + .id_table = tps536c7_id, +}; + +module_i2c_driver(tps536c7_driver); + +MODULE_AUTHOR("Vadim Pasternak "); +MODULE_DESCRIPTION("PMBus driver for Texas Instruments TPS536C7"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/setup.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/setup.py new file mode 100644 index 000000000000..34b109b5bbfd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/setup.py @@ -0,0 +1,27 @@ +import os +from setuptools import setup +os.listdir + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on Celestica Platforms based on PDDF', + license='Apache 2.0', + author='SONiC Team', + author_email='yajiang@celestica.com', + url='https://github.com/Azure/sonic-buildimage', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.9', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/__init__.py new file mode 100644 index 000000000000..21d9cd445e31 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal"] +from . import platform +from . import chassis diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/chassis.py new file mode 100644 index 000000000000..747b35aabd4c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/chassis.py @@ -0,0 +1,234 @@ +#!/usr/bin/env python +# @Company ：Celestica +# @Time : 2023/7/22 15:37 +# @Mail : yajiang@celestica.com +# @Author : jiang tao + +try: + import sys + import time + import syslog + import subprocess + import os + import re + import shutil + from . import helper + from . import component + from .watchdog import Watchdog + from sonic_platform_pddf_base.pddf_chassis import PddfChassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +BMC_EXIST = helper.APIHelper().get_bmc_status() + +REBOOT_CAUSE_PATH = "/sys/devices/platform/cpld_wdt/reason" +SET_SYS_STATUS_LED = "0x3A 0x39 0x02 0x00 {}" + +ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt" + + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + sfp_status_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + self.helper = helper.APIHelper() + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._watchdog = None + self._airflow_direction = None + + for port_idx in range(1, self.platform_inventory['num_ports'] + 1): + present = self.get_sfp(port_idx).get_presence() + self.sfp_status_dict[port_idx] = '1' if present else '0' + for index in range(self.platform_inventory['num_component']): + component_obj = component.Component(index) + self._component_list.append(component_obj) + + @staticmethod + def _getstatusoutput(cmd): + status = 0 + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = ret + if data[-1:] == '\n': + data = data[:-1] + + return status, data + + @staticmethod + def initizalize_system_led(): + return True + + def get_status_led(self): + return self.get_system_led("SYS_LED") + + def set_status_led(self, color): + if color == self.get_status_led(): + return False + + if BMC_EXIST: + sys_led_color_map = { + 'off': '00', + 'green': '01', + 'amber': '02', + 'amber_blink_1hz': '03', + 'amber_blink_4hz': '04', + 'green_blink_1hz': '05', + 'green_blink_4hz': '06', + 'alternate_blink_1hz': '07', + 'alternate_blink_4hz': '08' + } + color_val = sys_led_color_map.get(color.lower(), None) + if color_val is None: + print("SYS LED color %s not support!" % color) + return False + + status, _ = self.helper.ipmi_raw(SET_SYS_STATUS_LED.format(color_val)) + + return status + else: + result = self.set_system_led("SYS_LED", color) + return result + + def get_sfp(self, index): + """ + Retrieves sfp represented by (1-based) index + For Quanta the index in sfputil.py starts from 1, so override + Args: + index: An integer, the index (1-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 1. + Returns: + An object dervied from SfpBase representing the specified sfp + """ + sfp = None + + try: + if index == 0: + raise IndexError + sfp = self._sfp_list[index - 1] + except IndexError: + sys.stderr.write("override: SFP index {} out of range (1-{})\n".format( + index, len(self._sfp_list))) + + return sfp + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + REBOOT_CAUSE_POWER_LOSS = "Power Loss" + REBOOT_CAUSE_THERMAL_OVERLOAD_CPU = "Thermal Overload: CPU" + REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC = "Thermal Overload: ASIC" + REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER = "Thermal Overload: Other" + REBOOT_CAUSE_INSUFFICIENT_FAN_SPEED = "Insufficient Fan Speed" + REBOOT_CAUSE_WATCHDOG = "Watchdog" + REBOOT_CAUSE_HARDWARE_OTHER = "Hardware - Other" + REBOOT_CAUSE_NON_HARDWARE = "Non-Hardware" + """ + reboot_cause = self.helper.read_txt_file(REBOOT_CAUSE_PATH) or "Unknown" + + # This tmp copy is to retain the reboot-cause only for the current boot + if os.path.isfile(ORG_HW_REBOOT_CAUSE_FILE): + shutil.move(ORG_HW_REBOOT_CAUSE_FILE, TMP_HW_REBOOT_CAUSE_FILE) + + if reboot_cause == "0x33" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE): + with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file: + reboot_info = hw_cause_file.readline().rstrip('\n') + match = re.search(r'Reason:(.*),Time:(.*)', reboot_info) + if match is not None: + if match.group(1) == 'system': + return (self.REBOOT_CAUSE_NON_HARDWARE, 'System cold reboot') + + reboot_cause_description = { + '0x11': (self.REBOOT_CAUSE_POWER_LOSS, "Power on Reset"), + '0x22': (self.REBOOT_CAUSE_NON_HARDWARE, "Soft-set CPU warm reset"), + '0x33': (self.REBOOT_CAUSE_HARDWARE_OTHER, "CPU cold reset"), + '0x44': (self.REBOOT_CAUSE_NON_HARDWARE, "CPU warm reset"), + '0x66': (self.REBOOT_CAUSE_WATCHDOG, "Hardware Watchdog Reset"), + + } + prev_reboot_cause = reboot_cause_description.get(reboot_cause, + (self.REBOOT_CAUSE_NON_HARDWARE, "Unknown reason")) + return prev_reboot_cause + + def get_watchdog(self): + """ + Retreives hardware watchdog device on this chassis + + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + """ + try: + + if self._watchdog is None: + # Create the watchdog Instance + self._watchdog = Watchdog() + except Exception as E: + syslog.syslog(syslog.LOG_ERR, "Fail to load watchdog due to {}".format(E)) + return self._watchdog + + def get_change_event(self, timeout=0): + sfp_dict = {} + + sfp_removed = '0' + sfp_inserted = '1' + + sfp_present = True + sfp_absent = False + + start_time = time.time() + time_period = timeout / float(1000) # Convert msecs to secss + + while time.time() < (start_time + time_period) or timeout == 0: + for port_idx in range(1, self.platform_inventory['num_ports'] + 1): + if self.sfp_status_dict[port_idx] == sfp_removed and \ + self.get_sfp(port_idx).get_presence() == sfp_present: + sfp_dict[port_idx] = sfp_inserted + self.sfp_status_dict[port_idx] = sfp_inserted + elif self.sfp_status_dict[port_idx] == sfp_inserted and \ + self.get_sfp(port_idx).get_presence() == sfp_absent: + sfp_dict[port_idx] = sfp_removed + self.sfp_status_dict[port_idx] = sfp_removed + + if sfp_dict: + return True, {'sfp': sfp_dict} + + time.sleep(0.5) + + return True, {'sfp': {}} # Timeout + + def get_revision(self): + """ + Retrieves the hardware revision for the chassis + Returns: + A string containing the hardware revision for this chassis. + """ + return self._eeprom.get_revision() + + def get_airflow_direction(self): + if self._airflow_direction == None: + try: + vendor_extn = self._eeprom.get_vendor_extn() + airflow_type = vendor_extn.split()[2][2:4] # either 0xfb or 0xbf + if airflow_type == 'FB': + direction = 'exhaust' + elif airflow_type == 'BF': + direction = 'intake' + else: + direction = 'N/A' + except (AttributeError, IndexError): + direction = 'N/A' + + self._airflow_direction = direction + + return self._airflow_direction diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/component.py new file mode 100644 index 000000000000..3ce7e20fb0b1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/component.py @@ -0,0 +1,230 @@ +#!/usr/bin/env python +# @Company ：Celestica +# @Time : 2023/7/21 17:09 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +try: + from sonic_platform_base.component_base import ComponentBase + from . import helper + import re +except ImportError as e: + raise ImportError(str(e) + "- required module not found") +BMC_EXIST = helper.APIHelper().get_bmc_status() +FPGA_VERSION_PATH = "/sys/bus/platform/devices/fpga_sysfs/version" +Bios_Version_Cmd = "dmidecode -t bios | grep Version" +ONIE_Version_Cmd = "cat /host/machine.conf" +SSD_Version_Cmd = "smartctl -i /dev/sda" +ASIC_PCIE_VERSION_CMD = "bcmcmd 'pciephy fw version' | grep 'PCIe FW version' | cut -d ' ' -f 4" + +if BMC_EXIST: + Check_Bios_Boot = "ipmitool raw 0x3a 0x25 0x02" + Fan_CPLD_Cmd = "ipmitool raw 0x3a 0x64 02 01 00" + COME_CPLD_Cmd = "ipmitool raw 0x3a 0x3e 1 0x1a 1 0xe0" + Sys_Cpld_Cmd = "ipmitool raw 0x3a 0x64 0x00 0x01 0x00" + Sw_Cpld1_Cmd = "i2cget -y -f 108 0x30 0 | tr a-z A-Z | cut -d 'X' -f 2" + Sw_Cpld2_Cmd = "i2cget -y -f 108 0x31 0 | tr a-z A-Z | cut -d 'X' -f 2" + Main_BMC_Cmd = "0x32 0x8f 0x08 0x01" + Backup_BMC_Cmd = "0x32 0x8f 0x08 0x01" + + COMPONENT_NAME_LIST = ["BIOS", "ONIE", "BMC", "FPGA", "CPLD COMe", "CPLD BASE", + "CPLD SW1", "CPLD SW2", "CPLD FAN", "ASIC PCIe", "SSD"] + COMPONENT_DES_LIST = ["Basic Input/Output system", + "Open Network Install Environment", + "Baseboard Management Controller", + "FPGA for transceiver EEPROM access and other component I2C access", + "COMe board CPLD", + "CPLD for board functions and watchdog", + "CPLD for port control QSFP(1-16)", + "CPLD for port control QSFP(17-32) SFP(33-34)", + "CPLD for fan control and status", + "ASIC PCIe Firmware", + "Solid State Drive"] +else: + Check_Bios_Boot = "i2cget -y -f 100 0x0d 0x70 | tr a-z A-Z | cut -d 'X' -f 2" + Fan_CPLD_Cmd = "i2cget -y -f 107 0x0d 0x00 | tr a-z A-Z | cut -d 'X' -f 2" + COME_CPLD_Cmd = "i2cget -y -f 104 0x0d 0xe0 | tr a-z A-Z | cut -d 'X' -f 2" + Sys_Cpld_Cmd = "i2cget -y -f 100 0x0d 0x00 | tr a-z A-Z | cut -d 'X' -f 2" + Sw_Cpld1_Cmd = "i2cget -y -f 108 0x30 0x00 | tr a-z A-Z | cut -d 'X' -f 2" + Sw_Cpld2_Cmd = "i2cget -y -f 108 0x31 0x00 | tr a-z A-Z | cut -d 'X' -f 2" + + COMPONENT_NAME_LIST = ["BIOS", "ONIE", "BMC", "FPGA", "CPLD COMe", "CPLD BASE", + "CPLD SW1", "CPLD SW2", "CPLD FAN", "SSD"] + + COMPONENT_DES_LIST = ["Basic Input/Output system", + "Open Network Install Environment", + "Baseboard Management Controller", + "FPGA for transceiver EEPROM access and other component I2C access", + "COMe board CPLD", + "CPLD for board functions and watchdog", + "CPLD for port control QSFP(1-16)", + "CPLD for port control QSFP(17-32) SFP(33-34)", + "CPLD for fan control and status", + "Solid State Drive"] + + + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + ComponentBase.__init__(self) + self.index = component_index + self.helper = helper.APIHelper() + self.name = self.get_name() + + def __get_bios_version(self): + """ + Get Bios version by command 'dmidecode -t bios | grep Version' + return: Bios Version + """ + status, result = self.helper.run_command(Check_Bios_Boot) + bios_version = "N/A" + if not status: + print("Fail! Unable to get the current Main bios or backup bios!") + return bios_version + status_ver, version_str = self.helper.run_command(Bios_Version_Cmd) + if not status: + print("Fail! Unable to get the bios version!") + return bios_version + + bios_version = re.findall(r"Version:(.*)", version_str)[0] + if result.strip() == "01" and self.name == "BIOS": + return bios_version.strip() + + elif result.strip() == "03" and self.name == "BIOS": + return bios_version.strip() + else: + return "N/A" + + def __get_onie_version(self): + """ + Get ONIE Version" + """ + onie_version = "N/A" + status, raw_onie_data = self.helper.run_command(ONIE_Version_Cmd) + if status: + ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data) + if ret != None: + onie_version = ret.group(0) + return onie_version + + def __get_cpld_version(self): + """ + Get Come cpld/Fan cpld/Sys cpld/Switch 1 cpld/Switch 2 cpld version + """ + version = "N/A" + cpld_version_dict = { + "CPLD COMe": COME_CPLD_Cmd, + "CPLD FAN": Fan_CPLD_Cmd, + "CPLD SW1": Sw_Cpld1_Cmd, + "CPLD SW2": Sw_Cpld2_Cmd, + "CPLD BASE": Sys_Cpld_Cmd, + } + if self.name in cpld_version_dict.keys(): + version_cmd = cpld_version_dict[self.name] + status, ver = self.helper.run_command(version_cmd) + if not status: + print("Fail! Can't get %s version by command:%s" % (self.name, version_cmd)) + return version + version1 = int(ver.strip()) / 10 + version2 = int(ver.strip()) % 10 + version = "%d.%d" % (version1, version2) + return version + + def __get_fpga_version(self): + """ + Get fpga version by fpga version bus path. + """ + status, fpga_version = self.helper.run_command("cat %s" % FPGA_VERSION_PATH) + if not status: + return "N/A" + return fpga_version.replace("0x", "") + + def __get_bmc_version(self): + """ + Get main/backup bmc version + """ + version = "N/A" + cmd = Main_BMC_Cmd if self.name == "Main_BMC" else Backup_BMC_Cmd + status, result = self.helper.ipmi_raw(cmd) + if not status: + print("Fail! Can't get the %s version by command:%s" % (self.name, cmd)) + return version + str_1 = str(int(result.strip().split(" ")[0])) + str_2 = str(int(result.strip().split(" ")[1], 16)) + version = "%s.%s" % (str_1, str_2) + return version + + def __get_asic_pcie_ver(self): + status, raw_ver=self.helper.run_command(ASIC_PCIE_VERSION_CMD) + if status: + return raw_ver + else: + return "N/A" + + def __get_ssd_version(self): + ssd_version = "N/A" + status, raw_ssd_data = self.helper.run_command(SSD_Version_Cmd) + if status: + ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data) + if ret != None: + ssd_version = ret.group(1) + return ssd_version + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_NAME_LIST[self.index] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_DES_LIST[self.index] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if "BIOS" in self.name: + fw_version = self.__get_bios_version() + elif "ONIE" in self.name: + fw_version = self.__get_onie_version() + elif "CPLD" in self.name: + fw_version = self.__get_cpld_version() + elif self.name == "FPGA": + fw_version = self.__get_fpga_version() + elif "BMC" in self.name: + fw_version = self.__get_bmc_version() + elif self.name == "ASIC PCIe": + fw_version = self.__get_asic_pcie_ver() + elif "SSD" in self.name: + fw_version = self.__get_ssd_version() + return fw_version + + @staticmethod + def install_firmware(image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + return False + + @staticmethod + def update_firmware(image_path): + # Not support + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/eeprom.py new file mode 100644 index 000000000000..838328e321be --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/eeprom.py @@ -0,0 +1,78 @@ +try: + import os + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +EEPROM_TMP_FILE = '/tmp/eeprom_dump.bin' + +class Eeprom(PddfEeprom): + _TLV_DISPLAY_VENDOR_EXT = True + _TLV_INFO_MAX_LEN = 256 + pddf_obj = {} + plugin_data = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + if not pddf_data or not pddf_plugin_data: + raise ValueError('PDDF JSON data error') + + self.pddf_obj = pddf_data + self.plugin_data = pddf_plugin_data + + # system EEPROM always has device name EEPROM1 + self.eeprom_path = self.pddf_obj.get_path("EEPROM1", "eeprom") + if self.eeprom_path is None: + return + + super(PddfEeprom, self).__init__(self.eeprom_path, 0, '', True) + self.eeprom_tlv_dict = dict() + try: + if os.path.exists(EEPROM_TMP_FILE): + with open(EEPROM_TMP_FILE, 'rb') as b_fd: + self.eeprom_data = bytearray(b_fd.read()) + else: + self.eeprom_data = self.read_eeprom() + with open(EEPROM_TMP_FILE, 'wb') as b_fd: + b_fd.write(self.eeprom_data) + os.chmod(EEPROM_TMP_FILE, 0o444) + except Exception as E: + self.eeprom_data = "N/A" + raise RuntimeError("PddfEeprom is not Programmed - Error: {}".format(str(E))) + else: + eeprom = self.eeprom_data + + if not self.is_valid_tlvinfo_header(eeprom): + return + + total_length = ((eeprom[9]) << 8) | (eeprom[10]) + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < self._TLV_INFO_MAX_LEN and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + (eeprom[tlv_index + 1])] + code = "0x%02X" % tlv[0] + + if (tlv[0]) == self._TLV_CODE_VENDOR_EXT: + name = "Vendor Extension" + value = "" + if self._TLV_DISPLAY_VENDOR_EXT: + for c in tlv[2:2 + tlv[1]]: + value += "0x%02X " % c + else: + name, value = self.decoder(None, tlv) + + self.eeprom_tlv_dict[code] = value + if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32: + break + + tlv_index += (eeprom[tlv_index + 1]) + 2 + + def get_revision(self): + return self.eeprom_tlv_dict.get('0x26', 'N/A') + + def get_vendor_extn(self): + return self.eeprom_tlv_dict.get('0xFD', 'N/A') diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan.py new file mode 100644 index 000000000000..ad90dfdf7b20 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan.py @@ -0,0 +1,93 @@ +#!/usr/bin/env python +# @Company ：Celestica +# @Time : 2023/7/21 16:36 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan + from . import helper + import re +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +BMC_EXIST = helper.APIHelper().get_bmc_status() +Fan_Direction_Cmd = "0x3a 0x62 {}" +SET_FAN_STATUS_LED_CMD = "0x3A 0x39 0x02 {} {}" + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + self.helper = helper.APIHelper() + + def get_presence(self): + """ + Retrieves the presence of fan + """ + return super().get_presence() + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + return 15 if "PSU" in self.get_name() else 25 + + def is_under_speed(self): + speed = float(self.get_speed()) + target_speed = float(self.get_target_speed()) + speed_tolerance = self.get_speed_tolerance() + + speed_min_th = target_speed * (1 - float(speed_tolerance) / 100) + if speed < speed_min_th: + return True + else: + return False + + def is_over_speed(self): + speed = float(self.get_speed()) + target_speed = float(self.get_target_speed()) + speed_tolerance = self.get_speed_tolerance() + + speed_max_th = target_speed * (1 + float(speed_tolerance) / 100) + if speed > speed_max_th: + return True + else: + return False + + def set_status_led(self,color): + if self.is_psu_fan: + return super().set_status_led(color) + + if color == self.get_status_led(): + return False + + if BMC_EXIST: + fan_led_color_map = { + 'off': '00', + 'green': '01', + 'amber': '02', + 'red': '02' + } + + fan_index_val = hex(self.fantray_index + 3) + + color_val = fan_led_color_map.get(color.lower(), None) + + if fan_index_val is None: + return False + + if color_val is None: + return False + + status, _ = self.helper.ipmi_raw(SET_FAN_STATUS_LED_CMD.format(fan_index_val,color_val)) + + return status + else: + return self.set_system_led("SYS_LED", color) diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..babf6580ae3b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan_drawer.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python +# @Company ：Celestica +# @Time : 2023/2/18 15:45 +# @Mail : yajiang@celestica.com +# @Author : jiang tao + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/helper.py new file mode 100644 index 000000000000..94783ed18ac5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/helper.py @@ -0,0 +1,143 @@ +#!/usr/bin/env python +# @Company ：Celestica +# @Time : 2023/2/28 plugins:10 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +import os +import json +import struct +import subprocess +from sonic_py_common import device_info +from mmap import * + +HOST_CHK_CMD = "docker > /dev/null 2>&1" +EMPTY_STRING = "" + + +class APIHelper(object): + + def __init__(self): + (self.platform, self.hwsku) = device_info.get_platform_and_hwsku() + + @staticmethod + def is_host(): + return os.system(HOST_CHK_CMD) == 0 + + @staticmethod + def pci_get_value(resource, offset): + status = True + result = "" + try: + fd = os.open(resource, os.O_RDWR) + mm = mmap(fd, 0) + mm.seek(int(offset)) + read_data_stream = mm.read(4) + result = struct.unpack('I', read_data_stream) + except Exception: + status = False + return status, result + + @staticmethod + def run_command(cmd): + status = True + result = "" + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + @staticmethod + def run_interactive_command(cmd): + try: + subprocess.call(cmd) + except: + return False + return True + + @staticmethod + def read_txt_file(file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + @staticmethod + def read_one_line_file(file_path): + try: + with open(file_path, 'r') as fd: + data = fd.readline() + return data.strip() + except IOError: + pass + return None + + @staticmethod + def write_txt_file(file_path, value): + try: + with open(file_path, 'w') as fd: + fd.write(str(value)) + except Exception as E: + print(str(E)) + return False + return True + + def get_cpld_reg_value(self, getreg_path, register): + cmd = "echo {1} > {0}; cat {0}".format(getreg_path, register) + status, result = self.run_command(cmd) + return result if status else None + + @staticmethod + def ipmi_raw(cmd): + status = True + result = "" + cmd = "ipmitool raw {}".format(str(cmd)) + ret, raw_data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = raw_data + return status, result + + @staticmethod + def ipmi_fru_id(key_id, key=None): + status = True + result = "" + cmd = "ipmitool fru print {}".format(str( + key_id)) if not key else "ipmitool fru print {0} | grep '{1}' ".format(str(key_id), str(key)) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + return status, result + + @staticmethod + def ipmi_set_ss_thres(id, threshold_key, value): + status = True + result = "" + cmd = "ipmitool sensor thresh '{}' {} {}".format( + str(id), str(threshold_key), str(value)) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + return status, result + + @staticmethod + def get_bmc_status(): + """ + get bmc present by pddf-device.json + return: True(present), False(absent) + """ + pddf_device_path = '/usr/share/sonic/platform/pddf/pddf-device.json' + with open(pddf_device_path) as f: + json_data = json.load(f) + bmc_present = json_data["PLATFORM"]["bmc_present"] + return True if bmc_present == "True" else False diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/platform.py new file mode 100644 index 000000000000..8595e80692df --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/platform.py @@ -0,0 +1,23 @@ +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/psu.py new file mode 100644 index 000000000000..033307568b31 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/psu.py @@ -0,0 +1,46 @@ +#!/usr/bin/env python +# @Company ：Celestica +# @Time : 2023/7/20 13:46 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu + import re + import os + from . import helper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +BMC_EXIST = helper.APIHelper().get_bmc_status() + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + self.helper = helper.APIHelper() + if BMC_EXIST: + from . import sensor_list_config + if not os.path.exists(sensor_list_config.Sensor_List_Info): + cmd = "ipmitool sensor list > %s" % sensor_list_config.Sensor_List_Info + self.helper.run_command(cmd) + + @staticmethod + def get_capacity(): + return 550 + + @staticmethod + def get_type(): + return 'AC' + + @staticmethod + def get_revision(): + """ + Get PSU HW Revision by read psu eeprom data. + return: HW Revision or 'N/A' + """ + return "N/A" + + + diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sensor_list_config.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sensor_list_config.py new file mode 100644 index 000000000000..8c75e5480a73 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sensor_list_config.py @@ -0,0 +1,11 @@ +# -*- coding: utf-8 -*-# + +# @Time : 2023/4/13 9:29 +# @Mail : yajiang@celestica.com +# @Author : jiang tao + +# The path of sensor list information file +Sensor_List_Info = "/tmp/sensor_info.log" + +# The Sensor list information refresh interval +Sensor_Info_Update_Period_Secs = 60 diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sfp.py new file mode 100644 index 000000000000..89af6f6de14b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sfp.py @@ -0,0 +1,103 @@ +#!/usr/bin/env python + +try: + import ast + from sonic_platform_pddf_base.pddf_sfp import PddfSfp + from sonic_platform_base.sonic_xcvr.api.public.c_cmis import CmisApi +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + + def get_presence(self): + presence = PddfSfp.get_presence(self) + if not presence and self._xcvr_api != None: + self._xcvr_api = None + + return presence + + def get_xcvr_api(self): + if self._xcvr_api is None and self.get_presence(): + self.refresh_xcvr_api() + + # Find and update the right optoe driver + api_to_driver_map = {\ + 'Sff8636Api': 'optoe1',\ + 'Sff8472Api': 'optoe2',\ + 'CmisApi': 'optoe3',\ + 'CCmisApi': 'optoe3',\ + 'Sff8436Api': 'sff8436'\ + } + create_dev = False + path_list = self.eeprom_path.split('/') + name_path = '/'.join(path_list[:-1]) + '/name' + del_dev_path = '/'.join(path_list[:-2]) + '/delete_device' + new_dev_path = '/'.join(path_list[:-2]) + '/new_device' + api_name = type(self._xcvr_api).__name__ + new_driver = api_to_driver_map.get(api_name, 'optoe1') + + try: + with open(name_path, 'r') as fd: + cur_driver = fd.readline().strip() + except FileNotFoundError: + create_dev = True + else: + if cur_driver != new_driver: + with open(del_dev_path, 'w') as fd: + fd.write("0x50") + create_dev = True + + if create_dev: + with open(new_dev_path, 'w') as fd: + fd.write("{} 0x50".format(new_driver)) + + if api_name == 'Sff8636Api' or \ + api_name == 'Sff8436Api': + self.write_eeprom(93,1,bytes([0x04])) + + return self._xcvr_api + + def get_platform_media_key(self, transceiver_dict, port_speed, lane_count): + api = self.get_xcvr_api() + api_name = type(api).__name__ + if api_name in ['CmisApi', 'CCmisApi']: + is_cmis = True + else: + is_cmis = False + + # Per lane speed + media_key = str(int(port_speed / lane_count)) + if is_cmis: + media_compliance_code = transceiver_dict['specification_compliance'] + if 'copper' in media_compliance_code: + media_len = transceiver_dict['cable_length'] + media_key += '-copper-' + str(media_len) + 'M' + else: + media_key += '-optical' + else: + media_compliance_dict = ast.literal_eval(transceiver_dict['specification_compliance']) + eth_compliance_str = '10/40G Ethernet Compliance Code' + ext_compliance_str = 'Extended Specification Compliance' + media_compliance_code = '' + if eth_compliance_str in media_compliance_dict: + media_compliance_code = media_compliance_dict[eth_compliance_str] + if ext_compliance_str in media_compliance_dict: + media_compliance_code = media_compliance_code + ' ' + media_compliance_dict[ext_compliance_str] + if 'CR' in media_compliance_code or "copper" in transceiver_dict['specification_compliance'].lower(): + media_len = transceiver_dict['cable_length'] + media_key += '-copper-' + str(media_len) + 'M' + else: + media_key += '-optical' + + return {\ + 'vendor_key': '',\ + 'media_key': media_key,\ + 'lane_speed_key': ''\ + } diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/thermal.py new file mode 100644 index 000000000000..572a82be48c6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/thermal.py @@ -0,0 +1,68 @@ +#!/usr/bin/env python +# @Company ：Celestica +# @Time : 2023/7/24 13:32 +# @Mail : yajiang@celestica.com +# @Author : jiang tao + +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal + from . import helper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +BMC_EXIST = helper.APIHelper().get_bmc_status() +FAN_STATUS_INFO_CMD = "i2cget -y -f 107 0x0d 0x26" + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + self.helper = helper.APIHelper() + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal=is_psu_thermal, + psu_index=psu_index) + + def get_high_critical_threshold(self): + """ + Rewrite the method of obtaining PSU high critical in pddf_thermal + + Returns: + A float number, the high critical threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + if BMC_EXIST: + from . import sensor_list_config + if not self.is_psu_thermal: + output = self.pddf_obj.get_attr_name_output(self.thermal_obj_name, "temp1_high_crit_threshold") + if not output: + return None + + if output['status'].isalpha(): + attr_value = None + else: + attr_value = float(output['status']) + + if output['mode'] == 'bmc': + return attr_value + else: + return float(attr_value / 1000) + else: + info = self.helper.read_txt_file(sensor_list_config.Sensor_List_Info) + for line in info.splitlines(): + if "PSU%d_Temp1" % self.thermals_psu_index in line: + return float(line.split("|")[8]) + else: + return super().get_high_critical_threshold() + + def get_high_threshold(self): + if BMC_EXIST: + return super().get_high_threshold() + else: + status, fan_info = self.helper.run_command(FAN_STATUS_INFO_CMD) + if not status: + return None + thermal_name = self.get_name() + fan_dir = "B2F" if (bin(int(fan_info, 16)))[-2:-1] == "0" else "F2B" + value = self.plugin_data["THERMAL"]["NONE_BMC"]["temp1_high_threshold"][thermal_name][fan_dir] + return float(value) if value.isdigit() else None + diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/watchdog.py new file mode 100644 index 000000000000..7e4fc599dda2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/watchdog.py @@ -0,0 +1,208 @@ +#!/usr/bin/env python + +############################################################################# +# +# Watchdog contains an implementation of SONiC Platform Base Watchdog API +# +############################################################################# +import fcntl +import os +import array + +try: + from . import helper + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +""" ioctl constants """ +IO_WRITE = 0x40000000 +IO_READ = 0x80000000 +IO_READ_WRITE = 0xC0000000 +IO_SIZE_INT = 0x00040000 +IO_SIZE_40 = 0x00280000 +IO_TYPE_WATCHDOG = ord('W') << 8 + +WDR_INT = IO_READ | IO_SIZE_INT | IO_TYPE_WATCHDOG +WDR_40 = IO_READ | IO_SIZE_40 | IO_TYPE_WATCHDOG +WDWR_INT = IO_READ_WRITE | IO_SIZE_INT | IO_TYPE_WATCHDOG + +""" Watchdog ioctl commands """ +WDIOC_GETSUPPORT = 0 | WDR_40 +WDIOC_GETSTATUS = 1 | WDR_INT +WDIOC_GETBOOTSTATUS = 2 | WDR_INT +WDIOC_GETTEMP = 3 | WDR_INT +WDIOC_SETOPTIONS = 4 | WDR_INT +WDIOC_KEEPALIVE = 5 | WDR_INT +WDIOC_SETTIMEOUT = 6 | WDWR_INT +WDIOC_GETTIMEOUT = 7 | WDR_INT +WDIOC_SETPRETIMEOUT = 8 | WDWR_INT +WDIOC_GETPRETIMEOUT = 9 | WDR_INT +WDIOC_GETTIMELEFT = 10 | WDR_INT + +""" Watchdog status constants """ +WDIOS_DISABLECARD = 0x0001 +WDIOS_ENABLECARD = 0x0002 + +WDT_COMMON_ERROR = -1 +WD_MAIN_IDENTITY = "cpld_wdt" +WDT_SYSFS_PATH = "/sys/class/watchdog/" + +DEFAULT_TIMEOUT = 180 +watchdog = 0 + + +class Watchdog(WatchdogBase): + watchdog = None + + def __init__(self): + global watchdog + self.helper = helper.APIHelper() + self.status_path = "/sys/devices/platform/cpld_wdt/status" + self.state_path = "/sys/devices/platform/cpld_wdt/state" + self.timeout_path = "/sys/devices/platform/cpld_wdt/timeout" + # Set default value + state = self.helper.read_txt_file(self.state_path) + self.armed = True if state == "active" else False + self.timeout = DEFAULT_TIMEOUT + if not watchdog: + watchdog = os.open("/dev/cpld_wdt", os.O_RDWR) + self.watchdog = watchdog + + def _enable(self): + """ + Turn on the watchdog timer + """ + req = array.array('h', [WDIOS_ENABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _disable(self): + """ + Turn off the watchdog timer + """ + req = array.array('h', [WDIOS_DISABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _keep_alive(self): + """ + Keep alive watchdog timer + """ + fcntl.ioctl(self.watchdog, WDIOC_KEEPALIVE) + + def _set_timeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + req = array.array('I', [seconds]) + fcntl.ioctl(self.watchdog, WDIOC_SETTIMEOUT, req, True) + return int(req[0]) + + def _get_timeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMEOUT, req, True) + + return int(req[0]) + + def _get_time_left(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMELEFT, req, True) + + return int(req[0]) + + ################################################################# + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + + ret = WDT_COMMON_ERROR + if seconds < 0: + return ret + + try: + if self.timeout != seconds: + self.timeout = self._set_timeout(seconds) + + if self.armed: + self._keep_alive() + else: + self._enable() + self.armed = True + + ret = self.timeout + except IOError: + pass + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + self._disable() + self.armed = False + disarmed = True + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + + return self.armed + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Returns: + An integer specifying the number of seconds remaining on thei + watchdog timer. If the watchdog is not armed, returns -1. + """ + + time_left = WDT_COMMON_ERROR + + if self.armed: + try: + time_left = self._get_time_left() + except IOError: + pass + + return time_left + + def __del__(self): + """ + Close watchdog + """ + + if self.watchdog is not None: + os.close(self.watchdog) + diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_post_device_create.sh new file mode 100755 index 000000000000..4e078f27639c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_post_device_create.sh @@ -0,0 +1,20 @@ +#!/bin/bash +# install custom fpga device. + +sleep 3 +modprobe pddf_custom_fpga_extend + +bmc_present=`cat /usr/share/sonic/device/x86_64-cel_silverstone_v2-r0/bmc_status` +#Set off Alarm LED +if [[ "$bmc_present" == "True" ]]; then + # Set all LEDs to Manual control + ipmitool raw 0x3a 0x42 0x02 0x00 &> /dev/null + + # Set Alarm LED to OFF + ipmitool raw 0x3a 0x39 0x02 0x01 0x00 &> /dev/null + + #Set CPLD Fan LED register to BMC control + ipmitool raw 0x3a 0x64 0x00 0x02 0x65 0x10 &> /dev/null +else + i2cset -f -y 100 0x0d 0x63 0x33 &> /dev/null +fi diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_pre_driver_install.sh new file mode 100755 index 000000000000..4330f7c21382 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_pre_driver_install.sh @@ -0,0 +1,14 @@ +#!/bin/bash +# Has customized those drivers,so rename them to lose effect +psu_driver=pddf_psu_driver_module.ko +fan_driver=pddf_fan_driver_module.ko +ker_name=$(uname -r) +driver_path=/usr/lib/modules/${ker_name}/extra/ +if [ -e ${driver_path}${psu_driver} ]; then + mv ${driver_path}${psu_driver} ${driver_path}${psu_driver}-bk +fi + +if [ -e ${driver_path}${fan_driver} ]; then + mv ${driver_path}${fan_driver} ${driver_path}${fan_driver}-bk +fi +echo 'pddf psu,fan driver module has rename now' diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/platform_sensors.py new file mode 100755 index 000000000000..8e0dfe90c063 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/platform_sensors.py @@ -0,0 +1,180 @@ +#!/usr/bin/python +# +# Silverstone-v2 platform sensors. This script get the sensor data from BMC +# using ipmitool and display them in lm-sensor alike format. +# +# The following data is support: +# 1. Temperature sensors +# 2. PSUs +# 3. Fan Drawers + +import sys +import logging +import subprocess + +IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist'] +MAX_NUM_FANS = 7 +MAX_NUM_PSUS = 2 + +SENSOR_NAME = 0 +SENSOR_VAL = 4 + +sensor_dict = {} + +def ipmi_sensor_dump(cmd): + ''' Execute ipmitool command return dump output + exit if any error occur. + ''' + global sensor_dict + sensor_dump = '' + + try: + sensor_dump = subprocess.check_output(IPMI_SDR_CMD, universal_newlines=True) + except subprocess.CalledProcessError as e: + logging.error('Error! Failed to execute: {}'.format(cmd)) + sys.exit(1) + + for line in sensor_dump.splitlines(): + sensor_info = line.split('|') + sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip() + + return True + +def get_reading_by_name(sensor_name, sdr_elist_dump): + ''' + Search for the match sensor name, return sensor + reading value and unit, return object epmtry string + if search not match. + + The output of sensor dump: + TEMP_FB_U52 | 00h | ok | 7.1 | 31 degrees C + TEMP_FB_U17 | 01h | ok | 7.1 | 27 degrees C + TEMP_SW_U52 | 02h | ok | 7.1 | 30 degrees C + Fan2_Status | 07h | ok | 29.2 | Present + Fan2_Front | 0Eh | ok | 29.2 | 12000 RPM + Fan2_Rear | 46h | ok | 29.2 | 14700 RPM + PSU2_Status | 39h | ok | 10.2 | Presence detected + PSU2_Fan | 3Dh | ok | 10.2 | 16000 RPM + PSU2_VIn | 3Ah | ok | 10.2 | 234.30 Volts + PSU2_CIn | 3Bh | ok | 10.2 | 0.80 Amps + ''' + found = '' + + for line in sdr_elist_dump.splitlines(): + line = line.decode() + if sensor_name in line: + found = line.strip() + break + + if not found: + logging.error('Cannot find sensor name:' + sensor_name) + + else: + try: + found = found.split('|')[4] + except IndexError: + logging.error('Cannot get sensor data of:' + sensor_name) + + logging.basicConfig(level=logging.DEBUG) + return found + + +def read_temperature_sensors(): + sensor_list = [\ + ('TEMP_FB_U52', 'Fanboard Center Temp'),\ + ('TEMP_FB_U17', 'Fanboard Right Temp'),\ + ('TEMP_SW_U52', 'Switchboard Left Temp'),\ + ('TEMP_SW_U16', 'Switchboard Right Temp'),\ + ('TEMP_CPU', 'CPU Internal Temp'),\ + ('TEMP_SW_Internal', 'ASIC Internal Temp'),\ + ('VDD_CORE_Temp', 'TPS536C7 Chip Temp'),\ + ('XP3R3V_R_Temp', 'MP2975 3.3v Chip Right Temp'),\ + ('XP3R3V_L_Temp', 'MP2975 3.3v Chip Left Temp'),\ + ('XP0R8V_Temp', 'MP2975 0.8v Chip Temp')\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Temperature Sensors\n" + output += "Adapter: IPMI adapter\n" + for sensor in sensor_list: + output += sensor_format.format('{}:'.format(sensor[1]),\ + sensor_dict[sensor[0]],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_fan_sensors(num_fans): + + sensor_list = [\ + ('Fan{}_Status', 'Fan Drawer {} Status'),\ + ('Fan{}_Front', 'Fan {} front'),\ + ('Fan{}_Rear', 'Fan {} rear'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Fan Drawers\n" + output += "Adapter: IPMI adapter\n" + for fan_num in range(1, num_fans+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(fan_num) + display_sensor_name = sensor[1].format(fan_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_psu_sensors(num_psus): + + sensor_list = [\ + ('PSU{}_Status', 'PSU {} Status'),\ + ('PSU{}_Fan', 'PSU {} Fan 1'),\ + ('PSU{}_VIn', 'PSU {} Input Voltage'),\ + ('PSU{}_CIn', 'PSU {} Input Current'),\ + ('PSU{}_PIn', 'PSU {} Input Power'),\ + ('PSU{}_Temp1', 'PSU {} Temp1'),\ + ('PSU{}_Temp2', 'PSU {} Temp2'),\ + ('PSU{}_Temp3', 'PSU {} Temp3'),\ + ('PSU{}_VOut', 'PSU {} Output Voltage'),\ + ('PSU{}_COut', 'PSU {} Output Current'),\ + ('PSU{}_POut', 'PSU {} Output Power'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "PSU\n" + output += "Adapter: IPMI adapter\n" + for psu_num in range(1, num_psus+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(psu_num) + display_sensor_name = sensor[1].format(psu_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def main(): + output_string = '' + + if ipmi_sensor_dump(IPMI_SDR_CMD): + output_string += read_temperature_sensors() + output_string += read_psu_sensors(MAX_NUM_PSUS) + output_string += read_fan_sensors(MAX_NUM_FANS) + + print(output_string) + + +if __name__ == '__main__': + main() diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pre_pddf_init.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pre_pddf_init.py new file mode 100755 index 000000000000..74f0e1ea91cc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pre_pddf_init.py @@ -0,0 +1,100 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/7/24 9:34 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Load pddf_custom_lpc_basecpld.ko, after confirming the BMC is in place, +# load different configuration files, and finally remove the driver. + +import subprocess +import os +import os.path + + +class PrePddfInit(object): + def __init__(self): + self.ker_path = "/usr/lib/modules/{}/extra" + self.lpc_basecpld_name = "pddf_custom_lpc_basecpld" + self.lpc_basecpld_ko = "pddf_custom_lpc_basecpld.ko" + self.bmc_exist_cmd = "/sys/bus/platform/devices/sys_cpld/bmc_present" + self.platform_name = "x86_64-cel_silverstone_v2-r0" + self.bmc_present = False + + @staticmethod + def run_command(cmd): + status = True + result = "" + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def get_kernel_path(self): + """ + get the kernel object complete path + :return: + """ + sta_, res_ = self.run_command("uname -r") + if sta_: + return self.ker_path.format(res_) + else: + return None + + def install_lpc_basecpld(self): + """ + install lpc basecpld driver + """ + ker_path = self.get_kernel_path() + if ker_path: + self.run_command("insmod %s/%s" % (ker_path, self.lpc_basecpld_ko)) + + def uninstall_lpc_basecpld(self): + self.run_command("rmmod %s" % self.lpc_basecpld_name) + + def get_bmc_status(self): + """ + get bmc status + """ + self.install_lpc_basecpld() + if os.path.exists(self.bmc_exist_cmd): + # "1": "absent", "0": "present" + sta, res = self.run_command("cat %s" % self.bmc_exist_cmd) + self.bmc_present = False if res == "1" else True + self.uninstall_lpc_basecpld() + + def choose_pddf_device_json(self): + """ + Depending on the state of the BMC, different pddf-device.json file configurations will be used: + 1.BMC exist: cp pddf-device.json-bmc pddf-device.json + 2.None BMC : cp pddf-device.json-nonebmc pddf-device.json + """ + device_name = "pddf-device.json-bmc" if self.bmc_present else "pddf-device.json-nonebmc" + device_path = "/usr/share/sonic/device/%s/pddf/" % self.platform_name + self.run_command("cp %s%s %spddf-device.json" % (device_path, device_name, device_path)) + + def choose_platform_components(self): + """ + Depending on the state of the BMC, different platform_components.json file configurations will be used: + 1.BMC exist: cp platform_components.json-bmc platform_components.json + 2.None BMC : cp platform_components.json-nonebmc platform_components.json + """ + # ./usr/share/sonic/device/x86_64-cel_silverstone_v2-r0/platform_components.json + device_name = "platform_components.json-bmc" if self.bmc_present else "platform_components.json-nonebmc" + device_path = "/usr/share/sonic/device/%s/" % self.platform_name + self.run_command("cp %s%s %splatform_components.json" % (device_path, device_name, device_path)) + + def main(self): + self.get_bmc_status() + self.choose_pddf_device_json() + self.choose_platform_components() + with open("/usr/share/sonic/device/%s/bmc_status" % self.platform_name, 'w') as fp: + fp.write(str(self.bmc_present)) + + +if __name__ == '__main__': + if not os.path.isfile("/usr/share/sonic/device/x86_64-cel_silverstone_v2-r0/bmc_status"): + pre_init = PrePddfInit() + pre_init.main() diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/sensors new file mode 100755 index 000000000000..5d740a9eb7d7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/sensors @@ -0,0 +1,11 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@" +docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@" diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/silverstone_v2_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/silverstone_v2_platform_shutdown.sh new file mode 100755 index 000000000000..03bc2fcf9730 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/silverstone_v2_platform_shutdown.sh @@ -0,0 +1,39 @@ +#!/bin/bash +REBOOT_CAUSE_DIR="/host/reboot-cause" +HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +REBOOT_TIME=$(date) + +if [ $# -ne 1 ]; then + echo "Require reboot type" + exit 1 +fi + +if [ ! -d "$REBOOT_CAUSE_DIR" ]; then + mkdir $REBOOT_CAUSE_DIR +fi + +echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE} + +# Best effort to write buffered data onto the disk +sync ; sync ; sync ; sleep 3 + +bmc_present=`cat /usr/share/sonic/device/x86_64-cel_silverstone_v2-r0/bmc_status` + +if [[ "$bmc_present" == "True" ]]; then + # Set all LEDs to BMC's control + ipmitool raw 0x3a 0x42 0x02 0x01 &> /dev/null + + # BMC cold power-cyle + ipmitool chassis power cycle &> /dev/null +else + # Set System LED to booting pattern + i2cset -f -y 100 0x0d 0x62 0x02 &> /dev/null + + # CPLD cold power-cyle + i2cset -f -y 100 0x0d 0x64 0x00 &> /dev/null +fi + +# System should reboot by now and avoid the script returning to caller +sleep 10 + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/service/belgite-pddf-platform-monitor.service b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/service/silverstone-v2-pddf-platform-monitor.service similarity index 58% rename from platform/broadcom/sonic-platform-modules-cel/belgite/service/belgite-pddf-platform-monitor.service rename to platform/broadcom/sonic-platform-modules-cel/silverstone-v2/service/silverstone-v2-pddf-platform-monitor.service index 233971ae784d..a63f5fe71ccd 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/service/belgite-pddf-platform-monitor.service +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/service/silverstone-v2-pddf-platform-monitor.service @@ -1,11 +1,13 @@ [Unit] -Description=Belgite Platform Monitoring service +Description=Silverstone-V2 Platform background monitor service Before=pmon.service After=pddf-platform-init.service DefaultDependencies=no [Service] -ExecStart=/usr/local/bin/belgite_pddf_monitor.py +ExecStart=/usr/local/bin/pddf_fan_control_sensor_refresh.py +Restart=always +RestartSec=30s KillSignal=SIGKILL SuccessExitStatus=SIGKILL diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/systemd/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/systemd/pddf-platform-init.service similarity index 89% rename from platform/broadcom/sonic-platform-modules-cel/belgite/systemd/pddf-platform-init.service rename to platform/broadcom/sonic-platform-modules-cel/silverstone-v2/systemd/pddf-platform-init.service index 249fa2e89764..021f7b283a1a 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/systemd/pddf-platform-init.service +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/systemd/pddf-platform-init.service @@ -6,6 +6,7 @@ DefaultDependencies=no [Service] Type=oneshot +ExecStartPre=/usr/local/bin/pre_pddf_init.py ExecStart=/usr/local/bin/pddf_util.py install ExecStop=/usr/local/bin/pddf_util.py clean RemainAfterExit=yes diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/CPUPIDRegulation.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/CPUPIDRegulation.py new file mode 100755 index 000000000000..8ad50341cd9a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/CPUPIDRegulation.py @@ -0,0 +1,129 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/6/19 17:01 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Perform fan PWM PID control according to the CPU temperature provided by the Thermal team + +try: + import os + import sys + import getopt + import subprocess + import statistics + import logging + import logging.config + import time # this is only being used as part of the example + import signal + from sonic_platform import platform +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Defaults +FUNCTION_NAME = 'FanControl' +DUTY_MAX = 100 +CPU_TEMP_MAX = 130 +CPU_MAJOR_ALARM = 105 +TEMP_DIFF = 15 # abs(Tk - Tk-1) limit +CPU_TEMPERATURE = "cat /sys/class/thermal/thermal_zone0/temp" + +# PID Defaults Value +PWM_LIST = [35] # [PWMk-1] +T_LIST = [] # [Tk-2, Tk-1, Tk] +Kp = 1.8 +Ki = 0.3 +Kd = 0 +SET_POINT = 96 +PWM_MIN = 35 +PWM_MAX = 100 + + +class CPUPIDRegulation(object): + """ + Make a class we can use to capture stdout and sterr in the log + """ + # static temp var + _ori_temp = 0 + _new_perc = DUTY_MAX / 2 + syslog = logging.getLogger("[" + FUNCTION_NAME + "]") + init_fan_temperature = [0, 0] + + def __init__(self): + """Needs a logger and a logger level.""" + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address='/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + self.syslog.setLevel(logging.WARNING) + self.syslog.addHandler(sys_handler) + + @staticmethod + def get_cpu_temperature(): + """ + Get CPU temperature + """ + try: + temp = int(os.popen(CPU_TEMPERATURE).read().strip()) / 1000 + return temp + except Exception: + return False + + def exception_data_handling(self): + """ + Get the temperature of CPU, and confirm whether the obtained value meets the conditions: + 1. The temperature range is 0~130; + 2. The temperature difference from the last time is within 15 + Otherwise, loop 5 times to get the temperature value again: + 1. if can't get the int value of temperature, return False; + 2. all temperatures are int, return the temperatures average value + """ + re_try = False + cpu_temp = self.get_cpu_temperature() + if cpu_temp is False: + re_try = True + elif cpu_temp not in range(CPU_TEMP_MAX+1): + re_try = True + elif T_LIST and abs(cpu_temp - T_LIST[-1]) > TEMP_DIFF: + re_try = True + + if re_try: + error_temp_list = list() + for _ in range(5): + cpu_temp = self.get_cpu_temperature() + if (type(cpu_temp) is int) and \ + (cpu_temp in range(CPU_TEMP_MAX+1)) and \ + (abs(cpu_temp - T_LIST[-1]) <= TEMP_DIFF): + return cpu_temp + else: + error_temp_list.append(cpu_temp) + if False in error_temp_list: + return False + return statistics.mean(error_temp_list) + return cpu_temp + + def pid_control(self): + """ + PID adjustment according to Switch Internal Temperature + :return: fans pwm + """ + cpu_temp = self.exception_data_handling() + if not cpu_temp: + return DUTY_MAX + if cpu_temp >= CPU_MAJOR_ALARM: + self.syslog.warning("High temperature warning: CPU temperature %sC, Major Alarm %sC" + % (cpu_temp, CPU_MAJOR_ALARM)) + if len(T_LIST) < 2: + T_LIST.append(float(cpu_temp)) + return PWM_LIST[0] + else: + T_LIST.append(float(cpu_temp)) + pwm_k = PWM_LIST[0] + Kp * (T_LIST[2] - T_LIST[1]) + \ + Ki * (T_LIST[2] - SET_POINT) + \ + Kd * (T_LIST[2] - 2 * T_LIST[1] + T_LIST[0]) + if pwm_k < PWM_MIN: + pwm_k = PWM_MIN + elif pwm_k > PWM_MAX: + pwm_k = PWM_MAX + PWM_LIST[0] = pwm_k + T_LIST.pop(0) + return pwm_k diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanControl.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanControl.py new file mode 100755 index 000000000000..f7fe5e82b898 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanControl.py @@ -0,0 +1,207 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/6/19 17:44 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Fan control strategy main program + +try: + import re + import os + import sys + import getopt + import subprocess + import logging + import logging.config + import time # this is only being used as part of the example + import signal + from sonic_platform import platform + from . import CPUPIDRegulation + from . import FanLinearAdjustment + from . import SwitchInternalPIDRegulation +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +FUNCTION_NAME = "FanControl" +ERROR_COLOR = "amber" +NORMAL_COLOR = "green" +DUTY_MAX = 100 +FAN_NUMBER = 7 +PSU_NUMBER = 2 +SENSOR_NUMBER = 6 +Fan_Front_MAX = 40000 +Fan_Front_MIN = 7800 +Fan_Rear_MAX = 37800 +Fan_Rear_MIN = 6600 + + +class FanControl(object): + """ + Make a class we can use to capture stdout in the log + """ + # static temp var + _ori_temp = 0 + _new_perc = DUTY_MAX / 2 + syslog = logging.getLogger("[" + FUNCTION_NAME + "]") + init_fan_temperature = [0, 0] + + def __init__(self): + self.FanLinearAdjustment = FanLinearAdjustment.FanLinearAdjustment(DUTY_MAX, FAN_NUMBER, PSU_NUMBER, SENSOR_NUMBER) + self.SwitchInternalPIDRegulation = SwitchInternalPIDRegulation.SwitchInternalPIDRegulation() + self.CPUPIDRegulation = CPUPIDRegulation.CPUPIDRegulation() + # Needs a logger and a logger level + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address='/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + self.syslog.setLevel(logging.WARNING) + self.syslog.addHandler(sys_handler) + self.platform_chassis_obj = platform.Platform().get_chassis() + + def get_psu_status(self, fan_duty_list): + """ + Get PSU Status.If one PSU not OK, all of the fans pwm will increase to 100 + :param fan_duty_list: A list.TO app the fans target pwm + """ + psu_presence_list = [True, True] + try: + pus_info = os.popen("i2cget -y -f 100 0x0d 0x60").read().strip() + psus_present = bin(int(pus_info, 16))[6:8] + for psu_index in range(PSU_NUMBER): + psu_presence = True if psus_present[psu_index] == "0" else False + if not psu_presence: + psu_presence_list[psu_index] = False + self.syslog.warning( + "psu%s was error,presence:%s" % (psu_index + 1, str(psu_presence))) + else: + psu_presence_list[psu_index] = True + if False in psu_presence_list: + fan_duty_list.append(DUTY_MAX) + except Exception: + pass + + def get_fan_status(self): + """ + Get all of fans status(fan drawer) + :return: A list indicating the status of all groups fans + """ + fan_presence_list = [True, True, True, True, True, True, True] # Default state: fans are OK + for fan_drawer_index in range(FAN_NUMBER): + try: + fan_presence = self.platform_chassis_obj.get_fan_drawer(fan_drawer_index).get_presence() + fan_status = self.platform_chassis_obj.get_fan_drawer(fan_drawer_index).get_status() + if not all([fan_presence, fan_status]): + fan_presence_list[fan_drawer_index] = False + self.syslog.warning("Fan Drawer-%s has error,presence:%s, status:%s" + % (fan_drawer_index + 1, fan_presence, fan_status)) + except Exception: + pass + return fan_presence_list + + def check_fans_presence(self): + """ + check all fans presence or not + """ + fans_inserted_list = self.get_fan_status() + fans_inserted_num = fans_inserted_list.count(True) + if fans_inserted_num == 0: # all fans broken, cpld will power off + self.syslog.critical("No fans inserted!!! Severe overheating hazard. " + "Please insert Fans immediately or power off the device") + + def set_fans_pwm_by_rpm(self, fan_duty_list): + """ + Set fans pwm by fans rpm. If all fans normal or 1 fan broken, + manage the fans follow thermal policy. + More than 1 fans broken, Will increase the fan speed to 100% + :param fan_duty_list: A list.TO app the fans target pwm + """ + fan_rpm_error_list = list() + for fan in self.platform_chassis_obj.get_all_fans(): + fan_name = fan.get_name() + fan_speed_rpm = fan.get_speed_rpm() + if fan_name.endswith("1") and (fan_speed_rpm not in range(Fan_Front_MIN, Fan_Front_MAX + 1)): + fan_rpm_error_list.append(fan_name) + if fan_name.endswith("2") and (fan_speed_rpm not in range(Fan_Rear_MIN, Fan_Rear_MAX + 1)): + fan_rpm_error_list.append(fan_name) + if not fan_rpm_error_list: + for fan_drawer_index in range(FAN_NUMBER): + self.platform_chassis_obj.get_fan_drawer(fan_drawer_index).set_status_led(NORMAL_COLOR) + return None + if len(fan_rpm_error_list) >= 2: + self.syslog.warning("%s rpm less than the set minimum speed. " + "Will increase the fan speed to 100%%" % fan_rpm_error_list) + fan_duty_list.append(DUTY_MAX) + else: + self.syslog.warning("%s rpm less than the set minimum speed. Fans pwm isn't changed" % fan_rpm_error_list) + + fan_modules_index_list = list(set(int(re.findall(r"Fantray(\d)_\d", x)[0]) for x in fan_rpm_error_list)) + for error_fan_drawer in fan_modules_index_list: + self.platform_chassis_obj.get_fan_drawer(error_fan_drawer-1).set_status_led(ERROR_COLOR) + + self.syslog.warning("The STA front panel light will be set to %s" % ERROR_COLOR) + self.platform_chassis_obj.set_status_led(ERROR_COLOR) + + def get_linear_pid_pwm(self, fan_duty_list): + """ + Get the pwm value of liner regulation, cpu pid adjustment, switch internal pid adjustment + :param fan_duty_list: A list.TO app the fans target pwm + """ + linear_regulation = self.FanLinearAdjustment.linear_control() + cpu_pid_adjustment = self.CPUPIDRegulation.pid_control() + sw_pid_adjustment = self.SwitchInternalPIDRegulation.pid_control() + fan_duty_list.append(linear_regulation) + fan_duty_list.append(cpu_pid_adjustment) + fan_duty_list.append(sw_pid_adjustment) + + def manage_fans(self): + """ + Set the fan speed according to the Fan Control Strategy + """ + fan_duty_speed_list = list() + + # Fan speed setting judgment-PSU + self.get_psu_status(fan_duty_speed_list) + + # Fan speed setting judgment-FAN presence + self.check_fans_presence() + + # Fan speed setting judgment-FAN SPEED + self.set_fans_pwm_by_rpm(fan_duty_speed_list) + + # Fan speed setting judgment-linear and cpu pid and sw pid + self.get_linear_pid_pwm(fan_duty_speed_list) + + self._new_perc = max(fan_duty_speed_list) + if self._new_perc < 35: + self._new_perc = 35 + if self._new_perc > 100: + self._new_perc = 100 + + for fan in self.platform_chassis_obj.get_all_fans(): + fan.set_speed(self._new_perc) + + +def handler(signum, frame): + logging.warning('Cause signal %d, will set all fan speed to max.' % signum) + platform_chassis = platform.Platform().get_chassis() + set_error = list() + fan_index = 1 + for fan in platform_chassis.get_all_fans(): + set_stat = fan.set_speed(DUTY_MAX) + fan_drawer = fan_index//2 + if not set_stat: + set_error.append(fan_drawer) + fan_index += 1 + if set_error: + logging.error('Fail. Set Fantray %s to (%d) failed' % (list(set(set_error)), DUTY_MAX)) + sys.exit(0) + + +def main(): + signal.signal(signal.SIGINT, handler) + signal.signal(signal.SIGTERM, handler) + monitor = FanControl() + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(2) diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanLinearAdjustment.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanLinearAdjustment.py new file mode 100755 index 000000000000..fac9ba9253ff --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanLinearAdjustment.py @@ -0,0 +1,156 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/6/16 17:00 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Fan PWM confirmation according to Thermal team's fan linear control strategy + +try: + import sys + import getopt + import subprocess + import logging + import logging.config + import time # this is only being used as part of the example + import signal + from sonic_platform import platform +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Defaults +FUNCTION_NAME = "FanControl" + + +class FanLinearAdjustment(object): + """ + Make a class we can use to capture stdout in the log + """ + syslog = logging.getLogger("[" + FUNCTION_NAME + "]") + init_fan_temperature = [0, 0] + + def __init__(self, duty_max, fan_num, psu_num, sensor_num): + self.duty_max = duty_max + self.fan_num = fan_num + self.psu_num = psu_num + self.sensor_num = sensor_num + self.last_pwm = 0 + # Needs a logger and a logger level + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address='/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + self.syslog.setLevel(logging.WARNING) + self.syslog.addHandler(sys_handler) + self.platform_chassis_obj = platform.Platform().get_chassis() + + def get_all_temperature(self): + """ + Get U16 and U17 temperature by thermal API + return: [TEMP_SW_U16 temperature, TEMP_FB_U17 temperature] + """ + all_temperature_list = list() + for sensor_index in range(self.sensor_num): + temp = self.platform_chassis_obj.get_thermal(sensor_index).get_temperature() + if temp is None or str(temp).strip() == "": + for count in range(5): # retry to get the temperature + temp = self.platform_chassis_obj.get_thermal(sensor_index).get_temperature() + try: + float(temp) + break + except ValueError: + pass + else: + return None + all_temperature_list.append(temp) + u16_temperature = all_temperature_list[4] + u17_temperature = all_temperature_list[5] + return [u16_temperature, u17_temperature] + + def get_fan_pwm_by_temperature(self, temp_list): + """ + According to the sensor temperature, the temperature rise and fall are judged, + and the fan speed with the highest speed is selected + :param temp_list: Sensor temperature list + :return: According to the sensor temperature, select the maximum expected fan value at each point(int) + """ + fan_direction = "NA" + for fan in self.platform_chassis_obj.get_all_fans(): + fan_status = fan.get_status() + if fan_status: + fan_direction = fan.get_direction() + break + all_temp = self.get_all_temperature() + if all_temp is None: + # According to Thermal suggestion, when the temperature can't be + # obtained, set the fan to full speed + self.syslog.warning("Can't get TEMP_FB_U17/TEMP_SW_U16, Will increase the fan speed to 100%%") + return self.duty_max + + # B2F=intake: U17 temperature， F2B-EXHAUST: U16 temperature + sensor_index = 1 if fan_direction.lower() == "intake" else 0 + sensor_temp = float(all_temp[sensor_index]) + update_temp_sensor = True + diff_temp = temp_list[sensor_index] - all_temp[sensor_index] + if diff_temp > 0: + update_temp_sensor = False + + if sensor_index == 0: + if not update_temp_sensor: # U16 temperature down + b = 919 / 6 + if sensor_temp <= 37: + sensor_temp_pwm = 38 + elif sensor_temp >= 49: + sensor_temp_pwm = self.duty_max + else: + sensor_temp_pwm = int((31 / 6) * sensor_temp - b) + else: # U16 temperature up + b = 506 / 3 + if sensor_temp <= 40: + sensor_temp_pwm = 38 + elif sensor_temp >= 52: + sensor_temp_pwm = self.duty_max + else: + sensor_temp_pwm = int((31 / 6) * sensor_temp - b) + return self.choose_pwm(update_temp_sensor, self.last_pwm, sensor_temp_pwm) + else: + if not update_temp_sensor: # U17 temperature down + b = 20 + if sensor_temp <= 23: + sensor_temp_pwm = 40 + elif sensor_temp >= 46: + sensor_temp_pwm = self.duty_max + else: + sensor_temp_pwm = int((60 / 23) * sensor_temp - b) + else: # U17 temperature up + b = 640 / 23 + if sensor_temp <= 23: + sensor_temp_pwm = 40 + elif sensor_temp >= 49: + sensor_temp_pwm = self.duty_max + else: + sensor_temp_pwm = int((60 / 23) * sensor_temp - b) + return self.choose_pwm(update_temp_sensor, self.last_pwm, sensor_temp_pwm) + + @staticmethod + def choose_pwm(status, last_pwm, now_pwm): + """ + choose the pwm with Thermal rules + :param status: Temperature rises (True) or falls(False) + :param last_pwm:last pwm value + :param now_pwm:Calculated pwm from current temperature + :return:int.The pwm value + """ + if status: + return last_pwm if last_pwm >= now_pwm else now_pwm + else: + return now_pwm if last_pwm >= now_pwm else last_pwm + + def linear_control(self): + """ + According to linear adjustment return the fans pwm + :return: fans pwm + """ + new_perc = self.get_fan_pwm_by_temperature(self.init_fan_temperature) + self.init_fan_temperature = self.get_all_temperature() + self.last_pwm = new_perc + return new_perc diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/SwitchInternalPIDRegulation.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/SwitchInternalPIDRegulation.py new file mode 100755 index 000000000000..96f96b20369a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/SwitchInternalPIDRegulation.py @@ -0,0 +1,145 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/6/19 16:26 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Perform fan PWM PID control according to the Switch Internal temperature provided by the Thermal team + +try: + import os + import sys + import getopt + import subprocess + import statistics + import logging + import logging.config + import time # this is only being used as part of the example + import signal + from sonic_platform import platform +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Defaults +FUNCTION_NAME = 'FanControl' +DUTY_MAX = 100 +SW_TEMP_MAX = 150 +SW_MAJOR_ALARM = 110 +SW_SHUTDOWN = 124 +TEMP_DIFF = 15 # abs(Tk - Tk-1) limit +SWITCH_INTERNAL_PATH = "/sys/devices/platform/fpga_sysfs/getreg" + +# PID Defaults Value +PWM_LIST = [35] # [PWMk-1] +T_LIST = [] # [Tk-2, Tk-1, Tk] +Kp = 3 +Ki = 0.3 +Kd = 0.5 +SET_POINT = 100 +PWM_MIN = 35 +PWM_MAX = 100 + + +class SwitchInternalPIDRegulation(object): + """ + Make a class we can use to capture stdout in the log + """ + _new_perc = DUTY_MAX / 2 + syslog = logging.getLogger("[" + FUNCTION_NAME + "]") + + def __init__(self): + # Needs a logger and a logger level + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address='/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + self.syslog.setLevel(logging.WARNING) + self.syslog.addHandler(sys_handler) + self.platform_chassis_obj = platform.Platform().get_chassis() + + def get_switch_internal_temperature(self): + """ + Get Switch internal temperature + """ + try: + subprocess.run("echo 0x78 > {}".format(SWITCH_INTERNAL_PATH)) + ret,value_1 = subprocess.getstatusoutput("cat {}".format(SWITCH_INTERNAL_PATH)) + value_1 = value_1.strip() + + subprocess.run("echo 0x80 > {}".format(SWITCH_INTERNAL_PATH)) + ret,value_2 = subprocess.getstatusoutput("cat {}".format(SWITCH_INTERNAL_PATH)) + value_2 = value_2.strip() + + freq = int(value_2, 16) + freq = freq * 256 + int(value_1, 16) + temp = (434100 - ((12500000 / freq - 1) * 535)) / 1000 + return int(temp) + except Exception as E: + self.syslog.warning("Can't Get switch internal temperature! Cause:%s" % str(E)) + return False + + def exception_data_handling(self): + """ + Get the temperature of Switch Internal, and confirm whether the obtained value meets the conditions: + 1. The temperature range is 0~150; + 2. The temperature difference from the last time is within 15 + Otherwise, loop 5 times to get the temperature value again: + 1. if can't get the int value of temperature, return False; + 2. all temperatures are int, return the temperatures average value + """ + re_try = False + sw_temp = self.get_switch_internal_temperature() + if sw_temp is False: + re_try = True + elif sw_temp not in range(SW_TEMP_MAX+1): + re_try = True + elif T_LIST and abs(sw_temp - T_LIST[-1]) > TEMP_DIFF: + re_try = True + + if re_try: + error_temp_list = list() + while len(error_temp_list) < 5: + sw_temp = self.get_switch_internal_temperature() + if (type(sw_temp) is int) and \ + (sw_temp in range(SW_TEMP_MAX+1)) and \ + (abs(sw_temp - T_LIST[-1]) <= TEMP_DIFF): + return sw_temp + else: + error_temp_list.append(sw_temp) + if False in error_temp_list: + return False + return statistics.mean(error_temp_list) + return sw_temp + + def pid_control(self): + """ + PID adjustment according to Switch Internal Temperature + :return: fans pwm + """ + sw_temp = self.exception_data_handling() + if not sw_temp: + return DUTY_MAX + sw_temp = sw_temp + 3 + if sw_temp >= SW_MAJOR_ALARM: + self.syslog.warning("High temperature warning: switch internal temperature %sC, Major Alarm %sC" + % (sw_temp, SW_MAJOR_ALARM)) + if sw_temp >= SW_SHUTDOWN: + self.syslog.critical("The Switch Internal temperature exceeds %sC, " + "the Switch board will be powered off. And will reboot now" % SW_SHUTDOWN) + os.popen("i2cset -y -f 100 0x0d 0x40 0x00") + os.popen("i2cset -y -f 100 0x0d 0x40 0x01") + os.popen("reboot") + if len(T_LIST) < 2: + T_LIST.append(float(sw_temp)) + return PWM_LIST[0] + else: + T_LIST.append(float(sw_temp)) + pwm_k = PWM_LIST[0] + Kp * (T_LIST[2] - T_LIST[1]) + \ + Ki * (T_LIST[2] - SET_POINT) + \ + Kd * (T_LIST[2] - 2 * T_LIST[1] + T_LIST[0]) + if pwm_k < PWM_MIN: + pwm_k = PWM_MIN + elif pwm_k > PWM_MAX: + pwm_k = PWM_MAX + PWM_LIST[0] = pwm_k + T_LIST.pop(0) + return pwm_k diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/__init__.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/__init__.py new file mode 100755 index 000000000000..fd2df8085779 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/__init__.py @@ -0,0 +1,5 @@ +# -*- coding: utf-8 -*-# + +# @Time : 2023/6/20 16:01 +# @Mail : yajiang@celestica.com +# @Author : jiang tao diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_fan_control_sensor_refresh.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_fan_control_sensor_refresh.py new file mode 100755 index 000000000000..d2e2b7f271f4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_fan_control_sensor_refresh.py @@ -0,0 +1,26 @@ +#!/usr/bin/python +# -*- coding: utf-8 -*-# + +# @Time : 2023/7/31 13:15 +# @Mail : yajiang@celestica.com +# @Author : jiang tao + +import sys +import time +import json +sys.path.append(r"/usr/local/bin") +from FanControl import FanControl +import pddf_sensor_list_refresh + + +pddf_device_path = '/usr/share/sonic/platform/pddf/pddf-device.json' +with open(pddf_device_path) as f: + json_data = json.load(f) +bmc_present = json_data["PLATFORM"]["bmc_present"] +# Wait for a while to ensure that the corresponding system files are ready +time.sleep(30) +if bmc_present == "False": + FanControl.main() + +if bmc_present == "True": + pddf_sensor_list_refresh.main() diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_sensor_list_refresh.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_sensor_list_refresh.py new file mode 100755 index 000000000000..a320878bd242 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_sensor_list_refresh.py @@ -0,0 +1,39 @@ +#!/usr/bin/python +# -*- coding: utf-8 -*-# + +# @Time : 2023/4/13 9:46 +# @Mail : yajiang@celestica.com +# @Author : jiang tao + +import os +import time + +try: + from sonic_platform import sensor_list_config + from sonic_py_common import logger +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +sensor_info_path = sensor_list_config.Sensor_List_Info +refresh_interval = sensor_list_config.Sensor_Info_Update_Period_Secs + +log = logger.Logger() + + +def write_sensor_list_info(): + """ + Write the log of the command 'ipmitool sensor list' in sensor_info.log + """ + try: + info = os.popen("ipmitool sensor list").read() + if "System_Event" in info: + with open(sensor_info_path, "w") as f: + f.write(info) + except Exception as E: + log.log_error(str(E)) + + +def main(): + while 1: + write_sensor_list_info() + time.sleep(refresh_interval) diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/cfg/silverstone-modules.conf b/platform/broadcom/sonic-platform-modules-cel/silverstone/cfg/silverstone-modules.conf index cb8dcf640ba3..001538945867 100644 --- a/platform/broadcom/sonic-platform-modules-cel/silverstone/cfg/silverstone-modules.conf +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/cfg/silverstone-modules.conf @@ -9,7 +9,7 @@ i2c-ismt i2c-dev i2c-mux i2c-smbus +coretemp -i2c-mux-pca954x ipmi_devintf -ipmi_si \ No newline at end of file +ipmi_si diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/Makefile index f6ad4d9ba4d1..44b9b6147e57 100644 --- a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/Makefile +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/Makefile @@ -1 +1 @@ -obj-m := baseboard-lpc.o mc24lc64t.o switchboard.o \ No newline at end of file +obj-m := baseboard-lpc.o mc24lc64t.o cls-switchboard.o xcvr-cls.o switch_cpld.o cls-i2c-mux-pca954x.o diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/baseboard-lpc.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/baseboard-lpc.c index b6291f7d3ce4..50f9e2d886bc 100644 --- a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/baseboard-lpc.c +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/baseboard-lpc.c @@ -98,7 +98,7 @@ static ssize_t version_show(struct device *dev, struct device_attribute *attr, c mutex_lock(&cpld_data->cpld_lock); version = inb(VERSION_ADDR); mutex_unlock(&cpld_data->cpld_lock); - return sprintf(buf, "%d.%d\n", version >> 4, version & 0x0F); + return sprintf(buf, "%x.%x\n", version >> 4, version & 0x0F); } static DEVICE_ATTR_RO(version); @@ -430,4 +430,4 @@ module_exit(cpld_b_exit); MODULE_AUTHOR("Celestica Inc."); MODULE_DESCRIPTION("Celestica Silverstone CPLD baseboard driver"); MODULE_VERSION("0.2.0"); -MODULE_LICENSE("GPL"); \ No newline at end of file +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-i2c-mux-pca954x.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-i2c-mux-pca954x.c new file mode 100644 index 000000000000..87c51c15ad97 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-i2c-mux-pca954x.c @@ -0,0 +1,578 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * I2C multiplexer + * + * Copyright (c) 2008-2009 Rodolfo Giometti + * Copyright (c) 2008-2009 Eurotech S.p.A. + * + * This module supports the PCA954x and PCA984x series of I2C multiplexer/switch + * chips made by NXP Semiconductors. + * This includes the: + * PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547, + * PCA9548, PCA9846, PCA9847, PCA9848 and PCA9849. + * + * These chips are all controlled via the I2C bus itself, and all have a + * single 8-bit register. The upstream "parent" bus fans out to two, + * four, or eight downstream busses or channels; which of these + * are selected is determined by the chip type and register contents. A + * mux can select only one sub-bus at a time; a switch can select any + * combination simultaneously. + * + * Based on: + * pca954x.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "cls-pca954x.h" + +#define PCA954X_MAX_NCHANS 8 + +#define PCA954X_IRQ_OFFSET 4 + +enum pca_type { + pca_9540, + pca_9542, + pca_9543, + pca_9544, + pca_9545, + pca_9546, + pca_9547, + pca_9548, + pca_9846, + pca_9847, + pca_9848, + pca_9849, +}; + +struct chip_desc { + u8 nchans; + u8 enable; /* used for muxes only */ + u8 has_irq; + enum muxtype { + pca954x_ismux = 0, + pca954x_isswi + } muxtype; + struct i2c_device_identity id; +}; + +struct pca954x { + const struct chip_desc *chip; + + u8 last_chan; /* last register value */ + /* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */ + s32 idle_state; + + struct i2c_client *client; + + struct irq_domain *irq; + unsigned int irq_mask; + raw_spinlock_t lock; +}; + +/* Provide specs for the PCA954x types we know about */ +static const struct chip_desc chips[] = { + [pca_9540] = { + .nchans = 2, + .enable = 0x4, + .muxtype = pca954x_ismux, + .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, + }, + [pca_9542] = { + .nchans = 2, + .enable = 0x4, + .has_irq = 1, + .muxtype = pca954x_ismux, + .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, + }, + [pca_9543] = { + .nchans = 2, + .has_irq = 1, + .muxtype = pca954x_isswi, + .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, + }, + [pca_9544] = { + .nchans = 4, + .enable = 0x4, + .has_irq = 1, + .muxtype = pca954x_ismux, + .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, + }, + [pca_9545] = { + .nchans = 4, + .has_irq = 1, + .muxtype = pca954x_isswi, + .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, + }, + [pca_9546] = { + .nchans = 4, + .muxtype = pca954x_isswi, + .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, + }, + [pca_9547] = { + .nchans = 8, + .enable = 0x8, + .muxtype = pca954x_ismux, + .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, + }, + [pca_9548] = { + .nchans = 8, + .muxtype = pca954x_isswi, + .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, + }, + [pca_9846] = { + .nchans = 4, + .muxtype = pca954x_isswi, + .id = { + .manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS, + .part_id = 0x10b, + }, + }, + [pca_9847] = { + .nchans = 8, + .enable = 0x8, + .muxtype = pca954x_ismux, + .id = { + .manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS, + .part_id = 0x108, + }, + }, + [pca_9848] = { + .nchans = 8, + .muxtype = pca954x_isswi, + .id = { + .manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS, + .part_id = 0x10a, + }, + }, + [pca_9849] = { + .nchans = 4, + .enable = 0x4, + .muxtype = pca954x_ismux, + .id = { + .manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS, + .part_id = 0x109, + }, + }, +}; + +static const struct i2c_device_id pca954x_id[] = { + { "cls_pca9540", pca_9540 }, + { "cls_pca9542", pca_9542 }, + { "cls_pca9543", pca_9543 }, + { "cls_pca9544", pca_9544 }, + { "cls_pca9545", pca_9545 }, + { "cls_pca9546", pca_9546 }, + { "cls_pca9547", pca_9547 }, + { "cls_pca9548", pca_9548 }, + { "cls_pca9846", pca_9846 }, + { "cls_pca9847", pca_9847 }, + { "cls_pca9848", pca_9848 }, + { "cls_pca9849", pca_9849 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, pca954x_id); + +static const struct of_device_id pca954x_of_match[] = { + { .compatible = "nxp,cls_pca9540", .data = &chips[pca_9540] }, + { .compatible = "nxp,cls_pca9542", .data = &chips[pca_9542] }, + { .compatible = "nxp,cls_pca9543", .data = &chips[pca_9543] }, + { .compatible = "nxp,cls_pca9544", .data = &chips[pca_9544] }, + { .compatible = "nxp,cls_pca9545", .data = &chips[pca_9545] }, + { .compatible = "nxp,cls_pca9546", .data = &chips[pca_9546] }, + { .compatible = "nxp,cls_pca9547", .data = &chips[pca_9547] }, + { .compatible = "nxp,cls_pca9548", .data = &chips[pca_9548] }, + { .compatible = "nxp,cls_pca9846", .data = &chips[pca_9846] }, + { .compatible = "nxp,cls_pca9847", .data = &chips[pca_9847] }, + { .compatible = "nxp,cls_pca9848", .data = &chips[pca_9848] }, + { .compatible = "nxp,cls_pca9849", .data = &chips[pca_9849] }, + {} +}; +MODULE_DEVICE_TABLE(of, pca954x_of_match); + +/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer() + for this as they will try to lock adapter a second time */ +static int pca954x_reg_write(struct i2c_adapter *adap, + struct i2c_client *client, u8 val) +{ + union i2c_smbus_data dummy; + + return __i2c_smbus_xfer(adap, client->addr, client->flags, + I2C_SMBUS_WRITE, val, + I2C_SMBUS_BYTE, &dummy); +} + +static u8 pca954x_regval(struct pca954x *data, u8 chan) +{ + /* We make switches look like muxes, not sure how to be smarter. */ + if (data->chip->muxtype == pca954x_ismux) + return chan | data->chip->enable; + else + return 1 << chan; +} + +static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca954x *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + u8 regval; + int ret = 0; + + regval = pca954x_regval(data, chan); + /* Only select the channel if its different from the last channel */ + if (data->last_chan != regval) { + ret = pca954x_reg_write(muxc->parent, client, regval); + data->last_chan = ret < 0 ? 0 : regval; + } + + return ret; +} + +static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca954x *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + s32 idle_state; + + idle_state = READ_ONCE(data->idle_state); + if (idle_state >= 0) + /* Set the mux back to a predetermined channel */ + return pca954x_select_chan(muxc, idle_state); + + if (idle_state == MUX_IDLE_DISCONNECT) { + /* Deselect active channel */ + data->last_chan = 0; + return pca954x_reg_write(muxc->parent, client, + data->last_chan); + } + + /* otherwise leave as-is */ + + return 0; +} + +static ssize_t idle_state_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca954x *data = i2c_mux_priv(muxc); + + return sprintf(buf, "%d\n", READ_ONCE(data->idle_state)); +} + +static ssize_t idle_state_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca954x *data = i2c_mux_priv(muxc); + int val; + int ret; + + ret = kstrtoint(buf, 0, &val); + if (ret < 0) + return ret; + + if (val != MUX_IDLE_AS_IS && val != MUX_IDLE_DISCONNECT && + (val < 0 || val >= data->chip->nchans)) + return -EINVAL; + + i2c_lock_bus(muxc->parent, I2C_LOCK_SEGMENT); + + WRITE_ONCE(data->idle_state, val); + /* + * Set the mux into a state consistent with the new + * idle_state. + */ + if (data->last_chan || val != MUX_IDLE_DISCONNECT) + ret = pca954x_deselect_mux(muxc, 0); + + i2c_unlock_bus(muxc->parent, I2C_LOCK_SEGMENT); + + return ret < 0 ? ret : count; +} + +static DEVICE_ATTR_RW(idle_state); + +static irqreturn_t pca954x_irq_handler(int irq, void *dev_id) +{ + struct pca954x *data = dev_id; + unsigned long pending; + int ret, i; + + ret = i2c_smbus_read_byte(data->client); + if (ret < 0) + return IRQ_NONE; + + pending = (ret >> PCA954X_IRQ_OFFSET) & (BIT(data->chip->nchans) - 1); + for_each_set_bit(i, &pending, data->chip->nchans) + handle_nested_irq(irq_linear_revmap(data->irq, i)); + + return IRQ_RETVAL(pending); +} + +static int pca954x_irq_set_type(struct irq_data *idata, unsigned int type) +{ + if ((type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_LEVEL_LOW) + return -EINVAL; + return 0; +} + +static struct irq_chip pca954x_irq_chip = { + .name = "i2c-mux-pca954x", + .irq_set_type = pca954x_irq_set_type, +}; + +static int pca954x_irq_setup(struct i2c_mux_core *muxc) +{ + struct pca954x *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + int c, irq; + + if (!data->chip->has_irq || client->irq <= 0) + return 0; + + raw_spin_lock_init(&data->lock); + + data->irq = irq_domain_add_linear(client->dev.of_node, + data->chip->nchans, + &irq_domain_simple_ops, data); + if (!data->irq) + return -ENODEV; + + for (c = 0; c < data->chip->nchans; c++) { + irq = irq_create_mapping(data->irq, c); + if (!irq) { + dev_err(&client->dev, "failed irq create map\n"); + return -EINVAL; + } + irq_set_chip_data(irq, data); + irq_set_chip_and_handler(irq, &pca954x_irq_chip, + handle_simple_irq); + } + + return 0; +} + +static void pca954x_cleanup(struct i2c_mux_core *muxc) +{ + struct pca954x *data = i2c_mux_priv(muxc); + int c, irq; + + if (data->irq) { + for (c = 0; c < data->chip->nchans; c++) { + irq = irq_find_mapping(data->irq, c); + irq_dispose_mapping(irq); + } + irq_domain_remove(data->irq); + } + i2c_mux_del_adapters(muxc); +} + +static int pca954x_init(struct i2c_client *client, struct pca954x *data) +{ + int ret; + + if (data->idle_state >= 0) + data->last_chan = pca954x_regval(data, data->idle_state); + else + data->last_chan = 0; /* Disconnect multiplexer */ + + ret = i2c_smbus_write_byte(client, data->last_chan); + if (ret < 0) + data->last_chan = 0; + + return ret; +} + +/* + * I2C init/probing/exit functions + */ +static int pca954x_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = client->adapter; + struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev); + struct device *dev = &client->dev; + struct gpio_desc *gpio; + struct i2c_mux_core *muxc; + struct pca954x *data; + int num, force; + int ret; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + return -ENODEV; + + muxc = i2c_mux_alloc(adap, dev, PCA954X_MAX_NCHANS, sizeof(*data), 0, + pca954x_select_chan, pca954x_deselect_mux); + if (!muxc) + return -ENOMEM; + data = i2c_mux_priv(muxc); + + i2c_set_clientdata(client, muxc); + data->client = client; + + /* Reset the mux if a reset GPIO is specified. */ + gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(gpio)) + return PTR_ERR(gpio); + if (gpio) { + udelay(1); + gpiod_set_value_cansleep(gpio, 0); + /* Give the chip some time to recover. */ + udelay(1); + } + + data->chip = device_get_match_data(dev); + if (!data->chip) + data->chip = &chips[id->driver_data]; + + if (data->chip->id.manufacturer_id != I2C_DEVICE_ID_NONE) { + struct i2c_device_identity id; + + ret = i2c_get_device_id(client, &id); + if (ret && ret != -EOPNOTSUPP) + return ret; + + if (!ret && + (id.manufacturer_id != data->chip->id.manufacturer_id || + id.part_id != data->chip->id.part_id)) { + dev_warn(dev, "unexpected device id %03x-%03x-%x\n", + id.manufacturer_id, id.part_id, + id.die_revision); + return -ENODEV; + } + } + + data->idle_state = MUX_IDLE_AS_IS; + if (device_property_read_u32(dev, "idle-state", &data->idle_state)) { + if (device_property_read_bool(dev, "i2c-mux-idle-disconnect")) + data->idle_state = MUX_IDLE_DISCONNECT; + } + + /* + * Write the mux register at addr to verify + * that the mux is in fact present. This also + * initializes the mux to a channel + * or disconnected state. + */ + ret = pca954x_init(client, data); + if (ret < 0) { + dev_warn(dev, "probe failed\n"); + return -ENODEV; + } + + ret = pca954x_irq_setup(muxc); + if (ret) + goto fail_cleanup; + + /* Now create an adapter for each channel */ + for (num = 0; num < data->chip->nchans; num++) { + force = 0; /* dynamic adap number */ + if (pdata) { + if (num < pdata->num_modes) { + /* force static number */ + force = pdata->modes[num].adap_id; + } else + /* discard unconfigured channels */ + break; + } + + ret = i2c_mux_add_adapter(muxc, force, num, 0); + if (ret) + goto fail_cleanup; + } + + if (data->irq) { + ret = devm_request_threaded_irq(dev, data->client->irq, + NULL, pca954x_irq_handler, + IRQF_ONESHOT | IRQF_SHARED, + "pca954x", data); + if (ret) + goto fail_cleanup; + } + + /* + * The attr probably isn't going to be needed in most cases, + * so don't fail completely on error. + */ + device_create_file(dev, &dev_attr_idle_state); + + dev_info(dev, "registered %d multiplexed busses for I2C %s %s\n", + num, data->chip->muxtype == pca954x_ismux + ? "mux" : "switch", client->name); + + return 0; + +fail_cleanup: + pca954x_cleanup(muxc); + return ret; +} + +static void pca954x_remove(struct i2c_client *client) +{ + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + + device_remove_file(&client->dev, &dev_attr_idle_state); + + pca954x_cleanup(muxc); +} + +#ifdef CONFIG_PM_SLEEP +static int pca954x_resume(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca954x *data = i2c_mux_priv(muxc); + int ret; + + ret = pca954x_init(client, data); + if (ret < 0) + dev_err(&client->dev, "failed to verify mux presence\n"); + + return ret; +} +#endif + +static SIMPLE_DEV_PM_OPS(pca954x_pm, NULL, pca954x_resume); + +static struct i2c_driver pca954x_driver = { + .driver = { + .name = "cls_pca954x", + .pm = &pca954x_pm, + .of_match_table = pca954x_of_match, + }, + .probe = pca954x_probe, + .remove = pca954x_remove, + .id_table = pca954x_id, +}; + +module_i2c_driver(pca954x_driver); + +MODULE_AUTHOR("Rodolfo Giometti "); +MODULE_DESCRIPTION("PCA954x I2C mux/switch driver"); +MODULE_LICENSE("GPL v2"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-pca954x.h b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-pca954x.h new file mode 100644 index 000000000000..2aaacf97cbac --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-pca954x.h @@ -0,0 +1,44 @@ +/* + * + * cls-pca954x.h - I2C multiplexer/switch support + * + * Copyright (c) 2008-2009 Rodolfo Giometti + * Copyright (c) 2008-2009 Eurotech S.p.A. + * Michael Lawnick + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + + +#ifndef _CLS_I2C_PCA954X_H +#define _CLS_I2C_PCA954X_H + +/* Platform data for the PCA954x I2C multiplexers */ + +/* Per channel initialisation data: + * @adap_id: bus number for the adapter. 0 = don't care + * + */ +struct pca954x_platform_mode { + int adap_id; +}; + +/* Per mux/switch data, used with i2c_register_board_info */ +struct pca954x_platform_data { + struct pca954x_platform_mode *modes; + int num_modes; +}; + +#endif /* _CLS_I2C_PCA954X_H */ diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-switchboard.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-switchboard.c new file mode 100644 index 000000000000..35ffc722e5a8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-switchboard.c @@ -0,0 +1,542 @@ +/* + * cls-switchboard.c - PCI device driver for Silverstone Switch board FPGA. + * + * Author: Pradchaya Phucharoen + * + * Copyright (C) 2019 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "xcvr-cls.h" +#include "cls-pca954x.h" + +#define MOD_VERSION "2.1.2" +#define DRV_NAME "cls-switchboard" + +#define I2C_MUX_CHANNEL(_ch, _adap_id) \ + [_ch] = { .adap_id = _adap_id } + +#define FPGA_PCIE_DEVICE_ID 0x7021 +#define MMIO_BAR 0 +#define I2C_BUS_OFS 9 + +/* I2C ocore configurations */ +#define OCORE_REGSHIFT 2 +#define OCORE_IP_CLK_khz 62500 +#define OCORE_BUS_CLK_khz 100 +#define OCORE_REG_IO_WIDTH 1 + +/* Optical port xcvr configuration */ +#define XCVR_REG_SHIFT 2 +#define XCVR_NUM_PORT 34 +#define XCVR_PORT_REG_SIZE 0x10 + +/* i2c_bus_config - an i2c-core resource and platform data + * @id - I2C bus device ID, for identification. + * @res - resources for an i2c-core device. + * @num_res - size of the resources. + * @pdata - a platform data of an i2c-core device. + */ +struct i2c_bus_config { + int id; + struct resource *res; + ssize_t num_res; + struct ocores_i2c_platform_data pdata; +}; + +/* switchbrd_priv - switchboard private data */ +struct switchbrd_priv { + unsigned long base; + int num_i2c_bus; + struct platform_device **i2cbuses_pdev; + struct platform_device *regio_pdev; + struct platform_device *spiflash_pdev; + struct platform_device *xcvr_pdev; +}; + +/* I2C bus speed param */ +static int bus_clock_master_1 = 100; +module_param(bus_clock_master_1, int, 0660); +MODULE_PARM_DESC(bus_clock_master_1, + "I2C master 1 bus speed in KHz 50/80/100/200/400"); + +static int bus_clock_master_2 = 100; +module_param(bus_clock_master_2, int, 0660); +MODULE_PARM_DESC(bus_clock_master_2, + "I2C master 2 bus speed in KHz 50/80/100/200/400"); + +static int bus_clock_master_3 = 100; +module_param(bus_clock_master_3, int, 0660); +MODULE_PARM_DESC(bus_clock_master_3, + "I2C master 3 bus speed in KHz 50/80/100/200/400"); + +static int bus_clock_master_4 = 100; +module_param(bus_clock_master_4, int, 0660); +MODULE_PARM_DESC(bus_clock_master_4, + "I2C master 4 bus speed in KHz 50/80/100/200/400"); + +static int bus_clock_master_5 = 100; +module_param(bus_clock_master_5, int, 0660); +MODULE_PARM_DESC(bus_clock_master_5, + "I2C master 5 bus speed in KHz 50/80/100/200/400"); + +// NOTE: Silverstone i2c channel mapping is very wierd!!! +/* PCA9548 channel config on MASTER BUS 3 */ +static struct pca954x_platform_mode i2c_mux_70_modes[] = { + I2C_MUX_CHANNEL(5, I2C_BUS_OFS + 23), + I2C_MUX_CHANNEL(6, I2C_BUS_OFS + 26), + I2C_MUX_CHANNEL(0, I2C_BUS_OFS + 27), + I2C_MUX_CHANNEL(7, I2C_BUS_OFS + 28), + I2C_MUX_CHANNEL(2, I2C_BUS_OFS + 29), + I2C_MUX_CHANNEL(4, I2C_BUS_OFS + 30), + I2C_MUX_CHANNEL(3, I2C_BUS_OFS + 31), + I2C_MUX_CHANNEL(1, I2C_BUS_OFS + 32) +}; + +static struct pca954x_platform_mode i2c_mux_71_modes[] = { + I2C_MUX_CHANNEL(2, I2C_BUS_OFS + 1), + I2C_MUX_CHANNEL(3, I2C_BUS_OFS + 2), + I2C_MUX_CHANNEL(0, I2C_BUS_OFS + 3), + I2C_MUX_CHANNEL(1, I2C_BUS_OFS + 4), + I2C_MUX_CHANNEL(6, I2C_BUS_OFS + 5), + I2C_MUX_CHANNEL(5, I2C_BUS_OFS + 6), + I2C_MUX_CHANNEL(7, I2C_BUS_OFS + 15), + I2C_MUX_CHANNEL(4, I2C_BUS_OFS + 8) +}; + +static struct pca954x_platform_mode i2c_mux_72_modes[] = { + I2C_MUX_CHANNEL(1, I2C_BUS_OFS + 17), + I2C_MUX_CHANNEL(7, I2C_BUS_OFS + 18), + I2C_MUX_CHANNEL(4, I2C_BUS_OFS + 19), + I2C_MUX_CHANNEL(0, I2C_BUS_OFS + 20), + I2C_MUX_CHANNEL(5, I2C_BUS_OFS + 21), + I2C_MUX_CHANNEL(2, I2C_BUS_OFS + 22), + I2C_MUX_CHANNEL(3, I2C_BUS_OFS + 25), + I2C_MUX_CHANNEL(6, I2C_BUS_OFS + 24) +}; + +static struct pca954x_platform_mode i2c_mux_73_modes[] = { + I2C_MUX_CHANNEL(4, I2C_BUS_OFS + 9), + I2C_MUX_CHANNEL(3, I2C_BUS_OFS + 10), + I2C_MUX_CHANNEL(6, I2C_BUS_OFS + 11), + I2C_MUX_CHANNEL(2, I2C_BUS_OFS + 12), + I2C_MUX_CHANNEL(1, I2C_BUS_OFS + 13), + I2C_MUX_CHANNEL(5, I2C_BUS_OFS + 14), + I2C_MUX_CHANNEL(7, I2C_BUS_OFS + 7), + I2C_MUX_CHANNEL(0, I2C_BUS_OFS + 16) +}; + +static struct pca954x_platform_data om_muxes[] = { + { + .modes = i2c_mux_70_modes, + .num_modes = ARRAY_SIZE(i2c_mux_70_modes), + }, + { + .modes = i2c_mux_71_modes, + .num_modes = ARRAY_SIZE(i2c_mux_71_modes), + }, + { + .modes = i2c_mux_72_modes, + .num_modes = ARRAY_SIZE(i2c_mux_72_modes), + }, + { + .modes = i2c_mux_73_modes, + .num_modes = ARRAY_SIZE(i2c_mux_73_modes), + }, +}; + +/* Optical Module bus 3 i2c muxes info */ +static struct i2c_board_info i2c_info_3[] = { + { + I2C_BOARD_INFO("cls_pca9548", 0x70), + .platform_data = &om_muxes[0], + }, + { + I2C_BOARD_INFO("cls_pca9548", 0x71), + .platform_data = &om_muxes[1], + }, + { + I2C_BOARD_INFO("cls_pca9548", 0x72), + .platform_data = &om_muxes[2], + }, + { + I2C_BOARD_INFO("cls_pca9548", 0x73), + .platform_data = &om_muxes[3], + }, +}; + +/* RESOURCE SEPERATES BY FUNCTION */ +/* Resource IOMEM for i2c bus 1 */ +static struct resource cls_i2c_res_1[] = { + { + .start = 0x800, .end = 0x81F, + .flags = IORESOURCE_MEM,}, +}; + +/* Resource IOMEM for i2c bus 2 */ +static struct resource cls_i2c_res_2[] = { + { + .start = 0x820, .end = 0x83F, + .flags = IORESOURCE_MEM,}, +}; + +/* Resource IOMEM for i2c bus 3 */ +static struct resource cls_i2c_res_3[] = { + { + .start = 0x840, .end = 0x85F, + .flags = IORESOURCE_MEM,}, +}; + +/* Resource IOMEM for i2c bus 4 */ +static struct resource cls_i2c_res_4[] = { + { + .start = 0x860, .end = 0x87F, + .flags = IORESOURCE_MEM,}, +}; + +/* Resource IOMEM for i2c bus 5 */ +static struct resource cls_i2c_res_5[] = { + { + .start = 0x880, .end = 0x89F, + .flags = IORESOURCE_MEM,}, +}; + +/* Resource IOMEM for reg access */ +static struct resource reg_io_res[] = { + { + .start = 0x00, .end = 0xFF, + .flags = IORESOURCE_MEM,}, +}; + +/* Resource IOMEM for spi flash firmware upgrade */ +static struct resource spi_flash_res[] = { + { + .start = 0x1200, .end = 0x121F, + .flags = IORESOURCE_MEM,}, +}; + +/* Resource IOMEM for front panel XCVR */ +static struct resource xcvr_res[] = { + { + .start = 0x4000, .end = 0x421F, + .flags = IORESOURCE_MEM,}, +}; + +static struct i2c_bus_config i2c_bus_configs[] = { + { + .id = 1, + .res = cls_i2c_res_1, + .num_res = ARRAY_SIZE(cls_i2c_res_1), + .pdata = { + .reg_shift = OCORE_REGSHIFT, + .reg_io_width = OCORE_REG_IO_WIDTH, + .clock_khz = OCORE_IP_CLK_khz, + .bus_khz = OCORE_BUS_CLK_khz, + .big_endian = false, + .num_devices = 0, + .devices = NULL, + }, + }, + { + .id = 2, + .res = cls_i2c_res_2, + .num_res = ARRAY_SIZE(cls_i2c_res_2), + .pdata = { + .reg_shift = OCORE_REGSHIFT, + .reg_io_width = OCORE_REG_IO_WIDTH, + .clock_khz = OCORE_IP_CLK_khz, + .bus_khz = OCORE_BUS_CLK_khz, + .big_endian = false, + .num_devices = 0, + .devices = NULL, + }, + }, + { + .id = 3, + .res = cls_i2c_res_3, + .num_res = ARRAY_SIZE(cls_i2c_res_3), + .pdata = { + .reg_shift = OCORE_REGSHIFT, + .reg_io_width = OCORE_REG_IO_WIDTH, + .clock_khz = OCORE_IP_CLK_khz, + .bus_khz = OCORE_BUS_CLK_khz, + .big_endian = false, + .num_devices = ARRAY_SIZE(i2c_info_3), + .devices = i2c_info_3, + }, + }, + { + .id = 4, + .res = cls_i2c_res_4, + .num_res = ARRAY_SIZE(cls_i2c_res_4), + .pdata = { + .reg_shift = OCORE_REGSHIFT, + .reg_io_width = OCORE_REG_IO_WIDTH, + .clock_khz = OCORE_IP_CLK_khz, + .bus_khz = OCORE_BUS_CLK_khz, + .big_endian = false, + .num_devices = 0, + .devices = NULL, + }, + }, + { + .id = 5, + .res = cls_i2c_res_5, + .num_res = ARRAY_SIZE(cls_i2c_res_5), + .pdata = { + .reg_shift = OCORE_REGSHIFT, + .reg_io_width = OCORE_REG_IO_WIDTH, + .clock_khz = OCORE_IP_CLK_khz, + .bus_khz = OCORE_BUS_CLK_khz, + .big_endian = false, + .num_devices = 0, + .devices = NULL, + }, + }, +}; + +/* xcvr front panel mapping */ +static struct port_info front_panel_ports[] = { + {"QSFP1", 1, QSFP}, + {"QSFP2", 2, QSFP}, + {"QSFP3", 3, QSFP}, + {"QSFP4", 4, QSFP}, + {"QSFP5", 5, QSFP}, + {"QSFP6", 6, QSFP}, + {"QSFP7", 7, QSFP}, + {"QSFP8", 8, QSFP}, + {"QSFP9", 9, QSFP}, + {"QSFP10", 10, QSFP}, + {"QSFP11", 11, QSFP}, + {"QSFP12", 12, QSFP}, + {"QSFP13", 13, QSFP}, + {"QSFP14", 14, QSFP}, + {"QSFP15", 15, QSFP}, + {"QSFP16", 16, QSFP}, + {"QSFP17", 17, QSFP}, + {"QSFP18", 18, QSFP}, + {"QSFP19", 19, QSFP}, + {"QSFP20", 20, QSFP}, + {"QSFP21", 21, QSFP}, + {"QSFP22", 22, QSFP}, + {"QSFP23", 23, QSFP}, + {"QSFP24", 24, QSFP}, + {"QSFP25", 25, QSFP}, + {"QSFP26", 26, QSFP}, + {"QSFP27", 27, QSFP}, + {"QSFP28", 28, QSFP}, + {"QSFP29", 29, QSFP}, + {"QSFP30", 30, QSFP}, + {"QSFP31", 31, QSFP}, + {"QSFP32", 32, QSFP}, + {"SFP1", 33, SFP}, + {"SFP2", 34, SFP} + /* END OF LIST */ +}; + +static struct cls_xcvr_platform_data xcvr_data = { + .port_reg_size = 0x10, + .num_ports = ARRAY_SIZE(front_panel_ports), + .devices = front_panel_ports, +}; + + +// TODO: Add a platform configuration struct, and use probe as a factory, +// so xcvr, fwupgrade device can configured as options. + +static int cls_fpga_probe(struct pci_dev *dev, const struct pci_device_id *id) +{ + + struct switchbrd_priv *priv; + struct platform_device **i2cbuses_pdev; + struct platform_device *regio_pdev; + struct platform_device *xcvr_pdev; + unsigned long rstart; + int num_i2c_bus, i; + int err; + + err = pci_enable_device(dev); + if (err){ + dev_err(&dev->dev, "Failed to enable PCI device\n"); + goto err_exit; + } + + /* Check for valid MMIO address */ + rstart = pci_resource_start(dev, MMIO_BAR); + if (!rstart) { + dev_err(&dev->dev, "Switchboard base address uninitialized, " + "check FPGA\n"); + err = -ENODEV; + goto err_disable_device; + } + + dev_dbg(&dev->dev, "BAR%d res: 0x%lx-0x%llx\n", MMIO_BAR, + rstart, pci_resource_end(dev, MMIO_BAR)); + + priv = devm_kzalloc(&dev->dev, + sizeof(struct switchbrd_priv), GFP_KERNEL); + if (!priv){ + err = -ENOMEM; + goto err_disable_device; + } + + pci_set_drvdata(dev, priv); + num_i2c_bus = ARRAY_SIZE(i2c_bus_configs); + i2cbuses_pdev = devm_kzalloc( + &dev->dev, + num_i2c_bus * sizeof(struct platform_device*), + GFP_KERNEL); + + reg_io_res[0].start += rstart; + reg_io_res[0].end += rstart; + + xcvr_res[0].start += rstart; + xcvr_res[0].end += rstart; + + regio_pdev = platform_device_register_resndata( + &dev->dev, "cls-swbrd-io", + -1, + reg_io_res, ARRAY_SIZE(reg_io_res), + NULL, 0); + + if (IS_ERR(regio_pdev)) { + dev_err(&dev->dev, "Failed to register cls-swbrd-io\n"); + err = PTR_ERR(regio_pdev); + goto err_disable_device; + } + + xcvr_pdev = platform_device_register_resndata( + NULL, + "cls-xcvr", + -1, + xcvr_res, + ARRAY_SIZE(xcvr_res), + &xcvr_data, + sizeof(xcvr_data)); + + if (IS_ERR(xcvr_pdev)) { + dev_err(&dev->dev, "Failed to register xcvr node\n"); + err = PTR_ERR(xcvr_pdev); + goto err_unregister_regio; + } + + for(i = 0; i < num_i2c_bus; i++){ + + i2c_bus_configs[i].res[0].start += rstart; + i2c_bus_configs[i].res[0].end += rstart; + + switch (i + 1) { + case 1: + i2c_bus_configs[i].pdata.bus_khz = bus_clock_master_1; + break; + case 2: + i2c_bus_configs[i].pdata.bus_khz = bus_clock_master_2; + break; + case 3: + i2c_bus_configs[i].pdata.bus_khz = bus_clock_master_3; + break; + case 4: + i2c_bus_configs[i].pdata.bus_khz = bus_clock_master_4; + break; + case 5: + i2c_bus_configs[i].pdata.bus_khz = bus_clock_master_5; + break; + default: + i2c_bus_configs[i].pdata.bus_khz = OCORE_BUS_CLK_khz; + } + + dev_dbg(&dev->dev, "i2c-bus.%d: 0x%llx - 0x%llx\n", + i2c_bus_configs[i].id, + i2c_bus_configs[i].res[0].start, + i2c_bus_configs[i].res[0].end); + + i2cbuses_pdev[i] = platform_device_register_resndata( + &dev->dev, "ocores-i2c", + i2c_bus_configs[i].id, + i2c_bus_configs[i].res, + i2c_bus_configs[i].num_res, + &i2c_bus_configs[i].pdata, + sizeof(i2c_bus_configs[i].pdata)); + + if (IS_ERR(i2cbuses_pdev[i])) { + dev_err(&dev->dev, "Failed to register ocores-i2c.%d\n", + i2c_bus_configs[i].id); + err = PTR_ERR(i2cbuses_pdev[i]); + goto err_unregister_ocore; + } + } + + priv->base = rstart; + priv->num_i2c_bus = num_i2c_bus; + priv->i2cbuses_pdev = i2cbuses_pdev; + priv->regio_pdev = regio_pdev; + priv->xcvr_pdev = xcvr_pdev; + return 0; + +err_unregister_ocore: + for(i = 0; i < num_i2c_bus; i++){ + if(priv->i2cbuses_pdev[i]){ + platform_device_unregister(priv->i2cbuses_pdev[i]); + } + } +err_unregister_xcvr: + platform_device_unregister(xcvr_pdev); +err_unregister_regio: + platform_device_unregister(regio_pdev); +err_disable_device: + pci_disable_device(dev); +err_exit: + return err; +} + +static int cls_fpga_remove(struct pci_dev *dev) +{ + int i; + struct switchbrd_priv *priv = pci_get_drvdata(dev); + + for(i = 0; i < priv->num_i2c_bus; i++){ + if(priv->i2cbuses_pdev[i]) + platform_device_unregister(priv->i2cbuses_pdev[i]); + } + platform_device_unregister(priv->xcvr_pdev); + platform_device_unregister(priv->regio_pdev); + pci_disable_device(dev); + return 0; +}; + +static const struct pci_device_id pci_clsswbrd[] = { + { PCI_VDEVICE(XILINX, FPGA_PCIE_DEVICE_ID) }, + {0, } +}; + +MODULE_DEVICE_TABLE(pci, pci_clsswbrd); + +static struct pci_driver clsswbrd_pci_driver = { + .name = DRV_NAME, + .id_table = pci_clsswbrd, + .probe = cls_fpga_probe, + .remove = cls_fpga_remove, +}; + +module_pci_driver(clsswbrd_pci_driver); + +MODULE_AUTHOR("Pradchaya P."); +MODULE_DESCRIPTION("Celestica Silverstone switchboard driver"); +MODULE_VERSION(MOD_VERSION); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switch_cpld.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switch_cpld.c new file mode 100644 index 000000000000..b1900d03245e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switch_cpld.c @@ -0,0 +1,416 @@ +/* + * switch_cpld.c - i2c driver for Silverstone switchboard CPLD1/CPLD2 + * provides sysfs interfaces to access CPLD register and control port LEDs + * + * Author: Budsakol Sirirattanasakul + * + * Copyright (C) 2019 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#include +#include +#include +#include +#include +#include + +#define CPLD1_ADDR 0x30 +#define CPLD2_ADDR 0x31 + +#define SCRATCH_ADDR 0x01 +#define LED_OPMODE 0x09 +#define LED_TEST 0x0A + +struct switch_cpld_data { + struct mutex lock; + struct i2c_client *client; + struct i2c_client *client2; + uint8_t read_addr; +}; + +static ssize_t getreg_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct switch_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int value; + + value = i2c_smbus_read_byte_data(client, data->read_addr); + if (value < 0) + return value; + + return sprintf(buf, "0x%.2x\n", value); +} + +static ssize_t getreg_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t size) +{ + uint8_t value; + ssize_t status; + struct switch_cpld_data *data = dev_get_drvdata(dev); + + status = kstrtou8(buf, 0, &value); + if (status != 0) + return status; + + data->read_addr = value; + + return size; +} + +static ssize_t setreg_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t size) +{ + uint8_t addr, value; + ssize_t status; + struct switch_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + char *tok; + + tok = strsep((char **)&buf, " "); + if (tok == NULL) + return -EINVAL; + status = kstrtou8(tok, 0, &addr); + if (status != 0) + return status; + + tok = strsep((char **)&buf, " "); + if (tok == NULL) + return -EINVAL; + status = kstrtou8(tok, 0, &value); + if (status != 0) + return status; + + status = i2c_smbus_write_byte_data(client, addr, value); + if (status == 0) + status = size; + return status; +} + +static ssize_t scratch_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct switch_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int value; + + value = i2c_smbus_read_byte_data(client, SCRATCH_ADDR); + if (value < 0) + return value; + + return sprintf(buf, "0x%.2x\n", value); +} + +static ssize_t scratch_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t size) +{ + uint8_t value; + ssize_t status; + struct switch_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + + status = kstrtou8(buf, 0, &value); + if (status != 0) + return status; + status = i2c_smbus_write_byte_data(client, SCRATCH_ADDR, value); + if (status == 0) + status = size; + return status; +} + +DEVICE_ATTR_RW(getreg); +DEVICE_ATTR_WO(setreg); +DEVICE_ATTR_RW(scratch); + +static struct attribute *switch_cpld_attrs[] = { + &dev_attr_getreg.attr, + &dev_attr_setreg.attr, + &dev_attr_scratch.attr, + NULL, +}; +ATTRIBUTE_GROUPS(switch_cpld); + +static ssize_t port_led_mode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int led_mode_1, led_mode_2; + struct switch_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client1 = data->client; + struct i2c_client *client2 = data->client2; + + led_mode_1 = i2c_smbus_read_byte_data(client1, LED_OPMODE); + if (led_mode_1 < 0) + return led_mode_1; + + led_mode_2 = i2c_smbus_read_byte_data(client2, LED_OPMODE); + if (led_mode_2 < 0) + return led_mode_2; + + return sprintf(buf, "%s %s\n", + led_mode_1 ? "test" : "normal", + led_mode_2 ? "test" : "normal"); +} + +static ssize_t port_led_mode_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int status; + uint8_t led_mode; + struct switch_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client1 = data->client; + struct i2c_client *client2 = data->client2; + + if (sysfs_streq(buf, "test")) + led_mode = 0x01; + else if (sysfs_streq(buf, "normal")) + led_mode = 0x00; + else + return -EINVAL; + + status = i2c_smbus_write_byte_data(client1, LED_OPMODE, led_mode); + if (status != 0) { + return status; + } + + status = i2c_smbus_write_byte_data(client2, LED_OPMODE, led_mode); + if (status != 0) { + return status; + } + + return size; +} + +static ssize_t port_led_color_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int led_color1, led_color2; + struct switch_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client1 = data->client; + struct i2c_client *client2 = data->client2; + + led_color1 = i2c_smbus_read_byte_data(client1, LED_TEST); + if (led_color1 < 0) + return led_color1; + + led_color2 = i2c_smbus_read_byte_data(client2, LED_TEST); + if (led_color2 < 0) + return led_color2; + + return sprintf(buf, "%s %s\n", + led_color1 == 0x07 ? "off" : led_color1 == 0x06 ? "green" : led_color1 == 0x05 ? + "red" : led_color1 == 0x04 ? + "yellow" : led_color1 == 0x03 ? "blue" : led_color1 == 0x02 ? "cyan" : + led_color1 == 0x01 ? "magenta" : "white", + led_color2 == 0x07 ? "off" : led_color2 == 0x06 ? "green" : led_color2 == 0x05 ? + "red" : led_color2 == 0x04 ? + "yellow" : led_color2 == 0x03 ? "blue" : led_color2 == 0x02 ? "cyan" : + led_color2 == 0x01 ? "magenta" : "white"); +} + +static ssize_t port_led_color_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int status; + uint8_t led_color; + struct switch_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client1 = data->client; + struct i2c_client *client2 = data->client2; + + if (sysfs_streq(buf, "off")) + led_color = 0x07; + else if (sysfs_streq(buf, "green")) + led_color = 0x06; + else if (sysfs_streq(buf, "red")) + led_color = 0x05; + else if (sysfs_streq(buf, "yellow")) + led_color = 0x04; + else if (sysfs_streq(buf, "blue")) + led_color = 0x03; + else if (sysfs_streq(buf, "cyan")) + led_color = 0x02; + else if (sysfs_streq(buf, "magenta")) + led_color = 0x01; + else if (sysfs_streq(buf, "white")) + led_color = 0x00; + else + return -EINVAL; + + status = i2c_smbus_write_byte_data(client1, LED_TEST, led_color); + if (status != 0) { + return status; + } + + status = i2c_smbus_write_byte_data(client2, LED_TEST, led_color); + if (status != 0) { + return status; + } + + return size; +} + +DEVICE_ATTR_RW(port_led_mode); +DEVICE_ATTR_RW(port_led_color); + +static struct attribute *sff_led_attrs[] = { + &dev_attr_port_led_mode.attr, + &dev_attr_port_led_color.attr, + NULL, +}; + +static struct attribute_group sff_led_groups = { + .attrs = sff_led_attrs, +}; + +static int switch_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int err; + struct switch_cpld_data *drvdata1, *drvdata2; + struct device *hwmon_dev1, *hwmon_dev2; + struct i2c_client *client2; + + if (client->addr != CPLD1_ADDR) { + dev_err(&client->dev, "probe, bad i2c addr: 0x%x\n", + client->addr); + err = -EINVAL; + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) + return -EPFNOSUPPORT; + + /* CPLD1 */ + drvdata1 = devm_kzalloc(&client->dev, + sizeof(struct switch_cpld_data), GFP_KERNEL); + + if (!drvdata1) { + err = -ENOMEM; + goto exit; + } + + mutex_init(&drvdata1->lock); + drvdata1->client = client; + drvdata1->read_addr = 0x00; + i2c_set_clientdata(client, drvdata1); + hwmon_dev1 = devm_hwmon_device_register_with_groups(&client->dev, + "CPLD1", + drvdata1, + switch_cpld_groups); + + if (IS_ERR(hwmon_dev1)) { + err = PTR_ERR(hwmon_dev1); + goto exit; + } + + err = sysfs_create_link(&client->dev.kobj, &hwmon_dev1->kobj, "CPLD1"); + if (err) { + goto exit; + } + + /* CPLD2 */ + drvdata2 = devm_kzalloc(&client->dev, + sizeof(struct switch_cpld_data), GFP_KERNEL); + + if (!drvdata2) { + err = -ENOMEM; + goto err_link; + } + + client2 = i2c_new_dummy_device(client->adapter, CPLD2_ADDR); + if (!client2) { + dev_err(&client->dev, "address 0x%02x unavailable\n", + CPLD2_ADDR); + err = -EADDRINUSE; + goto err_link; + } + + mutex_init(&drvdata2->lock); + drvdata2->read_addr = 0x00; + drvdata2->client = client2; + i2c_set_clientdata(client2, drvdata2); + + /* attach client2 to be client2 of CPLD1 + for later use on port led sysfs */ + drvdata1->client2 = client2; + + hwmon_dev2 = devm_hwmon_device_register_with_groups(&client2->dev, + "CPLD2", + drvdata2, + switch_cpld_groups); + + if (IS_ERR(hwmon_dev2)) { + err = PTR_ERR(hwmon_dev2); + goto err_client2; + } + + err = sysfs_create_link(&client2->dev.kobj, &hwmon_dev2->kobj, "CPLD2"); + if (err) { + goto err_client2; + } + + //port led + err = sysfs_create_group(&client->dev.kobj, &sff_led_groups); + if (err) { + dev_err(&client->dev, + "failed to create sysfs attribute group.\n"); + goto err_link2; + } + + return 0; + +err_link2: + sysfs_remove_link(&client2->dev.kobj, "CPLD2"); + +err_client2: + if (client2) + i2c_unregister_device(client2); + +err_link: + sysfs_remove_link(&client->dev.kobj, "CPLD1"); + +exit: + dev_err(&client->dev, "probe error %d\n", err); + return err; +} + +static void switch_cpld_remove(struct i2c_client *client) +{ + struct switch_cpld_data *data = i2c_get_clientdata(client); + + sysfs_remove_group(&client->dev.kobj, &sff_led_groups); + sysfs_remove_link(&data->client2->dev.kobj, "CPLD2"); + sysfs_remove_link(&client->dev.kobj, "CPLD1"); + i2c_unregister_device(data->client2); +} + +static const struct i2c_device_id switch_cpld_ids[] = { + { "switch_cpld", 0x30 }, + { } +}; + +MODULE_DEVICE_TABLE(i2c, switch_cpld_ids); + +static struct i2c_driver switch_cpld_driver = { + .driver = { + .name = "switch_cpld", + .owner = THIS_MODULE, + }, + .probe = switch_cpld_probe, + .remove = switch_cpld_remove, + .id_table = switch_cpld_ids, +}; + +module_i2c_driver(switch_cpld_driver); + +MODULE_AUTHOR("Budsakol Sirirattanasakul"); +MODULE_DESCRIPTION("Celestica Silverstone Switchboard CPLD driver"); +MODULE_VERSION("1.0.0"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.c new file mode 100644 index 000000000000..10fda963b9b3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.c @@ -0,0 +1,520 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * xcvr-cls.c - front panel port control. + * + * Pradchaya Phucharoen + * Copyright (C) 2019 Celestica Corp. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "xcvr-cls.h" + +/* FPGA front panel */ +#define PORT_CTRL 0 +#define PORT_STATUS 0x4 +#define PORT_INT_STATUS 0x8 +#define PORT_INT_MASK 0xC + +/* + * Port control degister + * LPMOD : active high, RW + * RST : active low, RW + * TXDIS : active high, RW +*/ +#define CTRL_LPMOD BIT(6) +#define CTRL_RST_L BIT(4) +#define CTRL_TXDIS BIT(0) + +/* + * Port status register + * IRQ : active low, RO + * PRESENT : active low, RO, for QSFP + * TXFAULT : active high, RO + * RXLOS : active high, RO + * MODABS : active high, RO, for SFP +*/ +#define STAT_IRQ_L BIT(5) +#define STAT_PRESENT_L BIT(4) +#define STAT_TXFAULT BIT(2) +#define STAT_RXLOS BIT(1) +#define STAT_MODABS BIT(0) + +/* + * NOTE: Interrupt and mask must be expose as bitfeild. + * Because the registers of interrupt flags are read-clear. + * + * Port interrupt flag resgister + * INT_N : interrupt flag, set when INT_N is assert. + * PRESENT : interrupt flag, set when QSFP module plugin/plugout. + * RXLOS : interrupt flag, set when rxlos is assert. + * MODABS : interrupt flag, set when SFP module plugin/plugout. +*/ +#define INTR_INT_N BIT(5) +#define INTR_PRESENT BIT(4) +#define INTR_TXFAULT BIT(2) +#define INTR_RXLOS BIT(1) +#define INTR_MODABS BIT(0) + +/* + * Port interrupt mask register + * INT_N : active low + * PRESENT : active low + * RXLOS_INT : active low + * MODABS : active low +*/ +#define MASK_INT_N_L BIT(5) +#define MASK_PRESENT_L BIT(4) +#define MASK_TXFAULT_L BIT(2) +#define MASK_RXLOS_L BIT(1) +#define MASK_MODABS_L BIT(0) + + +/* + * port_data - optical port data + * @xcvr: xcvr memory accessor + * @name: port name + * @index: front panel port index starting from 1 + */ +struct port_data { + struct xcvr_priv *xcvr; + const char *name; + unsigned int index; +}; + +/* + * xcvr_priv - port xcvr private data + * @dev: device for reference + * @base: virtual base address + * @num_ports: number of front panel ports + * @fp_devs: list of front panel port devices + */ +struct xcvr_priv { + struct device* dev; + void __iomem *base; + int port_reg_size; + int num_ports; + struct device **fp_devs; +}; + +static inline void port_setreg(struct xcvr_priv *xcvr, int reg, int index, u8 value) +{ + return iowrite8(value, xcvr->base + reg + (index - 1) * xcvr->port_reg_size); +} + +static inline u8 port_getreg(struct xcvr_priv *xcvr, int reg, int index) +{ + return ioread8(xcvr->base + reg + (index - 1) * xcvr->port_reg_size); +} + +static ssize_t qsfp_modprsL_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_STATUS, index); + return sprintf(buf, "%d\n", (data & STAT_PRESENT_L)?1:0); +} + +static ssize_t qsfp_irqL_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_STATUS, index); + return sprintf(buf, "%d\n", (data & STAT_IRQ_L)?1:0); +} + +static ssize_t qsfp_lpmode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_CTRL, index); + return sprintf(buf, "%d\n", (data & CTRL_LPMOD)?1:0); +} + +static ssize_t qsfp_lpmode_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + ssize_t status; + long value; + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + status = kstrtol(buf, 0, &value); + if (status == 0) { + data = port_getreg(port_data->xcvr, PORT_CTRL, index); + if (value == 0) + data &= ~CTRL_LPMOD; + else + data |= CTRL_LPMOD; + port_setreg(port_data->xcvr, PORT_CTRL, index, data); + status = size; + } + return status; +} + +static ssize_t qsfp_resetL_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_CTRL, index); + return sprintf(buf, "%d\n", (data & CTRL_RST_L)?1:0); +} + +static ssize_t qsfp_resetL_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + ssize_t status; + long value; + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + status = kstrtol(buf, 0, &value); + if (status == 0) { + data = port_getreg(port_data->xcvr, PORT_CTRL, index); + if (value == 0) + data &= ~CTRL_RST_L; + else + data |= CTRL_RST_L; + port_setreg(port_data->xcvr, PORT_CTRL, index, data); + status = size; + } + return status; +} + +static ssize_t sfp_modabs_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_STATUS, index); + return sprintf(buf, "%d\n", (data & STAT_MODABS)?1:0); +} + +static ssize_t sfp_txfault_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_STATUS, index); + return sprintf(buf, "%d\n", (data & STAT_TXFAULT)?1:0); +} + +static ssize_t sfp_rxlos_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_STATUS, index); + return sprintf(buf, "%d\n", (data & STAT_RXLOS)?1:0); +} + +static ssize_t sfp_txdisable_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_CTRL, index); + return sprintf(buf, "%d\n", (data & CTRL_TXDIS)?1:0); +} + +static ssize_t sfp_txdisable_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + ssize_t status; + long value; + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + status = kstrtol(buf, 0, &value); + if (status == 0) { + data = port_getreg(port_data->xcvr, PORT_CTRL, index); + if (value == 0) + data &= ~CTRL_TXDIS; + else + data |= CTRL_TXDIS; + port_setreg(port_data->xcvr, PORT_CTRL, index, data); + status = size; + } + return status; +} + +static ssize_t interrupt_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_INT_STATUS, index); + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t interrupt_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + ssize_t status; + long value; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + status = kstrtoul(buf, 0, &value); + if (status == 0) { + port_setreg(port_data->xcvr, PORT_INT_STATUS, index, value); + status = size; + } + return status; +} + +static ssize_t interrupt_mask_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_INT_MASK, index); + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t interrupt_mask_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + ssize_t status; + long value; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + status = kstrtoul(buf, 0, &value); + if (status == 0) { + port_setreg(port_data->xcvr, PORT_INT_MASK, index, value); + status = size; + } + return status; +} + +DEVICE_ATTR_RO(qsfp_modprsL); +DEVICE_ATTR_RO(qsfp_irqL); +DEVICE_ATTR_RW(qsfp_lpmode); +DEVICE_ATTR_RW(qsfp_resetL); + +DEVICE_ATTR_RO(sfp_modabs); +DEVICE_ATTR_RO(sfp_txfault); +DEVICE_ATTR_RO(sfp_rxlos); +DEVICE_ATTR_RW(sfp_txdisable); + +DEVICE_ATTR_RW(interrupt); +DEVICE_ATTR_RW(interrupt_mask); + +/* qsfp_attrs */ +static struct attribute *qsfp_attrs[] = { + &dev_attr_qsfp_modprsL.attr, + &dev_attr_qsfp_lpmode.attr, + &dev_attr_qsfp_resetL.attr, + &dev_attr_interrupt.attr, + &dev_attr_interrupt_mask.attr, + NULL +}; + +/* sfp_attrs */ +static struct attribute *sfp_attrs[] = { + &dev_attr_sfp_modabs.attr, + &dev_attr_sfp_txfault.attr, + &dev_attr_sfp_rxlos.attr, + &dev_attr_sfp_txdisable.attr, + &dev_attr_interrupt.attr, + &dev_attr_interrupt_mask.attr, + NULL +}; + +ATTRIBUTE_GROUPS(qsfp); +ATTRIBUTE_GROUPS(sfp); + +/* A single port device init */ +static struct device* init_port(struct device *dev, + struct xcvr_priv *xcvr, + struct port_info info, + const struct attribute_group **groups) +{ + struct port_data *new_data; + + new_data = devm_kzalloc(dev, sizeof(struct port_data), GFP_KERNEL); + if (!new_data) + return ERR_PTR(-ENOMEM); + + new_data->index = info.index; + new_data->name = info.name; + new_data->xcvr = xcvr; + + return devm_hwmon_device_register_with_groups(dev, + info.name, + new_data, + groups); +} + +static void xcvr_cleanup(struct xcvr_priv *xcvr) +{ + struct device *dev; + struct port_data *data; + int i; + + for (i = 0; i < xcvr->num_ports; i++){ + dev = xcvr->fp_devs[i]; + if (dev == NULL) + continue; + data = dev_get_drvdata(dev); + sysfs_remove_link(&xcvr->dev->kobj, data->name); + } +} + +static int cls_xcvr_probe(struct platform_device *pdev) +{ + + struct xcvr_priv *xcvr; + struct cls_xcvr_platform_data *pdata; + struct resource *res; + int ret; + int i; + + struct device **port_devs; + + xcvr = devm_kzalloc(&pdev->dev, sizeof(struct xcvr_priv), GFP_KERNEL); + if (!xcvr){ + ret = -ENOMEM; + goto err_exit; + } + + dev_set_drvdata(&pdev->dev, xcvr); + + /* mmap resource */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res) { + xcvr->base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(xcvr->base)){ + ret = PTR_ERR(xcvr->base); + goto err_exit; + } + } + + pdata = dev_get_platdata(&pdev->dev); + xcvr->dev = &pdev->dev; + + if (pdata) { + /* assign pdata */ + xcvr->num_ports = pdata->num_ports; + xcvr->port_reg_size = pdata->port_reg_size; + } + + /* alloc front panel device list */ + port_devs = devm_kzalloc(&pdev->dev, + xcvr->num_ports * sizeof(struct device*), + GFP_KERNEL); + if (!port_devs){ + ret = -ENOMEM; + goto err_exit; + } + + + if (pdata) { + /* create each device attrs group determined by type */ + for (i = 0; i < pdata->num_ports; i++) { + struct device *fp_dev; + + if (pdata->devices[i].type == SFP){ + fp_dev = init_port(&pdev->dev, + xcvr, + pdata->devices[i], + sfp_groups); + }else{ + fp_dev = init_port(&pdev->dev, + xcvr, + pdata->devices[i], + qsfp_groups); + } + if (IS_ERR(fp_dev)) { + dev_err(&pdev->dev, + "Failed to init port %s\n", + pdata->devices[i].name); + ret = PTR_ERR(fp_dev); + goto dev_clean_up; + } + + dev_info(&pdev->dev, + "Register port %s\n", + pdata->devices[i].name); + + WARN(sysfs_create_link(&pdev->dev.kobj, + &fp_dev->kobj, + pdata->devices[i].name), + "can't create symlink to %s\n", pdata->devices[i].name); + port_devs[i] = fp_dev; + fp_dev = NULL; + } + xcvr->fp_devs = port_devs; + } + + return 0; + +dev_clean_up: + xcvr_cleanup(xcvr); +err_exit: + return ret; + +} + + +static int cls_xcvr_remove(struct platform_device *pdev) +{ + struct xcvr_priv *xcvr = dev_get_drvdata(&pdev->dev); + xcvr_cleanup(xcvr); + return 0; +} + + +static struct platform_driver cls_xcvr_driver = { + .probe = cls_xcvr_probe, + .remove = cls_xcvr_remove, + .driver = { + .name = "cls-xcvr", + }, +}; + +module_platform_driver(cls_xcvr_driver); + +MODULE_AUTHOR("Pradchaya Phucharoen"); +MODULE_DESCRIPTION("Celestica xcvr control driver"); +MODULE_VERSION("0.0.1-3"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:cls-xcvr"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.h b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.h new file mode 100644 index 000000000000..7659a7c0e9cc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.h @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * xcvr-cls.h + * + * Pradchaya Phucharoen + * Copyright (C) 2019 Celestica Corp. + */ + +#ifndef _LINUX_I2C_CLS_H +#define _LINUX_I2C_CLS_H + +enum PORT_TYPE { + NONE = 0, + SFP, + QSFP +}; + +/* + * port_info - optical port info + * @index: front panel port index starting from 1 + * @typr: port type, see *PORT_TYPE* + */ +struct port_info { + const char *name; + unsigned int index; + enum PORT_TYPE type; +}; + +/* + * cls_xcvr_platform_data - port xcvr private data + * @port_reg_size: register range of each port + * @num_ports: number of front panel ports + * @devices: list of front panel port info + */ +struct cls_xcvr_platform_data { + unsigned int port_reg_size; + int num_ports; + struct port_info *devices; +}; + +#endif /* _LINUX_I2C_CLS_H */ \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/platform_sensors.py index 1aa1c0719825..0d4691b60005 100755 --- a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/platform_sensors.py +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/platform_sensors.py @@ -6,28 +6,39 @@ # The following data is support: # 1. Temperature sensors # 2. PSUs -# 3. Fan trays +# 3. Fan Drawers import sys import logging import subprocess -IPMI_SDR_CMD = ["ipmitool", "sdr", "elist"] +IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist'] MAX_NUM_FANS = 7 MAX_NUM_PSUS = 2 +SENSOR_NAME = 0 +SENSOR_VAL = 4 + +sensor_dict = {} def ipmi_sensor_dump(cmd): ''' Execute ipmitool command return dump output exit if any error occur. ''' + global sensor_dict sensor_dump = '' + try: - sensor_dump = subprocess.check_output(cmd) + sensor_dump = subprocess.check_output(cmd, universal_newlines=True) except subprocess.CalledProcessError as e: logging.error('Error! Failed to execute: {}'.format(cmd)) sys.exit(1) - return sensor_dump + + for line in sensor_dump.splitlines(): + sensor_info = line.split('|') + sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip() + + return True def get_reading_by_name(sensor_name, sdr_elist_dump): ''' @@ -49,7 +60,8 @@ def get_reading_by_name(sensor_name, sdr_elist_dump): ''' found = '' - for line in sdr_elist_dump.split("\n"): + for line in sdr_elist_dump.splitlines(): + line = line.decode() if sensor_name in line: found = line.strip() break @@ -67,19 +79,18 @@ def get_reading_by_name(sensor_name, sdr_elist_dump): return found -def read_temperature_sensors(ipmi_sdr_elist): - - sensor_list = [ - ('TEMP_FAN_U52', 'Fan Tray Middle Temp'), - ('TEMP_FAN_U17', 'Fan Tray Right Temp'), - ('TEMP_SW_U52', 'Switchboard Left Inlet Temp'), - ('TEMP_SW_U16', 'Switchboard Right Inlet Temp'), - ('TEMP_BB_U3', 'Baseboard Temp'), - ('TEMP_CPU', 'CPU Internal Temp'), - ('TEMP_SW_Internal', 'ASIC Internal Temp'), - ('SW_U04_Temp', 'IR3595 Chip Left Temp'), - ('SW_U14_Temp', 'IR3595 Chip Right Temp'), - ('SW_U4403_Temp', 'IR3584 Chip Temp'), +def read_temperature_sensors(): + sensor_list = [\ + ('TEMP_FAN_U52', 'Fanboard Center Temp'),\ + ('TEMP_FAN_U17', 'Fanboard Right Temp'),\ + ('TEMP_SW_U52', 'Switchboard Left Temp'),\ + ('TEMP_SW_U16', 'Switchboard Right Temp'),\ + ('TEMP_BB_U3', 'Baseboard Temp'),\ + ('TEMP_CPU', 'CPU Internal Temp'),\ + ('TEMP_SW_Internal', 'ASIC Internal Temp'),\ + ('SW_U04_Temp', 'IR35215 Chip Left Temp'),\ + ('SW_U14_Temp', 'IR35215 Chip Right Temp'),\ + ('SW_U4403_Temp', 'IR3584 Chip Temp'),\ ] output = '' @@ -90,20 +101,18 @@ def read_temperature_sensors(ipmi_sdr_elist): output += "Temperature Sensors\n" output += "Adapter: IPMI adapter\n" for sensor in sensor_list: - reading = get_reading_by_name(sensor[0],ipmi_sdr_elist) - output += sensor_format.format('{}:'.format(sensor[1]), - reading, + output += sensor_format.format('{}:'.format(sensor[1]),\ + sensor_dict[sensor[0]],\ width=str(max_name_width+1)) output += '\n' return output +def read_fan_sensors(num_fans): -def read_fan_sensors(num_fans, ipmi_sdr_elist): - - sensor_list = [ - ('Fan{}_Status', 'Status'), - ('Fan{}_Front', 'Fan {} front'), - ('Fan{}_Rear', 'Fan {} rear'), + sensor_list = [\ + ('Fan{}_Status', 'Fan Drawer {} Status'),\ + ('Fan{}_Front', 'Fan {} front'),\ + ('Fan{}_Rear', 'Fan {} rear'),\ ] output = '' @@ -111,33 +120,31 @@ def read_fan_sensors(num_fans, ipmi_sdr_elist): # Find max length of sensor calling name max_name_width = max(len(sensor[1]) for sensor in sensor_list) - output += "Fan Trays\n" + output += "Fan Drawers\n" output += "Adapter: IPMI adapter\n" for fan_num in range(1, num_fans+1): for sensor in sensor_list: ipmi_sensor_name = sensor[0].format(fan_num) display_sensor_name = sensor[1].format(fan_num) - reading = get_reading_by_name(ipmi_sensor_name, ipmi_sdr_elist) - output += sensor_format.format('{}:'.format(display_sensor_name), - reading, + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ width=str(max_name_width+1)) output += '\n' return output - -def read_psu_sensors(num_psus, ipmi_sdr_elist): - - sensor_list = [ - ('PSU{}_Status', 'PSU {} Status'), - ('PSU{}_Fan', 'PSU {} Fan'), - ('PSU{}_VIn', 'PSU {} Input Voltag'), - ('PSU{}_CIn', 'PSU {} Input Current'), - ('PSU{}_PIn', 'PSU {} Input Power'), - ('PSU{}_Temp1', 'PSU {} Temp1'), - ('PSU{}_Temp2', 'PSU {} Temp2'), - ('PSU{}_VOut', 'PSU {} Output Voltag'), - ('PSU{}_COut', 'PSU {} Output Current'), - ('PSU{}_POut', 'PSU {} Output Power'), +def read_psu_sensors(num_psus): + + sensor_list = [\ + ('PSU{}_Status', 'PSU {} Status'),\ + ('PSU{}_Fan', 'PSU {} Fan 1'),\ + ('PSU{}_VIn', 'PSU {} Input Voltage'),\ + ('PSU{}_CIn', 'PSU {} Input Current'),\ + ('PSU{}_PIn', 'PSU {} Input Power'),\ + ('PSU{}_Temp1', 'PSU {} Ambient Temp'),\ + ('PSU{}_Temp2', 'PSU {} Hotspot Temp'),\ + ('PSU{}_VOut', 'PSU {} Output Voltage'),\ + ('PSU{}_COut', 'PSU {} Output Current'),\ + ('PSU{}_POut', 'PSU {} Output Power'),\ ] output = '' @@ -151,22 +158,21 @@ def read_psu_sensors(num_psus, ipmi_sdr_elist): for sensor in sensor_list: ipmi_sensor_name = sensor[0].format(psu_num) display_sensor_name = sensor[1].format(psu_num) - reading = get_reading_by_name(ipmi_sensor_name, ipmi_sdr_elist) - output += sensor_format.format('{}:'.format(display_sensor_name), - reading, + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ width=str(max_name_width+1)) output += '\n' return output - def main(): output_string = '' - ipmi_sdr_elist = ipmi_sensor_dump(IPMI_SDR_CMD) - output_string += read_temperature_sensors(ipmi_sdr_elist) - output_string += read_psu_sensors(MAX_NUM_PSUS, ipmi_sdr_elist) - output_string += read_fan_sensors(MAX_NUM_FANS, ipmi_sdr_elist) - print(output_string) + if ipmi_sensor_dump(IPMI_SDR_CMD): + output_string += read_temperature_sensors() + output_string += read_psu_sensors(MAX_NUM_PSUS) + output_string += read_fan_sensors(MAX_NUM_FANS) + + print(output_string) if __name__ == '__main__': diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/sensors index 405d92c2b3cc..5d740a9eb7d7 100755 --- a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/sensors +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/sensors @@ -8,4 +8,4 @@ if [ -t 1 ] ; then fi docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@" -docker exec -$DOCKER_EXEC_FLAGS pmon platform_sensors.py "$@" +docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@" diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/silverstone_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/silverstone_platform_shutdown.sh new file mode 100755 index 000000000000..973c90378dca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/silverstone_platform_shutdown.sh @@ -0,0 +1,26 @@ +#!/bin/bash +REBOOT_CAUSE_DIR="/host/reboot-cause" +HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +REBOOT_TIME=$(date) + +if [ $# -ne 1 ]; then + echo "Require reboot type" + exit 1 +fi + +if [ ! -d "$REBOOT_CAUSE_DIR" ]; then + mkdir $REBOOT_CAUSE_DIR +fi + +echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE} + +# Best effort to write buffered data onto the disk +sync ; sync ; sync ; sleep 3 + +# BMC cold power-cyle +ipmitool chassis power cycle &> /dev/null + +# System should reboot by now and avoid the script returning to caller +sleep 10 + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/setup.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/setup.py index 20a2b6d1063a..7da0814059d9 100644 --- a/platform/broadcom/sonic-platform-modules-cel/silverstone/setup.py +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/setup.py @@ -1,8 +1,5 @@ from setuptools import setup -DEVICE_NAME = 'celestica' -HW_SKU = 'x86_64-cel_silverstone-r0' - setup( name='sonic-platform', version='1.0', @@ -17,7 +14,7 @@ 'sonic_platform', ], package_dir={ - 'sonic_platform': '../../../../device/{}/{}/sonic_platform'.format(DEVICE_NAME, HW_SKU)}, + 'sonic_platform': 'sonic_platform'}, classifiers=[ 'Development Status :: 3 - Alpha', 'Environment :: Plugins', diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/__init__.py new file mode 100644 index 000000000000..d3c24cb008dd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import platform diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/chassis.py new file mode 100644 index 000000000000..da898c9a147e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/chassis.py @@ -0,0 +1,452 @@ +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Chassis information which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper + from sonic_py_common import device_info + from sonic_platform_base.sfp_base import SfpBase + from .helper import APIHelper + import time + import os + import re + import shutil +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_FAN_TRAY = 7 +NUM_FAN = 2 +NUM_PSU = 2 +NUM_THERMAL = 14 +NUM_SFP = 32 +NUM_COMPONENT = 10 + +IPMI_OEM_NETFN = "0x3A" +IPMI_GET_REBOOT_CAUSE = "0x03 0x00 0x01 0x06" + +IPMI_SET_SYS_LED_CMD = "0x07 0x00 {}" +IPMI_GET_SYS_LED_CMD = "0x08 0x00" + +LPC_GETREG_PATH = "/sys/bus/platform/devices/baseboard-lpc/getreg" +LPC_SETREG_PATH = "/sys/bus/platform/devices/baseboard-lpc/setreg" +LPC_STATUS_LED_REG = "0xA162" + +ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt" + +class Chassis(ChassisBase): + """Platform-specific Chassis class""" + + #led color status + SYSLED_COLOR_VAL_MAP = { + 'off': '0xff', + 'green': '0xdc', + 'amber': '0xec', + 'green_blink_1hz': '0xdd', + 'green_blink_4hz': '0xde', + 'amber_blink_1hz': '0xed', + 'amber_blink_4hz': '0xee', + 'green_amber_1hz': '0xcd', + 'green_amber_4hz': '0xce' + } + + SYSLED_VAL_COLOR_DESC_MAP = { + "0xff": "off", + "0xdc": "green", + "0xec": "amber", + "0xdd": "green blinking 1Hz", + "0xde": "green blinking 4Hz", + "0xed": "amber blinking 1Hz", + "0xee": "amber blinking 4Hz", + "0xcd": "green & amber alternate 1Hz", + "0xce": "green & amber alternate 4Hz" + } + + def __init__(self): + ChassisBase.__init__(self) + self._api_helper = APIHelper() + self.sfp_module_initialized = False + self._sfp_list = [] + self.sfp_status_dict = {} + self._watchdog = None + self._airflow_direction = None + + self.__initialize_eeprom() + self.is_host = self._api_helper.is_host() + + self.__initialize_fan() + self.__initialize_psu() + self.__initialize_thermals() + self.__initialize_components() + + def __initialize_sfp(self): + sfputil_helper = SfpUtilHelper() + port_config_file_path = device_info.get_path_to_port_config_file() + sfputil_helper.read_porttab_mappings(port_config_file_path, 0) + + #from sonic_platform.sfp import Sfp + from sonic_platform.sfp import Sfp + for index in range(0, NUM_SFP): + #sfp = Sfp(index, sfputil_helper.logical[index]) + sfp = Sfp(index, sfputil_helper.physical_to_logical[index + 1]) + self._sfp_list.append(sfp) + self.sfp_status_dict[sfp.index] = '1' if sfp.get_presence() else '0' + self.sfp_module_initialized = True + + def __initialize_psu(self): + from sonic_platform.psu import Psu + for index in range(0, NUM_PSU): + psu = Psu(index) + self._psu_list.append(psu) + + def __initialize_fan(self): + from sonic_platform.fan_drawer import FanDrawer + for i in range(NUM_FAN_TRAY): + fandrawer = FanDrawer(i) + self._fan_drawer_list.append(fandrawer) + self._fan_list.extend(fandrawer._fan_list) + + def __initialize_thermals(self): + from sonic_platform.thermal import Thermal + # airflow = self.__get_air_flow() + for index in range(0, NUM_THERMAL): + thermal = Thermal(index) + self._thermal_list.append(thermal) + + def __initialize_eeprom(self): + from sonic_platform.eeprom import Eeprom + self._eeprom = Eeprom() + + def __initialize_components(self): + from sonic_platform.component import Component + for index in range(0, NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + def initizalize_system_led(self): + pass + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.get_mac() + + def get_revision(self): + """ + Retrieves the hardware revision for the chassis + Returns: + A string containing the hardware revision for this chassis. + """ + return self._eeprom.get_revision() + + def get_serial(self): + """ + Retrieves the hardware serial number for the chassis + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.get_serial() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self._eeprom.get_eeprom() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + status, raw_cause = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_GET_REBOOT_CAUSE) + hx_cause = raw_cause.split()[0] if status and len( + raw_cause.split()) > 0 else 00 + + # This tmp copy is to retain the reboot-cause only for the current boot + if os.path.isfile(ORG_HW_REBOOT_CAUSE_FILE): + shutil.move(ORG_HW_REBOOT_CAUSE_FILE, TMP_HW_REBOOT_CAUSE_FILE) + + if hx_cause == "77" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE): + with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file: + reboot_info = hw_cause_file.readline().rstrip('\n') + match = re.search(r'Reason:(.*),Time:(.*)', reboot_info) + if match is not None: + if match.group(1) == 'system': + return (self.REBOOT_CAUSE_NON_HARDWARE, 'System cold reboot') + + reboot_cause = { + "00": self.REBOOT_CAUSE_HARDWARE_OTHER, + "11": self.REBOOT_CAUSE_POWER_LOSS, + "22": self.REBOOT_CAUSE_NON_HARDWARE, + "33": self.REBOOT_CAUSE_NON_HARDWARE, + "44": self.REBOOT_CAUSE_NON_HARDWARE, + "55": self.REBOOT_CAUSE_HARDWARE_OTHER, + "66": self.REBOOT_CAUSE_WATCHDOG, + "77": self.REBOOT_CAUSE_POWER_LOSS, + "88": self.REBOOT_CAUSE_WATCHDOG + }.get(hx_cause, self.REBOOT_CAUSE_HARDWARE_OTHER) + + description = { + "00": "Hardware Reason", + "11": "Power On Reset", + "22": "Soft-Set CPU Warm Reset", + "33": "Soft-Set CPU Cold Reset", + "44": "CPU Warm Reset", + "55": "CPU Cold Reset", + "66": "GPIO Watchdog Reset", + "77": "Power Cycle Reset", + "88": "Hardware Watchdog Reset" + }.get(hx_cause, "Unknown reason") + + return (reboot_cause, description) + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - True if call successful, False if not; + - A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, + where device_id is the device ID for this device and + device_event, + status='1' represents device inserted, + status='0' represents device removed. + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0'}} + indicates that fan 0 has been removed, fan 2 + has been inserted and sfp 11 has been removed. + """ + # SFP event + if not self.sfp_module_initialized: + self.__initialize_sfp() + + sfp_dict = {} + + SFP_REMOVED = '0' + SFP_INSERTED = '1' + + SFP_PRESENT = True + SFP_ABSENT = False + + start_time = time.time() + time_period = timeout/float(1000) #Convert msecs to secs + + while time.time() < (start_time + time_period) or timeout == 0: + for sfp in self._sfp_list: + port_idx = sfp.index + if self.sfp_status_dict[port_idx] == SFP_REMOVED and \ + sfp.get_presence() == SFP_PRESENT: + sfp_dict[port_idx] = SFP_INSERTED + self.sfp_status_dict[port_idx] = SFP_INSERTED + elif self.sfp_status_dict[port_idx] == SFP_INSERTED and \ + sfp.get_presence() == SFP_ABSENT: + sfp_dict[port_idx] = SFP_REMOVED + self.sfp_status_dict[port_idx] = SFP_REMOVED + + if sfp_dict: + return True, {'sfp':sfp_dict} + + time.sleep(0.5) + + return True, {'sfp':{}} # Timeout + + ############################################################## + ######################## SFP methods ######################### + ############################################################## + + def get_num_sfps(self): + """ + Retrieves the number of sfps available on this chassis + Returns: + An integer, the number of sfps available on this chassis + """ + if not self.sfp_module_initialized: + self.__initialize_sfp() + + return len(self._sfp_list) + + def get_all_sfps(self): + """ + Retrieves all sfps available on this chassis + Returns: + A list of objects derived from SfpBase representing all sfps + available on this chassis + """ + if not self.sfp_module_initialized: + self.__initialize_sfp() + + return self._sfp_list + + def get_sfp(self, index): + """ + Retrieves sfp represented by (1-based) index + Args: + index: An integer, the index (1-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 1. + For example, 1 for Ethernet0, 2 for Ethernet4 and so on. + Returns: + An object dervied from SfpBase representing the specified sfp + """ + if not self.sfp_module_initialized: + self.__initialize_sfp() + return super(Chassis, self).get_sfp(index-1) + + ############################################################## + ####################### Other methods ######################## + ############################################################## + + def get_watchdog(self): + """ + Retreives hardware watchdog device on this chassis + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + """ + if self._watchdog is None: + from sonic_platform.watchdog import Watchdog + self._watchdog = Watchdog() + + return self._watchdog + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return self._api_helper.hwsku + + def get_presence(self): + """ + Retrieves the presence of the Chassis + Returns: + bool: True if Chassis is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + return self._eeprom.get_pn() + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return True + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return -1 + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False + + def set_status_led(self, color): + """ + Sets the state of the PSU status LED + Args: + color: A string representing the color with which to set the PSU status LED + Note: Only support green and off + Returns: + bool: True if status LED state is set successfully, False if not + """ + color_val = self.SYSLED_COLOR_VAL_MAP.get(color) + if color_val == None: + return False + + status = self._api_helper.lpc_setreg(LPC_SETREG_PATH, LPC_STATUS_LED_REG, color_val) + return status + + def get_status_led(self): + """ + Gets the state of the PSU status LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + color_val = self._api_helper.lpc_getreg(LPC_GETREG_PATH, LPC_STATUS_LED_REG) + color = self.SYSLED_VAL_COLOR_DESC_MAP.get(color_val, "N/A") + return color + + def get_airflow_direction(self): + if self._airflow_direction == None: + try: + vendor_extn = self._eeprom.get_vendor_extn() + airflow_type = vendor_extn.split()[2][2:4] # Either 0xFB or 0xBF + if airflow_type == 'FB': + direction = 'exhaust' + elif airflow_type == 'BF': + direction = 'intake' + else: + direction = 'N/A' + except (AttributeError, IndexError): + direction = 'N/A' + + self._airflow_direction = direction + + return self._airflow_direction + + def get_port_or_cage_type(self, index): + """ + Retrieves sfp port or cage type corresponding to physical port + + Args: + index: An integer (>=0), the index of the sfp to retrieve. + + Returns: + The masks of all types of port or cage that can be supported on the port + Types are defined in sfp_base.py + """ + if index in range(1, 32+1): + return (SfpBase.SFP_PORT_TYPE_BIT_QSFP28 | SfpBase.SFP_PORT_TYPE_BIT_SFP28 | \ + SfpBase.SFP_PORT_TYPE_BIT_SFP_PLUS | SfpBase.SFP_PORT_TYPE_BIT_QSFPDD | SfpBase.SFP_PORT_TYPE_BIT_QSFP) + else: + raise NotImplementedError + + diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/component.py new file mode 100644 index 000000000000..8748404d9931 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/component.py @@ -0,0 +1,181 @@ +############################################################################# +# Celestica +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +import os.path +import subprocess +import re + +try: + from sonic_platform_base.component_base import ComponentBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NAME_IDX = 0 +DESC_IDX = 1 +VER_API_IDX = 2 + +BASE_CPLD_VER_CMD = "0x03 0x00 0x01 0x00" +FAN_CPLD_VER_CMD = "0x03 0x01 0x01 0x00" +BIOS_VER_PATH = "/sys/class/dmi/id/bios_version" +BMC_VER_CMD1 = ["ipmitool", "mc", "info"] +BMC_VER_CMD2 = ["grep", "Firmware Revision"] +ONIE_VER_CMD = ["cat", "/host/machine.conf"] +SSD_VER_CMD = ["smartctl", " -i", "/dev/sda"] +BASE_GETREG_PATH = "/sys/devices/platform/baseboard-lpc/getreg" +MEM_PCI_RESOURCE = "/sys/bus/pci/devices/0000:09:00.0/resource0" +FPGA_VER_MEM_OFFSET = 0 +NETFN = "0x3A" +COME_CPLD_VER_REG = "0xA1E0" + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + COMPONENT_LIST = [ + ("BIOS", "Basic Input/Output System", self.__get_bios_ver), + ("ONIE", "Open Network Install Environment", self.__get_onie_ver), + ("BMC", "Baseboard Management Controller", self.__get_bmc_ver), + ("FPGA", "FPGA for transceiver EEPROM access and other component I2C access", self.__get_fpga_ver), + ("CPLD COMe", "COMe board CPLD", self.__get_come_cpld_ver), + ("CPLD BASE", "CPLD for board functions and watchdog", self.__get_cpld_ver_from_bmc), + ("CPLD SW1", "CPLD for port control QSFP(1-16)", self.__get_sw_cpld1_ver), + ("CPLD SW2", "CPLD for port control QSFP(17-32) SFP(33-34)", self.__get_sw_cpld2_ver), + ("CPLD FAN", "CPLD for fan control and status", self.__get_cpld_ver_from_bmc), + ("SSD", "Solid State Drive - {}", self.__get_ssd_ver) + ] + self.index = component_index + self.name = COMPONENT_LIST[self.index][NAME_IDX] + self.description = COMPONENT_LIST[self.index][DESC_IDX] + self.__get_version = COMPONENT_LIST[self.index][VER_API_IDX] + self._api_helper = APIHelper() + + def __i2c_get(self, bus, i2caddr, offset): + try: + return int(subprocess.check_output(['/usr/sbin/i2cget', '-y', '-f', str(bus), str(i2caddr), str(offset)]), 16) + except (FileNotFoundError, subprocess.CalledProcessError): + return -1 + + def __get_bios_ver(self): + return self._api_helper.read_txt_file(BIOS_VER_PATH) + + def __get_onie_ver(self): + onie_ver = "N/A" + status, raw_onie_data = self._api_helper.run_command(ONIE_VER_CMD) + if status: + ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data) + if ret != None: + onie_ver = ret.group(0) + return onie_ver + + def __get_bmc_ver(self): + bmc_ver = "Unknown" + status, raw_bmc_data = self._api_helper.run_command(BMC_VER_CMD1, BMC_VER_CMD2) + if status: + bmc_ver_data = raw_bmc_data.split(":") + bmc_ver = bmc_ver_data[-1].strip() if len( + bmc_ver_data) > 1 else bmc_ver + return bmc_ver + + def __get_fpga_ver(self): + fpga_ver = "Unknown" + status, reg_val = self._api_helper.pci_get_value( + MEM_PCI_RESOURCE, FPGA_VER_MEM_OFFSET) + if status: + major = reg_val[0] >> 16 + minor = int(bin(reg_val[0])[16:32], 2) + fpga_ver = '{}.{}'.format(major, minor) + return fpga_ver + + def __get_come_cpld_ver(self): + cpld_ver_str = self._api_helper.lpc_getreg(BASE_GETREG_PATH, COME_CPLD_VER_REG) + if not cpld_ver_str: + return "N/A" + + cpld_ver = int(cpld_ver_str, 16) + return "{:x}.{:x}".format((cpld_ver >> 4) & 0xF, cpld_ver & 0xF) + + def __get_cpld_ver_from_bmc(self): + cpld_ver = "N/A" + cmd = BASE_CPLD_VER_CMD + + if self.name == "CPLD FAN": + cmd = FAN_CPLD_VER_CMD + + (rc, op) = self._api_helper.ipmi_raw(NETFN, cmd) + if rc and len(op) == 2: + cpld_ver = op[0] + '.' + op[1] + + return cpld_ver + + def __get_sw_cpld1_ver(self): + val = self.__i2c_get(4, 0x30, 0) + if val != -1: + return '{:x}.{:x}'.format((val >> 4) & 0xf, val & 0xf) + else: + return 'N/A' + + def __get_sw_cpld2_ver(self): + val = self.__i2c_get(4, 0x31, 0) + if val != -1: + return '{:x}.{:x}'.format((val >> 4) & 0xf, val & 0xf) + else: + return 'N/A' + + def __get_ssd_ver(self): + ssd_ver = "N/A" + status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD) + if status: + ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data) + if ret != None: + ssd_ver = ret.group(1) + return ssd_ver + + def __get_ssd_model(self): + model = "N/A" + + status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD) + if status: + ret = re.search(r"Device Model: +(.*)[^\\]", raw_ssd_data) + if ret != None: + try: + model = ret.group(1) + except (IndexError): + pass + + return model + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return self.name + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + # For SSD get the model name from device + if self.get_name() == "SSD": + return self.description.format(self.__get_ssd_model()) + + return self.description + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + return self.__get_version() diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/eeprom.py new file mode 100644 index 000000000000..ed5891f4f5d5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/eeprom.py @@ -0,0 +1,123 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import os + import sys + import re + import json + import fcntl + + if sys.version_info.major == 3: + from io import StringIO + else: + from cStringIO import StringIO + + from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +NULL = 'N/A' +EEPROM_TMP_FILE = '/tmp/eeprom_dump.json' + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + + EEPROM_DECODE_HEADLINES = 6 + + def __init__(self): + self._eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom" + super(Eeprom, self).__init__(self._eeprom_path, 0, '', True) + self._eeprom = self._load_eeprom() + + def __parse_output(self, decode_output): + decode_output.replace('\0', '') + lines = decode_output.split('\n') + lines = lines[self.EEPROM_DECODE_HEADLINES:] + _eeprom_info_dict = dict() + + for line in lines: + try: + match = re.search('(0x[0-9a-fA-F]{2})\s+\d+\s+(.+)', line) + if match is not None: + idx = match.group(1) + value = match.group(2).rstrip('\0') + + _eeprom_info_dict[idx] = value + except Exception: + pass + return _eeprom_info_dict + + def _load_eeprom(self): + eeprom_dict = {} + + if os.path.exists(EEPROM_TMP_FILE): + with open(EEPROM_TMP_FILE, 'r') as fd: + eeprom_dict = json.load(fd) + + return eeprom_dict + + original_stdout = sys.stdout + sys.stdout = StringIO() + rv = -1 + try: + rv = self.read_eeprom_db() + except BaseException: + pass + + if rv == 0: + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + eeprom_dict = self.__parse_output(decode_output) + else: + e = self.read_eeprom() + if e is None: + sys.stdout = original_stdout + return {} + + self.decode_eeprom(e) + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + + (is_valid, valid_crc) = self.is_checksum_valid(e) + if not is_valid: + return {} + + eeprom_dict = self.__parse_output(decode_output) + + if len(eeprom_dict) != 0: + with open(EEPROM_TMP_FILE, 'w') as fd: + fcntl.flock(fd, fcntl.LOCK_EX) + json.dump(eeprom_dict, fd) + fcntl.flock(fd, fcntl.LOCK_UN) + + return eeprom_dict + + def get_eeprom(self): + return self._eeprom + + def get_product(self): + return self._eeprom.get('0x21', NULL) + + def get_pn(self): + return self._eeprom.get('0x22', NULL) + + def get_serial(self): + return self._eeprom.get('0x23', NULL) + + def get_mac(self): + return self._eeprom.get('0x24', NULL) + + def get_revision(self): + return self._eeprom.get('0x26', NULL) + + def get_vendor_extn(self): + return self._eeprom.get('0xFD', NULL) diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan.py similarity index 51% rename from device/celestica/x86_64-cel_silverstone-r0/sonic_platform/fan.py rename to platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan.py index 1a18eed9c8d5..30ef3d934bc1 100644 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/fan.py +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan.py @@ -17,37 +17,36 @@ raise ImportError(str(e) + "- required module not found") -FAN_NAME_LIST = ["FAN-1F", "FAN-1R", "FAN-2F", "FAN-2R", "FAN-3F", "FAN-3R", - "FAN-4F", "FAN-4R", "FAN-5F", "FAN-5R", "FAN-6F", "FAN-6R", "FAN-7F", "FAN-7R"] - IPMI_OEM_NETFN = "0x3A" IPMI_SENSOR_NETFN = "0x04" IPMI_FAN_SPEED_CMD = "0x2D {}" IPMI_AIR_FLOW_CMD = "0x0A {}" IPMI_FAN_PRESENT_CMD = "0x06 0x03 {}" +IPMI_FAN_SPEED_CPLD_CMD = "0x03 0x01 0x01 {}" IPMI_SET_FAN_LED_CMD = "0x07 {} {}" IPMI_GET_FAN_LED_CMD = "0x08 {}" -IPMI_SET_PWM = "0x03 0x01 0x02 {} {}" - -IPMI_FRU_MODEL_KEY = "Board Part Number" -IPMI_FRU_SERIAL_KEY = "Board Serial" - -MAX_OUTLET = 24700 -MAX_INLET = 29700 -SPEED_TOLERANCE = 10 -FAN1_FRONT_SS_ID = "0x0D" -FAN1_REAR_SS_ID = "0x45" +FAN_NAME_TEMPLATE = "{}Fan{}{}" + +FAN_FRONT_MAX_SPEED = 24700 +FAN_REAR_MAX_SPEED = 29700 +FAN_PSU_MAX_SPEED = 26500 +FAN_SPEED_TOLERANCE = 25 + +CPLD_REG_FANTRAY_BASE = 0x22 +FAN_FRONT_SID_BASE = 0x0D # IPMI Sensor ID +FAN_REAR_SID_BASE = 0x45 # IPMI Sensor ID +FAN_FRU_ID_BASE = 6 +PSU_FRU_ID_BASE = 3 +PSU_FAN_SID_BASE = {\ + 0: 0x33,\ + 1: 0x3D\ +} FAN_LED_OFF_CMD = "0x00" FAN_LED_GREEN_CMD = "0x01" FAN_LED_RED_CMD = "0x02" FAN1_LED_CMD = "0x04" -FAN_PWM_REGISTER_START = 0x22 -FAN_PWM_REGISTER_STEP = 0x10 -FAN1_FRU_ID = 6 - -NUM_OF_FAN_TRAY = 7 -PSU_FAN1_FRONT_SS_ID = "0x33" +NUM_FAN_TRAY = 7 class Fan(FanBase): @@ -58,10 +57,24 @@ def __init__(self, fan_tray_index, fan_index=0, is_psu_fan=False, psu_index=0): self.fan_index = fan_index self.fan_tray_index = fan_tray_index self.is_psu_fan = is_psu_fan + self.name = None if self.is_psu_fan: self.psu_index = psu_index + self.index = NUM_FAN_TRAY * 2 + self.psu_index + self.max_speed = FAN_PSU_MAX_SPEED + self.sid_offset = PSU_FAN_SID_BASE[self.psu_index] + else: + self.index = self.fan_tray_index * 2 + self.fan_index + if fan_index % 2 == 0: + self.is_front = True + self.sid_offset = FAN_FRONT_SID_BASE + self.fan_tray_index + self.max_speed = FAN_FRONT_MAX_SPEED + else: + self.is_front = False + self.sid_offset = FAN_REAR_SID_BASE + self.fan_tray_index + self.max_speed = FAN_REAR_MAX_SPEED + self._api_helper = APIHelper() - self.index = self.fan_tray_index * 2 + self.fan_index def get_direction(self): """ @@ -70,13 +83,30 @@ def get_direction(self): A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST depending on fan direction """ - direction = self.FAN_DIRECTION_EXHAUST - fan_direction_key = hex(self.fan_tray_index) if not self.is_psu_fan else hex( - self.psu_index + NUM_OF_FAN_TRAY) - status, raw_flow = self._api_helper.ipmi_raw( - IPMI_OEM_NETFN, IPMI_AIR_FLOW_CMD.format(fan_direction_key)) - if status and raw_flow == "01": - direction = self.FAN_DIRECTION_INTAKE + direction = self.FAN_DIRECTION_NOT_APPLICABLE + + if not self.is_psu_fan: + offset = hex(self.fan_tray_index) + else: + offset = hex(NUM_FAN_TRAY + self.psu_index) + + status, output = self._api_helper.ipmi_raw(IPMI_OEM_NETFN,\ + IPMI_AIR_FLOW_CMD.format(offset)) + if status: + if output == "00": + direction = self.FAN_DIRECTION_EXHAUST + elif output == "01": + direction = self.FAN_DIRECTION_INTAKE + elif self.is_psu_fan: + # Trying to deduce from PSU model + status, output = self._api_helper.ipmi_fru_id(PSU_FRU_ID_BASE + self.fan_tray_index, + "Board Part Number") + if status and output: + model = output.split(':')[-1].strip() + if model == "TDPS1500AB7C": + direction = self.FAN_DIRECTION_INTAKE + elif model == "TDPS1500AB6E": + direction = self.FAN_DIRECTION_EXHAUST return direction @@ -86,24 +116,20 @@ def get_speed(self): Returns: An integer, the percentage of full fan speed, in the range 0 (off) to 100 (full speed) - - Note: - M = 150 - Max F2B = 24700 RPM - Max B2F = 29700 RPM """ + speed = 0 - max_rpm = MAX_OUTLET if self.fan_index % 2 == 0 else MAX_INLET - fan1_ss_start = FAN1_FRONT_SS_ID if self.fan_index % 2 == 0 else FAN1_REAR_SS_ID - - ss_id = hex(int(fan1_ss_start, 16) + self.fan_tray_index) if not self.psu_index else hex( - int(PSU_FAN1_FRONT_SS_ID, 16) + self.fan_tray_index) - status, raw_ss_read = self._api_helper.ipmi_raw( - IPMI_SENSOR_NETFN, IPMI_FAN_SPEED_CMD.format(ss_id)) + if not self.is_psu_fan: + multiplier = 150.0 + else: + multiplier = 200.0 - ss_read = raw_ss_read.split()[0] - rpm_speed = int(ss_read, 16)*150 - speed = int(float(rpm_speed)/max_rpm * 100) + status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\ + IPMI_FAN_SPEED_CMD.format(self.sid_offset)) + if status: + raw_speed = output.split()[0] + rpm_speed = int(raw_speed, 16) * multiplier + speed = int((rpm_speed/self.max_speed) * 100) return speed @@ -120,8 +146,18 @@ def get_target_speed(self): 0 : when PWM mode is use pwm : when pwm mode is not use """ - target = 0 - return target + if self.is_psu_fan: + # Ignored for tolerance check + return self.get_speed() + + offset = hex(CPLD_REG_FANTRAY_BASE + (16 * self.fan_tray_index)) + status, output = self._api_helper.ipmi_raw(IPMI_OEM_NETFN,\ + IPMI_FAN_SPEED_CPLD_CMD.format(offset)) + if status: + fan_pwm = int(output, 16) + target_speed = int(fan_pwm / 255 * 100) + + return target_speed def get_speed_tolerance(self): """ @@ -130,7 +166,8 @@ def get_speed_tolerance(self): An integer, the percentage of variance from target speed which is considered tolerable """ - return SPEED_TOLERANCE + + return FAN_SPEED_TOLERANCE def set_speed(self, speed): """ @@ -140,29 +177,10 @@ def set_speed(self, speed): in the range 0 (off) to 100 (full speed) Returns: A boolean, True if speed is set successfully, False if not - Notes: - pwm setting mode must set as Manual - manual: ipmitool raw 0x3a 0x06 0x01 0x0 - auto: ipmitool raw 0x3a 0x06 0x01 0x1 """ - # ipmitool raw 0x3a 0x03 0x01 0x02 {register} {pwm_speed} - # register = 22 32 42 52 62 72 82 - - if self.is_psu_fan: - # TODO - return False - speed_hex = hex(int(float(speed)/100 * 255)) - fan_register_hex = hex(FAN_PWM_REGISTER_START + - (self.fan_tray_index*FAN_PWM_REGISTER_STEP)) - - set_speed_cmd = IPMI_SET_PWM.format(fan_register_hex, speed_hex) - status, set_speed_res = self._api_helper.ipmi_raw( - IPMI_OEM_NETFN, set_speed_cmd) - - set_speed = False if not status else True - - return set_speed + # FAN speed is controlled by BCM always + return False def set_status_led(self, color): """ @@ -180,7 +198,7 @@ def set_status_led(self, color): """ if self.is_psu_fan: - # Not support + # Not supported for PSU return False led_cmd = { @@ -208,9 +226,9 @@ def get_status_led(self): STATUS_LED_COLOR_RED = "red" STATUS_LED_COLOR_OFF = "off" """ - if self.is_psu_fan: - # Not support - return self.STATUS_LED_COLOR_OFF + if not self.get_presence() or self.is_psu_fan: + # Not supported for PSU + return "N/A" fan_selector = hex(int(FAN1_LED_CMD, 16) + self.fan_tray_index) status, hx_color = self._api_helper.ipmi_raw( @@ -224,16 +242,30 @@ def get_status_led(self): return status_led + ############################################################## + ###################### Device methods ######################## + ############################################################## + def get_name(self): """ Retrieves the name of the device Returns: string: The name of the device """ - fan_name = FAN_NAME_LIST[self.fan_tray_index*2 + self.fan_index] if not self.is_psu_fan else "PSU-{} FAN-{}".format( - self.psu_index+1, self.fan_index+1) - return fan_name + if not self.name: + if not self.is_psu_fan: + psu_name = "" + fan_id = " {}".format(self.fan_tray_index + 1) + fan_type = " Front" if self.is_front else " Rear" + else: + psu_name = "PSU {} ".format(self.psu_index + 1) + fan_id = " {}".format(self.fan_tray_index + 1) + fan_type = "" + + self.name = FAN_NAME_TEMPLATE.format(psu_name, fan_id, fan_type) + + return self.name def get_presence(self): """ @@ -241,13 +273,12 @@ def get_presence(self): Returns: bool: True if FAN is present, False if not """ - if self.is_psu_fan: - return True presence = False - status, raw_present = self._api_helper.ipmi_raw( + + status, output = self._api_helper.ipmi_raw( IPMI_OEM_NETFN, IPMI_FAN_PRESENT_CMD.format(hex(self.index))) - if status and raw_present == "00": + if status and output == "00": presence = True return presence @@ -258,17 +289,13 @@ def get_model(self): Returns: string: Model/part number of device """ - if self.is_psu_fan: - return "Unknown" - - model = "Unknown" - ipmi_fru_idx = self.fan_tray_index + FAN1_FRU_ID - status, raw_model = self._api_helper.ipmi_fru_id( - ipmi_fru_idx, IPMI_FRU_MODEL_KEY) + model = "N/A" - fru_pn_list = raw_model.split() - if len(fru_pn_list) > 4: - model = fru_pn_list[4] + if not self.is_psu_fan: + status, output = self._api_helper.ipmi_fru_id(FAN_FRU_ID_BASE + self.fan_tray_index, + "Board Part Number") + if status and output: + model = output.split(':')[-1].strip() return model @@ -278,17 +305,13 @@ def get_serial(self): Returns: string: Serial number of device """ - if self.is_psu_fan: - return "Unknown" - - serial = "Unknown" - ipmi_fru_idx = self.fan_tray_index + FAN1_FRU_ID - status, raw_model = self._api_helper.ipmi_fru_id( - ipmi_fru_idx, IPMI_FRU_SERIAL_KEY) + serial = "N/A" - fru_sr_list = raw_model.split() - if len(fru_sr_list) > 3: - serial = fru_sr_list[3] + if not self.is_psu_fan: + status, output = self._api_helper.ipmi_fru_id(FAN_FRU_ID_BASE + self.fan_tray_index, + "Board Serial") + if status and output: + serial = output.split(':')[-1].strip() return serial @@ -299,3 +322,24 @@ def get_status(self): A boolean value, True if device is operating properly, False if not """ return self.get_presence() and self.get_speed() > 0 + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. + If the agent cannot determine the parent-relative position + for some reason, or if the associated value of + entPhysicalContainedIn is'0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device + or -1 if cannot determine the position + """ + + return self.fan_index + 1 + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True if not self.is_psu_fan else False diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..a7e5f167ad79 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan_drawer.py @@ -0,0 +1,108 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the the Fan-Drawers' information available in the platform +# +############################################################################# + +try: + from sonic_platform_base.fan_drawer_base import FanDrawerBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_FAN = 2 + + +class FanDrawer(FanDrawerBase): + def __init__(self, fantray_index): + FanDrawerBase.__init__(self) + self._index = fantray_index + 1 + self._init_fan(fantray_index) + + def _init_fan(self, fantray_index): + from sonic_platform.fan import Fan + for index in range(NUM_FAN): + fan = Fan(fantray_index, index) + self._fan_list.append(fan) + + def set_status_led(self, color): + """ + Sets the state of the fan drawer status LED + Args: + color: A string representing the color with which to set the + fan drawer status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + return self._fan_list[0].set_status_led(color) + + def get_status_led(self): + """ + Gets the state of the fan drawer LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + return self._fan_list[0].get_status_led() + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return "Drawer {}".format(self._index) + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + return self._fan_list[0].get_presence() + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + return self._fan_list[0].get_model() + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + return self._fan_list[0].get_serial() + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self._fan_list[0].get_status() + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device + Returns: + integer: The 1-based relative physical position in parent device + """ + return self._index + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/helper.py new file mode 100644 index 000000000000..3e2cb798df91 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/helper.py @@ -0,0 +1,190 @@ +import fcntl +import os +import struct +import subprocess +import fcntl + +from mmap import * +from sonic_py_common.general import check_output_pipe +from sonic_py_common.device_info import get_platform_and_hwsku + +from sonic_py_common import device_info + +HOST_CHK_CMD = "docker > /dev/null 2>&1" +EMPTY_STRING = "" + + +class APIHelper(): + + def __init__(self): + (self.platform, self.hwsku) = get_platform_and_hwsku() + + def is_host(self): + ret,data = subprocess.getstatusoutput(HOST_CHK_CMD) + if ret != 0: + return False + return True + + def pci_get_value(self, resource, offset): + status = True + result = "" + try: + fd = os.open(resource, os.O_RDWR) + mm = mmap(fd, 0) + mm.seek(int(offset)) + read_data_stream = mm.read(4) + result = struct.unpack('I', read_data_stream) + except: + status = False + return status, result + + def run_command(self, cmd1_args, cmd2_args=None): + status = True + result = "" + args = [cmd1_args] + ([cmd2_args] if cmd2_args is not None else []) + try: + result = check_output_pipe(*args) + except subprocess.CalledProcessError: + status = False + return status, result + + def run_interactive_command(self, cmd): + try: + subprocess.call(cmd) + except: + return False + return True + + def read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + def read_one_line_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.readline() + return data.strip() + except IOError: + pass + return None + + def write_txt_file(self, file_path, value): + try: + with open(file_path, 'w') as fd: + fd.write(str(value)) + except Exception: + return False + return True + + def get_cpld_reg_value(self, getreg_path, register): + cmd = "echo {1} > {0}; cat {0}".format(getreg_path, register) + status, result = self.run_command(cmd) + return result if status else None + + def ipmi_raw(self, netfn, cmd): + status = True + result = "" + cmd = "ipmitool raw {} {}".format(netfn, cmd) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data.strip() + + return status, result + + def ipmi_fru_id(self, id, key=None): + status = True + result = "" + cmd1_args = ["ipmitool", "fru", "print", str(id)] + if not key: + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data.strip() + else: + cmd2_args = ["grep", str(key)] + status, result = self.run_command(cmd1_args, cmd2_args) + return status, result + + def ipmi_set_ss_thres(self, id, threshold_key, value): + status = True + result = "" + cmd = "ipmitool sensor thresh '{}' {} {}".format( + str(id), str(threshold_key), str(value)) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data.strip() + + return status, result + + def lpc_getreg(self, getreg_path, reg): + """ + Get the cpld reg through lpc interface + + Args: + getreg_path: getreg sysfs path + reg: 16 bits reg addr in hex str format + + Returns: + A str, register value in hex str format + """ + try: + file = open(getreg_path, 'w+') + # Acquire an exclusive lock on the file + fcntl.flock(file, fcntl.LOCK_SH) + + file.write(reg) + file.flush() + + # Seek to the beginning of the file + file.seek(0) + + # Read the content of the file + result = file.readline().strip() + except (OSError, IOError, FileNotFoundError): + result = None + finally: + # Release the lock and close the file + fcntl.flock(file, fcntl.LOCK_UN) + file.close() + + return result + + def lpc_setreg(self, setreg_path, reg, val): + """ + Set the cpld reg through lpc interface + + Args: + setreg_path: setreg sysfs path + reg: 16 bits reg addr in hex str format + val: 8 bits register value in hex str format + + Returns: + A boolean, True if speed is set successfully, False if not + """ + status = True + try: + file = open(setreg_path, 'w') + # Acquire an exclusive lock on the file + fcntl.flock(file, fcntl.LOCK_EX) + + data = "{} {}".format(reg, val) + file.write(data) + file.flush() + except (OSError, IOError, FileNotFoundError): + status = False + finally: + # Release the lock and close the file + fcntl.flock(file, fcntl.LOCK_UN) + file.close() + + return status diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/pcie.py new file mode 100644 index 000000000000..0f8bc0830384 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/pcie.py @@ -0,0 +1,15 @@ +# +# pcie_base.py +# +# Abstract base class for implementing platform-specific +# PCIE functionality for SONiC +# + +try: + from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil +except ImportError as e: + raise ImportError (str(e) + " - required module not found") + +class Pcie(PcieUtil): + def __init__(self, platform_path): + PcieUtil.__init__(self, platform_path) diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/platform.py similarity index 100% rename from device/celestica/x86_64-cel_silverstone-r0/sonic_platform/platform.py rename to platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/platform.py diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/psu.py new file mode 100644 index 000000000000..ced1022796de --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/psu.py @@ -0,0 +1,338 @@ +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.psu_base import PsuBase + from .helper import APIHelper + from sonic_platform.fan import Fan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +IPMI_SENSOR_NETFN = "0x04" +IPMI_SENSOR_READ_CMD = "0x2D {}" +IPMI_SENSOR_THRESH_CMD = "0x27 {}" +IPMI_FRU_MODEL_KEY = "Board Part Number" +IPMI_FRU_SERIAL_KEY = "Board Serial" + +PSU_LED_OFF_CMD = "0x00" +PSU_LED_GREEN_CMD = "0x01" +PSU_LED_AMBER_CMD = "0x02" + +psu_ipmi_id = {\ + 1: {\ + "TEMP": "0x34",\ + "VOUT": "0x36",\ + "COUT": "0x37",\ + "POUT": "0x38",\ + "STATUS": "0x2f",\ + "FRU": 3,\ + }, + 2: {\ + "TEMP": "0x3E",\ + "VOUT": "0x40",\ + "COUT": "0x41",\ + "POUT": "0x42",\ + "STATUS": "0x39",\ + "FRU": 4,\ + } +} + +ANALOG_READ_OFFSET = 0 +EVENT_0_7_OFFSET = 2 +EVENT_8_14_OFFSET = 3 + +FRU_SERIAL = 3 +FRU_MODEL = 4 + +TH_LNC = 0 # Low Non-critical threshold +TH_LCR = 1 # Low Critical threshold +TH_LNR = 2 # Low Non-recoverable threshold +TH_HNC = 3 # High Non-critical threshold +TH_HCR = 4 # High Critical threshold +TH_HNR = 5 # High Non-recoverable threshold + +PSU_VOUT_SS_ID = ["0x36", "0x40"] +PSU_COUT_SS_ID = ["0x37", "0x41"] +PSU_POUT_SS_ID = ["0x38", "0x42"] +PSU_STATUS_REG = ["0x39", "0x2f"] + + +class Psu(PsuBase): + """Platform-specific Psu class""" + + def __init__(self, psu_index): + PsuBase.__init__(self) + self.index = psu_index+1 + # PSU has only one FAN + fan = Fan(0, 0, is_psu_fan=True, psu_index=psu_index) + self._fan_list.append(fan) + self._api_helper = APIHelper() + + def get_voltage(self): + """ + Retrieves current PSU voltage output + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + psu_voltage = 0.0 + psu_vout_key = psu_ipmi_id[self.index]['VOUT'] + status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\ + IPMI_SENSOR_READ_CMD.format(psu_vout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx6x10^-2 + psu_voltage = int(value, 16) * 6 / 100.0 + + return psu_voltage + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + Returns: + A float number, the electric current in amperes, e.g 15.4 + """ + psu_current = 0.0 + psu_cout_key = psu_ipmi_id[self.index]['COUT'] + status, output = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_cout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx57x10^-2 + psu_current = int(value, 16) * 57 / 100.0 + + return psu_current + + def get_power(self): + """ + Retrieves current energy supplied by PSU + Returns: + A float number, the power in watts, e.g. 302.6 + """ + psu_power = 0.0 + psu_pout_key = psu_ipmi_id[self.index]['POUT'] + status, output = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx68x10^-1 + psu_power = int(value, 16) * 68 / 10.0 + + return psu_power + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + Returns: + A boolean, True if PSU has stablized its output voltages and passed all + its internal self-tests, False if not. + """ + return self.get_status() + + def get_status_led(self): + """ + Gets the state of the PSU status LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if not self.get_presence(): + return "N/A" + + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + + return self.STATUS_LED_COLOR_OFF + + def __get_sensor_threshold(self, sensor_id, th_offset): + status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\ + IPMI_SENSOR_THRESH_CMD.format(sensor_id)) + if status: + value = output.split() + if (int(value[0],16) >> th_offset) & 0x01 == 0x01: + return value[th_offset + 1] + + raise NotImplementedError + + def get_temperature(self): + """ + Retrieves current temperature reading from PSU + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + # PSU's ambient temperature sensor is considered as the PSU temperature + psu_temp = 0.0 + psu_temp_id = psu_ipmi_id[self.index]['TEMP'] + status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\ + IPMI_SENSOR_READ_CMD.format(psu_temp_id)) + if status: + value = output.split()[ANALOG_READ_OFFSET] + psu_temp = float(int(value, 16)) + + return psu_temp + + def get_temperature_high_threshold(self): + """ + Retrieves the high threshold temperature of PSU + Returns: + A float number, the high threshold temperature of PSU in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + # Using critical-high as high threshold + + value = self.__get_sensor_threshold(psu_ipmi_id[self.index]['TEMP'], TH_HCR) + psu_temp_high_threshold = float(int(value, 16)) + + return psu_temp_high_threshold + + def get_voltage_high_threshold(self): + """ + Retrieves the high threshold PSU voltage output + Returns: + A float number, the high threshold output voltage in volts, + e.g. 12.1 + """ + # Using critical-high as high threshold + + value = self.__get_sensor_threshold(psu_ipmi_id[self.index]['VOUT'], TH_HCR) + # Formula: Rx6x10^-2 + psu_voltage_high_crit = int(value, 16) * 6 / 100.0 + + return psu_voltage_high_crit + + def get_voltage_low_threshold(self): + """ + Retrieves the low threshold PSU voltage output + Returns: + A float number, the low threshold output voltage in volts, + e.g. 12.1 + """ + # Using critical-low as low threshold + + value = self.__get_sensor_threshold(psu_ipmi_id[self.index]['VOUT'], TH_LCR) + # Formula: Rx6x10^-2 + psu_voltage_low_crit = int(value, 16) * 6 / 100.0 + + return psu_voltage_low_crit + + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + # Using critical-high as the maximum available safe power limit + + value = self.__get_sensor_threshold(psu_ipmi_id[self.index]['POUT'], TH_HCR) + # Formula: Rx12x10^0 + psu_power_high_crit = int(value, 16) * 12.0 + + return psu_power_high_crit + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return "PSU {}".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + psu_presence = False + psu_pstatus_key = psu_ipmi_id[self.index]['STATUS'] + status, raw_status_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key)) + status_byte = raw_status_read.split()[EVENT_0_7_OFFSET] + + if status: + psu_presence = True if int(status_byte, 16) & 0x01 == 0x01 else False + + return psu_presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + model = "Unknown" + if self.get_presence(): + ipmi_fru_idx = psu_ipmi_id[self.index]['FRU'] + status, raw_model = self._api_helper.ipmi_fru_id( + ipmi_fru_idx, IPMI_FRU_MODEL_KEY) + + fru_pn_list = raw_model.split() + if len(fru_pn_list) > FRU_MODEL: + model = fru_pn_list[FRU_MODEL] + else: + model = "N/A" + + return model + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + serial = "Unknown" + if self.get_presence(): + ipmi_fru_idx = psu_ipmi_id[self.index]['FRU'] + status, raw_model = self._api_helper.ipmi_fru_id( + ipmi_fru_idx, IPMI_FRU_SERIAL_KEY) + + fru_sr_list = raw_model.split() + if len(fru_sr_list) > FRU_SERIAL: + serial = fru_sr_list[FRU_SERIAL] + else: + model = "N/A" + + return serial + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + psu_status = False + psu_pstatus_key = psu_ipmi_id[self.index]['STATUS'] + status, raw_status_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key)) + status_byte = raw_status_read.split()[EVENT_0_7_OFFSET] + + if status: + failure_detected = True if int(status_byte, 16) & 0x02 == 0x02 else False + input_lost = True if int(status_byte, 16) & 0x08 == 0x08 else False + psu_status = False if (input_lost or failure_detected) else True + + return psu_status + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return self.index + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/sfp.py new file mode 100644 index 000000000000..204ee659f91d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/sfp.py @@ -0,0 +1,232 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the sfp status which are available in the platform +# +############################################################################# + +import time + +try: + from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +SFP_I2C_START = 10 +I2C_EEPROM_PATH = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' +RESET_PATH = '/sys/devices/platform/cls-xcvr/hwmon/hwmon{0}/qsfp_resetL' +LP_PATH = '/sys/devices/platform/cls-xcvr/hwmon/hwmon{0}/qsfp_lpmode' +PRS_PATH = '/sys/devices/platform/cls-xcvr/hwmon/hwmon{0}/qsfp_modprsL' + + +class Sfp(SfpOptoeBase): + """Platform-specific SfpOptoe class""" + + def __init__(self, sfp_index=0, sfp_name=None): + SfpOptoeBase.__init__(self) + + self.index = sfp_index + 1 + self._api_helper = APIHelper() + self._name = sfp_name + self._sfp_type = None + + def _detect_sfp_type(self): + sfp_type = 'N/A' + info = self.get_transceiver_info() + if info: + sfp_type = info.get("type_abbrv_name") + # XXX: Need this hack until xcvrd is refactored + if sfp_type in ["OSFP-8X", "QSFP-DD"]: + sfp_type = "QSFP_DD" + return sfp_type + + @property + def sfp_type(self): + if self._sfp_type is None: + self._sfp_type = self._detect_sfp_type() + return self._sfp_type + + def get_eeprom_path(self): + port_to_i2c_mapping = SFP_I2C_START + self.index - 1 + port_eeprom_path = I2C_EEPROM_PATH.format(port_to_i2c_mapping) + return port_eeprom_path + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return self._name + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + if not self.get_presence(): + return False + reset = self.get_reset_status() + if reset: + status = False + else: + status = True + return status + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + Returns: + A Boolean, True if reset enabled, False if disabled + """ + reset_status_raw = self._api_helper.read_txt_file( + RESET_PATH.format((self.index))).rstrip() + if not reset_status_raw: + return False + + reg_value = int(reset_status_raw, 16) + bin_format = bin(reg_value)[2:].zfill(32) + return bin_format[::-1][self.index - 1] == '0' + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + presence_status_raw = self._api_helper.read_txt_file( + PRS_PATH.format((self.index))).rstrip() + + if not presence_status_raw: + return False + + content = presence_status_raw.rstrip() + reg_value = int(content, 16) + + + # Mask absent + absence_mask = 0x1 + + # ModPrsL is active low + if reg_value & absence_mask == 0: + return True + + return False + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + try: + with open(LP_PATH.format((self.index))) as reg_file: + content = reg_file.readline().rstrip() + lpmode = int(content, 16) + except (ValueError, IOError) as e: + return False + + # check LPMode is active low + if lpmode == 0: + return False + + return True + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + Returns: + A boolean, True if successful, False if not + """ + # Check for invalid port_num + + try: + reg_file = open(RESET_PATH.format((self.index)), "r+") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of the + # register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + bit_index = self.index - 1 + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value).rstrip('L')) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register + # to take port out of reset + try: + reg_file = open(RESET_PATH.format((self.index)), "w") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value).rstrip('L')) + reg_file.close() + + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + try: + with open(LP_PATH.format((self.index)), "r+") as reg_file: + reg_file.seek(0) + content = hex(lpmode) + reg_file.write(content) + except IOError as e: + return False + + return True + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of + vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if self.sfp_type == "QSFP_DD": + return super().get_error_description() + + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + return self.SFP_STATUS_OK + + def get_position_in_parent(self): + return self.index + + def is_replaceable(self): + return True diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/thermal.py new file mode 100644 index 000000000000..9f0c9e17adfa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/thermal.py @@ -0,0 +1,205 @@ +############################################################################# +# Celestica +# +# Thermal contains an implementation of SONiC Platform Base API and +# provides the thermal device status which are available in the platform +# +############################################################################# + +import os +import re +import os.path + +try: + from sonic_platform_base.thermal_base import ThermalBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +IPMI_SENSOR_NETFN = "0x04" +IPMI_SS_READ_CMD = "0x2D {}" +IPMI_SS_THRESHOLD_CMD = "0x27 {}" +HIGH_TRESHOLD_SET_KEY = "unc" +DEFAULT_VAL = 'N/A' + +class Thermal(ThermalBase): + """Platform-specific Thermal class""" + + def __init__(self, thermal_index): + ThermalBase.__init__(self) + self._api_helper = APIHelper() + self.index = thermal_index + thermal_list = [\ + ('TEMP_FAN_U52', '0x00', 'Fanboard Center Temp'),\ + ('TEMP_FAN_U17', '0x01', 'Fanboard Right Temp'),\ + ('TEMP_SW_U52', '0x02', 'Switchboard Left Temp'),\ + ('TEMP_SW_U16', '0x03', 'Switchboard Right Temp'),\ + ('TEMP_BB_U3', '0x04', 'Baseboard Temp'),\ + ('TEMP_CPU', '0x05', 'CPU Internal Temp'),\ + ('TEMP_SW_Internal', '0x61', 'ASIC Internal Temp'),\ + ('SW_U04_Temp', '0x4F', 'IR35215 Chip Left Temp'),\ + ('SW_U14_Temp', '0x56', 'IR35215 Chip Right Temp'),\ + ('SW_U4403_Temp', '0x5D', 'IR3584 Chip Temp'),\ + ('PSU1_Temp1', '0x34', 'PSU 1 Ambient Temp'),\ + ('PSU1_Temp2', '0x35', 'PSU 1 Hotspot Temp'),\ + ('PSU2_Temp1', '0x3E', 'PSU 2 Ambient Temp'),\ + ('PSU2_Temp2', '0x3F', 'PSU 2 Hotspot Temp'),\ + ] + self.sensor_id = thermal_list[self.index][0] + self.sensor_reading_addr = thermal_list[self.index][1] + self.sensor_name = thermal_list[self.index][2] + + temp = self.get_temperature(True) + self.minimum_thermal = temp + self.maximum_thermal = temp + + def get_temperature(self, skip_record=False): + """ + Retrieves current temperature reading from thermal + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + temperature = 0.0 + status, raw_ss_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(self.sensor_reading_addr)) + if status and len(raw_ss_read.split()) > 0: + ss_read = raw_ss_read.split()[0] + temperature = float(int(ss_read, 16)) + + if temperature != 0.0: + if not skip_record: + # Record maximum + if temperature > self.maximum_thermal: + self.maximum_thermal = temperature + + # Record minimum + if temperature < self.minimum_thermal: + self.minimum_thermal = temperature + + return temperature + else: + return DEFAULT_VAL + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + Returns: + A float number, the high threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + high_threshold = 0.0 + status, raw_up_thres_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr)) + if status and len(raw_up_thres_read.split()) > 6: + ss_read = raw_up_thres_read.split()[4] + high_threshold = float(int(ss_read, 16)) + if high_threshold != 0.0: + return high_threshold + else: + return DEFAULT_VAL + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal + Returns: + A float number, the low threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + return DEFAULT_VAL + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if not + """ + status, ret_txt = self._api_helper.ipmi_set_ss_thres( + self.sensor_id, HIGH_TRESHOLD_SET_KEY, temperature) + return status + + def set_low_threshold(self, temperature): + """ + Sets the low threshold temperature of thermal + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if not + """ + return False + + def get_high_critical_threshold(self): + """ + Retrieves the high critical threshold temperature of thermal + Returns: + A float number, the high critical threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + high_critical_threshold = 0.0 + status, raw_up_thres_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr)) + if status and len(raw_up_thres_read.split()) > 6: + ss_read = raw_up_thres_read.split()[5] + high_critical_threshold = float(int(ss_read, 16)) + if high_critical_threshold != 0.0: + return high_critical_threshold + else: + return DEFAULT_VAL + + def get_minimum_recorded(self): + """ + Retrieves the minimum recorded temperature of thermal + Returns: + A float number, the minimum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + return self.minimum_thermal + + def get_maximum_recorded(self): + """ + Retrieves the maximum recorded temperature of thermal + Returns: + A float number, the maximum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + return self.maximum_thermal + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the thermal device + Returns: + string: The name of the thermal device + """ + return self.sensor_name + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + return True if self.get_temperature() > 0 else False + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() + + def is_replaceable(self): + """ + Retrieves whether thermal module is replaceable + Returns: + A boolean value, True if replaceable, False if not + """ + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/watchdog.py new file mode 100644 index 000000000000..011759b0f457 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/watchdog.py @@ -0,0 +1,247 @@ +############################################################################# +# Celestica Silverstone +# +# Watchdog contains an implementation of SONiC Platform Base API +# +############################################################################# +import os +import time +import ctypes +import fcntl +import subprocess +import array +import syslog + +try: + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +PLATFORM_CPLD_PATH = '/sys/devices/platform/baseboard-lpc/' +WDT_TIMER_REG = '0xA181' +WDT_ENABLE_REG = '0xA182' +WDT_FEED_REG = '0xA183' +WDT_REMAINTIME_REG1 = '0xA185' +WDT_REMAINTIME_REG2 = '0xA186' +ENABLE_CMD = 0x1 +DISABLE_CMD = 0x0 +WDT_COMMON_ERROR = -1 + + +class Watchdog(WatchdogBase): + + timeout = 0 + + def __init__(self): + WatchdogBase.__init__(self) + + # Set default value + #self._disable() + #self.timeout = self._gettimeout() + self.keepalive = int(1) + + def _get_lpc_reg(self, reg): + file_path = os.path.join(PLATFORM_CPLD_PATH, 'getreg') + status = True + value = None + + try: + with open(file_path, "r+") as fd: + fd.seek(0) + fd.write(reg) + except IOError as e: + syslog.syslog(syslog.LOG_ERR, "Unable to access file: {}".format(e)) + return False, None + try: + with open(file_path) as fd: + value = fd.readline().rstrip() + except IOError as e: + syslog.syslog(syslog.LOG_ERR, "Unable to access file: {}".format(e)) + return False, None + return True, value + + def _set_lpc_reg(self, reg, val): + file_path = os.path.join(PLATFORM_CPLD_PATH, 'setreg') + value = '{} {}'.format(reg, hex(val)) + + try: + with open(file_path, 'w') as fd: + fd.write(str(value)) + except Exception: + return False + return True + + def _enable(self): + """ + Turn on the watchdog timer + """ + # echo 0xA182 0x1 > /sys/devices/platform/baseboard-lpc/setreg + status = self._set_lpc_reg(WDT_ENABLE_REG, ENABLE_CMD) + + if not status: + return False + + return True + + def _disable(self): + """ + Trun off the watchdog timer + """ + # echo 0xA182 0x0 > /sys/devices/platform/baseboard-lpc/setreg + status = self._set_lpc_reg(WDT_ENABLE_REG, DISABLE_CMD) + if not status: + return False + + return True + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + if bool(self.keepalive % 2): + status = self._set_lpc_reg(WDT_FEED_REG, ENABLE_CMD) + else: + status = self._set_lpc_reg(WDT_FEED_REG, DISABLE_CMD) + + if not status: + syslog.syslog(syslog.LOG_ERR, "Feed Watchdog failed") + + self.keepalive = self.keepalive+1 + if (self.keepalive >= 11): + self.keepalive = 1 + + def _settimeout(self, seconds): + """ + set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + second_int = { + 30: 1, + 60: 2, + 180: 3, + 240: 4, + 300: 5, + 420: 6, + 600: 7, + }.get(seconds) + + status = self._set_lpc_reg(WDT_TIMER_REG, second_int) + if not status: + syslog.syslog(syslog.LOG_ERR, "Set timeout failed") + return self._gettimeout() + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + status, data = self._get_lpc_reg(WDT_TIMER_REG) + if status: + pass + + bin_val = bin(int(data, 16))[2:].zfill(3) + + return { + '001': 30, + '010': 60, + '011': 180, + '100': 240, + '101': 300, + '110': 420, + '111': 600, + }.get(bin_val) + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + avaliable_second = [30, 60, 180, 240, 300, 420, 600] + ret = WDT_COMMON_ERROR + + if seconds < 0 or seconds not in avaliable_second: + return ret + + try: + if self.timeout != seconds: + self.timeout = self._settimeout(seconds) + + if self.is_armed(): + self._keepalive() + else: + status = self._enable() + if not status: + syslog.syslog(syslog.LOG_ERR, "Enable watchdog failed") + return ret + + ret = self.timeout + except IOError as e: + syslog.syslog(syslog.LOG_ERR, "{}".format(e)) + + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + status = self._disable() + if status: + disarmed = True + except IOError: + syslog.syslog(syslog.LOG_ERR, "{}".format(e)) + + return disarmed + + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + status, data = self._get_lpc_reg(WDT_ENABLE_REG) + if status: + pass + + armed = int(data, 16) & 0x1 + + return bool(armed) + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Retruns: + An integer specifying the number of seconds remaining on the + watchdog timer. If the watchdog is not armed, returns -1 + """ + retime = 0 + + status, data1 = self._get_lpc_reg(WDT_REMAINTIME_REG1) + if status: + pass + + status, data2 = self._get_lpc_reg(WDT_REMAINTIME_REG2) + if status: + pass + + retime = (int(data2,16) & 0xff) + ((int(data1,16) & 0x3f) * 256) + + if retime <= 0: + return WDT_COMMON_ERROR + else: + return int(retime/10) diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/control b/platform/broadcom/sonic-platform-modules-dell/debian/control index ad88ade6833a..d9ae20c997fe 100644 --- a/platform/broadcom/sonic-platform-modules-dell/debian/control +++ b/platform/broadcom/sonic-platform-modules-dell/debian/control @@ -7,70 +7,70 @@ Standards-Version: 3.9.3 Package: platform-modules-s6000 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-z9100 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-s6100 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-z9264f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-s5212f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-s5224f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-s5232f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-s5248f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-n3248te Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-z9332f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-z9432f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-n3248pxe Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-e3224f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-s5296f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/broadcom/sonic-platform-modules-dell/n3248te/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-dell/n3248te/sonic_platform/component.py index c69d5ef34ea0..800f895d0fb0 100644 --- a/platform/broadcom/sonic-platform-modules-dell/n3248te/sonic_platform/component.py +++ b/platform/broadcom/sonic-platform-modules-dell/n3248te/sonic_platform/component.py @@ -16,7 +16,7 @@ except ImportError as e: raise ImportError(str(e) + "- required module not found") def get_bios_version(): - return subprocess.check_output(['dmidecode', '-s', 'system-version']).strip().decode() + return subprocess.check_output(['cat', '/sys/class/dmi/id/bios_version']).strip().decode() def get_cpld_version(cpld): mjr_ver_path = '/sys/devices/platform/dell-n3248te-cpld.0/' + cpld + '_mjr_ver' diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py index 12b3cfae5606..734feb66bacc 100644 --- a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py @@ -17,6 +17,7 @@ try: + import os import binascii import redis import struct @@ -304,7 +305,7 @@ def __init__(self, is_plugin=False): super(EepromS6000, self).__init__(self.eeprom_path, None, 0, '', True) if not is_plugin: - self.eeprom_data = self.read_eeprom() + self.eeprom_data = "N/A" if os.geteuid() != 0 else self.read_eeprom() def _is_valid_block_checksum(self, e): crc = self.compute_dell_crc(e[:-2]) diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf b/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf index a49166ab6207..9e0111a733cf 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf +++ b/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf @@ -1,3 +1 @@ blacklist wb_fpga_pcie -blacklist wb_i2c_i801 -blacklist wb_i2c_ismt diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile index bacb3839e834..e432430dba46 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile @@ -7,8 +7,6 @@ KERNEL_SRC ?= /lib/modules/$(KVERSION) module_out_put_dir := $(PWD)/build export module_out_put_dir -KERNEL_MODULES_SRC = $(PWD)/linux - PLAT_SYSFS_DIR = $(PWD)/plat_sysfs PINCTRL = $(PWD)/pinctrl @@ -36,9 +34,13 @@ obj-m += wb_xdpe132g5c.o obj-m += wb_uio_irq.o obj-m += hw_test.o obj-m += wb_mdio_gpio_device.o +obj-m += wb_csu550.o +obj-m += wb_i2c_mux_pca9641.o +obj-m += wb_i2c_mux_pca954x.o +obj-m += wb_xdpe132g5c_pmbus.o +obj-m += wb_i2c_gpio_device.o all : - $(MAKE) -C $(KERNEL_MODULES_SRC) $(MAKE) -C $(PLAT_SYSFS_DIR) $(MAKE) -C $(PINCTRL) $(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile deleted file mode 100644 index a3da5aadf5ab..000000000000 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile +++ /dev/null @@ -1,36 +0,0 @@ -PWD = $(shell pwd) - -EXTRA_CFLAGS:= -I$(M)/include -EXTRA_CFLAGS+= -Wall -#ifdef ENABLE_GCOV -#ifeq ($(ENABLE_GCOV), y) -#EXTRA_CFLAGS+= -fprofile-arcs -ftest-coverage -lgcov -#endif -#endif # ENABLE_GCOV - -obj-m := wb_lm75.o -obj-m += wb_tmp401.o -obj-m += wb_i2c_mux_pca9641.o -obj-m += wb_i2c_mux_pca954x.o -obj-m += wb_i2c_i801.o -obj-m += wb_i2c_algo_bit.o -obj-m += wb_i2c_gpio.o -obj-m += wb_i2c_gpio_device.o -obj-m += wb_pmbus_core.o -obj-m += wb_csu550.o -obj-m += wb_ina3221.o -obj-m += wb_isl68137.o -obj-m += wb_tps53622.o -obj-m += wb_ucd9000.o -obj-m += wb_xdpe12284.o -obj-m += wb_xdpe132g5c_pmbus.o -obj-m += wb_i2c_ismt.o - -all: - $(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules - @if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi - cp -p $(PWD)/*.ko $(module_out_put_dir) -clean: - rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/*.mod - rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order - rm -rf $(PWD)/.tmp_versions diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c deleted file mode 100644 index c98ac7a1c5b6..000000000000 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c +++ /dev/null @@ -1,725 +0,0 @@ -/* ------------------------------------------------------------------------- - * i2c-algo-bit.c i2c driver algorithms for bit-shift adapters - * ------------------------------------------------------------------------- - * Copyright (C) 1995-2000 Simon G. Vogl - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - * ------------------------------------------------------------------------- */ - -#include -#include -#include -#include -#include -#include -#include - -static int g_i2c_algo_bit_debug = 0; -static int g_i2c_algo_bit_error = 0; - -module_param(g_i2c_algo_bit_debug, int, S_IRUGO | S_IWUSR); -module_param(g_i2c_algo_bit_error, int, S_IRUGO | S_IWUSR); - -#define I2C_ALGO_BIT_DEBUG(fmt, args...) do { \ - if (g_i2c_algo_bit_debug) { \ - printk(KERN_INFO "[I2C_ALGO_BIT][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ - } \ -} while (0) - -#define I2C_ALGO_BIT_ERROR(fmt, args...) do { \ - if (g_i2c_algo_bit_error) { \ - printk(KERN_ERR "[I2C_ALGO_BIT][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ - } \ -} while (0) - -/* ----- global defines ----------------------------------------------- */ - -#ifdef DEBUG -#define bit_dbg(level, dev, format, args...) \ - do { \ - if (i2c_debug >= level) \ - dev_dbg(dev, format, ##args); \ - } while (0) -#else -#define bit_dbg(level, dev, format, args...) \ - do {} while (0) -#endif /* DEBUG */ - -/* ----- global variables --------------------------------------------- */ - -static int bit_test; /* see if the line-setting functions work */ -module_param(bit_test, int, S_IRUGO); -MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck"); - -#ifdef DEBUG -static int i2c_debug = 1; -module_param(i2c_debug, int, S_IRUGO | S_IWUSR); -MODULE_PARM_DESC(i2c_debug, - "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose"); -#endif - -/* --- setting states on the bus with the right timing: --------------- */ - -#define setsda(adap, val) adap->setsda(adap->data, val) -#define setscl(adap, val) adap->setscl(adap->data, val) -#define getsda(adap) adap->getsda(adap->data) -#define getscl(adap) adap->getscl(adap->data) - -static inline void sdalo(struct i2c_algo_bit_data *adap) -{ - setsda(adap, 0); - udelay((adap->udelay + 1) / 2); -} - -static inline void sdahi(struct i2c_algo_bit_data *adap) -{ - setsda(adap, 1); - udelay((adap->udelay + 1) / 2); -} - -static inline void scllo(struct i2c_algo_bit_data *adap) -{ - setscl(adap, 0); - udelay(adap->udelay / 2); -} - -/* - * Raise scl line, and do checking for delays. This is necessary for slower - * devices. - */ -static int sclhi(struct i2c_algo_bit_data *adap) -{ - unsigned long start; - - setscl(adap, 1); - - /* Not all adapters have scl sense line... */ - if (!adap->getscl) - goto done; - - start = jiffies; - while (!getscl(adap)) { - /* This hw knows how to read the clock line, so we wait - * until it actually gets high. This is safer as some - * chips may hold it low ("clock stretching") while they - * are processing data internally. - */ - if (time_after(jiffies, start + adap->timeout)) { - /* Test one last time, as we may have been preempted - * between last check and timeout test. - */ - if (getscl(adap)) - break; - return -ETIMEDOUT; - } - cpu_relax(); - } -#ifdef DEBUG - if (jiffies != start && i2c_debug >= 3) - pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go " - "high\n", jiffies - start); -#endif - -done: - udelay(adap->udelay); - return 0; -} - -/* --- other auxiliary functions -------------------------------------- */ -static void i2c_start(struct i2c_algo_bit_data *adap) -{ - /* assert: scl, sda are high */ - setsda(adap, 0); - udelay(adap->udelay); - scllo(adap); -} - -static void i2c_repstart(struct i2c_algo_bit_data *adap) -{ - /* assert: scl is low */ - sdahi(adap); - sclhi(adap); - setsda(adap, 0); - udelay(adap->udelay); - scllo(adap); -} - -static void i2c_stop(struct i2c_algo_bit_data *adap) -{ - /* assert: scl is low */ - sdalo(adap); - sclhi(adap); - setsda(adap, 1); - udelay(adap->udelay); -} - -/* send a byte without start cond., look for arbitration, - check ackn. from slave */ -/* returns: - * 1 if the device acknowledged - * 0 if the device did not ack - * -ETIMEDOUT if an error occurred (while raising the scl line) - */ -static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c) -{ - int i; - int sb; - int ack; - struct i2c_algo_bit_data *adap = i2c_adap->algo_data; - - /* assert: scl is low */ - for (i = 7; i >= 0; i--) { - sb = (c >> i) & 1; - setsda(adap, sb); - udelay((adap->udelay + 1) / 2); - if (sclhi(adap) < 0) { /* timed out */ - bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, " - "timeout at bit #%d\n", (int)c, i); - return -ETIMEDOUT; - } - /* FIXME do arbitration here: - * if (sb && !getsda(adap)) -> ouch! Get out of here. - * - * Report a unique code, so higher level code can retry - * the whole (combined) message and *NOT* issue STOP. - */ - scllo(adap); - } - sdahi(adap); - if (sclhi(adap) < 0) { /* timeout */ - bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, " - "timeout at ack\n", (int)c); - return -ETIMEDOUT; - } - - /* read ack: SDA should be pulled down by slave, or it may - * NAK (usually to report problems with the data we wrote). - */ - ack = !getsda(adap); /* ack: sda is pulled low -> success */ - bit_dbg(2, &i2c_adap->dev, "i2c_outb: 0x%02x %s\n", (int)c, - ack ? "A" : "NA"); - - scllo(adap); - return ack; - /* assert: scl is low (sda undef) */ -} - -static int i2c_inb(struct i2c_adapter *i2c_adap) -{ - /* read byte via i2c port, without start/stop sequence */ - /* acknowledge is sent in i2c_read. */ - int i; - unsigned char indata = 0; - struct i2c_algo_bit_data *adap = i2c_adap->algo_data; - - /* assert: scl is low */ - sdahi(adap); - for (i = 0; i < 8; i++) { - if (sclhi(adap) < 0) { /* timeout */ - bit_dbg(1, &i2c_adap->dev, "i2c_inb: timeout at bit " - "#%d\n", 7 - i); - return -ETIMEDOUT; - } - indata *= 2; - if (getsda(adap)) - indata |= 0x01; - setscl(adap, 0); - udelay(i == 7 ? adap->udelay / 2 : adap->udelay); - } - /* assert: scl is low */ - return indata; -} - -/* - * Sanity check for the adapter hardware - check the reaction of - * the bus lines only if it seems to be idle. - */ -static int test_bus(struct i2c_adapter *i2c_adap) -{ - struct i2c_algo_bit_data *adap = i2c_adap->algo_data; - const char *name = i2c_adap->name; - int scl, sda, ret; - - if (adap->pre_xfer) { - ret = adap->pre_xfer(i2c_adap); - if (ret < 0) - return -ENODEV; - } - - if (adap->getscl == NULL) - pr_info("%s: Testing SDA only, SCL is not readable\n", name); - - sda = getsda(adap); - scl = (adap->getscl == NULL) ? 1 : getscl(adap); - if (!scl || !sda) { - printk(KERN_WARNING - "%s: bus seems to be busy (scl=%d, sda=%d)\n", - name, scl, sda); - goto bailout; - } - - sdalo(adap); - sda = getsda(adap); - scl = (adap->getscl == NULL) ? 1 : getscl(adap); - if (sda) { - printk(KERN_WARNING "%s: SDA stuck high!\n", name); - goto bailout; - } - if (!scl) { - printk(KERN_WARNING "%s: SCL unexpected low " - "while pulling SDA low!\n", name); - goto bailout; - } - - sdahi(adap); - sda = getsda(adap); - scl = (adap->getscl == NULL) ? 1 : getscl(adap); - if (!sda) { - printk(KERN_WARNING "%s: SDA stuck low!\n", name); - goto bailout; - } - if (!scl) { - printk(KERN_WARNING "%s: SCL unexpected low " - "while pulling SDA high!\n", name); - goto bailout; - } - - scllo(adap); - sda = getsda(adap); - scl = (adap->getscl == NULL) ? 0 : getscl(adap); - if (scl) { - printk(KERN_WARNING "%s: SCL stuck high!\n", name); - goto bailout; - } - if (!sda) { - printk(KERN_WARNING "%s: SDA unexpected low " - "while pulling SCL low!\n", name); - goto bailout; - } - - sclhi(adap); - sda = getsda(adap); - scl = (adap->getscl == NULL) ? 1 : getscl(adap); - if (!scl) { - printk(KERN_WARNING "%s: SCL stuck low!\n", name); - goto bailout; - } - if (!sda) { - printk(KERN_WARNING "%s: SDA unexpected low " - "while pulling SCL high!\n", name); - goto bailout; - } - - if (adap->post_xfer) - adap->post_xfer(i2c_adap); - - pr_info("%s: Test OK\n", name); - return 0; -bailout: - sdahi(adap); - sclhi(adap); - - if (adap->post_xfer) - adap->post_xfer(i2c_adap); - - return -ENODEV; -} - -/* ----- Utility functions - */ - -/* try_address tries to contact a chip for a number of - * times before it gives up. - * return values: - * 1 chip answered - * 0 chip did not answer - * -x transmission error - */ -static int try_address(struct i2c_adapter *i2c_adap, - unsigned char addr, int retries) -{ - struct i2c_algo_bit_data *adap = i2c_adap->algo_data; - int i, ret = 0; - - for (i = 0; i <= retries; i++) { - ret = i2c_outb(i2c_adap, addr); - if (ret == 1 || i == retries) - break; - bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n"); - i2c_stop(adap); - udelay(adap->udelay); - yield(); - bit_dbg(3, &i2c_adap->dev, "emitting start condition\n"); - i2c_start(adap); - } - if (i && ret) - bit_dbg(1, &i2c_adap->dev, "Used %d tries to %s client at " - "0x%02x: %s\n", i + 1, - addr & 1 ? "read from" : "write to", addr >> 1, - ret == 1 ? "success" : "failed, timeout?"); - return ret; -} - -static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) -{ - const unsigned char *temp = msg->buf; - int count = msg->len; - unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK; - int retval; - int wrcount = 0; - - while (count > 0) { - retval = i2c_outb(i2c_adap, *temp); - - /* OK/ACK; or ignored NAK */ - if ((retval > 0) || (nak_ok && (retval == 0))) { - count--; - temp++; - wrcount++; - - /* A slave NAKing the master means the slave didn't like - * something about the data it saw. For example, maybe - * the SMBus PEC was wrong. - */ - } else if (retval == 0) { - dev_err(&i2c_adap->dev, "sendbytes: NAK bailout.\n"); - return -EIO; - - /* Timeout; or (someday) lost arbitration - * - * FIXME Lost ARB implies retrying the transaction from - * the first message, after the "winning" master issues - * its STOP. As a rule, upper layer code has no reason - * to know or care about this ... it is *NOT* an error. - */ - } else { - dev_err(&i2c_adap->dev, "sendbytes: error %d\n", - retval); - return retval; - } - } - return wrcount; -} - -static int acknak(struct i2c_adapter *i2c_adap, int is_ack) -{ - struct i2c_algo_bit_data *adap = i2c_adap->algo_data; - - /* assert: sda is high */ - if (is_ack) /* send ack */ - setsda(adap, 0); - udelay((adap->udelay + 1) / 2); - if (sclhi(adap) < 0) { /* timeout */ - dev_err(&i2c_adap->dev, "readbytes: ack/nak timeout\n"); - return -ETIMEDOUT; - } - scllo(adap); - return 0; -} - -static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) -{ - int inval; - int rdcount = 0; /* counts bytes read */ - unsigned char *temp = msg->buf; - int count = msg->len; - const unsigned flags = msg->flags; - - while (count > 0) { - inval = i2c_inb(i2c_adap); - if (inval >= 0) { - *temp = inval; - rdcount++; - } else { /* read timed out */ - break; - } - - temp++; - count--; - - /* Some SMBus transactions require that we receive the - transaction length as the first read byte. */ - if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) { - if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) { - if (!(flags & I2C_M_NO_RD_ACK)) - acknak(i2c_adap, 0); - dev_err(&i2c_adap->dev, "readbytes: invalid " - "block length (%d)\n", inval); - return -EPROTO; - } - /* The original count value accounts for the extra - bytes, that is, either 1 for a regular transaction, - or 2 for a PEC transaction. */ - count += inval; - msg->len += inval; - } - - bit_dbg(2, &i2c_adap->dev, "readbytes: 0x%02x %s\n", - inval, - (flags & I2C_M_NO_RD_ACK) - ? "(no ack/nak)" - : (count ? "A" : "NA")); - - if (!(flags & I2C_M_NO_RD_ACK)) { - inval = acknak(i2c_adap, count); - if (inval < 0) - return inval; - } - } - return rdcount; -} - -/* doAddress initiates the transfer by generating the start condition (in - * try_address) and transmits the address in the necessary format to handle - * reads, writes as well as 10bit-addresses. - * returns: - * 0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set - * -x an error occurred (like: -ENXIO if the device did not answer, or - * -ETIMEDOUT, for example if the lines are stuck...) - */ -static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) -{ - unsigned short flags = msg->flags; - unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK; - struct i2c_algo_bit_data *adap = i2c_adap->algo_data; - - unsigned char addr; - int ret, retries; - - retries = nak_ok ? 0 : i2c_adap->retries; - - if (flags & I2C_M_TEN) { - /* a ten bit address */ - addr = 0xf0 | ((msg->addr >> 7) & 0x06); - bit_dbg(2, &i2c_adap->dev, "addr0: %d\n", addr); - /* try extended address code...*/ - ret = try_address(i2c_adap, addr, retries); - if ((ret != 1) && !nak_ok) { - dev_err(&i2c_adap->dev, - "died at extended address code\n"); - return -ENXIO; - } - /* the remaining 8 bit address */ - ret = i2c_outb(i2c_adap, msg->addr & 0xff); - if ((ret != 1) && !nak_ok) { - /* the chip did not ack / xmission error occurred */ - dev_err(&i2c_adap->dev, "died at 2nd address code\n"); - return -ENXIO; - } - if (flags & I2C_M_RD) { - bit_dbg(3, &i2c_adap->dev, "emitting repeated " - "start condition\n"); - i2c_repstart(adap); - /* okay, now switch into reading mode */ - addr |= 0x01; - ret = try_address(i2c_adap, addr, retries); - if ((ret != 1) && !nak_ok) { - dev_err(&i2c_adap->dev, - "died at repeated address code\n"); - return -EIO; - } - } - } else { /* normal 7bit address */ - addr = msg->addr << 1; - if (flags & I2C_M_RD) - addr |= 1; - if (flags & I2C_M_REV_DIR_ADDR) - addr ^= 1; - ret = try_address(i2c_adap, addr, retries); - if ((ret != 1) && !nak_ok) - return -ENXIO; - } - - return 0; -} - -static void bit_i2c_unblock(struct i2c_adapter *i2c_adap) -{ - int i; - struct i2c_algo_bit_data *adap = i2c_adap->algo_data; - - for (i = 0; i < 9; i++) { - setscl(adap, 0); - udelay(5); - setscl(adap, 1); - udelay(5); - } - setscl(adap, 0); - setsda(adap, 0); - udelay(5); - setscl(adap, 1); - udelay(5); - setsda(adap, 1); -} - -static int check_bit_i2c_unblock(struct i2c_adapter *i2c_adap) -{ - struct i2c_algo_bit_data *adap = i2c_adap->algo_data; - int sda, scl; - - sda = getsda(adap); - scl = getscl(adap); - if ((sda == 0) && scl) { - I2C_ALGO_BIT_ERROR("SCL is high and SDA is low, send 9 clock to device.\n"); - bit_i2c_unblock(i2c_adap); - } - - sda = getsda(adap); - scl = getscl(adap); - if (sda && scl) { - I2C_ALGO_BIT_DEBUG("SCL and SDA are both high, i2c level check ok.\n"); - return 0; - } - dev_warn(&i2c_adap->dev, "Check i2c level failed, SCL %s, SDA %s.\n", scl ? "high" : "low", sda ? "high" : "low"); - return -EIO; -} - -static int bit_xfer(struct i2c_adapter *i2c_adap, - struct i2c_msg msgs[], int num) -{ - struct i2c_msg *pmsg; - struct i2c_algo_bit_data *adap = i2c_adap->algo_data; - int i, ret; - unsigned short nak_ok; - - if (adap->pre_xfer) { - ret = adap->pre_xfer(i2c_adap); - if (ret < 0) - return ret; - } - - if (check_bit_i2c_unblock(i2c_adap) < 0) { - I2C_ALGO_BIT_ERROR("check i2c is block.\n"); - return -EIO; - } - - bit_dbg(3, &i2c_adap->dev, "emitting start condition\n"); - i2c_start(adap); - for (i = 0; i < num; i++) { - pmsg = &msgs[i]; - nak_ok = pmsg->flags & I2C_M_IGNORE_NAK; - if (!(pmsg->flags & I2C_M_NOSTART)) { - if (i) { - bit_dbg(3, &i2c_adap->dev, "emitting " - "repeated start condition\n"); - i2c_repstart(adap); - } - ret = bit_doAddress(i2c_adap, pmsg); - if ((ret != 0) && !nak_ok) { - bit_dbg(1, &i2c_adap->dev, "NAK from " - "device addr 0x%02x msg #%d\n", - msgs[i].addr, i); - goto bailout; - } - } - if (pmsg->flags & I2C_M_RD) { - /* read bytes into buffer*/ - ret = readbytes(i2c_adap, pmsg); - if (ret >= 1) - bit_dbg(2, &i2c_adap->dev, "read %d byte%s\n", - ret, ret == 1 ? "" : "s"); - if (ret < pmsg->len) { - if (ret >= 0) - ret = -EIO; - goto bailout; - } - } else { - /* write bytes from buffer */ - ret = sendbytes(i2c_adap, pmsg); - if (ret >= 1) - bit_dbg(2, &i2c_adap->dev, "wrote %d byte%s\n", - ret, ret == 1 ? "" : "s"); - if (ret < pmsg->len) { - if (ret >= 0) - ret = -EIO; - goto bailout; - } - } - } - ret = i; - -bailout: - bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n"); - i2c_stop(adap); - - if (adap->post_xfer) - adap->post_xfer(i2c_adap); - return ret; -} - -static u32 bit_func(struct i2c_adapter *adap) -{ - return I2C_FUNC_I2C | I2C_FUNC_NOSTART | I2C_FUNC_SMBUS_EMUL | - I2C_FUNC_SMBUS_READ_BLOCK_DATA | - I2C_FUNC_SMBUS_BLOCK_PROC_CALL | - I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING; -} - -/* -----exported algorithm data: ------------------------------------- */ - -const struct i2c_algorithm wb_i2c_bit_algo = { - .master_xfer = bit_xfer, - .functionality = bit_func, -}; -EXPORT_SYMBOL(wb_i2c_bit_algo); - -static const struct i2c_adapter_quirks i2c_bit_quirk_no_clk_stretch = { - .flags = I2C_AQ_NO_CLK_STRETCH, -}; - -/* - * registering functions to load algorithms at runtime - */ -static int __i2c_bit_add_bus(struct i2c_adapter *adap, - int (*add_adapter)(struct i2c_adapter *)) -{ - struct i2c_algo_bit_data *bit_adap = adap->algo_data; - int ret; - - if (bit_test) { - ret = test_bus(adap); - if (bit_test >= 2 && ret < 0) - return -ENODEV; - } - - /* register new adapter to i2c module... */ - adap->algo = &wb_i2c_bit_algo; - adap->retries = 3; - if (bit_adap->getscl == NULL) - adap->quirks = &i2c_bit_quirk_no_clk_stretch; - - ret = add_adapter(adap); - if (ret < 0) - return ret; - - /* Complain if SCL can't be read */ - if (bit_adap->getscl == NULL) { - dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n"); - dev_warn(&adap->dev, "Bus may be unreliable\n"); - } - return 0; -} - -int wb_i2c_bit_add_bus(struct i2c_adapter *adap) -{ - return __i2c_bit_add_bus(adap, i2c_add_adapter); -} -EXPORT_SYMBOL(wb_i2c_bit_add_bus); - -int wb_i2c_bit_add_numbered_bus(struct i2c_adapter *adap) -{ - return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter); -} -EXPORT_SYMBOL(wb_i2c_bit_add_numbered_bus); - -MODULE_AUTHOR("support"); -MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm"); -MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c deleted file mode 100644 index 0362e905fddb..000000000000 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c +++ /dev/null @@ -1,431 +0,0 @@ -/* - * Bitbanging I2C bus driver using the GPIO API - * - * Copyright (C) 2007 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -extern int wb_i2c_bit_add_numbered_bus(struct i2c_adapter *adap); - -struct i2c_gpio_private_data { - struct gpio_desc *sda; - struct gpio_desc *scl; - struct i2c_adapter adap; - struct i2c_algo_bit_data bit_data; - struct i2c_gpio_platform_data pdata; -#ifdef CONFIG_I2C_GPIO_FAULT_INJECTOR - struct dentry *debug_dir; -#endif -}; - -/* - * Toggle SDA by changing the output value of the pin. This is only - * valid for pins configured as open drain (i.e. setting the value - * high effectively turns off the output driver.) - */ -static void i2c_gpio_setsda_val(void *data, int state) -{ - struct i2c_gpio_private_data *priv = data; - - gpiod_set_value_cansleep(priv->sda, state); -} - -/* - * Toggle SCL by changing the output value of the pin. This is used - * for pins that are configured as open drain and for output-only - * pins. The latter case will break the i2c protocol, but it will - * often work in practice. - */ -static void i2c_gpio_setscl_val(void *data, int state) -{ - struct i2c_gpio_private_data *priv = data; - - gpiod_set_value_cansleep(priv->scl, state); -} - -static int i2c_gpio_getsda(void *data) -{ - struct i2c_gpio_private_data *priv = data; - - return gpiod_get_value_cansleep(priv->sda); -} - -static int i2c_gpio_getscl(void *data) -{ - struct i2c_gpio_private_data *priv = data; - - return gpiod_get_value_cansleep(priv->scl); -} - -#ifdef CONFIG_I2C_GPIO_FAULT_INJECTOR -static struct dentry *i2c_gpio_debug_dir; - -#define setsda(bd, val) ((bd)->setsda((bd)->data, val)) -#define setscl(bd, val) ((bd)->setscl((bd)->data, val)) -#define getsda(bd) ((bd)->getsda((bd)->data)) -#define getscl(bd) ((bd)->getscl((bd)->data)) - -#define WIRE_ATTRIBUTE(wire) \ -static int fops_##wire##_get(void *data, u64 *val) \ -{ \ - struct i2c_gpio_private_data *priv = data; \ - \ - i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); \ - *val = get##wire(&priv->bit_data); \ - i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); \ - return 0; \ -} \ -static int fops_##wire##_set(void *data, u64 val) \ -{ \ - struct i2c_gpio_private_data *priv = data; \ - \ - i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); \ - set##wire(&priv->bit_data, val); \ - i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); \ - return 0; \ -} \ -DEFINE_DEBUGFS_ATTRIBUTE(fops_##wire, fops_##wire##_get, fops_##wire##_set, "%llu\n") - -WIRE_ATTRIBUTE(scl); -WIRE_ATTRIBUTE(sda); - -static void i2c_gpio_incomplete_transfer(struct i2c_gpio_private_data *priv, - u32 pattern, u8 pattern_size) -{ - struct i2c_algo_bit_data *bit_data = &priv->bit_data; - int i; - - i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); - - /* START condition */ - setsda(bit_data, 0); - udelay(bit_data->udelay); - - /* Send pattern, request ACK, don't send STOP */ - for (i = pattern_size - 1; i >= 0; i--) { - setscl(bit_data, 0); - udelay(bit_data->udelay / 2); - setsda(bit_data, (pattern >> i) & 1); - udelay((bit_data->udelay + 1) / 2); - setscl(bit_data, 1); - udelay(bit_data->udelay); - } - - i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); -} - -static int fops_incomplete_addr_phase_set(void *data, u64 addr) -{ - struct i2c_gpio_private_data *priv = data; - u32 pattern; - - if (addr > 0x7f) - return -EINVAL; - - /* ADDR (7 bit) + RD (1 bit) + Client ACK, keep SDA hi (1 bit) */ - pattern = (addr << 2) | 3; - - i2c_gpio_incomplete_transfer(priv, pattern, 9); - - return 0; -} -DEFINE_DEBUGFS_ATTRIBUTE(fops_incomplete_addr_phase, NULL, fops_incomplete_addr_phase_set, "%llu\n"); - -static int fops_incomplete_write_byte_set(void *data, u64 addr) -{ - struct i2c_gpio_private_data *priv = data; - u32 pattern; - - if (addr > 0x7f) - return -EINVAL; - - /* ADDR (7 bit) + WR (1 bit) + Client ACK (1 bit) */ - pattern = (addr << 2) | 1; - /* 0x00 (8 bit) + Client ACK, keep SDA hi (1 bit) */ - pattern = (pattern << 9) | 1; - - i2c_gpio_incomplete_transfer(priv, pattern, 18); - - return 0; -} -DEFINE_DEBUGFS_ATTRIBUTE(fops_incomplete_write_byte, NULL, fops_incomplete_write_byte_set, "%llu\n"); - -static void i2c_gpio_fault_injector_init(struct platform_device *pdev) -{ - struct i2c_gpio_private_data *priv = platform_get_drvdata(pdev); - - /* - * If there will be a debugfs-dir per i2c adapter somewhen, put the - * 'fault-injector' dir there. Until then, we have a global dir with - * all adapters as subdirs. - */ - if (!i2c_gpio_debug_dir) { - i2c_gpio_debug_dir = debugfs_create_dir("i2c-fault-injector", NULL); - if (!i2c_gpio_debug_dir) - return; - } - - priv->debug_dir = debugfs_create_dir(pdev->name, i2c_gpio_debug_dir); - if (!priv->debug_dir) - return; - - debugfs_create_file_unsafe("scl", 0600, priv->debug_dir, priv, &fops_scl); - debugfs_create_file_unsafe("sda", 0600, priv->debug_dir, priv, &fops_sda); - debugfs_create_file_unsafe("incomplete_address_phase", 0200, priv->debug_dir, - priv, &fops_incomplete_addr_phase); - debugfs_create_file_unsafe("incomplete_write_byte", 0200, priv->debug_dir, - priv, &fops_incomplete_write_byte); -} - -static void i2c_gpio_fault_injector_exit(struct platform_device *pdev) -{ - struct i2c_gpio_private_data *priv = platform_get_drvdata(pdev); - - debugfs_remove_recursive(priv->debug_dir); -} -#else -static inline void i2c_gpio_fault_injector_init(struct platform_device *pdev) {} -static inline void i2c_gpio_fault_injector_exit(struct platform_device *pdev) {} -#endif /* CONFIG_I2C_GPIO_FAULT_INJECTOR*/ - -static void of_i2c_gpio_get_props(struct device_node *np, - struct i2c_gpio_platform_data *pdata) -{ - u32 reg; - - of_property_read_u32(np, "i2c-gpio,delay-us", &pdata->udelay); - - if (!of_property_read_u32(np, "i2c-gpio,timeout-ms", ®)) - pdata->timeout = msecs_to_jiffies(reg); - - pdata->sda_is_open_drain = - of_property_read_bool(np, "i2c-gpio,sda-open-drain"); - pdata->scl_is_open_drain = - of_property_read_bool(np, "i2c-gpio,scl-open-drain"); - pdata->scl_is_output_only = - of_property_read_bool(np, "i2c-gpio,scl-output-only"); -} - -static struct gpio_desc *i2c_gpio_get_desc(struct device *dev, - const char *con_id, - unsigned int index, - enum gpiod_flags gflags) -{ - struct gpio_desc *retdesc; - int ret; - - retdesc = devm_gpiod_get(dev, con_id, gflags); - if (!IS_ERR(retdesc)) { - dev_dbg(dev, "got GPIO from name %s\n", con_id); - return retdesc; - } - - retdesc = devm_gpiod_get_index(dev, NULL, index, gflags); - if (!IS_ERR(retdesc)) { - dev_dbg(dev, "got GPIO from index %u\n", index); - return retdesc; - } - - ret = PTR_ERR(retdesc); - - /* FIXME: hack in the old code, is this really necessary? */ - if (ret == -EINVAL) - retdesc = ERR_PTR(-EPROBE_DEFER); - - /* This happens if the GPIO driver is not yet probed, let's defer */ - if (ret == -ENOENT) - retdesc = ERR_PTR(-EPROBE_DEFER); - - if (PTR_ERR(retdesc) != -EPROBE_DEFER) - dev_err(dev, "error trying to get descriptor: %d\n", ret); - - return retdesc; -} - -static int i2c_gpio_probe(struct platform_device *pdev) -{ - struct i2c_gpio_private_data *priv; - struct i2c_gpio_platform_data *pdata; - struct i2c_algo_bit_data *bit_data; - struct i2c_adapter *adap; - struct device *dev = &pdev->dev; - struct device_node *np = dev->of_node; - enum gpiod_flags gflags; - int ret; - - priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; - - adap = &priv->adap; - bit_data = &priv->bit_data; - pdata = &priv->pdata; - - if (np) { - of_i2c_gpio_get_props(np, pdata); - } else { - /* - * If all platform data settings are zero it is OK - * to not provide any platform data from the board. - */ - if (dev_get_platdata(dev)) - memcpy(pdata, dev_get_platdata(dev), sizeof(*pdata)); - } - - /* - * First get the GPIO pins; if it fails, we'll defer the probe. - * If the SDA line is marked from platform data or device tree as - * "open drain" it means something outside of our control is making - * this line being handled as open drain, and we should just handle - * it as any other output. Else we enforce open drain as this is - * required for an I2C bus. - */ - if (pdata->sda_is_open_drain) - gflags = GPIOD_OUT_HIGH; - else - gflags = GPIOD_OUT_HIGH_OPEN_DRAIN; - priv->sda = i2c_gpio_get_desc(dev, "sda", 0, gflags); - if (IS_ERR(priv->sda)) - return PTR_ERR(priv->sda); - - /* - * If the SCL line is marked from platform data or device tree as - * "open drain" it means something outside of our control is making - * this line being handled as open drain, and we should just handle - * it as any other output. Else we enforce open drain as this is - * required for an I2C bus. - */ - if (pdata->scl_is_open_drain) - gflags = GPIOD_OUT_HIGH; - else - gflags = GPIOD_OUT_HIGH_OPEN_DRAIN; - priv->scl = i2c_gpio_get_desc(dev, "scl", 1, gflags); - if (IS_ERR(priv->scl)) - return PTR_ERR(priv->scl); - - if (gpiod_cansleep(priv->sda) || gpiod_cansleep(priv->scl)) - dev_warn(dev, "Slow GPIO pins might wreak havoc into I2C/SMBus bus timing"); - - bit_data->setsda = i2c_gpio_setsda_val; - bit_data->setscl = i2c_gpio_setscl_val; - - if (!pdata->scl_is_output_only) - bit_data->getscl = i2c_gpio_getscl; - bit_data->getsda = i2c_gpio_getsda; - - if (pdata->udelay) - bit_data->udelay = pdata->udelay; - else if (pdata->scl_is_output_only) - bit_data->udelay = 50; /* 10 kHz */ - else - bit_data->udelay = 5; /* 100 kHz */ - - if (pdata->timeout) - bit_data->timeout = pdata->timeout; - else - bit_data->timeout = HZ / 10; /* 100 ms */ - - bit_data->data = priv; - - adap->owner = THIS_MODULE; - if (np) - strlcpy(adap->name, dev_name(dev), sizeof(adap->name)); - else - snprintf(adap->name, sizeof(adap->name), "i2c-gpio%d", pdev->id); - - adap->algo_data = bit_data; - adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; - adap->dev.parent = dev; - adap->dev.of_node = np; - - adap->nr = pdev->id; - ret = wb_i2c_bit_add_numbered_bus(adap); - if (ret) - return ret; - - platform_set_drvdata(pdev, priv); - - /* - * FIXME: using global GPIO numbers is not helpful. If/when we - * get accessors to get the actual name of the GPIO line, - * from the descriptor, then provide that instead. - */ - dev_info(dev, "using lines %u (SDA) and %u (SCL%s)\n", - desc_to_gpio(priv->sda), desc_to_gpio(priv->scl), - pdata->scl_is_output_only - ? ", no clock stretching" : ""); - - i2c_gpio_fault_injector_init(pdev); - - return 0; -} - -static int i2c_gpio_remove(struct platform_device *pdev) -{ - struct i2c_gpio_private_data *priv; - struct i2c_adapter *adap; - - i2c_gpio_fault_injector_exit(pdev); - - priv = platform_get_drvdata(pdev); - adap = &priv->adap; - - i2c_del_adapter(adap); - - return 0; -} - -#if defined(CONFIG_OF) -static const struct of_device_id i2c_gpio_dt_ids[] = { - { .compatible = "wb-i2c-gpio", }, - { /* sentinel */ } -}; - -MODULE_DEVICE_TABLE(of, i2c_gpio_dt_ids); -#endif - -static struct platform_driver i2c_gpio_driver = { - .driver = { - .name = "wb-i2c-gpio", - .of_match_table = of_match_ptr(i2c_gpio_dt_ids), - }, - .probe = i2c_gpio_probe, - .remove = i2c_gpio_remove, -}; - -static int __init i2c_gpio_init(void) -{ - int ret; - - ret = platform_driver_register(&i2c_gpio_driver); - if (ret) - printk(KERN_ERR "i2c-gpio: probe failed: %d\n", ret); - - return ret; -} -subsys_initcall(i2c_gpio_init); - -static void __exit i2c_gpio_exit(void) -{ - platform_driver_unregister(&i2c_gpio_driver); -} -module_exit(i2c_gpio_exit); - -MODULE_AUTHOR("support"); -MODULE_DESCRIPTION("Platform-independent bitbanging I2C driver"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:i2c-gpio"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c deleted file mode 100644 index a733c115487e..000000000000 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c +++ /dev/null @@ -1,2114 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - Copyright (c) 1998 - 2002 Frodo Looijaard , - Philip Edelbrock , and Mark D. Studebaker - - Copyright (C) 2007 - 2014 Jean Delvare - Copyright (C) 2010 Intel Corporation, - David Woodhouse - -*/ - -/* - * Supports the following Intel I/O Controller Hubs (ICH): - * - * I/O Block I2C - * region SMBus Block proc. block - * Chip name PCI ID size PEC buffer call read - * --------------------------------------------------------------------------- - * 82801AA (ICH) 0x2413 16 no no no no - * 82801AB (ICH0) 0x2423 16 no no no no - * 82801BA (ICH2) 0x2443 16 no no no no - * 82801CA (ICH3) 0x2483 32 soft no no no - * 82801DB (ICH4) 0x24c3 32 hard yes no no - * 82801E (ICH5) 0x24d3 32 hard yes yes yes - * 6300ESB 0x25a4 32 hard yes yes yes - * 82801F (ICH6) 0x266a 32 hard yes yes yes - * 6310ESB/6320ESB 0x269b 32 hard yes yes yes - * 82801G (ICH7) 0x27da 32 hard yes yes yes - * 82801H (ICH8) 0x283e 32 hard yes yes yes - * 82801I (ICH9) 0x2930 32 hard yes yes yes - * EP80579 (Tolapai) 0x5032 32 hard yes yes yes - * ICH10 0x3a30 32 hard yes yes yes - * ICH10 0x3a60 32 hard yes yes yes - * 5/3400 Series (PCH) 0x3b30 32 hard yes yes yes - * 6 Series (PCH) 0x1c22 32 hard yes yes yes - * Patsburg (PCH) 0x1d22 32 hard yes yes yes - * Patsburg (PCH) IDF 0x1d70 32 hard yes yes yes - * Patsburg (PCH) IDF 0x1d71 32 hard yes yes yes - * Patsburg (PCH) IDF 0x1d72 32 hard yes yes yes - * DH89xxCC (PCH) 0x2330 32 hard yes yes yes - * Panther Point (PCH) 0x1e22 32 hard yes yes yes - * Lynx Point (PCH) 0x8c22 32 hard yes yes yes - * Lynx Point-LP (PCH) 0x9c22 32 hard yes yes yes - * Avoton (SOC) 0x1f3c 32 hard yes yes yes - * Wellsburg (PCH) 0x8d22 32 hard yes yes yes - * Wellsburg (PCH) MS 0x8d7d 32 hard yes yes yes - * Wellsburg (PCH) MS 0x8d7e 32 hard yes yes yes - * Wellsburg (PCH) MS 0x8d7f 32 hard yes yes yes - * Coleto Creek (PCH) 0x23b0 32 hard yes yes yes - * Wildcat Point (PCH) 0x8ca2 32 hard yes yes yes - * Wildcat Point-LP (PCH) 0x9ca2 32 hard yes yes yes - * BayTrail (SOC) 0x0f12 32 hard yes yes yes - * Braswell (SOC) 0x2292 32 hard yes yes yes - * Sunrise Point-H (PCH) 0xa123 32 hard yes yes yes - * Sunrise Point-LP (PCH) 0x9d23 32 hard yes yes yes - * DNV (SOC) 0x19df 32 hard yes yes yes - * Emmitsburg (PCH) 0x1bc9 32 hard yes yes yes - * Broxton (SOC) 0x5ad4 32 hard yes yes yes - * Lewisburg (PCH) 0xa1a3 32 hard yes yes yes - * Lewisburg Supersku (PCH) 0xa223 32 hard yes yes yes - * Kaby Lake PCH-H (PCH) 0xa2a3 32 hard yes yes yes - * Gemini Lake (SOC) 0x31d4 32 hard yes yes yes - * Cannon Lake-H (PCH) 0xa323 32 hard yes yes yes - * Cannon Lake-LP (PCH) 0x9da3 32 hard yes yes yes - * Cedar Fork (PCH) 0x18df 32 hard yes yes yes - * Ice Lake-LP (PCH) 0x34a3 32 hard yes yes yes - * Comet Lake (PCH) 0x02a3 32 hard yes yes yes - * Comet Lake-H (PCH) 0x06a3 32 hard yes yes yes - * Elkhart Lake (PCH) 0x4b23 32 hard yes yes yes - * Tiger Lake-LP (PCH) 0xa0a3 32 hard yes yes yes - * Tiger Lake-H (PCH) 0x43a3 32 hard yes yes yes - * Jasper Lake (SOC) 0x4da3 32 hard yes yes yes - * Comet Lake-V (PCH) 0xa3a3 32 hard yes yes yes - * Alder Lake-S (PCH) 0x7aa3 32 hard yes yes yes - * - * Features supported by this driver: - * Software PEC no - * Hardware PEC yes - * Block buffer yes - * Block process call transaction yes - * I2C block read transaction yes (doesn't use the block buffer) - * Slave mode no - * SMBus Host Notify yes - * Interrupt processing yes - * - * See the file Documentation/i2c/busses/i2c-i801.rst for details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI -#include -#include -#endif - -#define mem_clear(data, size) memset((data), 0, (size)) - -/* I801 SMBus address offsets */ -#define SMBHSTSTS(p) (0 + (p)->smba) -#define SMBHSTCNT(p) (2 + (p)->smba) -#define SMBHSTCMD(p) (3 + (p)->smba) -#define SMBHSTADD(p) (4 + (p)->smba) -#define SMBHSTDAT0(p) (5 + (p)->smba) -#define SMBHSTDAT1(p) (6 + (p)->smba) -#define SMBBLKDAT(p) (7 + (p)->smba) -#define SMBPEC(p) (8 + (p)->smba) /* ICH3 and later */ -#define SMBAUXSTS(p) (12 + (p)->smba) /* ICH4 and later */ -#define SMBAUXCTL(p) (13 + (p)->smba) /* ICH4 and later */ -#define SMBSLVSTS(p) (16 + (p)->smba) /* ICH3 and later */ -#define SMBSLVCMD(p) (17 + (p)->smba) /* ICH3 and later */ -#define SMBNTFDADD(p) (20 + (p)->smba) /* ICH3 and later */ -#define SMBPINCTL(p) (15 + (p)->smba) /* SMBus Pin Control Register */ - -/* PCI Address Constants */ -#define SMBBAR 4 -#define SMBPCICTL 0x004 -#define SMBPCISTS 0x006 -#define SMBHSTCFG 0x040 -#define TCOBASE 0x050 -#define TCOCTL 0x054 - -#define SBREG_BAR 0x10 -#define SBREG_SMBCTRL 0xc6000c -#define SBREG_SMBCTRL_DNV 0xcf000c - -/* Host status bits for SMBPCISTS */ -#define SMBPCISTS_INTS BIT(3) - -/* Control bits for SMBPCICTL */ -#define SMBPCICTL_INTDIS BIT(10) - -/* Host configuration bits for SMBHSTCFG */ -#define SMBHSTCFG_HST_EN BIT(0) -#define SMBHSTCFG_SMB_SMI_EN BIT(1) -#define SMBHSTCFG_I2C_EN BIT(2) -#define SMBHSTCFG_SSRESET BIT(3) -#define SSRESET_SLEEP_TIME 1 /* 1us */ -#define SSRESET_RETRY_TIME (1000 / SSRESET_SLEEP_TIME) - -/* Pin status for SMBPINCTL */ -#define SMBPINCTL_CLK_STS 1 /* bit0 SMBCLK_CUR_STS*/ -#define SMBPINCTL_SDA_STS 2 /* bit1 SMBDATA_CUR_STS*/ -#define SMBPINCTL_CLK_CTL 4 /* bit2 SMBCLK_CTL */ - -#define SMBHSTCFG_SPD_WD BIT(4) - -/* TCO configuration bits for TCOCTL */ -#define TCOCTL_EN BIT(8) - -/* Auxiliary status register bits, ICH4+ only */ -#define SMBAUXSTS_CRCE BIT(0) -#define SMBAUXSTS_STCO BIT(1) - -/* Auxiliary control register bits, ICH4+ only */ -#define SMBAUXCTL_CRC BIT(0) -#define SMBAUXCTL_E32B BIT(1) - -/* Other settings */ -#define MAX_RETRIES 400 - -/* I801 command constants */ -#define I801_QUICK 0x00 -#define I801_BYTE 0x04 -#define I801_BYTE_DATA 0x08 -#define I801_WORD_DATA 0x0C -#define I801_PROC_CALL 0x10 /* unimplemented */ -#define I801_BLOCK_DATA 0x14 -#define I801_I2C_BLOCK_DATA 0x18 /* ICH5 and later */ -#define I801_BLOCK_PROC_CALL 0x1C - -/* I801 Host Control register bits */ -#define SMBHSTCNT_INTREN BIT(0) -#define SMBHSTCNT_KILL BIT(1) -#define SMBHSTCNT_LAST_BYTE BIT(5) -#define SMBHSTCNT_START BIT(6) -#define SMBHSTCNT_PEC_EN BIT(7) /* ICH3 and later */ - -/* I801 Hosts Status register bits */ -#define SMBHSTSTS_BYTE_DONE BIT(7) -#define SMBHSTSTS_INUSE_STS BIT(6) -#define SMBHSTSTS_SMBALERT_STS BIT(5) -#define SMBHSTSTS_FAILED BIT(4) -#define SMBHSTSTS_BUS_ERR BIT(3) -#define SMBHSTSTS_DEV_ERR BIT(2) -#define SMBHSTSTS_INTR BIT(1) -#define SMBHSTSTS_HOST_BUSY BIT(0) - -/* Host Notify Status register bits */ -#define SMBSLVSTS_HST_NTFY_STS BIT(0) - -/* Host Notify Command register bits */ -#define SMBSLVCMD_HST_NTFY_INTREN BIT(0) - -#define STATUS_ERROR_FLAGS (SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | \ - SMBHSTSTS_DEV_ERR) - -#define STATUS_FLAGS (SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR | \ - STATUS_ERROR_FLAGS) - -/* Older devices have their ID defined in */ -#define PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS 0x02a3 -#define PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS 0x06a3 -#define PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS 0x0f12 -#define PCI_DEVICE_ID_INTEL_CDF_SMBUS 0x18df -#define PCI_DEVICE_ID_INTEL_DNV_SMBUS 0x19df -#define PCI_DEVICE_ID_INTEL_EBG_SMBUS 0x1bc9 -#define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22 -#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22 -/* Patsburg also has three 'Integrated Device Function' SMBus controllers */ -#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70 -#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71 -#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72 -#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS 0x1e22 -#define PCI_DEVICE_ID_INTEL_AVOTON_SMBUS 0x1f3c -#define PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS 0x2292 -#define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330 -#define PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS 0x23b0 -#define PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS 0x31d4 -#define PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS 0x34a3 -#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30 -#define PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS 0x43a3 -#define PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS 0x4b23 -#define PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS 0x4da3 -#define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS 0x5ad4 -#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS 0x7aa3 -#define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22 -#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS 0x8ca2 -#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS 0x8d22 -#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0 0x8d7d -#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1 0x8d7e -#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2 0x8d7f -#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS 0x9c22 -#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS 0x9ca2 -#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS 0x9d23 -#define PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS 0x9da3 -#define PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS 0xa0a3 -#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS 0xa123 -#define PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS 0xa1a3 -#define PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS 0xa223 -#define PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS 0xa2a3 -#define PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS 0xa323 -#define PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS 0xa3a3 - -struct i801_mux_config { - char *gpio_chip; - unsigned values[3]; - int n_values; - unsigned classes[3]; - unsigned gpios[2]; /* Relative to gpio_chip->base */ - int n_gpios; -}; - -struct i801_priv { - struct i2c_adapter adapter; - unsigned long smba; - unsigned char original_hstcfg; - unsigned char original_slvcmd; - struct pci_dev *pci_dev; - unsigned int features; - - /* isr processing */ - wait_queue_head_t waitq; - u8 status; - - /* Command state used by isr for byte-by-byte block transactions */ - u8 cmd; - bool is_read; - int count; - int len; - u8 *data; - -#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI - const struct i801_mux_config *mux_drvdata; - struct platform_device *mux_pdev; - struct gpiod_lookup_table *lookup; -#endif - struct platform_device *tco_pdev; - - /* - * If set to true the host controller registers are reserved for - * ACPI AML use. Protected by acpi_lock. - */ - bool acpi_reserved; - struct mutex acpi_lock; -}; - -#define FEATURE_SMBUS_PEC BIT(0) -#define FEATURE_BLOCK_BUFFER BIT(1) -#define FEATURE_BLOCK_PROC BIT(2) -#define FEATURE_I2C_BLOCK_READ BIT(3) -#define FEATURE_IRQ BIT(4) -#define FEATURE_HOST_NOTIFY BIT(5) -/* Not really a feature, but it's convenient to handle it as such */ -#define FEATURE_IDF BIT(15) -#define FEATURE_TCO_SPT BIT(16) -#define FEATURE_TCO_CNL BIT(17) - -static const char *i801_feature_names[] = { - "SMBus PEC", - "Block buffer", - "Block process call", - "I2C block read", - "Interrupt", - "SMBus Host Notify", -}; - -static unsigned int disable_features; -module_param(disable_features, uint, S_IRUGO | S_IWUSR); -MODULE_PARM_DESC(disable_features, "Disable selected driver features:\n" - "\t\t 0x01 disable SMBus PEC\n" - "\t\t 0x02 disable the block buffer\n" - "\t\t 0x08 disable the I2C block read functionality\n" - "\t\t 0x10 don't use interrupts\n" - "\t\t 0x20 disable SMBus Host Notify "); - -static void i801_setscl(struct i801_priv *priv, unsigned int level) -{ - int pin_status; - pin_status = inb_p(SMBPINCTL(priv)); - if (level == 0) { - pin_status &= (~SMBPINCTL_CLK_CTL); - } - else { - pin_status |= SMBPINCTL_CLK_CTL; - } - outb_p(pin_status, SMBPINCTL(priv)); - return; -} - -static void i801_i2c_unblock(struct i801_priv *priv) -{ - int i; - for (i = 0; i < 10; i++) { - i801_setscl(priv, 0); - udelay(5); - i801_setscl(priv, 1); - udelay(5); - } - return; -} - -static int i801_check_i2c_unblock(struct i801_priv *priv) -{ - int pin_status; - - pin_status = inb_p(SMBPINCTL(priv)); - if ( (!(pin_status & SMBPINCTL_SDA_STS) ) && (pin_status & SMBPINCTL_CLK_STS) ) { - dev_dbg(&priv->pci_dev->dev, "SDA is low, send 9 clock to device!\n"); - i801_i2c_unblock(priv); - } - return 0; -} - -static void i801_do_reset(struct i801_priv *priv) -{ - unsigned char tmp; - unsigned int retry_count = 0; - - pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp); - tmp |= SMBHSTCFG_SSRESET; - pci_write_config_byte(priv->pci_dev, SMBHSTCFG, tmp); - pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp); - - while( ((tmp & SMBHSTCFG_SSRESET) != 0) && (retry_count < SSRESET_RETRY_TIME)) { - usleep_range(SSRESET_SLEEP_TIME, SSRESET_SLEEP_TIME + 1); - retry_count++; - pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp); - } - - return ; -} - -static int i801_check_i2c_scl(struct i801_priv *priv) -{ - int pin_status; - - pin_status = inb_p(SMBPINCTL(priv)); - if ( (pin_status & SMBPINCTL_SDA_STS) && (pin_status & SMBPINCTL_CLK_STS) ) { - return 0; - } - - dev_dbg(&priv->pci_dev->dev, "SDA or SCL is low, begin to reset SMBus adapter, pin_status: 0x%x\n",pin_status); - i801_do_reset(priv); - pin_status = inb_p(SMBPINCTL(priv)); - if ( (pin_status & SMBPINCTL_SDA_STS) && (pin_status & SMBPINCTL_CLK_STS) ) { - return 0; - } - dev_warn(&priv->pci_dev->dev, "SDA or SCL is low.pin_status:0x%x\n",pin_status); - return -1; -} - -/* Make sure the SMBus host is ready to start transmitting. - Return 0 if it is, -EBUSY if it is not. */ -static int i801_check_pre(struct i801_priv *priv) -{ - int status; - - i801_check_i2c_unblock(priv); - - if (i801_check_i2c_scl(priv)) { - return -EIO; - } - - status = inb_p(SMBHSTSTS(priv)); - if (status & SMBHSTSTS_HOST_BUSY) { - dev_dbg(&priv->pci_dev->dev, "SMBus is busy, begin to reset SMBus adapter!\n"); - - i801_do_reset(priv); - - status = inb_p(SMBHSTSTS(priv)); - if (status & SMBHSTSTS_HOST_BUSY) { - dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n"); - return -EBUSY; - } - } - - status &= STATUS_FLAGS; - if (status) { - dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n", - status); - outb_p(status, SMBHSTSTS(priv)); - status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS; - if (status) { - dev_err(&priv->pci_dev->dev, - "Failed clearing status flags (%02x)\n", - status); - return -EBUSY; - } - } - - /* - * Clear CRC status if needed. - * During normal operation, i801_check_post() takes care - * of it after every operation. We do it here only in case - * the hardware was already in this state when the driver - * started. - */ - if (priv->features & FEATURE_SMBUS_PEC) { - status = inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE; - if (status) { - dev_dbg(&priv->pci_dev->dev, - "Clearing aux status flags (%02x)\n", status); - outb_p(status, SMBAUXSTS(priv)); - status = inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE; - if (status) { - dev_err(&priv->pci_dev->dev, - "Failed clearing aux status flags (%02x)\n", - status); - return -EBUSY; - } - } - } - - return 0; -} - -/* - * Convert the status register to an error code, and clear it. - * Note that status only contains the bits we want to clear, not the - * actual register value. - */ -static int i801_check_post(struct i801_priv *priv, int status) -{ - int result = 0; - - /* - * If the SMBus is still busy, we give up - * Note: This timeout condition only happens when using polling - * transactions. For interrupt operation, NAK/timeout is indicated by - * DEV_ERR. - */ - if (unlikely(status < 0)) { - dev_err(&priv->pci_dev->dev, "Transaction timeout\n"); - /* try to stop the current command */ - dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n"); - outb_p(SMBHSTCNT_KILL, SMBHSTCNT(priv)); - usleep_range(1000, 2000); - outb_p(0, SMBHSTCNT(priv)); - - /* Check if it worked */ - status = inb_p(SMBHSTSTS(priv)); - if ((status & SMBHSTSTS_HOST_BUSY) || - !(status & SMBHSTSTS_FAILED)) - dev_err(&priv->pci_dev->dev, - "Failed terminating the transaction\n"); - outb_p(STATUS_FLAGS, SMBHSTSTS(priv)); - return -ETIMEDOUT; - } - - if (status & SMBHSTSTS_FAILED) { - result = -EIO; - dev_err(&priv->pci_dev->dev, "Transaction failed\n"); - } - if (status & SMBHSTSTS_DEV_ERR) { - /* - * This may be a PEC error, check and clear it. - * - * AUXSTS is handled differently from HSTSTS. - * For HSTSTS, i801_isr() or i801_wait_intr() - * has already cleared the error bits in hardware, - * and we are passed a copy of the original value - * in "status". - * For AUXSTS, the hardware register is left - * for us to handle here. - * This is asymmetric, slightly iffy, but safe, - * since all this code is serialized and the CRCE - * bit is harmless as long as it's cleared before - * the next operation. - */ - if ((priv->features & FEATURE_SMBUS_PEC) && - (inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE)) { - outb_p(SMBAUXSTS_CRCE, SMBAUXSTS(priv)); - result = -EBADMSG; - dev_dbg(&priv->pci_dev->dev, "PEC error\n"); - } else { - result = -ENXIO; - dev_dbg(&priv->pci_dev->dev, "No response\n"); - } - } - if (status & SMBHSTSTS_BUS_ERR) { - result = -EAGAIN; - dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n"); - } - - /* Clear status flags except BYTE_DONE, to be cleared by caller */ - outb_p(status, SMBHSTSTS(priv)); - - return result; -} - -/* Wait for BUSY being cleared and either INTR or an error flag being set */ -static int i801_wait_intr(struct i801_priv *priv) -{ - int timeout = 0; - int status; - - /* We will always wait for a fraction of a second! */ - do { - usleep_range(250, 500); - status = inb_p(SMBHSTSTS(priv)); - } while (((status & SMBHSTSTS_HOST_BUSY) || - !(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR))) && - (timeout++ < MAX_RETRIES)); - - if (timeout > MAX_RETRIES) { - dev_dbg(&priv->pci_dev->dev, "INTR Timeout!\n"); - return -ETIMEDOUT; - } - return status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR); -} - -/* Wait for either BYTE_DONE or an error flag being set */ -static int i801_wait_byte_done(struct i801_priv *priv) -{ - int timeout = 0; - int status; - - /* We will always wait for a fraction of a second! */ - do { - usleep_range(250, 500); - status = inb_p(SMBHSTSTS(priv)); - } while (!(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_BYTE_DONE)) && - (timeout++ < MAX_RETRIES)); - - if (timeout > MAX_RETRIES) { - dev_dbg(&priv->pci_dev->dev, "BYTE_DONE Timeout!\n"); - return -ETIMEDOUT; - } - return status & STATUS_ERROR_FLAGS; -} - -static int i801_transaction(struct i801_priv *priv, int xact) -{ - int status; - int result; - const struct i2c_adapter *adap = &priv->adapter; - - result = i801_check_pre(priv); - if (result < 0) - return result; - - if (priv->features & FEATURE_IRQ) { - outb_p(xact | SMBHSTCNT_INTREN | SMBHSTCNT_START, - SMBHSTCNT(priv)); - result = wait_event_timeout(priv->waitq, - (status = priv->status), - adap->timeout); - if (!result) { - status = -ETIMEDOUT; - dev_warn(&priv->pci_dev->dev, - "Timeout waiting for interrupt!\n"); - } - priv->status = 0; - return i801_check_post(priv, status); - } - - /* the current contents of SMBHSTCNT can be overwritten, since PEC, - * SMBSCMD are passed in xact */ - outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv)); - - status = i801_wait_intr(priv); - return i801_check_post(priv, status); -} - -static int i801_block_transaction_by_block(struct i801_priv *priv, - union i2c_smbus_data *data, - char read_write, int command, - int hwpec) -{ - int i, len; - int status; - int xact = hwpec ? SMBHSTCNT_PEC_EN : 0; - - switch (command) { - case I2C_SMBUS_BLOCK_PROC_CALL: - xact |= I801_BLOCK_PROC_CALL; - break; - case I2C_SMBUS_BLOCK_DATA: - xact |= I801_BLOCK_DATA; - break; - default: - return -EOPNOTSUPP; - } - - inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */ - - /* Use 32-byte buffer to process this transaction */ - if (read_write == I2C_SMBUS_WRITE) { - len = data->block[0]; - outb_p(len, SMBHSTDAT0(priv)); - for (i = 0; i < len; i++) - outb_p(data->block[i+1], SMBBLKDAT(priv)); - } - - status = i801_transaction(priv, xact); - if (status) - return status; - - if (read_write == I2C_SMBUS_READ || - command == I2C_SMBUS_BLOCK_PROC_CALL) { - len = inb_p(SMBHSTDAT0(priv)); - if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) - return -EPROTO; - - data->block[0] = len; - for (i = 0; i < len; i++) - data->block[i + 1] = inb_p(SMBBLKDAT(priv)); - } - return 0; -} - -static void i801_isr_byte_done(struct i801_priv *priv) -{ - if (priv->is_read) { - /* For SMBus block reads, length is received with first byte */ - if (((priv->cmd & 0x1c) == I801_BLOCK_DATA) && - (priv->count == 0)) { - priv->len = inb_p(SMBHSTDAT0(priv)); - if (priv->len < 1 || priv->len > I2C_SMBUS_BLOCK_MAX) { - dev_err(&priv->pci_dev->dev, - "Illegal SMBus block read size %d\n", - priv->len); - /* FIXME: Recover */ - priv->len = I2C_SMBUS_BLOCK_MAX; - } else { - dev_dbg(&priv->pci_dev->dev, - "SMBus block read size is %d\n", - priv->len); - } - priv->data[-1] = priv->len; - } - - /* Read next byte */ - if (priv->count < priv->len) - priv->data[priv->count++] = inb(SMBBLKDAT(priv)); - else - dev_dbg(&priv->pci_dev->dev, - "Discarding extra byte on block read\n"); - - /* Set LAST_BYTE for last byte of read transaction */ - if (priv->count == priv->len - 1) - outb_p(priv->cmd | SMBHSTCNT_LAST_BYTE, - SMBHSTCNT(priv)); - } else if (priv->count < priv->len - 1) { - /* Write next byte, except for IRQ after last byte */ - outb_p(priv->data[++priv->count], SMBBLKDAT(priv)); - } - - /* Clear BYTE_DONE to continue with next byte */ - outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv)); -} - -static irqreturn_t i801_host_notify_isr(struct i801_priv *priv) -{ - unsigned short addr; - - addr = inb_p(SMBNTFDADD(priv)) >> 1; - - /* - * With the tested platforms, reading SMBNTFDDAT (22 + (p)->smba) - * always returns 0. Our current implementation doesn't provide - * data, so we just ignore it. - */ - i2c_handle_smbus_host_notify(&priv->adapter, addr); - - /* clear Host Notify bit and return */ - outb_p(SMBSLVSTS_HST_NTFY_STS, SMBSLVSTS(priv)); - return IRQ_HANDLED; -} - -/* - * There are three kinds of interrupts: - * - * 1) i801 signals transaction completion with one of these interrupts: - * INTR - Success - * DEV_ERR - Invalid command, NAK or communication timeout - * BUS_ERR - SMI# transaction collision - * FAILED - transaction was canceled due to a KILL request - * When any of these occur, update ->status and wake up the waitq. - * ->status must be cleared before kicking off the next transaction. - * - * 2) For byte-by-byte (I2C read/write) transactions, one BYTE_DONE interrupt - * occurs for each byte of a byte-by-byte to prepare the next byte. - * - * 3) Host Notify interrupts - */ -static irqreturn_t i801_isr(int irq, void *dev_id) -{ - struct i801_priv *priv = dev_id; - u16 pcists; - u8 status; - - /* Confirm this is our interrupt */ - pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists); - if (!(pcists & SMBPCISTS_INTS)) - return IRQ_NONE; - - if (priv->features & FEATURE_HOST_NOTIFY) { - status = inb_p(SMBSLVSTS(priv)); - if (status & SMBSLVSTS_HST_NTFY_STS) - return i801_host_notify_isr(priv); - } - - status = inb_p(SMBHSTSTS(priv)); - if (status & SMBHSTSTS_BYTE_DONE) - i801_isr_byte_done(priv); - - /* - * Clear irq sources and report transaction result. - * ->status must be cleared before the next transaction is started. - */ - status &= SMBHSTSTS_INTR | STATUS_ERROR_FLAGS; - if (status) { - outb_p(status, SMBHSTSTS(priv)); - priv->status = status; - wake_up(&priv->waitq); - } - - return IRQ_HANDLED; -} - -/* - * For "byte-by-byte" block transactions: - * I2C write uses cmd=I801_BLOCK_DATA, I2C_EN=1 - * I2C read uses cmd=I801_I2C_BLOCK_DATA - */ -static int i801_block_transaction_byte_by_byte(struct i801_priv *priv, - union i2c_smbus_data *data, - char read_write, int command, - int hwpec) -{ - int i, len; - int smbcmd; - int status; - int result; - const struct i2c_adapter *adap = &priv->adapter; - - if (command == I2C_SMBUS_BLOCK_PROC_CALL) - return -EOPNOTSUPP; - - result = i801_check_pre(priv); - if (result < 0) - return result; - - len = data->block[0]; - - if (read_write == I2C_SMBUS_WRITE) { - outb_p(len, SMBHSTDAT0(priv)); - outb_p(data->block[1], SMBBLKDAT(priv)); - } - - if (command == I2C_SMBUS_I2C_BLOCK_DATA && - read_write == I2C_SMBUS_READ) - smbcmd = I801_I2C_BLOCK_DATA; - else - smbcmd = I801_BLOCK_DATA; - - if (priv->features & FEATURE_IRQ) { - priv->is_read = (read_write == I2C_SMBUS_READ); - if (len == 1 && priv->is_read) - smbcmd |= SMBHSTCNT_LAST_BYTE; - priv->cmd = smbcmd | SMBHSTCNT_INTREN; - priv->len = len; - priv->count = 0; - priv->data = &data->block[1]; - - outb_p(priv->cmd | SMBHSTCNT_START, SMBHSTCNT(priv)); - result = wait_event_timeout(priv->waitq, - (status = priv->status), - adap->timeout); - if (!result) { - status = -ETIMEDOUT; - dev_warn(&priv->pci_dev->dev, - "Timeout waiting for interrupt!\n"); - } - priv->status = 0; - return i801_check_post(priv, status); - } - - for (i = 1; i <= len; i++) { - if (i == len && read_write == I2C_SMBUS_READ) - smbcmd |= SMBHSTCNT_LAST_BYTE; - outb_p(smbcmd, SMBHSTCNT(priv)); - - if (i == 1) - outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START, - SMBHSTCNT(priv)); - - status = i801_wait_byte_done(priv); - if (status) - goto exit; - - if (i == 1 && read_write == I2C_SMBUS_READ - && command != I2C_SMBUS_I2C_BLOCK_DATA) { - len = inb_p(SMBHSTDAT0(priv)); - if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) { - dev_err(&priv->pci_dev->dev, - "Illegal SMBus block read size %d\n", - len); - /* Recover */ - while (inb_p(SMBHSTSTS(priv)) & - SMBHSTSTS_HOST_BUSY) - outb_p(SMBHSTSTS_BYTE_DONE, - SMBHSTSTS(priv)); - outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv)); - return -EPROTO; - } - data->block[0] = len; - } - - /* Retrieve/store value in SMBBLKDAT */ - if (read_write == I2C_SMBUS_READ) - data->block[i] = inb_p(SMBBLKDAT(priv)); - if (read_write == I2C_SMBUS_WRITE && i+1 <= len) - outb_p(data->block[i+1], SMBBLKDAT(priv)); - - /* signals SMBBLKDAT ready */ - outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv)); - } - - status = i801_wait_intr(priv); -exit: - return i801_check_post(priv, status); -} - -static int i801_set_block_buffer_mode(struct i801_priv *priv) -{ - outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv)); - if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0) - return -EIO; - return 0; -} - -/* Block transaction function */ -static int i801_block_transaction(struct i801_priv *priv, - union i2c_smbus_data *data, char read_write, - int command, int hwpec) -{ - int result = 0; - unsigned char hostc; - - if (command == I2C_SMBUS_I2C_BLOCK_DATA) { - if (read_write == I2C_SMBUS_WRITE) { - /* set I2C_EN bit in configuration register */ - pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc); - pci_write_config_byte(priv->pci_dev, SMBHSTCFG, - hostc | SMBHSTCFG_I2C_EN); - } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) { - dev_err(&priv->pci_dev->dev, - "I2C block read is unsupported!\n"); - return -EOPNOTSUPP; - } - } - - if (read_write == I2C_SMBUS_WRITE - || command == I2C_SMBUS_I2C_BLOCK_DATA) { - if (data->block[0] < 1) - data->block[0] = 1; - if (data->block[0] > I2C_SMBUS_BLOCK_MAX) - data->block[0] = I2C_SMBUS_BLOCK_MAX; - } else { - data->block[0] = 32; /* max for SMBus block reads */ - } - - /* Experience has shown that the block buffer can only be used for - SMBus (not I2C) block transactions, even though the datasheet - doesn't mention this limitation. */ - if ((priv->features & FEATURE_BLOCK_BUFFER) - && command != I2C_SMBUS_I2C_BLOCK_DATA - && i801_set_block_buffer_mode(priv) == 0) - result = i801_block_transaction_by_block(priv, data, - read_write, - command, hwpec); - else - result = i801_block_transaction_byte_by_byte(priv, data, - read_write, - command, hwpec); - - if (command == I2C_SMBUS_I2C_BLOCK_DATA - && read_write == I2C_SMBUS_WRITE) { - /* restore saved configuration register value */ - pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc); - } - return result; -} - -/* Return negative errno on error. */ -static s32 i801_access(struct i2c_adapter *adap, u16 addr, - unsigned short flags, char read_write, u8 command, - int size, union i2c_smbus_data *data) -{ - int hwpec; - int block = 0; - int ret = 0, xact = 0; - struct i801_priv *priv = i2c_get_adapdata(adap); - - mutex_lock(&priv->acpi_lock); - if (priv->acpi_reserved) { - mutex_unlock(&priv->acpi_lock); - return -EBUSY; - } - - pm_runtime_get_sync(&priv->pci_dev->dev); - - hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC) - && size != I2C_SMBUS_QUICK - && size != I2C_SMBUS_I2C_BLOCK_DATA; - - switch (size) { - case I2C_SMBUS_QUICK: - outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), - SMBHSTADD(priv)); - xact = I801_QUICK; - break; - case I2C_SMBUS_BYTE: - outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), - SMBHSTADD(priv)); - if (read_write == I2C_SMBUS_WRITE) - outb_p(command, SMBHSTCMD(priv)); - xact = I801_BYTE; - break; - case I2C_SMBUS_BYTE_DATA: - outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), - SMBHSTADD(priv)); - outb_p(command, SMBHSTCMD(priv)); - if (read_write == I2C_SMBUS_WRITE) - outb_p(data->byte, SMBHSTDAT0(priv)); - xact = I801_BYTE_DATA; - break; - case I2C_SMBUS_WORD_DATA: - outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), - SMBHSTADD(priv)); - outb_p(command, SMBHSTCMD(priv)); - if (read_write == I2C_SMBUS_WRITE) { - outb_p(data->word & 0xff, SMBHSTDAT0(priv)); - outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv)); - } - xact = I801_WORD_DATA; - break; - case I2C_SMBUS_BLOCK_DATA: - outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), - SMBHSTADD(priv)); - outb_p(command, SMBHSTCMD(priv)); - block = 1; - break; - case I2C_SMBUS_I2C_BLOCK_DATA: - /* - * NB: page 240 of ICH5 datasheet shows that the R/#W - * bit should be cleared here, even when reading. - * However if SPD Write Disable is set (Lynx Point and later), - * the read will fail if we don't set the R/#W bit. - */ - outb_p(((addr & 0x7f) << 1) | - ((priv->original_hstcfg & SMBHSTCFG_SPD_WD) ? - (read_write & 0x01) : 0), - SMBHSTADD(priv)); - if (read_write == I2C_SMBUS_READ) { - /* NB: page 240 of ICH5 datasheet also shows - * that DATA1 is the cmd field when reading */ - outb_p(command, SMBHSTDAT1(priv)); - } else - outb_p(command, SMBHSTCMD(priv)); - block = 1; - break; - case I2C_SMBUS_BLOCK_PROC_CALL: - /* - * Bit 0 of the slave address register always indicate a write - * command. - */ - outb_p((addr & 0x7f) << 1, SMBHSTADD(priv)); - outb_p(command, SMBHSTCMD(priv)); - block = 1; - break; - default: - dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n", - size); - ret = -EOPNOTSUPP; - goto out; - } - - if (hwpec) /* enable/disable hardware PEC */ - outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv)); - else - outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC), - SMBAUXCTL(priv)); - - if (block) - ret = i801_block_transaction(priv, data, read_write, size, - hwpec); - else - ret = i801_transaction(priv, xact); - - /* Some BIOSes don't like it when PEC is enabled at reboot or resume - time, so we forcibly disable it after every transaction. Turn off - E32B for the same reason. */ - if (hwpec || block) - outb_p(inb_p(SMBAUXCTL(priv)) & - ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv)); - - if (block) - goto out; - if (ret) - goto out; - if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK)) - goto out; - - switch (xact & 0x7f) { - case I801_BYTE: /* Result put in SMBHSTDAT0 */ - case I801_BYTE_DATA: - data->byte = inb_p(SMBHSTDAT0(priv)); - break; - case I801_WORD_DATA: - data->word = inb_p(SMBHSTDAT0(priv)) + - (inb_p(SMBHSTDAT1(priv)) << 8); - break; - } - -out: - pm_runtime_mark_last_busy(&priv->pci_dev->dev); - pm_runtime_put_autosuspend(&priv->pci_dev->dev); - mutex_unlock(&priv->acpi_lock); - return ret; -} - -static u32 i801_func(struct i2c_adapter *adapter) -{ - struct i801_priv *priv = i2c_get_adapdata(adapter); - - return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | - I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | - I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK | - ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) | - ((priv->features & FEATURE_BLOCK_PROC) ? - I2C_FUNC_SMBUS_BLOCK_PROC_CALL : 0) | - ((priv->features & FEATURE_I2C_BLOCK_READ) ? - I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0) | - ((priv->features & FEATURE_HOST_NOTIFY) ? - I2C_FUNC_SMBUS_HOST_NOTIFY : 0); -} - -static void i801_enable_host_notify(struct i2c_adapter *adapter) -{ - struct i801_priv *priv = i2c_get_adapdata(adapter); - - if (!(priv->features & FEATURE_HOST_NOTIFY)) - return; - - if (!(SMBSLVCMD_HST_NTFY_INTREN & priv->original_slvcmd)) - outb_p(SMBSLVCMD_HST_NTFY_INTREN | priv->original_slvcmd, - SMBSLVCMD(priv)); - - /* clear Host Notify bit to allow a new notification */ - outb_p(SMBSLVSTS_HST_NTFY_STS, SMBSLVSTS(priv)); -} - -static void i801_disable_host_notify(struct i801_priv *priv) -{ - if (!(priv->features & FEATURE_HOST_NOTIFY)) - return; - - outb_p(priv->original_slvcmd, SMBSLVCMD(priv)); -} - -static const struct i2c_algorithm smbus_algorithm = { - .smbus_xfer = i801_access, - .functionality = i801_func, -}; - -static const struct pci_device_id i801_ids[] = { - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_3) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_3) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_3) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_4) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_16) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_17) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EP80579_1) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CDF_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EBG_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BROXTON_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS) }, - { 0, } -}; - -MODULE_DEVICE_TABLE(pci, i801_ids); - -#if defined CONFIG_X86 && defined CONFIG_DMI -static unsigned char apanel_addr; - -/* Scan the system ROM for the signature "FJKEYINF" */ -static __init const void __iomem *bios_signature(const void __iomem *bios) -{ - ssize_t offset; - const unsigned char signature[] = "FJKEYINF"; - - for (offset = 0; offset < 0x10000; offset += 0x10) { - if (check_signature(bios + offset, signature, - sizeof(signature)-1)) - return bios + offset; - } - return NULL; -} - -static void __init input_apanel_init(void) -{ - void __iomem *bios; - const void __iomem *p; - - bios = ioremap(0xF0000, 0x10000); /* Can't fail */ - p = bios_signature(bios); - if (p) { - /* just use the first address */ - apanel_addr = readb(p + 8 + 3) >> 1; - } - iounmap(bios); -} - -struct dmi_onboard_device_info { - const char *name; - u8 type; - unsigned short i2c_addr; - const char *i2c_type; -}; - -static const struct dmi_onboard_device_info dmi_devices[] = { - { "Syleus", DMI_DEV_TYPE_OTHER, 0x73, "fscsyl" }, - { "Hermes", DMI_DEV_TYPE_OTHER, 0x73, "fscher" }, - { "Hades", DMI_DEV_TYPE_OTHER, 0x73, "fschds" }, -}; - -static void dmi_check_onboard_device(u8 type, const char *name, - struct i2c_adapter *adap) -{ - int i; - struct i2c_board_info info; - - for (i = 0; i < ARRAY_SIZE(dmi_devices); i++) { - /* & ~0x80, ignore enabled/disabled bit */ - if ((type & ~0x80) != dmi_devices[i].type) - continue; - if (strcasecmp(name, dmi_devices[i].name)) - continue; - - mem_clear(&info, sizeof(struct i2c_board_info)); - info.addr = dmi_devices[i].i2c_addr; - strlcpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE); - i2c_new_client_device(adap, &info); - break; - } -} - -/* We use our own function to check for onboard devices instead of - dmi_find_device() as some buggy BIOS's have the devices we are interested - in marked as disabled */ -static void dmi_check_onboard_devices(const struct dmi_header *dm, void *adap) -{ - int i, count; - - if (dm->type != 10) - return; - - count = (dm->length - sizeof(struct dmi_header)) / 2; - for (i = 0; i < count; i++) { - const u8 *d = (char *)(dm + 1) + (i * 2); - const char *name = ((char *) dm) + dm->length; - u8 type = d[0]; - u8 s = d[1]; - - if (!s) - continue; - s--; - while (s > 0 && name[0]) { - name += strlen(name) + 1; - s--; - } - if (name[0] == 0) /* Bogus string reference */ - continue; - - dmi_check_onboard_device(type, name, adap); - } -} - -/* NOTE: Keep this list in sync with drivers/platform/x86/dell-smo8800.c */ -static const char *const acpi_smo8800_ids[] = { - "SMO8800", - "SMO8801", - "SMO8810", - "SMO8811", - "SMO8820", - "SMO8821", - "SMO8830", - "SMO8831", -}; - -static acpi_status check_acpi_smo88xx_device(acpi_handle obj_handle, - u32 nesting_level, - void *context, - void **return_value) -{ - struct acpi_device_info *info; - acpi_status status; - char *hid; - int i; - - status = acpi_get_object_info(obj_handle, &info); - if (ACPI_FAILURE(status)) - return AE_OK; - - if (!(info->valid & ACPI_VALID_HID)) - goto smo88xx_not_found; - - hid = info->hardware_id.string; - if (!hid) - goto smo88xx_not_found; - - i = match_string(acpi_smo8800_ids, ARRAY_SIZE(acpi_smo8800_ids), hid); - if (i < 0) - goto smo88xx_not_found; - - kfree(info); - - *((bool *)return_value) = true; - return AE_CTRL_TERMINATE; - -smo88xx_not_found: - kfree(info); - return AE_OK; -} - -static bool is_dell_system_with_lis3lv02d(void) -{ - bool found; - const char *vendor; - - vendor = dmi_get_system_info(DMI_SYS_VENDOR); - if (!vendor || strcmp(vendor, "Dell Inc.")) - return false; - - /* - * Check that ACPI device SMO88xx is present and is functioning. - * Function acpi_get_devices() already filters all ACPI devices - * which are not present or are not functioning. - * ACPI device SMO88xx represents our ST microelectronics lis3lv02d - * accelerometer but unfortunately ACPI does not provide any other - * information (like I2C address). - */ - found = false; - acpi_get_devices(NULL, check_acpi_smo88xx_device, NULL, - (void **)&found); - - return found; -} - -/* - * Accelerometer's I2C address is not specified in DMI nor ACPI, - * so it is needed to define mapping table based on DMI product names. - */ -static const struct { - const char *dmi_product_name; - unsigned short i2c_addr; -} dell_lis3lv02d_devices[] = { - /* - * Dell platform team told us that these Latitude devices have - * ST microelectronics accelerometer at I2C address 0x29. - */ - { "Latitude E5250", 0x29 }, - { "Latitude E5450", 0x29 }, - { "Latitude E5550", 0x29 }, - { "Latitude E6440", 0x29 }, - { "Latitude E6440 ATG", 0x29 }, - { "Latitude E6540", 0x29 }, - /* - * Additional individual entries were added after verification. - */ - { "Latitude 5480", 0x29 }, - { "Vostro V131", 0x1d }, -}; - -static void register_dell_lis3lv02d_i2c_device(struct i801_priv *priv) -{ - struct i2c_board_info info; - const char *dmi_product_name; - int i; - - dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME); - for (i = 0; i < ARRAY_SIZE(dell_lis3lv02d_devices); ++i) { - if (strcmp(dmi_product_name, - dell_lis3lv02d_devices[i].dmi_product_name) == 0) - break; - } - - if (i == ARRAY_SIZE(dell_lis3lv02d_devices)) { - dev_warn(&priv->pci_dev->dev, - "Accelerometer lis3lv02d is present on SMBus but its" - " address is unknown, skipping registration\n"); - return; - } - - mem_clear(&info, sizeof(struct i2c_board_info)); - info.addr = dell_lis3lv02d_devices[i].i2c_addr; - strlcpy(info.type, "lis3lv02d", I2C_NAME_SIZE); - i2c_new_client_device(&priv->adapter, &info); -} - -/* Register optional slaves */ -static void i801_probe_optional_slaves(struct i801_priv *priv) -{ - /* Only register slaves on main SMBus channel */ - if (priv->features & FEATURE_IDF) - return; - - if (apanel_addr) { - struct i2c_board_info info; - - mem_clear(&info, sizeof(struct i2c_board_info)); - info.addr = apanel_addr; - strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE); - i2c_new_client_device(&priv->adapter, &info); - } - - if (dmi_name_in_vendors("FUJITSU")) - dmi_walk(dmi_check_onboard_devices, &priv->adapter); - - if (is_dell_system_with_lis3lv02d()) - register_dell_lis3lv02d_i2c_device(priv); - - /* Instantiate SPD EEPROMs unless the SMBus is multiplexed */ -#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) - if (!priv->mux_drvdata) -#endif - i2c_register_spd(&priv->adapter); -} -#else -static void __init input_apanel_init(void) {} -static void i801_probe_optional_slaves(struct i801_priv *priv) {} -#endif /* CONFIG_X86 && CONFIG_DMI */ - -#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI -static struct i801_mux_config i801_mux_config_asus_z8_d12 = { - .gpio_chip = "gpio_ich", - .values = { 0x02, 0x03 }, - .n_values = 2, - .classes = { I2C_CLASS_SPD, I2C_CLASS_SPD }, - .gpios = { 52, 53 }, - .n_gpios = 2, -}; - -static struct i801_mux_config i801_mux_config_asus_z8_d18 = { - .gpio_chip = "gpio_ich", - .values = { 0x02, 0x03, 0x01 }, - .n_values = 3, - .classes = { I2C_CLASS_SPD, I2C_CLASS_SPD, I2C_CLASS_SPD }, - .gpios = { 52, 53 }, - .n_gpios = 2, -}; - -static const struct dmi_system_id mux_dmi_table[] = { - { - .matches = { - DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), - DMI_MATCH(DMI_BOARD_NAME, "Z8NA-D6(C)"), - }, - .driver_data = &i801_mux_config_asus_z8_d12, - }, - { - .matches = { - DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), - DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)E-D12(X)"), - }, - .driver_data = &i801_mux_config_asus_z8_d12, - }, - { - .matches = { - DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), - DMI_MATCH(DMI_BOARD_NAME, "Z8NH-D12"), - }, - .driver_data = &i801_mux_config_asus_z8_d12, - }, - { - .matches = { - DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), - DMI_MATCH(DMI_BOARD_NAME, "Z8PH-D12/IFB"), - }, - .driver_data = &i801_mux_config_asus_z8_d12, - }, - { - .matches = { - DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), - DMI_MATCH(DMI_BOARD_NAME, "Z8NR-D12"), - }, - .driver_data = &i801_mux_config_asus_z8_d12, - }, - { - .matches = { - DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), - DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)H-D12"), - }, - .driver_data = &i801_mux_config_asus_z8_d12, - }, - { - .matches = { - DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), - DMI_MATCH(DMI_BOARD_NAME, "Z8PG-D18"), - }, - .driver_data = &i801_mux_config_asus_z8_d18, - }, - { - .matches = { - DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), - DMI_MATCH(DMI_BOARD_NAME, "Z8PE-D18"), - }, - .driver_data = &i801_mux_config_asus_z8_d18, - }, - { - .matches = { - DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), - DMI_MATCH(DMI_BOARD_NAME, "Z8PS-D12"), - }, - .driver_data = &i801_mux_config_asus_z8_d12, - }, - { } -}; - -/* Setup multiplexing if needed */ -static int i801_add_mux(struct i801_priv *priv) -{ - struct device *dev = &priv->adapter.dev; - const struct i801_mux_config *mux_config; - struct i2c_mux_gpio_platform_data gpio_data; - struct gpiod_lookup_table *lookup; - int err, i; - - if (!priv->mux_drvdata) - return 0; - mux_config = priv->mux_drvdata; - - /* Prepare the platform data */ - mem_clear(&gpio_data, sizeof(struct i2c_mux_gpio_platform_data)); - gpio_data.parent = priv->adapter.nr; - gpio_data.values = mux_config->values; - gpio_data.n_values = mux_config->n_values; - gpio_data.classes = mux_config->classes; - gpio_data.idle = I2C_MUX_GPIO_NO_IDLE; - - /* Register GPIO descriptor lookup table */ - lookup = devm_kzalloc(dev, - struct_size(lookup, table, mux_config->n_gpios + 1), - GFP_KERNEL); - if (!lookup) - return -ENOMEM; - lookup->dev_id = "i2c-mux-gpio"; - for (i = 0; i < mux_config->n_gpios; i++) { - lookup->table[i] = (struct gpiod_lookup) - GPIO_LOOKUP(mux_config->gpio_chip, - mux_config->gpios[i], "mux", 0); - } - gpiod_add_lookup_table(lookup); - priv->lookup = lookup; - - /* - * Register the mux device, we use PLATFORM_DEVID_NONE here - * because since we are referring to the GPIO chip by name we are - * anyways in deep trouble if there is more than one of these - * devices, and there should likely only be one platform controller - * hub. - */ - priv->mux_pdev = platform_device_register_data(dev, "i2c-mux-gpio", - PLATFORM_DEVID_NONE, &gpio_data, - sizeof(struct i2c_mux_gpio_platform_data)); - if (IS_ERR(priv->mux_pdev)) { - err = PTR_ERR(priv->mux_pdev); - gpiod_remove_lookup_table(lookup); - priv->mux_pdev = NULL; - dev_err(dev, "Failed to register i2c-mux-gpio device\n"); - return err; - } - - return 0; -} - -static void i801_del_mux(struct i801_priv *priv) -{ - if (priv->mux_pdev) - platform_device_unregister(priv->mux_pdev); - if (priv->lookup) - gpiod_remove_lookup_table(priv->lookup); -} - -static unsigned int i801_get_adapter_class(struct i801_priv *priv) -{ - const struct dmi_system_id *id; - const struct i801_mux_config *mux_config; - unsigned int class = I2C_CLASS_HWMON | I2C_CLASS_SPD; - int i; - - id = dmi_first_match(mux_dmi_table); - if (id) { - /* Remove branch classes from trunk */ - mux_config = id->driver_data; - for (i = 0; i < mux_config->n_values; i++) - class &= ~mux_config->classes[i]; - - /* Remember for later */ - priv->mux_drvdata = mux_config; - } - - return class; -} -#else -static inline int i801_add_mux(struct i801_priv *priv) { return 0; } -static inline void i801_del_mux(struct i801_priv *priv) { } - -static inline unsigned int i801_get_adapter_class(struct i801_priv *priv) -{ - return I2C_CLASS_HWMON | I2C_CLASS_SPD; -} -#endif - -static const struct itco_wdt_platform_data spt_tco_platform_data = { - .name = "Intel PCH", - .version = 4, -}; - -static DEFINE_SPINLOCK(p2sb_spinlock); - -static struct platform_device * -i801_add_tco_spt(struct i801_priv *priv, struct pci_dev *pci_dev, - struct resource *tco_res) -{ - struct resource *res; - unsigned int devfn; - u64 base64_addr; - u32 base_addr; - u8 hidden; - - /* - * We must access the NO_REBOOT bit over the Primary to Sideband - * bridge (P2SB). The BIOS prevents the P2SB device from being - * enumerated by the PCI subsystem, so we need to unhide/hide it - * to lookup the P2SB BAR. - */ - spin_lock(&p2sb_spinlock); - - devfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 1); - - /* Unhide the P2SB device, if it is hidden */ - pci_bus_read_config_byte(pci_dev->bus, devfn, 0xe1, &hidden); - if (hidden) - pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, 0x0); - - pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR, &base_addr); - base64_addr = base_addr & 0xfffffff0; - - pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR + 0x4, &base_addr); - base64_addr |= (u64)base_addr << 32; - - /* Hide the P2SB device, if it was hidden before */ - if (hidden) - pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, hidden); - spin_unlock(&p2sb_spinlock); - - res = &tco_res[1]; - if (pci_dev->device == PCI_DEVICE_ID_INTEL_DNV_SMBUS) - res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL_DNV; - else - res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL; - - res->end = res->start + 3; - res->flags = IORESOURCE_MEM; - - return platform_device_register_resndata(&pci_dev->dev, "iTCO_wdt", -1, - tco_res, 2, &spt_tco_platform_data, - sizeof(spt_tco_platform_data)); -} - -static const struct itco_wdt_platform_data cnl_tco_platform_data = { - .name = "Intel PCH", - .version = 6, -}; - -static struct platform_device * -i801_add_tco_cnl(struct i801_priv *priv, struct pci_dev *pci_dev, - struct resource *tco_res) -{ - return platform_device_register_resndata(&pci_dev->dev, - "iTCO_wdt", -1, tco_res, 1, &cnl_tco_platform_data, - sizeof(cnl_tco_platform_data)); -} - -static void i801_add_tco(struct i801_priv *priv) -{ - struct pci_dev *pci_dev = priv->pci_dev; - struct resource tco_res[2], *res; - u32 tco_base, tco_ctl; - - /* If we have ACPI based watchdog use that instead */ - if (acpi_has_watchdog()) - return; - - if (!(priv->features & (FEATURE_TCO_SPT | FEATURE_TCO_CNL))) - return; - - pci_read_config_dword(pci_dev, TCOBASE, &tco_base); - pci_read_config_dword(pci_dev, TCOCTL, &tco_ctl); - if (!(tco_ctl & TCOCTL_EN)) - return; - - mem_clear(tco_res, sizeof(tco_res)); - /* - * Always populate the main iTCO IO resource here. The second entry - * for NO_REBOOT MMIO is filled by the SPT specific function. - */ - res = &tco_res[0]; - res->start = tco_base & ~1; - res->end = res->start + 32 - 1; - res->flags = IORESOURCE_IO; - - if (priv->features & FEATURE_TCO_CNL) - priv->tco_pdev = i801_add_tco_cnl(priv, pci_dev, tco_res); - else - priv->tco_pdev = i801_add_tco_spt(priv, pci_dev, tco_res); - - if (IS_ERR(priv->tco_pdev)) - dev_warn(&pci_dev->dev, "failed to create iTCO device\n"); -} - -#ifdef CONFIG_ACPI -static bool i801_acpi_is_smbus_ioport(const struct i801_priv *priv, - acpi_physical_address address) -{ - return address >= priv->smba && - address <= pci_resource_end(priv->pci_dev, SMBBAR); -} - -static acpi_status -i801_acpi_io_handler(u32 function, acpi_physical_address address, u32 bits, - u64 *value, void *handler_context, void *region_context) -{ - struct i801_priv *priv = handler_context; - struct pci_dev *pdev = priv->pci_dev; - acpi_status status; - - /* - * Once BIOS AML code touches the OpRegion we warn and inhibit any - * further access from the driver itself. This device is now owned - * by the system firmware. - */ - mutex_lock(&priv->acpi_lock); - - if (!priv->acpi_reserved && i801_acpi_is_smbus_ioport(priv, address)) { - priv->acpi_reserved = true; - - dev_warn(&pdev->dev, "BIOS is accessing SMBus registers\n"); - dev_warn(&pdev->dev, "Driver SMBus register access inhibited\n"); - - /* - * BIOS is accessing the host controller so prevent it from - * suspending automatically from now on. - */ - pm_runtime_get_sync(&pdev->dev); - } - - if ((function & ACPI_IO_MASK) == ACPI_READ) - status = acpi_os_read_port(address, (u32 *)value, bits); - else - status = acpi_os_write_port(address, (u32)*value, bits); - - mutex_unlock(&priv->acpi_lock); - - return status; -} - -static int i801_acpi_probe(struct i801_priv *priv) -{ - struct acpi_device *adev; - acpi_status status; - - adev = ACPI_COMPANION(&priv->pci_dev->dev); - if (adev) { - status = acpi_install_address_space_handler(adev->handle, - ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler, - NULL, priv); - if (ACPI_SUCCESS(status)) - return 0; - } - - return acpi_check_resource_conflict(&priv->pci_dev->resource[SMBBAR]); -} - -static void i801_acpi_remove(struct i801_priv *priv) -{ - struct acpi_device *adev; - - adev = ACPI_COMPANION(&priv->pci_dev->dev); - if (!adev) - return; - - acpi_remove_address_space_handler(adev->handle, - ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler); - - mutex_lock(&priv->acpi_lock); - if (priv->acpi_reserved) - pm_runtime_put(&priv->pci_dev->dev); - mutex_unlock(&priv->acpi_lock); -} -#else -static inline int i801_acpi_probe(struct i801_priv *priv) { return 0; } -static inline void i801_acpi_remove(struct i801_priv *priv) { } -#endif - -static unsigned char i801_setup_hstcfg(struct i801_priv *priv) -{ - unsigned char hstcfg = priv->original_hstcfg; - - hstcfg &= ~SMBHSTCFG_I2C_EN; /* SMBus timing */ - hstcfg |= SMBHSTCFG_HST_EN; - pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hstcfg); - return hstcfg; -} - -static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id) -{ - unsigned char temp; - int err, i; - struct i801_priv *priv; - - priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; - - i2c_set_adapdata(&priv->adapter, priv); - priv->adapter.owner = THIS_MODULE; - priv->adapter.class = i801_get_adapter_class(priv); - priv->adapter.algo = &smbus_algorithm; - priv->adapter.dev.parent = &dev->dev; - ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&dev->dev)); - priv->adapter.retries = 3; - mutex_init(&priv->acpi_lock); - - priv->pci_dev = dev; - switch (dev->device) { - case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS: - case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS: - case PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS: - case PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS: - case PCI_DEVICE_ID_INTEL_DNV_SMBUS: - case PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS: - case PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS: - priv->features |= FEATURE_BLOCK_PROC; - priv->features |= FEATURE_I2C_BLOCK_READ; - priv->features |= FEATURE_IRQ; - priv->features |= FEATURE_SMBUS_PEC; - priv->features |= FEATURE_BLOCK_BUFFER; - priv->features |= FEATURE_TCO_SPT; - priv->features |= FEATURE_HOST_NOTIFY; - break; - - case PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS: - case PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS: - case PCI_DEVICE_ID_INTEL_CDF_SMBUS: - case PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS: - case PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS: - case PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS: - case PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS: - case PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS: - case PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS: - case PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS: - case PCI_DEVICE_ID_INTEL_EBG_SMBUS: - case PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS: - priv->features |= FEATURE_BLOCK_PROC; - priv->features |= FEATURE_I2C_BLOCK_READ; - priv->features |= FEATURE_IRQ; - priv->features |= FEATURE_SMBUS_PEC; - priv->features |= FEATURE_BLOCK_BUFFER; - priv->features |= FEATURE_TCO_CNL; - priv->features |= FEATURE_HOST_NOTIFY; - break; - - case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0: - case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1: - case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2: - case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0: - case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1: - case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2: - priv->features |= FEATURE_IDF; - fallthrough; - default: - priv->features |= FEATURE_BLOCK_PROC; - priv->features |= FEATURE_I2C_BLOCK_READ; - priv->features |= FEATURE_IRQ; - fallthrough; - case PCI_DEVICE_ID_INTEL_82801DB_3: - priv->features |= FEATURE_SMBUS_PEC; - priv->features |= FEATURE_BLOCK_BUFFER; - fallthrough; - case PCI_DEVICE_ID_INTEL_82801CA_3: - priv->features |= FEATURE_HOST_NOTIFY; - fallthrough; - case PCI_DEVICE_ID_INTEL_82801BA_2: - case PCI_DEVICE_ID_INTEL_82801AB_3: - case PCI_DEVICE_ID_INTEL_82801AA_3: - break; - } - - /* Disable features on user request */ - for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) { - if (priv->features & disable_features & (1 << i)) - dev_notice(&dev->dev, "%s disabled by user\n", - i801_feature_names[i]); - } - priv->features &= ~disable_features; - - err = pcim_enable_device(dev); - if (err) { - dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n", - err); - return err; - } - pcim_pin_device(dev); - - /* Determine the address of the SMBus area */ - priv->smba = pci_resource_start(dev, SMBBAR); - if (!priv->smba) { - dev_err(&dev->dev, - "SMBus base address uninitialized, upgrade BIOS\n"); - return -ENODEV; - } - - if (i801_acpi_probe(priv)) - return -ENODEV; - - err = pcim_iomap_regions(dev, 1 << SMBBAR, - dev_driver_string(&dev->dev)); - if (err) { - dev_err(&dev->dev, - "Failed to request SMBus region 0x%lx-0x%Lx\n", - priv->smba, - (unsigned long long)pci_resource_end(dev, SMBBAR)); - i801_acpi_remove(priv); - return err; - } - - pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &priv->original_hstcfg); - temp = i801_setup_hstcfg(priv); - if (!(priv->original_hstcfg & SMBHSTCFG_HST_EN)) - dev_info(&dev->dev, "Enabling SMBus device\n"); - - if (temp & SMBHSTCFG_SMB_SMI_EN) { - dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n"); - /* Disable SMBus interrupt feature if SMBus using SMI# */ - priv->features &= ~FEATURE_IRQ; - } - if (temp & SMBHSTCFG_SPD_WD) - dev_info(&dev->dev, "SPD Write Disable is set\n"); - - /* Clear special mode bits */ - if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER)) - outb_p(inb_p(SMBAUXCTL(priv)) & - ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv)); - - /* Remember original Host Notify setting */ - if (priv->features & FEATURE_HOST_NOTIFY) - priv->original_slvcmd = inb_p(SMBSLVCMD(priv)); - - /* Default timeout in interrupt mode: 200 ms */ - priv->adapter.timeout = HZ / 5; - - if (dev->irq == IRQ_NOTCONNECTED) - priv->features &= ~FEATURE_IRQ; - - if (priv->features & FEATURE_IRQ) { - u16 pcictl, pcists; - - /* Complain if an interrupt is already pending */ - pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists); - if (pcists & SMBPCISTS_INTS) - dev_warn(&dev->dev, "An interrupt is pending!\n"); - - /* Check if interrupts have been disabled */ - pci_read_config_word(priv->pci_dev, SMBPCICTL, &pcictl); - if (pcictl & SMBPCICTL_INTDIS) { - dev_info(&dev->dev, "Interrupts are disabled\n"); - priv->features &= ~FEATURE_IRQ; - } - } - - if (priv->features & FEATURE_IRQ) { - init_waitqueue_head(&priv->waitq); - - err = devm_request_irq(&dev->dev, dev->irq, i801_isr, - IRQF_SHARED, - dev_driver_string(&dev->dev), priv); - if (err) { - dev_err(&dev->dev, "Failed to allocate irq %d: %d\n", - dev->irq, err); - priv->features &= ~FEATURE_IRQ; - } - } - dev_info(&dev->dev, "SMBus using %s\n", - priv->features & FEATURE_IRQ ? "PCI interrupt" : "polling"); - - i801_add_tco(priv); - - snprintf(priv->adapter.name, sizeof(priv->adapter.name), - "SMBus I801 adapter at %04lx", priv->smba); - err = i2c_add_adapter(&priv->adapter); - if (err) { - i801_acpi_remove(priv); - return err; - } - - i801_enable_host_notify(&priv->adapter); - - i801_probe_optional_slaves(priv); - /* We ignore errors - multiplexing is optional */ - i801_add_mux(priv); - - pci_set_drvdata(dev, priv); - - dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_NO_DIRECT_COMPLETE); - pm_runtime_set_autosuspend_delay(&dev->dev, 1000); - pm_runtime_use_autosuspend(&dev->dev); - pm_runtime_put_autosuspend(&dev->dev); - pm_runtime_allow(&dev->dev); - dev_info(&dev->dev, "wb-i2c-i801 probe ok.\n"); - - return 0; -} - -static void i801_remove(struct pci_dev *dev) -{ - struct i801_priv *priv = pci_get_drvdata(dev); - - pm_runtime_forbid(&dev->dev); - pm_runtime_get_noresume(&dev->dev); - - i801_disable_host_notify(priv); - i801_del_mux(priv); - i2c_del_adapter(&priv->adapter); - i801_acpi_remove(priv); - pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg); - - platform_device_unregister(priv->tco_pdev); - - /* - * do not call pci_disable_device(dev) since it can cause hard hangs on - * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010) - */ -} - -static void i801_shutdown(struct pci_dev *dev) -{ - struct i801_priv *priv = pci_get_drvdata(dev); - - /* Restore config registers to avoid hard hang on some systems */ - i801_disable_host_notify(priv); - pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg); -} - -#ifdef CONFIG_PM_SLEEP -static int i801_suspend(struct device *dev) -{ - struct i801_priv *priv = dev_get_drvdata(dev); - - pci_write_config_byte(priv->pci_dev, SMBHSTCFG, priv->original_hstcfg); - return 0; -} - -static int i801_resume(struct device *dev) -{ - struct i801_priv *priv = dev_get_drvdata(dev); - - i801_setup_hstcfg(priv); - i801_enable_host_notify(&priv->adapter); - - return 0; -} -#endif - -static SIMPLE_DEV_PM_OPS(i801_pm_ops, i801_suspend, i801_resume); - -static struct pci_driver i801_driver = { - .name = "wb_i801_smbus", - .id_table = i801_ids, - .probe = i801_probe, - .remove = i801_remove, - .shutdown = i801_shutdown, - .driver = { - .pm = &i801_pm_ops, - }, -}; - -static int __init i2c_i801_init(void) -{ - if (dmi_name_in_vendors("FUJITSU")) - input_apanel_init(); - return pci_register_driver(&i801_driver); -} - -static void __exit i2c_i801_exit(void) -{ - pci_unregister_driver(&i801_driver); -} - -MODULE_AUTHOR("support"); -MODULE_DESCRIPTION("I801 SMBus driver"); -MODULE_LICENSE("GPL"); - -module_init(i2c_i801_init); -module_exit(i2c_i801_exit); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c deleted file mode 100644 index 94a3ed827209..000000000000 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c +++ /dev/null @@ -1,1131 +0,0 @@ -/* - * This file is provided under a dual BSD/GPLv2 license. When using or - * redistributing this file, you may do so under either license. - * - * Copyright(c) 2012 Intel Corporation. All rights reserved. - * - * GPL LICENSE SUMMARY - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * The full GNU General Public License is included in this distribution - * in the file called LICENSE.GPL. - * - * BSD LICENSE - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Supports the SMBus Message Transport (SMT) in the Intel Atom Processor - * S12xx Product Family. - * - * Features supported by this driver: - * Hardware PEC yes - * Block buffer yes - * Block process call transaction yes - * Slave mode no - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#define mem_clear(data, size) memset((data), 0, (size)) - -/* PCI Address Constants */ -#define SMBBAR 0 - -#define ISMT_DBCTRL 0x388 /* ISMT PIN Control Register */ -#define ISMT_DBSTS 0X38C /* ISMT PIN Status Register */ - -#define ISMT_DBSTS_CLK_STS (1<<9) /* bit9 SMBCLK_CUR_STS */ -#define ISMT_DBSTS_SDA_STS (1<<8) /* bit8 SMBDATA_CUR_STS */ -#define ISMT_DBCTRL_CLK_CTL (1<<1) /* bit1 SMBCLK_CTL */ -#define ISMT_DBCTRL_ENABLE (1<<31) /* bit31 EN */ - -/* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */ -#define PCI_DEVICE_ID_INTEL_S1200_SMT0 0x0c59 -#define PCI_DEVICE_ID_INTEL_S1200_SMT1 0x0c5a -#define PCI_DEVICE_ID_INTEL_CDF_SMT 0x18ac -#define PCI_DEVICE_ID_INTEL_DNV_SMT 0x19ac -#define PCI_DEVICE_ID_INTEL_EBG_SMT 0x1bff -#define PCI_DEVICE_ID_INTEL_AVOTON_SMT 0x1f15 - -#define ISMT_DESC_ENTRIES 2 /* number of descriptor entries */ -#define ISMT_MAX_RETRIES 3 /* number of SMBus retries to attempt */ -#define ISMT_LOG_ENTRIES 3 /* number of interrupt cause log entries */ - -/* Hardware Descriptor Constants - Control Field */ -#define ISMT_DESC_CWRL 0x01 /* Command/Write Length */ -#define ISMT_DESC_BLK 0X04 /* Perform Block Transaction */ -#define ISMT_DESC_FAIR 0x08 /* Set fairness flag upon successful arbit. */ -#define ISMT_DESC_PEC 0x10 /* Packet Error Code */ -#define ISMT_DESC_I2C 0x20 /* I2C Enable */ -#define ISMT_DESC_INT 0x40 /* Interrupt */ -#define ISMT_DESC_SOE 0x80 /* Stop On Error */ - -/* Hardware Descriptor Constants - Status Field */ -#define ISMT_DESC_SCS 0x01 /* Success */ -#define ISMT_DESC_DLTO 0x04 /* Data Low Time Out */ -#define ISMT_DESC_NAK 0x08 /* NAK Received */ -#define ISMT_DESC_CRC 0x10 /* CRC Error */ -#define ISMT_DESC_CLTO 0x20 /* Clock Low Time Out */ -#define ISMT_DESC_COL 0x40 /* Collisions */ -#define ISMT_DESC_LPR 0x80 /* Large Packet Received */ - -/* Macros */ -#define ISMT_DESC_ADDR_RW(addr, rw) (((addr) << 1) | (rw)) - -/* iSMT General Register address offsets (SMBBAR + ) */ -#define ISMT_GR_GCTRL 0x000 /* General Control */ -#define ISMT_GR_SMTICL 0x008 /* SMT Interrupt Cause Location */ -#define ISMT_GR_ERRINTMSK 0x010 /* Error Interrupt Mask */ -#define ISMT_GR_ERRAERMSK 0x014 /* Error AER Mask */ -#define ISMT_GR_ERRSTS 0x018 /* Error Status */ -#define ISMT_GR_ERRINFO 0x01c /* Error Information */ - -/* iSMT Master Registers */ -#define ISMT_MSTR_MDBA 0x100 /* Master Descriptor Base Address */ -#define ISMT_MSTR_MCTRL 0x108 /* Master Control */ -#define ISMT_MSTR_MSTS 0x10c /* Master Status */ -#define ISMT_MSTR_MDS 0x110 /* Master Descriptor Size */ -#define ISMT_MSTR_RPOLICY 0x114 /* Retry Policy */ - -/* iSMT Miscellaneous Registers */ -#define ISMT_SPGT 0x300 /* SMBus PHY Global Timing */ - -/* General Control Register (GCTRL) bit definitions */ -#define ISMT_GCTRL_TRST 0x04 /* Target Reset */ -#define ISMT_GCTRL_KILL 0x08 /* Kill */ -#define ISMT_GCTRL_SRST 0x40 /* Soft Reset */ - -/* Master Control Register (MCTRL) bit definitions */ -#define ISMT_MCTRL_SS 0x01 /* Start/Stop */ -#define ISMT_MCTRL_MEIE 0x10 /* Master Error Interrupt Enable */ -#define ISMT_MCTRL_FMHP 0x00ff0000 /* Firmware Master Head Ptr (FMHP) */ - -/* Master Status Register (MSTS) bit definitions */ -#define ISMT_MSTS_HMTP 0xff0000 /* HW Master Tail Pointer (HMTP) */ -#define ISMT_MSTS_MIS 0x20 /* Master Interrupt Status (MIS) */ -#define ISMT_MSTS_MEIS 0x10 /* Master Error Int Status (MEIS) */ -#define ISMT_MSTS_IP 0x01 /* In Progress */ - -/* Master Descriptor Size (MDS) bit definitions */ -#define ISMT_MDS_MASK 0xff /* Master Descriptor Size mask (MDS) */ - -/* SMBus PHY Global Timing Register (SPGT) bit definitions */ -#define ISMT_SPGT_SPD_MASK 0xc0000000 /* SMBus Speed mask */ -#define ISMT_SPGT_SPD_80K 0x00 /* 80 kHz */ -#define ISMT_SPGT_SPD_100K (0x1 << 30) /* 100 kHz */ -#define ISMT_SPGT_SPD_400K (0x2U << 30) /* 400 kHz */ -#define ISMT_SPGT_SPD_1M (0x3U << 30) /* 1 MHz */ - - -/* MSI Control Register (MSICTL) bit definitions */ -#define ISMT_MSICTL_MSIE 0x01 /* MSI Enable */ - -/* iSMT Hardware Descriptor */ -struct ismt_desc { - u8 tgtaddr_rw; /* target address & r/w bit */ - u8 wr_len_cmd; /* write length in bytes or a command */ - u8 rd_len; /* read length */ - u8 control; /* control bits */ - u8 status; /* status bits */ - u8 retry; /* collision retry and retry count */ - u8 rxbytes; /* received bytes */ - u8 txbytes; /* transmitted bytes */ - u32 dptr_low; /* lower 32 bit of the data pointer */ - u32 dptr_high; /* upper 32 bit of the data pointer */ -} __packed; - -struct ismt_priv { - struct i2c_adapter adapter; - void __iomem *smba; /* PCI BAR */ - struct pci_dev *pci_dev; - struct ismt_desc *hw; /* descriptor virt base addr */ - dma_addr_t io_rng_dma; /* descriptor HW base addr */ - u8 head; /* ring buffer head pointer */ - struct completion cmp; /* interrupt completion */ - u8 buffer[I2C_SMBUS_BLOCK_MAX + 16]; /* temp R/W data buffer */ - dma_addr_t log_dma; - u32 *log; -}; - -static const struct pci_device_id ismt_ids[] = { - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT0) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT1) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CDF_SMT) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMT) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EBG_SMT) }, - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMT) }, - { 0, } -}; - -MODULE_DEVICE_TABLE(pci, ismt_ids); - -/* Bus speed control bits for slow debuggers - refer to the docs for usage */ -static unsigned int bus_speed; -module_param(bus_speed, uint, S_IRUGO); -MODULE_PARM_DESC(bus_speed, "Bus Speed in kHz (0 = BIOS default)"); - -static unsigned int dma_reset_timeout = 1000; -module_param(dma_reset_timeout, uint, S_IRUGO); - -static void ismt_hw_init(struct ismt_priv *priv); - -/** - * __ismt_desc_dump() - dump the contents of a specific descriptor - * @dev: the iSMT device - * @desc: the iSMT hardware descriptor - */ -static void __ismt_desc_dump(struct device *dev, const struct ismt_desc *desc) -{ - - dev_dbg(dev, "Descriptor struct: %p\n", desc); - dev_dbg(dev, "\ttgtaddr_rw=0x%02X\n", desc->tgtaddr_rw); - dev_dbg(dev, "\twr_len_cmd=0x%02X\n", desc->wr_len_cmd); - dev_dbg(dev, "\trd_len= 0x%02X\n", desc->rd_len); - dev_dbg(dev, "\tcontrol= 0x%02X\n", desc->control); - dev_dbg(dev, "\tstatus= 0x%02X\n", desc->status); - dev_dbg(dev, "\tretry= 0x%02X\n", desc->retry); - dev_dbg(dev, "\trxbytes= 0x%02X\n", desc->rxbytes); - dev_dbg(dev, "\ttxbytes= 0x%02X\n", desc->txbytes); - dev_dbg(dev, "\tdptr_low= 0x%08X\n", desc->dptr_low); - dev_dbg(dev, "\tdptr_high= 0x%08X\n", desc->dptr_high); -} -/** - * ismt_desc_dump() - dump the contents of a descriptor for debug purposes - * @priv: iSMT private data - */ -static void ismt_desc_dump(struct ismt_priv *priv) -{ - struct device *dev = &priv->pci_dev->dev; - struct ismt_desc *desc = &priv->hw[priv->head]; - - dev_dbg(dev, "Dump of the descriptor struct: 0x%X\n", priv->head); - __ismt_desc_dump(dev, desc); -} - -static void ismt_reset_dma(struct ismt_priv *priv) -{ - uint val; - u16 ctrl; - struct pci_dev *pdev; - u32 addr_lo, addr_hi; - - /* save msiaddr */ - pdev = priv->pci_dev; - pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, &addr_lo); - pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, &addr_hi); - - /* Clear the start bit */ - val = readl(priv->smba + ISMT_MSTR_MCTRL); - val &= ~ISMT_MCTRL_SS; - writel(val, priv->smba + ISMT_MSTR_MCTRL); - - val = readl(priv->smba + ISMT_GR_GCTRL); - writel(val | ISMT_GCTRL_KILL | ISMT_GCTRL_TRST | ISMT_GCTRL_SRST, priv->smba + ISMT_GR_GCTRL); - - if (dma_reset_timeout > 0) { - usleep_range(dma_reset_timeout, dma_reset_timeout + 1); - } - - ismt_hw_init(priv); - pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, addr_lo); - pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, addr_hi); - /* enable msi */ - pci_read_config_word(pdev, pdev->msi_cap + PCI_MSI_FLAGS, &ctrl); - ctrl |= PCI_MSI_FLAGS_ENABLE; - pci_write_config_word(pdev, pdev->msi_cap + PCI_MSI_FLAGS, ctrl); -} - -/** - * ismt_gen_reg_dump() - dump the iSMT General Registers - * @priv: iSMT private data - */ -static void ismt_gen_reg_dump(struct ismt_priv *priv) -{ - struct device *dev = &priv->pci_dev->dev; - - dev_dbg(dev, "Dump of the iSMT General Registers\n"); - dev_dbg(dev, " GCTRL.... : (0x%p)=0x%X\n", - priv->smba + ISMT_GR_GCTRL, - readl(priv->smba + ISMT_GR_GCTRL)); - dev_dbg(dev, " SMTICL... : (0x%p)=0x%016llX\n", - priv->smba + ISMT_GR_SMTICL, - (long long unsigned int)readq(priv->smba + ISMT_GR_SMTICL)); - dev_dbg(dev, " ERRINTMSK : (0x%p)=0x%X\n", - priv->smba + ISMT_GR_ERRINTMSK, - readl(priv->smba + ISMT_GR_ERRINTMSK)); - dev_dbg(dev, " ERRAERMSK : (0x%p)=0x%X\n", - priv->smba + ISMT_GR_ERRAERMSK, - readl(priv->smba + ISMT_GR_ERRAERMSK)); - dev_dbg(dev, " ERRSTS... : (0x%p)=0x%X\n", - priv->smba + ISMT_GR_ERRSTS, - readl(priv->smba + ISMT_GR_ERRSTS)); - dev_dbg(dev, " ERRINFO.. : (0x%p)=0x%X\n", - priv->smba + ISMT_GR_ERRINFO, - readl(priv->smba + ISMT_GR_ERRINFO)); -} - -/** - * ismt_mstr_reg_dump() - dump the iSMT Master Registers - * @priv: iSMT private data - */ -static void ismt_mstr_reg_dump(struct ismt_priv *priv) -{ - struct device *dev = &priv->pci_dev->dev; - - dev_dbg(dev, "Dump of the iSMT Master Registers\n"); - dev_dbg(dev, " MDBA..... : (0x%p)=0x%016llX\n", - priv->smba + ISMT_MSTR_MDBA, - (long long unsigned int)readq(priv->smba + ISMT_MSTR_MDBA)); - dev_dbg(dev, " MCTRL.... : (0x%p)=0x%X\n", - priv->smba + ISMT_MSTR_MCTRL, - readl(priv->smba + ISMT_MSTR_MCTRL)); - dev_dbg(dev, " MSTS..... : (0x%p)=0x%X\n", - priv->smba + ISMT_MSTR_MSTS, - readl(priv->smba + ISMT_MSTR_MSTS)); - dev_dbg(dev, " MDS...... : (0x%p)=0x%X\n", - priv->smba + ISMT_MSTR_MDS, - readl(priv->smba + ISMT_MSTR_MDS)); - dev_dbg(dev, " RPOLICY.. : (0x%p)=0x%X\n", - priv->smba + ISMT_MSTR_RPOLICY, - readl(priv->smba + ISMT_MSTR_RPOLICY)); - dev_dbg(dev, " SPGT..... : (0x%p)=0x%X\n", - priv->smba + ISMT_SPGT, - readl(priv->smba + ISMT_SPGT)); -} - -/** - * ismt_submit_desc() - add a descriptor to the ring - * @priv: iSMT private data - */ -static void ismt_submit_desc(struct ismt_priv *priv) -{ - uint fmhp; - uint val; - - ismt_desc_dump(priv); - ismt_gen_reg_dump(priv); - ismt_mstr_reg_dump(priv); - - /* Set the FMHP (Firmware Master Head Pointer)*/ - fmhp = ((priv->head + 1) % ISMT_DESC_ENTRIES) << 16; - val = readl(priv->smba + ISMT_MSTR_MCTRL); - writel((val & ~ISMT_MCTRL_FMHP) | fmhp, - priv->smba + ISMT_MSTR_MCTRL); - - /* Set the start bit */ - val = readl(priv->smba + ISMT_MSTR_MCTRL); - writel(val | ISMT_MCTRL_SS, - priv->smba + ISMT_MSTR_MCTRL); -} - -/** - * ismt_process_desc() - handle the completion of the descriptor - * @desc: the iSMT hardware descriptor - * @data: data buffer from the upper layer - * @priv: ismt_priv struct holding our dma buffer - * @size: SMBus transaction type - * @read_write: flag to indicate if this is a read or write - */ -static int ismt_process_desc(const struct ismt_desc *desc, - union i2c_smbus_data *data, - struct ismt_priv *priv, int size, - char read_write) -{ - u8 *dma_buffer = PTR_ALIGN(&priv->buffer[0], 16); - - dev_dbg(&priv->pci_dev->dev, "Processing completed descriptor\n"); - __ismt_desc_dump(&priv->pci_dev->dev, desc); - ismt_gen_reg_dump(priv); - ismt_mstr_reg_dump(priv); - - if (desc->status & ISMT_DESC_SCS) { - if (read_write == I2C_SMBUS_WRITE && - size != I2C_SMBUS_PROC_CALL && - size != I2C_SMBUS_BLOCK_PROC_CALL) - return 0; - - switch (size) { - case I2C_SMBUS_BYTE: - case I2C_SMBUS_BYTE_DATA: - data->byte = dma_buffer[0]; - break; - case I2C_SMBUS_WORD_DATA: - case I2C_SMBUS_PROC_CALL: - data->word = dma_buffer[0] | (dma_buffer[1] << 8); - break; - case I2C_SMBUS_BLOCK_DATA: - case I2C_SMBUS_BLOCK_PROC_CALL: - if (desc->rxbytes != dma_buffer[0] + 1) - return -EMSGSIZE; - - memcpy(data->block, dma_buffer, desc->rxbytes); - break; - case I2C_SMBUS_I2C_BLOCK_DATA: - memcpy(&data->block[1], dma_buffer, desc->rxbytes); - data->block[0] = desc->rxbytes; - break; - } - return 0; - } - - if (likely(desc->status & ISMT_DESC_NAK)) - return -ENXIO; - - if (desc->status & ISMT_DESC_CRC) - return -EBADMSG; - - if (desc->status & ISMT_DESC_COL) - return -EAGAIN; - - if (desc->status & ISMT_DESC_LPR) - return -EPROTO; - - if (desc->status & (ISMT_DESC_DLTO | ISMT_DESC_CLTO)) - return -ETIMEDOUT; - - return -EIO; -} - -static void ismt_setscl(struct ismt_priv *priv, unsigned int level) -{ - int pin_status; - - pin_status = readl(priv->smba + ISMT_DBCTRL); - if (level == 0) { - pin_status &= (~ISMT_DBCTRL_CLK_CTL); - } else { - pin_status |= ISMT_DBCTRL_CLK_CTL; - } - writel(pin_status, priv->smba + ISMT_DBCTRL); - pin_status = readl(priv->smba + ISMT_DBCTRL); - dev_dbg(&priv->pci_dev->dev, "dbctrl status = 0x%04x\r\n", pin_status); - return; -} - -static void ismt_i2c_unblock(struct ismt_priv *priv) -{ - int i; - int pin_status, ori_status; - - pin_status = readl(priv->smba + ISMT_DBCTRL); - ori_status = pin_status; - if ((pin_status & ISMT_DBCTRL_ENABLE) == 0) { - pin_status |= ISMT_DBCTRL_ENABLE; - writel(pin_status, priv->smba + ISMT_DBCTRL); - pin_status = readl(priv->smba + ISMT_DBCTRL); - dev_dbg(&priv->pci_dev->dev, "enable dbctrl pin status = 0x%04x\r\n", pin_status); - } - - for (i = 0; i < 10; i++) { - ismt_setscl(priv, 0); - udelay(5); - ismt_setscl(priv, 1); - udelay(5); - } - - pin_status = readl(priv->smba + ISMT_DBCTRL); - if (pin_status != ori_status) { - writel(ori_status, priv->smba + ISMT_DBCTRL); - pin_status = readl(priv->smba + ISMT_DBCTRL); - dev_dbg(&priv->pci_dev->dev, "reback dbctrl pin status = 0x%04x\r\n", pin_status); - } - - return; -} - -static int ismt_check_i2c_unblock(struct ismt_priv *priv) -{ - int pin_status; - - pin_status = readl(priv->smba + ISMT_DBSTS); - - if ( (!(pin_status & ISMT_DBSTS_SDA_STS) ) && (pin_status & ISMT_DBSTS_CLK_STS) ) { - dev_dbg(&priv->pci_dev->dev, "SDA is low, send 9 clock to device!\n"); - ismt_i2c_unblock(priv); - } - return 0; -} - -static int ismt_check_i2c_scl(struct ismt_priv *priv) -{ - int pin_status; - - pin_status = readl(priv->smba + ISMT_DBSTS); - - if ( (pin_status & ISMT_DBSTS_SDA_STS) && (pin_status & ISMT_DBSTS_CLK_STS) ) { - return 0; - } - - dev_warn(&priv->pci_dev->dev, "SDA or SCL is low.pin_status:0x%x\n", pin_status); - return -1; -} - -/* Make sure the SMBus host is ready to start transmitting. - Return 0 if it is, -EIO if it is not. */ -static int ismt_check_pre(struct ismt_priv *priv) -{ - ismt_check_i2c_unblock(priv); - - /* SDA or SCL is low, return -EIO */ - if (ismt_check_i2c_scl(priv)) { - return -EIO; - } - - return 0; -} - -/** - * ismt_access() - process an SMBus command - * @adap: the i2c host adapter - * @addr: address of the i2c/SMBus target - * @flags: command options - * @read_write: read from or write to device - * @command: the i2c/SMBus command to issue - * @size: SMBus transaction type - * @data: read/write data buffer - */ -static int ismt_access(struct i2c_adapter *adap, u16 addr, - unsigned short flags, char read_write, u8 command, - int size, union i2c_smbus_data *data) -{ - int ret; - unsigned long time_left; - dma_addr_t dma_addr = 0; /* address of the data buffer */ - u8 dma_size = 0; - enum dma_data_direction dma_direction = 0; - struct ismt_desc *desc; - struct ismt_priv *priv = i2c_get_adapdata(adap); - struct device *dev = &priv->pci_dev->dev; - u8 *dma_buffer = PTR_ALIGN(&priv->buffer[0], 16); - - ret = ismt_check_pre(priv); - if (ret < 0) { - return ret; - } - - desc = &priv->hw[priv->head]; - - /* Initialize the DMA buffer */ - mem_clear(priv->buffer, sizeof(priv->buffer)); - - /* Initialize the descriptor */ - mem_clear(desc, sizeof(struct ismt_desc)); - desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write); - - /* Always clear the log entries */ - mem_clear(priv->log, ISMT_LOG_ENTRIES * sizeof(u32)); - - /* Initialize common control bits */ - if (likely(pci_dev_msi_enabled(priv->pci_dev))) - desc->control = ISMT_DESC_INT | ISMT_DESC_FAIR; - else - desc->control = ISMT_DESC_FAIR; - - if ((flags & I2C_CLIENT_PEC) && (size != I2C_SMBUS_QUICK) - && (size != I2C_SMBUS_I2C_BLOCK_DATA)) - desc->control |= ISMT_DESC_PEC; - - switch (size) { - case I2C_SMBUS_QUICK: - dev_dbg(dev, "I2C_SMBUS_QUICK\n"); - break; - - case I2C_SMBUS_BYTE: - if (read_write == I2C_SMBUS_WRITE) { - /* - * Send Byte - * The command field contains the write data - */ - dev_dbg(dev, "I2C_SMBUS_BYTE: WRITE\n"); - desc->control |= ISMT_DESC_CWRL; - desc->wr_len_cmd = command; - } else { - /* Receive Byte */ - dev_dbg(dev, "I2C_SMBUS_BYTE: READ\n"); - dma_size = 1; - dma_direction = DMA_FROM_DEVICE; - desc->rd_len = 1; - } - break; - - case I2C_SMBUS_BYTE_DATA: - if (read_write == I2C_SMBUS_WRITE) { - /* - * Write Byte - * Command plus 1 data byte - */ - dev_dbg(dev, "I2C_SMBUS_BYTE_DATA: WRITE\n"); - desc->wr_len_cmd = 2; - dma_size = 2; - dma_direction = DMA_TO_DEVICE; - dma_buffer[0] = command; - dma_buffer[1] = data->byte; - } else { - /* Read Byte */ - dev_dbg(dev, "I2C_SMBUS_BYTE_DATA: READ\n"); - desc->control |= ISMT_DESC_CWRL; - desc->wr_len_cmd = command; - desc->rd_len = 1; - dma_size = 1; - dma_direction = DMA_FROM_DEVICE; - } - break; - - case I2C_SMBUS_WORD_DATA: - if (read_write == I2C_SMBUS_WRITE) { - /* Write Word */ - dev_dbg(dev, "I2C_SMBUS_WORD_DATA: WRITE\n"); - desc->wr_len_cmd = 3; - dma_size = 3; - dma_direction = DMA_TO_DEVICE; - dma_buffer[0] = command; - dma_buffer[1] = data->word & 0xff; - dma_buffer[2] = data->word >> 8; - } else { - /* Read Word */ - dev_dbg(dev, "I2C_SMBUS_WORD_DATA: READ\n"); - desc->wr_len_cmd = command; - desc->control |= ISMT_DESC_CWRL; - desc->rd_len = 2; - dma_size = 2; - dma_direction = DMA_FROM_DEVICE; - } - break; - - case I2C_SMBUS_PROC_CALL: - dev_dbg(dev, "I2C_SMBUS_PROC_CALL\n"); - desc->wr_len_cmd = 3; - desc->rd_len = 2; - dma_size = 3; - dma_direction = DMA_BIDIRECTIONAL; - dma_buffer[0] = command; - dma_buffer[1] = data->word & 0xff; - dma_buffer[2] = data->word >> 8; - break; - - case I2C_SMBUS_BLOCK_DATA: - if (read_write == I2C_SMBUS_WRITE) { - /* Block Write */ - dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA: WRITE\n"); - if (data->block[0] < 1 || data->block[0] > I2C_SMBUS_BLOCK_MAX) - return -EINVAL; - - dma_size = data->block[0] + 1; - dma_direction = DMA_TO_DEVICE; - desc->wr_len_cmd = dma_size; - desc->control |= ISMT_DESC_BLK; - dma_buffer[0] = command; - memcpy(&dma_buffer[1], &data->block[1], dma_size - 1); - } else { - /* Block Read */ - dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA: READ\n"); - dma_size = I2C_SMBUS_BLOCK_MAX; - dma_direction = DMA_FROM_DEVICE; - desc->rd_len = dma_size; - desc->wr_len_cmd = command; - desc->control |= (ISMT_DESC_BLK | ISMT_DESC_CWRL); - } - break; - - case I2C_SMBUS_BLOCK_PROC_CALL: - dev_dbg(dev, "I2C_SMBUS_BLOCK_PROC_CALL\n"); - if (data->block[0] > I2C_SMBUS_BLOCK_MAX) - return -EINVAL; - - dma_size = I2C_SMBUS_BLOCK_MAX; - desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, 1); - desc->wr_len_cmd = data->block[0] + 1; - desc->rd_len = dma_size; - desc->control |= ISMT_DESC_BLK; - dma_direction = DMA_BIDIRECTIONAL; - dma_buffer[0] = command; - memcpy(&dma_buffer[1], &data->block[1], data->block[0]); - break; - - case I2C_SMBUS_I2C_BLOCK_DATA: - /* Make sure the length is valid */ - if (data->block[0] < 1) - data->block[0] = 1; - - if (data->block[0] > I2C_SMBUS_BLOCK_MAX) - data->block[0] = I2C_SMBUS_BLOCK_MAX; - - if (read_write == I2C_SMBUS_WRITE) { - /* i2c Block Write */ - dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA: WRITE\n"); - dma_size = data->block[0] + 1; - dma_direction = DMA_TO_DEVICE; - desc->wr_len_cmd = dma_size; - desc->control |= ISMT_DESC_I2C; - dma_buffer[0] = command; - memcpy(&dma_buffer[1], &data->block[1], dma_size - 1); - } else { - /* i2c Block Read */ - dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA: READ\n"); - dma_size = data->block[0]; - dma_direction = DMA_FROM_DEVICE; - desc->rd_len = dma_size; - desc->wr_len_cmd = command; - desc->control |= (ISMT_DESC_I2C | ISMT_DESC_CWRL); - /* - * Per the "Table 15-15. I2C Commands", - * in the External Design Specification (EDS), - * (Document Number: 508084, Revision: 2.0), - * the _rw bit must be 0 - */ - desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, 0); - } - break; - - default: - dev_err(dev, "Unsupported transaction %d\n", - size); - return -EOPNOTSUPP; - } - - /* map the data buffer */ - if (dma_size != 0) { - dev_dbg(dev, " dev=%p\n", dev); - dev_dbg(dev, " data=%p\n", data); - dev_dbg(dev, " dma_buffer=%p\n", dma_buffer); - dev_dbg(dev, " dma_size=%d\n", dma_size); - dev_dbg(dev, " dma_direction=%d\n", dma_direction); - - dma_addr = dma_map_single(dev, - dma_buffer, - dma_size, - dma_direction); - - if (dma_mapping_error(dev, dma_addr)) { - dev_err(dev, "Error in mapping dma buffer %p\n", - dma_buffer); - return -EIO; - } - - dev_dbg(dev, " dma_addr = %pad\n", &dma_addr); - - desc->dptr_low = lower_32_bits(dma_addr); - desc->dptr_high = upper_32_bits(dma_addr); - } - - reinit_completion(&priv->cmp); - - /* Add the descriptor */ - ismt_submit_desc(priv); - - /* Now we wait for interrupt completion, 1s */ - time_left = wait_for_completion_timeout(&priv->cmp, HZ*1); - - /* unmap the data buffer */ - if (dma_size != 0) - dma_unmap_single(dev, dma_addr, dma_size, dma_direction); - - if (unlikely(!time_left)) { - dev_warn(dev, "completion wait timed out:addr[%d-0x%x], read_write[%d], command[0x%x], size[%d]\n", - adap->nr, addr, read_write, command, size); - ismt_reset_dma(priv); - ret = -ETIMEDOUT; - priv->head = 0; - return ret; - } - - /* do any post processing of the descriptor here */ - ret = ismt_process_desc(desc, data, priv, size, read_write); - - /* Update the ring pointer */ - priv->head++; - priv->head %= ISMT_DESC_ENTRIES; - - return ret; -} - -/** - * ismt_func() - report which i2c commands are supported by this adapter - * @adap: the i2c host adapter - */ -static u32 ismt_func(struct i2c_adapter *adap) -{ - return I2C_FUNC_SMBUS_QUICK | - I2C_FUNC_SMBUS_BYTE | - I2C_FUNC_SMBUS_BYTE_DATA | - I2C_FUNC_SMBUS_WORD_DATA | - I2C_FUNC_SMBUS_PROC_CALL | - I2C_FUNC_SMBUS_BLOCK_PROC_CALL | - I2C_FUNC_SMBUS_BLOCK_DATA | - I2C_FUNC_SMBUS_I2C_BLOCK | - I2C_FUNC_SMBUS_PEC; -} - -static const struct i2c_algorithm smbus_algorithm = { - .smbus_xfer = ismt_access, - .functionality = ismt_func, -}; - -/** - * ismt_handle_isr() - interrupt handler bottom half - * @priv: iSMT private data - */ -static irqreturn_t ismt_handle_isr(struct ismt_priv *priv) -{ - complete(&priv->cmp); - - return IRQ_HANDLED; -} - - -/** - * ismt_do_interrupt() - IRQ interrupt handler - * @vec: interrupt vector - * @data: iSMT private data - */ -static irqreturn_t ismt_do_interrupt(int vec, void *data) -{ - u32 val; - struct ismt_priv *priv = data; - - /* - * check to see it's our interrupt, return IRQ_NONE if not ours - * since we are sharing interrupt - */ - val = readl(priv->smba + ISMT_MSTR_MSTS); - - if (!(val & (ISMT_MSTS_MIS | ISMT_MSTS_MEIS))) - return IRQ_NONE; - else - writel(val | ISMT_MSTS_MIS | ISMT_MSTS_MEIS, - priv->smba + ISMT_MSTR_MSTS); - - return ismt_handle_isr(priv); -} - -/** - * ismt_do_msi_interrupt() - MSI interrupt handler - * @vec: interrupt vector - * @data: iSMT private data - */ -static irqreturn_t ismt_do_msi_interrupt(int vec, void *data) -{ - return ismt_handle_isr(data); -} - -/** - * ismt_hw_init() - initialize the iSMT hardware - * @priv: iSMT private data - */ -static void ismt_hw_init(struct ismt_priv *priv) -{ - u32 val; - struct device *dev = &priv->pci_dev->dev; - - /* initialize the Master Descriptor Base Address (MDBA) */ - writeq(priv->io_rng_dma, priv->smba + ISMT_MSTR_MDBA); - - writeq(priv->log_dma, priv->smba + ISMT_GR_SMTICL); - - /* initialize the Master Control Register (MCTRL) */ - writel(ISMT_MCTRL_MEIE, priv->smba + ISMT_MSTR_MCTRL); - - /* initialize the Master Status Register (MSTS) */ - writel(0, priv->smba + ISMT_MSTR_MSTS); - - /* initialize the Master Descriptor Size (MDS) */ - val = readl(priv->smba + ISMT_MSTR_MDS); - writel((val & ~ISMT_MDS_MASK) | (ISMT_DESC_ENTRIES - 1), - priv->smba + ISMT_MSTR_MDS); - - /* - * Set the SMBus speed (could use this for slow HW debuggers) - */ - - val = readl(priv->smba + ISMT_SPGT); - - switch (bus_speed) { - case 0: - break; - - case 80: - dev_dbg(dev, "Setting SMBus clock to 80 kHz\n"); - writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_80K), - priv->smba + ISMT_SPGT); - break; - - case 100: - dev_dbg(dev, "Setting SMBus clock to 100 kHz\n"); - writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_100K), - priv->smba + ISMT_SPGT); - break; - - case 400: - dev_dbg(dev, "Setting SMBus clock to 400 kHz\n"); - writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_400K), - priv->smba + ISMT_SPGT); - break; - - case 1000: - dev_dbg(dev, "Setting SMBus clock to 1000 kHz\n"); - writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_1M), - priv->smba + ISMT_SPGT); - break; - - default: - dev_warn(dev, "Invalid SMBus clock speed, only 0, 80, 100, 400, and 1000 are valid\n"); - break; - } - - val = readl(priv->smba + ISMT_SPGT); - - switch (val & ISMT_SPGT_SPD_MASK) { - case ISMT_SPGT_SPD_80K: - bus_speed = 80; - break; - case ISMT_SPGT_SPD_100K: - bus_speed = 100; - break; - case ISMT_SPGT_SPD_400K: - bus_speed = 400; - break; - case ISMT_SPGT_SPD_1M: - bus_speed = 1000; - break; - } - dev_dbg(dev, "SMBus clock is running at %d kHz\n", bus_speed); -} - -/** - * ismt_dev_init() - initialize the iSMT data structures - * @priv: iSMT private data - */ -static int ismt_dev_init(struct ismt_priv *priv) -{ - /* allocate memory for the descriptor */ - priv->hw = dmam_alloc_coherent(&priv->pci_dev->dev, - (ISMT_DESC_ENTRIES - * sizeof(struct ismt_desc)), - &priv->io_rng_dma, - GFP_KERNEL); - if (!priv->hw) - return -ENOMEM; - - priv->head = 0; - init_completion(&priv->cmp); - - priv->log = dmam_alloc_coherent(&priv->pci_dev->dev, - ISMT_LOG_ENTRIES * sizeof(u32), - &priv->log_dma, GFP_KERNEL); - if (!priv->log) - return -ENOMEM; - - return 0; -} - -/** - * ismt_int_init() - initialize interrupts - * @priv: iSMT private data - */ -static int ismt_int_init(struct ismt_priv *priv) -{ - int err; - - /* Try using MSI interrupts */ - err = pci_enable_msi(priv->pci_dev); - if (err) - goto intx; - - err = devm_request_irq(&priv->pci_dev->dev, - priv->pci_dev->irq, - ismt_do_msi_interrupt, - 0, - "ismt-msi", - priv); - if (err) { - pci_disable_msi(priv->pci_dev); - goto intx; - } - - return 0; - - /* Try using legacy interrupts */ -intx: - dev_warn(&priv->pci_dev->dev, - "Unable to use MSI interrupts, falling back to legacy\n"); - - err = devm_request_irq(&priv->pci_dev->dev, - priv->pci_dev->irq, - ismt_do_interrupt, - IRQF_SHARED, - "ismt-intx", - priv); - if (err) { - dev_err(&priv->pci_dev->dev, "no usable interrupts\n"); - return err; - } - - return 0; -} - -static struct pci_driver ismt_driver; - -/** - * ismt_probe() - probe for iSMT devices - * @pdev: PCI-Express device - * @id: PCI-Express device ID - */ -static int -ismt_probe(struct pci_dev *pdev, const struct pci_device_id *id) -{ - int err; - struct ismt_priv *priv; - unsigned long start, len; - - priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; - - pci_set_drvdata(pdev, priv); - - i2c_set_adapdata(&priv->adapter, priv); - priv->adapter.owner = THIS_MODULE; - priv->adapter.class = I2C_CLASS_HWMON; - priv->adapter.algo = &smbus_algorithm; - priv->adapter.dev.parent = &pdev->dev; - ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&pdev->dev)); - priv->adapter.retries = ISMT_MAX_RETRIES; - - priv->pci_dev = pdev; - - err = pcim_enable_device(pdev); - if (err) { - dev_err(&pdev->dev, "Failed to enable SMBus PCI device (%d)\n", - err); - return err; - } - - /* enable bus mastering */ - pci_set_master(pdev); - - /* Determine the address of the SMBus area */ - start = pci_resource_start(pdev, SMBBAR); - len = pci_resource_len(pdev, SMBBAR); - if (!start || !len) { - dev_err(&pdev->dev, - "SMBus base address uninitialized, upgrade BIOS\n"); - return -ENODEV; - } - - snprintf(priv->adapter.name, sizeof(priv->adapter.name), - "SMBus iSMT adapter at %lx", start); - - dev_dbg(&priv->pci_dev->dev, " start=0x%lX\n", start); - dev_dbg(&priv->pci_dev->dev, " len=0x%lX\n", len); - - err = acpi_check_resource_conflict(&pdev->resource[SMBBAR]); - if (err) { - dev_err(&pdev->dev, "ACPI resource conflict!\n"); - return err; - } - - err = pci_request_region(pdev, SMBBAR, ismt_driver.name); - if (err) { - dev_err(&pdev->dev, - "Failed to request SMBus region 0x%lx-0x%lx\n", - start, start + len); - return err; - } - - priv->smba = pcim_iomap(pdev, SMBBAR, len); - if (!priv->smba) { - dev_err(&pdev->dev, "Unable to ioremap SMBus BAR\n"); - return -ENODEV; - } - - err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); - if (err) { - dev_err(&pdev->dev, "dma_set_mask fail\n"); - return -ENODEV; - } - - err = ismt_dev_init(priv); - if (err) - return err; - - ismt_hw_init(priv); - - err = ismt_int_init(priv); - if (err) - return err; - - err = i2c_add_adapter(&priv->adapter); - if (err) - return -ENODEV; - dev_info(&pdev->dev, "wb-i2c-ismt probe ok.\n"); - return 0; -} - -/** - * ismt_remove() - release driver resources - * @pdev: PCI-Express device - */ -static void ismt_remove(struct pci_dev *pdev) -{ - struct ismt_priv *priv = pci_get_drvdata(pdev); - - i2c_del_adapter(&priv->adapter); -} - -static struct pci_driver ismt_driver = { - .name = "wb_ismt_smbus", - .id_table = ismt_ids, - .probe = ismt_probe, - .remove = ismt_remove, -}; - -module_pci_driver(ismt_driver); - -MODULE_LICENSE("Dual BSD/GPL"); -MODULE_AUTHOR("Bill E. Brown "); -MODULE_DESCRIPTION("Intel SMBus Message Transport (iSMT) driver"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c deleted file mode 100644 index 05b6da0284c0..000000000000 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c +++ /dev/null @@ -1,1031 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * INA3221 Triple Current/Voltage Monitor - * - * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/ - * Andrew F. Davis - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define INA3221_DRIVER_NAME "wb_ina3221" - -#define INA3221_CONFIG 0x00 -#define INA3221_SHUNT1 0x01 -#define INA3221_BUS1 0x02 -#define INA3221_SHUNT2 0x03 -#define INA3221_BUS2 0x04 -#define INA3221_SHUNT3 0x05 -#define INA3221_BUS3 0x06 -#define INA3221_CRIT1 0x07 -#define INA3221_WARN1 0x08 -#define INA3221_CRIT2 0x09 -#define INA3221_WARN2 0x0a -#define INA3221_CRIT3 0x0b -#define INA3221_WARN3 0x0c -#define INA3221_SHUNT_SUM 0x0d -#define INA3221_CRIT_SUM 0x0e -#define INA3221_MASK_ENABLE 0x0f - -#define INA3221_CONFIG_MODE_MASK GENMASK(2, 0) -#define INA3221_CONFIG_MODE_POWERDOWN 0 -#define INA3221_CONFIG_MODE_SHUNT BIT(0) -#define INA3221_CONFIG_MODE_BUS BIT(1) -#define INA3221_CONFIG_MODE_CONTINUOUS BIT(2) -#define INA3221_CONFIG_VSH_CT_SHIFT 3 -#define INA3221_CONFIG_VSH_CT_MASK GENMASK(5, 3) -#define INA3221_CONFIG_VSH_CT(x) (((x) & GENMASK(5, 3)) >> 3) -#define INA3221_CONFIG_VBUS_CT_SHIFT 6 -#define INA3221_CONFIG_VBUS_CT_MASK GENMASK(8, 6) -#define INA3221_CONFIG_VBUS_CT(x) (((x) & GENMASK(8, 6)) >> 6) -#define INA3221_CONFIG_AVG_SHIFT 9 -#define INA3221_CONFIG_AVG_MASK GENMASK(11, 9) -#define INA3221_CONFIG_AVG(x) (((x) & GENMASK(11, 9)) >> 9) -#define INA3221_CONFIG_CHs_EN_MASK GENMASK(14, 12) -#define INA3221_CONFIG_CHx_EN(x) BIT(14 - (x)) - -#define INA3221_MASK_ENABLE_SCC_MASK GENMASK(14, 12) - -#define INA3221_CONFIG_DEFAULT 0x7127 -#define INA3221_RSHUNT_DEFAULT 10000 - -enum ina3221_fields { - /* Configuration */ - F_RST, - - /* Status Flags */ - F_CVRF, - - /* Warning Flags */ - F_WF3, F_WF2, F_WF1, - - /* Alert Flags: SF is the summation-alert flag */ - F_SF, F_CF3, F_CF2, F_CF1, - - /* sentinel */ - F_MAX_FIELDS -}; - -static const struct reg_field ina3221_reg_fields[] = { - [F_RST] = REG_FIELD(INA3221_CONFIG, 15, 15), - - [F_CVRF] = REG_FIELD(INA3221_MASK_ENABLE, 0, 0), - [F_WF3] = REG_FIELD(INA3221_MASK_ENABLE, 3, 3), - [F_WF2] = REG_FIELD(INA3221_MASK_ENABLE, 4, 4), - [F_WF1] = REG_FIELD(INA3221_MASK_ENABLE, 5, 5), - [F_SF] = REG_FIELD(INA3221_MASK_ENABLE, 6, 6), - [F_CF3] = REG_FIELD(INA3221_MASK_ENABLE, 7, 7), - [F_CF2] = REG_FIELD(INA3221_MASK_ENABLE, 8, 8), - [F_CF1] = REG_FIELD(INA3221_MASK_ENABLE, 9, 9), -}; - -enum ina3221_channels { - INA3221_CHANNEL1, - INA3221_CHANNEL2, - INA3221_CHANNEL3, - INA3221_NUM_CHANNELS -}; - -/** - * struct ina3221_input - channel input source specific information - * @label: label of channel input source - * @shunt_resistor: shunt resistor value of channel input source - * @disconnected: connection status of channel input source - */ -struct ina3221_input { - const char *label; - int shunt_resistor; - bool disconnected; -}; - -/** - * struct ina3221_data - device specific information - * @pm_dev: Device pointer for pm runtime - * @regmap: Register map of the device - * @fields: Register fields of the device - * @inputs: Array of channel input source specific structures - * @lock: mutex lock to serialize sysfs attribute accesses - * @reg_config: Register value of INA3221_CONFIG - * @summation_shunt_resistor: equivalent shunt resistor value for summation - * @single_shot: running in single-shot operating mode - */ -struct ina3221_data { - struct device *pm_dev; - struct regmap *regmap; - struct regmap_field *fields[F_MAX_FIELDS]; - struct ina3221_input inputs[INA3221_NUM_CHANNELS]; - struct mutex lock; - u32 reg_config; - int summation_shunt_resistor; - - bool single_shot; -}; - -static inline bool ina3221_is_enabled(struct ina3221_data *ina, int channel) -{ - /* Summation channel checks shunt resistor values */ - if (channel > INA3221_CHANNEL3) - return ina->summation_shunt_resistor != 0; - - return pm_runtime_active(ina->pm_dev) && - (ina->reg_config & INA3221_CONFIG_CHx_EN(channel)); -} - -/** - * Helper function to return the resistor value for current summation. - * - * There is a condition to calculate current summation -- all the shunt - * resistor values should be the same, so as to simply fit the formula: - * current summation = shunt voltage summation / shunt resistor - * - * Returns the equivalent shunt resistor value on success or 0 on failure - */ -static inline int ina3221_summation_shunt_resistor(struct ina3221_data *ina) -{ - struct ina3221_input *input = ina->inputs; - int i, shunt_resistor = 0; - - for (i = 0; i < INA3221_NUM_CHANNELS; i++) { - if (input[i].disconnected || !input[i].shunt_resistor) - continue; - if (!shunt_resistor) { - /* Found the reference shunt resistor value */ - shunt_resistor = input[i].shunt_resistor; - } else { - /* No summation if resistor values are different */ - if (shunt_resistor != input[i].shunt_resistor) - return 0; - } - } - - return shunt_resistor; -} - -/* Lookup table for Bus and Shunt conversion times in usec */ -static const u16 ina3221_conv_time[] = { - 140, 204, 332, 588, 1100, 2116, 4156, 8244, -}; - -/* Lookup table for number of samples using in averaging mode */ -static const int ina3221_avg_samples[] = { - 1, 4, 16, 64, 128, 256, 512, 1024, -}; - -/* Converting update_interval in msec to conversion time in usec */ -static inline u32 ina3221_interval_ms_to_conv_time(u16 config, int interval) -{ - u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK); - u32 samples_idx = INA3221_CONFIG_AVG(config); - u32 samples = ina3221_avg_samples[samples_idx]; - - /* Bisect the result to Bus and Shunt conversion times */ - return DIV_ROUND_CLOSEST(interval * 1000 / 2, channels * samples); -} - -/* Converting CONFIG register value to update_interval in usec */ -static inline u32 ina3221_reg_to_interval_us(u16 config) -{ - u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK); - u32 vbus_ct_idx = INA3221_CONFIG_VBUS_CT(config); - u32 vsh_ct_idx = INA3221_CONFIG_VSH_CT(config); - u32 samples_idx = INA3221_CONFIG_AVG(config); - u32 samples = ina3221_avg_samples[samples_idx]; - u32 vbus_ct = ina3221_conv_time[vbus_ct_idx]; - u32 vsh_ct = ina3221_conv_time[vsh_ct_idx]; - - /* Calculate total conversion time */ - return channels * (vbus_ct + vsh_ct) * samples; -} - -static inline int ina3221_wait_for_data(struct ina3221_data *ina) -{ - u32 wait, cvrf; - - wait = ina3221_reg_to_interval_us(ina->reg_config); - - /* Polling the CVRF bit to make sure read data is ready */ - return regmap_field_read_poll_timeout(ina->fields[F_CVRF], - cvrf, cvrf, wait, wait * 2); -} - -static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg, - int *val) -{ - unsigned int regval; - int ret; - - ret = regmap_read(ina->regmap, reg, ®val); - if (ret) - return ret; - - /* - * Shunt Voltage Sum register has 14-bit value with 1-bit shift - * Other Shunt Voltage registers have 12 bits with 3-bit shift - */ - if (reg == INA3221_SHUNT_SUM) - *val = sign_extend32(regval >> 1, 14); - else - *val = sign_extend32(regval >> 3, 12); - - return 0; -} - -static const u8 ina3221_in_reg[] = { - INA3221_BUS1, - INA3221_BUS2, - INA3221_BUS3, - INA3221_SHUNT1, - INA3221_SHUNT2, - INA3221_SHUNT3, - INA3221_SHUNT_SUM, -}; - -static int ina3221_read_chip(struct device *dev, u32 attr, long *val) -{ - struct ina3221_data *ina = dev_get_drvdata(dev); - int regval; - - switch (attr) { - case hwmon_chip_samples: - regval = INA3221_CONFIG_AVG(ina->reg_config); - *val = ina3221_avg_samples[regval]; - return 0; - case hwmon_chip_update_interval: - /* Return in msec */ - *val = ina3221_reg_to_interval_us(ina->reg_config); - *val = DIV_ROUND_CLOSEST(*val, 1000); - return 0; - default: - return -EOPNOTSUPP; - } -} - -static int ina3221_read_in(struct device *dev, u32 attr, int channel, long *val) -{ - const bool is_shunt = channel > INA3221_CHANNEL3; - struct ina3221_data *ina = dev_get_drvdata(dev); - u8 reg = ina3221_in_reg[channel]; - int regval, ret; - - /* - * Translate shunt channel index to sensor channel index except - * the 7th channel (6 since being 0-aligned) is for summation. - */ - if (channel != 6) - channel %= INA3221_NUM_CHANNELS; - - switch (attr) { - case hwmon_in_input: - if (!ina3221_is_enabled(ina, channel)) - return -ENODATA; - - /* Write CONFIG register to trigger a single-shot measurement */ - if (ina->single_shot) - regmap_write(ina->regmap, INA3221_CONFIG, - ina->reg_config); - - ret = ina3221_wait_for_data(ina); - if (ret) - return ret; - - ret = ina3221_read_value(ina, reg, ®val); - if (ret) - return ret; - - /* - * Scale of shunt voltage (uV): LSB is 40uV - * Scale of bus voltage (mV): LSB is 8mV - */ - *val = regval * (is_shunt ? 40 : 8); - return 0; - case hwmon_in_enable: - *val = ina3221_is_enabled(ina, channel); - return 0; - default: - return -EOPNOTSUPP; - } -} - -static const u8 ina3221_curr_reg[][INA3221_NUM_CHANNELS + 1] = { - [hwmon_curr_input] = { INA3221_SHUNT1, INA3221_SHUNT2, - INA3221_SHUNT3, INA3221_SHUNT_SUM }, - [hwmon_curr_max] = { INA3221_WARN1, INA3221_WARN2, INA3221_WARN3, 0 }, - [hwmon_curr_crit] = { INA3221_CRIT1, INA3221_CRIT2, - INA3221_CRIT3, INA3221_CRIT_SUM }, - [hwmon_curr_max_alarm] = { F_WF1, F_WF2, F_WF3, 0 }, - [hwmon_curr_crit_alarm] = { F_CF1, F_CF2, F_CF3, F_SF }, -}; - -static int ina3221_read_curr(struct device *dev, u32 attr, - int channel, long *val) -{ - struct ina3221_data *ina = dev_get_drvdata(dev); - struct ina3221_input *input = ina->inputs; - u8 reg = ina3221_curr_reg[attr][channel]; - int resistance_uo, voltage_nv; - int regval, ret; - - if (channel > INA3221_CHANNEL3) - resistance_uo = ina->summation_shunt_resistor; - else - resistance_uo = input[channel].shunt_resistor; - - switch (attr) { - case hwmon_curr_input: - if (!ina3221_is_enabled(ina, channel)) - return -ENODATA; - - /* Write CONFIG register to trigger a single-shot measurement */ - if (ina->single_shot) - regmap_write(ina->regmap, INA3221_CONFIG, - ina->reg_config); - - ret = ina3221_wait_for_data(ina); - if (ret) - return ret; - - fallthrough; - case hwmon_curr_crit: - case hwmon_curr_max: - if (!resistance_uo) - return -ENODATA; - - ret = ina3221_read_value(ina, reg, ®val); - if (ret) - return ret; - - /* Scale of shunt voltage: LSB is 40uV (40000nV) */ - voltage_nv = regval * 40000; - /* Return current in mA */ - *val = DIV_ROUND_CLOSEST(voltage_nv, resistance_uo); - return 0; - case hwmon_curr_crit_alarm: - case hwmon_curr_max_alarm: - /* No actual register read if channel is disabled */ - if (!ina3221_is_enabled(ina, channel)) { - /* Return 0 for alert flags */ - *val = 0; - return 0; - } - ret = regmap_field_read(ina->fields[reg], ®val); - if (ret) - return ret; - *val = regval; - return 0; - default: - return -EOPNOTSUPP; - } -} - -static int ina3221_write_chip(struct device *dev, u32 attr, long val) -{ - struct ina3221_data *ina = dev_get_drvdata(dev); - int ret, idx; - u32 tmp; - - switch (attr) { - case hwmon_chip_samples: - idx = find_closest(val, ina3221_avg_samples, - ARRAY_SIZE(ina3221_avg_samples)); - - tmp = (ina->reg_config & ~INA3221_CONFIG_AVG_MASK) | - (idx << INA3221_CONFIG_AVG_SHIFT); - ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp); - if (ret) - return ret; - - /* Update reg_config accordingly */ - ina->reg_config = tmp; - return 0; - case hwmon_chip_update_interval: - tmp = ina3221_interval_ms_to_conv_time(ina->reg_config, val); - idx = find_closest(tmp, ina3221_conv_time, - ARRAY_SIZE(ina3221_conv_time)); - - /* Update Bus and Shunt voltage conversion times */ - tmp = INA3221_CONFIG_VBUS_CT_MASK | INA3221_CONFIG_VSH_CT_MASK; - tmp = (ina->reg_config & ~tmp) | - (idx << INA3221_CONFIG_VBUS_CT_SHIFT) | - (idx << INA3221_CONFIG_VSH_CT_SHIFT); - ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp); - if (ret) - return ret; - - /* Update reg_config accordingly */ - ina->reg_config = tmp; - return 0; - default: - return -EOPNOTSUPP; - } -} - -static int ina3221_write_curr(struct device *dev, u32 attr, - int channel, long val) -{ - struct ina3221_data *ina = dev_get_drvdata(dev); - struct ina3221_input *input = ina->inputs; - u8 reg = ina3221_curr_reg[attr][channel]; - int resistance_uo, current_ma, voltage_uv; - int regval; - - if (channel > INA3221_CHANNEL3) - resistance_uo = ina->summation_shunt_resistor; - else - resistance_uo = input[channel].shunt_resistor; - - if (!resistance_uo) - return -EOPNOTSUPP; - - /* clamp current */ - current_ma = clamp_val(val, - INT_MIN / resistance_uo, - INT_MAX / resistance_uo); - - voltage_uv = DIV_ROUND_CLOSEST(current_ma * resistance_uo, 1000); - - /* clamp voltage */ - voltage_uv = clamp_val(voltage_uv, -163800, 163800); - - /* - * Formula to convert voltage_uv to register value: - * regval = (voltage_uv / scale) << shift - * Note: - * The scale is 40uV for all shunt voltage registers - * Shunt Voltage Sum register left-shifts 1 bit - * All other Shunt Voltage registers shift 3 bits - * Results: - * SHUNT_SUM: (1 / 40uV) << 1 = 1 / 20uV - * SHUNT[1-3]: (1 / 40uV) << 3 = 1 / 5uV - */ - if (reg == INA3221_SHUNT_SUM) - regval = DIV_ROUND_CLOSEST(voltage_uv, 20) & 0xfffe; - else - regval = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8; - - return regmap_write(ina->regmap, reg, regval); -} - -static int ina3221_write_enable(struct device *dev, int channel, bool enable) -{ - struct ina3221_data *ina = dev_get_drvdata(dev); - u16 config, mask = INA3221_CONFIG_CHx_EN(channel); - u16 config_old = ina->reg_config & mask; - u32 tmp; - int ret; - - config = enable ? mask : 0; - - /* Bypass if enable status is not being changed */ - if (config_old == config) - return 0; - - /* For enabling routine, increase refcount and resume() at first */ - if (enable) { - ret = pm_runtime_resume_and_get(ina->pm_dev); - if (ret < 0) { - dev_err(dev, "Failed to get PM runtime\n"); - return ret; - } - } - - /* Enable or disable the channel */ - tmp = (ina->reg_config & ~mask) | (config & mask); - ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp); - if (ret) - goto fail; - - /* Cache the latest config register value */ - ina->reg_config = tmp; - - /* For disabling routine, decrease refcount or suspend() at last */ - if (!enable) - pm_runtime_put_sync(ina->pm_dev); - - return 0; - -fail: - if (enable) { - dev_err(dev, "Failed to enable channel %d: error %d\n", - channel, ret); - pm_runtime_put_sync(ina->pm_dev); - } - - return ret; -} - -static int ina3221_read(struct device *dev, enum hwmon_sensor_types type, - u32 attr, int channel, long *val) -{ - struct ina3221_data *ina = dev_get_drvdata(dev); - int ret; - - mutex_lock(&ina->lock); - - switch (type) { - case hwmon_chip: - ret = ina3221_read_chip(dev, attr, val); - break; - case hwmon_in: - /* 0-align channel ID */ - ret = ina3221_read_in(dev, attr, channel - 1, val); - break; - case hwmon_curr: - ret = ina3221_read_curr(dev, attr, channel, val); - break; - default: - ret = -EOPNOTSUPP; - break; - } - - mutex_unlock(&ina->lock); - - return ret; -} - -static int ina3221_write(struct device *dev, enum hwmon_sensor_types type, - u32 attr, int channel, long val) -{ - struct ina3221_data *ina = dev_get_drvdata(dev); - int ret; - - mutex_lock(&ina->lock); - - switch (type) { - case hwmon_chip: - ret = ina3221_write_chip(dev, attr, val); - break; - case hwmon_in: - /* 0-align channel ID */ - ret = ina3221_write_enable(dev, channel - 1, val); - break; - case hwmon_curr: - ret = ina3221_write_curr(dev, attr, channel, val); - break; - default: - ret = -EOPNOTSUPP; - break; - } - - mutex_unlock(&ina->lock); - - return ret; -} - -static int ina3221_read_string(struct device *dev, enum hwmon_sensor_types type, - u32 attr, int channel, const char **str) -{ - struct ina3221_data *ina = dev_get_drvdata(dev); - int index = channel - 1; - - if (channel == 7) - *str = "sum of shunt voltages"; - else - *str = ina->inputs[index].label; - - return 0; -} - -static umode_t ina3221_is_visible(const void *drvdata, - enum hwmon_sensor_types type, - u32 attr, int channel) -{ - const struct ina3221_data *ina = drvdata; - const struct ina3221_input *input = NULL; - - switch (type) { - case hwmon_chip: - switch (attr) { - case hwmon_chip_samples: - case hwmon_chip_update_interval: - return 0644; - default: - return 0; - } - case hwmon_in: - /* Ignore in0_ */ - if (channel == 0) - return 0; - - switch (attr) { - case hwmon_in_label: - if (channel - 1 <= INA3221_CHANNEL3) - input = &ina->inputs[channel - 1]; - else if (channel == 7) - return 0444; - /* Hide label node if label is not provided */ - return (input && input->label) ? 0444 : 0; - case hwmon_in_input: - return 0444; - case hwmon_in_enable: - return 0644; - default: - return 0; - } - case hwmon_curr: - switch (attr) { - case hwmon_curr_input: - case hwmon_curr_crit_alarm: - case hwmon_curr_max_alarm: - return 0444; - case hwmon_curr_crit: - case hwmon_curr_max: - return 0644; - default: - return 0; - } - default: - return 0; - } -} - -#define INA3221_HWMON_CURR_CONFIG (HWMON_C_INPUT | \ - HWMON_C_CRIT | HWMON_C_CRIT_ALARM | \ - HWMON_C_MAX | HWMON_C_MAX_ALARM) - -static const struct hwmon_channel_info *ina3221_info[] = { - HWMON_CHANNEL_INFO(chip, - HWMON_C_SAMPLES, - HWMON_C_UPDATE_INTERVAL), - HWMON_CHANNEL_INFO(in, - /* 0: dummy, skipped in is_visible */ - HWMON_I_INPUT, - /* 1-3: input voltage Channels */ - HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL, - HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL, - HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL, - /* 4-6: shunt voltage Channels */ - HWMON_I_INPUT, - HWMON_I_INPUT, - HWMON_I_INPUT, - /* 7: summation of shunt voltage channels */ - HWMON_I_INPUT | HWMON_I_LABEL), - HWMON_CHANNEL_INFO(curr, - /* 1-3: current channels*/ - INA3221_HWMON_CURR_CONFIG, - INA3221_HWMON_CURR_CONFIG, - INA3221_HWMON_CURR_CONFIG, - /* 4: summation of current channels */ - HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM), - NULL -}; - -static const struct hwmon_ops ina3221_hwmon_ops = { - .is_visible = ina3221_is_visible, - .read_string = ina3221_read_string, - .read = ina3221_read, - .write = ina3221_write, -}; - -static const struct hwmon_chip_info ina3221_chip_info = { - .ops = &ina3221_hwmon_ops, - .info = ina3221_info, -}; - -/* Extra attribute groups */ -static ssize_t ina3221_shunt_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr); - struct ina3221_data *ina = dev_get_drvdata(dev); - unsigned int channel = sd_attr->index; - struct ina3221_input *input = &ina->inputs[channel]; - - return snprintf(buf, PAGE_SIZE, "%d\n", input->shunt_resistor); -} - -static ssize_t ina3221_shunt_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr); - struct ina3221_data *ina = dev_get_drvdata(dev); - unsigned int channel = sd_attr->index; - struct ina3221_input *input = &ina->inputs[channel]; - int val; - int ret; - - ret = kstrtoint(buf, 0, &val); - if (ret) - return ret; - - val = clamp_val(val, 1, INT_MAX); - - input->shunt_resistor = val; - - /* Update summation_shunt_resistor for summation channel */ - ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina); - - return count; -} - -/* shunt resistance */ -static SENSOR_DEVICE_ATTR_RW(shunt1_resistor, ina3221_shunt, INA3221_CHANNEL1); -static SENSOR_DEVICE_ATTR_RW(shunt2_resistor, ina3221_shunt, INA3221_CHANNEL2); -static SENSOR_DEVICE_ATTR_RW(shunt3_resistor, ina3221_shunt, INA3221_CHANNEL3); - -static struct attribute *ina3221_attrs[] = { - &sensor_dev_attr_shunt1_resistor.dev_attr.attr, - &sensor_dev_attr_shunt2_resistor.dev_attr.attr, - &sensor_dev_attr_shunt3_resistor.dev_attr.attr, - NULL, -}; -ATTRIBUTE_GROUPS(ina3221); - -static const struct regmap_range ina3221_yes_ranges[] = { - regmap_reg_range(INA3221_CONFIG, INA3221_BUS3), - regmap_reg_range(INA3221_SHUNT_SUM, INA3221_SHUNT_SUM), - regmap_reg_range(INA3221_MASK_ENABLE, INA3221_MASK_ENABLE), -}; - -static const struct regmap_access_table ina3221_volatile_table = { - .yes_ranges = ina3221_yes_ranges, - .n_yes_ranges = ARRAY_SIZE(ina3221_yes_ranges), -}; - -static const struct regmap_config ina3221_regmap_config = { - .reg_bits = 8, - .val_bits = 16, - - .cache_type = REGCACHE_RBTREE, - .volatile_table = &ina3221_volatile_table, -}; - -static int ina3221_probe_child_from_dt(struct device *dev, - struct device_node *child, - struct ina3221_data *ina) -{ - struct ina3221_input *input; - u32 val; - int ret; - - ret = of_property_read_u32(child, "reg", &val); - if (ret) { - dev_err(dev, "missing reg property of %pOFn\n", child); - return ret; - } else if (val > INA3221_CHANNEL3) { - dev_err(dev, "invalid reg %d of %pOFn\n", val, child); - return ret; - } - - input = &ina->inputs[val]; - - /* Log the disconnected channel input */ - if (!of_device_is_available(child)) { - input->disconnected = true; - return 0; - } - - /* Save the connected input label if available */ - of_property_read_string(child, "label", &input->label); - - /* Overwrite default shunt resistor value optionally */ - if (!of_property_read_u32(child, "shunt-resistor-micro-ohms", &val)) { - if (val < 1 || val > INT_MAX) { - dev_err(dev, "invalid shunt resistor value %u of %pOFn\n", - val, child); - return -EINVAL; - } - input->shunt_resistor = val; - } - - return 0; -} - -static int ina3221_probe_from_dt(struct device *dev, struct ina3221_data *ina) -{ - const struct device_node *np = dev->of_node; - struct device_node *child; - int ret; - - /* Compatible with non-DT platforms */ - if (!np) - return 0; - - ina->single_shot = of_property_read_bool(np, "ti,single-shot"); - - for_each_child_of_node(np, child) { - ret = ina3221_probe_child_from_dt(dev, child, ina); - if (ret) { - of_node_put(child); - return ret; - } - } - - return 0; -} - -static int ina3221_probe(struct i2c_client *client) -{ - struct device *dev = &client->dev; - struct ina3221_data *ina; - struct device *hwmon_dev; - int i, ret; - - ina = devm_kzalloc(dev, sizeof(*ina), GFP_KERNEL); - if (!ina) - return -ENOMEM; - - ina->regmap = devm_regmap_init_i2c(client, &ina3221_regmap_config); - if (IS_ERR(ina->regmap)) { - dev_err(dev, "Unable to allocate register map\n"); - return PTR_ERR(ina->regmap); - } - - for (i = 0; i < F_MAX_FIELDS; i++) { - ina->fields[i] = devm_regmap_field_alloc(dev, - ina->regmap, - ina3221_reg_fields[i]); - if (IS_ERR(ina->fields[i])) { - dev_err(dev, "Unable to allocate regmap fields\n"); - return PTR_ERR(ina->fields[i]); - } - } - - for (i = 0; i < INA3221_NUM_CHANNELS; i++) - ina->inputs[i].shunt_resistor = INA3221_RSHUNT_DEFAULT; - - ret = ina3221_probe_from_dt(dev, ina); - if (ret) { - dev_err(dev, "Unable to probe from device tree\n"); - return ret; - } - - /* The driver will be reset, so use reset value */ - ina->reg_config = INA3221_CONFIG_DEFAULT; - - /* Clear continuous bit to use single-shot mode */ - if (ina->single_shot) - ina->reg_config &= ~INA3221_CONFIG_MODE_CONTINUOUS; - - /* Disable channels if their inputs are disconnected */ - for (i = 0; i < INA3221_NUM_CHANNELS; i++) { - if (ina->inputs[i].disconnected) - ina->reg_config &= ~INA3221_CONFIG_CHx_EN(i); - } - - /* Initialize summation_shunt_resistor for summation channel control */ - ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina); - - ina->pm_dev = dev; - mutex_init(&ina->lock); - dev_set_drvdata(dev, ina); - - /* Enable PM runtime -- status is suspended by default */ - pm_runtime_enable(ina->pm_dev); - - /* Initialize (resume) the device */ - for (i = 0; i < INA3221_NUM_CHANNELS; i++) { - if (ina->inputs[i].disconnected) - continue; - /* Match the refcount with number of enabled channels */ - ret = pm_runtime_get_sync(ina->pm_dev); - if (ret < 0) - goto fail; - } - - hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, ina, - &ina3221_chip_info, - ina3221_groups); - if (IS_ERR(hwmon_dev)) { - dev_err(dev, "Unable to register hwmon device\n"); - ret = PTR_ERR(hwmon_dev); - goto fail; - } - - return 0; - -fail: - pm_runtime_disable(ina->pm_dev); - pm_runtime_set_suspended(ina->pm_dev); - /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */ - for (i = 0; i < INA3221_NUM_CHANNELS; i++) - pm_runtime_put_noidle(ina->pm_dev); - mutex_destroy(&ina->lock); - - return ret; -} - -static void ina3221_remove(struct i2c_client *client) -{ - struct ina3221_data *ina = dev_get_drvdata(&client->dev); - int i; - - pm_runtime_disable(ina->pm_dev); - pm_runtime_set_suspended(ina->pm_dev); - - /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */ - for (i = 0; i < INA3221_NUM_CHANNELS; i++) - pm_runtime_put_noidle(ina->pm_dev); - - mutex_destroy(&ina->lock); - - return; -} - -static int __maybe_unused ina3221_suspend(struct device *dev) -{ - struct ina3221_data *ina = dev_get_drvdata(dev); - int ret; - - /* Save config register value and enable cache-only */ - ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config); - if (ret) - return ret; - - /* Set to power-down mode for power saving */ - ret = regmap_update_bits(ina->regmap, INA3221_CONFIG, - INA3221_CONFIG_MODE_MASK, - INA3221_CONFIG_MODE_POWERDOWN); - if (ret) - return ret; - - regcache_cache_only(ina->regmap, true); - regcache_mark_dirty(ina->regmap); - - return 0; -} - -static int __maybe_unused ina3221_resume(struct device *dev) -{ - struct ina3221_data *ina = dev_get_drvdata(dev); - int ret; - - regcache_cache_only(ina->regmap, false); - - /* Software reset the chip */ - ret = regmap_field_write(ina->fields[F_RST], true); - if (ret) { - dev_err(dev, "Unable to reset device\n"); - return ret; - } - - /* Restore cached register values to hardware */ - ret = regcache_sync(ina->regmap); - if (ret) - return ret; - - /* Restore config register value to hardware */ - ret = regmap_write(ina->regmap, INA3221_CONFIG, ina->reg_config); - if (ret) - return ret; - - /* Initialize summation channel control */ - if (ina->summation_shunt_resistor) { - /* - * Take all three channels into summation by default - * Shunt measurements of disconnected channels should - * be 0, so it does not matter for summation. - */ - ret = regmap_update_bits(ina->regmap, INA3221_MASK_ENABLE, - INA3221_MASK_ENABLE_SCC_MASK, - INA3221_MASK_ENABLE_SCC_MASK); - if (ret) { - dev_err(dev, "Unable to control summation channel\n"); - return ret; - } - } - - return 0; -} - -static const struct dev_pm_ops ina3221_pm = { - SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, - pm_runtime_force_resume) - SET_RUNTIME_PM_OPS(ina3221_suspend, ina3221_resume, NULL) -}; - -static const struct of_device_id ina3221_of_match_table[] = { - { .compatible = "ti,wb_ina3221", }, - { /* sentinel */ } -}; -MODULE_DEVICE_TABLE(of, ina3221_of_match_table); - -static const struct i2c_device_id ina3221_ids[] = { - { "wb_ina3221", 0 }, - { /* sentinel */ } -}; -MODULE_DEVICE_TABLE(i2c, ina3221_ids); - -static struct i2c_driver ina3221_i2c_driver = { - .probe_new = ina3221_probe, - .remove = ina3221_remove, - .driver = { - .name = INA3221_DRIVER_NAME, - .of_match_table = ina3221_of_match_table, - .pm = &ina3221_pm, - }, - .id_table = ina3221_ids, -}; -module_i2c_driver(ina3221_i2c_driver); - -MODULE_AUTHOR("support"); -MODULE_DESCRIPTION("Texas Instruments INA3221 HWMon Driver"); -MODULE_LICENSE("GPL v2"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c deleted file mode 100644 index 648020435311..000000000000 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c +++ /dev/null @@ -1,577 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Hardware monitoring driver for Renesas Digital Multiphase Voltage Regulators - * - * Copyright (c) 2017 Google Inc - * Copyright (c) 2020 Renesas Electronics America - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "wb_pmbus.h" - -#define ISL68137_VOUT_AVS (0x30) -#define RAA_DMPVR2_READ_VMON (0xc8) -#define WRITE_PROTECT_CLOSE (0x00) -#define WRITE_PROTECT_OPEN (0x40) - -static int g_wb_isl68137_debug = 0; -static int g_wb_isl68137_error = 0; - -module_param(g_wb_isl68137_debug, int, S_IRUGO | S_IWUSR); -module_param(g_wb_isl68137_error, int, S_IRUGO | S_IWUSR); - -#define WB_ISL68137_VERBOSE(fmt, args...) do { \ - if (g_wb_isl68137_debug) { \ - printk(KERN_INFO "[WB_ISL68137][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \ - } \ -} while (0) - -#define WB_ISL68137_ERROR(fmt, args...) do { \ - if (g_wb_isl68137_error) { \ - printk(KERN_ERR "[WB_ISL68137][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \ - } \ -} while (0) - -enum chips { - isl68137, - isl68220, - isl68221, - isl68222, - isl68223, - isl68224, - isl68225, - isl68226, - isl68227, - isl68229, - isl68233, - isl68239, - isl69222, - isl69223, - isl69224, - isl69225, - isl69227, - isl69228, - isl69234, - isl69236, - isl69239, - isl69242, - isl69243, - isl69247, - isl69248, - isl69254, - isl69255, - isl69256, - isl69259, - isl69260, - isl69268, - isl69269, - isl69298, - raa228000, - raa228004, - raa228006, - raa228228, - raa229001, - raa229004, -}; - -enum variants { - raa_dmpvr1_2rail, - raa_dmpvr2_1rail, - raa_dmpvr2_2rail, - raa_dmpvr2_2rail_nontc, - raa_dmpvr2_3rail, - raa_dmpvr2_hv, -}; - -static const struct i2c_device_id raa_dmpvr_id[]; - -static ssize_t isl68137_avs_enable_show_page(struct i2c_client *client, - int page, - char *buf) -{ - int val = wb_pmbus_read_byte_data(client, page, PMBUS_OPERATION); - - return sprintf(buf, "%d\n", - (val & ISL68137_VOUT_AVS) == ISL68137_VOUT_AVS ? 1 : 0); -} - -static ssize_t isl68137_avs_enable_store_page(struct i2c_client *client, - int page, - const char *buf, size_t count) -{ - int rc, op_val; - bool result; - - rc = kstrtobool(buf, &result); - if (rc) - return rc; - - op_val = result ? ISL68137_VOUT_AVS : 0; - - /* - * Writes to VOUT setpoint over AVSBus will persist after the VRM is - * switched to PMBus control. Switching back to AVSBus control - * restores this persisted setpoint rather than re-initializing to - * PMBus VOUT_COMMAND. Writing VOUT_COMMAND first over PMBus before - * enabling AVS control is the workaround. - */ - if (op_val == ISL68137_VOUT_AVS) { - rc = wb_pmbus_read_word_data(client, page, 0xff, - PMBUS_VOUT_COMMAND); - if (rc < 0) - return rc; - - rc = wb_pmbus_write_word_data(client, page, PMBUS_VOUT_COMMAND, - rc); - if (rc < 0) - return rc; - } - - rc = wb_pmbus_update_byte_data(client, page, PMBUS_OPERATION, - ISL68137_VOUT_AVS, op_val); - - return (rc < 0) ? rc : count; -} - -static ssize_t isl68137_avs_enable_show(struct device *dev, - struct device_attribute *devattr, - char *buf) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - - return isl68137_avs_enable_show_page(client, attr->index, buf); -} - -static ssize_t isl68137_avs_enable_store(struct device *dev, - struct device_attribute *devattr, - const char *buf, size_t count) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - - return isl68137_avs_enable_store_page(client, attr->index, buf, count); -} - -static ssize_t isl68137_avs_vout_show(struct device *dev, struct device_attribute *devattr, - char *buf) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - int vout_cmd, vout; - - mutex_lock(&data->update_lock); - vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND); - if (vout_cmd < 0) { - WB_ISL68137_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n", - client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd); - mutex_unlock(&data->update_lock); - return vout_cmd; - } - vout = vout_cmd * 1000; - WB_ISL68137_VERBOSE("%d-%04x: page%d, vout: %d, vout_cmd: 0x%x\n", client->adapter->nr, - client->addr, attr->index, vout, vout_cmd); - mutex_unlock(&data->update_lock); - return snprintf(buf, PAGE_SIZE, "%d\n", vout); -} - -static ssize_t isl68137_avs_vout_store(struct device *dev, struct device_attribute *devattr, - const char *buf, size_t count) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - int vout, vout_max, vout_min; - int ret, vout_cmd, vout_cmd_set; - - if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { - WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr, - attr->index); - return -EINVAL; - } - - ret = kstrtoint(buf, 0, &vout); - if (ret) { - WB_ISL68137_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf); - return -EINVAL; - } - - if (vout <= 0) { - WB_ISL68137_ERROR("%d-%04x: invalid value: %d \n", client->adapter->nr, client->addr, vout); - return -EINVAL; - } - - vout_max = data->vout_max[attr->index]; - vout_min = data->vout_min[attr->index]; - if ((vout > vout_max) || (vout < vout_min)) { - WB_ISL68137_ERROR("%d-%04x: vout value: %d, out of range [%d, %d] \n", client->adapter->nr, - client->addr, vout, vout_min, vout_max); - return -EINVAL; - } - - /* calc VOUT_COMMAND set value */ - vout_cmd_set = vout / 1000; - if (vout_cmd_set > 0xffff) { - WB_ISL68137_ERROR("%d-%04x: invalid value, vout %d, vout_cmd_set: 0x%x\n", - client->adapter->nr, client->addr, vout, vout_cmd_set); - return -EINVAL; - } - - mutex_lock(&data->update_lock); - - /* close write protect */ - ret = wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, WRITE_PROTECT_CLOSE); - if (ret < 0) { - WB_ISL68137_ERROR("%d-%04x: close page%d write protect failed, ret: %d\n", client->adapter->nr, - client->addr, attr->index, ret); - mutex_unlock(&data->update_lock); - return ret; - } - - /* set VOUT_COMMAND */ - ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set); - if (ret < 0) { - WB_ISL68137_ERROR("%d-%04x: set page%d vout cmd reg: 0x%x, value: 0x%x failed, ret: %d\n", - client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set, ret); - goto error; - } - - /* read back VOUT_COMMAND */ - vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND); - if (vout_cmd < 0) { - ret = vout_cmd; - WB_ISL68137_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n", - client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, ret); - goto error; - } - - /* compare vout_cmd and vout_cmd_set */ - if (vout_cmd != vout_cmd_set) { - ret = -EIO; - WB_ISL68137_ERROR("%d-%04x: vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n", - client->adapter->nr, client->addr, vout_cmd, vout_cmd_set); - goto error; - } - - /* open write protect */ - wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, WRITE_PROTECT_OPEN); - mutex_unlock(&data->update_lock); - WB_ISL68137_VERBOSE("%d-%04x: set page%d vout cmd success, vout %d, vout_cmd_set: 0x%x\n", - client->adapter->nr, client->addr, attr->index, vout, vout_cmd_set); - return count; -error: - wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, WRITE_PROTECT_OPEN); - mutex_unlock(&data->update_lock); - return ret; -} - -static ssize_t isl68137_avs_vout_max_store(struct device *dev, - struct device_attribute *devattr, const char *buf, size_t count) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - int ret, vout_threshold; - - if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { - WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr, - attr->index); - return -EINVAL; - } - - ret = kstrtoint(buf, 0, &vout_threshold); - if (ret) { - WB_ISL68137_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf); - return -EINVAL; - } - - WB_ISL68137_VERBOSE("%d-%04x: vout%d max threshold: %d", client->adapter->nr, client->addr, - attr->index, vout_threshold); - - data->vout_max[attr->index] = vout_threshold; - return count; -} - -static ssize_t isl68137_avs_vout_max_show(struct device *dev, - struct device_attribute *devattr, char *buf) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - - if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { - WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr, - attr->index); - return -EINVAL; - } - - return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_max[attr->index]); -} - -static ssize_t isl68137_avs_vout_min_store(struct device *dev, - struct device_attribute *devattr, const char *buf, size_t count) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - int ret, vout_threshold; - - if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { - WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr, - attr->index); - return -EINVAL; - } - - ret = kstrtoint(buf, 0, &vout_threshold); - if (ret) { - WB_ISL68137_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf); - return -EINVAL; - } - - WB_ISL68137_VERBOSE("%d-%04x: vout%d min threshold: %d", client->adapter->nr, client->addr, - attr->index, vout_threshold); - - data->vout_min[attr->index] = vout_threshold; - return count; -} - -static ssize_t isl68137_avs_vout_min_show(struct device *dev, - struct device_attribute *devattr, char *buf) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - - if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { - WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr, - attr->index); - return -EINVAL; - } - - return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_min[attr->index]); -} - -static SENSOR_DEVICE_ATTR_RW(avs0_enable, isl68137_avs_enable, 0); -static SENSOR_DEVICE_ATTR_RW(avs1_enable, isl68137_avs_enable, 1); - -static SENSOR_DEVICE_ATTR_RW(avs0_vout, isl68137_avs_vout, 0); -static SENSOR_DEVICE_ATTR_RW(avs1_vout, isl68137_avs_vout, 1); -static SENSOR_DEVICE_ATTR_RW(avs0_vout_max, isl68137_avs_vout_max, 0); -static SENSOR_DEVICE_ATTR_RW(avs0_vout_min, isl68137_avs_vout_min, 0); -static SENSOR_DEVICE_ATTR_RW(avs1_vout_max, isl68137_avs_vout_max, 1); -static SENSOR_DEVICE_ATTR_RW(avs1_vout_min, isl68137_avs_vout_min, 1); - -static struct attribute *enable_attrs[] = { - &sensor_dev_attr_avs0_enable.dev_attr.attr, - &sensor_dev_attr_avs1_enable.dev_attr.attr, - NULL, -}; - -static struct attribute *avs_ctrl_attrs[] = { - &sensor_dev_attr_avs0_vout.dev_attr.attr, - &sensor_dev_attr_avs1_vout.dev_attr.attr, - &sensor_dev_attr_avs0_vout_max.dev_attr.attr, - &sensor_dev_attr_avs0_vout_min.dev_attr.attr, - &sensor_dev_attr_avs1_vout_max.dev_attr.attr, - &sensor_dev_attr_avs1_vout_min.dev_attr.attr, - NULL, -}; - -static const struct attribute_group enable_group = { - .attrs = enable_attrs, -}; - -static const struct attribute_group avs_ctrl_group = { - .attrs = avs_ctrl_attrs, -}; - -static const struct attribute_group *isl68137_attribute_groups[] = { - &enable_group, - &avs_ctrl_group, - NULL, -}; - -static int raa_dmpvr2_read_word_data(struct i2c_client *client, int page, - int phase, int reg) -{ - int ret; - - switch (reg) { - case PMBUS_VIRT_READ_VMON: - ret = wb_pmbus_read_word_data(client, page, phase, - RAA_DMPVR2_READ_VMON); - break; - default: - ret = -ENODATA; - break; - } - - return ret; -} - -static struct pmbus_driver_info raa_dmpvr_info = { - .pages = 3, - .format[PSC_VOLTAGE_IN] = direct, - .format[PSC_VOLTAGE_OUT] = direct, - .format[PSC_CURRENT_IN] = direct, - .format[PSC_CURRENT_OUT] = direct, - .format[PSC_POWER] = direct, - .format[PSC_TEMPERATURE] = direct, - .m[PSC_VOLTAGE_IN] = 1, - .b[PSC_VOLTAGE_IN] = 0, - .R[PSC_VOLTAGE_IN] = 2, - .m[PSC_VOLTAGE_OUT] = 1, - .b[PSC_VOLTAGE_OUT] = 0, - .R[PSC_VOLTAGE_OUT] = 3, - .m[PSC_CURRENT_IN] = 1, - .b[PSC_CURRENT_IN] = 0, - .R[PSC_CURRENT_IN] = 2, - .m[PSC_CURRENT_OUT] = 1, - .b[PSC_CURRENT_OUT] = 0, - .R[PSC_CURRENT_OUT] = 1, - .m[PSC_POWER] = 1, - .b[PSC_POWER] = 0, - .R[PSC_POWER] = 0, - .m[PSC_TEMPERATURE] = 1, - .b[PSC_TEMPERATURE] = 0, - .R[PSC_TEMPERATURE] = 0, - .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN - | PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 - | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP - | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT - | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT - | PMBUS_HAVE_VMON, - .func[1] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT - | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP - | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_IOUT - | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT, - .func[2] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT - | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP - | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_IOUT - | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT, -}; - -static int isl68137_probe(struct i2c_client *client) -{ - struct pmbus_driver_info *info; - - info = devm_kzalloc(&client->dev, sizeof(*info), GFP_KERNEL); - if (!info) - return -ENOMEM; - memcpy(info, &raa_dmpvr_info, sizeof(*info)); - - switch (i2c_match_id(raa_dmpvr_id, client)->driver_data) { - case raa_dmpvr1_2rail: - info->pages = 2; - info->R[PSC_VOLTAGE_IN] = 3; - info->func[0] &= ~PMBUS_HAVE_VMON; - info->func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT - | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT - | PMBUS_HAVE_POUT; - info->groups = isl68137_attribute_groups; - break; - case raa_dmpvr2_1rail: - info->pages = 1; - info->read_word_data = raa_dmpvr2_read_word_data; - break; - case raa_dmpvr2_2rail_nontc: - info->func[0] &= ~PMBUS_HAVE_TEMP3; - info->func[1] &= ~PMBUS_HAVE_TEMP3; - fallthrough; - case raa_dmpvr2_2rail: - info->pages = 2; - info->read_word_data = raa_dmpvr2_read_word_data; - break; - case raa_dmpvr2_3rail: - info->read_word_data = raa_dmpvr2_read_word_data; - break; - case raa_dmpvr2_hv: - info->pages = 1; - info->R[PSC_VOLTAGE_IN] = 1; - info->m[PSC_VOLTAGE_OUT] = 2; - info->R[PSC_VOLTAGE_OUT] = 2; - info->m[PSC_CURRENT_IN] = 2; - info->m[PSC_POWER] = 2; - info->R[PSC_POWER] = -1; - info->read_word_data = raa_dmpvr2_read_word_data; - break; - default: - return -ENODEV; - } - - return wb_pmbus_do_probe(client, info); -} - -static const struct i2c_device_id raa_dmpvr_id[] = { - {"wb_isl68127", raa_dmpvr1_2rail}, - {"wb_isl68137", raa_dmpvr1_2rail}, - {"wb_isl68220", raa_dmpvr2_2rail}, - {"wb_isl68221", raa_dmpvr2_3rail}, - {"wb_isl68222", raa_dmpvr2_2rail}, - {"wb_isl68223", raa_dmpvr2_2rail}, - {"wb_isl68224", raa_dmpvr2_3rail}, - {"wb_isl68225", raa_dmpvr2_2rail}, - {"wb_isl68226", raa_dmpvr2_3rail}, - {"wb_isl68227", raa_dmpvr2_1rail}, - {"wb_isl68229", raa_dmpvr2_3rail}, - {"wb_isl68233", raa_dmpvr2_2rail}, - {"wb_isl68239", raa_dmpvr2_3rail}, - - {"wb_isl69222", raa_dmpvr2_2rail}, - {"wb_isl69223", raa_dmpvr2_3rail}, - {"wb_isl69224", raa_dmpvr2_2rail}, - {"wb_isl69225", raa_dmpvr2_2rail}, - {"wb_isl69227", raa_dmpvr2_3rail}, - {"wb_isl69228", raa_dmpvr2_3rail}, - {"wb_isl69234", raa_dmpvr2_2rail}, - {"wb_isl69236", raa_dmpvr2_2rail}, - {"wb_isl69239", raa_dmpvr2_3rail}, - {"wb_isl69242", raa_dmpvr2_2rail}, - {"wb_isl69243", raa_dmpvr2_1rail}, - {"wb_isl69247", raa_dmpvr2_2rail}, - {"wb_isl69248", raa_dmpvr2_2rail}, - {"wb_isl69254", raa_dmpvr2_2rail}, - {"wb_isl69255", raa_dmpvr2_2rail}, - {"wb_isl69256", raa_dmpvr2_2rail}, - {"wb_isl69259", raa_dmpvr2_2rail}, - {"wb_isl69260", raa_dmpvr2_2rail}, - {"wb_isl69268", raa_dmpvr2_2rail}, - {"wb_isl69269", raa_dmpvr2_3rail}, - {"wb_isl69298", raa_dmpvr2_2rail}, - - {"wb_raa228000", raa_dmpvr2_hv}, - {"wb_raa228004", raa_dmpvr2_hv}, - {"wb_raa228006", raa_dmpvr2_hv}, - {"wb_raa228228", raa_dmpvr2_2rail_nontc}, - {"wb_raa229001", raa_dmpvr2_2rail}, - {"wb_raa229004", raa_dmpvr2_2rail}, - {} -}; - -MODULE_DEVICE_TABLE(i2c, raa_dmpvr_id); - -/* This is the driver that will be inserted */ -static struct i2c_driver isl68137_driver = { - .driver = { - .name = "wb_isl68137", - }, - .probe_new = isl68137_probe, - .remove = wb_pmbus_do_remove, - .id_table = raa_dmpvr_id, -}; - -module_i2c_driver(isl68137_driver); - -MODULE_AUTHOR("support"); -MODULE_DESCRIPTION("PMBus driver for Renesas digital multiphase voltage regulators"); -MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c deleted file mode 100644 index 0386cfb0b61d..000000000000 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c +++ /dev/null @@ -1,992 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * lm75.c - Part of lm_sensors, Linux kernel modules for hardware - * monitoring - * Copyright (c) 1998, 1999 Frodo Looijaard - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "wb_lm75.h" - -/* - * This driver handles the LM75 and compatible digital temperature sensors. - */ - -enum lm75_type { /* keep sorted in alphabetical order */ - adt75, - ds1775, - ds75, - ds7505, - g751, - lm75, - lm75a, - lm75b, - max6625, - max6626, - max31725, - mcp980x, - pct2075, - stds75, - stlm75, - tcn75, - tmp100, - tmp101, - tmp105, - tmp112, - tmp175, - tmp275, - tmp75, - tmp75b, - tmp75c, -}; - -/** - * struct lm75_params - lm75 configuration parameters. - * @set_mask: Bits to set in configuration register when configuring - * the chip. - * @clr_mask: Bits to clear in configuration register when configuring - * the chip. - * @default_resolution: Default number of bits to represent the temperature - * value. - * @resolution_limits: Limit register resolution. Optional. Should be set if - * the resolution of limit registers does not match the - * resolution of the temperature register. - * @resolutions: List of resolutions associated with sample times. - * Optional. Should be set if num_sample_times is larger - * than 1, and if the resolution changes with sample times. - * If set, number of entries must match num_sample_times. - * @default_sample_time:Sample time to be set by default. - * @num_sample_times: Number of possible sample times to be set. Optional. - * Should be set if the number of sample times is larger - * than one. - * @sample_times: All the possible sample times to be set. Mandatory if - * num_sample_times is larger than 1. If set, number of - * entries must match num_sample_times. - */ - -struct lm75_params { - u8 set_mask; - u8 clr_mask; - u8 default_resolution; - u8 resolution_limits; - const u8 *resolutions; - unsigned int default_sample_time; - u8 num_sample_times; - const unsigned int *sample_times; -}; -#if 0 -/* Addresses scanned */ -static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4b, 0x4c, - 0x4d, 0x4e, 0x4f, I2C_CLIENT_END }; -#endif -/* The LM75 registers */ -#define LM75_REG_TEMP 0x00 -#define LM75_REG_CONF 0x01 -#define LM75_REG_HYST 0x02 -#define LM75_REG_MAX 0x03 -#define PCT2075_REG_IDLE 0x04 -#define LM75_TEMP_INVALID_RETRY_TIMES (3) - -/* Each client has this additional data */ -struct lm75_data { - struct i2c_client *client; - struct regmap *regmap; - struct regulator *vs; - u8 orig_conf; - u8 current_conf; - u8 resolution; /* In bits, 9 to 16 */ - unsigned int sample_time; /* In ms */ - enum lm75_type kind; - const struct lm75_params *params; -}; - -/*-----------------------------------------------------------------------*/ - -static const u8 lm75_sample_set_masks[] = { 0 << 5, 1 << 5, 2 << 5, 3 << 5 }; - -#define LM75_SAMPLE_CLEAR_MASK (3 << 5) - -/* The structure below stores the configuration values of the supported devices. - * In case of being supported multiple configurations, the default one must - * always be the first element of the array - */ -static const struct lm75_params device_params[] = { - [adt75] = { - .clr_mask = 1 << 5, /* not one-shot mode */ - .default_resolution = 12, - .default_sample_time = MSEC_PER_SEC / 10, - }, - [ds1775] = { - .clr_mask = 3 << 5, - .set_mask = 2 << 5, /* 11-bit mode */ - .default_resolution = 11, - .default_sample_time = 500, - .num_sample_times = 4, - .sample_times = (unsigned int []){ 125, 250, 500, 1000 }, - .resolutions = (u8 []) {9, 10, 11, 12 }, - }, - [ds75] = { - .clr_mask = 3 << 5, - .set_mask = 2 << 5, /* 11-bit mode */ - .default_resolution = 11, - .default_sample_time = 600, - .num_sample_times = 4, - .sample_times = (unsigned int []){ 150, 300, 600, 1200 }, - .resolutions = (u8 []) {9, 10, 11, 12 }, - }, - [stds75] = { - .clr_mask = 3 << 5, - .set_mask = 2 << 5, /* 11-bit mode */ - .default_resolution = 11, - .default_sample_time = 600, - .num_sample_times = 4, - .sample_times = (unsigned int []){ 150, 300, 600, 1200 }, - .resolutions = (u8 []) {9, 10, 11, 12 }, - }, - [stlm75] = { - .default_resolution = 9, - .default_sample_time = MSEC_PER_SEC / 6, - }, - [ds7505] = { - .set_mask = 3 << 5, /* 12-bit mode*/ - .default_resolution = 12, - .default_sample_time = 200, - .num_sample_times = 4, - .sample_times = (unsigned int []){ 25, 50, 100, 200 }, - .resolutions = (u8 []) {9, 10, 11, 12 }, - }, - [g751] = { - .default_resolution = 9, - .default_sample_time = MSEC_PER_SEC / 10, - }, - [lm75] = { - .default_resolution = 9, - .default_sample_time = MSEC_PER_SEC / 10, - }, - [lm75a] = { - .default_resolution = 9, - .default_sample_time = MSEC_PER_SEC / 10, - }, - [lm75b] = { - .default_resolution = 11, - .default_sample_time = MSEC_PER_SEC / 10, - }, - [max6625] = { - .default_resolution = 9, - .default_sample_time = MSEC_PER_SEC / 7, - }, - [max6626] = { - .default_resolution = 12, - .default_sample_time = MSEC_PER_SEC / 7, - .resolution_limits = 9, - }, - [max31725] = { - .default_resolution = 16, - .default_sample_time = MSEC_PER_SEC / 20, - }, - [tcn75] = { - .default_resolution = 9, - .default_sample_time = MSEC_PER_SEC / 18, - }, - [pct2075] = { - .default_resolution = 11, - .default_sample_time = MSEC_PER_SEC / 10, - .num_sample_times = 31, - .sample_times = (unsigned int []){ 100, 200, 300, 400, 500, 600, - 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600, 1700, - 1800, 1900, 2000, 2100, 2200, 2300, 2400, 2500, 2600, 2700, - 2800, 2900, 3000, 3100 }, - }, - [mcp980x] = { - .set_mask = 3 << 5, /* 12-bit mode */ - .clr_mask = 1 << 7, /* not one-shot mode */ - .default_resolution = 12, - .resolution_limits = 9, - .default_sample_time = 240, - .num_sample_times = 4, - .sample_times = (unsigned int []){ 30, 60, 120, 240 }, - .resolutions = (u8 []) {9, 10, 11, 12 }, - }, - [tmp100] = { - .set_mask = 3 << 5, /* 12-bit mode */ - .clr_mask = 1 << 7, /* not one-shot mode */ - .default_resolution = 12, - .default_sample_time = 320, - .num_sample_times = 4, - .sample_times = (unsigned int []){ 40, 80, 160, 320 }, - .resolutions = (u8 []) {9, 10, 11, 12 }, - }, - [tmp101] = { - .set_mask = 3 << 5, /* 12-bit mode */ - .clr_mask = 1 << 7, /* not one-shot mode */ - .default_resolution = 12, - .default_sample_time = 320, - .num_sample_times = 4, - .sample_times = (unsigned int []){ 40, 80, 160, 320 }, - .resolutions = (u8 []) {9, 10, 11, 12 }, - }, - [tmp105] = { - .set_mask = 3 << 5, /* 12-bit mode */ - .clr_mask = 1 << 7, /* not one-shot mode*/ - .default_resolution = 12, - .default_sample_time = 220, - .num_sample_times = 4, - .sample_times = (unsigned int []){ 28, 55, 110, 220 }, - .resolutions = (u8 []) {9, 10, 11, 12 }, - }, - [tmp112] = { - .set_mask = 3 << 5, /* 8 samples / second */ - .clr_mask = 1 << 7, /* no one-shot mode*/ - .default_resolution = 12, - .default_sample_time = 125, - .num_sample_times = 4, - .sample_times = (unsigned int []){ 125, 250, 1000, 4000 }, - }, - [tmp175] = { - .set_mask = 3 << 5, /* 12-bit mode */ - .clr_mask = 1 << 7, /* not one-shot mode*/ - .default_resolution = 12, - .default_sample_time = 220, - .num_sample_times = 4, - .sample_times = (unsigned int []){ 28, 55, 110, 220 }, - .resolutions = (u8 []) {9, 10, 11, 12 }, - }, - [tmp275] = { - .set_mask = 3 << 5, /* 12-bit mode */ - .clr_mask = 1 << 7, /* not one-shot mode*/ - .default_resolution = 12, - .default_sample_time = 220, - .num_sample_times = 4, - .sample_times = (unsigned int []){ 28, 55, 110, 220 }, - .resolutions = (u8 []) {9, 10, 11, 12 }, - }, - [tmp75] = { - .set_mask = 3 << 5, /* 12-bit mode */ - .clr_mask = 1 << 7, /* not one-shot mode*/ - .default_resolution = 12, - .default_sample_time = 220, - .num_sample_times = 4, - .sample_times = (unsigned int []){ 28, 55, 110, 220 }, - .resolutions = (u8 []) {9, 10, 11, 12 }, - }, - [tmp75b] = { /* not one-shot mode, Conversion rate 37Hz */ - .clr_mask = 1 << 7 | 3 << 5, - .default_resolution = 12, - .default_sample_time = MSEC_PER_SEC / 37, - .sample_times = (unsigned int []){ MSEC_PER_SEC / 37, - MSEC_PER_SEC / 18, - MSEC_PER_SEC / 9, MSEC_PER_SEC / 4 }, - .num_sample_times = 4, - }, - [tmp75c] = { - .clr_mask = 1 << 5, /*not one-shot mode*/ - .default_resolution = 12, - .default_sample_time = MSEC_PER_SEC / 12, - } -}; - -/* input temp threshold check */ -typedef struct lm75_temp_threshold_s { - int chip_type; - int temp_max; - int temp_min; -} lm75_temp_threshold_t; - -static lm75_temp_threshold_t g_lm75_temp_threshold_info[] = { - { - .chip_type = lm75, - .temp_max = 125000, - .temp_min = -55000, - }, - { - .chip_type = tmp275, - .temp_max = 125000, - .temp_min = -40000, - }, -}; - -/*-----------------------------------------------------------------------*/ -static int lm75_input_temp_check(struct lm75_data *data, int input_val) -{ - int i, size; - - size = ARRAY_SIZE(g_lm75_temp_threshold_info); - - for (i = 0; i < size; i++) { - if (g_lm75_temp_threshold_info[i].chip_type == data->kind) { - if ((input_val > g_lm75_temp_threshold_info[i].temp_max) - || (input_val < g_lm75_temp_threshold_info[i].temp_min)) { - dev_dbg(&data->client->dev, "input temp: %d not in range[%d, %d]\n", - input_val, g_lm75_temp_threshold_info[i].temp_min, - g_lm75_temp_threshold_info[i].temp_max); - return -EINVAL; - } - dev_dbg(&data->client->dev, "input temp: %d in range[%d, %d]", input_val, - g_lm75_temp_threshold_info[i].temp_min, g_lm75_temp_threshold_info[i].temp_max); - return 0; - } - } - return 0; -} - -static inline long lm75_reg_to_mc(s16 temp, u8 resolution) -{ - return ((temp >> (16 - resolution)) * 1000) >> (resolution - 8); -} - -static int lm75_write_config(struct lm75_data *data, u8 set_mask, - u8 clr_mask) -{ - u8 value; - - clr_mask |= LM75_SHUTDOWN; - value = data->current_conf & ~clr_mask; - value |= set_mask; - - if (data->current_conf != value) { - s32 err; - - err = i2c_smbus_write_byte_data(data->client, LM75_REG_CONF, - value); - if (err) - return err; - data->current_conf = value; - } - return 0; -} - -static int lm75_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, - long *val) -{ - struct lm75_data *data = dev_get_drvdata(dev); - unsigned int regval; - int err, reg, i, ret; - - switch (type) { - case hwmon_chip: - switch (attr) { - case hwmon_chip_update_interval: - *val = data->sample_time; - break; - default: - return -EINVAL; - } - break; - case hwmon_temp: - switch (attr) { - case hwmon_temp_input: - reg = LM75_REG_TEMP; - break; - case hwmon_temp_max: - reg = LM75_REG_MAX; - break; - case hwmon_temp_max_hyst: - reg = LM75_REG_HYST; - break; - default: - return -EINVAL; - } - for (i = 0; i < LM75_TEMP_INVALID_RETRY_TIMES; i++) { - err = regmap_read(data->regmap, reg, ®val); - if (err < 0) { - return err; - } - *val = lm75_reg_to_mc(regval, data->resolution); - if (reg != LM75_REG_TEMP) { - return 0; - } - /* do input_temp_check */ - ret = lm75_input_temp_check(data, *val); - if (ret == 0) { /* input temp check ok */ - return 0; - } - if ((i + 1) < LM75_TEMP_INVALID_RETRY_TIMES) { - msleep(data->sample_time); - } - } - dev_info(&data->client->dev, "temp_input value: %ld invalid\n", *val); - return -EINVAL; - default: - return -EINVAL; - } - return 0; -} - -static int lm75_write_temp(struct device *dev, u32 attr, long temp) -{ - struct lm75_data *data = dev_get_drvdata(dev); - u8 resolution; - int reg; - - switch (attr) { - case hwmon_temp_max: - reg = LM75_REG_MAX; - break; - case hwmon_temp_max_hyst: - reg = LM75_REG_HYST; - break; - default: - return -EINVAL; - } - - /* - * Resolution of limit registers is assumed to be the same as the - * temperature input register resolution unless given explicitly. - */ - if (data->params->resolution_limits) - resolution = data->params->resolution_limits; - else - resolution = data->resolution; - - temp = clamp_val(temp, LM75_TEMP_MIN, LM75_TEMP_MAX); - temp = DIV_ROUND_CLOSEST(temp << (resolution - 8), - 1000) << (16 - resolution); - - return regmap_write(data->regmap, reg, (u16)temp); -} - -static int lm75_update_interval(struct device *dev, long val) -{ - struct lm75_data *data = dev_get_drvdata(dev); - unsigned int reg; - u8 index; - s32 err; - - index = find_closest(val, data->params->sample_times, - (int)data->params->num_sample_times); - - switch (data->kind) { - default: - err = lm75_write_config(data, lm75_sample_set_masks[index], - LM75_SAMPLE_CLEAR_MASK); - if (err) - return err; - - data->sample_time = data->params->sample_times[index]; - if (data->params->resolutions) - data->resolution = data->params->resolutions[index]; - break; - case tmp112: - err = regmap_read(data->regmap, LM75_REG_CONF, ®); - if (err < 0) - return err; - reg &= ~0x00c0; - reg |= (3 - index) << 6; - err = regmap_write(data->regmap, LM75_REG_CONF, reg); - if (err < 0) - return err; - data->sample_time = data->params->sample_times[index]; - break; - case pct2075: - err = i2c_smbus_write_byte_data(data->client, PCT2075_REG_IDLE, - index + 1); - if (err) - return err; - data->sample_time = data->params->sample_times[index]; - break; - } - return 0; -} - -static int lm75_write_chip(struct device *dev, u32 attr, long val) -{ - switch (attr) { - case hwmon_chip_update_interval: - return lm75_update_interval(dev, val); - default: - return -EINVAL; - } - return 0; -} - -static int lm75_write(struct device *dev, enum hwmon_sensor_types type, - u32 attr, int channel, long val) -{ - switch (type) { - case hwmon_chip: - return lm75_write_chip(dev, attr, val); - case hwmon_temp: - return lm75_write_temp(dev, attr, val); - default: - return -EINVAL; - } - return 0; -} - -static umode_t lm75_is_visible(const void *data, enum hwmon_sensor_types type, - u32 attr, int channel) -{ - const struct lm75_data *config_data = data; - - switch (type) { - case hwmon_chip: - switch (attr) { - case hwmon_chip_update_interval: - if (config_data->params->num_sample_times > 1) - return 0644; - return 0444; - } - break; - case hwmon_temp: - switch (attr) { - case hwmon_temp_input: - return 0444; - case hwmon_temp_max: - case hwmon_temp_max_hyst: - return 0644; - } - break; - default: - break; - } - return 0; -} - -static const struct hwmon_channel_info *lm75_info[] = { - HWMON_CHANNEL_INFO(chip, - HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL), - HWMON_CHANNEL_INFO(temp, - HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST), - NULL -}; - -static const struct hwmon_ops lm75_hwmon_ops = { - .is_visible = lm75_is_visible, - .read = lm75_read, - .write = lm75_write, -}; - -static const struct hwmon_chip_info lm75_chip_info = { - .ops = &lm75_hwmon_ops, - .info = lm75_info, -}; - -static bool lm75_is_writeable_reg(struct device *dev, unsigned int reg) -{ - return reg != LM75_REG_TEMP; -} - -static bool lm75_is_volatile_reg(struct device *dev, unsigned int reg) -{ - return reg == LM75_REG_TEMP || reg == LM75_REG_CONF; -} - -static const struct regmap_config lm75_regmap_config = { - .reg_bits = 8, - .val_bits = 16, - .max_register = PCT2075_REG_IDLE, - .writeable_reg = lm75_is_writeable_reg, - .volatile_reg = lm75_is_volatile_reg, - .val_format_endian = REGMAP_ENDIAN_BIG, - .cache_type = REGCACHE_RBTREE, - .use_single_read = true, - .use_single_write = true, -}; - -static void lm75_disable_regulator(void *data) -{ - struct lm75_data *lm75 = data; - - regulator_disable(lm75->vs); -} - -static void lm75_remove(void *data) -{ - struct lm75_data *lm75 = data; - struct i2c_client *client = lm75->client; - - i2c_smbus_write_byte_data(client, LM75_REG_CONF, lm75->orig_conf); -} - -static const struct i2c_device_id lm75_ids[]; - -static int lm75_probe(struct i2c_client *client) -{ - struct device *dev = &client->dev; - struct device *hwmon_dev; - struct lm75_data *data; - int status, err; - enum lm75_type kind; - - if (client->dev.of_node) - kind = (enum lm75_type)of_device_get_match_data(&client->dev); - else - kind = i2c_match_id(lm75_ids, client)->driver_data; - - if (!i2c_check_functionality(client->adapter, - I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) - return -EIO; - - data = devm_kzalloc(dev, sizeof(struct lm75_data), GFP_KERNEL); - if (!data) - return -ENOMEM; - - data->client = client; - data->kind = kind; - - data->vs = devm_regulator_get(dev, "vs"); - if (IS_ERR(data->vs)) - return PTR_ERR(data->vs); - - data->regmap = devm_regmap_init_i2c(client, &lm75_regmap_config); - if (IS_ERR(data->regmap)) - return PTR_ERR(data->regmap); - - /* Set to LM75 resolution (9 bits, 1/2 degree C) and range. - * Then tweak to be more precise when appropriate. - */ - - data->params = &device_params[data->kind]; - - /* Save default sample time and resolution*/ - data->sample_time = data->params->default_sample_time; - data->resolution = data->params->default_resolution; - - /* Enable the power */ - err = regulator_enable(data->vs); - if (err) { - dev_err(dev, "failed to enable regulator: %d\n", err); - return err; - } - - err = devm_add_action_or_reset(dev, lm75_disable_regulator, data); - if (err) - return err; - - /* Cache original configuration */ - status = i2c_smbus_read_byte_data(client, LM75_REG_CONF); - if (status < 0) { - dev_dbg(dev, "Can't read config? %d\n", status); - return status; - } - data->orig_conf = status; - data->current_conf = status; - - err = lm75_write_config(data, data->params->set_mask, - data->params->clr_mask); - if (err) - return err; - - err = devm_add_action_or_reset(dev, lm75_remove, data); - if (err) - return err; - - hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, - data, &lm75_chip_info, - NULL); - if (IS_ERR(hwmon_dev)) - return PTR_ERR(hwmon_dev); - - dev_info(dev, "%s: sensor '%s'\n", dev_name(hwmon_dev), client->name); - - return 0; -} - -static const struct i2c_device_id lm75_ids[] = { - { "wb_adt75", adt75, }, - { "wb_ds1775", ds1775, }, - { "wb_ds75", ds75, }, - { "wb_ds7505", ds7505, }, - { "wb_g751", g751, }, - { "wb_lm75", lm75, }, - { "wb_lm75a", lm75a, }, - { "wb_lm75b", lm75b, }, - { "wb_max6625", max6625, }, - { "wb_max6626", max6626, }, - { "wb_max31725", max31725, }, - { "wb_max31726", max31725, }, - { "wb_mcp980x", mcp980x, }, - { "wb_pct2075", pct2075, }, - { "wb_stds75", stds75, }, - { "wb_stlm75", stlm75, }, - { "wb_tcn75", tcn75, }, - { "wb_tmp100", tmp100, }, - { "wb_tmp101", tmp101, }, - { "wb_tmp105", tmp105, }, - { "wb_tmp112", tmp112, }, - { "wb_tmp175", tmp175, }, - { "wb_tmp275", tmp275, }, - { "wb_tmp75", tmp75, }, - { "wb_tmp75b", tmp75b, }, - { "wb_tmp75c", tmp75c, }, - { /* LIST END */ } -}; -MODULE_DEVICE_TABLE(i2c, lm75_ids); - -static const struct of_device_id __maybe_unused lm75_of_match[] = { - { - .compatible = "adi,adt75", - .data = (void *)adt75 - }, - { - .compatible = "dallas,ds1775", - .data = (void *)ds1775 - }, - { - .compatible = "dallas,ds75", - .data = (void *)ds75 - }, - { - .compatible = "dallas,ds7505", - .data = (void *)ds7505 - }, - { - .compatible = "gmt,g751", - .data = (void *)g751 - }, - { - .compatible = "national,lm75", - .data = (void *)lm75 - }, - { - .compatible = "national,lm75a", - .data = (void *)lm75a - }, - { - .compatible = "national,lm75b", - .data = (void *)lm75b - }, - { - .compatible = "maxim,max6625", - .data = (void *)max6625 - }, - { - .compatible = "maxim,max6626", - .data = (void *)max6626 - }, - { - .compatible = "maxim,max31725", - .data = (void *)max31725 - }, - { - .compatible = "maxim,max31726", - .data = (void *)max31725 - }, - { - .compatible = "maxim,mcp980x", - .data = (void *)mcp980x - }, - { - .compatible = "nxp,pct2075", - .data = (void *)pct2075 - }, - { - .compatible = "st,stds75", - .data = (void *)stds75 - }, - { - .compatible = "st,stlm75", - .data = (void *)stlm75 - }, - { - .compatible = "microchip,tcn75", - .data = (void *)tcn75 - }, - { - .compatible = "ti,tmp100", - .data = (void *)tmp100 - }, - { - .compatible = "ti,tmp101", - .data = (void *)tmp101 - }, - { - .compatible = "ti,tmp105", - .data = (void *)tmp105 - }, - { - .compatible = "ti,tmp112", - .data = (void *)tmp112 - }, - { - .compatible = "ti,tmp175", - .data = (void *)tmp175 - }, - { - .compatible = "ti,tmp275", - .data = (void *)tmp275 - }, - { - .compatible = "ti,tmp75", - .data = (void *)tmp75 - }, - { - .compatible = "ti,tmp75b", - .data = (void *)tmp75b - }, - { - .compatible = "ti,tmp75c", - .data = (void *)tmp75c - }, - { }, -}; -MODULE_DEVICE_TABLE(of, lm75_of_match); - -#define LM75A_ID 0xA1 -#if 0 -/* Return 0 if detection is successful, -ENODEV otherwise */ -static int lm75_detect(struct i2c_client *new_client, - struct i2c_board_info *info) -{ - struct i2c_adapter *adapter = new_client->adapter; - int i; - int conf, hyst, os; - bool is_lm75a = 0; - - if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | - I2C_FUNC_SMBUS_WORD_DATA)) - return -ENODEV; - - /* - * Now, we do the remaining detection. There is no identification- - * dedicated register so we have to rely on several tricks: - * unused bits, registers cycling over 8-address boundaries, - * addresses 0x04-0x07 returning the last read value. - * The cycling+unused addresses combination is not tested, - * since it would significantly slow the detection down and would - * hardly add any value. - * - * The National Semiconductor LM75A is different than earlier - * LM75s. It has an ID byte of 0xaX (where X is the chip - * revision, with 1 being the only revision in existence) in - * register 7, and unused registers return 0xff rather than the - * last read value. - * - * Note that this function only detects the original National - * Semiconductor LM75 and the LM75A. Clones from other vendors - * aren't detected, on purpose, because they are typically never - * found on PC hardware. They are found on embedded designs where - * they can be instantiated explicitly so detection is not needed. - * The absence of identification registers on all these clones - * would make their exhaustive detection very difficult and weak, - * and odds are that the driver would bind to unsupported devices. - */ - - /* Unused bits */ - conf = i2c_smbus_read_byte_data(new_client, 1); - if (conf & 0xe0) - return -ENODEV; - - /* First check for LM75A */ - if (i2c_smbus_read_byte_data(new_client, 7) == LM75A_ID) { - /* - * LM75A returns 0xff on unused registers so - * just to be sure we check for that too. - */ - if (i2c_smbus_read_byte_data(new_client, 4) != 0xff - || i2c_smbus_read_byte_data(new_client, 5) != 0xff - || i2c_smbus_read_byte_data(new_client, 6) != 0xff) - return -ENODEV; - is_lm75a = 1; - hyst = i2c_smbus_read_byte_data(new_client, 2); - os = i2c_smbus_read_byte_data(new_client, 3); - } else { /* Traditional style LM75 detection */ - /* Unused addresses */ - hyst = i2c_smbus_read_byte_data(new_client, 2); - if (i2c_smbus_read_byte_data(new_client, 4) != hyst - || i2c_smbus_read_byte_data(new_client, 5) != hyst - || i2c_smbus_read_byte_data(new_client, 6) != hyst - || i2c_smbus_read_byte_data(new_client, 7) != hyst) - return -ENODEV; - os = i2c_smbus_read_byte_data(new_client, 3); - if (i2c_smbus_read_byte_data(new_client, 4) != os - || i2c_smbus_read_byte_data(new_client, 5) != os - || i2c_smbus_read_byte_data(new_client, 6) != os - || i2c_smbus_read_byte_data(new_client, 7) != os) - return -ENODEV; - } - /* - * It is very unlikely that this is a LM75 if both - * hysteresis and temperature limit registers are 0. - */ - if (hyst == 0 && os == 0) - return -ENODEV; - - /* Addresses cycling */ - for (i = 8; i <= 248; i += 40) { - if (i2c_smbus_read_byte_data(new_client, i + 1) != conf - || i2c_smbus_read_byte_data(new_client, i + 2) != hyst - || i2c_smbus_read_byte_data(new_client, i + 3) != os) - return -ENODEV; - if (is_lm75a && i2c_smbus_read_byte_data(new_client, i + 7) - != LM75A_ID) - return -ENODEV; - } - - strlcpy(info->type, is_lm75a ? "lm75a" : "lm75", I2C_NAME_SIZE); - - return 0; -} -#endif - -#ifdef CONFIG_PM -static int lm75_suspend(struct device *dev) -{ - int status; - struct i2c_client *client = to_i2c_client(dev); - - status = i2c_smbus_read_byte_data(client, LM75_REG_CONF); - if (status < 0) { - dev_dbg(&client->dev, "Can't read config? %d\n", status); - return status; - } - status = status | LM75_SHUTDOWN; - i2c_smbus_write_byte_data(client, LM75_REG_CONF, status); - return 0; -} - -static int lm75_resume(struct device *dev) -{ - int status; - struct i2c_client *client = to_i2c_client(dev); - - status = i2c_smbus_read_byte_data(client, LM75_REG_CONF); - if (status < 0) { - dev_dbg(&client->dev, "Can't read config? %d\n", status); - return status; - } - status = status & ~LM75_SHUTDOWN; - i2c_smbus_write_byte_data(client, LM75_REG_CONF, status); - return 0; -} - -static const struct dev_pm_ops lm75_dev_pm_ops = { - .suspend = lm75_suspend, - .resume = lm75_resume, -}; -#define LM75_DEV_PM_OPS (&lm75_dev_pm_ops) -#else -#define LM75_DEV_PM_OPS NULL -#endif /* CONFIG_PM */ - -static struct i2c_driver lm75_driver = { - .class = I2C_CLASS_HWMON, - .driver = { - .name = "wb_lm75", - .of_match_table = of_match_ptr(lm75_of_match), - .pm = LM75_DEV_PM_OPS, - }, - .probe_new = lm75_probe, - .id_table = lm75_ids, - /* .detect = lm75_detect, */ - /* .address_list = normal_i2c, */ -}; - -module_i2c_driver(lm75_driver); - -MODULE_AUTHOR("support"); -MODULE_DESCRIPTION("LM75 driver"); -MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h deleted file mode 100644 index a398171162a8..000000000000 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h +++ /dev/null @@ -1,40 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * lm75.h - Part of lm_sensors, Linux kernel modules for hardware monitoring - * Copyright (c) 2003 Mark M. Hoffman - */ - -/* - * This file contains common code for encoding/decoding LM75 type - * temperature readings, which are emulated by many of the chips - * we support. As the user is unlikely to load more than one driver - * which contains this code, we don't worry about the wasted space. - */ - -#include - -/* straight from the datasheet */ -#define LM75_TEMP_MIN (-55000) -#define LM75_TEMP_MAX 125000 -#define LM75_SHUTDOWN 0x01 - -/* - * TEMP: 0.001C/bit (-55C to +125C) - * REG: (0.5C/bit, two's complement) << 7 - */ -static inline u16 LM75_TEMP_TO_REG(long temp) -{ - int ntemp = clamp_val(temp, LM75_TEMP_MIN, LM75_TEMP_MAX); - - ntemp += (ntemp < 0 ? -250 : 250); - return (u16)((ntemp / 500) << 7); -} - -static inline int LM75_TEMP_FROM_REG(u16 reg) -{ - /* - * use integer division instead of equivalent right shift to - * guarantee arithmetic shift and preserve the sign - */ - return ((s16)reg / 128) * 500; -} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h deleted file mode 100644 index 781f2ee07198..000000000000 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h +++ /dev/null @@ -1,535 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * wb_pmbus.h - Common defines and structures for PMBus devices - * - * Copyright (c) 2010, 2011 Ericsson AB. - * Copyright (c) 2012 Guenter Roeck - */ - -#ifndef WB_PMBUS_H -#define WB_PMBUS_H - -#include -#include -#include - -#define mem_clear(data, size) memset((data), 0, (size)) - -/* - * Registers - */ -enum pmbus_regs { - PMBUS_PAGE = 0x00, - PMBUS_OPERATION = 0x01, - PMBUS_ON_OFF_CONFIG = 0x02, - PMBUS_CLEAR_FAULTS = 0x03, - PMBUS_PHASE = 0x04, - - PMBUS_WRITE_PROTECT = 0x10, - - PMBUS_CAPABILITY = 0x19, - PMBUS_QUERY = 0x1A, - - PMBUS_VOUT_MODE = 0x20, - PMBUS_VOUT_COMMAND = 0x21, - PMBUS_VOUT_TRIM = 0x22, - PMBUS_VOUT_CAL_OFFSET = 0x23, - PMBUS_VOUT_MAX = 0x24, - PMBUS_VOUT_MARGIN_HIGH = 0x25, - PMBUS_VOUT_MARGIN_LOW = 0x26, - PMBUS_VOUT_TRANSITION_RATE = 0x27, - PMBUS_VOUT_DROOP = 0x28, - PMBUS_VOUT_SCALE_LOOP = 0x29, - PMBUS_VOUT_SCALE_MONITOR = 0x2A, - - PMBUS_COEFFICIENTS = 0x30, - PMBUS_POUT_MAX = 0x31, - - PMBUS_FAN_CONFIG_12 = 0x3A, - PMBUS_FAN_COMMAND_1 = 0x3B, - PMBUS_FAN_COMMAND_2 = 0x3C, - PMBUS_FAN_CONFIG_34 = 0x3D, - PMBUS_FAN_COMMAND_3 = 0x3E, - PMBUS_FAN_COMMAND_4 = 0x3F, - - PMBUS_VOUT_OV_FAULT_LIMIT = 0x40, - PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41, - PMBUS_VOUT_OV_WARN_LIMIT = 0x42, - PMBUS_VOUT_UV_WARN_LIMIT = 0x43, - PMBUS_VOUT_UV_FAULT_LIMIT = 0x44, - PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45, - PMBUS_IOUT_OC_FAULT_LIMIT = 0x46, - PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47, - PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48, - PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49, - PMBUS_IOUT_OC_WARN_LIMIT = 0x4A, - PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B, - PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C, - - PMBUS_OT_FAULT_LIMIT = 0x4F, - PMBUS_OT_FAULT_RESPONSE = 0x50, - PMBUS_OT_WARN_LIMIT = 0x51, - PMBUS_UT_WARN_LIMIT = 0x52, - PMBUS_UT_FAULT_LIMIT = 0x53, - PMBUS_UT_FAULT_RESPONSE = 0x54, - PMBUS_VIN_OV_FAULT_LIMIT = 0x55, - PMBUS_VIN_OV_FAULT_RESPONSE = 0x56, - PMBUS_VIN_OV_WARN_LIMIT = 0x57, - PMBUS_VIN_UV_WARN_LIMIT = 0x58, - PMBUS_VIN_UV_FAULT_LIMIT = 0x59, - - PMBUS_IIN_OC_FAULT_LIMIT = 0x5B, - PMBUS_IIN_OC_WARN_LIMIT = 0x5D, - - PMBUS_POUT_OP_FAULT_LIMIT = 0x68, - PMBUS_POUT_OP_WARN_LIMIT = 0x6A, - PMBUS_PIN_OP_WARN_LIMIT = 0x6B, - - PMBUS_STATUS_BYTE = 0x78, - PMBUS_STATUS_WORD = 0x79, - PMBUS_STATUS_VOUT = 0x7A, - PMBUS_STATUS_IOUT = 0x7B, - PMBUS_STATUS_INPUT = 0x7C, - PMBUS_STATUS_TEMPERATURE = 0x7D, - PMBUS_STATUS_CML = 0x7E, - PMBUS_STATUS_OTHER = 0x7F, - PMBUS_STATUS_MFR_SPECIFIC = 0x80, - PMBUS_STATUS_FAN_12 = 0x81, - PMBUS_STATUS_FAN_34 = 0x82, - - PMBUS_READ_VIN = 0x88, - PMBUS_READ_IIN = 0x89, - PMBUS_READ_VCAP = 0x8A, - PMBUS_READ_VOUT = 0x8B, - PMBUS_READ_IOUT = 0x8C, - PMBUS_READ_TEMPERATURE_1 = 0x8D, - PMBUS_READ_TEMPERATURE_2 = 0x8E, - PMBUS_READ_TEMPERATURE_3 = 0x8F, - PMBUS_READ_FAN_SPEED_1 = 0x90, - PMBUS_READ_FAN_SPEED_2 = 0x91, - PMBUS_READ_FAN_SPEED_3 = 0x92, - PMBUS_READ_FAN_SPEED_4 = 0x93, - PMBUS_READ_DUTY_CYCLE = 0x94, - PMBUS_READ_FREQUENCY = 0x95, - PMBUS_READ_POUT = 0x96, - PMBUS_READ_PIN = 0x97, - - PMBUS_REVISION = 0x98, - PMBUS_MFR_ID = 0x99, - PMBUS_MFR_MODEL = 0x9A, - PMBUS_MFR_REVISION = 0x9B, - PMBUS_MFR_LOCATION = 0x9C, - PMBUS_MFR_DATE = 0x9D, - PMBUS_MFR_SERIAL = 0x9E, - - PMBUS_MFR_VIN_MIN = 0xA0, - PMBUS_MFR_VIN_MAX = 0xA1, - PMBUS_MFR_IIN_MAX = 0xA2, - PMBUS_MFR_PIN_MAX = 0xA3, - PMBUS_MFR_VOUT_MIN = 0xA4, - PMBUS_MFR_VOUT_MAX = 0xA5, - PMBUS_MFR_IOUT_MAX = 0xA6, - PMBUS_MFR_POUT_MAX = 0xA7, - - PMBUS_IC_DEVICE_ID = 0xAD, - PMBUS_IC_DEVICE_REV = 0xAE, - - PMBUS_MFR_MAX_TEMP_1 = 0xC0, - PMBUS_MFR_MAX_TEMP_2 = 0xC1, - PMBUS_MFR_MAX_TEMP_3 = 0xC2, - -/* - * Virtual registers. - * Useful to support attributes which are not supported by standard PMBus - * registers but exist as manufacturer specific registers on individual chips. - * Must be mapped to real registers in device specific code. - * - * Semantics: - * Virtual registers are all word size. - * READ registers are read-only; writes are either ignored or return an error. - * RESET registers are read/write. Reading reset registers returns zero - * (used for detection), writing any value causes the associated history to be - * reset. - * Virtual registers have to be handled in device specific driver code. Chip - * driver code returns non-negative register values if a virtual register is - * supported, or a negative error code if not. The chip driver may return - * -ENODATA or any other error code in this case, though an error code other - * than -ENODATA is handled more efficiently and thus preferred. Either case, - * the calling PMBus core code will abort if the chip driver returns an error - * code when reading or writing virtual registers. - */ - PMBUS_VIRT_BASE = 0x100, - PMBUS_VIRT_READ_TEMP_AVG, - PMBUS_VIRT_READ_TEMP_MIN, - PMBUS_VIRT_READ_TEMP_MAX, - PMBUS_VIRT_RESET_TEMP_HISTORY, - PMBUS_VIRT_READ_VIN_AVG, - PMBUS_VIRT_READ_VIN_MIN, - PMBUS_VIRT_READ_VIN_MAX, - PMBUS_VIRT_RESET_VIN_HISTORY, - PMBUS_VIRT_READ_IIN_AVG, - PMBUS_VIRT_READ_IIN_MIN, - PMBUS_VIRT_READ_IIN_MAX, - PMBUS_VIRT_RESET_IIN_HISTORY, - PMBUS_VIRT_READ_PIN_AVG, - PMBUS_VIRT_READ_PIN_MIN, - PMBUS_VIRT_READ_PIN_MAX, - PMBUS_VIRT_RESET_PIN_HISTORY, - PMBUS_VIRT_READ_POUT_AVG, - PMBUS_VIRT_READ_POUT_MIN, - PMBUS_VIRT_READ_POUT_MAX, - PMBUS_VIRT_RESET_POUT_HISTORY, - PMBUS_VIRT_READ_VOUT_AVG, - PMBUS_VIRT_READ_VOUT_MIN, - PMBUS_VIRT_READ_VOUT_MAX, - PMBUS_VIRT_RESET_VOUT_HISTORY, - PMBUS_VIRT_READ_IOUT_AVG, - PMBUS_VIRT_READ_IOUT_MIN, - PMBUS_VIRT_READ_IOUT_MAX, - PMBUS_VIRT_RESET_IOUT_HISTORY, - PMBUS_VIRT_READ_TEMP2_AVG, - PMBUS_VIRT_READ_TEMP2_MIN, - PMBUS_VIRT_READ_TEMP2_MAX, - PMBUS_VIRT_RESET_TEMP2_HISTORY, - - PMBUS_VIRT_READ_VMON, - PMBUS_VIRT_VMON_UV_WARN_LIMIT, - PMBUS_VIRT_VMON_OV_WARN_LIMIT, - PMBUS_VIRT_VMON_UV_FAULT_LIMIT, - PMBUS_VIRT_VMON_OV_FAULT_LIMIT, - PMBUS_VIRT_STATUS_VMON, - - /* - * RPM and PWM Fan control - * - * Drivers wanting to expose PWM control must define the behaviour of - * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the - * {read,write}_word_data callback. - * - * pmbus core provides a default implementation for - * PMBUS_VIRT_FAN_TARGET_[1-4]. - * - * TARGET, PWM and PWM_ENABLE members must be defined sequentially; - * pmbus core uses the difference between the provided register and - * it's _1 counterpart to calculate the FAN/PWM ID. - */ - PMBUS_VIRT_FAN_TARGET_1, - PMBUS_VIRT_FAN_TARGET_2, - PMBUS_VIRT_FAN_TARGET_3, - PMBUS_VIRT_FAN_TARGET_4, - PMBUS_VIRT_PWM_1, - PMBUS_VIRT_PWM_2, - PMBUS_VIRT_PWM_3, - PMBUS_VIRT_PWM_4, - PMBUS_VIRT_PWM_ENABLE_1, - PMBUS_VIRT_PWM_ENABLE_2, - PMBUS_VIRT_PWM_ENABLE_3, - PMBUS_VIRT_PWM_ENABLE_4, - - /* Samples for average - * - * Drivers wanting to expose functionality for changing the number of - * samples used for average values should implement support in - * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it - * applies to all types of measurements, or any number of specific - * PMBUS_VIRT_*_SAMPLES registers to allow for individual control. - */ - PMBUS_VIRT_SAMPLES, - PMBUS_VIRT_IN_SAMPLES, - PMBUS_VIRT_CURR_SAMPLES, - PMBUS_VIRT_POWER_SAMPLES, - PMBUS_VIRT_TEMP_SAMPLES, -}; - -/* - * OPERATION - */ -#define PB_OPERATION_CONTROL_ON BIT(7) - -/* - * WRITE_PROTECT - */ -#define PB_WP_ALL BIT(7) /* all but WRITE_PROTECT */ -#define PB_WP_OP BIT(6) /* all but WP, OPERATION, PAGE */ -#define PB_WP_VOUT BIT(5) /* all but WP, OPERATION, PAGE, VOUT, ON_OFF */ - -#define PB_WP_ANY (PB_WP_ALL | PB_WP_OP | PB_WP_VOUT) - -/* - * CAPABILITY - */ -#define PB_CAPABILITY_SMBALERT BIT(4) -#define PB_CAPABILITY_ERROR_CHECK BIT(7) - -/* - * VOUT_MODE - */ -#define PB_VOUT_MODE_MODE_MASK 0xe0 -#define PB_VOUT_MODE_PARAM_MASK 0x1f - -#define PB_VOUT_MODE_LINEAR 0x00 -#define PB_VOUT_MODE_VID 0x20 -#define PB_VOUT_MODE_DIRECT 0x40 - -/* - * Fan configuration - */ -#define PB_FAN_2_PULSE_MASK (BIT(0) | BIT(1)) -#define PB_FAN_2_RPM BIT(2) -#define PB_FAN_2_INSTALLED BIT(3) -#define PB_FAN_1_PULSE_MASK (BIT(4) | BIT(5)) -#define PB_FAN_1_RPM BIT(6) -#define PB_FAN_1_INSTALLED BIT(7) - -enum pmbus_fan_mode { percent = 0, rpm }; - -/* - * STATUS_BYTE, STATUS_WORD (lower) - */ -#define PB_STATUS_NONE_ABOVE BIT(0) -#define PB_STATUS_CML BIT(1) -#define PB_STATUS_TEMPERATURE BIT(2) -#define PB_STATUS_VIN_UV BIT(3) -#define PB_STATUS_IOUT_OC BIT(4) -#define PB_STATUS_VOUT_OV BIT(5) -#define PB_STATUS_OFF BIT(6) -#define PB_STATUS_BUSY BIT(7) - -/* - * STATUS_WORD (upper) - */ -#define PB_STATUS_UNKNOWN BIT(8) -#define PB_STATUS_OTHER BIT(9) -#define PB_STATUS_FANS BIT(10) -#define PB_STATUS_POWER_GOOD_N BIT(11) -#define PB_STATUS_WORD_MFR BIT(12) -#define PB_STATUS_INPUT BIT(13) -#define PB_STATUS_IOUT_POUT BIT(14) -#define PB_STATUS_VOUT BIT(15) - -/* - * STATUS_IOUT - */ -#define PB_POUT_OP_WARNING BIT(0) -#define PB_POUT_OP_FAULT BIT(1) -#define PB_POWER_LIMITING BIT(2) -#define PB_CURRENT_SHARE_FAULT BIT(3) -#define PB_IOUT_UC_FAULT BIT(4) -#define PB_IOUT_OC_WARNING BIT(5) -#define PB_IOUT_OC_LV_FAULT BIT(6) -#define PB_IOUT_OC_FAULT BIT(7) - -/* - * STATUS_VOUT, STATUS_INPUT - */ -#define PB_VOLTAGE_UV_FAULT BIT(4) -#define PB_VOLTAGE_UV_WARNING BIT(5) -#define PB_VOLTAGE_OV_WARNING BIT(6) -#define PB_VOLTAGE_OV_FAULT BIT(7) - -/* - * STATUS_INPUT - */ -#define PB_PIN_OP_WARNING BIT(0) -#define PB_IIN_OC_WARNING BIT(1) -#define PB_IIN_OC_FAULT BIT(2) - -/* - * STATUS_TEMPERATURE - */ -#define PB_TEMP_UT_FAULT BIT(4) -#define PB_TEMP_UT_WARNING BIT(5) -#define PB_TEMP_OT_WARNING BIT(6) -#define PB_TEMP_OT_FAULT BIT(7) - -/* - * STATUS_FAN - */ -#define PB_FAN_AIRFLOW_WARNING BIT(0) -#define PB_FAN_AIRFLOW_FAULT BIT(1) -#define PB_FAN_FAN2_SPEED_OVERRIDE BIT(2) -#define PB_FAN_FAN1_SPEED_OVERRIDE BIT(3) -#define PB_FAN_FAN2_WARNING BIT(4) -#define PB_FAN_FAN1_WARNING BIT(5) -#define PB_FAN_FAN2_FAULT BIT(6) -#define PB_FAN_FAN1_FAULT BIT(7) - -/* - * CML_FAULT_STATUS - */ -#define PB_CML_FAULT_OTHER_MEM_LOGIC BIT(0) -#define PB_CML_FAULT_OTHER_COMM BIT(1) -#define PB_CML_FAULT_PROCESSOR BIT(3) -#define PB_CML_FAULT_MEMORY BIT(4) -#define PB_CML_FAULT_PACKET_ERROR BIT(5) -#define PB_CML_FAULT_INVALID_DATA BIT(6) -#define PB_CML_FAULT_INVALID_COMMAND BIT(7) - -enum pmbus_sensor_classes { - PSC_VOLTAGE_IN = 0, - PSC_VOLTAGE_OUT, - PSC_CURRENT_IN, - PSC_CURRENT_OUT, - PSC_POWER, - PSC_TEMPERATURE, - PSC_FAN, - PSC_PWM, - PSC_NUM_CLASSES /* Number of power sensor classes */ -}; - -#define PMBUS_PAGES 32 /* Per PMBus specification */ -#define PMBUS_PHASES 8 /* Maximum number of phases per page */ - -/* Functionality bit mask */ -#define PMBUS_HAVE_VIN BIT(0) -#define PMBUS_HAVE_VCAP BIT(1) -#define PMBUS_HAVE_VOUT BIT(2) -#define PMBUS_HAVE_IIN BIT(3) -#define PMBUS_HAVE_IOUT BIT(4) -#define PMBUS_HAVE_PIN BIT(5) -#define PMBUS_HAVE_POUT BIT(6) -#define PMBUS_HAVE_FAN12 BIT(7) -#define PMBUS_HAVE_FAN34 BIT(8) -#define PMBUS_HAVE_TEMP BIT(9) -#define PMBUS_HAVE_TEMP2 BIT(10) -#define PMBUS_HAVE_TEMP3 BIT(11) -#define PMBUS_HAVE_STATUS_VOUT BIT(12) -#define PMBUS_HAVE_STATUS_IOUT BIT(13) -#define PMBUS_HAVE_STATUS_INPUT BIT(14) -#define PMBUS_HAVE_STATUS_TEMP BIT(15) -#define PMBUS_HAVE_STATUS_FAN12 BIT(16) -#define PMBUS_HAVE_STATUS_FAN34 BIT(17) -#define PMBUS_HAVE_VMON BIT(18) -#define PMBUS_HAVE_STATUS_VMON BIT(19) -#define PMBUS_HAVE_PWM12 BIT(20) -#define PMBUS_HAVE_PWM34 BIT(21) -#define PMBUS_HAVE_SAMPLES BIT(22) - -#define PMBUS_PHASE_VIRTUAL BIT(30) /* Phases on this page are virtual */ -#define PMBUS_PAGE_VIRTUAL BIT(31) /* Page is virtual */ - -enum pmbus_data_format { linear = 0, direct, vid }; -enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv }; - -struct pmbus_driver_info { - int pages; /* Total number of pages */ - u8 phases[PMBUS_PAGES]; /* Number of phases per page */ - enum pmbus_data_format format[PSC_NUM_CLASSES]; - enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */ - /* - * Support one set of coefficients for each sensor type - * Used for chips providing data in direct mode. - */ - int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ - int b[PSC_NUM_CLASSES]; /* offset */ - int R[PSC_NUM_CLASSES]; /* exponent */ - - u32 func[PMBUS_PAGES]; /* Functionality, per page */ - u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */ - /* - * The following functions map manufacturing specific register values - * to PMBus standard register values. Specify only if mapping is - * necessary. - * Functions return the register value (read) or zero (write) if - * successful. A return value of -ENODATA indicates that there is no - * manufacturer specific register, but that a standard PMBus register - * may exist. Any other negative return value indicates that the - * register does not exist, and that no attempt should be made to read - * the standard register. - */ - int (*read_byte_data)(struct i2c_client *client, int page, int reg); - int (*read_word_data)(struct i2c_client *client, int page, int phase, - int reg); - int (*write_word_data)(struct i2c_client *client, int page, int reg, - u16 word); - int (*write_byte)(struct i2c_client *client, int page, u8 value); - /* - * The identify function determines supported PMBus functionality. - * This function is only necessary if a chip driver supports multiple - * chips, and the chip functionality is not pre-determined. - */ - int (*identify)(struct i2c_client *client, - struct pmbus_driver_info *info); - - /* Regulator functionality, if supported by this chip driver. */ - int num_regulators; - const struct regulator_desc *reg_desc; - - /* custom attributes */ - const struct attribute_group **groups; -}; - -/* Regulator ops */ - -extern const struct regulator_ops wb_pmbus_regulator_ops; - -/* Macro for filling in array of struct regulator_desc */ -#define PMBUS_REGULATOR(_name, _id) \ - [_id] = { \ - .name = (_name # _id), \ - .id = (_id), \ - .of_match = of_match_ptr(_name # _id), \ - .regulators_node = of_match_ptr("regulators"), \ - .ops = &wb_pmbus_regulator_ops, \ - .type = REGULATOR_VOLTAGE, \ - .owner = THIS_MODULE, \ - } - -struct pmbus_data { - struct device *dev; - struct device *hwmon_dev; - - u32 flags; /* from platform data */ - - int exponent[PMBUS_PAGES]; /* linear mode: exponent for output voltages */ - - const struct pmbus_driver_info *info; - - int max_attributes; - int num_attributes; - struct attribute_group group; - const struct attribute_group **groups; - struct dentry *debugfs; /* debugfs device directory */ - - struct pmbus_sensor *sensors; - - struct mutex update_lock; - - bool has_status_word; /* device uses STATUS_WORD register */ - int (*read_status)(struct i2c_client *client, int page); - - s16 currpage; /* current page, -1 for unknown/unset */ - s16 currphase; /* current phase, 0xff for all, -1 for unknown/unset */ - int vout_max[PMBUS_PAGES]; /* pmbus maximum output voltage */ - int vout_min[PMBUS_PAGES]; /* pmbus minimum output voltage */ -}; - -/* Function declarations */ -void wb_pmbus_clear_cache(struct i2c_client *client); -int wb_pmbus_set_page(struct i2c_client *client, int page, int phase); -int wb_pmbus_read_word_data(struct i2c_client *client, int page, int phase, - u8 reg); -int wb_pmbus_write_word_data(struct i2c_client *client, int page, u8 reg, - u16 word); -int wb_pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); -int wb_pmbus_write_byte(struct i2c_client *client, int page, u8 value); -int wb_pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, - u8 value); -int wb_pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg, - u8 mask, u8 value); -void wb_pmbus_clear_faults(struct i2c_client *client); -bool wb_pmbus_check_byte_register(struct i2c_client *client, int page, int reg); -bool wb_pmbus_check_word_register(struct i2c_client *client, int page, int reg); -int wb_pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info); -void wb_pmbus_do_remove(struct i2c_client *client); -const struct pmbus_driver_info *wb_pmbus_get_driver_info(struct i2c_client - *client); -int wb_pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id, - enum pmbus_fan_mode mode); -int wb_pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id, - enum pmbus_fan_mode mode); -int wb_pmbus_update_fan(struct i2c_client *client, int page, int id, - u8 config, u8 mask, u16 command); -struct dentry *wb_pmbus_get_debugfs_dir(struct i2c_client *client); - -#endif /* WB_PMBUS_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c deleted file mode 100644 index 3a86ade43b7e..000000000000 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c +++ /dev/null @@ -1,2780 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Hardware monitoring driver for PMBus devices - * - * Copyright (c) 2010, 2011 Ericsson AB. - * Copyright (c) 2012 Guenter Roeck - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "wb_pmbus.h" - -/* - * Number of additional attribute pointers to allocate - * with each call to krealloc - */ -#define PMBUS_ATTR_ALLOC_SIZE (32) -#define PMBUS_NAME_SIZE (24) -#define PMBUS_RETRY_SLEEP_TIME (10000) /* 10ms */ -#define PMBUS_RETRY_TIME (3) - -struct pmbus_sensor { - struct pmbus_sensor *next; - char name[PMBUS_NAME_SIZE]; /* sysfs sensor name */ - struct device_attribute attribute; - u8 page; /* page number */ - u8 phase; /* phase number, 0xff for all phases */ - u16 reg; /* register */ - enum pmbus_sensor_classes class; /* sensor class */ - bool update; /* runtime sensor update needed */ - bool convert; /* Whether or not to apply linear/vid/direct */ - int data; /* Sensor data. - Negative if there was a read error */ -}; -#define to_pmbus_sensor(_attr) \ - container_of(_attr, struct pmbus_sensor, attribute) - -struct pmbus_boolean { - char name[PMBUS_NAME_SIZE]; /* sysfs boolean name */ - struct sensor_device_attribute attribute; - struct pmbus_sensor *s1; - struct pmbus_sensor *s2; -}; -#define to_pmbus_boolean(_attr) \ - container_of(_attr, struct pmbus_boolean, attribute) - -struct pmbus_label { - char name[PMBUS_NAME_SIZE]; /* sysfs label name */ - struct device_attribute attribute; - char label[PMBUS_NAME_SIZE]; /* label */ -}; -#define to_pmbus_label(_attr) \ - container_of(_attr, struct pmbus_label, attribute) - -/* Macros for converting between sensor index and register/page/status mask */ - -#define PB_STATUS_MASK 0xffff -#define PB_REG_SHIFT 16 -#define PB_REG_MASK 0x3ff -#define PB_PAGE_SHIFT 26 -#define PB_PAGE_MASK 0x3f - -#define pb_reg_to_index(page, reg, mask) (((page) << PB_PAGE_SHIFT) | \ - ((reg) << PB_REG_SHIFT) | (mask)) - -#define pb_index_to_page(index) (((index) >> PB_PAGE_SHIFT) & PB_PAGE_MASK) -#define pb_index_to_reg(index) (((index) >> PB_REG_SHIFT) & PB_REG_MASK) -#define pb_index_to_mask(index) ((index) & PB_STATUS_MASK) - -struct pmbus_debugfs_entry { - struct i2c_client *client; - u8 page; - u8 reg; -}; - -static const int pmbus_fan_rpm_mask[] = { - PB_FAN_1_RPM, - PB_FAN_2_RPM, - PB_FAN_1_RPM, - PB_FAN_2_RPM, -}; - -static const int pmbus_fan_config_registers[] = { - PMBUS_FAN_CONFIG_12, - PMBUS_FAN_CONFIG_12, - PMBUS_FAN_CONFIG_34, - PMBUS_FAN_CONFIG_34 -}; - -static const int pmbus_fan_command_registers[] = { - PMBUS_FAN_COMMAND_1, - PMBUS_FAN_COMMAND_2, - PMBUS_FAN_COMMAND_3, - PMBUS_FAN_COMMAND_4, -}; - -void wb_pmbus_clear_cache(struct i2c_client *client) -{ - struct pmbus_data *data = i2c_get_clientdata(client); - struct pmbus_sensor *sensor; - - for (sensor = data->sensors; sensor; sensor = sensor->next) - sensor->data = -ENODATA; -} -EXPORT_SYMBOL_GPL(wb_pmbus_clear_cache); - -static int wb_pmbus_set_page_tmp(struct i2c_client *client, int page, int phase) -{ - struct pmbus_data *data = i2c_get_clientdata(client); - int rv; - - if (page < 0) - return 0; - - if (!(data->info->func[page] & PMBUS_PAGE_VIRTUAL) && - data->info->pages > 1 && page != data->currpage) { - rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page); - if (rv < 0) - return rv; - - rv = i2c_smbus_read_byte_data(client, PMBUS_PAGE); - if (rv < 0) - return rv; - - if (rv != page) - return -EIO; - } - data->currpage = page; - - if (data->info->phases[page] && data->currphase != phase && - !(data->info->func[page] & PMBUS_PHASE_VIRTUAL)) { - rv = i2c_smbus_write_byte_data(client, PMBUS_PHASE, - phase); - if (rv) - return rv; - } - data->currphase = phase; - - return 0; -} - -int wb_pmbus_set_page(struct i2c_client *client, int page, int phase) -{ - int rv, i; - struct device *dev = &client->dev; - - for (i = 0; i < PMBUS_RETRY_TIME; i++) { - rv = wb_pmbus_set_page_tmp(client, page, phase); - if(rv >= 0){ - return rv; - } - if ((i + 1) < PMBUS_RETRY_TIME) { - usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); - } - } - dev_dbg(dev, "wb_pmbus_set_page failed, page=%d, phase=%d, rv=%d\n", - page, phase, rv); - return rv; -} -EXPORT_SYMBOL_GPL(wb_pmbus_set_page); - -static int wb_pmbus_write_byte_tmp(struct i2c_client *client, int page, u8 value) -{ - int rv; - - rv = wb_pmbus_set_page(client, page, 0xff); - if (rv < 0) - return rv; - - return i2c_smbus_write_byte(client, value); -} - -int wb_pmbus_write_byte(struct i2c_client *client, int page, u8 value) -{ - int rv, i; - struct device *dev = &client->dev; - - for (i = 0; i < PMBUS_RETRY_TIME; i++) { - rv = wb_pmbus_write_byte_tmp(client, page, value); - if(rv >= 0){ - return rv; - } - if ((i + 1) < PMBUS_RETRY_TIME) { - usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); - } - } - dev_dbg(dev, "wb_pmbus_write_byte failed, page=%d, value=0x%x, rv: %d\n", - page, value, rv); - return rv; -} - -EXPORT_SYMBOL_GPL(wb_pmbus_write_byte); - -/* - * _pmbus_write_byte() is similar to pmbus_write_byte(), but checks if - * a device specific mapping function exists and calls it if necessary. - */ -static int _pmbus_write_byte(struct i2c_client *client, int page, u8 value) -{ - struct pmbus_data *data = i2c_get_clientdata(client); - const struct pmbus_driver_info *info = data->info; - int status; - - if (info->write_byte) { - status = info->write_byte(client, page, value); - if (status != -ENODATA) - return status; - } - return wb_pmbus_write_byte(client, page, value); -} - -static int wb_pmbus_write_word_data_tmp(struct i2c_client *client, int page, u8 reg, - u16 word) -{ - int rv; - - rv = wb_pmbus_set_page(client, page, 0xff); - if (rv < 0) - return rv; - - return i2c_smbus_write_word_data(client, reg, word); -} - -int wb_pmbus_write_word_data(struct i2c_client *client, int page, u8 reg, - u16 word) -{ - int rv, i; - struct device *dev = &client->dev; - - for (i = 0; i < PMBUS_RETRY_TIME; i++) { - rv = wb_pmbus_write_word_data_tmp(client, page, reg, word); - if(rv >= 0){ - return rv; - } - if ((i + 1) < PMBUS_RETRY_TIME) { - usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); - } - } - dev_dbg(dev, "wb_pmbus_write_word_data failed, page: %d, reg: 0x%x, value: 0x%x, rv: %d\n", - page, reg, word, rv); - return rv; - -} -EXPORT_SYMBOL_GPL(wb_pmbus_write_word_data); - -static int pmbus_write_virt_reg(struct i2c_client *client, int page, int reg, - u16 word) -{ - int bit; - int id; - int rv; - - switch (reg) { - case PMBUS_VIRT_FAN_TARGET_1 ... PMBUS_VIRT_FAN_TARGET_4: - id = reg - PMBUS_VIRT_FAN_TARGET_1; - bit = pmbus_fan_rpm_mask[id]; - rv = wb_pmbus_update_fan(client, page, id, bit, bit, word); - break; - default: - rv = -ENXIO; - break; - } - - return rv; -} - -/* - * _pmbus_write_word_data() is similar to pmbus_write_word_data(), but checks if - * a device specific mapping function exists and calls it if necessary. - */ -static int _pmbus_write_word_data(struct i2c_client *client, int page, int reg, - u16 word) -{ - struct pmbus_data *data = i2c_get_clientdata(client); - const struct pmbus_driver_info *info = data->info; - int status; - - if (info->write_word_data) { - status = info->write_word_data(client, page, reg, word); - if (status != -ENODATA) - return status; - } - - if (reg >= PMBUS_VIRT_BASE) - return pmbus_write_virt_reg(client, page, reg, word); - - return wb_pmbus_write_word_data(client, page, reg, word); -} - -int wb_pmbus_update_fan(struct i2c_client *client, int page, int id, - u8 config, u8 mask, u16 command) -{ - int from; - int rv; - u8 to; - - from = wb_pmbus_read_byte_data(client, page, - pmbus_fan_config_registers[id]); - if (from < 0) - return from; - - to = (from & ~mask) | (config & mask); - if (to != from) { - rv = wb_pmbus_write_byte_data(client, page, - pmbus_fan_config_registers[id], to); - if (rv < 0) - return rv; - } - - return _pmbus_write_word_data(client, page, - pmbus_fan_command_registers[id], command); -} -EXPORT_SYMBOL_GPL(wb_pmbus_update_fan); - -static int wb_pmbus_read_word_data_tmp(struct i2c_client *client, int page, int phase, u8 reg) -{ - int rv; - - rv = wb_pmbus_set_page(client, page, phase); - if (rv < 0) - return rv; - - return i2c_smbus_read_word_data(client, reg); -} - -int wb_pmbus_read_word_data(struct i2c_client *client, int page, int phase, u8 reg) -{ - int rv, i; - struct device *dev = &client->dev; - - for (i = 0; i < PMBUS_RETRY_TIME; i++) { - rv = wb_pmbus_read_word_data_tmp(client, page, phase, reg); - if(rv >= 0){ - return rv; - } - if ((i + 1) < PMBUS_RETRY_TIME) { - usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); - } - } - dev_dbg(dev, "wb_pmbus_read_word_data failed, page: %d, phase: %d, reg: 0x%x, rv: %d\n", - page, phase, reg, rv); - return rv; -} -EXPORT_SYMBOL_GPL(wb_pmbus_read_word_data); - -static int pmbus_read_virt_reg(struct i2c_client *client, int page, int reg) -{ - int rv; - int id; - - switch (reg) { - case PMBUS_VIRT_FAN_TARGET_1 ... PMBUS_VIRT_FAN_TARGET_4: - id = reg - PMBUS_VIRT_FAN_TARGET_1; - rv = wb_pmbus_get_fan_rate_device(client, page, id, rpm); - break; - default: - rv = -ENXIO; - break; - } - - return rv; -} - -/* - * _pmbus_read_word_data() is similar to wb_pmbus_read_word_data(), but checks if - * a device specific mapping function exists and calls it if necessary. - */ -static int _pmbus_read_word_data(struct i2c_client *client, int page, - int phase, int reg) -{ - struct pmbus_data *data = i2c_get_clientdata(client); - const struct pmbus_driver_info *info = data->info; - int status; - - if (info->read_word_data) { - status = info->read_word_data(client, page, phase, reg); - if (status != -ENODATA) - return status; - } - - if (reg >= PMBUS_VIRT_BASE) - return pmbus_read_virt_reg(client, page, reg); - - return wb_pmbus_read_word_data(client, page, phase, reg); -} - -/* Same as above, but without phase parameter, for use in check functions */ -static int __pmbus_read_word_data(struct i2c_client *client, int page, int reg) -{ - return _pmbus_read_word_data(client, page, 0xff, reg); -} - -static int wb_pmbus_read_byte_data_tmp(struct i2c_client *client, int page, u8 reg) -{ - int rv; - - rv = wb_pmbus_set_page(client, page, 0xff); - if (rv < 0) - return rv; - - return i2c_smbus_read_byte_data(client, reg); -} - -int wb_pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg) -{ - int rv, i; - struct device *dev = &client->dev; - - for (i = 0; i < PMBUS_RETRY_TIME; i++) { - rv = wb_pmbus_read_byte_data_tmp(client, page, reg); - if(rv >= 0){ - return rv; - } - if ((i + 1) < PMBUS_RETRY_TIME) { - usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); - } - } - dev_dbg(dev, "wb_pmbus_read_byte_data failed, page: %d, reg: 0x%x, rv: %d\n", - page, reg, rv); - return rv; -} -EXPORT_SYMBOL_GPL(wb_pmbus_read_byte_data); - -static int wb_pmbus_write_byte_data_tmp(struct i2c_client *client, int page, u8 reg, u8 value) -{ - int rv; - - rv = wb_pmbus_set_page(client, page, 0xff); - if (rv < 0) - return rv; - - return i2c_smbus_write_byte_data(client, reg, value); -} - -int wb_pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, u8 value) -{ - int rv, i; - struct device *dev = &client->dev; - - for (i = 0; i < PMBUS_RETRY_TIME; i++) { - rv = wb_pmbus_write_byte_data_tmp(client, page, reg, value); - if(rv >= 0){ - return rv; - } - if ((i + 1) < PMBUS_RETRY_TIME) { - usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); - } - } - dev_dbg(dev, "wb_pmbus_write_byte_data failed, page: %d, reg: 0x%x, value: 0x%x, rv: %d\n", - page, reg, value, rv); - return rv; -} -EXPORT_SYMBOL_GPL(wb_pmbus_write_byte_data); - -int wb_pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg, - u8 mask, u8 value) -{ - unsigned int tmp; - int rv; - - rv = wb_pmbus_read_byte_data(client, page, reg); - if (rv < 0) - return rv; - - tmp = (rv & ~mask) | (value & mask); - - if (tmp != rv) - rv = wb_pmbus_write_byte_data(client, page, reg, tmp); - - return rv; -} -EXPORT_SYMBOL_GPL(wb_pmbus_update_byte_data); - -/* - * _pmbus_read_byte_data() is similar to wb_pmbus_read_byte_data(), but checks if - * a device specific mapping function exists and calls it if necessary. - */ -static int _pmbus_read_byte_data(struct i2c_client *client, int page, int reg) -{ - struct pmbus_data *data = i2c_get_clientdata(client); - const struct pmbus_driver_info *info = data->info; - int status; - - if (info->read_byte_data) { - status = info->read_byte_data(client, page, reg); - if (status != -ENODATA) - return status; - } - return wb_pmbus_read_byte_data(client, page, reg); -} - -static struct pmbus_sensor *pmbus_find_sensor(struct pmbus_data *data, int page, - int reg) -{ - struct pmbus_sensor *sensor; - - for (sensor = data->sensors; sensor; sensor = sensor->next) { - if (sensor->page == page && sensor->reg == reg) - return sensor; - } - - return ERR_PTR(-EINVAL); -} - -static int pmbus_get_fan_rate(struct i2c_client *client, int page, int id, - enum pmbus_fan_mode mode, - bool from_cache) -{ - struct pmbus_data *data = i2c_get_clientdata(client); - bool want_rpm, have_rpm; - struct pmbus_sensor *s; - int config; - int reg; - - want_rpm = (mode == rpm); - - if (from_cache) { - reg = want_rpm ? PMBUS_VIRT_FAN_TARGET_1 : PMBUS_VIRT_PWM_1; - s = pmbus_find_sensor(data, page, reg + id); - if (IS_ERR(s)) - return PTR_ERR(s); - - return s->data; - } - - config = wb_pmbus_read_byte_data(client, page, - pmbus_fan_config_registers[id]); - if (config < 0) - return config; - - have_rpm = !!(config & pmbus_fan_rpm_mask[id]); - if (want_rpm == have_rpm) - return wb_pmbus_read_word_data(client, page, 0xff, - pmbus_fan_command_registers[id]); - - /* Can't sensibly map between RPM and PWM, just return zero */ - return 0; -} - -int wb_pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id, - enum pmbus_fan_mode mode) -{ - return pmbus_get_fan_rate(client, page, id, mode, false); -} -EXPORT_SYMBOL_GPL(wb_pmbus_get_fan_rate_device); - -int wb_pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id, - enum pmbus_fan_mode mode) -{ - return pmbus_get_fan_rate(client, page, id, mode, true); -} -EXPORT_SYMBOL_GPL(wb_pmbus_get_fan_rate_cached); - -static void pmbus_clear_fault_page(struct i2c_client *client, int page) -{ - _pmbus_write_byte(client, page, PMBUS_CLEAR_FAULTS); -} - -void wb_pmbus_clear_faults(struct i2c_client *client) -{ - struct pmbus_data *data = i2c_get_clientdata(client); - int i; - - for (i = 0; i < data->info->pages; i++) - pmbus_clear_fault_page(client, i); -} -EXPORT_SYMBOL_GPL(wb_pmbus_clear_faults); - -static int pmbus_check_status_cml(struct i2c_client *client) -{ - struct pmbus_data *data = i2c_get_clientdata(client); - int status, status2; - - status = data->read_status(client, -1); - if (status < 0 || (status & PB_STATUS_CML)) { - status2 = _pmbus_read_byte_data(client, -1, PMBUS_STATUS_CML); - if (status2 < 0 || (status2 & PB_CML_FAULT_INVALID_COMMAND)) - return -EIO; - } - return 0; -} - -static bool pmbus_check_register(struct i2c_client *client, - int (*func)(struct i2c_client *client, - int page, int reg), - int page, int reg) -{ - int rv; - struct pmbus_data *data = i2c_get_clientdata(client); - - rv = func(client, page, reg); - if (rv >= 0 && !(data->flags & PMBUS_SKIP_STATUS_CHECK)) - rv = pmbus_check_status_cml(client); - pmbus_clear_fault_page(client, -1); - return rv >= 0; -} - -static bool pmbus_check_status_register(struct i2c_client *client, int page) -{ - int status; - struct pmbus_data *data = i2c_get_clientdata(client); - - status = data->read_status(client, page); - if (status >= 0 && !(data->flags & PMBUS_SKIP_STATUS_CHECK) && - (status & PB_STATUS_CML)) { - status = _pmbus_read_byte_data(client, -1, PMBUS_STATUS_CML); - if (status < 0 || (status & PB_CML_FAULT_INVALID_COMMAND)) - status = -EIO; - } - - pmbus_clear_fault_page(client, -1); - return status >= 0; -} - -bool wb_pmbus_check_byte_register(struct i2c_client *client, int page, int reg) -{ - return pmbus_check_register(client, _pmbus_read_byte_data, page, reg); -} -EXPORT_SYMBOL_GPL(wb_pmbus_check_byte_register); - -bool wb_pmbus_check_word_register(struct i2c_client *client, int page, int reg) -{ - return pmbus_check_register(client, __pmbus_read_word_data, page, reg); -} -EXPORT_SYMBOL_GPL(wb_pmbus_check_word_register); - -const struct pmbus_driver_info *wb_pmbus_get_driver_info(struct i2c_client *client) -{ - struct pmbus_data *data = i2c_get_clientdata(client); - - return data->info; -} -EXPORT_SYMBOL_GPL(wb_pmbus_get_driver_info); - -static int pmbus_read_status_byte(struct i2c_client *client, int page) -{ - return _pmbus_read_byte_data(client, page, PMBUS_STATUS_BYTE); -} - -static int pmbus_read_status_word(struct i2c_client *client, int page) -{ - return _pmbus_read_word_data(client, page, 0xff, PMBUS_STATUS_WORD); -} - -static int pmbus_get_status(struct i2c_client *client, int page, int reg) -{ - struct pmbus_data *data = i2c_get_clientdata(client); - int status; - - switch (reg) { - case PMBUS_STATUS_WORD: - status = data->read_status(client, page); - if ((status < 0) || (data->has_status_word && (status == 0xffff)) - || (!data->has_status_word && (status == 0xff))) { - if (data->has_status_word) { - data->read_status = pmbus_read_status_byte; - } else { - data->read_status = pmbus_read_status_word; - } - data->has_status_word = !data->has_status_word; - status = data->read_status(client, page); - } - break; - default: - status = _pmbus_read_byte_data(client, page, reg); - break; - } - if (status < 0) - wb_pmbus_clear_faults(client); - return status; -} - -static void pmbus_update_sensor_data(struct i2c_client *client, struct pmbus_sensor *sensor) -{ - if (sensor->data < 0 || sensor->update) - sensor->data = _pmbus_read_word_data(client, sensor->page, - sensor->phase, sensor->reg); -} - -/* - * Convert linear sensor values to milli- or micro-units - * depending on sensor type. - */ -static s64 pmbus_reg2data_linear(struct pmbus_data *data, - struct pmbus_sensor *sensor) -{ - s16 exponent; - s32 mantissa; - s64 val; - - if (sensor->class == PSC_VOLTAGE_OUT) { /* LINEAR16 */ - exponent = data->exponent[sensor->page]; - mantissa = (u16) sensor->data; - } else { /* LINEAR11 */ - exponent = ((s16)sensor->data) >> 11; - mantissa = ((s16)((sensor->data & 0x7ff) << 5)) >> 5; - } - - val = mantissa; - - /* scale result to milli-units for all sensors except fans */ - if (sensor->class != PSC_FAN) - val = val * 1000LL; - - /* scale result to micro-units for power sensors */ - if (sensor->class == PSC_POWER) - val = val * 1000LL; - - if (exponent >= 0) - val <<= exponent; - else - val >>= -exponent; - - return val; -} - -/* - * Convert direct sensor values to milli- or micro-units - * depending on sensor type. - */ -static s64 pmbus_reg2data_direct(struct pmbus_data *data, - struct pmbus_sensor *sensor) -{ - s64 b, val = (s16)sensor->data; - s32 m, R; - - m = data->info->m[sensor->class]; - b = data->info->b[sensor->class]; - R = data->info->R[sensor->class]; - - if (m == 0) - return 0; - - /* X = 1/m * (Y * 10^-R - b) */ - R = -R; - /* scale result to milli-units for everything but fans */ - if (!(sensor->class == PSC_FAN || sensor->class == PSC_PWM)) { - R += 3; - b *= 1000; - } - - /* scale result to micro-units for power sensors */ - if (sensor->class == PSC_POWER) { - R += 3; - b *= 1000; - } - - while (R > 0) { - val *= 10; - R--; - } - while (R < 0) { - val = div_s64(val + 5LL, 10L); /* round closest */ - R++; - } - - val = div_s64(val - b, m); - return val; -} - -/* - * Convert VID sensor values to milli- or micro-units - * depending on sensor type. - */ -static s64 pmbus_reg2data_vid(struct pmbus_data *data, - struct pmbus_sensor *sensor) -{ - long val = sensor->data; - long rv = 0; - - switch (data->info->vrm_version[sensor->page]) { - case vr11: - if (val >= 0x02 && val <= 0xb2) - rv = DIV_ROUND_CLOSEST(160000 - (val - 2) * 625, 100); - break; - case vr12: - if (val >= 0x01) - rv = 250 + (val - 1) * 5; - break; - case vr13: - if (val >= 0x01) - rv = 500 + (val - 1) * 10; - break; - case imvp9: - if (val >= 0x01) - rv = 200 + (val - 1) * 10; - break; - case amd625mv: - if (val >= 0x0 && val <= 0xd8) - rv = DIV_ROUND_CLOSEST(155000 - val * 625, 100); - break; - } - return rv; -} - -static s64 pmbus_reg2data(struct pmbus_data *data, struct pmbus_sensor *sensor) -{ - s64 val; - - if (!sensor->convert) - return sensor->data; - - switch (data->info->format[sensor->class]) { - case direct: - val = pmbus_reg2data_direct(data, sensor); - break; - case vid: - val = pmbus_reg2data_vid(data, sensor); - break; - case linear: - default: - val = pmbus_reg2data_linear(data, sensor); - break; - } - return val; -} - -#define MAX_MANTISSA (1023 * 1000) -#define MIN_MANTISSA (511 * 1000) - -static u16 pmbus_data2reg_linear(struct pmbus_data *data, - struct pmbus_sensor *sensor, s64 val) -{ - s16 exponent = 0, mantissa; - bool negative = false; - - /* simple case */ - if (val == 0) - return 0; - - if (sensor->class == PSC_VOLTAGE_OUT) { - /* LINEAR16 does not support negative voltages */ - if (val < 0) - return 0; - - /* - * For a static exponents, we don't have a choice - * but to adjust the value to it. - */ - if (data->exponent[sensor->page] < 0) - val <<= -data->exponent[sensor->page]; - else - val >>= data->exponent[sensor->page]; - val = DIV_ROUND_CLOSEST_ULL(val, 1000); - return clamp_val(val, 0, 0xffff); - } - - if (val < 0) { - negative = true; - val = -val; - } - - /* Power is in uW. Convert to mW before converting. */ - if (sensor->class == PSC_POWER) - val = DIV_ROUND_CLOSEST_ULL(val, 1000); - - /* - * For simplicity, convert fan data to milli-units - * before calculating the exponent. - */ - if (sensor->class == PSC_FAN) - val = val * 1000LL; - - /* Reduce large mantissa until it fits into 10 bit */ - while (val >= MAX_MANTISSA && exponent < 15) { - exponent++; - val >>= 1; - } - /* Increase small mantissa to improve precision */ - while (val < MIN_MANTISSA && exponent > -15) { - exponent--; - val <<= 1; - } - - /* Convert mantissa from milli-units to units */ - mantissa = clamp_val(DIV_ROUND_CLOSEST_ULL(val, 1000), 0, 0x3ff); - - /* restore sign */ - if (negative) - mantissa = -mantissa; - - /* Convert to 5 bit exponent, 11 bit mantissa */ - return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800); -} - -static u16 pmbus_data2reg_direct(struct pmbus_data *data, - struct pmbus_sensor *sensor, s64 val) -{ - s64 b; - s32 m, R; - - m = data->info->m[sensor->class]; - b = data->info->b[sensor->class]; - R = data->info->R[sensor->class]; - - /* Power is in uW. Adjust R and b. */ - if (sensor->class == PSC_POWER) { - R -= 3; - b *= 1000; - } - - /* Calculate Y = (m * X + b) * 10^R */ - if (!(sensor->class == PSC_FAN || sensor->class == PSC_PWM)) { - R -= 3; /* Adjust R and b for data in milli-units */ - b *= 1000; - } - val = val * m + b; - - while (R > 0) { - val *= 10; - R--; - } - while (R < 0) { - val = div_s64(val + 5LL, 10L); /* round closest */ - R++; - } - - return (u16)clamp_val(val, S16_MIN, S16_MAX); -} - -static u16 pmbus_data2reg_vid(struct pmbus_data *data, - struct pmbus_sensor *sensor, s64 val) -{ - val = clamp_val(val, 500, 1600); - - return 2 + DIV_ROUND_CLOSEST_ULL((1600LL - val) * 100LL, 625); -} - -static u16 pmbus_data2reg(struct pmbus_data *data, - struct pmbus_sensor *sensor, s64 val) -{ - u16 regval; - - if (!sensor->convert) - return val; - - switch (data->info->format[sensor->class]) { - case direct: - regval = pmbus_data2reg_direct(data, sensor, val); - break; - case vid: - regval = pmbus_data2reg_vid(data, sensor, val); - break; - case linear: - default: - regval = pmbus_data2reg_linear(data, sensor, val); - break; - } - return regval; -} - -/* - * Return boolean calculated from converted data. - * defines a status register index and mask. - * The mask is in the lower 8 bits, the register index is in bits 8..23. - * - * The associated pmbus_boolean structure contains optional pointers to two - * sensor attributes. If specified, those attributes are compared against each - * other to determine if a limit has been exceeded. - * - * If the sensor attribute pointers are NULL, the function returns true if - * (status[reg] & mask) is true. - * - * If sensor attribute pointers are provided, a comparison against a specified - * limit has to be performed to determine the boolean result. - * In this case, the function returns true if v1 >= v2 (where v1 and v2 are - * sensor values referenced by sensor attribute pointers s1 and s2). - * - * To determine if an object exceeds upper limits, specify = . - * To determine if an object exceeds lower limits, specify = . - * - * If a negative value is stored in any of the referenced registers, this value - * reflects an error code which will be returned. - */ -static int pmbus_get_boolean(struct i2c_client *client, struct pmbus_boolean *b, - int index) -{ - struct pmbus_data *data = i2c_get_clientdata(client); - struct pmbus_sensor *s1 = b->s1; - struct pmbus_sensor *s2 = b->s2; - u16 mask = pb_index_to_mask(index); - u8 page = pb_index_to_page(index); - u16 reg = pb_index_to_reg(index); - int ret, status; - u16 regval; - - mutex_lock(&data->update_lock); - status = pmbus_get_status(client, page, reg); - if (status < 0) { - ret = status; - goto unlock; - } - - if (s1) - pmbus_update_sensor_data(client, s1); - if (s2) - pmbus_update_sensor_data(client, s2); - - regval = status & mask; - if (s1 && s2) { - s64 v1, v2; - - if (s1->data < 0) { - ret = s1->data; - goto unlock; - } - if (s2->data < 0) { - ret = s2->data; - goto unlock; - } - - v1 = pmbus_reg2data(data, s1); - v2 = pmbus_reg2data(data, s2); - ret = !!(regval && v1 >= v2); - } else { - ret = !!regval; - } -unlock: - mutex_unlock(&data->update_lock); - return ret; -} - -static ssize_t pmbus_show_boolean(struct device *dev, - struct device_attribute *da, char *buf) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct pmbus_boolean *boolean = to_pmbus_boolean(attr); - struct i2c_client *client = to_i2c_client(dev->parent); - int val; - - val = pmbus_get_boolean(client, boolean, attr->index); - if (val < 0) - return val; - return snprintf(buf, PAGE_SIZE, "%d\n", val); -} - -static ssize_t pmbus_show_sensor(struct device *dev, - struct device_attribute *devattr, char *buf) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct pmbus_sensor *sensor = to_pmbus_sensor(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - ssize_t ret; - - mutex_lock(&data->update_lock); - pmbus_update_sensor_data(client, sensor); - if (sensor->data < 0) - ret = sensor->data; - else - ret = snprintf(buf, PAGE_SIZE, "%lld\n", pmbus_reg2data(data, sensor)); - mutex_unlock(&data->update_lock); - return ret; -} - -static ssize_t pmbus_set_sensor(struct device *dev, - struct device_attribute *devattr, - const char *buf, size_t count) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct pmbus_data *data = i2c_get_clientdata(client); - struct pmbus_sensor *sensor = to_pmbus_sensor(devattr); - ssize_t rv = count; - s64 val; - int ret; - u16 regval; - - if (kstrtos64(buf, 10, &val) < 0) - return -EINVAL; - - mutex_lock(&data->update_lock); - regval = pmbus_data2reg(data, sensor, val); - ret = _pmbus_write_word_data(client, sensor->page, sensor->reg, regval); - if (ret < 0) - rv = ret; - else - sensor->data = regval; - mutex_unlock(&data->update_lock); - return rv; -} - -static ssize_t pmbus_show_label(struct device *dev, - struct device_attribute *da, char *buf) -{ - struct pmbus_label *label = to_pmbus_label(da); - - return snprintf(buf, PAGE_SIZE, "%s\n", label->label); -} - -static int pmbus_add_attribute(struct pmbus_data *data, struct attribute *attr) -{ - if (data->num_attributes >= data->max_attributes - 1) { - int new_max_attrs = data->max_attributes + PMBUS_ATTR_ALLOC_SIZE; - void *new_attrs = devm_krealloc(data->dev, data->group.attrs, - new_max_attrs * sizeof(void *), - GFP_KERNEL); - if (!new_attrs) - return -ENOMEM; - data->group.attrs = new_attrs; - data->max_attributes = new_max_attrs; - } - - data->group.attrs[data->num_attributes++] = attr; - data->group.attrs[data->num_attributes] = NULL; - return 0; -} - -static void pmbus_dev_attr_init(struct device_attribute *dev_attr, - const char *name, - umode_t mode, - ssize_t (*show)(struct device *dev, - struct device_attribute *attr, - char *buf), - ssize_t (*store)(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count)) -{ - sysfs_attr_init(&dev_attr->attr); - dev_attr->attr.name = name; - dev_attr->attr.mode = mode; - dev_attr->show = show; - dev_attr->store = store; -} - -static void pmbus_attr_init(struct sensor_device_attribute *a, - const char *name, - umode_t mode, - ssize_t (*show)(struct device *dev, - struct device_attribute *attr, - char *buf), - ssize_t (*store)(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count), - int idx) -{ - pmbus_dev_attr_init(&a->dev_attr, name, mode, show, store); - a->index = idx; -} - -static int pmbus_add_boolean(struct pmbus_data *data, - const char *name, const char *type, int seq, - struct pmbus_sensor *s1, - struct pmbus_sensor *s2, - u8 page, u16 reg, u16 mask) -{ - struct pmbus_boolean *boolean; - struct sensor_device_attribute *a; - - if (WARN((s1 && !s2) || (!s1 && s2), "Bad s1/s2 parameters\n")) - return -EINVAL; - - boolean = devm_kzalloc(data->dev, sizeof(*boolean), GFP_KERNEL); - if (!boolean) - return -ENOMEM; - - a = &boolean->attribute; - - snprintf(boolean->name, sizeof(boolean->name), "%s%d_%s", - name, seq, type); - boolean->s1 = s1; - boolean->s2 = s2; - pmbus_attr_init(a, boolean->name, 0444, pmbus_show_boolean, NULL, - pb_reg_to_index(page, reg, mask)); - - return pmbus_add_attribute(data, &a->dev_attr.attr); -} - -static struct pmbus_sensor *pmbus_add_sensor(struct pmbus_data *data, - const char *name, const char *type, - int seq, int page, int phase, - int reg, - enum pmbus_sensor_classes class, - bool update, bool readonly, - bool convert) -{ - struct pmbus_sensor *sensor; - struct device_attribute *a; - - sensor = devm_kzalloc(data->dev, sizeof(*sensor), GFP_KERNEL); - if (!sensor) - return NULL; - a = &sensor->attribute; - - if (type) - snprintf(sensor->name, sizeof(sensor->name), "%s%d_%s", - name, seq, type); - else - snprintf(sensor->name, sizeof(sensor->name), "%s%d", - name, seq); - - if (data->flags & PMBUS_WRITE_PROTECTED) - readonly = true; - - sensor->page = page; - sensor->phase = phase; - sensor->reg = reg; - sensor->class = class; - sensor->update = update; - sensor->convert = convert; - sensor->data = -ENODATA; - pmbus_dev_attr_init(a, sensor->name, - readonly ? 0444 : 0644, - pmbus_show_sensor, pmbus_set_sensor); - - if (pmbus_add_attribute(data, &a->attr)) - return NULL; - - sensor->next = data->sensors; - data->sensors = sensor; - - return sensor; -} - -static int pmbus_add_label(struct pmbus_data *data, - const char *name, int seq, - const char *lstring, int index, int phase) -{ - struct pmbus_label *label; - struct device_attribute *a; - - label = devm_kzalloc(data->dev, sizeof(*label), GFP_KERNEL); - if (!label) - return -ENOMEM; - - a = &label->attribute; - - snprintf(label->name, sizeof(label->name), "%s%d_label", name, seq); - if (!index) { - if (phase == 0xff) - strlcpy(label->label, lstring, - sizeof(label->label)); - else - snprintf(label->label, sizeof(label->label), "%s.%d", - lstring, phase); - } else { - if (phase == 0xff) - snprintf(label->label, sizeof(label->label), "%s%d", - lstring, index); - else - snprintf(label->label, sizeof(label->label), "%s%d.%d", - lstring, index, phase); - } - - pmbus_dev_attr_init(a, label->name, 0444, pmbus_show_label, NULL); - return pmbus_add_attribute(data, &a->attr); -} - -/* - * Search for attributes. Allocate sensors, booleans, and labels as needed. - */ - -/* - * The pmbus_limit_attr structure describes a single limit attribute - * and its associated alarm attribute. - */ -struct pmbus_limit_attr { - u16 reg; /* Limit register */ - u16 sbit; /* Alarm attribute status bit */ - bool update; /* True if register needs updates */ - bool low; /* True if low limit; for limits with compare - functions only */ - const char *attr; /* Attribute name */ - const char *alarm; /* Alarm attribute name */ -}; - -/* - * The pmbus_sensor_attr structure describes one sensor attribute. This - * description includes a reference to the associated limit attributes. - */ -struct pmbus_sensor_attr { - u16 reg; /* sensor register */ - u16 gbit; /* generic status bit */ - u8 nlimit; /* # of limit registers */ - enum pmbus_sensor_classes class;/* sensor class */ - const char *label; /* sensor label */ - bool paged; /* true if paged sensor */ - bool update; /* true if update needed */ - bool compare; /* true if compare function needed */ - u32 func; /* sensor mask */ - u32 sfunc; /* sensor status mask */ - int sreg; /* status register */ - const struct pmbus_limit_attr *limit;/* limit registers */ -}; - -/* - * Add a set of limit attributes and, if supported, the associated - * alarm attributes. - * returns 0 if no alarm register found, 1 if an alarm register was found, - * < 0 on errors. - */ -static int pmbus_add_limit_attrs(struct i2c_client *client, - struct pmbus_data *data, - const struct pmbus_driver_info *info, - const char *name, int index, int page, - struct pmbus_sensor *base, - const struct pmbus_sensor_attr *attr) -{ - const struct pmbus_limit_attr *l = attr->limit; - int nlimit = attr->nlimit; - int have_alarm = 0; - int i, ret; - struct pmbus_sensor *curr; - - for (i = 0; i < nlimit; i++) { - if (wb_pmbus_check_word_register(client, page, l->reg)) { - curr = pmbus_add_sensor(data, name, l->attr, index, - page, 0xff, l->reg, attr->class, - attr->update || l->update, - false, true); - if (!curr) - return -ENOMEM; - if (l->sbit && (info->func[page] & attr->sfunc)) { - ret = pmbus_add_boolean(data, name, - l->alarm, index, - attr->compare ? l->low ? curr : base - : NULL, - attr->compare ? l->low ? base : curr - : NULL, - page, attr->sreg, l->sbit); - if (ret) - return ret; - have_alarm = 1; - } - } - l++; - } - return have_alarm; -} - -static int pmbus_add_sensor_attrs_one(struct i2c_client *client, - struct pmbus_data *data, - const struct pmbus_driver_info *info, - const char *name, - int index, int page, int phase, - const struct pmbus_sensor_attr *attr, - bool paged) -{ - struct pmbus_sensor *base; - bool upper = !!(attr->gbit & 0xff00); /* need to check STATUS_WORD */ - int ret; - - if (attr->label) { - ret = pmbus_add_label(data, name, index, attr->label, - paged ? page + 1 : 0, phase); - if (ret) - return ret; - } - base = pmbus_add_sensor(data, name, "input", index, page, phase, - attr->reg, attr->class, true, true, true); - if (!base) - return -ENOMEM; - /* No limit and alarm attributes for phase specific sensors */ - if (attr->sfunc && phase == 0xff) { - ret = pmbus_add_limit_attrs(client, data, info, name, - index, page, base, attr); - if (ret < 0) - return ret; - /* - * Add generic alarm attribute only if there are no individual - * alarm attributes, if there is a global alarm bit, and if - * the generic status register (word or byte, depending on - * which global bit is set) for this page is accessible. - */ - if (!ret && attr->gbit && - (!upper || (upper && data->has_status_word)) && - pmbus_check_status_register(client, page)) { - ret = pmbus_add_boolean(data, name, "alarm", index, - NULL, NULL, - page, PMBUS_STATUS_WORD, - attr->gbit); - if (ret) - return ret; - } - } - return 0; -} - -static bool pmbus_sensor_is_paged(const struct pmbus_driver_info *info, - const struct pmbus_sensor_attr *attr) -{ - int p; - - if (attr->paged) - return true; - - /* - * Some attributes may be present on more than one page despite - * not being marked with the paged attribute. If that is the case, - * then treat the sensor as being paged and add the page suffix to the - * attribute name. - * We don't just add the paged attribute to all such attributes, in - * order to maintain the un-suffixed labels in the case where the - * attribute is only on page 0. - */ - for (p = 1; p < info->pages; p++) { - if (info->func[p] & attr->func) - return true; - } - return false; -} - -static int pmbus_add_sensor_attrs(struct i2c_client *client, - struct pmbus_data *data, - const char *name, - const struct pmbus_sensor_attr *attrs, - int nattrs) -{ - const struct pmbus_driver_info *info = data->info; - int index, i; - int ret; - - index = 1; - for (i = 0; i < nattrs; i++) { - int page, pages; - bool paged = pmbus_sensor_is_paged(info, attrs); - - pages = paged ? info->pages : 1; - for (page = 0; page < pages; page++) { - if (!(info->func[page] & attrs->func)) - continue; - ret = pmbus_add_sensor_attrs_one(client, data, info, - name, index, page, - 0xff, attrs, paged); - if (ret) - return ret; - index++; - if (info->phases[page]) { - int phase; - - for (phase = 0; phase < info->phases[page]; - phase++) { - if (!(info->pfunc[phase] & attrs->func)) - continue; - ret = pmbus_add_sensor_attrs_one(client, - data, info, name, index, page, - phase, attrs, paged); - if (ret) - return ret; - index++; - } - } - } - attrs++; - } - return 0; -} - -static const struct pmbus_limit_attr vin_limit_attrs[] = { - { - .reg = PMBUS_VIN_UV_WARN_LIMIT, - .attr = "min", - .alarm = "min_alarm", - .sbit = PB_VOLTAGE_UV_WARNING, - }, { - .reg = PMBUS_VIN_UV_FAULT_LIMIT, - .attr = "lcrit", - .alarm = "lcrit_alarm", - .sbit = PB_VOLTAGE_UV_FAULT, - }, { - .reg = PMBUS_VIN_OV_WARN_LIMIT, - .attr = "max", - .alarm = "max_alarm", - .sbit = PB_VOLTAGE_OV_WARNING, - }, { - .reg = PMBUS_VIN_OV_FAULT_LIMIT, - .attr = "crit", - .alarm = "crit_alarm", - .sbit = PB_VOLTAGE_OV_FAULT, - }, { - .reg = PMBUS_VIRT_READ_VIN_AVG, - .update = true, - .attr = "average", - }, { - .reg = PMBUS_VIRT_READ_VIN_MIN, - .update = true, - .attr = "lowest", - }, { - .reg = PMBUS_VIRT_READ_VIN_MAX, - .update = true, - .attr = "highest", - }, { - .reg = PMBUS_VIRT_RESET_VIN_HISTORY, - .attr = "reset_history", - }, { - .reg = PMBUS_MFR_VIN_MIN, - .attr = "rated_min", - }, { - .reg = PMBUS_MFR_VIN_MAX, - .attr = "rated_max", - }, -}; - -static const struct pmbus_limit_attr vmon_limit_attrs[] = { - { - .reg = PMBUS_VIRT_VMON_UV_WARN_LIMIT, - .attr = "min", - .alarm = "min_alarm", - .sbit = PB_VOLTAGE_UV_WARNING, - }, { - .reg = PMBUS_VIRT_VMON_UV_FAULT_LIMIT, - .attr = "lcrit", - .alarm = "lcrit_alarm", - .sbit = PB_VOLTAGE_UV_FAULT, - }, { - .reg = PMBUS_VIRT_VMON_OV_WARN_LIMIT, - .attr = "max", - .alarm = "max_alarm", - .sbit = PB_VOLTAGE_OV_WARNING, - }, { - .reg = PMBUS_VIRT_VMON_OV_FAULT_LIMIT, - .attr = "crit", - .alarm = "crit_alarm", - .sbit = PB_VOLTAGE_OV_FAULT, - } -}; - -static const struct pmbus_limit_attr vout_limit_attrs[] = { - { - .reg = PMBUS_VOUT_UV_WARN_LIMIT, - .attr = "min", - .alarm = "min_alarm", - .sbit = PB_VOLTAGE_UV_WARNING, - }, { - .reg = PMBUS_VOUT_UV_FAULT_LIMIT, - .attr = "lcrit", - .alarm = "lcrit_alarm", - .sbit = PB_VOLTAGE_UV_FAULT, - }, { - .reg = PMBUS_VOUT_OV_WARN_LIMIT, - .attr = "max", - .alarm = "max_alarm", - .sbit = PB_VOLTAGE_OV_WARNING, - }, { - .reg = PMBUS_VOUT_OV_FAULT_LIMIT, - .attr = "crit", - .alarm = "crit_alarm", - .sbit = PB_VOLTAGE_OV_FAULT, - }, { - .reg = PMBUS_VIRT_READ_VOUT_AVG, - .update = true, - .attr = "average", - }, { - .reg = PMBUS_VIRT_READ_VOUT_MIN, - .update = true, - .attr = "lowest", - }, { - .reg = PMBUS_VIRT_READ_VOUT_MAX, - .update = true, - .attr = "highest", - }, { - .reg = PMBUS_VIRT_RESET_VOUT_HISTORY, - .attr = "reset_history", - }, { - .reg = PMBUS_MFR_VOUT_MIN, - .attr = "rated_min", - }, { - .reg = PMBUS_MFR_VOUT_MAX, - .attr = "rated_max", - }, -}; - -static const struct pmbus_sensor_attr voltage_attributes[] = { - { - .reg = PMBUS_READ_VIN, - .class = PSC_VOLTAGE_IN, - .label = "vin", - .func = PMBUS_HAVE_VIN, - .sfunc = PMBUS_HAVE_STATUS_INPUT, - .sreg = PMBUS_STATUS_INPUT, - .gbit = PB_STATUS_VIN_UV, - .limit = vin_limit_attrs, - .nlimit = 0, - }, { - .reg = PMBUS_VIRT_READ_VMON, - .class = PSC_VOLTAGE_IN, - .label = "vmon", - .func = PMBUS_HAVE_VMON, - .sfunc = PMBUS_HAVE_STATUS_VMON, - .sreg = PMBUS_VIRT_STATUS_VMON, - .limit = vmon_limit_attrs, - .nlimit = 0, - }, { - .reg = PMBUS_READ_VCAP, - .class = PSC_VOLTAGE_IN, - .label = "vcap", - .func = PMBUS_HAVE_VCAP, - }, { - .reg = PMBUS_READ_VOUT, - .class = PSC_VOLTAGE_OUT, - .label = "vout", - .paged = true, - .func = PMBUS_HAVE_VOUT, - .sfunc = PMBUS_HAVE_STATUS_VOUT, - .sreg = PMBUS_STATUS_VOUT, - .gbit = PB_STATUS_VOUT_OV, - .limit = vout_limit_attrs, - .nlimit = 0, - } -}; - -/* Current attributes */ - -static const struct pmbus_limit_attr iin_limit_attrs[] = { - { - .reg = PMBUS_IIN_OC_WARN_LIMIT, - .attr = "max", - .alarm = "max_alarm", - .sbit = PB_IIN_OC_WARNING, - }, { - .reg = PMBUS_IIN_OC_FAULT_LIMIT, - .attr = "crit", - .alarm = "crit_alarm", - .sbit = PB_IIN_OC_FAULT, - }, { - .reg = PMBUS_VIRT_READ_IIN_AVG, - .update = true, - .attr = "average", - }, { - .reg = PMBUS_VIRT_READ_IIN_MIN, - .update = true, - .attr = "lowest", - }, { - .reg = PMBUS_VIRT_READ_IIN_MAX, - .update = true, - .attr = "highest", - }, { - .reg = PMBUS_VIRT_RESET_IIN_HISTORY, - .attr = "reset_history", - }, { - .reg = PMBUS_MFR_IIN_MAX, - .attr = "rated_max", - }, -}; - -static const struct pmbus_limit_attr iout_limit_attrs[] = { - { - .reg = PMBUS_IOUT_OC_WARN_LIMIT, - .attr = "max", - .alarm = "max_alarm", - .sbit = PB_IOUT_OC_WARNING, - }, { - .reg = PMBUS_IOUT_UC_FAULT_LIMIT, - .attr = "lcrit", - .alarm = "lcrit_alarm", - .sbit = PB_IOUT_UC_FAULT, - }, { - .reg = PMBUS_IOUT_OC_FAULT_LIMIT, - .attr = "crit", - .alarm = "crit_alarm", - .sbit = PB_IOUT_OC_FAULT, - }, { - .reg = PMBUS_VIRT_READ_IOUT_AVG, - .update = true, - .attr = "average", - }, { - .reg = PMBUS_VIRT_READ_IOUT_MIN, - .update = true, - .attr = "lowest", - }, { - .reg = PMBUS_VIRT_READ_IOUT_MAX, - .update = true, - .attr = "highest", - }, { - .reg = PMBUS_VIRT_RESET_IOUT_HISTORY, - .attr = "reset_history", - }, { - .reg = PMBUS_MFR_IOUT_MAX, - .attr = "rated_max", - }, -}; - -static const struct pmbus_sensor_attr current_attributes[] = { - { - .reg = PMBUS_READ_IIN, - .class = PSC_CURRENT_IN, - .label = "iin", - .func = PMBUS_HAVE_IIN, - .sfunc = PMBUS_HAVE_STATUS_INPUT, - .sreg = PMBUS_STATUS_INPUT, - .gbit = PB_STATUS_INPUT, - .limit = iin_limit_attrs, - .nlimit = 0, - }, { - .reg = PMBUS_READ_IOUT, - .class = PSC_CURRENT_OUT, - .label = "iout", - .paged = true, - .func = PMBUS_HAVE_IOUT, - .sfunc = PMBUS_HAVE_STATUS_IOUT, - .sreg = PMBUS_STATUS_IOUT, - .gbit = PB_STATUS_IOUT_OC, - .limit = iout_limit_attrs, - .nlimit = 0, - } -}; - -/* Power attributes */ - -static const struct pmbus_limit_attr pin_limit_attrs[] = { - { - .reg = PMBUS_PIN_OP_WARN_LIMIT, - .attr = "max", - .alarm = "alarm", - .sbit = PB_PIN_OP_WARNING, - }, { - .reg = PMBUS_VIRT_READ_PIN_AVG, - .update = true, - .attr = "average", - }, { - .reg = PMBUS_VIRT_READ_PIN_MIN, - .update = true, - .attr = "input_lowest", - }, { - .reg = PMBUS_VIRT_READ_PIN_MAX, - .update = true, - .attr = "input_highest", - }, { - .reg = PMBUS_VIRT_RESET_PIN_HISTORY, - .attr = "reset_history", - }, { - .reg = PMBUS_MFR_PIN_MAX, - .attr = "rated_max", - }, -}; - -static const struct pmbus_limit_attr pout_limit_attrs[] = { - { - .reg = PMBUS_POUT_MAX, - .attr = "cap", - .alarm = "cap_alarm", - .sbit = PB_POWER_LIMITING, - }, { - .reg = PMBUS_POUT_OP_WARN_LIMIT, - .attr = "max", - .alarm = "max_alarm", - .sbit = PB_POUT_OP_WARNING, - }, { - .reg = PMBUS_POUT_OP_FAULT_LIMIT, - .attr = "crit", - .alarm = "crit_alarm", - .sbit = PB_POUT_OP_FAULT, - }, { - .reg = PMBUS_VIRT_READ_POUT_AVG, - .update = true, - .attr = "average", - }, { - .reg = PMBUS_VIRT_READ_POUT_MIN, - .update = true, - .attr = "input_lowest", - }, { - .reg = PMBUS_VIRT_READ_POUT_MAX, - .update = true, - .attr = "input_highest", - }, { - .reg = PMBUS_VIRT_RESET_POUT_HISTORY, - .attr = "reset_history", - }, { - .reg = PMBUS_MFR_POUT_MAX, - .attr = "rated_max", - }, -}; - -static const struct pmbus_sensor_attr power_attributes[] = { - { - .reg = PMBUS_READ_PIN, - .class = PSC_POWER, - .label = "pin", - .func = PMBUS_HAVE_PIN, - .sfunc = PMBUS_HAVE_STATUS_INPUT, - .sreg = PMBUS_STATUS_INPUT, - .gbit = PB_STATUS_INPUT, - .limit = pin_limit_attrs, - .nlimit = 0, - }, { - .reg = PMBUS_READ_POUT, - .class = PSC_POWER, - .label = "pout", - .paged = true, - .func = PMBUS_HAVE_POUT, - .sfunc = PMBUS_HAVE_STATUS_IOUT, - .sreg = PMBUS_STATUS_IOUT, - .limit = pout_limit_attrs, - .nlimit = 0, - } -}; - -/* Temperature atributes */ - -static const struct pmbus_limit_attr temp_limit_attrs[] = { - { - .reg = PMBUS_UT_WARN_LIMIT, - .low = true, - .attr = "min", - .alarm = "min_alarm", - .sbit = PB_TEMP_UT_WARNING, - }, { - .reg = PMBUS_UT_FAULT_LIMIT, - .low = true, - .attr = "lcrit", - .alarm = "lcrit_alarm", - .sbit = PB_TEMP_UT_FAULT, - }, { - .reg = PMBUS_OT_WARN_LIMIT, - .attr = "max", - .alarm = "max_alarm", - .sbit = PB_TEMP_OT_WARNING, - }, { - .reg = PMBUS_OT_FAULT_LIMIT, - .attr = "crit", - .alarm = "crit_alarm", - .sbit = PB_TEMP_OT_FAULT, - }, { - .reg = PMBUS_VIRT_READ_TEMP_MIN, - .attr = "lowest", - }, { - .reg = PMBUS_VIRT_READ_TEMP_AVG, - .attr = "average", - }, { - .reg = PMBUS_VIRT_READ_TEMP_MAX, - .attr = "highest", - }, { - .reg = PMBUS_VIRT_RESET_TEMP_HISTORY, - .attr = "reset_history", - }, { - .reg = PMBUS_MFR_MAX_TEMP_1, - .attr = "rated_max", - }, -}; - -static const struct pmbus_limit_attr temp_limit_attrs2[] = { - { - .reg = PMBUS_UT_WARN_LIMIT, - .low = true, - .attr = "min", - .alarm = "min_alarm", - .sbit = PB_TEMP_UT_WARNING, - }, { - .reg = PMBUS_UT_FAULT_LIMIT, - .low = true, - .attr = "lcrit", - .alarm = "lcrit_alarm", - .sbit = PB_TEMP_UT_FAULT, - }, { - .reg = PMBUS_OT_WARN_LIMIT, - .attr = "max", - .alarm = "max_alarm", - .sbit = PB_TEMP_OT_WARNING, - }, { - .reg = PMBUS_OT_FAULT_LIMIT, - .attr = "crit", - .alarm = "crit_alarm", - .sbit = PB_TEMP_OT_FAULT, - }, { - .reg = PMBUS_VIRT_READ_TEMP2_MIN, - .attr = "lowest", - }, { - .reg = PMBUS_VIRT_READ_TEMP2_AVG, - .attr = "average", - }, { - .reg = PMBUS_VIRT_READ_TEMP2_MAX, - .attr = "highest", - }, { - .reg = PMBUS_VIRT_RESET_TEMP2_HISTORY, - .attr = "reset_history", - }, { - .reg = PMBUS_MFR_MAX_TEMP_2, - .attr = "rated_max", - }, -}; - -static const struct pmbus_limit_attr temp_limit_attrs3[] = { - { - .reg = PMBUS_UT_WARN_LIMIT, - .low = true, - .attr = "min", - .alarm = "min_alarm", - .sbit = PB_TEMP_UT_WARNING, - }, { - .reg = PMBUS_UT_FAULT_LIMIT, - .low = true, - .attr = "lcrit", - .alarm = "lcrit_alarm", - .sbit = PB_TEMP_UT_FAULT, - }, { - .reg = PMBUS_OT_WARN_LIMIT, - .attr = "max", - .alarm = "max_alarm", - .sbit = PB_TEMP_OT_WARNING, - }, { - .reg = PMBUS_OT_FAULT_LIMIT, - .attr = "crit", - .alarm = "crit_alarm", - .sbit = PB_TEMP_OT_FAULT, - }, { - .reg = PMBUS_MFR_MAX_TEMP_3, - .attr = "rated_max", - }, -}; - -static const struct pmbus_sensor_attr temp_attributes[] = { - { - .reg = PMBUS_READ_TEMPERATURE_1, - .class = PSC_TEMPERATURE, - .paged = true, - .update = true, - .compare = true, - .func = PMBUS_HAVE_TEMP, - .sfunc = PMBUS_HAVE_STATUS_TEMP, - .sreg = PMBUS_STATUS_TEMPERATURE, - .gbit = PB_STATUS_TEMPERATURE, - .limit = temp_limit_attrs, - .nlimit = 0, - }, { - .reg = PMBUS_READ_TEMPERATURE_2, - .class = PSC_TEMPERATURE, - .paged = true, - .update = true, - .compare = true, - .func = PMBUS_HAVE_TEMP2, - .sfunc = PMBUS_HAVE_STATUS_TEMP, - .sreg = PMBUS_STATUS_TEMPERATURE, - .gbit = PB_STATUS_TEMPERATURE, - .limit = temp_limit_attrs2, - .nlimit = 0, - }, { - .reg = PMBUS_READ_TEMPERATURE_3, - .class = PSC_TEMPERATURE, - .paged = true, - .update = true, - .compare = true, - .func = PMBUS_HAVE_TEMP3, - .sfunc = PMBUS_HAVE_STATUS_TEMP, - .sreg = PMBUS_STATUS_TEMPERATURE, - .gbit = PB_STATUS_TEMPERATURE, - .limit = temp_limit_attrs3, - .nlimit = 0, - } -}; - -static const int pmbus_fan_registers[] = { - PMBUS_READ_FAN_SPEED_1, - PMBUS_READ_FAN_SPEED_2, - PMBUS_READ_FAN_SPEED_3, - PMBUS_READ_FAN_SPEED_4 -}; - -static const int pmbus_fan_status_registers[] = { - PMBUS_STATUS_FAN_12, - PMBUS_STATUS_FAN_12, - PMBUS_STATUS_FAN_34, - PMBUS_STATUS_FAN_34 -}; - -static const u32 pmbus_fan_flags[] = { - PMBUS_HAVE_FAN12, - PMBUS_HAVE_FAN12, - PMBUS_HAVE_FAN34, - PMBUS_HAVE_FAN34 -}; - -static const u32 pmbus_fan_status_flags[] = { - PMBUS_HAVE_STATUS_FAN12, - PMBUS_HAVE_STATUS_FAN12, - PMBUS_HAVE_STATUS_FAN34, - PMBUS_HAVE_STATUS_FAN34 -}; - -/* Fans */ - -/* Precondition: FAN_CONFIG_x_y and FAN_COMMAND_x must exist for the fan ID */ -static int pmbus_add_fan_ctrl(struct i2c_client *client, - struct pmbus_data *data, int index, int page, int id, - u8 config) -{ - struct pmbus_sensor *sensor; - - sensor = pmbus_add_sensor(data, "fan", "target", index, page, - 0xff, PMBUS_VIRT_FAN_TARGET_1 + id, PSC_FAN, - false, false, true); - - if (!sensor) - return -ENOMEM; - - if (!((data->info->func[page] & PMBUS_HAVE_PWM12) || - (data->info->func[page] & PMBUS_HAVE_PWM34))) - return 0; - - sensor = pmbus_add_sensor(data, "pwm", NULL, index, page, - 0xff, PMBUS_VIRT_PWM_1 + id, PSC_PWM, - false, false, true); - - if (!sensor) - return -ENOMEM; - - sensor = pmbus_add_sensor(data, "pwm", "enable", index, page, - 0xff, PMBUS_VIRT_PWM_ENABLE_1 + id, PSC_PWM, - true, false, false); - - if (!sensor) - return -ENOMEM; - - return 0; -} - -static int pmbus_add_fan_attributes(struct i2c_client *client, - struct pmbus_data *data) -{ - const struct pmbus_driver_info *info = data->info; - int index = 1; - int page; - int ret; - - for (page = 0; page < info->pages; page++) { - int f; - - for (f = 0; f < ARRAY_SIZE(pmbus_fan_registers); f++) { - int regval; - - if (!(info->func[page] & pmbus_fan_flags[f])) - break; - - if (!wb_pmbus_check_word_register(client, page, - pmbus_fan_registers[f])) - break; - - /* - * Skip fan if not installed. - * Each fan configuration register covers multiple fans, - * so we have to do some magic. - */ - regval = _pmbus_read_byte_data(client, page, - pmbus_fan_config_registers[f]); - if (regval < 0 || - (!(regval & (PB_FAN_1_INSTALLED >> ((f & 1) * 4))))) - continue; - - if (pmbus_add_sensor(data, "fan", "input", index, - page, 0xff, pmbus_fan_registers[f], - PSC_FAN, true, true, true) == NULL) - return -ENOMEM; - - /* Fan control */ - if (wb_pmbus_check_word_register(client, page, - pmbus_fan_command_registers[f])) { - ret = pmbus_add_fan_ctrl(client, data, index, - page, f, regval); - if (ret < 0) - return ret; - } - - /* - * Each fan status register covers multiple fans, - * so we have to do some magic. - */ - if ((info->func[page] & pmbus_fan_status_flags[f]) && - wb_pmbus_check_byte_register(client, - page, pmbus_fan_status_registers[f])) { - int reg; - - if (f > 1) /* fan 3, 4 */ - reg = PMBUS_STATUS_FAN_34; - else - reg = PMBUS_STATUS_FAN_12; - ret = pmbus_add_boolean(data, "fan", - "alarm", index, NULL, NULL, page, reg, - PB_FAN_FAN1_WARNING >> (f & 1)); - if (ret) - return ret; - ret = pmbus_add_boolean(data, "fan", - "fault", index, NULL, NULL, page, reg, - PB_FAN_FAN1_FAULT >> (f & 1)); - if (ret) - return ret; - } - index++; - } - } - return 0; -} - -struct pmbus_samples_attr { - int reg; - char *name; -}; - -struct pmbus_samples_reg { - int page; - struct pmbus_samples_attr *attr; - struct device_attribute dev_attr; -}; - -static struct pmbus_samples_attr pmbus_samples_registers[] = { - { - .reg = PMBUS_VIRT_SAMPLES, - .name = "samples", - }, { - .reg = PMBUS_VIRT_IN_SAMPLES, - .name = "in_samples", - }, { - .reg = PMBUS_VIRT_CURR_SAMPLES, - .name = "curr_samples", - }, { - .reg = PMBUS_VIRT_POWER_SAMPLES, - .name = "power_samples", - }, { - .reg = PMBUS_VIRT_TEMP_SAMPLES, - .name = "temp_samples", - } -}; - -#define to_samples_reg(x) container_of(x, struct pmbus_samples_reg, dev_attr) - -static ssize_t pmbus_show_samples(struct device *dev, - struct device_attribute *devattr, char *buf) -{ - int val; - struct i2c_client *client = to_i2c_client(dev->parent); - struct pmbus_samples_reg *reg = to_samples_reg(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - - mutex_lock(&data->update_lock); - val = _pmbus_read_word_data(client, reg->page, 0xff, reg->attr->reg); - mutex_unlock(&data->update_lock); - if (val < 0) - return val; - - return snprintf(buf, PAGE_SIZE, "%d\n", val); -} - -static ssize_t pmbus_set_samples(struct device *dev, - struct device_attribute *devattr, - const char *buf, size_t count) -{ - int ret; - long val; - struct i2c_client *client = to_i2c_client(dev->parent); - struct pmbus_samples_reg *reg = to_samples_reg(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - - if (kstrtol(buf, 0, &val) < 0) - return -EINVAL; - - mutex_lock(&data->update_lock); - ret = _pmbus_write_word_data(client, reg->page, reg->attr->reg, val); - mutex_unlock(&data->update_lock); - - return ret ? : count; -} - -static int pmbus_add_samples_attr(struct pmbus_data *data, int page, - struct pmbus_samples_attr *attr) -{ - struct pmbus_samples_reg *reg; - - reg = devm_kzalloc(data->dev, sizeof(*reg), GFP_KERNEL); - if (!reg) - return -ENOMEM; - - reg->attr = attr; - reg->page = page; - - pmbus_dev_attr_init(®->dev_attr, attr->name, 0644, - pmbus_show_samples, pmbus_set_samples); - - return pmbus_add_attribute(data, ®->dev_attr.attr); -} - -static int pmbus_add_samples_attributes(struct i2c_client *client, - struct pmbus_data *data) -{ - const struct pmbus_driver_info *info = data->info; - int s; - - if (!(info->func[0] & PMBUS_HAVE_SAMPLES)) - return 0; - - for (s = 0; s < ARRAY_SIZE(pmbus_samples_registers); s++) { - struct pmbus_samples_attr *attr; - int ret; - - attr = &pmbus_samples_registers[s]; - if (!wb_pmbus_check_word_register(client, 0, attr->reg)) - continue; - - ret = pmbus_add_samples_attr(data, 0, attr); - if (ret) - return ret; - } - - return 0; -} - -static int pmbus_find_attributes(struct i2c_client *client, - struct pmbus_data *data) -{ - int ret; - - /* Voltage sensors */ - ret = pmbus_add_sensor_attrs(client, data, "in", voltage_attributes, - ARRAY_SIZE(voltage_attributes)); - if (ret) - return ret; - - /* Current sensors */ - ret = pmbus_add_sensor_attrs(client, data, "curr", current_attributes, - ARRAY_SIZE(current_attributes)); - if (ret) - return ret; - - /* Power sensors */ - ret = pmbus_add_sensor_attrs(client, data, "power", power_attributes, - ARRAY_SIZE(power_attributes)); - if (ret) - return ret; - - /* Temperature sensors */ - ret = pmbus_add_sensor_attrs(client, data, "temp", temp_attributes, - ARRAY_SIZE(temp_attributes)); - if (ret) - return ret; - - /* Fans */ - ret = pmbus_add_fan_attributes(client, data); - if (ret) - return ret; - - ret = pmbus_add_samples_attributes(client, data); - return ret; -} - -/* - * Identify chip parameters. - * This function is called for all chips. - */ -static int pmbus_identify_common(struct i2c_client *client, - struct pmbus_data *data, int page) -{ - int vout_mode = -1; - - if (wb_pmbus_check_byte_register(client, page, PMBUS_VOUT_MODE)) - vout_mode = _pmbus_read_byte_data(client, page, - PMBUS_VOUT_MODE); - if (vout_mode >= 0 && vout_mode != 0xff) { - /* - * Not all chips support the VOUT_MODE command, - * so a failure to read it is not an error. - */ - switch (vout_mode >> 5) { - case 0: /* linear mode */ - if (data->info->format[PSC_VOLTAGE_OUT] != linear) - return -ENODEV; - - data->exponent[page] = ((s8)(vout_mode << 3)) >> 3; - break; - case 1: /* VID mode */ - if (data->info->format[PSC_VOLTAGE_OUT] != vid) - return -ENODEV; - break; - case 2: /* direct mode */ - if (data->info->format[PSC_VOLTAGE_OUT] != direct) - return -ENODEV; - break; - default: - return -ENODEV; - } - } - - pmbus_clear_fault_page(client, page); - return 0; -} - -static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data, - struct pmbus_driver_info *info) -{ - struct device *dev = &client->dev; - int page, ret, i; - - /* - * Some PMBus chips don't support PMBUS_STATUS_WORD, so try - * to use PMBUS_STATUS_BYTE instead if that is the case. - * Bail out if both registers are not supported. - */ - for(i = 0; i < PMBUS_RETRY_TIME; i++) { - data->read_status = pmbus_read_status_word; - ret = i2c_smbus_read_word_data(client, PMBUS_STATUS_WORD); - if (ret < 0 || ret == 0xffff) { - data->read_status = pmbus_read_status_byte; - ret = i2c_smbus_read_byte_data(client, PMBUS_STATUS_BYTE); - if (ret < 0 || ret == 0xff) { - usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); - continue; - } - } else { - data->has_status_word = true; - } - break; - } - - if(i == PMBUS_RETRY_TIME) { - dev_err(dev, "PMBus status register not found\n"); - return -ENODEV; - } - - /* Enable PEC if the controller supports it */ - for(i = 0; i < PMBUS_RETRY_TIME; i++) { - ret = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY); - if (ret >= 0) { - break; - } - usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); - } - - if (ret >= 0 && (ret & PB_CAPABILITY_ERROR_CHECK)) - client->flags |= I2C_CLIENT_PEC; - - /* - * Check if the chip is write protected. If it is, we can not clear - * faults, and we should not try it. Also, in that case, writes into - * limit registers need to be disabled. - */ - for(i = 0; i < PMBUS_RETRY_TIME; i++) { - ret = i2c_smbus_read_byte_data(client, PMBUS_WRITE_PROTECT); - if (ret >= 0) { - break; - } - usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); - } - - if (ret > 0 && (ret & PB_WP_ANY)) - data->flags |= PMBUS_WRITE_PROTECTED | PMBUS_SKIP_STATUS_CHECK; - - if (data->info->pages) - wb_pmbus_clear_faults(client); - else - pmbus_clear_fault_page(client, -1); - - if (info->identify) { - ret = (*info->identify)(client, info); - if (ret < 0) { - dev_err(dev, "Chip identification failed\n"); - return ret; - } - } - - if (info->pages <= 0 || info->pages > PMBUS_PAGES) { - dev_err(dev, "Bad number of PMBus pages: %d\n", info->pages); - return -ENODEV; - } - - for (page = 0; page < info->pages; page++) { - ret = pmbus_identify_common(client, data, page); - if (ret < 0) { - dev_err(dev, "Failed to identify chip capabilities\n"); - return ret; - } - } - return 0; -} - -#if IS_ENABLED(CONFIG_REGULATOR) -static int pmbus_regulator_is_enabled(struct regulator_dev *rdev) -{ - struct device *dev = rdev_get_dev(rdev); - struct i2c_client *client = to_i2c_client(dev->parent); - u8 page = rdev_get_id(rdev); - int ret; - - ret = wb_pmbus_read_byte_data(client, page, PMBUS_OPERATION); - if (ret < 0) - return ret; - - return !!(ret & PB_OPERATION_CONTROL_ON); -} - -static int _pmbus_regulator_on_off(struct regulator_dev *rdev, bool enable) -{ - struct device *dev = rdev_get_dev(rdev); - struct i2c_client *client = to_i2c_client(dev->parent); - u8 page = rdev_get_id(rdev); - - return wb_pmbus_update_byte_data(client, page, PMBUS_OPERATION, - PB_OPERATION_CONTROL_ON, - enable ? PB_OPERATION_CONTROL_ON : 0); -} - -static int pmbus_regulator_enable(struct regulator_dev *rdev) -{ - return _pmbus_regulator_on_off(rdev, 1); -} - -static int pmbus_regulator_disable(struct regulator_dev *rdev) -{ - return _pmbus_regulator_on_off(rdev, 0); -} - -const struct regulator_ops wb_pmbus_regulator_ops = { - .enable = pmbus_regulator_enable, - .disable = pmbus_regulator_disable, - .is_enabled = pmbus_regulator_is_enabled, -}; -EXPORT_SYMBOL_GPL(wb_pmbus_regulator_ops); - -static int pmbus_regulator_register(struct pmbus_data *data) -{ - struct device *dev = data->dev; - const struct pmbus_driver_info *info = data->info; - const struct pmbus_platform_data *pdata = dev_get_platdata(dev); - struct regulator_dev *rdev; - int i; - - for (i = 0; i < info->num_regulators; i++) { - struct regulator_config config = { }; - - config.dev = dev; - config.driver_data = data; - - if (pdata && pdata->reg_init_data) - config.init_data = &pdata->reg_init_data[i]; - - rdev = devm_regulator_register(dev, &info->reg_desc[i], - &config); - if (IS_ERR(rdev)) { - dev_err(dev, "Failed to register %s regulator\n", - info->reg_desc[i].name); - return PTR_ERR(rdev); - } - } - - return 0; -} -#else -static int pmbus_regulator_register(struct pmbus_data *data) -{ - return 0; -} -#endif - -static struct dentry *pmbus_debugfs_dir; /* pmbus debugfs directory */ - -#if IS_ENABLED(CONFIG_DEBUG_FS) -static int pmbus_debugfs_get(void *data, u64 *val) -{ - int rc; - struct pmbus_debugfs_entry *entry = data; - - rc = _pmbus_read_byte_data(entry->client, entry->page, entry->reg); - if (rc < 0) - return rc; - - *val = rc; - - return 0; -} -DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops, pmbus_debugfs_get, NULL, - "0x%02llx\n"); - -static int pmbus_debugfs_get_status(void *data, u64 *val) -{ - int rc; - struct pmbus_debugfs_entry *entry = data; - struct pmbus_data *pdata = i2c_get_clientdata(entry->client); - - rc = pdata->read_status(entry->client, entry->page); - if (rc < 0) - return rc; - - *val = rc; - - return 0; -} -DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops_status, pmbus_debugfs_get_status, - NULL, "0x%04llx\n"); - -static int pmbus_debugfs_get_pec(void *data, u64 *val) -{ - struct i2c_client *client = data; - - *val = !!(client->flags & I2C_CLIENT_PEC); - - return 0; -} - -static int pmbus_debugfs_set_pec(void *data, u64 val) -{ - int rc; - struct i2c_client *client = data; - - if (!val) { - client->flags &= ~I2C_CLIENT_PEC; - return 0; - } - - if (val != 1) - return -EINVAL; - - rc = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY); - if (rc < 0) - return rc; - - if (!(rc & PB_CAPABILITY_ERROR_CHECK)) - return -EOPNOTSUPP; - - client->flags |= I2C_CLIENT_PEC; - - return 0; -} -DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops_pec, pmbus_debugfs_get_pec, - pmbus_debugfs_set_pec, "%llu\n"); - -static int pmbus_init_debugfs(struct i2c_client *client, - struct pmbus_data *data) -{ - int i, idx = 0; - char name[PMBUS_NAME_SIZE]; - struct pmbus_debugfs_entry *entries; - - if (!pmbus_debugfs_dir) - return -ENODEV; - - /* - * Create the debugfs directory for this device. Use the hwmon device - * name to avoid conflicts (hwmon numbers are globally unique). - */ - data->debugfs = debugfs_create_dir(dev_name(data->hwmon_dev), - pmbus_debugfs_dir); - if (IS_ERR_OR_NULL(data->debugfs)) { - data->debugfs = NULL; - return -ENODEV; - } - - /* Allocate the max possible entries we need. */ - entries = devm_kcalloc(data->dev, - data->info->pages * 10, sizeof(*entries), - GFP_KERNEL); - if (!entries) - return -ENOMEM; - - debugfs_create_file("pec", 0664, data->debugfs, client, - &pmbus_debugfs_ops_pec); - - for (i = 0; i < data->info->pages; ++i) { - /* Check accessibility of status register if it's not page 0 */ - if (!i || pmbus_check_status_register(client, i)) { - /* No need to set reg as we have special read op. */ - entries[idx].client = client; - entries[idx].page = i; - scnprintf(name, PMBUS_NAME_SIZE, "status%d", i); - debugfs_create_file(name, 0444, data->debugfs, - &entries[idx++], - &pmbus_debugfs_ops_status); - } - - if (data->info->func[i] & PMBUS_HAVE_STATUS_VOUT) { - entries[idx].client = client; - entries[idx].page = i; - entries[idx].reg = PMBUS_STATUS_VOUT; - scnprintf(name, PMBUS_NAME_SIZE, "status%d_vout", i); - debugfs_create_file(name, 0444, data->debugfs, - &entries[idx++], - &pmbus_debugfs_ops); - } - - if (data->info->func[i] & PMBUS_HAVE_STATUS_IOUT) { - entries[idx].client = client; - entries[idx].page = i; - entries[idx].reg = PMBUS_STATUS_IOUT; - scnprintf(name, PMBUS_NAME_SIZE, "status%d_iout", i); - debugfs_create_file(name, 0444, data->debugfs, - &entries[idx++], - &pmbus_debugfs_ops); - } - - if (data->info->func[i] & PMBUS_HAVE_STATUS_INPUT) { - entries[idx].client = client; - entries[idx].page = i; - entries[idx].reg = PMBUS_STATUS_INPUT; - scnprintf(name, PMBUS_NAME_SIZE, "status%d_input", i); - debugfs_create_file(name, 0444, data->debugfs, - &entries[idx++], - &pmbus_debugfs_ops); - } - - if (data->info->func[i] & PMBUS_HAVE_STATUS_TEMP) { - entries[idx].client = client; - entries[idx].page = i; - entries[idx].reg = PMBUS_STATUS_TEMPERATURE; - scnprintf(name, PMBUS_NAME_SIZE, "status%d_temp", i); - debugfs_create_file(name, 0444, data->debugfs, - &entries[idx++], - &pmbus_debugfs_ops); - } - - if (wb_pmbus_check_byte_register(client, i, PMBUS_STATUS_CML)) { - entries[idx].client = client; - entries[idx].page = i; - entries[idx].reg = PMBUS_STATUS_CML; - scnprintf(name, PMBUS_NAME_SIZE, "status%d_cml", i); - debugfs_create_file(name, 0444, data->debugfs, - &entries[idx++], - &pmbus_debugfs_ops); - } - - if (wb_pmbus_check_byte_register(client, i, PMBUS_STATUS_OTHER)) { - entries[idx].client = client; - entries[idx].page = i; - entries[idx].reg = PMBUS_STATUS_OTHER; - scnprintf(name, PMBUS_NAME_SIZE, "status%d_other", i); - debugfs_create_file(name, 0444, data->debugfs, - &entries[idx++], - &pmbus_debugfs_ops); - } - - if (wb_pmbus_check_byte_register(client, i, - PMBUS_STATUS_MFR_SPECIFIC)) { - entries[idx].client = client; - entries[idx].page = i; - entries[idx].reg = PMBUS_STATUS_MFR_SPECIFIC; - scnprintf(name, PMBUS_NAME_SIZE, "status%d_mfr", i); - debugfs_create_file(name, 0444, data->debugfs, - &entries[idx++], - &pmbus_debugfs_ops); - } - - if (data->info->func[i] & PMBUS_HAVE_STATUS_FAN12) { - entries[idx].client = client; - entries[idx].page = i; - entries[idx].reg = PMBUS_STATUS_FAN_12; - scnprintf(name, PMBUS_NAME_SIZE, "status%d_fan12", i); - debugfs_create_file(name, 0444, data->debugfs, - &entries[idx++], - &pmbus_debugfs_ops); - } - - if (data->info->func[i] & PMBUS_HAVE_STATUS_FAN34) { - entries[idx].client = client; - entries[idx].page = i; - entries[idx].reg = PMBUS_STATUS_FAN_34; - scnprintf(name, PMBUS_NAME_SIZE, "status%d_fan34", i); - debugfs_create_file(name, 0444, data->debugfs, - &entries[idx++], - &pmbus_debugfs_ops); - } - } - - return 0; -} -#else -static int pmbus_init_debugfs(struct i2c_client *client, - struct pmbus_data *data) -{ - return 0; -} -#endif /* IS_ENABLED(CONFIG_DEBUG_FS) */ - -int wb_pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info) -{ - struct device *dev = &client->dev; - const struct pmbus_platform_data *pdata = dev_get_platdata(dev); - struct pmbus_data *data; - size_t groups_num = 0; - int ret; - - if (!info) - return -ENODEV; - - if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WRITE_BYTE - | I2C_FUNC_SMBUS_BYTE_DATA - | I2C_FUNC_SMBUS_WORD_DATA)) - return -ENODEV; - - data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); - if (!data) - return -ENOMEM; - - if (info->groups) - while (info->groups[groups_num]) - groups_num++; - - data->groups = devm_kcalloc(dev, groups_num + 2, sizeof(void *), - GFP_KERNEL); - if (!data->groups) - return -ENOMEM; - - i2c_set_clientdata(client, data); - mutex_init(&data->update_lock); - data->dev = dev; - - if (pdata) - data->flags = pdata->flags; - data->info = info; - data->currpage = -1; - data->currphase = -1; - - ret = pmbus_init_common(client, data, info); - if (ret < 0) - return ret; - - ret = pmbus_find_attributes(client, data); - if (ret) - return ret; - - /* - * If there are no attributes, something is wrong. - * Bail out instead of trying to register nothing. - */ - if (!data->num_attributes) { - dev_err(dev, "No attributes found\n"); - return -ENODEV; - } - - data->groups[0] = &data->group; - memcpy(data->groups + 1, info->groups, sizeof(void *) * groups_num); - data->hwmon_dev = devm_hwmon_device_register_with_groups(dev, - client->name, data, data->groups); - if (IS_ERR(data->hwmon_dev)) { - dev_err(dev, "Failed to register hwmon device\n"); - return PTR_ERR(data->hwmon_dev); - } - - ret = pmbus_regulator_register(data); - if (ret) - return ret; - - ret = pmbus_init_debugfs(client, data); - if (ret) - dev_warn(dev, "Failed to register debugfs\n"); - - return 0; -} -EXPORT_SYMBOL_GPL(wb_pmbus_do_probe); - -void wb_pmbus_do_remove(struct i2c_client *client) -{ - struct pmbus_data *data = i2c_get_clientdata(client); - - debugfs_remove_recursive(data->debugfs); - - return; -} -EXPORT_SYMBOL_GPL(wb_pmbus_do_remove); - -struct dentry *wb_pmbus_get_debugfs_dir(struct i2c_client *client) -{ - struct pmbus_data *data = i2c_get_clientdata(client); - - return data->debugfs; -} -EXPORT_SYMBOL_GPL(wb_pmbus_get_debugfs_dir); - -static int __init pmbus_core_init(void) -{ - pmbus_debugfs_dir = debugfs_create_dir("pmbus", NULL); - if (IS_ERR(pmbus_debugfs_dir)) - pmbus_debugfs_dir = NULL; - - return 0; -} - -static void __exit pmbus_core_exit(void) -{ - debugfs_remove_recursive(pmbus_debugfs_dir); -} - -module_init(pmbus_core_init); -module_exit(pmbus_core_exit); - -MODULE_AUTHOR("support"); -MODULE_DESCRIPTION("PMBus core driver"); -MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c deleted file mode 100644 index b8d3a024f624..000000000000 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c +++ /dev/null @@ -1,1010 +0,0 @@ -/* tmp401.c - * - * Copyright (C) 2007,2008 Hans de Goede - * Preliminary tmp411 support by: - * Gabriel Konat, Sander Leget, Wouter Willems - * Copyright (C) 2009 Andre Prendel - * - * Cleanup and support for TMP431 and TMP432 by Guenter Roeck - * Copyright (c) 2013 Guenter Roeck - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -/* - * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC. - * - * Note this IC is in some aspect similar to the LM90, but it has quite a - * few differences too, for example the local temp has a higher resolution - * and thus has 16 bits registers for its value and limit instead of 8 bits. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* Addresses to scan */ -/* static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d, - 0x4e, 0x4f, I2C_CLIENT_END }; */ - -enum chips { tmp401, tmp411, tmp431, tmp432, tmp435, tmp461 }; - -/* - * The TMP401 registers, note some registers have different addresses for - * reading and writing - */ -#define TMP401_STATUS (0x02) -#define TMP401_CONFIG_READ (0x03) -#define TMP401_CONFIG_WRITE (0x09) -#define TMP401_CONVERSION_RATE_READ (0x04) -#define TMP401_CONVERSION_RATE_WRITE (0x0A) -#define TMP401_TEMP_CRIT_HYST (0x21) -#define TMP401_MANUFACTURER_ID_REG (0xFE) -#define TMP401_DEVICE_ID_REG (0xFF) -#define TMP401_DEVICE_CAR_REG (0x22) /* Consecutive Alert Register */ - -static const u8 TMP401_TEMP_MSB_READ[7][2] = { - { 0x00, 0x01 }, /* temp */ - { 0x06, 0x08 }, /* low limit */ - { 0x05, 0x07 }, /* high limit */ - { 0x20, 0x19 }, /* therm (crit) limit */ - { 0x30, 0x34 }, /* lowest */ - { 0x32, 0x36 }, /* highest */ - { 0, 0x11 }, /* offset */ -}; - -static const u8 TMP401_TEMP_MSB_WRITE[7][2] = { - { 0, 0 }, /* temp (unused) */ - { 0x0C, 0x0E }, /* low limit */ - { 0x0B, 0x0D }, /* high limit */ - { 0x20, 0x19 }, /* therm (crit) limit */ - { 0x30, 0x34 }, /* lowest */ - { 0x32, 0x36 }, /* highest */ - { 0, 0x11 }, /* offset */ -}; - -static const u8 TMP401_TEMP_LSB[7][2] = { - { 0x15, 0x10 }, /* temp */ - { 0x17, 0x14 }, /* low limit */ - { 0x16, 0x13 }, /* high limit */ - { 0, 0 }, /* therm (crit) limit (unused) */ - { 0x31, 0x35 }, /* lowest */ - { 0x33, 0x37 }, /* highest */ - { 0, 0x12 }, /* offset */ -}; - -static const u8 TMP432_TEMP_MSB_READ[4][3] = { - { 0x00, 0x01, 0x23 }, /* temp */ - { 0x06, 0x08, 0x16 }, /* low limit */ - { 0x05, 0x07, 0x15 }, /* high limit */ - { 0x20, 0x19, 0x1A }, /* therm (crit) limit */ -}; - -static const u8 TMP432_TEMP_MSB_WRITE[4][3] = { - { 0, 0, 0 }, /* temp - unused */ - { 0x0C, 0x0E, 0x16 }, /* low limit */ - { 0x0B, 0x0D, 0x15 }, /* high limit */ - { 0x20, 0x19, 0x1A }, /* therm (crit) limit */ -}; - -static const u8 TMP432_TEMP_LSB[3][3] = { - { 0x29, 0x10, 0x24 }, /* temp */ - { 0x3E, 0x14, 0x18 }, /* low limit */ - { 0x3D, 0x13, 0x17 }, /* high limit */ -}; - -/* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */ -static const u8 TMP432_STATUS_REG[] = { - 0x1b, 0x36, 0x35, 0x37 }; - -/* Flags */ -#define TMP401_CONFIG_RANGE BIT(2) -#define TMP401_CONFIG_SHUTDOWN BIT(6) -#define TMP401_STATUS_LOCAL_CRIT BIT(0) -#define TMP401_STATUS_REMOTE_CRIT BIT(1) -#define TMP401_STATUS_REMOTE_OPEN BIT(2) -#define TMP401_STATUS_REMOTE_LOW BIT(3) -#define TMP401_STATUS_REMOTE_HIGH BIT(4) -#define TMP401_STATUS_LOCAL_LOW BIT(5) -#define TMP401_STATUS_LOCAL_HIGH BIT(6) - -/* On TMP432, each status has its own register */ -#define TMP432_STATUS_LOCAL BIT(0) -#define TMP432_STATUS_REMOTE1 BIT(1) -#define TMP432_STATUS_REMOTE2 BIT(2) - -/* Manufacturer / Device ID's */ -#define TMP401_MANUFACTURER_ID (0x55) -#define TMP401_DEVICE_ID (0x11) -#define TMP411A_DEVICE_ID (0x12) -#define TMP411B_DEVICE_ID (0x13) -#define TMP411C_DEVICE_ID (0x10) -#define TMP431_DEVICE_ID (0x31) -#define TMP432_DEVICE_ID (0x32) -#define TMP435_DEVICE_ID (0x35) - -/* Timeout function bit */ -#define TIMEOUT_STATE_BIT (7) /* 1:enable 0:disable */ -#define TIMEOUT_STATE_EN (1) /* 1:enable */ -#define TIMEOUT_STATE_IEN (0) /* 0:disable */ -#define TIMEOUT_STATE_NA "NA" -#define TMP401_TEMP_INVALID_RETRY_TIMES (3) - -/* input temp threshold check */ -typedef struct tmp401_temp_threshold_s { - int chip_type; - int temp_max; - int temp_min; -} tmp401_temp_threshold_t; - -static tmp401_temp_threshold_t g_tmp401_input_threshold_info[] = { - { - .chip_type = tmp411, - .temp_max = 127000, - .temp_min = -55000, - }, -}; - -/* - * Driver data (common to all clients) - */ - -static const struct i2c_device_id tmp401_id[] = { - { "wb_tmp401", tmp401 }, - { "wb_tmp411", tmp411 }, - { "wb_tmp431", tmp431 }, - { "wb_tmp432", tmp432 }, - { "wb_tmp435", tmp435 }, - { "wb_tmp461", tmp461 }, - { } -}; -MODULE_DEVICE_TABLE(i2c, tmp401_id); - -/* - * Client data (each client gets its own) - */ - -struct tmp401_data { - struct i2c_client *client; - const struct attribute_group *groups[3]; - struct mutex update_lock; - char valid; /* zero until following fields are valid */ - unsigned long last_updated; /* in jiffies */ - enum chips kind; - - unsigned int update_interval; /* in milliseconds */ - - /* register values */ - u8 status[4]; - u8 config; - u16 temp[7][3]; - u8 temp_crit_hyst; -}; - -/* - * Sysfs attr show / store functions - */ - -static int tmp401_register_to_temp(u16 reg, u8 config) -{ - int temp = reg; - - if (config & TMP401_CONFIG_RANGE) - temp -= 64 * 256; - - return DIV_ROUND_CLOSEST(temp * 125, 32); -} - -static u16 tmp401_temp_to_register(long temp, u8 config, int zbits) -{ - if (config & TMP401_CONFIG_RANGE) { - temp = clamp_val(temp, -64000, 191000); - temp += 64000; - } else - temp = clamp_val(temp, 0, 127000); - - return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits; -} - -static int tmp401_update_device_reg16(struct i2c_client *client, - struct tmp401_data *data) -{ - int i, j, val; - int num_regs = data->kind == tmp411 ? 6 : 4; - int num_sensors = data->kind == tmp432 ? 3 : 2; - - for (i = 0; i < num_sensors; i++) { /* local / r1 / r2 */ - for (j = 0; j < num_regs; j++) { /* temp / low / ... */ - u8 regaddr; - /* - * High byte must be read first immediately followed - * by the low byte - */ - regaddr = data->kind == tmp432 ? - TMP432_TEMP_MSB_READ[j][i] : - TMP401_TEMP_MSB_READ[j][i]; - val = i2c_smbus_read_byte_data(client, regaddr); - if (val < 0) - return val; - data->temp[j][i] = val << 8; - if (j == 3) /* crit is msb only */ - continue; - regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[j][i] - : TMP401_TEMP_LSB[j][i]; - val = i2c_smbus_read_byte_data(client, regaddr); - if (val < 0) - return val; - data->temp[j][i] |= val; - } - } - return 0; -} - -static struct tmp401_data *tmp401_update_device(struct device *dev) -{ - struct tmp401_data *data = dev_get_drvdata(dev); - struct i2c_client *client = data->client; - struct tmp401_data *ret = data; - int i, val; - unsigned long next_update; - - mutex_lock(&data->update_lock); - - next_update = data->last_updated + - msecs_to_jiffies(data->update_interval); - if (time_after(jiffies, next_update) || !data->valid) { - if (data->kind != tmp432) { - /* - * The driver uses the TMP432 status format internally. - * Convert status to TMP432 format for other chips. - */ - val = i2c_smbus_read_byte_data(client, TMP401_STATUS); - if (val < 0) { - ret = ERR_PTR(val); - goto abort; - } - data->status[0] = - (val & TMP401_STATUS_REMOTE_OPEN) >> 1; - data->status[1] = - ((val & TMP401_STATUS_REMOTE_LOW) >> 2) | - ((val & TMP401_STATUS_LOCAL_LOW) >> 5); - data->status[2] = - ((val & TMP401_STATUS_REMOTE_HIGH) >> 3) | - ((val & TMP401_STATUS_LOCAL_HIGH) >> 6); - data->status[3] = val & (TMP401_STATUS_LOCAL_CRIT - | TMP401_STATUS_REMOTE_CRIT); - } else { - for (i = 0; i < ARRAY_SIZE(data->status); i++) { - val = i2c_smbus_read_byte_data(client, - TMP432_STATUS_REG[i]); - if (val < 0) { - ret = ERR_PTR(val); - goto abort; - } - data->status[i] = val; - } - } - - val = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); - if (val < 0) { - ret = ERR_PTR(val); - goto abort; - } - data->config = val; - val = tmp401_update_device_reg16(client, data); - if (val < 0) { - ret = ERR_PTR(val); - goto abort; - } - val = i2c_smbus_read_byte_data(client, TMP401_TEMP_CRIT_HYST); - if (val < 0) { - ret = ERR_PTR(val); - goto abort; - } - data->temp_crit_hyst = val; - - data->last_updated = jiffies; - data->valid = 1; - } - -abort: - mutex_unlock(&data->update_lock); - return ret; -} - -static int tmp401_input_temp_check(struct tmp401_data *data, int input_val) -{ - int i, size; - - size = ARRAY_SIZE(g_tmp401_input_threshold_info); - - for (i = 0; i < size; i++) { - if (g_tmp401_input_threshold_info[i].chip_type == data->kind) { - if ((input_val > g_tmp401_input_threshold_info[i].temp_max) - || (input_val < g_tmp401_input_threshold_info[i].temp_min)) { - dev_dbg(&data->client->dev, "input temp: %d not in range[%d, %d]\n", - input_val, g_tmp401_input_threshold_info[i].temp_min, - g_tmp401_input_threshold_info[i].temp_max); - return -EINVAL; - } - dev_dbg(&data->client->dev, "input temp: %d in range[%d, %d]", input_val, - g_tmp401_input_threshold_info[i].temp_min, g_tmp401_input_threshold_info[i].temp_max); - return 0; - } - } - return 0; -} - -static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, char *buf) -{ - int nr, index, i, value, ret; - struct tmp401_data *data; - struct i2c_client *client; - - data = dev_get_drvdata(dev); - client = data->client; - - nr = to_sensor_dev_attr_2(devattr)->nr; - index = to_sensor_dev_attr_2(devattr)->index; - - for (i = 0; i < TMP401_TEMP_INVALID_RETRY_TIMES; i++) { - data = tmp401_update_device(dev); - if (IS_ERR(data)) { - return PTR_ERR(data); - } - value = tmp401_register_to_temp(data->temp[nr][index], data->config); - if (nr != 0) { /* not input temp, return value */ - return sprintf(buf, "%d\n", value); - } - /* nr == 0 is temp input, do input_temp_check */ - ret = tmp401_input_temp_check(data, value); - if (ret == 0) { /* input temp check ok */ - return sprintf(buf, "%d\n", value); - } - if ((i + 1) < TMP401_TEMP_INVALID_RETRY_TIMES) { - msleep(data->update_interval); - } - } - dev_info(&client->dev, "temp%d_input value: %d invalid\n", index + 1, value); - return -EINVAL; -} - -static ssize_t show_temp_crit_hyst(struct device *dev, - struct device_attribute *devattr, char *buf) -{ - int temp, index = to_sensor_dev_attr(devattr)->index; - struct tmp401_data *data = tmp401_update_device(dev); - - if (IS_ERR(data)) - return PTR_ERR(data); - - mutex_lock(&data->update_lock); - temp = tmp401_register_to_temp(data->temp[3][index], data->config); - temp -= data->temp_crit_hyst * 1000; - mutex_unlock(&data->update_lock); - - return sprintf(buf, "%d\n", temp); -} - -static ssize_t show_status(struct device *dev, - struct device_attribute *devattr, char *buf) -{ - int nr = to_sensor_dev_attr_2(devattr)->nr; - int mask = to_sensor_dev_attr_2(devattr)->index; - struct tmp401_data *data = tmp401_update_device(dev); - - if (IS_ERR(data)) - return PTR_ERR(data); - - return sprintf(buf, "%d\n", !!(data->status[nr] & mask)); -} - -static ssize_t store_temp(struct device *dev, struct device_attribute *devattr, - const char *buf, size_t count) -{ - int nr = to_sensor_dev_attr_2(devattr)->nr; - int index = to_sensor_dev_attr_2(devattr)->index; - struct tmp401_data *data = dev_get_drvdata(dev); - struct i2c_client *client = data->client; - long val; - u16 reg; - u8 regaddr; - - if (kstrtol(buf, 10, &val)) - return -EINVAL; - - reg = tmp401_temp_to_register(val, data->config, nr == 3 ? 8 : 4); - - mutex_lock(&data->update_lock); - - regaddr = data->kind == tmp432 ? TMP432_TEMP_MSB_WRITE[nr][index] - : TMP401_TEMP_MSB_WRITE[nr][index]; - i2c_smbus_write_byte_data(client, regaddr, reg >> 8); - if (nr != 3) { - regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[nr][index] - : TMP401_TEMP_LSB[nr][index]; - i2c_smbus_write_byte_data(client, regaddr, reg & 0xFF); - } - data->temp[nr][index] = reg; - - mutex_unlock(&data->update_lock); - - return count; -} - -static ssize_t store_temp_crit_hyst(struct device *dev, struct device_attribute - *devattr, const char *buf, size_t count) -{ - int temp, index = to_sensor_dev_attr(devattr)->index; - struct tmp401_data *data = tmp401_update_device(dev); - long val; - u8 reg; - - if (IS_ERR(data)) - return PTR_ERR(data); - - if (kstrtol(buf, 10, &val)) - return -EINVAL; - - if (data->config & TMP401_CONFIG_RANGE) - val = clamp_val(val, -64000, 191000); - else - val = clamp_val(val, 0, 127000); - - mutex_lock(&data->update_lock); - temp = tmp401_register_to_temp(data->temp[3][index], data->config); - val = clamp_val(val, temp - 255000, temp); - reg = ((temp - val) + 500) / 1000; - - i2c_smbus_write_byte_data(data->client, TMP401_TEMP_CRIT_HYST, - reg); - - data->temp_crit_hyst = reg; - - mutex_unlock(&data->update_lock); - - return count; -} - -/* - * Resets the historical measurements of minimum and maximum temperatures. - * This is done by writing any value to any of the minimum/maximum registers - * (0x30-0x37). - */ -static ssize_t reset_temp_history(struct device *dev, - struct device_attribute *devattr, const char *buf, size_t count) -{ - struct tmp401_data *data = dev_get_drvdata(dev); - struct i2c_client *client = data->client; - long val; - - if (kstrtol(buf, 10, &val)) - return -EINVAL; - - if (val != 1) { - dev_err(dev, - "temp_reset_history value %ld not supported. Use 1 to reset the history!\n", - val); - return -EINVAL; - } - mutex_lock(&data->update_lock); - i2c_smbus_write_byte_data(client, TMP401_TEMP_MSB_WRITE[5][0], val); - data->valid = 0; - mutex_unlock(&data->update_lock); - - return count; -} - -static ssize_t show_update_interval(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct tmp401_data *data = dev_get_drvdata(dev); - - return sprintf(buf, "%u\n", data->update_interval); -} - -static ssize_t set_update_interval(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - struct tmp401_data *data = dev_get_drvdata(dev); - struct i2c_client *client = data->client; - unsigned long val; - int err, rate; - - err = kstrtoul(buf, 10, &val); - if (err) - return err; - - /* - * For valid rates, interval can be calculated as - * interval = (1 << (7 - rate)) * 125; - * Rounded rate is therefore - * rate = 7 - __fls(interval * 4 / (125 * 3)); - * Use clamp_val() to avoid overflows, and to ensure valid input - * for __fls. - */ - val = clamp_val(val, 125, 16000); - rate = 7 - __fls(val * 4 / (125 * 3)); - mutex_lock(&data->update_lock); - i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, rate); - data->update_interval = (1 << (7 - rate)) * 125; - mutex_unlock(&data->update_lock); - - return count; -} - -/* - * Enable/disable the state of the timeout function - * @dev: device info - * @state: 1:enable 0:disable - */ -static int timeout_cfg(struct device *dev, int state) -{ - int rv, chip_type; - u8 reg_value; - struct tmp401_data *data; - struct i2c_client *client; - - data = dev_get_drvdata(dev); - client = data->client; - - /* get chip type */ - chip_type = data->kind; - dev_dbg(&client->dev, "set timeout. chip:%d, state:%d\n", chip_type, state); - - /* chip type check */ - if(chip_type != tmp401 && chip_type != tmp411) { - dev_info(&client->dev, - "Chip type: %d, not support timeout config.!\n", chip_type); - return -EPERM; - } - - /* parameter check */ - if(state != TIMEOUT_STATE_EN && state != TIMEOUT_STATE_IEN) { - dev_err(&client->dev, - "Parameter check error. state: %d not supported.!\n", state); - return -EINVAL; - } - - mutex_lock(&data->update_lock); - /* read the Consecutive alert register */ - reg_value = i2c_smbus_read_byte_data(client, TMP401_DEVICE_CAR_REG); - if (reg_value < 0) { - dev_err(&client->dev, "Failed to read. reg:0x%0x, value:%d\n", TMP401_DEVICE_CAR_REG, reg_value); - mutex_unlock(&data->update_lock); - return -EIO; - } - dev_dbg(&client->dev, "get register value. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value); - - /* same value case, do not write */ - if((u8)state == (reg_value >> TIMEOUT_STATE_BIT)) { - mutex_unlock(&data->update_lock); - dev_info(&client->dev, "timeout config has been set and the current state is %d.\n", state); - return 0; - } - - /* calculate the register value */ - reg_value = (reg_value & ~(1 << TIMEOUT_STATE_BIT)) | (state << TIMEOUT_STATE_BIT); - - /* set the Consecutive alert register */ - dev_dbg(&client->dev, "set register value. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value); - rv = i2c_smbus_write_byte_data(client, TMP401_DEVICE_CAR_REG, reg_value); - if (rv < 0) { - dev_err(&client->dev, - "set the register Error. reg:0x%0x, value:%d\n", TMP401_DEVICE_CAR_REG, reg_value); - mutex_unlock(&data->update_lock); - return -EIO; - } - mutex_unlock(&data->update_lock); - - dev_info(&client->dev, "set bus timeout success. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value); - - return 0; -} - -static ssize_t set_timeout_en(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - int val, err; - struct i2c_client *client; - struct tmp401_data *data; - - data = dev_get_drvdata(dev); - client = data->client; - - err = kstrtoint(buf, 0, &val); - if (err) { - dev_err(&client->dev, - "kstrtoint error: %d.\n", err); - return err; - } - - err = timeout_cfg(dev, val); - if(err < 0) { - dev_err(&client->dev, - "set bus timeout error: %d. value:%d!\n", err, val); - return err; - } - - return count; -} - -static ssize_t show_timeout_en(struct device *dev, - struct device_attribute *devattr, char *buf) -{ - int chip_type; - u8 reg_value; - struct tmp401_data *data; - struct i2c_client *client; - - data = dev_get_drvdata(dev); - client = data->client; - - /* get chip type */ - chip_type = data->kind; - dev_dbg(&client->dev, "get timeout. chip:%d\n", chip_type); - - /* chip type check */ - if(chip_type != tmp401 && chip_type != tmp411) { - dev_info(&client->dev, - "Chip type: %d, not support timeout config.!\n", chip_type); - /* not support, return NA */ - return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", TIMEOUT_STATE_NA); - } - - /* read the Consecutive alert register */ - reg_value = i2c_smbus_read_byte_data(client, TMP401_DEVICE_CAR_REG); - if (reg_value < 0) { - dev_err(&client->dev, "Failed to read. reg:0x%0x, value:%d\n", TMP401_DEVICE_CAR_REG, reg_value); - return -EIO; - } - dev_dbg(&client->dev, "get register value. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value); - - /* decode the register value */ - reg_value = reg_value >> TIMEOUT_STATE_BIT; - - return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", reg_value); -} - -static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0); -static SENSOR_DEVICE_ATTR_2(temp1_min, S_IWUSR | S_IRUGO, show_temp, - store_temp, 1, 0); -static SENSOR_DEVICE_ATTR_2(temp1_max, S_IWUSR | S_IRUGO, show_temp, - store_temp, 2, 0); -static SENSOR_DEVICE_ATTR_2(temp1_crit, S_IWUSR | S_IRUGO, show_temp, - store_temp, 3, 0); -static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IWUSR | S_IRUGO, - show_temp_crit_hyst, store_temp_crit_hyst, 0); -static SENSOR_DEVICE_ATTR_2(temp1_min_alarm, S_IRUGO, show_status, NULL, - 1, TMP432_STATUS_LOCAL); -static SENSOR_DEVICE_ATTR_2(temp1_max_alarm, S_IRUGO, show_status, NULL, - 2, TMP432_STATUS_LOCAL); -static SENSOR_DEVICE_ATTR_2(temp1_crit_alarm, S_IRUGO, show_status, NULL, - 3, TMP432_STATUS_LOCAL); -static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1); -static SENSOR_DEVICE_ATTR_2(temp2_min, S_IWUSR | S_IRUGO, show_temp, - store_temp, 1, 1); -static SENSOR_DEVICE_ATTR_2(temp2_max, S_IWUSR | S_IRUGO, show_temp, - store_temp, 2, 1); -static SENSOR_DEVICE_ATTR_2(temp2_crit, S_IWUSR | S_IRUGO, show_temp, - store_temp, 3, 1); -static SENSOR_DEVICE_ATTR(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, - NULL, 1); -static SENSOR_DEVICE_ATTR_2(temp2_fault, S_IRUGO, show_status, NULL, - 0, TMP432_STATUS_REMOTE1); -static SENSOR_DEVICE_ATTR_2(temp2_min_alarm, S_IRUGO, show_status, NULL, - 1, TMP432_STATUS_REMOTE1); -static SENSOR_DEVICE_ATTR_2(temp2_max_alarm, S_IRUGO, show_status, NULL, - 2, TMP432_STATUS_REMOTE1); -static SENSOR_DEVICE_ATTR_2(temp2_crit_alarm, S_IRUGO, show_status, NULL, - 3, TMP432_STATUS_REMOTE1); - -static DEVICE_ATTR(update_interval, S_IRUGO | S_IWUSR, show_update_interval, - set_update_interval); -static DEVICE_ATTR(timeout_en, S_IRUGO | S_IWUSR, show_timeout_en, set_timeout_en); - -static struct attribute *tmp401_attributes[] = { - &sensor_dev_attr_temp1_input.dev_attr.attr, - &sensor_dev_attr_temp1_min.dev_attr.attr, - &sensor_dev_attr_temp1_max.dev_attr.attr, - &sensor_dev_attr_temp1_crit.dev_attr.attr, - &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, - &sensor_dev_attr_temp1_max_alarm.dev_attr.attr, - &sensor_dev_attr_temp1_min_alarm.dev_attr.attr, - &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr, - - &sensor_dev_attr_temp2_input.dev_attr.attr, - &sensor_dev_attr_temp2_min.dev_attr.attr, - &sensor_dev_attr_temp2_max.dev_attr.attr, - &sensor_dev_attr_temp2_crit.dev_attr.attr, - &sensor_dev_attr_temp2_crit_hyst.dev_attr.attr, - &sensor_dev_attr_temp2_fault.dev_attr.attr, - &sensor_dev_attr_temp2_max_alarm.dev_attr.attr, - &sensor_dev_attr_temp2_min_alarm.dev_attr.attr, - &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr, - - &dev_attr_update_interval.attr, - &dev_attr_timeout_en.attr, - - NULL -}; - -static const struct attribute_group tmp401_group = { - .attrs = tmp401_attributes, -}; - -/* - * Additional features of the TMP411 chip. - * The TMP411 stores the minimum and maximum - * temperature measured since power-on, chip-reset, or - * minimum and maximum register reset for both the local - * and remote channels. - */ -static SENSOR_DEVICE_ATTR_2(temp1_lowest, S_IRUGO, show_temp, NULL, 4, 0); -static SENSOR_DEVICE_ATTR_2(temp1_highest, S_IRUGO, show_temp, NULL, 5, 0); -static SENSOR_DEVICE_ATTR_2(temp2_lowest, S_IRUGO, show_temp, NULL, 4, 1); -static SENSOR_DEVICE_ATTR_2(temp2_highest, S_IRUGO, show_temp, NULL, 5, 1); -static SENSOR_DEVICE_ATTR(temp_reset_history, S_IWUSR, NULL, reset_temp_history, - 0); - -static struct attribute *tmp411_attributes[] = { - &sensor_dev_attr_temp1_highest.dev_attr.attr, - &sensor_dev_attr_temp1_lowest.dev_attr.attr, - &sensor_dev_attr_temp2_highest.dev_attr.attr, - &sensor_dev_attr_temp2_lowest.dev_attr.attr, - &sensor_dev_attr_temp_reset_history.dev_attr.attr, - NULL -}; - -static const struct attribute_group tmp411_group = { - .attrs = tmp411_attributes, -}; - -static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2); -static SENSOR_DEVICE_ATTR_2(temp3_min, S_IWUSR | S_IRUGO, show_temp, - store_temp, 1, 2); -static SENSOR_DEVICE_ATTR_2(temp3_max, S_IWUSR | S_IRUGO, show_temp, - store_temp, 2, 2); -static SENSOR_DEVICE_ATTR_2(temp3_crit, S_IWUSR | S_IRUGO, show_temp, - store_temp, 3, 2); -static SENSOR_DEVICE_ATTR(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, - NULL, 2); -static SENSOR_DEVICE_ATTR_2(temp3_fault, S_IRUGO, show_status, NULL, - 0, TMP432_STATUS_REMOTE2); -static SENSOR_DEVICE_ATTR_2(temp3_min_alarm, S_IRUGO, show_status, NULL, - 1, TMP432_STATUS_REMOTE2); -static SENSOR_DEVICE_ATTR_2(temp3_max_alarm, S_IRUGO, show_status, NULL, - 2, TMP432_STATUS_REMOTE2); -static SENSOR_DEVICE_ATTR_2(temp3_crit_alarm, S_IRUGO, show_status, NULL, - 3, TMP432_STATUS_REMOTE2); - -static struct attribute *tmp432_attributes[] = { - &sensor_dev_attr_temp3_input.dev_attr.attr, - &sensor_dev_attr_temp3_min.dev_attr.attr, - &sensor_dev_attr_temp3_max.dev_attr.attr, - &sensor_dev_attr_temp3_crit.dev_attr.attr, - &sensor_dev_attr_temp3_crit_hyst.dev_attr.attr, - &sensor_dev_attr_temp3_fault.dev_attr.attr, - &sensor_dev_attr_temp3_max_alarm.dev_attr.attr, - &sensor_dev_attr_temp3_min_alarm.dev_attr.attr, - &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr, - - NULL -}; - -static const struct attribute_group tmp432_group = { - .attrs = tmp432_attributes, -}; - -/* - * Additional features of the TMP461 chip. - * The TMP461 temperature offset for the remote channel. - */ -static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IWUSR | S_IRUGO, show_temp, - store_temp, 6, 1); - -static struct attribute *tmp461_attributes[] = { - &sensor_dev_attr_temp2_offset.dev_attr.attr, - NULL -}; - -static const struct attribute_group tmp461_group = { - .attrs = tmp461_attributes, -}; - -/* - * Begin non sysfs callback code (aka Real code) - */ - -static int tmp401_init_client(struct tmp401_data *data, - struct i2c_client *client) -{ - int config, config_orig, status = 0; - - /* Set the conversion rate to 2 Hz */ - i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, 5); - data->update_interval = 500; - - /* Start conversions (disable shutdown if necessary) */ - config = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); - if (config < 0) - return config; - - config_orig = config; - config &= ~TMP401_CONFIG_SHUTDOWN; - - if (config != config_orig) - status = i2c_smbus_write_byte_data(client, - TMP401_CONFIG_WRITE, - config); - - return status; -} - -#if 0 -static int tmp401_detect(struct i2c_client *client, - struct i2c_board_info *info) -{ - enum chips kind; - struct i2c_adapter *adapter = client->adapter; - u8 reg; - - if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) - return -ENODEV; - - /* Detect and identify the chip */ - reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG); - if (reg != TMP401_MANUFACTURER_ID) - return -ENODEV; - - reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG); - - switch (reg) { - case TMP401_DEVICE_ID: - if (client->addr != 0x4c) - return -ENODEV; - kind = tmp401; - break; - case TMP411A_DEVICE_ID: - if (client->addr != 0x4c) - return -ENODEV; - kind = tmp411; - break; - case TMP411B_DEVICE_ID: - if (client->addr != 0x4d) - return -ENODEV; - kind = tmp411; - break; - case TMP411C_DEVICE_ID: - if (client->addr != 0x4e) - return -ENODEV; - kind = tmp411; - break; - case TMP431_DEVICE_ID: - if (client->addr != 0x4c && client->addr != 0x4d) - return -ENODEV; - kind = tmp431; - break; - case TMP432_DEVICE_ID: - if (client->addr != 0x4c && client->addr != 0x4d) - return -ENODEV; - kind = tmp432; - break; - case TMP435_DEVICE_ID: - kind = tmp435; - break; - default: - return -ENODEV; - } - - reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); - if (reg & 0x1b) - return -ENODEV; - - reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE_READ); - /* Datasheet says: 0x1-0x6 */ - if (reg > 15) - return -ENODEV; - - strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE); - - return 0; -} -#endif - -static int tmp401_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - static const char * const names[] = { - "TMP401", "TMP411", "TMP431", "TMP432", "TMP435", "TMP461" - }; - struct device *dev = &client->dev; - struct device *hwmon_dev; - struct tmp401_data *data; - int groups = 0, status; - - data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL); - if (!data) - return -ENOMEM; - - data->client = client; - mutex_init(&data->update_lock); - data->kind = id->driver_data; - - /* Initialize the TMP401 chip */ - status = tmp401_init_client(data, client); - if (status < 0) - return status; - - /* Register sysfs hooks */ - data->groups[groups++] = &tmp401_group; - - /* Register additional tmp411 sysfs hooks */ - if (data->kind == tmp411) - data->groups[groups++] = &tmp411_group; - - /* Register additional tmp432 sysfs hooks */ - if (data->kind == tmp432) - data->groups[groups++] = &tmp432_group; - - if (data->kind == tmp461) - data->groups[groups++] = &tmp461_group; - - hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name, - data, data->groups); - if (IS_ERR(hwmon_dev)) - return PTR_ERR(hwmon_dev); - - /* disable the timeout function */ - status = timeout_cfg(hwmon_dev, TIMEOUT_STATE_IEN); - if((status < 0) && (status != -EPERM)) { - dev_err(dev, - "set bus timeout error when probing: %d.!\n", status); - /* here, no need call devm_hwmon_device_unregister, device managed. */ - return status; - } - - dev_info(dev, "Detected TI %s chip\n", names[data->kind]); - - return 0; -} - -static struct i2c_driver tmp401_driver = { - .class = I2C_CLASS_HWMON, - .driver = { - .name = "wb_tmp401", - }, - .probe = tmp401_probe, - .id_table = tmp401_id, - /* .detect = tmp401_detect, */ - /* .address_list = normal_i2c, */ -}; - -module_i2c_driver(tmp401_driver); - -MODULE_AUTHOR("support"); -MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver"); -MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c deleted file mode 100644 index b68196d9f57c..000000000000 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c +++ /dev/null @@ -1,265 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Hardware monitoring driver for Texas Instruments TPS53679 - * - * Copyright (c) 2017 Mellanox Technologies. All rights reserved. - * Copyright (c) 2017 Vadim Pasternak - */ - -#include -#include -#include -#include -#include -#include -#include -#include "wb_pmbus.h" - -enum chips { - tps53647, tps53667, tps53679, tps53681, tps53688, tps53622 -}; - -#define TPS53647_PAGE_NUM 1 - -#define TPS53679_PROT_VR12_5MV 0x01 /* VR12.0 mode, 5-mV DAC */ -#define TPS53679_PROT_VR12_5_10MV 0x02 /* VR12.5 mode, 10-mV DAC */ -#define TPS53679_PROT_VR13_10MV 0x04 /* VR13.0 mode, 10-mV DAC */ -#define TPS53679_PROT_IMVP8_5MV 0x05 /* IMVP8 mode, 5-mV DAC */ -#define TPS53679_PROT_VR13_5MV 0x07 /* VR13.0 mode, 5-mV DAC */ -#define TPS53679_PAGE_NUM 2 - -#define TPS53681_DEVICE_ID 0x81 - -#define TPS53681_PMBUS_REVISION 0x33 - -#define TPS53681_MFR_SPECIFIC_20 0xe4 /* Number of phases, per page */ - -static const struct i2c_device_id tps53679_id[]; - -static int tps53679_identify_mode(struct i2c_client *client, - struct pmbus_driver_info *info) -{ - u8 vout_params; - int i, ret; - - for (i = 0; i < info->pages; i++) { - /* Read the register with VOUT scaling value.*/ - ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE); - if (ret < 0) - return ret; - - vout_params = ret & GENMASK(4, 0); - - switch (vout_params) { - case TPS53679_PROT_VR13_10MV: - case TPS53679_PROT_VR12_5_10MV: - info->vrm_version[i] = vr13; - break; - case TPS53679_PROT_VR13_5MV: - case TPS53679_PROT_VR12_5MV: - case TPS53679_PROT_IMVP8_5MV: - info->vrm_version[i] = vr12; - break; - default: - return -EINVAL; - } - } - - return 0; -} - -static int tps53679_identify_phases(struct i2c_client *client, - struct pmbus_driver_info *info) -{ - int ret; - - /* On TPS53681, only channel A provides per-phase output current */ - ret = wb_pmbus_read_byte_data(client, 0, TPS53681_MFR_SPECIFIC_20); - if (ret < 0) - return ret; - info->phases[0] = (ret & 0x07) + 1; - - return 0; -} - -static int tps53679_identify_chip(struct i2c_client *client, - u8 revision, u16 id) -{ - u8 buf[I2C_SMBUS_BLOCK_MAX]; - int ret; - - ret = wb_pmbus_read_byte_data(client, 0, PMBUS_REVISION); - if (ret < 0) - return ret; - if (ret != revision) { - dev_err(&client->dev, "Unexpected PMBus revision 0x%x\n", ret); - return -ENODEV; - } - - ret = i2c_smbus_read_block_data(client, PMBUS_IC_DEVICE_ID, buf); - if (ret < 0) - return ret; - if (ret != 1 || buf[0] != id) { - dev_err(&client->dev, "Unexpected device ID 0x%x\n", buf[0]); - return -ENODEV; - } - return 0; -} - -/* - * Common identification function for chips with multi-phase support. - * Since those chips have special configuration registers, we want to have - * some level of reassurance that we are really talking with the chip - * being probed. Check PMBus revision and chip ID. - */ -static int tps53679_identify_multiphase(struct i2c_client *client, - struct pmbus_driver_info *info, - int pmbus_rev, int device_id) -{ - int ret; - - ret = tps53679_identify_chip(client, pmbus_rev, device_id); - if (ret < 0) - return ret; - - ret = tps53679_identify_mode(client, info); - if (ret < 0) - return ret; - - return tps53679_identify_phases(client, info); -} - -static int tps53679_identify(struct i2c_client *client, - struct pmbus_driver_info *info) -{ - return tps53679_identify_mode(client, info); -} - -static int tps53681_identify(struct i2c_client *client, - struct pmbus_driver_info *info) -{ - return tps53679_identify_multiphase(client, info, - TPS53681_PMBUS_REVISION, - TPS53681_DEVICE_ID); -} - -static int tps53681_read_word_data(struct i2c_client *client, int page, - int phase, int reg) -{ - /* - * For reading the total output current (READ_IOUT) for all phases, - * the chip datasheet is a bit vague. It says "PHASE must be set to - * FFh to access all phases simultaneously. PHASE may also be set to - * 80h readack (!) the total phase current". - * Experiments show that the command does _not_ report the total - * current for all phases if the phase is set to 0xff. Instead, it - * appears to report the current of one of the phases. Override phase - * parameter with 0x80 when reading the total output current on page 0. - */ - if (reg == PMBUS_READ_IOUT && page == 0 && phase == 0xff) - return wb_pmbus_read_word_data(client, page, 0x80, reg); - return -ENODATA; -} - -static struct pmbus_driver_info tps53679_info = { - .format[PSC_VOLTAGE_IN] = linear, - .format[PSC_VOLTAGE_OUT] = vid, - .format[PSC_TEMPERATURE] = linear, - .format[PSC_CURRENT_OUT] = linear, - .format[PSC_POWER] = linear, - .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | - PMBUS_HAVE_STATUS_INPUT | - PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | - PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | - PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | - PMBUS_HAVE_POUT, - .func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | - PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | - PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | - PMBUS_HAVE_POUT, - .pfunc[0] = PMBUS_HAVE_IOUT, - .pfunc[1] = PMBUS_HAVE_IOUT, - .pfunc[2] = PMBUS_HAVE_IOUT, - .pfunc[3] = PMBUS_HAVE_IOUT, - .pfunc[4] = PMBUS_HAVE_IOUT, - .pfunc[5] = PMBUS_HAVE_IOUT, -}; - -static int tps53679_probe(struct i2c_client *client) -{ - struct device *dev = &client->dev; - struct pmbus_driver_info *info; - enum chips chip_id; - - if (dev->of_node) - chip_id = (enum chips)of_device_get_match_data(dev); - else - chip_id = i2c_match_id(tps53679_id, client)->driver_data; - - info = devm_kmemdup(dev, &tps53679_info, sizeof(*info), GFP_KERNEL); - if (!info) - return -ENOMEM; - - switch (chip_id) { - case tps53647: - case tps53667: - info->pages = TPS53647_PAGE_NUM; - info->identify = tps53679_identify; - break; - case tps53679: - case tps53688: - case tps53622: - info->pages = TPS53679_PAGE_NUM; - info->identify = tps53679_identify; - break; - case tps53681: - info->pages = TPS53679_PAGE_NUM; - info->phases[0] = 6; - info->identify = tps53681_identify; - info->read_word_data = tps53681_read_word_data; - break; - default: - return -ENODEV; - } - - return wb_pmbus_do_probe(client, info); -} - -static const struct i2c_device_id tps53679_id[] = { - {"wb_tps53647", tps53647}, - {"wb_tps53667", tps53667}, - {"wb_tps53679", tps53679}, - {"wb_tps53681", tps53681}, - {"wb_tps53688", tps53688}, - {"wb_tps53622", tps53622}, - {} -}; - -MODULE_DEVICE_TABLE(i2c, tps53679_id); - -static const struct of_device_id __maybe_unused tps53679_of_match[] = { - {.compatible = "ti,wb_tps53647", .data = (void *)tps53647}, - {.compatible = "ti,wb_tps53667", .data = (void *)tps53667}, - {.compatible = "ti,wb_tps53679", .data = (void *)tps53679}, - {.compatible = "ti,wb_tps53681", .data = (void *)tps53681}, - {.compatible = "ti,wb_tps53688", .data = (void *)tps53688}, - {.compatible = "ti,wb_tps53622", .data = (void *)tps53622}, - {} -}; -MODULE_DEVICE_TABLE(of, tps53679_of_match); - -static struct i2c_driver tps53679_driver = { - .driver = { - .name = "wb_tps53622", - .of_match_table = of_match_ptr(tps53679_of_match), - }, - .probe_new = tps53679_probe, - .remove = wb_pmbus_do_remove, - .id_table = tps53679_id, -}; - -module_i2c_driver(tps53679_driver); - -MODULE_AUTHOR("support"); -MODULE_DESCRIPTION("PMBus driver for Texas Instruments TPS53679"); -MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c deleted file mode 100644 index 6d60b9d876c2..000000000000 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c +++ /dev/null @@ -1,720 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Hardware monitoring driver for UCD90xxx Sequencer and System Health - * Controller series - * - * Copyright (C) 2011 Ericsson AB. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "wb_pmbus.h" - -#define mem_clear(data, size) memset((data), 0, (size)) - -enum chips { ucd9000, ucd90120, ucd90124, ucd90160, ucd90320, ucd9090, - ucd90910 }; - -#define UCD9000_MONITOR_CONFIG 0xd5 -#define UCD9000_NUM_PAGES 0xd6 -#define UCD9000_FAN_CONFIG_INDEX 0xe7 -#define UCD9000_FAN_CONFIG 0xe8 -#define UCD9000_MFR_STATUS 0xf3 -#define UCD9000_GPIO_SELECT 0xfa -#define UCD9000_GPIO_CONFIG 0xfb -#define UCD9000_DEVICE_ID 0xfd - -/* GPIO CONFIG bits */ -#define UCD9000_GPIO_CONFIG_ENABLE BIT(0) -#define UCD9000_GPIO_CONFIG_OUT_ENABLE BIT(1) -#define UCD9000_GPIO_CONFIG_OUT_VALUE BIT(2) -#define UCD9000_GPIO_CONFIG_STATUS BIT(3) -#define UCD9000_GPIO_INPUT 0 -#define UCD9000_GPIO_OUTPUT 1 - -#define UCD9000_MON_TYPE(x) (((x) >> 5) & 0x07) -#define UCD9000_MON_PAGE(x) ((x) & 0x1f) - -#define UCD9000_MON_VOLTAGE 1 -#define UCD9000_MON_TEMPERATURE 2 -#define UCD9000_MON_CURRENT 3 -#define UCD9000_MON_VOLTAGE_HW 4 - -#define UCD9000_NUM_FAN 4 - -#define UCD9000_GPIO_NAME_LEN 16 -#define UCD9090_NUM_GPIOS 23 -#define UCD901XX_NUM_GPIOS 26 -#define UCD90320_NUM_GPIOS 84 -#define UCD90910_NUM_GPIOS 26 - -#define UCD9000_DEBUGFS_NAME_LEN 24 -#define UCD9000_GPI_COUNT 8 -#define UCD90320_GPI_COUNT 32 - -#define UCD9000_RETRY_SLEEP_TIME (10000) /* 10ms */ -#define UCD9000_RETRY_TIME (3) -#define WB_DEV_NAME_MAX_LEN (64) - -static int g_wb_ucd9000_debug = 0; -static int g_wb_ucd9000_error = 0; - -module_param(g_wb_ucd9000_debug, int, S_IRUGO | S_IWUSR); -module_param(g_wb_ucd9000_error, int, S_IRUGO | S_IWUSR); - -#define WB_UDC9000_VERBOSE(fmt, args...) do { \ - if (g_wb_ucd9000_debug) { \ - printk(KERN_INFO "[WB_UCD9000][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ - } \ -} while (0) - -#define WB_UDC9000_ERROR(fmt, args...) do { \ - if (g_wb_ucd9000_error) { \ - printk(KERN_ERR "[WB_UCD9000][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ - } \ -} while (0) - -struct ucd9000_data { - u8 fan_data[UCD9000_NUM_FAN][I2C_SMBUS_BLOCK_MAX]; - struct pmbus_driver_info info; -#ifdef CONFIG_GPIOLIB - struct gpio_chip gpio; -#endif - struct dentry *debugfs; -}; -#define to_ucd9000_data(_info) container_of(_info, struct ucd9000_data, info) - -struct ucd9000_debugfs_entry { - struct i2c_client *client; - u8 index; -}; - -static int wb_i2c_smbus_read_block_data_tmp(const struct i2c_client *client, u8 command, u8 *values) -{ - - struct i2c_msg msg[2]; - int status; - u8 read_buf[I2C_SMBUS_BLOCK_MAX + 1]; - int read_len, val_len; - - val_len = i2c_smbus_read_byte_data(client, command); - if (val_len < 0) { - WB_UDC9000_ERROR("read byte failed. nr:%d, addr:0x%x, reg:0x%x, ret:%d.\n", - client->adapter->nr, client->addr, command, val_len); - return -ENXIO; - } - read_len = val_len + 1; - if (read_len > sizeof(read_buf)) { - WB_UDC9000_ERROR("Out of memory, val_len: %d, read length: %d, read buf len: %lu.\n", - val_len, read_len, sizeof(read_buf)); - return -ENOMEM; - } - - mem_clear(msg, sizeof(msg)); - msg[0].addr = client->addr; - msg[0].buf = &command; - msg[0].len = 1; - - msg[1].addr = client->addr; - msg[1].flags = I2C_M_RD; - msg[1].buf = read_buf; - msg[1].len = read_len; - - status = i2c_transfer(client->adapter, msg, 2); - if (status != 2) { - WB_UDC9000_ERROR("i2c_transfer failed. nr:%d, addr:0x%x, reg:0x%x, read len:%d, status:%d.\n", - client->adapter->nr, client->addr, command, read_len, status); - return -EIO; - } - WB_UDC9000_VERBOSE("read_block_data success. nr:%d, addr:0x%x, reg:0x%x, read len:%d", - client->adapter->nr, client->addr, command, read_len); - memcpy(values, &read_buf[1], val_len); - return val_len; -} - -static int wb_i2c_smbus_read_block_data(const struct i2c_client *client, u8 command, u8 *values) -{ - int rv, i; - - for(i = 0; i < UCD9000_RETRY_TIME; i++) { - rv = wb_i2c_smbus_read_block_data_tmp(client, command, values); - if(rv >= 0){ - return rv; - } - usleep_range(UCD9000_RETRY_SLEEP_TIME, UCD9000_RETRY_SLEEP_TIME + 1); - } - WB_UDC9000_ERROR("read_block_data failed. nr: %d, addr: 0x%x, reg: 0x%x, rv: %d\n", - client->adapter->nr, client->addr, command, rv); - return rv; -} - -static int ucd9000_get_fan_config(struct i2c_client *client, int fan) -{ - int fan_config = 0; - struct ucd9000_data *data - = to_ucd9000_data(wb_pmbus_get_driver_info(client)); - - if (data->fan_data[fan][3] & 1) - fan_config |= PB_FAN_2_INSTALLED; /* Use lower bit position */ - - /* Pulses/revolution */ - fan_config |= (data->fan_data[fan][3] & 0x06) >> 1; - - return fan_config; -} - -static int ucd9000_read_byte_data(struct i2c_client *client, int page, int reg) -{ - int ret = 0; - int fan_config; - - switch (reg) { - case PMBUS_FAN_CONFIG_12: - if (page > 0) - return -ENXIO; - - ret = ucd9000_get_fan_config(client, 0); - if (ret < 0) - return ret; - fan_config = ret << 4; - ret = ucd9000_get_fan_config(client, 1); - if (ret < 0) - return ret; - fan_config |= ret; - ret = fan_config; - break; - case PMBUS_FAN_CONFIG_34: - if (page > 0) - return -ENXIO; - - ret = ucd9000_get_fan_config(client, 2); - if (ret < 0) - return ret; - fan_config = ret << 4; - ret = ucd9000_get_fan_config(client, 3); - if (ret < 0) - return ret; - fan_config |= ret; - ret = fan_config; - break; - default: - ret = -ENODATA; - break; - } - return ret; -} - -static const struct i2c_device_id ucd9000_id[] = { - {"wb_ucd9000", ucd9000}, - {"wb_ucd90120", ucd90120}, - {"wb_ucd90124", ucd90124}, - {"wb_ucd90160", ucd90160}, - {"wb_ucd90320", ucd90320}, - {"wb_ucd9090", ucd9090}, - {"wb_ucd90910", ucd90910}, - {} -}; -MODULE_DEVICE_TABLE(i2c, ucd9000_id); - -static const struct of_device_id __maybe_unused ucd9000_of_match[] = { - { - .compatible = "ti,wb_ucd9000", - .data = (void *)ucd9000 - }, - { - .compatible = "ti,wb_ucd90120", - .data = (void *)ucd90120 - }, - { - .compatible = "ti,wb_ucd90124", - .data = (void *)ucd90124 - }, - { - .compatible = "ti,wb_ucd90160", - .data = (void *)ucd90160 - }, - { - .compatible = "ti,wb_ucd90320", - .data = (void *)ucd90320 - }, - { - .compatible = "ti,wb_ucd9090", - .data = (void *)ucd9090 - }, - { - .compatible = "ti,wb_ucd90910", - .data = (void *)ucd90910 - }, - { }, -}; -MODULE_DEVICE_TABLE(of, ucd9000_of_match); - -#ifdef CONFIG_GPIOLIB -static int ucd9000_gpio_read_config(struct i2c_client *client, - unsigned int offset) -{ - int ret; - - /* No page set required */ - ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_SELECT, offset); - if (ret < 0) - return ret; - - return i2c_smbus_read_byte_data(client, UCD9000_GPIO_CONFIG); -} - -static int ucd9000_gpio_get(struct gpio_chip *gc, unsigned int offset) -{ - struct i2c_client *client = gpiochip_get_data(gc); - int ret; - - ret = ucd9000_gpio_read_config(client, offset); - if (ret < 0) - return ret; - - return !!(ret & UCD9000_GPIO_CONFIG_STATUS); -} - -static void ucd9000_gpio_set(struct gpio_chip *gc, unsigned int offset, - int value) -{ - struct i2c_client *client = gpiochip_get_data(gc); - int ret; - - ret = ucd9000_gpio_read_config(client, offset); - if (ret < 0) { - dev_dbg(&client->dev, "failed to read GPIO %d config: %d\n", - offset, ret); - return; - } - - if (value) { - if (ret & UCD9000_GPIO_CONFIG_STATUS) - return; - - ret |= UCD9000_GPIO_CONFIG_STATUS; - } else { - if (!(ret & UCD9000_GPIO_CONFIG_STATUS)) - return; - - ret &= ~UCD9000_GPIO_CONFIG_STATUS; - } - - ret |= UCD9000_GPIO_CONFIG_ENABLE; - - /* Page set not required */ - ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, ret); - if (ret < 0) { - dev_dbg(&client->dev, "Failed to write GPIO %d config: %d\n", - offset, ret); - return; - } - - ret &= ~UCD9000_GPIO_CONFIG_ENABLE; - - ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, ret); - if (ret < 0) - dev_dbg(&client->dev, "Failed to write GPIO %d config: %d\n", - offset, ret); -} - -static int ucd9000_gpio_get_direction(struct gpio_chip *gc, - unsigned int offset) -{ - struct i2c_client *client = gpiochip_get_data(gc); - int ret; - - ret = ucd9000_gpio_read_config(client, offset); - if (ret < 0) - return ret; - - return !(ret & UCD9000_GPIO_CONFIG_OUT_ENABLE); -} - -static int ucd9000_gpio_set_direction(struct gpio_chip *gc, - unsigned int offset, bool direction_out, - int requested_out) -{ - struct i2c_client *client = gpiochip_get_data(gc); - int ret, config, out_val; - - ret = ucd9000_gpio_read_config(client, offset); - if (ret < 0) - return ret; - - if (direction_out) { - out_val = requested_out ? UCD9000_GPIO_CONFIG_OUT_VALUE : 0; - - if (ret & UCD9000_GPIO_CONFIG_OUT_ENABLE) { - if ((ret & UCD9000_GPIO_CONFIG_OUT_VALUE) == out_val) - return 0; - } else { - ret |= UCD9000_GPIO_CONFIG_OUT_ENABLE; - } - - if (out_val) - ret |= UCD9000_GPIO_CONFIG_OUT_VALUE; - else - ret &= ~UCD9000_GPIO_CONFIG_OUT_VALUE; - - } else { - if (!(ret & UCD9000_GPIO_CONFIG_OUT_ENABLE)) - return 0; - - ret &= ~UCD9000_GPIO_CONFIG_OUT_ENABLE; - } - - ret |= UCD9000_GPIO_CONFIG_ENABLE; - config = ret; - - /* Page set not required */ - ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, config); - if (ret < 0) - return ret; - - config &= ~UCD9000_GPIO_CONFIG_ENABLE; - - return i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, config); -} - -static int ucd9000_gpio_direction_input(struct gpio_chip *gc, - unsigned int offset) -{ - return ucd9000_gpio_set_direction(gc, offset, UCD9000_GPIO_INPUT, 0); -} - -static int ucd9000_gpio_direction_output(struct gpio_chip *gc, - unsigned int offset, int val) -{ - return ucd9000_gpio_set_direction(gc, offset, UCD9000_GPIO_OUTPUT, - val); -} - -static void ucd9000_probe_gpio(struct i2c_client *client, - const struct i2c_device_id *mid, - struct ucd9000_data *data) -{ - int rc; - - switch (mid->driver_data) { - case ucd9090: - data->gpio.ngpio = UCD9090_NUM_GPIOS; - break; - case ucd90120: - case ucd90124: - case ucd90160: - data->gpio.ngpio = UCD901XX_NUM_GPIOS; - break; - case ucd90320: - data->gpio.ngpio = UCD90320_NUM_GPIOS; - break; - case ucd90910: - data->gpio.ngpio = UCD90910_NUM_GPIOS; - break; - default: - return; /* GPIO support is optional. */ - } - - /* - * Pinmux support has not been added to the new gpio_chip. - * This support should be added when possible given the mux - * behavior of these IO devices. - */ - data->gpio.label = client->name; - data->gpio.get_direction = ucd9000_gpio_get_direction; - data->gpio.direction_input = ucd9000_gpio_direction_input; - data->gpio.direction_output = ucd9000_gpio_direction_output; - data->gpio.get = ucd9000_gpio_get; - data->gpio.set = ucd9000_gpio_set; - data->gpio.can_sleep = true; - data->gpio.base = -1; - data->gpio.parent = &client->dev; - - rc = devm_gpiochip_add_data(&client->dev, &data->gpio, client); - if (rc) - dev_warn(&client->dev, "Could not add gpiochip: %d\n", rc); -} -#else -static void ucd9000_probe_gpio(struct i2c_client *client, - const struct i2c_device_id *mid, - struct ucd9000_data *data) -{ -} -#endif /* CONFIG_GPIOLIB */ - -#ifdef CONFIG_DEBUG_FS -static int ucd9000_get_mfr_status(struct i2c_client *client, u8 *buffer) -{ - int ret = wb_pmbus_set_page(client, 0, 0xff); - - if (ret < 0) - return ret; - - return wb_i2c_smbus_read_block_data(client, UCD9000_MFR_STATUS, buffer); -} - -static int ucd9000_debugfs_show_mfr_status_bit(void *data, u64 *val) -{ - struct ucd9000_debugfs_entry *entry = data; - struct i2c_client *client = entry->client; - u8 buffer[I2C_SMBUS_BLOCK_MAX]; - int ret, i; - - ret = ucd9000_get_mfr_status(client, buffer); - if (ret < 0) - return ret; - - /* - * GPI fault bits are in sets of 8, two bytes from end of response. - */ - i = ret - 3 - entry->index / 8; - if (i >= 0) - *val = !!(buffer[i] & BIT(entry->index % 8)); - - return 0; -} -DEFINE_DEBUGFS_ATTRIBUTE(ucd9000_debugfs_mfr_status_bit, - ucd9000_debugfs_show_mfr_status_bit, NULL, "%1lld\n"); - -static ssize_t ucd9000_debugfs_read_mfr_status(struct file *file, - char __user *buf, size_t count, - loff_t *ppos) -{ - struct i2c_client *client = file->private_data; - u8 buffer[I2C_SMBUS_BLOCK_MAX]; - char str[(I2C_SMBUS_BLOCK_MAX * 2) + 2]; - char *res; - int rc; - - rc = ucd9000_get_mfr_status(client, buffer); - if (rc < 0) - return rc; - - res = bin2hex(str, buffer, min(rc, I2C_SMBUS_BLOCK_MAX)); - *res++ = '\n'; - *res = 0; - - return simple_read_from_buffer(buf, count, ppos, str, res - str); -} - -static const struct file_operations ucd9000_debugfs_show_mfr_status_fops = { - .llseek = noop_llseek, - .read = ucd9000_debugfs_read_mfr_status, - .open = simple_open, -}; - -static int ucd9000_init_debugfs(struct i2c_client *client, - const struct i2c_device_id *mid, - struct ucd9000_data *data) -{ - struct dentry *debugfs; - struct ucd9000_debugfs_entry *entries; - int i, gpi_count; - char name[UCD9000_DEBUGFS_NAME_LEN]; - - debugfs = wb_pmbus_get_debugfs_dir(client); - if (!debugfs) - return -ENOENT; - - data->debugfs = debugfs_create_dir(client->name, debugfs); - if (!data->debugfs) - return -ENOENT; - - /* - * Of the chips this driver supports, only the UCD9090, UCD90160, - * UCD90320, and UCD90910 report GPI faults in their MFR_STATUS - * register, so only create the GPI fault debugfs attributes for those - * chips. - */ - if (mid->driver_data == ucd9090 || mid->driver_data == ucd90160 || - mid->driver_data == ucd90320 || mid->driver_data == ucd90910) { - gpi_count = mid->driver_data == ucd90320 ? UCD90320_GPI_COUNT - : UCD9000_GPI_COUNT; - entries = devm_kcalloc(&client->dev, - gpi_count, sizeof(*entries), - GFP_KERNEL); - if (!entries) - return -ENOMEM; - - for (i = 0; i < gpi_count; i++) { - entries[i].client = client; - entries[i].index = i; - scnprintf(name, UCD9000_DEBUGFS_NAME_LEN, - "gpi%d_alarm", i + 1); - debugfs_create_file(name, 0444, data->debugfs, - &entries[i], - &ucd9000_debugfs_mfr_status_bit); - } - } - - scnprintf(name, UCD9000_DEBUGFS_NAME_LEN, "mfr_status"); - debugfs_create_file(name, 0444, data->debugfs, client, - &ucd9000_debugfs_show_mfr_status_fops); - - return 0; -} -#else -static int ucd9000_init_debugfs(struct i2c_client *client, - const struct i2c_device_id *mid, - struct ucd9000_data *data) -{ - return 0; -} -#endif /* CONFIG_DEBUG_FS */ - -static int ucd9000_probe(struct i2c_client *client) -{ - u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1]; - char wb_device_name[WB_DEV_NAME_MAX_LEN]; - struct ucd9000_data *data; - struct pmbus_driver_info *info; - const struct i2c_device_id *mid; - enum chips chip; - int i, ret; - - if (!i2c_check_functionality(client->adapter, - I2C_FUNC_SMBUS_BYTE_DATA)) - return -ENODEV; - - ret = wb_i2c_smbus_read_block_data(client, UCD9000_DEVICE_ID, - block_buffer); - if (ret < 0) { - dev_err(&client->dev, "Failed to read device ID\n"); - return ret; - } - block_buffer[ret] = '\0'; - dev_info(&client->dev, "Device ID %s\n", block_buffer); - - mem_clear(wb_device_name, sizeof(wb_device_name)); - snprintf(wb_device_name, sizeof(wb_device_name), "wb_%s", block_buffer); - - for (mid = ucd9000_id; mid->name[0]; mid++) { - if (!strncasecmp(mid->name, wb_device_name, strlen(mid->name))) - break; - } - if (!mid->name[0]) { - dev_err(&client->dev, "Unsupported device\n"); - return -ENODEV; - } - - if (client->dev.of_node) - chip = (enum chips)of_device_get_match_data(&client->dev); - else - chip = mid->driver_data; - - if (chip != ucd9000 && strcmp(client->name, mid->name) != 0) - dev_notice(&client->dev, - "Device mismatch: Configured %s, detected %s\n", - client->name, mid->name); - - data = devm_kzalloc(&client->dev, sizeof(struct ucd9000_data), - GFP_KERNEL); - if (!data) - return -ENOMEM; - info = &data->info; - - ret = i2c_smbus_read_byte_data(client, UCD9000_NUM_PAGES); - if (ret < 0) { - dev_err(&client->dev, - "Failed to read number of active pages\n"); - return ret; - } - info->pages = ret; - if (!info->pages) { - dev_err(&client->dev, "No pages configured\n"); - return -ENODEV; - } - - /* The internal temperature sensor is always active */ - /* ucd90160 have no temperature */ - /* info->func[0] = PMBUS_HAVE_TEMP; */ - - /* Everything else is configurable */ - ret = wb_i2c_smbus_read_block_data(client, UCD9000_MONITOR_CONFIG, - block_buffer); - if (ret <= 0) { - dev_err(&client->dev, "Failed to read configuration data\n"); - return -ENODEV; - } - for (i = 0; i < ret; i++) { - int page = UCD9000_MON_PAGE(block_buffer[i]); - - if (page >= info->pages) - continue; - - switch (UCD9000_MON_TYPE(block_buffer[i])) { - case UCD9000_MON_VOLTAGE: - case UCD9000_MON_VOLTAGE_HW: - info->func[page] |= PMBUS_HAVE_VOUT - | PMBUS_HAVE_STATUS_VOUT; - break; - case UCD9000_MON_TEMPERATURE: - info->func[page] |= PMBUS_HAVE_TEMP2 - | PMBUS_HAVE_STATUS_TEMP; - break; - case UCD9000_MON_CURRENT: - info->func[page] |= PMBUS_HAVE_IOUT - | PMBUS_HAVE_STATUS_IOUT; - break; - default: - break; - } - } - - /* Fan configuration */ - if (mid->driver_data == ucd90124) { - for (i = 0; i < UCD9000_NUM_FAN; i++) { - i2c_smbus_write_byte_data(client, - UCD9000_FAN_CONFIG_INDEX, i); - ret = wb_i2c_smbus_read_block_data(client, - UCD9000_FAN_CONFIG, - data->fan_data[i]); - if (ret < 0) - return ret; - } - i2c_smbus_write_byte_data(client, UCD9000_FAN_CONFIG_INDEX, 0); - - info->read_byte_data = ucd9000_read_byte_data; - info->func[0] |= PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12 - | PMBUS_HAVE_FAN34 | PMBUS_HAVE_STATUS_FAN34; - } - - ucd9000_probe_gpio(client, mid, data); - - ret = wb_pmbus_do_probe(client, info); - if (ret) - return ret; - - ret = ucd9000_init_debugfs(client, mid, data); - if (ret) - dev_warn(&client->dev, "Failed to register debugfs: %d\n", - ret); - - return 0; -} - -/* This is the driver that will be inserted */ -static struct i2c_driver ucd9000_driver = { - .driver = { - .name = "wb_ucd9000", - .of_match_table = of_match_ptr(ucd9000_of_match), - }, - .probe_new = ucd9000_probe, - .remove = wb_pmbus_do_remove, - .id_table = ucd9000_id, -}; - -module_i2c_driver(ucd9000_driver); - -MODULE_AUTHOR("support"); -MODULE_DESCRIPTION("PMBus driver for TI UCD90xxx"); -MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c deleted file mode 100644 index f45d683e3464..000000000000 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c +++ /dev/null @@ -1,499 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Hardware monitoring driver for Infineon Multi-phase Digital VR Controllers - * - * Copyright (c) 2020 Mellanox Technologies. All rights reserved. - */ - -#include -#include -#include -#include -#include -#include -#include -#include "wb_pmbus.h" - -#define XDPE122_PROT_VR12_5MV (0x01) /* VR12.0 mode, 5-mV DAC */ -#define XDPE122_PROT_VR12_5_10MV (0x02) /* VR12.5 mode, 10-mV DAC */ -#define XDPE122_PROT_IMVP9_10MV (0x03) /* IMVP9 mode, 10-mV DAC */ -#define XDPE122_AMD_625MV (0x10) /* AMD mode 6.25mV */ -#define XDPE122_PAGE_NUM (2) -#define XDPE122_WRITE_PROTECT_CLOSE (0x00) -#define XDPE122_WRITE_PROTECT_OPEN (0x40) - -static int g_wb_xdpe122_debug = 0; -static int g_wb_xdpe122_error = 0; - -module_param(g_wb_xdpe122_debug, int, S_IRUGO | S_IWUSR); -module_param(g_wb_xdpe122_error, int, S_IRUGO | S_IWUSR); - -#define WB_XDPE122_VERBOSE(fmt, args...) do { \ - if (g_wb_xdpe122_debug) { \ - printk(KERN_INFO "[WB_XDPE122][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \ - } \ -} while (0) - -#define WB_XDPE122_ERROR(fmt, args...) do { \ - if (g_wb_xdpe122_error) { \ - printk(KERN_ERR "[WB_XDPE122][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \ - } \ -} while (0) - -static int xdpe122_data2reg_vid(struct pmbus_data *data, int page, long val) -{ - int vrm_version; - - vrm_version = data->info->vrm_version[page]; - WB_XDPE122_VERBOSE("page%d, vrm_version: %d, data_val: %ld\n", - page, vrm_version, val); - /* Convert data to VID register. */ - switch (vrm_version) { - case vr13: - if (val >= 500) { - return 1 + DIV_ROUND_CLOSEST(val - 500, 10); - } - return 0; - case vr12: - if (val >= 250) { - return 1 + DIV_ROUND_CLOSEST(val - 250, 5); - } - return 0; - case imvp9: - if (val >= 200) { - return 1 + DIV_ROUND_CLOSEST(val - 200, 10); - } - return 0; - case amd625mv: - if (val >= 200 && val <= 1550) { - return DIV_ROUND_CLOSEST((1550 - val) * 100, 625); - } - return 0; - default: - WB_XDPE122_ERROR("Unsupport vrm_version, page%d, vrm_version: %d\n", - page, vrm_version); - return -EINVAL; - } - return 0; -} - -/* - * Convert VID sensor values to milli- or micro-units - * depending on sensor type. - */ -static s64 xdpe122_reg2data_vid(struct pmbus_data *data, int page, long val) -{ - - long rv; - int vrm_version; - - rv = 0; - vrm_version = data->info->vrm_version[page]; - switch (vrm_version) { - case vr11: - if (val >= 0x02 && val <= 0xb2) - rv = DIV_ROUND_CLOSEST(160000 - (val - 2) * 625, 100); - break; - case vr12: - if (val >= 0x01) - rv = 250 + (val - 1) * 5; - break; - case vr13: - if (val >= 0x01) - rv = 500 + (val - 1) * 10; - break; - case imvp9: - if (val >= 0x01) - rv = 200 + (val - 1) * 10; - break; - case amd625mv: - if (val >= 0x0 && val <= 0xd8) - rv = DIV_ROUND_CLOSEST(155000 - val * 625, 100); - break; - } - WB_XDPE122_VERBOSE("page%d, vrm_version: %d, reg_val: 0x%lx, data_val: %ld\n", - page, vrm_version, val, rv); - return rv; -} - -static ssize_t xdpe122_avs_vout_show(struct device *dev, struct device_attribute *devattr, - char *buf) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - int vout_cmd, vout; - - mutex_lock(&data->update_lock); - vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND); - if (vout_cmd < 0) { - WB_XDPE122_ERROR("%d-%04x: read page%d, vout command reg: 0x%x failed, ret: %d\n", - client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd); - mutex_unlock(&data->update_lock); - return vout_cmd; - } - - vout = xdpe122_reg2data_vid(data, attr->index, vout_cmd); - vout = vout * 1000; - WB_XDPE122_VERBOSE("%d-%04x: page%d, vout command reg_val: 0x%x, vout: %d uV\n", - client->adapter->nr, client->addr, attr->index, vout_cmd, vout); - - mutex_unlock(&data->update_lock); - return snprintf(buf, PAGE_SIZE, "%d\n", vout); -} - -static ssize_t xdpe122_avs_vout_store(struct device *dev, struct device_attribute *devattr, - const char *buf, size_t count) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - int vout, vout_max, vout_min, vout_mv; - int ret, vout_cmd, vout_cmd_set; - - if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { - WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr, - attr->index); - return -EINVAL; - } - - ret = kstrtoint(buf, 0, &vout); - if (ret) { - WB_XDPE122_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf); - return -EINVAL; - } - - if (vout <= 0) { - WB_XDPE122_ERROR("%d-%04x: invalid value: %d \n", client->adapter->nr, client->addr, vout); - return -EINVAL; - } - - vout_max = data->vout_max[attr->index]; - vout_min = data->vout_min[attr->index]; - if ((vout > vout_max) || (vout < vout_min)) { - WB_XDPE122_ERROR("%d-%04x: vout value: %d, out of range [%d, %d] \n", client->adapter->nr, - client->addr, vout, vout_min, vout_max); - return -EINVAL; - } - - /* calc VOUT_COMMAND set value Unit must be mV*/ - vout_mv = vout / 1000; - vout_cmd_set = xdpe122_data2reg_vid(data, attr->index, vout_mv); - if ((vout_cmd_set < 0) || (vout_cmd_set > 0xffff)) { - WB_XDPE122_ERROR("%d-%04x: invalid value, vout %d uV, vout_cmd_set: %d\n", - client->adapter->nr, client->addr, vout, vout_cmd_set); - return -EINVAL; - } - - mutex_lock(&data->update_lock); - - /* close write protect */ - ret = wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_CLOSE); - if (ret < 0) { - WB_XDPE122_ERROR("%d-%04x: close page%d write protect failed, ret: %d\n", client->adapter->nr, - client->addr, attr->index, ret); - mutex_unlock(&data->update_lock); - return ret; - } - - /* set VOUT_COMMAND */ - ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set); - if (ret < 0) { - WB_XDPE122_ERROR("%d-%04x: set page%d vout cmd reg: 0x%x, value: 0x%x failed, ret: %d\n", - client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set, ret); - goto error; - } - - /* read back VOUT_COMMAND */ - vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND); - if (vout_cmd < 0) { - ret = vout_cmd; - WB_XDPE122_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n", - client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, ret); - goto error; - } - - /* compare vout_cmd and vout_cmd_set */ - if (vout_cmd != vout_cmd_set) { - ret = -EIO; - WB_XDPE122_ERROR("%d-%04x: vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n", - client->adapter->nr, client->addr, vout_cmd, vout_cmd_set); - goto error; - } - - /* open write protect */ - wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_OPEN); - mutex_unlock(&data->update_lock); - WB_XDPE122_VERBOSE("%d-%04x: set page%d vout cmd success, vout %d uV, vout_cmd_set: 0x%x\n", - client->adapter->nr, client->addr, attr->index, vout, vout_cmd_set); - return count; -error: - wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_OPEN); - mutex_unlock(&data->update_lock); - return ret; -} - -static ssize_t xdpe122_avs_vout_max_store(struct device *dev, - struct device_attribute *devattr, const char *buf, size_t count) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - int ret, vout_threshold; - - if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { - WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr, - attr->index); - return -EINVAL; - } - - ret = kstrtoint(buf, 0, &vout_threshold); - if (ret) { - WB_XDPE122_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf); - return -EINVAL; - } - - WB_XDPE122_VERBOSE("%d-%04x: vout%d max threshold: %d", client->adapter->nr, client->addr, - attr->index, vout_threshold); - - data->vout_max[attr->index] = vout_threshold; - return count; -} - -static ssize_t xdpe122_avs_vout_max_show(struct device *dev, - struct device_attribute *devattr, char *buf) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - - if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { - WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr, - attr->index); - return -EINVAL; - } - - return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_max[attr->index]); -} - -static ssize_t xdpe122_avs_vout_min_store(struct device *dev, - struct device_attribute *devattr, const char *buf, size_t count) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - int ret, vout_threshold; - - if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { - WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr, - attr->index); - return -EINVAL; - } - - ret = kstrtoint(buf, 0, &vout_threshold); - if (ret) { - WB_XDPE122_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf); - return -EINVAL; - } - - WB_XDPE122_VERBOSE("%d-%04x: vout%d min threshold: %d", client->adapter->nr, client->addr, - attr->index, vout_threshold); - - data->vout_min[attr->index] = vout_threshold; - return count; -} - -static ssize_t xdpe122_avs_vout_min_show(struct device *dev, - struct device_attribute *devattr, char *buf) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - - if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { - WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr, - attr->index); - return -EINVAL; - } - - return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_min[attr->index]); -} - -static SENSOR_DEVICE_ATTR_RW(avs0_vout, xdpe122_avs_vout, 0); -static SENSOR_DEVICE_ATTR_RW(avs1_vout, xdpe122_avs_vout, 1); -static SENSOR_DEVICE_ATTR_RW(avs0_vout_max, xdpe122_avs_vout_max, 0); -static SENSOR_DEVICE_ATTR_RW(avs0_vout_min, xdpe122_avs_vout_min, 0); -static SENSOR_DEVICE_ATTR_RW(avs1_vout_max, xdpe122_avs_vout_max, 1); -static SENSOR_DEVICE_ATTR_RW(avs1_vout_min, xdpe122_avs_vout_min, 1); - -static struct attribute *avs_ctrl_attrs[] = { - &sensor_dev_attr_avs0_vout.dev_attr.attr, - &sensor_dev_attr_avs1_vout.dev_attr.attr, - &sensor_dev_attr_avs0_vout_max.dev_attr.attr, - &sensor_dev_attr_avs0_vout_min.dev_attr.attr, - &sensor_dev_attr_avs1_vout_max.dev_attr.attr, - &sensor_dev_attr_avs1_vout_min.dev_attr.attr, - NULL, -}; - -static const struct attribute_group avs_ctrl_group = { - .attrs = avs_ctrl_attrs, -}; - -static const struct attribute_group *xdpe122_attribute_groups[] = { - &avs_ctrl_group, - NULL, -}; - -static int xdpe122_read_word_data(struct i2c_client *client, int page, - int phase, int reg) -{ - const struct pmbus_driver_info *info = wb_pmbus_get_driver_info(client); - long val; - s16 exponent; - s32 mantissa; - int ret; - - switch (reg) { - case PMBUS_VOUT_OV_FAULT_LIMIT: - case PMBUS_VOUT_UV_FAULT_LIMIT: - ret = wb_pmbus_read_word_data(client, page, phase, reg); - if (ret < 0) - return ret; - - /* Convert register value to LINEAR11 data. */ - exponent = ((s16)ret) >> 11; - mantissa = ((s16)((ret & GENMASK(10, 0)) << 5)) >> 5; - val = mantissa * 1000L; - if (exponent >= 0) - val <<= exponent; - else - val >>= -exponent; - - /* Convert data to VID register. */ - switch (info->vrm_version[page]) { - case vr13: - if (val >= 500) - return 1 + DIV_ROUND_CLOSEST(val - 500, 10); - return 0; - case vr12: - if (val >= 250) - return 1 + DIV_ROUND_CLOSEST(val - 250, 5); - return 0; - case imvp9: - if (val >= 200) - return 1 + DIV_ROUND_CLOSEST(val - 200, 10); - return 0; - case amd625mv: - if (val >= 200 && val <= 1550) - return DIV_ROUND_CLOSEST((1550 - val) * 100, - 625); - return 0; - default: - return -EINVAL; - } - default: - return -ENODATA; - } - - return 0; -} - -static int xdpe122_identify(struct i2c_client *client, - struct pmbus_driver_info *info) -{ - u8 vout_params; - int i, ret; - - for (i = 0; i < XDPE122_PAGE_NUM; i++) { - /* Read the register with VOUT scaling value.*/ - ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE); - if (ret < 0) - return ret; - - vout_params = ret & GENMASK(4, 0); - - switch (vout_params) { - case XDPE122_PROT_VR12_5_10MV: - info->vrm_version[i] = vr13; - break; - case XDPE122_PROT_VR12_5MV: - info->vrm_version[i] = vr12; - break; - case XDPE122_PROT_IMVP9_10MV: - info->vrm_version[i] = imvp9; - break; - case XDPE122_AMD_625MV: - info->vrm_version[i] = amd625mv; - break; - default: - return -EINVAL; - } - } - - return 0; -} - -static struct pmbus_driver_info xdpe122_info = { - .pages = XDPE122_PAGE_NUM, - .format[PSC_VOLTAGE_IN] = linear, - .format[PSC_VOLTAGE_OUT] = vid, - .format[PSC_TEMPERATURE] = linear, - .format[PSC_CURRENT_IN] = linear, - .format[PSC_CURRENT_OUT] = linear, - .format[PSC_POWER] = linear, - .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | - PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | - PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | - PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT, - .func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | - PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | - PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | - PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT, - .groups = xdpe122_attribute_groups, - .identify = xdpe122_identify, - .read_word_data = xdpe122_read_word_data, -}; - -static int xdpe122_probe(struct i2c_client *client) -{ - struct pmbus_driver_info *info; - - info = devm_kmemdup(&client->dev, &xdpe122_info, sizeof(*info), - GFP_KERNEL); - if (!info) - return -ENOMEM; - - return wb_pmbus_do_probe(client, info); -} - -static const struct i2c_device_id xdpe122_id[] = { - {"wb_xdpe12254", 0}, - {"wb_xdpe12284", 0}, - {} -}; - -MODULE_DEVICE_TABLE(i2c, xdpe122_id); - -static const struct of_device_id __maybe_unused xdpe122_of_match[] = { - {.compatible = "infineon,wb_xdpe12254"}, - {.compatible = "infineon,wb_xdpe12284"}, - {} -}; -MODULE_DEVICE_TABLE(of, xdpe122_of_match); - -static struct i2c_driver xdpe122_driver = { - .driver = { - .name = "wb_xdpe12284", - .of_match_table = of_match_ptr(xdpe122_of_match), - }, - .probe_new = xdpe122_probe, - .remove = wb_pmbus_do_remove, - .id_table = xdpe122_id, -}; - -module_i2c_driver(xdpe122_driver); - -MODULE_AUTHOR("Vadim Pasternak "); -MODULE_DESCRIPTION("PMBus driver for Infineon XDPE122 family"); -MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h new file mode 100755 index 000000000000..10fb17879f8e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h @@ -0,0 +1,511 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * pmbus.h - Common defines and structures for PMBus devices + * + * Copyright (c) 2010, 2011 Ericsson AB. + * Copyright (c) 2012 Guenter Roeck + */ + +#ifndef PMBUS_H +#define PMBUS_H + +#include +#include + +/* + * Registers + */ +enum pmbus_regs { + PMBUS_PAGE = 0x00, + PMBUS_OPERATION = 0x01, + PMBUS_ON_OFF_CONFIG = 0x02, + PMBUS_CLEAR_FAULTS = 0x03, + PMBUS_PHASE = 0x04, + + PMBUS_WRITE_PROTECT = 0x10, + + PMBUS_CAPABILITY = 0x19, + PMBUS_QUERY = 0x1A, + + PMBUS_VOUT_MODE = 0x20, + PMBUS_VOUT_COMMAND = 0x21, + PMBUS_VOUT_TRIM = 0x22, + PMBUS_VOUT_CAL_OFFSET = 0x23, + PMBUS_VOUT_MAX = 0x24, + PMBUS_VOUT_MARGIN_HIGH = 0x25, + PMBUS_VOUT_MARGIN_LOW = 0x26, + PMBUS_VOUT_TRANSITION_RATE = 0x27, + PMBUS_VOUT_DROOP = 0x28, + PMBUS_VOUT_SCALE_LOOP = 0x29, + PMBUS_VOUT_SCALE_MONITOR = 0x2A, + + PMBUS_COEFFICIENTS = 0x30, + PMBUS_POUT_MAX = 0x31, + + PMBUS_FAN_CONFIG_12 = 0x3A, + PMBUS_FAN_COMMAND_1 = 0x3B, + PMBUS_FAN_COMMAND_2 = 0x3C, + PMBUS_FAN_CONFIG_34 = 0x3D, + PMBUS_FAN_COMMAND_3 = 0x3E, + PMBUS_FAN_COMMAND_4 = 0x3F, + + PMBUS_VOUT_OV_FAULT_LIMIT = 0x40, + PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41, + PMBUS_VOUT_OV_WARN_LIMIT = 0x42, + PMBUS_VOUT_UV_WARN_LIMIT = 0x43, + PMBUS_VOUT_UV_FAULT_LIMIT = 0x44, + PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45, + PMBUS_IOUT_OC_FAULT_LIMIT = 0x46, + PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47, + PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48, + PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49, + PMBUS_IOUT_OC_WARN_LIMIT = 0x4A, + PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B, + PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C, + + PMBUS_OT_FAULT_LIMIT = 0x4F, + PMBUS_OT_FAULT_RESPONSE = 0x50, + PMBUS_OT_WARN_LIMIT = 0x51, + PMBUS_UT_WARN_LIMIT = 0x52, + PMBUS_UT_FAULT_LIMIT = 0x53, + PMBUS_UT_FAULT_RESPONSE = 0x54, + PMBUS_VIN_OV_FAULT_LIMIT = 0x55, + PMBUS_VIN_OV_FAULT_RESPONSE = 0x56, + PMBUS_VIN_OV_WARN_LIMIT = 0x57, + PMBUS_VIN_UV_WARN_LIMIT = 0x58, + PMBUS_VIN_UV_FAULT_LIMIT = 0x59, + + PMBUS_IIN_OC_FAULT_LIMIT = 0x5B, + PMBUS_IIN_OC_WARN_LIMIT = 0x5D, + + PMBUS_POUT_OP_FAULT_LIMIT = 0x68, + PMBUS_POUT_OP_WARN_LIMIT = 0x6A, + PMBUS_PIN_OP_WARN_LIMIT = 0x6B, + + PMBUS_STATUS_BYTE = 0x78, + PMBUS_STATUS_WORD = 0x79, + PMBUS_STATUS_VOUT = 0x7A, + PMBUS_STATUS_IOUT = 0x7B, + PMBUS_STATUS_INPUT = 0x7C, + PMBUS_STATUS_TEMPERATURE = 0x7D, + PMBUS_STATUS_CML = 0x7E, + PMBUS_STATUS_OTHER = 0x7F, + PMBUS_STATUS_MFR_SPECIFIC = 0x80, + PMBUS_STATUS_FAN_12 = 0x81, + PMBUS_STATUS_FAN_34 = 0x82, + + PMBUS_READ_VIN = 0x88, + PMBUS_READ_IIN = 0x89, + PMBUS_READ_VCAP = 0x8A, + PMBUS_READ_VOUT = 0x8B, + PMBUS_READ_IOUT = 0x8C, + PMBUS_READ_TEMPERATURE_1 = 0x8D, + PMBUS_READ_TEMPERATURE_2 = 0x8E, + PMBUS_READ_TEMPERATURE_3 = 0x8F, + PMBUS_READ_FAN_SPEED_1 = 0x90, + PMBUS_READ_FAN_SPEED_2 = 0x91, + PMBUS_READ_FAN_SPEED_3 = 0x92, + PMBUS_READ_FAN_SPEED_4 = 0x93, + PMBUS_READ_DUTY_CYCLE = 0x94, + PMBUS_READ_FREQUENCY = 0x95, + PMBUS_READ_POUT = 0x96, + PMBUS_READ_PIN = 0x97, + + PMBUS_REVISION = 0x98, + PMBUS_MFR_ID = 0x99, + PMBUS_MFR_MODEL = 0x9A, + PMBUS_MFR_REVISION = 0x9B, + PMBUS_MFR_LOCATION = 0x9C, + PMBUS_MFR_DATE = 0x9D, + PMBUS_MFR_SERIAL = 0x9E, + + PMBUS_MFR_VIN_MIN = 0xA0, + PMBUS_MFR_VIN_MAX = 0xA1, + PMBUS_MFR_IIN_MAX = 0xA2, + PMBUS_MFR_PIN_MAX = 0xA3, + PMBUS_MFR_VOUT_MIN = 0xA4, + PMBUS_MFR_VOUT_MAX = 0xA5, + PMBUS_MFR_IOUT_MAX = 0xA6, + PMBUS_MFR_POUT_MAX = 0xA7, + + PMBUS_IC_DEVICE_ID = 0xAD, + PMBUS_IC_DEVICE_REV = 0xAE, + + PMBUS_MFR_MAX_TEMP_1 = 0xC0, + PMBUS_MFR_MAX_TEMP_2 = 0xC1, + PMBUS_MFR_MAX_TEMP_3 = 0xC2, + +/* + * Virtual registers. + * Useful to support attributes which are not supported by standard PMBus + * registers but exist as manufacturer specific registers on individual chips. + * Must be mapped to real registers in device specific code. + * + * Semantics: + * Virtual registers are all word size. + * READ registers are read-only; writes are either ignored or return an error. + * RESET registers are read/write. Reading reset registers returns zero + * (used for detection), writing any value causes the associated history to be + * reset. + * Virtual registers have to be handled in device specific driver code. Chip + * driver code returns non-negative register values if a virtual register is + * supported, or a negative error code if not. The chip driver may return + * -ENODATA or any other error code in this case, though an error code other + * than -ENODATA is handled more efficiently and thus preferred. Either case, + * the calling PMBus core code will abort if the chip driver returns an error + * code when reading or writing virtual registers. + */ + PMBUS_VIRT_BASE = 0x100, + PMBUS_VIRT_READ_TEMP_AVG, + PMBUS_VIRT_READ_TEMP_MIN, + PMBUS_VIRT_READ_TEMP_MAX, + PMBUS_VIRT_RESET_TEMP_HISTORY, + PMBUS_VIRT_READ_VIN_AVG, + PMBUS_VIRT_READ_VIN_MIN, + PMBUS_VIRT_READ_VIN_MAX, + PMBUS_VIRT_RESET_VIN_HISTORY, + PMBUS_VIRT_READ_IIN_AVG, + PMBUS_VIRT_READ_IIN_MIN, + PMBUS_VIRT_READ_IIN_MAX, + PMBUS_VIRT_RESET_IIN_HISTORY, + PMBUS_VIRT_READ_PIN_AVG, + PMBUS_VIRT_READ_PIN_MIN, + PMBUS_VIRT_READ_PIN_MAX, + PMBUS_VIRT_RESET_PIN_HISTORY, + PMBUS_VIRT_READ_POUT_AVG, + PMBUS_VIRT_READ_POUT_MIN, + PMBUS_VIRT_READ_POUT_MAX, + PMBUS_VIRT_RESET_POUT_HISTORY, + PMBUS_VIRT_READ_VOUT_AVG, + PMBUS_VIRT_READ_VOUT_MIN, + PMBUS_VIRT_READ_VOUT_MAX, + PMBUS_VIRT_RESET_VOUT_HISTORY, + PMBUS_VIRT_READ_IOUT_AVG, + PMBUS_VIRT_READ_IOUT_MIN, + PMBUS_VIRT_READ_IOUT_MAX, + PMBUS_VIRT_RESET_IOUT_HISTORY, + PMBUS_VIRT_READ_TEMP2_AVG, + PMBUS_VIRT_READ_TEMP2_MIN, + PMBUS_VIRT_READ_TEMP2_MAX, + PMBUS_VIRT_RESET_TEMP2_HISTORY, + + PMBUS_VIRT_READ_VMON, + PMBUS_VIRT_VMON_UV_WARN_LIMIT, + PMBUS_VIRT_VMON_OV_WARN_LIMIT, + PMBUS_VIRT_VMON_UV_FAULT_LIMIT, + PMBUS_VIRT_VMON_OV_FAULT_LIMIT, + PMBUS_VIRT_STATUS_VMON, + + /* + * RPM and PWM Fan control + * + * Drivers wanting to expose PWM control must define the behaviour of + * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the + * {read,write}_word_data callback. + * + * pmbus core provides a default implementation for + * PMBUS_VIRT_FAN_TARGET_[1-4]. + * + * TARGET, PWM and PWM_ENABLE members must be defined sequentially; + * pmbus core uses the difference between the provided register and + * it's _1 counterpart to calculate the FAN/PWM ID. + */ + PMBUS_VIRT_FAN_TARGET_1, + PMBUS_VIRT_FAN_TARGET_2, + PMBUS_VIRT_FAN_TARGET_3, + PMBUS_VIRT_FAN_TARGET_4, + PMBUS_VIRT_PWM_1, + PMBUS_VIRT_PWM_2, + PMBUS_VIRT_PWM_3, + PMBUS_VIRT_PWM_4, + PMBUS_VIRT_PWM_ENABLE_1, + PMBUS_VIRT_PWM_ENABLE_2, + PMBUS_VIRT_PWM_ENABLE_3, + PMBUS_VIRT_PWM_ENABLE_4, + + /* Samples for average + * + * Drivers wanting to expose functionality for changing the number of + * samples used for average values should implement support in + * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it + * applies to all types of measurements, or any number of specific + * PMBUS_VIRT_*_SAMPLES registers to allow for individual control. + */ + PMBUS_VIRT_SAMPLES, + PMBUS_VIRT_IN_SAMPLES, + PMBUS_VIRT_CURR_SAMPLES, + PMBUS_VIRT_POWER_SAMPLES, + PMBUS_VIRT_TEMP_SAMPLES, +}; + +/* + * OPERATION + */ +#define PB_OPERATION_CONTROL_ON BIT(7) + +/* + * WRITE_PROTECT + */ +#define PB_WP_ALL BIT(7) /* all but WRITE_PROTECT */ +#define PB_WP_OP BIT(6) /* all but WP, OPERATION, PAGE */ +#define PB_WP_VOUT BIT(5) /* all but WP, OPERATION, PAGE, VOUT, ON_OFF */ + +#define PB_WP_ANY (PB_WP_ALL | PB_WP_OP | PB_WP_VOUT) + +/* + * CAPABILITY + */ +#define PB_CAPABILITY_SMBALERT BIT(4) +#define PB_CAPABILITY_ERROR_CHECK BIT(7) + +/* + * VOUT_MODE + */ +#define PB_VOUT_MODE_MODE_MASK 0xe0 +#define PB_VOUT_MODE_PARAM_MASK 0x1f + +#define PB_VOUT_MODE_LINEAR 0x00 +#define PB_VOUT_MODE_VID 0x20 +#define PB_VOUT_MODE_DIRECT 0x40 + +/* + * Fan configuration + */ +#define PB_FAN_2_PULSE_MASK (BIT(0) | BIT(1)) +#define PB_FAN_2_RPM BIT(2) +#define PB_FAN_2_INSTALLED BIT(3) +#define PB_FAN_1_PULSE_MASK (BIT(4) | BIT(5)) +#define PB_FAN_1_RPM BIT(6) +#define PB_FAN_1_INSTALLED BIT(7) + +enum pmbus_fan_mode { percent = 0, rpm }; + +/* + * STATUS_BYTE, STATUS_WORD (lower) + */ +#define PB_STATUS_NONE_ABOVE BIT(0) +#define PB_STATUS_CML BIT(1) +#define PB_STATUS_TEMPERATURE BIT(2) +#define PB_STATUS_VIN_UV BIT(3) +#define PB_STATUS_IOUT_OC BIT(4) +#define PB_STATUS_VOUT_OV BIT(5) +#define PB_STATUS_OFF BIT(6) +#define PB_STATUS_BUSY BIT(7) + +/* + * STATUS_WORD (upper) + */ +#define PB_STATUS_UNKNOWN BIT(8) +#define PB_STATUS_OTHER BIT(9) +#define PB_STATUS_FANS BIT(10) +#define PB_STATUS_POWER_GOOD_N BIT(11) +#define PB_STATUS_WORD_MFR BIT(12) +#define PB_STATUS_INPUT BIT(13) +#define PB_STATUS_IOUT_POUT BIT(14) +#define PB_STATUS_VOUT BIT(15) + +/* + * STATUS_IOUT + */ +#define PB_POUT_OP_WARNING BIT(0) +#define PB_POUT_OP_FAULT BIT(1) +#define PB_POWER_LIMITING BIT(2) +#define PB_CURRENT_SHARE_FAULT BIT(3) +#define PB_IOUT_UC_FAULT BIT(4) +#define PB_IOUT_OC_WARNING BIT(5) +#define PB_IOUT_OC_LV_FAULT BIT(6) +#define PB_IOUT_OC_FAULT BIT(7) + +/* + * STATUS_VOUT, STATUS_INPUT + */ +#define PB_VOLTAGE_VIN_OFF BIT(3) +#define PB_VOLTAGE_UV_FAULT BIT(4) +#define PB_VOLTAGE_UV_WARNING BIT(5) +#define PB_VOLTAGE_OV_WARNING BIT(6) +#define PB_VOLTAGE_OV_FAULT BIT(7) + +/* + * STATUS_INPUT + */ +#define PB_PIN_OP_WARNING BIT(0) +#define PB_IIN_OC_WARNING BIT(1) +#define PB_IIN_OC_FAULT BIT(2) + +/* + * STATUS_TEMPERATURE + */ +#define PB_TEMP_UT_FAULT BIT(4) +#define PB_TEMP_UT_WARNING BIT(5) +#define PB_TEMP_OT_WARNING BIT(6) +#define PB_TEMP_OT_FAULT BIT(7) + +/* + * STATUS_FAN + */ +#define PB_FAN_AIRFLOW_WARNING BIT(0) +#define PB_FAN_AIRFLOW_FAULT BIT(1) +#define PB_FAN_FAN2_SPEED_OVERRIDE BIT(2) +#define PB_FAN_FAN1_SPEED_OVERRIDE BIT(3) +#define PB_FAN_FAN2_WARNING BIT(4) +#define PB_FAN_FAN1_WARNING BIT(5) +#define PB_FAN_FAN2_FAULT BIT(6) +#define PB_FAN_FAN1_FAULT BIT(7) + +/* + * CML_FAULT_STATUS + */ +#define PB_CML_FAULT_OTHER_MEM_LOGIC BIT(0) +#define PB_CML_FAULT_OTHER_COMM BIT(1) +#define PB_CML_FAULT_PROCESSOR BIT(3) +#define PB_CML_FAULT_MEMORY BIT(4) +#define PB_CML_FAULT_PACKET_ERROR BIT(5) +#define PB_CML_FAULT_INVALID_DATA BIT(6) +#define PB_CML_FAULT_INVALID_COMMAND BIT(7) + +enum pmbus_sensor_classes { + PSC_VOLTAGE_IN = 0, + PSC_VOLTAGE_OUT, + PSC_CURRENT_IN, + PSC_CURRENT_OUT, + PSC_POWER, + PSC_TEMPERATURE, + PSC_FAN, + PSC_PWM, + PSC_NUM_CLASSES /* Number of power sensor classes */ +}; + +#define PMBUS_PAGES 32 /* Per PMBus specification */ +#define PMBUS_PHASES 10 /* Maximum number of phases per page */ + +/* Functionality bit mask */ +#define PMBUS_HAVE_VIN BIT(0) +#define PMBUS_HAVE_VCAP BIT(1) +#define PMBUS_HAVE_VOUT BIT(2) +#define PMBUS_HAVE_IIN BIT(3) +#define PMBUS_HAVE_IOUT BIT(4) +#define PMBUS_HAVE_PIN BIT(5) +#define PMBUS_HAVE_POUT BIT(6) +#define PMBUS_HAVE_FAN12 BIT(7) +#define PMBUS_HAVE_FAN34 BIT(8) +#define PMBUS_HAVE_TEMP BIT(9) +#define PMBUS_HAVE_TEMP2 BIT(10) +#define PMBUS_HAVE_TEMP3 BIT(11) +#define PMBUS_HAVE_STATUS_VOUT BIT(12) +#define PMBUS_HAVE_STATUS_IOUT BIT(13) +#define PMBUS_HAVE_STATUS_INPUT BIT(14) +#define PMBUS_HAVE_STATUS_TEMP BIT(15) +#define PMBUS_HAVE_STATUS_FAN12 BIT(16) +#define PMBUS_HAVE_STATUS_FAN34 BIT(17) +#define PMBUS_HAVE_VMON BIT(18) +#define PMBUS_HAVE_STATUS_VMON BIT(19) +#define PMBUS_HAVE_PWM12 BIT(20) +#define PMBUS_HAVE_PWM34 BIT(21) +#define PMBUS_HAVE_SAMPLES BIT(22) + +#define PMBUS_PHASE_VIRTUAL BIT(30) /* Phases on this page are virtual */ +#define PMBUS_PAGE_VIRTUAL BIT(31) /* Page is virtual */ + +enum pmbus_data_format { linear = 0, ieee754, direct, vid }; +enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv }; + +struct pmbus_driver_info { + int pages; /* Total number of pages */ + u8 phases[PMBUS_PAGES]; /* Number of phases per page */ + enum pmbus_data_format format[PSC_NUM_CLASSES]; + enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */ + /* + * Support one set of coefficients for each sensor type + * Used for chips providing data in direct mode. + */ + int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ + int b[PSC_NUM_CLASSES]; /* offset */ + int R[PSC_NUM_CLASSES]; /* exponent */ + + u32 func[PMBUS_PAGES]; /* Functionality, per page */ + u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */ + /* + * The following functions map manufacturing specific register values + * to PMBus standard register values. Specify only if mapping is + * necessary. + * Functions return the register value (read) or zero (write) if + * successful. A return value of -ENODATA indicates that there is no + * manufacturer specific register, but that a standard PMBus register + * may exist. Any other negative return value indicates that the + * register does not exist, and that no attempt should be made to read + * the standard register. + */ + int (*read_byte_data)(struct i2c_client *client, int page, int reg); + int (*read_word_data)(struct i2c_client *client, int page, int phase, + int reg); + int (*write_byte_data)(struct i2c_client *client, int page, int reg, + u8 byte); + int (*write_word_data)(struct i2c_client *client, int page, int reg, + u16 word); + int (*write_byte)(struct i2c_client *client, int page, u8 value); + /* + * The identify function determines supported PMBus functionality. + * This function is only necessary if a chip driver supports multiple + * chips, and the chip functionality is not pre-determined. + */ + int (*identify)(struct i2c_client *client, + struct pmbus_driver_info *info); + + /* Regulator functionality, if supported by this chip driver. */ + int num_regulators; + const struct regulator_desc *reg_desc; + + /* custom attributes */ + const struct attribute_group **groups; +}; + +/* Regulator ops */ + +extern const struct regulator_ops pmbus_regulator_ops; + +/* Macros for filling in array of struct regulator_desc */ +#define PMBUS_REGULATOR_STEP(_name, _id, _voltages, _step) \ + [_id] = { \ + .name = (_name # _id), \ + .id = (_id), \ + .of_match = of_match_ptr(_name # _id), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &pmbus_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + .n_voltages = _voltages, \ + .uV_step = _step, \ + } + +#define PMBUS_REGULATOR(_name, _id) PMBUS_REGULATOR_STEP(_name, _id, 0, 0) + +/* Function declarations */ + +void pmbus_clear_cache(struct i2c_client *client); +void pmbus_set_update(struct i2c_client *client, u8 reg, bool update); +int pmbus_set_page(struct i2c_client *client, int page, int phase); +int pmbus_read_word_data(struct i2c_client *client, int page, int phase, + u8 reg); +int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg, + u16 word); +int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); +int pmbus_write_byte(struct i2c_client *client, int page, u8 value); +int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, + u8 value); +int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg, + u8 mask, u8 value); +void pmbus_clear_faults(struct i2c_client *client); +bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); +bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); +int pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info); +const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client + *client); +int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode); +int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode); +int pmbus_update_fan(struct i2c_client *client, int page, int id, + u8 config, u8 mask, u16 command); +struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client); + +#endif /* PMBUS_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_csu550.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c similarity index 76% rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_csu550.c rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c index 36d07f071a71..0b95663b9bad 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_csu550.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c @@ -13,7 +13,7 @@ #include #include #include -#include "wb_pmbus.h" +#include "pmbus.h" struct pmbus_device_info { int pages; @@ -31,54 +31,56 @@ static void pmbus_find_sensor_groups(struct i2c_client *client, int page; /* Sensors detected on page 0 only */ - if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_VIN)) + if (pmbus_check_word_register(client, 0, PMBUS_READ_VIN)) info->func[0] |= PMBUS_HAVE_VIN; - if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_IIN)) + if (pmbus_check_word_register(client, 0, PMBUS_READ_VCAP)) + info->func[0] |= PMBUS_HAVE_VCAP; + if (pmbus_check_word_register(client, 0, PMBUS_READ_IIN)) info->func[0] |= PMBUS_HAVE_IIN; - if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_PIN)) + if (pmbus_check_word_register(client, 0, PMBUS_READ_PIN)) info->func[0] |= PMBUS_HAVE_PIN; if (info->func[0] - && wb_pmbus_check_byte_register(client, 0, PMBUS_STATUS_INPUT)) + && pmbus_check_byte_register(client, 0, PMBUS_STATUS_INPUT)) info->func[0] |= PMBUS_HAVE_STATUS_INPUT; - if (wb_pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_12) && - wb_pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_1)) { + if (pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_12) && + pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_1)) { info->func[0] |= PMBUS_HAVE_FAN12; - if (wb_pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_12)) + if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_12)) info->func[0] |= PMBUS_HAVE_STATUS_FAN12; } - if (wb_pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_34) && - wb_pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_3)) { + if (pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_34) && + pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_3)) { info->func[0] |= PMBUS_HAVE_FAN34; - if (wb_pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_34)) + if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_34)) info->func[0] |= PMBUS_HAVE_STATUS_FAN34; } - if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_1)) + if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_1)) info->func[0] |= PMBUS_HAVE_TEMP; - if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_2)) + if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_2)) info->func[0] |= PMBUS_HAVE_TEMP2; - if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_3)) + if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_3)) info->func[0] |= PMBUS_HAVE_TEMP3; if (info->func[0] & (PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 | PMBUS_HAVE_TEMP3) - && wb_pmbus_check_byte_register(client, 0, + && pmbus_check_byte_register(client, 0, PMBUS_STATUS_TEMPERATURE)) info->func[0] |= PMBUS_HAVE_STATUS_TEMP; /* Sensors detected on all pages */ for (page = 0; page < info->pages; page++) { - if (wb_pmbus_check_word_register(client, page, PMBUS_READ_VOUT)) { + if (pmbus_check_word_register(client, page, PMBUS_READ_VOUT)) { info->func[page] |= PMBUS_HAVE_VOUT; - if (wb_pmbus_check_byte_register(client, page, + if (pmbus_check_byte_register(client, page, PMBUS_STATUS_VOUT)) info->func[page] |= PMBUS_HAVE_STATUS_VOUT; } - if (wb_pmbus_check_word_register(client, page, PMBUS_READ_IOUT)) { + if (pmbus_check_word_register(client, page, PMBUS_READ_IOUT)) { info->func[page] |= PMBUS_HAVE_IOUT; - if (wb_pmbus_check_byte_register(client, 0, + if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_IOUT)) info->func[page] |= PMBUS_HAVE_STATUS_IOUT; } - if (wb_pmbus_check_word_register(client, page, PMBUS_READ_POUT)) + if (pmbus_check_word_register(client, page, PMBUS_READ_POUT)) info->func[page] |= PMBUS_HAVE_POUT; } } @@ -98,26 +100,26 @@ static int pmbus_identify(struct i2c_client *client, * maximum number of pages has been reached. Assume that * this is the number of pages supported by the chip. */ - if (wb_pmbus_check_byte_register(client, 0, PMBUS_PAGE)) { + if (pmbus_check_byte_register(client, 0, PMBUS_PAGE)) { int page; for (page = 1; page < PMBUS_PAGES; page++) { - if (wb_pmbus_set_page(client, page, 0xff) < 0) + if (pmbus_set_page(client, page, 0xff) < 0) break; } - wb_pmbus_set_page(client, 0, 0xff); + pmbus_set_page(client, 0, 0xff); info->pages = page; } else { info->pages = 1; } - wb_pmbus_clear_faults(client); + pmbus_clear_faults(client); } - if (wb_pmbus_check_byte_register(client, 0, PMBUS_VOUT_MODE)) { + if (pmbus_check_byte_register(client, 0, PMBUS_VOUT_MODE)) { int vout_mode, i; - vout_mode = wb_pmbus_read_byte_data(client, 0, PMBUS_VOUT_MODE); + vout_mode = pmbus_read_byte_data(client, 0, PMBUS_VOUT_MODE); if (vout_mode >= 0 && vout_mode != 0xff) { switch (vout_mode >> 5) { case 0: @@ -184,7 +186,7 @@ static int pmbus_probe(struct i2c_client *client) info->identify = pmbus_identify; dev->platform_data = pdata; - return wb_pmbus_do_probe(client, info); + return pmbus_do_probe(client, info); } static const struct pmbus_device_info pmbus_info_one = { @@ -225,7 +227,6 @@ static struct i2c_driver pmbus_driver = { .name = "wb_pmbus", }, .probe_new = pmbus_probe, - .remove = wb_pmbus_do_remove, .id_table = pmbus_id, }; @@ -234,3 +235,4 @@ module_i2c_driver(pmbus_driver); MODULE_AUTHOR("support"); MODULE_DESCRIPTION("Generic PMBus driver"); MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(PMBUS); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_gpio_device.c similarity index 96% rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio_device.c rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_gpio_device.c index 1e1d815eedf1..80f18b2eab55 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_gpio_device.c @@ -64,7 +64,7 @@ static void i2c_gpio_release(struct device *dev) } static struct platform_device wb_i2c_gpio_device = { - .name = "wb-i2c-gpio", + .name = "i2c-gpio", .id = -1, .num_resources = 0, .resource = NULL, @@ -78,7 +78,7 @@ static struct platform_device wb_i2c_gpio_device = { * i2c */ static struct gpiod_lookup_table wb_i2c_gpio_table = { - .dev_id = "wb-i2c-gpio", + .dev_id = "i2c-gpio", .table = { GPIO_LOOKUP("wb_gpio_d1500", 17, "sda", GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), @@ -104,7 +104,7 @@ static int __init wb_i2c_gpio_device_init(void) if (bus_num >= 0) { wb_i2c_gpio_device.id = bus_num; - snprintf(i2c_gpio_dev_name, I2C_GPIO_DEV_NAME_LEN, "wb-i2c-gpio.%d", bus_num); + snprintf(i2c_gpio_dev_name, I2C_GPIO_DEV_NAME_LEN, "i2c-gpio.%d", bus_num); wb_i2c_gpio_table.dev_id = i2c_gpio_dev_name; } diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.c similarity index 100% rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.c rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.c diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.h similarity index 100% rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.h rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.h diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.c similarity index 100% rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.c rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.c diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.h similarity index 100% rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.h rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.h diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe132g5c_pmbus.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c similarity index 69% rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe132g5c_pmbus.c rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c index dd7a97afb9ec..d1e0fa220725 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe132g5c_pmbus.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c @@ -8,7 +8,7 @@ #include #include #include -#include "wb_pmbus.h" +#include "pmbus.h" static int g_wb_xdpe132g5_pmbus_debug = 0; static int g_wb_xdpe132g5_pmbus_error = 0; @@ -57,23 +57,21 @@ static ssize_t set_xdpe132g5c_avs(struct device *dev, struct device_attribute *d unsigned long val; struct sensor_device_attribute *attr = to_sensor_dev_attr(da); struct i2c_client *client = to_i2c_client(dev); - struct pmbus_data *data; - data = i2c_get_clientdata(client); ret = kstrtoul(buf, 0, &val); if (ret){ return ret; } - mutex_lock(&data->update_lock); + /* set value */ - ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)val); + ret = pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)val); if (ret < 0) { WB_XDPE132G5_PMBUS_ERROR("set pmbus_vout_command fail\n"); goto finish_set; } finish_set: - wb_pmbus_clear_faults(client); - mutex_unlock(&data->update_lock); + pmbus_clear_faults(client); + return (ret < 0) ? ret : count; } @@ -83,18 +81,15 @@ static ssize_t show_xdpe132g5c_avs(struct device *dev, struct device_attribute * int val; struct sensor_device_attribute *attr = to_sensor_dev_attr(da); struct i2c_client *client = to_i2c_client(dev); - struct pmbus_data *data; - data = i2c_get_clientdata(client); - mutex_lock(&data->update_lock); - val = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND); + val = pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND); if (val < 0) { WB_XDPE132G5_PMBUS_ERROR("fail val = %d\n", val); goto finish_show; } finish_show: - wb_pmbus_clear_faults(client); - mutex_unlock(&data->update_lock); + pmbus_clear_faults(client); + return snprintf(buf, BUF_SIZE, "0x%04x\n", val); } @@ -102,7 +97,7 @@ static int xdpe_get_vout_precision(struct i2c_client *client, int page, int *vou { int i, vout_mode, a_size; - vout_mode = wb_pmbus_read_byte_data(client, page, PMBUS_VOUT_MODE); + vout_mode = pmbus_read_byte_data(client, page, PMBUS_VOUT_MODE); if (vout_mode < 0) { WB_XDPE132G5_PMBUS_ERROR("%d-%04x: read xdpe page%d vout mode reg: 0x%x failed, ret: %d\n", client->adapter->nr, client->addr, page, PMBUS_VOUT_MODE, vout_mode); @@ -131,28 +126,23 @@ static ssize_t xdpe132g5_avs_vout_show(struct device *dev, struct device_attribu { struct i2c_client *client = to_i2c_client(dev->parent); struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); int vout_cmd, ret, vout_precision; long vout; - mutex_lock(&data->update_lock); ret = xdpe_get_vout_precision(client, attr->index, &vout_precision); if (ret < 0) { WB_XDPE132G5_PMBUS_ERROR("%d-%04x: get xdpe avs%d vout precision failed, ret: %d\n", client->adapter->nr, client->addr, attr->index, ret); - mutex_unlock(&data->update_lock); return ret; } - vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND); + vout_cmd = pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND); if (vout_cmd < 0) { WB_XDPE132G5_PMBUS_ERROR("%d-%04x: read page%d, vout command reg: 0x%x failed, ret: %d\n", client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd); - mutex_unlock(&data->update_lock); return vout_cmd; } - mutex_unlock(&data->update_lock); vout = vout_cmd * 1000L * 1000L / vout_precision; WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: page%d vout: %ld, vout_cmd: 0x%x, precision: %d\n", client->adapter->nr, client->addr, attr->index, vout, vout_cmd, vout_precision); @@ -164,8 +154,6 @@ static ssize_t xdpe132g5_avs_vout_store(struct device *dev, struct device_attrib { struct i2c_client *client = to_i2c_client(dev->parent); struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - int vout_max, vout_min; int ret, vout_cmd, vout_cmd_set; int vout_precision; long vout; @@ -187,20 +175,10 @@ static ssize_t xdpe132g5_avs_vout_store(struct device *dev, struct device_attrib return -EINVAL; } - vout_max = data->vout_max[attr->index]; - vout_min = data->vout_min[attr->index]; - if ((vout > vout_max) || (vout < vout_min)) { - WB_XDPE132G5_PMBUS_ERROR("%d-%04x: vout value: %ld, out of range [%d, %d] \n", client->adapter->nr, - client->addr, vout, vout_min, vout_max); - return -EINVAL; - } - - mutex_lock(&data->update_lock); ret = xdpe_get_vout_precision(client, attr->index, &vout_precision); if (ret < 0) { WB_XDPE132G5_PMBUS_ERROR("%d-%04x: get xdpe avs%d vout precision failed, ret: %d\n", client->adapter->nr, client->addr, attr->index, ret); - mutex_unlock(&data->update_lock); return ret; } @@ -208,140 +186,42 @@ static ssize_t xdpe132g5_avs_vout_store(struct device *dev, struct device_attrib if (vout_cmd_set > 0xffff) { WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value, page%d, vout: %ld, vout_precision: %d, vout_cmd_set: 0x%x\n", client->adapter->nr, client->addr, attr->index, vout, vout_precision, vout_cmd_set); - mutex_unlock(&data->update_lock); return -EINVAL; } /* set VOUT_COMMAND */ - ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)vout_cmd_set); + ret = pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)vout_cmd_set); if (ret < 0) { WB_XDPE132G5_PMBUS_ERROR("%d-%04x: set xdpe page%d vout cmd reg: 0x%x, value: 0x%x failed, ret: %d\n", client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set, ret); - mutex_unlock(&data->update_lock); return ret; } /* read back VOUT_COMMAND */ - vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND); + vout_cmd = pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND); if (vout_cmd < 0) { WB_XDPE132G5_PMBUS_ERROR("%d-%04x: read page%d, vout command reg: 0x%x failed, ret: %d\n", client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd); - mutex_unlock(&data->update_lock); return vout_cmd; } if (vout_cmd != vout_cmd_set) { WB_XDPE132G5_PMBUS_ERROR("%d-%04x: page%d vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n", client->adapter->nr, client->addr, attr->index, vout_cmd, vout_cmd_set); - mutex_unlock(&data->update_lock); return -EIO; } - mutex_unlock(&data->update_lock); + WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: set page%d vout cmd success, vout: %ld uV, vout_cmd_set: 0x%x\n", client->adapter->nr, client->addr, attr->index, vout, vout_cmd_set); return count; } -static ssize_t xdpe132g5_avs_vout_max_store(struct device *dev, - struct device_attribute *devattr, const char *buf, size_t count) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - int ret, vout_threshold; - - if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { - WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr, - attr->index); - return -EINVAL; - } - - ret = kstrtoint(buf, 0, &vout_threshold); - if (ret) { - WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf); - return -EINVAL; - } - - WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: vout%d max threshold: %d", client->adapter->nr, client->addr, - attr->index, vout_threshold); - - data->vout_max[attr->index] = vout_threshold; - return count; -} - -static ssize_t xdpe132g5_avs_vout_max_show(struct device *dev, - struct device_attribute *devattr, char *buf) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - - if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { - WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr, - attr->index); - return -EINVAL; - } - - return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_max[attr->index]); -} - -static ssize_t xdpe132g5_avs_vout_min_store(struct device *dev, - struct device_attribute *devattr, const char *buf, size_t count) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - int ret, vout_threshold; - - if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { - WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr, - attr->index); - return -EINVAL; - } - - ret = kstrtoint(buf, 0, &vout_threshold); - if (ret) { - WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf); - return -EINVAL; - } - - WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: vout%d min threshold: %d", client->adapter->nr, client->addr, - attr->index, vout_threshold); - - data->vout_min[attr->index] = vout_threshold; - return count; -} - -static ssize_t xdpe132g5_avs_vout_min_show(struct device *dev, - struct device_attribute *devattr, char *buf) -{ - struct i2c_client *client = to_i2c_client(dev->parent); - struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); - struct pmbus_data *data = i2c_get_clientdata(client); - - if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { - WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr, - attr->index); - return -EINVAL; - } - - return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_min[attr->index]); -} - static SENSOR_DEVICE_ATTR_RW(avs0_vout, xdpe132g5_avs_vout, 0); static SENSOR_DEVICE_ATTR_RW(avs1_vout, xdpe132g5_avs_vout, 1); -static SENSOR_DEVICE_ATTR_RW(avs0_vout_max, xdpe132g5_avs_vout_max, 0); -static SENSOR_DEVICE_ATTR_RW(avs0_vout_min, xdpe132g5_avs_vout_min, 0); -static SENSOR_DEVICE_ATTR_RW(avs1_vout_max, xdpe132g5_avs_vout_max, 1); -static SENSOR_DEVICE_ATTR_RW(avs1_vout_min, xdpe132g5_avs_vout_min, 1); static struct attribute *avs_ctrl_attrs[] = { &sensor_dev_attr_avs0_vout.dev_attr.attr, &sensor_dev_attr_avs1_vout.dev_attr.attr, - &sensor_dev_attr_avs0_vout_max.dev_attr.attr, - &sensor_dev_attr_avs0_vout_min.dev_attr.attr, - &sensor_dev_attr_avs1_vout_max.dev_attr.attr, - &sensor_dev_attr_avs1_vout_min.dev_attr.attr, NULL, }; @@ -375,7 +255,7 @@ static int xdpe132g5c_identify(struct i2c_client *client, struct pmbus_driver_in /* Read the register with VOUT scaling value.*/ for (i = 0; i < XDPE132G5C_PAGE_NUM; i++) { for (retry = 0; retry < RETRY_TIME; retry++) { - ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE); + ret = pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE); if (ret < 0 || ret == 0xff) { msleep(5); continue; @@ -460,7 +340,7 @@ static int xdpe132g5c_probe(struct i2c_client *client, return -ENOMEM; } - status = wb_pmbus_do_probe(client, &xdpe132g5c_info); + status = pmbus_do_probe(client, &xdpe132g5c_info); if (status != 0) { WB_XDPE132G5_PMBUS_ERROR("pmbus probe error %d\n", status); return status; @@ -478,7 +358,6 @@ static int xdpe132g5c_probe(struct i2c_client *client, static void xdpe132g5c_remove(struct i2c_client *client) { sysfs_remove_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group); - wb_pmbus_do_remove(client); return; } @@ -510,3 +389,4 @@ module_i2c_driver(xdpe132g5c_driver); MODULE_AUTHOR("support"); MODULE_DESCRIPTION("PMBus driver for Infineon XDPE132g5 family"); MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(PMBUS); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py index c693ad9f0ac5..0693b1f4eaea 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py @@ -1,9 +1,19 @@ #!/usr/bin/env python3 -######################################################################## # -# Module contains an implementation of SONiC Platform Base API and -# provides the Fans' information which are available in the platform. +# Copyright (C) 2024 Micas Networks Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. # +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . ######################################################################## try: @@ -308,3 +318,57 @@ def get_revision(self): self.fan_dict_update() return self.fan_dict["HW"] return 'N/A' + + + def is_under_speed(self): + """ + Calculates if the fan speed is under the tolerated low speed threshold + + Default calculation requires get_speed_tolerance to be implemented, and checks + if the current fan speed (expressed as a percentage) is lower than + percent below the target fan speed (expressed as a percentage) + + Returns: + A boolean, True if fan speed is under the low threshold, False if not + """ + speed = self.get_speed() + target_speed = self.get_target_speed() + tolerance = self.get_speed_tolerance() + + if speed is None or target_speed is None or tolerance is None: + return False + + for param, value in (('speed', speed), ('target speed', target_speed), ('speed tolerance', tolerance)): + if not isinstance(value, int): + raise TypeError(f'Fan {param} is not an integer value: {param}={value}') + if value < 0 or value > 100: + raise ValueError(f'Fan {param} is not a valid percentage value: {param}={value}') + + return speed * 100 < target_speed * (100 - tolerance) + + def is_over_speed(self): + """ + Calculates if the fan speed is over the tolerated high speed threshold + + Default calculation requires get_speed_tolerance to be implemented, and checks + if the current fan speed (expressed as a percentage) is higher than + percent above the target fan speed (expressed as a percentage) + + Returns: + A boolean, True if fan speed is over the high threshold, False if not + """ + speed = self.get_speed() + target_speed = self.get_target_speed() + tolerance = self.get_speed_tolerance() + + if speed is None or target_speed is None or tolerance is None: + return False + + for param, value in (('speed', speed), ('target speed', target_speed), ('speed tolerance', tolerance)): + if not isinstance(value, int): + raise TypeError(f'Fan {param} is not an integer value: {param}={value}') + if value < 0 or value > 100: + raise ValueError(f'Fan {param} is not a valid percentage value: {param}={value}') + + return speed * 100 > target_speed * (100 + tolerance) + diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/thermal.py index 4632de3bc1e4..c88f7cda8372 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/thermal.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/thermal.py @@ -1,12 +1,19 @@ #!/usr/bin/env python3 - -######################################################################## # -# Module contains an implementation of SONiC Platform Base API and -# provides the Thermals' information which are available in the platform +# Copyright (C) 2024 Micas Networks Inc. # -######################################################################## - +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . try: import time @@ -86,7 +93,10 @@ def get_status(self): False if not """ self.temp_dict_update() - if (self.temp_dict["Value"] >= self.temp_dict["High"]) or (self.temp_dict["Value"] <= self.temp_dict["Low"]): + if self.temp_dict["High"] is not None and self.temp_dict["Value"] > self.temp_dict["High"]: + return False + + if self.temp_dict["Low"] is not None and self.temp_dict["Value"] < self.temp_dict["Low"]: return False return True @@ -120,6 +130,15 @@ def get_temperature(self): value = self.temp_dict["Value"] if value is None or value == self.int_case.error_ret: return "N/A" + # temp value invalid + temp_invalid = self.temp_dict.get("Invalid") + if temp_invalid is not None and int(value) == int(temp_invalid): + return "N/A" + # temp value error + temp_error = self.temp_dict.get("Error") + if temp_error is not None and int(value) == int(temp_error): + return "N/A" + if len(self.temperature_list) >= 1000: del self.temperature_list[0] self.temperature_list.append(float(value)) diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/changelog b/platform/broadcom/sonic-platform-modules-micas/debian/changelog index d908208c5e37..e4a1404b0997 100644 --- a/platform/broadcom/sonic-platform-modules-micas/debian/changelog +++ b/platform/broadcom/sonic-platform-modules-micas/debian/changelog @@ -2,4 +2,4 @@ sonic-micas-platform-modules (1.0) unstable; urgency=low * Initial release - -- support Fri, 21 APR 2017 11:11:11 -0800 + -- support Mon, 12 Aug 2024 11:11:11 -0800 diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/control b/platform/broadcom/sonic-platform-modules-micas/debian/control index 55b5837776d5..8a4fbd115814 100644 --- a/platform/broadcom/sonic-platform-modules-micas/debian/control +++ b/platform/broadcom/sonic-platform-modules-micas/debian/control @@ -7,3 +7,7 @@ Standards-Version: 3.9.3 Package: platform-modules-micas-m2-w6510-48v8c Architecture: amd64 Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-micas-m2-w6510-48gt4v +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48gt4v.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48gt4v.install new file mode 100644 index 000000000000..66df2662aa38 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48gt4v.install @@ -0,0 +1 @@ +m2-w6510-48gt4v/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6510-48gt4v-r0 diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48gt4v.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48gt4v.postinst new file mode 100644 index 000000000000..a8132f4f65a9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48gt4v.postinst @@ -0,0 +1,10 @@ +#!/bin/sh +# postinst + +kernel_version=$(uname -r) + +if [ -e /boot/System.map-${kernel_version} ]; then + depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true +fi + +#DEBHELPER# diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk index f27bca1d6579..b6b2cd492660 100644 --- a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk +++ b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk @@ -1,5 +1,6 @@ currentdir = $(shell pwd) MODULE_DIRS := m2-w6510-48v8c +MODULE_DIRS += m2-w6510-48gt4v export MODULE_DIRS diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/Makefile new file mode 100644 index 000000000000..a0c262841c51 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/Makefile @@ -0,0 +1,28 @@ +PWD = $(shell pwd) +DIR_KERNEL_SRC = $(PWD)/modules/driver +EXTRA_CFLAGS:= -I$(M)/include +EXTRA_CFLAGS+= -Wall +SUB_BUILD_DIR = $(PWD)/build +INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR) +INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin +INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages +INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg +INSTALL_SERVICE_DIR = $(SUB_BUILD_DIR)/lib/systemd/system + +all: + $(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules + @if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi + cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR) + @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi + cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR) + @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi + @if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi + @if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi + @if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi + @if [ ! -d ${INSTALL_SERVICE_DIR} ]; then mkdir -p ${INSTALL_SERVICE_DIR} ;fi + @if [ -d $(PWD)/service/ ]; then cp -r $(PWD)/service/* ${INSTALL_SERVICE_DIR} ;fi +clean: + rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd + rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order + rm -rf ${DIR_KERNEL_SRC}/.tmp_versions + rm -rf $(SUB_BUILD_DIR) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_config.py new file mode 100755 index 000000000000..5ff4e1013fcb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_config.py @@ -0,0 +1,754 @@ +#!/usr/bin/python +# +from platform_common import * + +STARTMODULE = { + "hal_fanctrl": 1, + "hal_ledctrl": 1, + "avscontrol": 0, + "dev_monitor": 1, + "reboot_cause": 1, + "pmon_syslog": 1, + "sff_temp_polling": 1, + "generate_airflow": 1, + "set_eth_mac": 1, + "drv_update": 0, +} + +MANUINFO_CONF = { + "bios": { + "key": "BIOS", + "head": True, + "next": "onie" + }, + "bios_vendor": { + "parent": "bios", + "key": "Vendor", + "cmd": "dmidecode -t 0 |grep Vendor", + "pattern": r".*Vendor", + "separator": ":", + "arrt_index": 1, + }, + "bios_version": { + "parent": "bios", + "key": "Version", + "cmd": "dmidecode -t 0 |grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "bios_date": { + "parent": "bios", + "key": "Release Date", + "cmd": "dmidecode -t 0 |grep Release", + "pattern": r".*Release Date", + "separator": ":", + "arrt_index": 3, + }, + "onie": { + "key": "ONIE", + "next": "cpu" + }, + "onie_date": { + "parent": "onie", + "key": "Build Date", + "file": "/host/machine.conf", + "pattern": r"^onie_build_date", + "separator": "=", + "arrt_index": 1, + }, + "onie_version": { + "parent": "onie", + "key": "Version", + "file": "/host/machine.conf", + "pattern": r"^onie_version", + "separator": "=", + "arrt_index": 2, + }, + + "cpu": { + "key": "CPU", + "next": "cpld" + }, + "cpu_vendor": { + "parent": "cpu", + "key": "Vendor", + "cmd": "dmidecode --type processor |grep Manufacturer", + "pattern": r".*Manufacturer", + "separator": ":", + "arrt_index": 1, + }, + "cpu_model": { + "parent": "cpu", + "key": "Device Model", + "cmd": "dmidecode --type processor | grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "cpu_core": { + "parent": "cpu", + "key": "Core Count", + "cmd": "dmidecode --type processor | grep \"Core Count\"", + "pattern": r".*Core Count", + "separator": ":", + "arrt_index": 3, + }, + "cpu_thread": { + "parent": "cpu", + "key": "Thread Count", + "cmd": "dmidecode --type processor | grep \"Thread Count\"", + "pattern": r".*Thread Count", + "separator": ":", + "arrt_index": 4, + }, + "cpld": { + "key": "CPLD", + "next": "psu" + }, + + "cpld1": { + "key": "CPLD1", + "parent": "cpld", + "arrt_index": 1, + }, + "cpld1_model": { + "key": "Device Model", + "parent": "cpld1", + "config": "LCMXO3LF-6900C-5BG256C", + "arrt_index": 1, + }, + "cpld1_vender": { + "key": "Vendor", + "parent": "cpld1", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld1_desc": { + "key": "Description", + "parent": "cpld1", + "config": "CPU_CPLD", + "arrt_index": 3, + }, + "cpld1_version": { + "key": "Firmware Version", + "parent": "cpld1", + "reg": { + "loc": "/dev/port", + "offset": 0x700, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld2": { + "key": "CPLD2", + "parent": "cpld", + "arrt_index": 2, + }, + "cpld2_model": { + "key": "Device Model", + "parent": "cpld2", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld2_vender": { + "key": "Vendor", + "parent": "cpld2", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld2_desc": { + "key": "Description", + "parent": "cpld2", + "config": "CTRL_CPLD", + "arrt_index": 3, + }, + "cpld2_version": { + "key": "Firmware Version", + "parent": "cpld2", + "reg": { + "loc": "/dev/port", + "offset": 0x900, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld3": { + "key": "CPLD3", + "parent": "cpld", + "arrt_index": 3, + }, + "cpld3_model": { + "key": "Device Model", + "parent": "cpld3", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld3_vender": { + "key": "Vendor", + "parent": "cpld3", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld3_desc": { + "key": "Description", + "parent": "cpld3", + "config": "PORT_CPLD", + "arrt_index": 3, + }, + "cpld3_version": { + "key": "Firmware Version", + "parent": "cpld3", + "reg": { + "loc": "/dev/port", + "offset": 0xb00, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "psu": { + "key": "PSU", + "next": "fan" + }, + + "psu1": { + "parent": "psu", + "key": "PSU1", + "arrt_index": 1, + }, + "psu1_hw_version": { + "key": "Hardware Version", + "parent": "psu1", + "extra": { + "funcname": "getCustPsu", + "id": "psu1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu1_fw_version": { + "key": "Firmware Version", + "parent": "psu1", + "config": "NA", + "arrt_index": 2, + }, + + "psu2": { + "parent": "psu", + "key": "PSU2", + "arrt_index": 2, + }, + "psu2_hw_version": { + "key": "Hardware Version", + "parent": "psu2", + "extra": { + "funcname": "getCustPsu", + "id": "psu2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu2_fw_version": { + "key": "Firmware Version", + "parent": "psu2", + "config": "NA", + "arrt_index": 2, + }, + + "fan": { + "key": "FAN", + }, + + "fan1": { + "key": "FAN1", + "parent": "fan", + "arrt_index": 1, + }, + "fan1_hw_version": { + "key": "Hardware Version", + "parent": "fan1", + "extra": { + "funcname": "checkFan", + "id": "fan1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan1_fw_version": { + "key": "Firmware Version", + "parent": "fan1", + "config": "NA", + "arrt_index": 2, + }, + + "fan2": { + "key": "FAN2", + "parent": "fan", + "arrt_index": 2, + }, + "fan2_hw_version": { + "key": "Hardware Version", + "parent": "fan2", + "extra": { + "funcname": "checkFan", + "id": "fan2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan2_fw_version": { + "key": "Firmware Version", + "parent": "fan2", + "config": "NA", + "arrt_index": 2, + }, +} + +PMON_SYSLOG_STATUS = { + "polling_time": 3, + "sffs": { + "present": {"path": ["/sys/wb_plat/sff/*/present"], "ABSENT": 0}, + "nochangedmsgflag": 0, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 1, + "alias": { + "sff49": "Ethernet49", + "sff50": "Ethernet50", + "sff51": "Ethernet51", + "sff52": "Ethernet52" + } + }, + "fans": { + "present": {"path": ["/sys/wb_plat/fan/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/wb_plat/fan/%s/motor0/status", 'okval': 1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "fan1": "FAN1", + "fan2": "FAN2" + } + }, + "psus": { + "present": {"path": ["/sys/wb_plat/psu/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/wb_plat/psu/%s/output", "okval": 1}, + {"path": "/sys/wb_plat/psu/%s/alert", "okval": 0}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "psu1": "PSU1", + "psu2": "PSU2" + } + } +} + +##################### MAC Voltage adjust#################################### +MAC_DEFAULT_PARAM = [ + { + "name": "mac_core", # AVS name + "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default": 0x01, # default value, if rov value not in range + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + "cpld_avs": {"io_addr": 0x956, "gettype": "io"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/17-0058/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x08: 0.875, + 0x04: 0.850, + 0x02: 0.825, + 0x01: 0.800 + } + } +] + + +DRIVERLISTS = [ + {"name": "wb_pinctrl_intel", "delay": 30}, + {"name": "wb_gpio_c3000", "delay": 0}, + {"name": "wb_gpio_c3000_device", "delay": 0}, + {"name": "i2c_ismt", "delay": 0}, + {"name": "i2c_i801", "delay": 0}, + {"name": "i2c_dev", "delay": 0}, + {"name": "i2c_algo_bit", "delay": 0}, + {"name": "i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0}, + {"name": "wb_i2c_gpio_device gpio_sda=31 gpio_scl=32 gpio_chip_name=wb_gpio_c3000", "delay": 0}, + {"name": "mdio_bitbang", "delay": 0}, + {"name": "mdio_gpio", "delay": 0}, + {"name": "wb_mdio_gpio_device gpio_mdc=33 gpio_mdio=34 gpio_chip_name=wb_gpio_c3000", "delay": 0}, + {"name": "platform_common dfd_my_type=0x40b2", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_lpc_drv", "delay": 0}, + {"name": "wb_lpc_drv_device", "delay": 0}, + {"name": "wb_io_dev", "delay": 0}, + {"name": "wb_io_dev_device", "delay": 0}, + {"name": "wb_i2c_dev", "delay": 0}, + {"name": "wb_i2c_mux_pca9641", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device", "delay": 0}, + {"name": "wb_i2c_dev_device", "delay": 0}, + {"name": "lm75", "delay": 0}, + {"name": "optoe", "delay": 0}, + {"name": "at24", "delay": 0}, + {"name": "wb_mac_bsc", "delay": 0}, + {"name": "pmbus_core", "delay": 0}, + {"name": "xdpe12284", "delay": 0}, + {"name": "ina3221", "delay": 0}, + {"name": "wb_wdt", "delay": 0}, + {"name": "wb_wdt_device", "delay": 0}, + {"name": "plat_dfd", "delay": 0}, + {"name": "plat_switch", "delay": 0}, + {"name": "plat_fan", "delay": 0}, + {"name": "plat_psu", "delay": 0}, + {"name": "plat_sff", "delay": 0}, + {"name": "hw_test", "delay": 0}, +] + +DEVICE = [ + {"name": "24c02", "bus": 2, "loc": 0x56}, + {"name": "wb_mac_bsc_td3_x2", "bus": 18, "loc": 0x44}, + # fan + {"name": "24c02", "bus": 8, "loc": 0x53}, + {"name": "24c02", "bus": 9, "loc": 0x53}, + + # psu + {"name": "24c02", "bus": 7, "loc": 0x56}, + {"name": "24c02", "bus": 7, "loc": 0x57}, + # temp + {"name": "tmp275", "bus": 6, "loc": 0x48}, + {"name": "tmp275", "bus": 6, "loc": 0x49}, + # dcdc + {"name": "xdpe12284", "bus": 0, "loc": 0x5e}, + {"name": "xdpe12284", "bus": 0, "loc": 0x68}, + {"name": "xdpe12284", "bus": 0, "loc": 0x6e}, + {"name": "xdpe12284", "bus": 17, "loc": 0x58}, + {"name": "ina3221", "bus": 3, "loc": 0x40}, + {"name": "ina3221", "bus": 3, "loc": 0x41}, + {"name": "ina3221", "bus": 3, "loc": 0x42}, + # port + {"name": "optoe2", "bus": 11, "loc": 0x50}, + {"name": "optoe2", "bus": 12, "loc": 0x50}, + {"name": "optoe2", "bus": 13, "loc": 0x50}, + {"name": "optoe2", "bus": 14, "loc": 0x50}, +] + +REBOOT_CTRL_PARAM = { + "cpu": {"io_addr": 0x910, "rst_val": 0x10, "rst_delay": 0, "gettype": "io"}, + "mac": {"io_addr": 0x930, "rst_val": 0xbf, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"}, + "phy": {"io_addr": 0x930, "rst_val": 0xf7, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"}, +} + +DEV_MONITOR_PARAM = { + "polling_time": 10, + "psus": [ + { + "name": "psu1", + "present": {"gettype": "io", "io_addr": 0xb10, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "psu1frue2", "name": "24c02", "bus": 7, "loc": 0x56, "attr": "eeprom"}, + ], + }, + { + "name": "psu2", + "present": {"gettype": "io", "io_addr": 0xb10, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "psu2frue2", "name": "24c02", "bus": 7, "loc": 0x57, "attr": "eeprom"}, + ], + }, + ], + "fans": [ + { + "name": "fan1", + "present": {"gettype": "io", "io_addr": 0x994, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan1frue2", "name": "24c02", "bus": 8, "loc": 0x53, "attr": "eeprom"}, + ], + }, + { + "name": "fan2", + "present": {"gettype": "io", "io_addr": 0x994, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan2frue2", "name": "24c02", "bus": 9, "loc": 0x53, "attr": "eeprom"}, + ], + }, + ], + "others": [ + { + "name": "eeprom", + "device": [ + {"id": "eeprom_1", "name": "24c02", "bus": 2, "loc": 0x56, "attr": "eeprom"}, + ], + }, + { + "name": "tmp275", + "device": [ + {"id": "tmp275_1", "name": "tmp275", "bus": 6, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_2", "name": "tmp275", "bus": 6, "loc": 0x49, "attr": "hwmon"}, + ], + }, + { + "name": "mac_bsc", + "device": [ + {"id": "mac_bsc_1", "name": "wb_mac_bsc_td3_x2", "bus": 18, "loc": 0x44, "attr": "hwmon"}, + ], + }, + { + "name": "ina3221", + "device": [ + {"id": "ina3221_1", "name": "ina3221", "bus": 3, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_2", "name": "ina3221", "bus": 3, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_3", "name": "ina3221", "bus": 3, "loc": 0x42, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe12284", + "device": [ + {"id": "xdpe12284_1", "name": "xdpe12284", "bus": 0, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "xdpe12284", "bus": 0, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "xdpe12284", "bus": 0, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "xdpe12284", "bus": 17, "loc": 0x58, "attr": "hwmon"}, + ], + }, + ], +} + +# INIT_PARAM_PRE = [ +# {"loc": "17-0058/hwmon/hwmon*/avs0_vout_max", "value": "875000"}, +# {"loc": "17-0058/hwmon/hwmon*/avs0_vout_min", "value": "800000"}, +# ] +INIT_COMMAND_PRE = [ + # close tx_disable + "dfd_debug io_wr 0xb0e 0x59", + "dfd_debug io_wr 0xb90 0x00", + "dfd_debug io_wr 0xb0e 0x4e", +] + +INIT_PARAM = [] + +INIT_COMMAND = [] + +REBOOT_CAUSE_PARA = { + "reboot_cause_list": [ + { + "name": "wdt_reboot", + "monitor_point": {"gettype": "io", "io_addr": 0x76b, "okval": 1}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Watchdog, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Watchdog, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size":1*1024*1024} + ], + "finish_operation": [ + {"gettype": "io", "io_addr": 0x76b, "value": 0x00}, + ] + }, + { + "name": "otp_switch_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"}, + ] + }, + { + "name": "otp_other_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"}, + ] + }, + ], + "other_reboot_cause_record": [ + {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], +} + + +WARM_UPGRADE_PARAM = { + "slot0": { + "VME": { + "chain1": [ + {"name": "CPU_CPLD", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/refresh_cpu_cpld_header.vme", + "init_cmd": [ + {"cmd": "echo 98 > /sys/class/gpio/export", "gettype": "cmd"}, + {"cmd": "echo high > /sys/class/gpio/gpio98/direction", "gettype": "cmd"}, + {"io_addr": 0x7a5, "value": 0, "gettype": "io"}, + ], + "rw_recover_reg": [ + {"io_addr": 0x721, "value": None, "gettype": "io"}, + {"io_addr": 0x765, "value": None, "gettype": "io"}, + {"io_addr": 0x766, "value": None, "gettype": "io"}, + {"io_addr": 0x768, "value": None, "gettype": "io"}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "refresh_finish_flag_check": {"io_addr":0x7a5, "value":0x01, "gettype":"io"}, + "access_check_reg": {"io_addr": 0x705, "value": 0x5a, "gettype": "io"}, + "finish_cmd": [ + {"cmd": "echo 0 > /sys/class/gpio/gpio98/value", "gettype": "cmd"}, + {"cmd": "echo 98 > /sys/class/gpio/unexport", "gettype": "cmd"}, + ], + }, + ], + }, + }, + "stop_services_cmd": [ + "/usr/local/bin/platform_process.py stop", + ], + "start_services_cmd": [ + "/usr/local/bin/platform_process.py start", + ], +} + +UPGRADE_SUMMARY = { + "devtype": 0x40b2, + + "slot0": { + "subtype": 0, + "VME": { + "chain1": { + "name": "CPU_CPLD", + "is_support_warm_upg": 1, + }, + "chain2": { + "name": "CTRL_CPLD", + "is_support_warm_upg": 0, + }, + "chain3": { + "name": "PORT_CPLD", + "is_support_warm_upg": 0, + }, + }, + + "MTD": { + "chain1": { + "name": "BIOS", + "is_support_warm_upg": 0, + "filesizecheck": 10240, # bios check file size, Unit: K + "init_cmd": [ + {"io_addr": 0x722, "value": 0x02, "gettype": "io"}, + {"cmd": "modprobe mtd", "gettype": "cmd"}, + {"cmd": "modprobe spi_nor", "gettype": "cmd"}, + {"cmd": "modprobe ofpart", "gettype": "cmd"}, + {"cmd": "modprobe intel_spi writeable=1", "gettype": "cmd"}, + {"cmd": "modprobe intel_spi_pci", "gettype": "cmd"}, + ], + "finish_cmd": [ + {"cmd": "rmmod intel_spi_pci", "gettype": "cmd"}, + {"cmd": "rmmod intel_spi", "gettype": "cmd"}, + {"cmd": "rmmod ofpart", "gettype": "cmd"}, + {"cmd": "rmmod spi_nor", "gettype": "cmd"}, + {"cmd": "rmmod mtd", "gettype": "cmd"}, + ], + }, + }, + + "TEST": { + "cpld": [ + {"chain": 1, "file": "/etc/.upgrade_test/cpu_cpld_test_header.vme", "display_name": "CPU_CPLD"}, + {"chain": 2, "file": "/etc/.upgrade_test/ctrl_cpld_test_header.vme", "display_name": "CTRL_CPLD"}, + {"chain": 3, "file": "/etc/.upgrade_test/port_cpld_test_header.vme", "display_name": "PORT_CPLD"}, + ], + }, + }, +} + + +PLATFORM_E2_CONF = { + "fan": [ + {"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/8-0053/eeprom"}, + {"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/9-0053/eeprom"}, + ], + "psu": [ + {"name": "psu1", "e2_type": "custfru", "e2_path": "/sys/bus/i2c/devices/7-0056/eeprom"}, + {"name": "psu2", "e2_type": "custfru", "e2_path": "/sys/bus/i2c/devices/7-0057/eeprom"}, + ], + "syseeprom": [ + {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/2-0056/eeprom"}, + ], +} + +AIR_FLOW_CONF = { + "psu_fan_airflow": { + "intake": ['PA150II-F', 'PD150II-F'], + "exhaust": ['PA150II-R', 'PD150II-R'] + }, + + "fanairflow": { + "intake": ['M1LFAN I-F'], + "exhaust": ['M1LFAN I-R'] + }, + + "fans": [ + { + "name": "FAN1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/8-0053/eeprom", + "area": "productInfoArea", "field": "productName", "decode": "fanairflow" + }, + { + "name": "FAN2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/9-0053/eeprom", + "area": "productInfoArea", "field": "productName", "decode": "fanairflow" + }, + ], + + "psus": [ + { + "name": "PSU1", "e2_type": "custfru", "e2_path": "/sys/bus/i2c/devices/7-0056/eeprom", + "field": "product_name", "decode": "psu_fan_airflow" + }, + { + "name": "PSU2", "e2_type": "custfru", "e2_path": "/sys/bus/i2c/devices/7-0057/eeprom", + "field": "product_name", "decode": "psu_fan_airflow" + } + ] +} + +SET_MAC_CONF = [ + { + "eth_name": "eth0", + "e2_name": "syseeprom", + "e2_type": "onie_tlv", + "e2_path": "/sys/bus/i2c/devices/2-0056/eeprom", + "mac_location": {"field": "Base MAC Address"}, + "ifcfg": { + "ifcfg_file_path": "/etc/network/interfaces.d/ifcfg-eth0-mac", "file_mode": "add", + } + } +] + +DRVIER_UPDATE_CONF = { + "reboot_flag": 1, + "drv_list": [ + { + "source": "extra/sdhci_pci.ko", + "target": "kernel/drivers/mmc/host/sdhci-pci.ko", + "judge_flag": "/sys/module/sdhci_pci/parameters/wb_sdhci_pci" + }, + ] +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_port_config.py new file mode 100755 index 000000000000..2e30ca213fc2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_port_config.py @@ -0,0 +1,12 @@ +#!/usr/bin/python3 +# + +PLATFORM_INTF_OPTOE = { + "port_num": 52, + "port_bus_map": { + 49: 12, + 50: 11, + 51: 14, + 52: 13 + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_device.py new file mode 100644 index 000000000000..0c5568884936 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_device.py @@ -0,0 +1,607 @@ +#!/usr/bin/python3 + + +psu_fan_airflow = { + "intake": ['PA150II-F', 'PD150II-F'], + "exhaust": ['PA150II-R', 'PD150II-R'] +} + +fanairflow = { + "intake": ['M1LFAN I-F'], + "exhaust": ['M1LFAN I-R'] +} + +psu_display_name = { + "PA150II-F": ['PA150II-F'], + "PA150II-R": ['PA150II-R'], + "PD150II-F": ['PD150II-F'], + "PD150II-R": ['PD150II-R'] +} + +psutypedecode = { + "AC": ["PA150II-F", "PA150II-R"], + "DC": ["PD150II-F", "PD150II-R"], +} + + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + + +class threshold: + FAN_SPEED_MAX = 19800 + FAN_SPEED_MIN = 4860 + + +class Description: + CPLD = "Used for managing IO modules, SFP+ modules and system LEDs" + BIOS = "Performs initialization of hardware components during booting" + FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power" + + +devices = { + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/2-0056/eeprom", "way": "sysfs"}, + "airflow": "intake" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/7-0056/eeprom", "way": "sysfs"}, + "e2_type": "custfru", + "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "psu_fan_tolerance": 40, + "InputsType": {"gettype": "fru", 'psutypedecode': psutypedecode}, + "OutputsStatus": {"loc": "/sys/wb_plat/psu/psu1/output", "way": "sysfs", "mask": 0x01, "okval": 1}, + "Temperature": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Temperature + }, + "FanSpeed": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Speed + }, + "InputsVoltage": { + 'AC': { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Voltage + + }, + 'DC': { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Voltage + }, + 'other': { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Voltage + } + }, + "InputsCurrent": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Current + }, + "InputsPower": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Power + }, + "OutputsVoltage": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Voltage + }, + "OutputsCurrent": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Current + }, + "OutputsPower": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Power + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/7-0057/eeprom", "way": "sysfs"}, + "e2_type": "custfru", + "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "psu_fan_tolerance": 40, + "InputsType": {"gettype": "fru", 'psutypedecode': psutypedecode}, + "OutputsStatus": {"loc": "/sys/wb_plat/psu/psu2/output", "way": "sysfs", "mask": 0x01, "okval": 1}, + "Temperature": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Temperature + }, + "FanSpeed": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Speed + }, + "InputsVoltage": { + 'AC': { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Voltage + + }, + 'DC': { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Voltage + }, + 'other': { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Voltage + } + }, + "InputsCurrent": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Current + }, + "InputsPower": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Power + }, + "OutputsVoltage": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Voltage + }, + "OutputsCurrent": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Current + }, + "OutputsPower": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Power + }, + } + ], + "temps": [ + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP1", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/18-0044/hwmon/hwmon*/temp99_input", "way": "sysfs"}, + "Min": 2000, + "Low": 10000, + "High": 105000, + "Max": 110000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "CPU_TEMP", + "temp_id": "TEMP2", + "Temperature": { + "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": 2000, + "Low": 10000, + "High": 85000, + "Max": 91000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP3", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/6-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "Min": -10000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "fix_value": { + "fix_type": "config", + "addend": -7, + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP4", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/6-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SFF_TEMP", + "Temperature": { + "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"}, + "Min": -30000, + "Low": 0, + "High": 90000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -10000, + "error": -9999, + } + ], + "leds": [ + { + "name": "FRONT_SYS_LED", + "led_type": "SYS_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x50, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x10, "red_flash": 0x11, "red": 0x12, + "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15, + "amber": 0x16, "mask": 0x17 + }, + }, + { + "name": "FRONT_PSU_LED", + "led_type": "PSU_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x51, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x10, "red_flash": 0x11, "red": 0x12, + "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15, + "amber": 0x16, "mask": 0x17 + }, + }, + { + "name": "FRONT_FAN_LED", + "led_type": "FAN_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x52, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x10, "red_flash": 0x11, "red": 0x12, + "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15, + "amber": 0x16, "mask": 0x17 + }, + }, + ], + "fans": [ + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/8-0053/eeprom', 'way': 'sysfs'}, + "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld1", "offset": 0x92, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "red_flash": 0x01, "red": 0x02, + "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05, + "amber": 0x06, "mask": 0x07 + }, + "PowerMax": 6.6, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld1", "offset": 0x90, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/9-0053/eeprom', 'way': 'sysfs'}, + "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld1", "offset": 0x93, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "red_flash": 0x01, "red": 0x02, + "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05, + "amber": 0x06, "mask": 0x07 + }, + "PowerMax": 6.6, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld1", "offset": 0x91, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + + + ], + "cplds": [ + { + "name": "CPU_CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 0, + }, + { + "name": "CTRL_CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "PORT_CPLD", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 0, + }, + { + "name": "BIOS", + "cpld_id": "CPLD4", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + } + ], + "dcdc": [ + { + "name": "VDD_CORE_0.8V", + "dcdc_id": "DCDC1", + "Min": 784, + "value": { + "loc": "/sys/bus/i2c/devices/17-0058/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 893, + "format": "float(float(%s)/1000)", + }, + { + "name": "PVCCP", + "dcdc_id": "DCDC2", + "Min": 468, + "value": { + "loc": "/sys/bus/i2c/devices/0-0068/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1364, + "format": "float(float(%s)/1000)", + }, + { + "name": "PVNN", + "dcdc_id": "DCDC3", + "Min": 585, + "value": { + "loc": "/sys/bus/i2c/devices/0-0068/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1364, + "format": "float(float(%s)/1000)", + }, + { + "name": "P1V05", + "dcdc_id": "DCDC4", + "Min": 945, + "value": { + "loc": "/sys/bus/i2c/devices/0-006e/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1155, + "format": "float(float(%s)/1000)", + }, + { + "name": "VCCRAM", + "dcdc_id": "DCDC5", + "Min": 675, + "value": { + "loc": "/sys/bus/i2c/devices/0-006e/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + { + "name": "P1V2_VDDQ", + "dcdc_id": "DCDC6", + "Min": 1080, + "value": { + "loc": "/sys/bus/i2c/devices/0-005e/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + { + "name": "CPU_VDD1.8V", + "dcdc_id": "DCDC7", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1980, + "format": "float(float(%s)/1000)", + }, + { + "name": "P3V3_STBY", + "dcdc_id": "DCDC8", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + { + "name": "P5V_AUX", + "dcdc_id": "DCDC9", + "Min": 4500, + "value": { + "loc": "/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 5500, + "format": "float(float(%s)/1000)", + }, + { + "name": "VDD1.2V", + "dcdc_id": "DCDC10", + "Min": 1140, + "value": { + "loc": "/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1260, + "format": "float(float(%s)/1000)", + }, + { + "name": "VDD1.8V", + "dcdc_id": "DCDC11", + "Min": 1710, + "value": { + "loc": "/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1890, + "format": "float(float(%s)/1000)", + }, + { + "name": "VDD3.3V", + "dcdc_id": "DCDC12", + "Min": 3200, + "value": { + "loc": "/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3600, + "format": "float(float(%s)/1000)", + }, + { + "name": "VDD1.0V", + "dcdc_id": "DCDC13", + "Min": 969, + "value": { + "loc": "/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1071, + "format": "float(float(%s)/1000)", + }, + { + "name": "VDD3.3V_SFP", + "dcdc_id": "DCDC14", + "Min": 3200, + "value": { + "loc": "/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3600, + "format": "float(float(%s)/1000)", + }, + { + "name": "VAN_0.8V", + "dcdc_id": "DCDC15", + "Min": 784, + "value": { + "loc": "/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 893, + "format": "float(float(%s)/1000)", + }, + ], + "cpu": [ + { + "name": "cpu", + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '1.0', + "port_index_start": 0, + "port_num": 52, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_cpld": { + "dev_id": { + 5: { + "offset": { + 0x30: "50,49,52,51", + }, + }, + }, + }, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": [11]*48 + list(range(11, 15)), + "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class", + "optoe_driver_key": list(range(11, 15)), + "txdis_cpld": { + "dev_id": { + 5: { + "offset": { + 0x90: "50,49,52,51", + }, + }, + }, + }, + "txdisable_val_is_on": 1, + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_exhaust_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_exhaust_device.py new file mode 100644 index 000000000000..4ed0f5ab2399 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_exhaust_device.py @@ -0,0 +1,607 @@ +#!/usr/bin/python3 + + +psu_fan_airflow = { + "intake": ['PA150II-F', 'PD150II-F'], + "exhaust": ['PA150II-R', 'PD150II-R'] +} + +fanairflow = { + "intake": ['M1LFAN I-F'], + "exhaust": ['M1LFAN I-R'] +} + +psu_display_name = { + "PA150II-F": ['PA150II-F'], + "PA150II-R": ['PA150II-R'], + "PD150II-F": ['PD150II-F'], + "PD150II-R": ['PD150II-R'] +} + +psutypedecode = { + "AC": ["PA150II-F", "PA150II-R"], + "DC": ["PD150II-F", "PD150II-R"], +} + + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + + +class threshold: + FAN_SPEED_MAX = 19800 + FAN_SPEED_MIN = 4860 + + +class Description: + CPLD = "Used for managing IO modules, SFP+ modules and system LEDs" + BIOS = "Performs initialization of hardware components during booting" + FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power" + + +devices = { + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/2-0056/eeprom", "way": "sysfs"}, + "airflow": "exhaust" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/7-0056/eeprom", "way": "sysfs"}, + "e2_type": "custfru", + "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "psu_fan_tolerance": 40, + "InputsType": {"gettype": "fru", 'psutypedecode': psutypedecode}, + "OutputsStatus": {"loc": "/sys/wb_plat/psu/psu1/output", "way": "sysfs", "mask": 0x01, "okval": 1}, + "Temperature": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Temperature + }, + "FanSpeed": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Speed + }, + "InputsVoltage": { + 'AC': { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Voltage + + }, + 'DC': { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Voltage + }, + 'other': { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Voltage + } + }, + "InputsCurrent": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Current + }, + "InputsPower": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Power + }, + "OutputsVoltage": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Voltage + }, + "OutputsCurrent": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Current + }, + "OutputsPower": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Power + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/7-0057/eeprom", "way": "sysfs"}, + "e2_type": "custfru", + "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "psu_fan_tolerance": 40, + "InputsType": {"gettype": "fru", 'psutypedecode': psutypedecode}, + "OutputsStatus": {"loc": "/sys/wb_plat/psu/psu2/output", "way": "sysfs", "mask": 0x01, "okval": 1}, + "Temperature": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Temperature + }, + "FanSpeed": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Speed + }, + "InputsVoltage": { + 'AC': { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Voltage + + }, + 'DC': { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Voltage + }, + 'other': { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Voltage + } + }, + "InputsCurrent": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Current + }, + "InputsPower": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Power + }, + "OutputsVoltage": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Voltage + }, + "OutputsCurrent": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Current + }, + "OutputsPower": { + "value": {"value": None, "way": "config"}, + "Unit": Unit.Power + }, + } + ], + "temps": [ + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP1", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/18-0044/hwmon/hwmon*/temp99_input", "way": "sysfs"}, + "Min": 2000, + "Low": 10000, + "High": 105000, + "Max": 110000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "CPU_TEMP", + "temp_id": "TEMP2", + "Temperature": { + "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": 2000, + "Low": 10000, + "High": 85000, + "Max": 91000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP3", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/6-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "Min": -10000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "fix_value": { + "fix_type": "config", + "addend": -7, + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP4", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/6-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SFF_TEMP", + "Temperature": { + "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"}, + "Min": -30000, + "Low": 0, + "High": 90000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -10000, + "error": -9999, + } + ], + "leds": [ + { + "name": "FRONT_SYS_LED", + "led_type": "SYS_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x50, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x10, "red_flash": 0x11, "red": 0x12, + "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15, + "amber": 0x16, "mask": 0x17 + }, + }, + { + "name": "FRONT_PSU_LED", + "led_type": "PSU_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x51, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x10, "red_flash": 0x11, "red": 0x12, + "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15, + "amber": 0x16, "mask": 0x17 + }, + }, + { + "name": "FRONT_FAN_LED", + "led_type": "FAN_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x52, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x10, "red_flash": 0x11, "red": 0x12, + "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15, + "amber": 0x16, "mask": 0x17 + }, + }, + ], + "fans": [ + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/8-0053/eeprom', 'way': 'sysfs'}, + "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld1", "offset": 0x92, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "red_flash": 0x01, "red": 0x02, + "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05, + "amber": 0x06, "mask": 0x07 + }, + "PowerMax": 6.6, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld1", "offset": 0x90, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/9-0053/eeprom', 'way': 'sysfs'}, + "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld1", "offset": 0x93, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "red_flash": 0x01, "red": 0x02, + "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05, + "amber": 0x06, "mask": 0x07 + }, + "PowerMax": 6.6, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld1", "offset": 0x91, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + + + ], + "cplds": [ + { + "name": "CPU_CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 0, + }, + { + "name": "CTRL_CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "PORT_CPLD", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 0, + }, + { + "name": "BIOS", + "cpld_id": "CPLD4", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + } + ], + "dcdc": [ + { + "name": "VDD_CORE_0.8V", + "dcdc_id": "DCDC1", + "Min": 784, + "value": { + "loc": "/sys/bus/i2c/devices/17-0058/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 893, + "format": "float(float(%s)/1000)", + }, + { + "name": "PVCCP", + "dcdc_id": "DCDC2", + "Min": 468, + "value": { + "loc": "/sys/bus/i2c/devices/0-0068/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1364, + "format": "float(float(%s)/1000)", + }, + { + "name": "PVNN", + "dcdc_id": "DCDC3", + "Min": 585, + "value": { + "loc": "/sys/bus/i2c/devices/0-0068/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1364, + "format": "float(float(%s)/1000)", + }, + { + "name": "P1V05", + "dcdc_id": "DCDC4", + "Min": 945, + "value": { + "loc": "/sys/bus/i2c/devices/0-006e/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1155, + "format": "float(float(%s)/1000)", + }, + { + "name": "VCCRAM", + "dcdc_id": "DCDC5", + "Min": 675, + "value": { + "loc": "/sys/bus/i2c/devices/0-006e/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + { + "name": "P1V2_VDDQ", + "dcdc_id": "DCDC6", + "Min": 1080, + "value": { + "loc": "/sys/bus/i2c/devices/0-005e/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + { + "name": "CPU_VDD1.8V", + "dcdc_id": "DCDC7", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1980, + "format": "float(float(%s)/1000)", + }, + { + "name": "P3V3_STBY", + "dcdc_id": "DCDC8", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + { + "name": "P5V_AUX", + "dcdc_id": "DCDC9", + "Min": 4500, + "value": { + "loc": "/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 5500, + "format": "float(float(%s)/1000)", + }, + { + "name": "VDD1.2V", + "dcdc_id": "DCDC10", + "Min": 1140, + "value": { + "loc": "/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1260, + "format": "float(float(%s)/1000)", + }, + { + "name": "VDD1.8V", + "dcdc_id": "DCDC11", + "Min": 1710, + "value": { + "loc": "/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1890, + "format": "float(float(%s)/1000)", + }, + { + "name": "VDD3.3V", + "dcdc_id": "DCDC12", + "Min": 3200, + "value": { + "loc": "/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3600, + "format": "float(float(%s)/1000)", + }, + { + "name": "VDD1.0V", + "dcdc_id": "DCDC13", + "Min": 969, + "value": { + "loc": "/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1071, + "format": "float(float(%s)/1000)", + }, + { + "name": "VDD3.3V_SFP", + "dcdc_id": "DCDC14", + "Min": 3200, + "value": { + "loc": "/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3600, + "format": "float(float(%s)/1000)", + }, + { + "name": "VAN_0.8V", + "dcdc_id": "DCDC15", + "Min": 784, + "value": { + "loc": "/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 893, + "format": "float(float(%s)/1000)", + }, + ], + "cpu": [ + { + "name": "cpu", + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '1.0', + "port_index_start": 0, + "port_num": 52, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_cpld": { + "dev_id": { + 5: { + "offset": { + 0x30: "50,49,52,51", + }, + }, + }, + }, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": [11]*48 + list(range(11, 15)), + "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class", + "optoe_driver_key": list(range(11, 15)), + "txdis_cpld": { + "dev_id": { + 5: { + "offset": { + 0x90: "50,49,52,51", + }, + }, + }, + }, + "txdisable_val_is_on": 1, + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_exhaust_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_exhaust_monitor.py new file mode 100755 index 000000000000..8642d8c19368 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_exhaust_monitor.py @@ -0,0 +1,141 @@ +# coding:utf-8 + + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": 0x55, + "pwm_max": 0xff, + "K": 11, + "tin_min": 38, + }, + "curve": { + "name": "curve", + "flag": 1, + "pwm_min": 0x55, + "pwm_max": 0xff, + "a": -0.05, + "b": 11.32, + "c": -166, + "tin_min": 25, + }, + }, + + "pid": { + "CPU_TEMP": { + "name": "CPU_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x55, + "pwm_max": 0xff, + "Kp": 1, + "Ki": 0.4, + "Kd": 0, + "target": 80, + "value": [None, None, None], + }, + "SWITCH_TEMP": { + "name": "SWITCH_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x55, + "pwm_max": 0xff, + "Kp": 1, + "Ki": 0.4, + "Kd": 0.3, + "target": 90, + "value": [None, None, None], + }, + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x55, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 60, + "value": [None, None, None], + }, + "SFF_TEMP": { + "name": "SFF_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x55, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.4, + "Kd": 0, + "target": 65, + "value": [None, None, None], + }, + }, + + "temps_threshold": { + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 105, "critical": 110}, + "INLET_TEMP": {"name": "INLET_TEMP", "warning": 55, "critical": 60}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 85, "critical": 91}, + "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999}, + }, + + "fancontrol_para": { + "interval": 5, + "fan_air_flow_monitor": 1, + "psu_air_flow_monitor": 1, + "max_pwm": 0xff, + "min_pwm": 0x55, + "abnormal_pwm": 0xff, + "warning_pwm": 0xff, + "temp_invalid_pid_pwm": 0x55, + "temp_error_pid_pwm": 0x55, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "INLET_TEMP"}, + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 6, # fan rotor error 6 times continuously + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 20, + "psu_absent_fullspeed_num": 1, + "fan_absent_fullspeed_num": 1, + "rotor_error_fullspeed_num": 1, + "psu_fan_control": 0, + }, + + "ledcontrol_para": { + "interval": 5, + "checkpsu": 0, # 0: sys led don't follow psu led + "checkfan": 0, # 0: sys led don't follow fan led + "psu_amber_num": 1, + "fan_amber_num": 1, + "board_sys_led": [ + {"led_name": "FRONT_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "FRONT_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "FRONT_FAN_LED"}, + ], + "psu_air_flow_monitor": 1, + "fan_air_flow_monitor": 1, + "psu_air_flow_amber_num": 1, + "fan_air_flow_amber_num": 1, + }, + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_monitor.py new file mode 100755 index 000000000000..12704226a269 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_monitor.py @@ -0,0 +1,141 @@ +# coding:utf-8 + + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": 0x55, + "pwm_max": 0xff, + "K": 11, + "tin_min": 38, + }, + "curve": { + "name": "curve", + "flag": 1, + "pwm_min": 0x55, + "pwm_max": 0xff, + "a": -0.05, + "b": 11.32, + "c": -166, + "tin_min": 25, + }, + }, + + "pid": { + "CPU_TEMP": { + "name": "CPU_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x55, + "pwm_max": 0xff, + "Kp": 1, + "Ki": 0.4, + "Kd": 0, + "target": 80, + "value": [None, None, None], + }, + "SWITCH_TEMP": { + "name": "SWITCH_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x55, + "pwm_max": 0xff, + "Kp": 1, + "Ki": 0.4, + "Kd": 0.3, + "target": 90, + "value": [None, None, None], + }, + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x55, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 60, + "value": [None, None, None], + }, + "SFF_TEMP": { + "name": "SFF_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x55, + "pwm_max": 0xff, + "Kp": 1, + "Ki": 1, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + }, + + "temps_threshold": { + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 105, "critical": 110}, + "INLET_TEMP": {"name": "INLET_TEMP", "warning": 55, "critical": 60}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 85, "critical": 91}, + "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999}, + }, + + "fancontrol_para": { + "interval": 5, + "fan_air_flow_monitor": 1, + "psu_air_flow_monitor": 1, + "max_pwm": 0xff, + "min_pwm": 0x55, + "abnormal_pwm": 0xff, + "warning_pwm": 0xff, + "temp_invalid_pid_pwm": 0x55, + "temp_error_pid_pwm": 0x55, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "INLET_TEMP"}, + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 6, # fan rotor error 6 times continuously + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 20, + "psu_absent_fullspeed_num": 1, + "fan_absent_fullspeed_num": 1, + "rotor_error_fullspeed_num": 1, + "psu_fan_control": 0, + }, + + "ledcontrol_para": { + "interval": 5, + "checkpsu": 0, # 0: sys led don't follow psu led + "checkfan": 0, # 0: sys led don't follow fan led + "psu_amber_num": 1, + "fan_amber_num": 1, + "board_sys_led": [ + {"led_name": "FRONT_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "FRONT_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "FRONT_FAN_LED"}, + ], + "psu_air_flow_monitor": 1, + "fan_air_flow_monitor": 1, + "psu_air_flow_amber_num": 1, + "fan_air_flow_amber_num": 1, + }, + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/Makefile new file mode 100755 index 000000000000..beabc653c10d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/Makefile @@ -0,0 +1,10 @@ +MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST))) +MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules) + +EXTRA_CFLAGS+= -I$(MODULES_DIR) + +obj-m += wb_i2c_mux_pca954x_device.o +obj-m += wb_lpc_drv_device.o +obj-m += wb_i2c_dev_device.o +obj-m += wb_io_dev_device.o +obj-m += wb_wdt_device.o diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_dev_device.c new file mode 100644 index 000000000000..6e187eae9797 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_dev_device.c @@ -0,0 +1,145 @@ +/* + * An wb_i2c_dev_device driver for i2c device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_dev_device_debug = 0; +static int g_wb_i2c_dev_device_error = 0; + +module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_dev_device_debug) { \ + printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_dev_device_error) { \ + printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_dev_device_t i2c_dev_device_data0 = { + .i2c_bus = 0, + .i2c_addr = 0x0d, + .i2c_name = "cpld3", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data1 = { + .i2c_bus = 15, + .i2c_addr = 0x51, + .i2c_name = "cpld4", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data2 = { + .i2c_bus = 16, + .i2c_addr = 0x52, + .i2c_name = "cpld5", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +struct i2c_board_info i2c_dev_device_info[] = { + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data0, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data1, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data2, + }, +}; + +static int __init wb_i2c_dev_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_dev_device_t *i2c_dev_device_data; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus); + if (adap == NULL) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); + if (!client) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", + i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); + } else { + i2c_dev_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_dev_device_exit(void) +{ + int i; + i2c_dev_device_t *i2c_dev_device_data; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + if (i2c_dev_device_data->client) { + i2c_unregister_device(i2c_dev_device_data->client); + i2c_dev_device_data->client = NULL; + } + } +} + +module_init(wb_i2c_dev_device_init); +module_exit(wb_i2c_dev_device_exit); +MODULE_DESCRIPTION("I2C DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_mux_pca954x_device.c new file mode 100644 index 000000000000..387ad5b223bf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_mux_pca954x_device.c @@ -0,0 +1,146 @@ +/* + * An wb_i2c_mux_pca954x_device driver for pca954x i2c load device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_mux_pca954x_device_debug = 0; +static int g_wb_i2c_mux_pca954x_device_error = 0; + +module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_debug) { \ + printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_error) { \ + printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = { + .i2c_bus = 0, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 1, + .pca9548_base_nr = 3, + .pca9548_reset_type = PCA9548_RESET_IO, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .io_attr.io_addr = 0x93b, + .io_attr.mask = 0x01, + .io_attr.reset_on = 0, + .io_attr.reset_off = 0x01, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data1 = { + .i2c_bus = 2, + .i2c_addr = 0x74, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 1, + .pca9548_base_nr = 11, + .pca9548_reset_type = PCA9548_RESET_IO, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .io_attr.io_addr = 0x935, + .io_attr.mask = 0x40, + .io_attr.reset_on = 0, + .io_attr.reset_off = 0x40, + }, +}; + +struct i2c_board_info i2c_mux_pca954x_device_info[] = { + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data0, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data1, + }, +}; + +static int __init wb_i2c_mux_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus); + if (adap == NULL) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); + if (!client) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", + i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); + } else { + i2c_mux_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_mux_pca954x_device_exit(void) +{ + int i; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + if (i2c_mux_pca954x_device_data->client) { + i2c_unregister_device(i2c_mux_pca954x_device_data->client); + i2c_mux_pca954x_device_data->client = NULL; + } + } +} + +module_init(wb_i2c_mux_pca954x_device_init); +module_exit(wb_i2c_mux_pca954x_device_exit); +MODULE_DESCRIPTION("I2C MUX PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_io_dev_device.c new file mode 100644 index 000000000000..62cc4c459080 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_io_dev_device.c @@ -0,0 +1,138 @@ +/* + * An wb_i2c_dev_device driver for i2c io device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_io_dev_device_debug = 0; +static int g_wb_io_dev_device_error = 0; + +module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_io_dev_device_debug) { \ + printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_io_dev_device_error) { \ + printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static io_dev_device_t io_dev_device_data0 = { + .io_dev_name = "cpld0", + .io_base = 0x700, + .io_len = 0x100, + .indirect_addr = 0, +}; + +static io_dev_device_t io_dev_device_data1 = { + .io_dev_name = "cpld1", + .io_base = 0x900, + .io_len = 0x100, + .indirect_addr = 0, +}; + +static io_dev_device_t io_dev_device_data2 = { + .io_dev_name = "cpld2", + .io_base = 0xb00, + .io_len = 0x100, + .indirect_addr = 0, +}; + +static void wb_io_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device io_dev_device[] = { + { + .name = "wb-io-dev", + .id = 1, + .dev = { + .platform_data = &io_dev_device_data0, + .release = wb_io_dev_device_release, + }, + }, + { + .name = "wb-io-dev", + .id = 2, + .dev = { + .platform_data = &io_dev_device_data1, + .release = wb_io_dev_device_release, + }, + }, + { + .name = "wb-io-dev", + .id = 3, + .dev = { + .platform_data = &io_dev_device_data2, + .release = wb_io_dev_device_release, + }, + }, +}; + +static int __init wb_io_dev_device_init(void) +{ + int i; + int ret = 0; + io_dev_device_t *io_dev_device_data; + + WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) { + io_dev_device_data = io_dev_device[i].dev.platform_data; + ret = platform_device_register(&io_dev_device[i]); + if (ret < 0) { + io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1); + } else { + io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_io_dev_device_exit(void) +{ + int i; + io_dev_device_t *io_dev_device_data; + + WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) { + io_dev_device_data = io_dev_device[i].dev.platform_data; + if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&io_dev_device[i]); + } + } +} + +module_init(wb_io_dev_device_init); +module_exit(wb_io_dev_device_exit); +MODULE_DESCRIPTION("IO DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_lpc_drv_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_lpc_drv_device.c new file mode 100644 index 000000000000..363d670d5a99 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_lpc_drv_device.c @@ -0,0 +1,150 @@ +/* + * An wb_i2c_ocores_device driver for i2c ocore device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_lpc_drv_device_debug = 0; +static int g_wb_lpc_drv_device_error = 0; + +module_param(g_wb_lpc_drv_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_lpc_drv_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_LPC_DRV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_lpc_drv_device_debug) { \ + printk(KERN_INFO "[WB_LPC_DRV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_LPC_DRV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_lpc_drv_device_error) { \ + printk(KERN_ERR "[WB_LPC_DRV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static lpc_drv_device_t lpc_drv_device_data_0 = { + .lpc_io_name = "wb_lpc", + .pci_domain = 0x0000, + .pci_bus = 0x00, + .pci_slot = 0x1f, + .pci_fn = 0, + .lpc_io_base = 0x700, + .lpc_io_size = 0x100, + .lpc_gen_dec = 0x84, +}; + +static lpc_drv_device_t lpc_drv_device_data_1 = { + .lpc_io_name = "wb_lpc", + .pci_domain = 0x0000, + .pci_bus = 0x00, + .pci_slot = 0x1f, + .pci_fn = 0, + .lpc_io_base = 0x900, + .lpc_io_size = 0x100, + .lpc_gen_dec = 0x88, +}; + +static lpc_drv_device_t lpc_drv_device_data_2 = { + .lpc_io_name = "wb_lpc", + .pci_domain = 0x0000, + .pci_bus = 0x00, + .pci_slot = 0x1f, + .pci_fn = 0, + .lpc_io_base = 0xb00, + .lpc_io_size = 0x100, + .lpc_gen_dec = 0x90, +}; + +static void wb_lpc_drv_device_release(struct device *dev) +{ + return; +} + +static struct platform_device lpc_drv_device[] = { + { + .name = "wb-lpc", + .id = 1, + .dev = { + .platform_data = &lpc_drv_device_data_0, + .release = wb_lpc_drv_device_release, + }, + }, + { + .name = "wb-lpc", + .id = 2, + .dev = { + .platform_data = &lpc_drv_device_data_1, + .release = wb_lpc_drv_device_release, + }, + }, + { + .name = "wb-lpc", + .id = 3, + .dev = { + .platform_data = &lpc_drv_device_data_2, + .release = wb_lpc_drv_device_release, + }, + }, +}; + +static int __init wb_lpc_drv_device_init(void) +{ + int i; + int ret = 0; + lpc_drv_device_t *lpc_drv_device_data; + + WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(lpc_drv_device); i++) { + lpc_drv_device_data = lpc_drv_device[i].dev.platform_data; + ret = platform_device_register(&lpc_drv_device[i]); + if (ret < 0) { + lpc_drv_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-lpc.%d register failed!\n", i + 1); + } else { + lpc_drv_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_lpc_drv_device_exit(void) +{ + int i; + lpc_drv_device_t *lpc_drv_device_data; + + WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(lpc_drv_device) - 1; i >= 0; i--) { + lpc_drv_device_data = lpc_drv_device[i].dev.platform_data; + if (lpc_drv_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&lpc_drv_device[i]); + } + } +} + +module_init(wb_lpc_drv_device_init); +module_exit(wb_lpc_drv_device_exit); +MODULE_DESCRIPTION("LPC DRV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_wdt_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_wdt_device.c new file mode 100644 index 000000000000..e49ba375cb1e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_wdt_device.c @@ -0,0 +1,130 @@ +/* + * An wb_wdt_device driver for watchdog device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_wdt_device_debug = 0; +static int g_wb_wdt_device_error = 0; + +module_param(g_wb_wdt_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_wdt_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_WDT_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_wdt_device_debug) { \ + printk(KERN_INFO "[WB_WDT_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_WDT_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_wdt_device_error) { \ + printk(KERN_ERR "[WB_WDT_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static wb_wdt_device_t wb_wdt_device_data_0 = { + .config_dev_name = "/dev/cpld0", + .hw_algo = "eigenvalues", + .config_mode = 2, /* Logic dev feed watchdog */ + .priv_func_mode = 3, /* IO */ + .enable_val = 0xa5, + .disable_val = 0x0, + .enable_mask = 0xff, + .enable_reg = 0x68, + .timeout_cfg_reg = 0x66, + .timeleft_cfg_reg = 0x69, + .hw_margin = 90000, /* timeout */ + .timer_accuracy_reg_flag = 1, + .timer_accuracy_reg = 0x65, + .timer_accuracy_reg_val = 0x80, /* 1s */ + .timer_accuracy = 1000, + .timer_update_reg_flag = 1, + .timer_update_reg = 0x67, + .timer_update_reg_val = 0x01, + .feed_wdt_type = 0, /* watchdog device */ + .wdt_config_mode.logic_wdt = { + .feed_dev_name = "/dev/cpld0", + .logic_func_mode = 0x03, /* IO */ + .feed_reg = 0x64, + .active_val = 0x01 + }, + .sysfs_index = SYSFS_NO_CFG, +}; + +static void wb_wdt_device_release(struct device *dev) +{ + return; +} + +static struct platform_device wb_wdt_device[] = { + { + .name = "wb_wdt", + .id = 0, + .dev = { + .platform_data = &wb_wdt_device_data_0, + .release = wb_wdt_device_release, + }, + }, +}; + +static int __init wb_wdt_device_init(void) +{ + int i; + int ret = 0; + wb_wdt_device_t *wb_wdt_device_data; + + WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(wb_wdt_device); i++) { + wb_wdt_device_data = wb_wdt_device[i].dev.platform_data; + ret = platform_device_register(&wb_wdt_device[i]); + if (ret < 0) { + wb_wdt_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "rg-wdt.%d register failed!\n", i + 1); + } else { + wb_wdt_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_wdt_device_exit(void) +{ + int i; + wb_wdt_device_t *wb_wdt_device_data; + + WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(wb_wdt_device) - 1; i >= 0; i--) { + wb_wdt_device_data = wb_wdt_device[i].dev.platform_data; + if (wb_wdt_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&wb_wdt_device[i]); + } + } +} + +module_init(wb_wdt_device_init); +module_exit(wb_wdt_device_exit); +MODULE_DESCRIPTION("WB WDT Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_CPLD.cfg new file mode 100755 index 000000000000..2c10ab9bbb28 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_CPLD.cfg @@ -0,0 +1,40 @@ +# configuration item: I2C address of CPLD +# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id] +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +# bus: I2C bus number of CPLD +# addr: I2C address of CPLD +cpld_i2c_dev.bus_0_3=0 +cpld_i2c_dev.addr_0_3=0x0d +cpld_i2c_dev.bus_0_4=15 +cpld_i2c_dev.addr_0_4=0x51 +cpld_i2c_dev.bus_0_5=16 +cpld_i2c_dev.addr_0_5=0x52 + + +# configuration item: LPC address of CPLD +# format: cpld_lpc_addr_[cpld_slot]_[cpld_id] +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +cpld_lpc_dev_0_0=0x700 +cpld_lpc_dev_0_1=0x900 +cpld_lpc_dev_0_2=0xb00 + + +# configuration item: CPLD access method, lpc or i2c +# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +mode_cpld_0_0=lpc +mode_cpld_0_1=lpc +mode_cpld_0_2=lpc +mode_cpld_0_3=i2c +mode_cpld_0_4=i2c +mode_cpld_0_5=i2c + + +# configuration item: the number of CPLD +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: CPLD main_dev is 4 +# minor_dev: CPLD minor_dev not exist +dev_num_4_0=6 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_FAN.cfg new file mode 100755 index 000000000000..eb2d7faf58c8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_FAN.cfg @@ -0,0 +1,112 @@ +# configuration item: the number of fans +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: fan main_dev is 1 +# minor_dev: fan minor_dev not exist(0) +dev_num_1_0=2 + + +# configuration item: the number of rotors +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: rotor main_dev is 1 +# minor_dev: rotor minor_dev is 5 +dev_num_1_5=1 + + +# configuration item: fan presence status +# format: dev_present_status_[main_dev_id][fan_index] +# main_dev_id: fan main_dev_id is 1 +# fan_index: start from 1 +dev_present_status.mode_1_1=config +dev_present_status.src_1_1=cpld +dev_present_status.frmt_1_1=bit +dev_present_status.pola_1_1=negative +dev_present_status.addr_1_1=0x00010094 +dev_present_status.len_1_1=1 +dev_present_status.bit_offset_1_1=0 + +dev_present_status.mode_1_2=config +dev_present_status.src_1_2=cpld +dev_present_status.frmt_1_2=bit +dev_present_status.pola_1_2=negative +dev_present_status.addr_1_2=0x00010094 +dev_present_status.len_1_2=1 +dev_present_status.bit_offset_1_2=1 + + +# configuration item: fan rotor status +# format: fan_roll_status_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_roll_status.mode_1_0=config +fan_roll_status.int_cons_1_0= +fan_roll_status.src_1_0=cpld +fan_roll_status.frmt_1_0=bit +fan_roll_status.pola_1_0=positive +fan_roll_status.fpath_1_0= +fan_roll_status.addr_1_0=0x00010095 +fan_roll_status.len_1_0=1 +fan_roll_status.bit_offset_1_0=0 + + +fan_roll_status.mode_2_0=config +fan_roll_status.int_cons_2_0= +fan_roll_status.src_2_0=cpld +fan_roll_status.frmt_2_0=bit +fan_roll_status.pola_2_0=positive +fan_roll_status.fpath_2_0= +fan_roll_status.addr_2_0=0x00010095 +fan_roll_status.len_2_0=1 +fan_roll_status.bit_offset_2_0=1 + + +# configuration item: fan speed +# format: fan_speed_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_speed.mode_1_0=config +fan_speed.int_cons_1_0= +fan_speed.src_1_0=cpld +fan_speed.frmt_1_0=byte +fan_speed.pola_1_0= +fan_speed.fpath_1_0= +fan_speed.addr_1_0=0x00010098 +fan_speed.len_1_0=1 +fan_speed.bit_offset_1_0= +fan_speed.int_extra1_1_0=1 + + +fan_speed.mode_2_0=config +fan_speed.int_cons_2_0= +fan_speed.src_2_0=cpld +fan_speed.frmt_2_0=byte +fan_speed.pola_2_0= +fan_speed.fpath_2_0= +fan_speed.addr_2_0=0x00010099 +fan_speed.len_2_0=1 +fan_speed.bit_offset_2_0= +fan_speed.int_extra1_2_0=1 + + +# configuration item: fan pwm +# format: fan_ratio_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_ratio.mode_1_0=config +fan_ratio.int_cons_1_0= +fan_ratio.src_1_0=cpld +fan_ratio.frmt_1_0=byte +fan_ratio.pola_1_0= +fan_ratio.fpath_1_0= +fan_ratio.addr_1_0=0x00010090 +fan_ratio.len_1_0=1 +fan_ratio.bit_offset_1_0= + +fan_ratio.mode_2_0=config +fan_ratio.int_cons_2_0= +fan_ratio.src_2_0=cpld +fan_ratio.frmt_2_0=byte +fan_ratio.pola_2_0= +fan_ratio.fpath_2_0= +fan_ratio.addr_2_0=0x00010091 +fan_ratio.len_2_0=1 +fan_ratio.bit_offset_2_0= diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_PSU.cfg new file mode 100755 index 000000000000..8b2d41974eb3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_PSU.cfg @@ -0,0 +1,64 @@ +# configuration item: the number of psus +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: psu main_dev is 2 +# minor_dev: psu minor_dev not exist(0) +dev_num_2_0=2 + + +# configuration item: psu status +# format: psu_status_[psu_index]_[status_id] +# psu_index: start from 1 +# status_id: 0: presence 1: output 2: alert +# psu1 presence status +psu_status.mode_1_0=config +psu_status.src_1_0=cpld +psu_status.frmt_1_0=bit +psu_status.pola_1_0=negative +psu_status.addr_1_0=0x00020010 +psu_status.len_1_0=1 +psu_status.bit_offset_1_0=0 + +# psu1 output status +psu_status.mode_1_1=config +psu_status.src_1_1=cpld +psu_status.frmt_1_1=bit +psu_status.pola_1_1=positive +psu_status.addr_1_1=0x00020011 +psu_status.len_1_1=1 +psu_status.bit_offset_1_1=0 + +# psu1 alert status +psu_status.mode_1_2=config +psu_status.src_1_2=cpld +psu_status.frmt_1_2=bit +psu_status.pola_1_2=negative +psu_status.addr_1_2=0x00020011 +psu_status.len_1_2=1 +psu_status.bit_offset_1_2=0 + +# psu2 presence status +psu_status.mode_2_0=config +psu_status.src_2_0=cpld +psu_status.frmt_2_0=bit +psu_status.pola_2_0=negative +psu_status.addr_2_0=0x00020010 +psu_status.len_2_0=1 +psu_status.bit_offset_2_0=1 + +# psu2 output status +psu_status.mode_2_1=config +psu_status.src_2_1=cpld +psu_status.frmt_2_1=bit +psu_status.pola_2_1=positive +psu_status.addr_2_1=0x00020011 +psu_status.len_2_1=1 +psu_status.bit_offset_2_1=1 + +# psu2 alert status +psu_status.mode_2_2=config +psu_status.src_2_2=cpld +psu_status.frmt_2_2=bit +psu_status.pola_2_2=negative +psu_status.addr_2_2=0x00020011 +psu_status.len_2_2=1 +psu_status.bit_offset_2_2=1 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_SFF.cfg new file mode 100755 index 000000000000..9cfdcd29eb8f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_SFF.cfg @@ -0,0 +1,54 @@ +# configuration item: the number of sffs +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: sff main_dev is 3 +# minor_dev: sff minor_dev not exist(0) +dev_num_3_0=4 + + +# configuration item: The directory name of sff sysfs +# format: sff_dir_name_[sff_index] +# sff_index: start from 1 +sff_dir_name_1 =sff49 +sff_dir_name_2 =sff50 +sff_dir_name_3 =sff51 +sff_dir_name_4 =sff52 + + +# configuration item: sff cpld register status +# format: sff_cpld_reg_[sff_index]_[cpld_reg] +# sff_index: start from 1 +# cpld_reg: 1: power_on, 2: tx_fault, 3: tx_dis, 4:pre_n, 5:rx_los +# 6: reset, 7: lpmode, 8: module_present, 9: interrupt + +# sff cpld presence status +sff_cpld_reg.mode_1_8=config +sff_cpld_reg.src_1_8=cpld +sff_cpld_reg.frmt_1_8=bit +sff_cpld_reg.pola_1_8=negative +sff_cpld_reg.addr_1_8=0x00020030 +sff_cpld_reg.len_1_8=1 +sff_cpld_reg.bit_offset_1_8=1 + +sff_cpld_reg.mode_2_8=config +sff_cpld_reg.src_2_8=cpld +sff_cpld_reg.frmt_2_8=bit +sff_cpld_reg.pola_2_8=negative +sff_cpld_reg.addr_2_8=0x00020030 +sff_cpld_reg.len_2_8=1 +sff_cpld_reg.bit_offset_2_8=0 + +sff_cpld_reg.mode_3_8=config +sff_cpld_reg.src_3_8=cpld +sff_cpld_reg.frmt_3_8=bit +sff_cpld_reg.pola_3_8=negative +sff_cpld_reg.addr_3_8=0x00020030 +sff_cpld_reg.len_3_8=1 +sff_cpld_reg.bit_offset_3_8=3 + +sff_cpld_reg.mode_4_8=config +sff_cpld_reg.src_4_8=cpld +sff_cpld_reg.frmt_4_8=bit +sff_cpld_reg.pola_4_8=negative +sff_cpld_reg.addr_4_8=0x00020030 +sff_cpld_reg.len_4_8=1 +sff_cpld_reg.bit_offset_4_8=2 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/cfg_file_name b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/cfg_file_name new file mode 100755 index 000000000000..5f49420441a5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/cfg_file_name @@ -0,0 +1,4 @@ +WB_PLAT_CPLD +WB_PLAT_FAN +WB_PLAT_PSU +WB_PLAT_SFF diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/service/set-eth-mac.service b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/service/set-eth-mac.service new file mode 100644 index 000000000000..4b74632c21cf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/service/set-eth-mac.service @@ -0,0 +1,14 @@ +[Unit] +Description=Set eth mac address +Before=interfaces-config.service +Requires=platform_driver.service +After=platform_driver.service +#DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/set_eth_mac.py +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/setup.py new file mode 100755 index 000000000000..6c3916921abb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/setup.py @@ -0,0 +1,39 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation', + license='Apache 2.0', + author='SONiC Team', + author_email='support', + url='', + maintainer='support', + maintainer_email='', + packages=[ + 'sonic_platform', + 'plat_hal', + 'wbutil', + 'eepromutil', + 'hal-config', + 'config', + ], + py_modules=[ + 'hal_pltfm', + 'platform_util', + 'platform_intf', + ], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py index 546e125314ff..3d212273ad7c 100755 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py @@ -5,7 +5,7 @@ STARTMODULE = { "hal_fanctrl": 1, "hal_ledctrl": 1, - "avscontrol": 1, + "avscontrol": 0, "dev_monitor": 1, "pmon_syslog": 1, "tty_console": 1, @@ -709,16 +709,12 @@ } ] -BLACKLIST_DRIVERS = [ - {"name": "i2c_i801", "delay": 0}, -] - DRIVERLISTS = [ - {"name": "wb_i2c_i801", "delay": 0}, + {"name": "i2c_i801", "delay": 0}, {"name": "wb_gpio_d1500", "delay": 0}, {"name": "i2c_dev", "delay": 0}, - {"name": "wb_i2c_algo_bit", "delay": 0}, - {"name": "wb_i2c_gpio", "delay": 0}, + {"name": "i2c_algo_bit", "delay": 0}, + {"name": "i2c_gpio", "delay": 0}, {"name": "i2c_mux", "delay": 0}, {"name": "wb_gpio_device", "delay": 0}, {"name": "wb_i2c_gpio_device gpio_sda=17 gpio_scl=1 gpio_udelay=2", "delay": 0}, @@ -737,15 +733,15 @@ {"name": "wb_i2c_mux_pca954x", "delay": 0}, {"name": "wb_i2c_mux_pca954x_device", "delay": 0}, {"name": "wb_i2c_dev_device", "delay": 0}, - {"name": "wb_lm75", "delay": 0}, + {"name": "lm75", "delay": 0}, {"name": "optoe", "delay": 0}, {"name": "at24", "delay": 0}, {"name": "wb_mac_bsc", "delay": 0}, - {"name": "wb_pmbus_core", "delay": 0}, - {"name": "wb_isl68137", "delay": 0}, + {"name": "pmbus_core", "delay": 0}, + {"name": "isl68137", "delay": 0}, {"name": "wb_csu550", "delay": 0}, - {"name": "wb_ina3221", "delay": 0}, - {"name": "wb_tps53622", "delay": 0}, + {"name": "ina3221", "delay": 0}, + {"name": "tps53679", "delay": 0}, {"name": "plat_dfd", "delay": 0}, {"name": "plat_switch", "delay": 0}, {"name": "plat_fan", "delay": 0}, @@ -767,19 +763,19 @@ {"name": "24c02", "bus": 25, "loc": 0x50}, {"name": "wb_dps550", "bus": 25, "loc": 0x58}, # temp - {"name": "wb_lm75", "bus": 3, "loc": 0x48}, - {"name": "wb_lm75", "bus": 3, "loc": 0x49}, - {"name": "wb_lm75", "bus": 3, "loc": 0x4a}, - {"name": "wb_lm75", "bus": 3, "loc": 0x4b}, - {"name": "wb_lm75", "bus": 3, "loc": 0x4c}, + {"name": "lm75", "bus": 3, "loc": 0x48}, + {"name": "lm75", "bus": 3, "loc": 0x49}, + {"name": "lm75", "bus": 3, "loc": 0x4a}, + {"name": "lm75", "bus": 3, "loc": 0x4b}, + {"name": "lm75", "bus": 3, "loc": 0x4c}, # dcdc - {"name": "wb_ina3221", "bus": 7, "loc": 0x40}, - {"name": "wb_ina3221", "bus": 7, "loc": 0x41}, - {"name": "wb_ina3221", "bus": 7, "loc": 0x42}, - {"name": "wb_ina3221", "bus": 7, "loc": 0x43}, - {"name": "wb_tps53622", "bus": 7, "loc": 0x60}, - {"name": "wb_tps53622", "bus": 7, "loc": 0x6c}, - {"name": "wb_isl68127", "bus": 7, "loc": 0x64}, + {"name": "ina3221", "bus": 7, "loc": 0x40}, + {"name": "ina3221", "bus": 7, "loc": 0x41}, + {"name": "ina3221", "bus": 7, "loc": 0x42}, + {"name": "ina3221", "bus": 7, "loc": 0x43}, + {"name": "tps53688", "bus": 7, "loc": 0x60}, + {"name": "tps53688", "bus": 7, "loc": 0x6c}, + {"name": "isl68137", "bus": 7, "loc": 0x64}, ] OPTOE = [ @@ -847,11 +843,11 @@ { "name": "lm75", "device": [ - {"id": "lm75_1", "name": "wb_lm75", "bus": 3, "loc": 0x48, "attr": "hwmon"}, - {"id": "lm75_2", "name": "wb_lm75", "bus": 3, "loc": 0x49, "attr": "hwmon"}, - {"id": "lm75_3", "name": "wb_lm75", "bus": 3, "loc": 0x4a, "attr": "hwmon"}, - {"id": "lm75_4", "name": "wb_lm75", "bus": 3, "loc": 0x4b, "attr": "hwmon"}, - {"id": "lm75_5", "name": "wb_lm75", "bus": 3, "loc": 0x4c, "attr": "hwmon"}, + {"id": "lm75_1", "name": "lm75", "bus": 3, "loc": 0x48, "attr": "hwmon"}, + {"id": "lm75_2", "name": "lm75", "bus": 3, "loc": 0x49, "attr": "hwmon"}, + {"id": "lm75_3", "name": "lm75", "bus": 3, "loc": 0x4a, "attr": "hwmon"}, + {"id": "lm75_4", "name": "lm75", "bus": 3, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_5", "name": "lm75", "bus": 3, "loc": 0x4c, "attr": "hwmon"}, ], }, { @@ -863,32 +859,33 @@ { "name": "ina3221", "device": [ - {"id": "ina3221_1", "name": "wb_ina3221", "bus": 7, "loc": 0x40, "attr": "hwmon"}, - {"id": "ina3221_2", "name": "wb_ina3221", "bus": 7, "loc": 0x41, "attr": "hwmon"}, - {"id": "ina3221_3", "name": "wb_ina3221", "bus": 7, "loc": 0x42, "attr": "hwmon"}, - {"id": "ina3221_4", "name": "wb_ina3221", "bus": 7, "loc": 0x43, "attr": "hwmon"}, + {"id": "ina3221_1", "name": "ina3221", "bus": 7, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_2", "name": "ina3221", "bus": 7, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_3", "name": "ina3221", "bus": 7, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_4", "name": "ina3221", "bus": 7, "loc": 0x43, "attr": "hwmon"}, ], }, { "name": "tps53622", "device": [ - {"id": "tps53622_1", "name": "wb_tps53622", "bus": 7, "loc": 0x60, "attr": "hwmon"}, - {"id": "tps53622_2", "name": "wb_tps53622", "bus": 7, "loc": 0x6c, "attr": "hwmon"}, + {"id": "tps53622_1", "name": "tps53688", "bus": 7, "loc": 0x60, "attr": "hwmon"}, + {"id": "tps53622_2", "name": "tps53688", "bus": 7, "loc": 0x6c, "attr": "hwmon"}, ], }, { - "name": "isl68127", + "name": "isl68137", "device": [ - {"id": "isl68127_1", "name": "wb_isl68127", "bus": 7, "loc": 0x64, "attr": "hwmon"}, + {"id": "isl68137_1", "name": "isl68137", "bus": 7, "loc": 0x64, "attr": "hwmon"}, ], } ], } INIT_PARAM_PRE = [ - {"loc": "7-0064/hwmon/hwmon*/avs0_vout_max", "value": "900000"}, - {"loc": "7-0064/hwmon/hwmon*/avs0_vout_min", "value": "750000"}, + #{"loc": "7-0064/hwmon/hwmon*/avs0_vout_max", "value": "900000"}, + #{"loc": "7-0064/hwmon/hwmon*/avs0_vout_min", "value": "750000"}, ] + INIT_COMMAND_PRE = [ "i2cset -y -f 6 0x0d 0x91 0x48", "i2cset -y -f 6 0x0d 0x92 0x01", # MAC_PWR_EN diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile old mode 100755 new mode 100644 index 5573a18f0fcc..578b5fee1eba --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile @@ -2,7 +2,6 @@ MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST))) MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules) EXTRA_CFLAGS+= -I$(MODULES_DIR) -EXTRA_CFLAGS+= -I$(MODULES_DIR)/linux obj-m := wb_pcie_dev_device.o obj-m += wb_i2c_mux_pca954x_device.o diff --git a/platform/broadcom/sonic-platform-modules-nokia b/platform/broadcom/sonic-platform-modules-nokia index a04cc6b2291a..b3ff7c08a431 160000 --- a/platform/broadcom/sonic-platform-modules-nokia +++ b/platform/broadcom/sonic-platform-modules-nokia @@ -1 +1 @@ -Subproject commit a04cc6b2291ad23ae26ad45dfcaed2715dde05b3 +Subproject commit b3ff7c08a431a76c72ed14cd257e90219f1ec576 diff --git a/platform/centec-arm64/sonic-platform-modules-e530/debian/control b/platform/centec-arm64/sonic-platform-modules-e530/debian/control index 595673e049f8..0c5f0da490d9 100644 --- a/platform/centec-arm64/sonic-platform-modules-e530/debian/control +++ b/platform/centec-arm64/sonic-platform-modules-e530/debian/control @@ -7,20 +7,20 @@ Standards-Version: 3.9.3 Package: platform-modules-e530-48t4x-p Architecture: arm64 -Depends: linux-image-6.1.0-11-2-arm64-unsigned +Depends: linux-image-6.1.0-22-2-arm64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-e530-24x2c Architecture: arm64 -Depends: linux-image-6.1.0-11-2-arm64-unsigned +Depends: linux-image-6.1.0-22-2-arm64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-e530-48s4x Architecture: arm64 -Depends: linux-image-6.1.0-11-2-arm64-unsigned +Depends: linux-image-6.1.0-22-2-arm64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-e530-24x2q Architecture: arm64 -Depends: linux-image-6.1.0-11-2-arm64-unsigned +Depends: linux-image-6.1.0-22-2-arm64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/centec-arm64/sonic-platform-modules-fs/debian/control b/platform/centec-arm64/sonic-platform-modules-fs/debian/control index bf84935d49f0..c691b0b582af 100755 --- a/platform/centec-arm64/sonic-platform-modules-fs/debian/control +++ b/platform/centec-arm64/sonic-platform-modules-fs/debian/control @@ -7,5 +7,5 @@ Standards-Version: 3.9.3 Package: platform-modules-s5800-48t4s Architecture: arm64 -Depends: linux-image-6.1.0-11-2-arm64-unsigned +Depends: linux-image-6.1.0-22-2-arm64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/centec-arm64/sonic_fit.its b/platform/centec-arm64/sonic_fit.its index d7158e242855..53b8dba4eced 100644 --- a/platform/centec-arm64/sonic_fit.its +++ b/platform/centec-arm64/sonic_fit.its @@ -12,7 +12,7 @@ images { kernel_ctc { description = "ARM64 Kernel"; - data = /incbin/("./vmlinuz-6.1.0-11-2-arm64"); + data = /incbin/("./vmlinuz-6.1.0-22-2-arm64"); type = "kernel"; arch = "arm64"; os = "linux"; @@ -25,7 +25,7 @@ }; initramfs { description = "initramfs"; - data = /incbin/("./initrd.img-6.1.0-11-2-arm64"); + data = /incbin/("./initrd.img-6.1.0-22-2-arm64"); type = "ramdisk"; arch = "arm64"; os = "linux"; diff --git a/platform/centec-arm64/tsingma-bsp/debian/control b/platform/centec-arm64/tsingma-bsp/debian/control index de5eab663ed3..c439be832d40 100644 --- a/platform/centec-arm64/tsingma-bsp/debian/control +++ b/platform/centec-arm64/tsingma-bsp/debian/control @@ -7,5 +7,5 @@ Standards-Version: 3.9.3 Package: tsingma-bsp Architecture: arm64 -Depends: linux-image-6.1.0-11-2-arm64-unsigned +Depends: linux-image-6.1.0-22-2-arm64-unsigned Description: kernel modules for tsingma bsp diff --git a/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install b/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install index 30757f33ec53..b27752503d12 100644 --- a/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install +++ b/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install @@ -1,17 +1,17 @@ -src/ctc5236-mc/ctc5236-mc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/pwm-ctc/pwm-ctc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/ctc5236_switch/ctc5236_switch.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/pinctrl-ctc/pinctrl-ctc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/ctc_wdt/ctc_wdt.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/ctcmac/ctcmac.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/ctcmac/ctc5236_mdio.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/ctc-phy/mars.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/i2c-ctc/i2c-ctc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/gpio-ctc/gpio-ctc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/ehci-ctc/ehci-ctc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/rtc-sd2405/rtc-sd2405.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/sdhci-ctc5236/sdhci-ctc5236.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/spi-ctc-qspi/spi-ctc-qspi.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra +src/ctc5236-mc/ctc5236-mc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/pwm-ctc/pwm-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/ctc5236_switch/ctc5236_switch.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/pinctrl-ctc/pinctrl-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/ctc_wdt/ctc_wdt.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/ctcmac/ctcmac.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/ctcmac/ctc5236_mdio.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/ctc-phy/mars.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/i2c-ctc/i2c-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/gpio-ctc/gpio-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/ehci-ctc/ehci-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/rtc-sd2405/rtc-sd2405.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/sdhci-ctc5236/sdhci-ctc5236.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/spi-ctc-qspi/spi-ctc-qspi.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra src/ctc-dts/e530-ctc5236.dtb /boot/ src/m2-w6010-48gt4x/m2-w6010-48gt4x-r0.dtb /boot/ src/config/fw_env.config /etc/ diff --git a/platform/centec/sonic-platform-modules-e582/debian/control b/platform/centec/sonic-platform-modules-e582/debian/control index bf1f71f245fc..529aac43d427 100644 --- a/platform/centec/sonic-platform-modules-e582/debian/control +++ b/platform/centec/sonic-platform-modules-e582/debian/control @@ -7,11 +7,11 @@ Standards-Version: 3.9.3 Package: platform-modules-e582-48x2q4z Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-e582-48x6q Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/centec/sonic-platform-modules-embedway/debian/control b/platform/centec/sonic-platform-modules-embedway/debian/control index 0b4837e027d7..c01f8f2c6d26 100644 --- a/platform/centec/sonic-platform-modules-embedway/debian/control +++ b/platform/centec/sonic-platform-modules-embedway/debian/control @@ -7,6 +7,6 @@ Standards-Version: 3.9.3 Package: platform-modules-embedway-es6220 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/centec/sonic-platform-modules-v682/debian/control b/platform/centec/sonic-platform-modules-v682/debian/control index 5f03f277802b..b775827ab75e 100644 --- a/platform/centec/sonic-platform-modules-v682/debian/control +++ b/platform/centec/sonic-platform-modules-v682/debian/control @@ -7,15 +7,15 @@ Standards-Version: 3.9.3 Package: platform-modules-v682-48y8c-d Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-v682-48y8c Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-v682-48x8c Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/checkout/cisco-8000-smartswitch.ini b/platform/checkout/cisco-8000-smartswitch.ini new file mode 100644 index 000000000000..d169b242d322 --- /dev/null +++ b/platform/checkout/cisco-8000-smartswitch.ini @@ -0,0 +1,4 @@ +[module] +repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git +ref=0.master.ss.0.3 + diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini index c1930b7c35d2..bb495d263345 100644 --- a/platform/checkout/cisco-8000.ini +++ b/platform/checkout/cisco-8000.ini @@ -1,3 +1,3 @@ [module] repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git -ref=202405.0.2 +ref=202405.0.7 diff --git a/platform/components/docker-gbsyncd-credo.mk b/platform/components/docker-gbsyncd-credo.mk index e0833068d008..c8b14c93fb19 100644 --- a/platform/components/docker-gbsyncd-credo.mk +++ b/platform/components/docker-gbsyncd-credo.mk @@ -1,11 +1,11 @@ DOCKER_GBSYNCD_PLATFORM_CODE = credo -LIBSAI_CREDO = libsaicredo_0.9.6_amd64.deb -$(LIBSAI_CREDO)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo_0.9.6_amd64.deb" -LIBSAI_CREDO_OWL = libsaicredo-owl_0.9.6_amd64.deb -$(LIBSAI_CREDO_OWL)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo-owl_0.9.6_amd64.deb" -LIBSAI_CREDO_BLACKHAWK = libsaicredo-blackhawk_0.9.6_amd64.deb -$(LIBSAI_CREDO_BLACKHAWK)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo-blackhawk_0.9.6_amd64.deb" +LIBSAI_CREDO = libsaicredo_0.9.9_amd64.deb +$(LIBSAI_CREDO)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/$(LIBSAI_CREDO)" +LIBSAI_CREDO_OWL = libsaicredo-owl_0.9.9_amd64.deb +$(LIBSAI_CREDO_OWL)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/$(LIBSAI_CREDO_OWL)" +LIBSAI_CREDO_BLACKHAWK = libsaicredo-blackhawk_0.9.9_amd64.deb +$(LIBSAI_CREDO_BLACKHAWK)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/$(LIBSAI_CREDO_BLACKHAWK)" ifneq ($($(LIBSAI_CREDO)_URL),) include $(PLATFORM_PATH)/../template/docker-gbsyncd-base.mk diff --git a/platform/marvell/mrvl-prestera b/platform/marvell/mrvl-prestera index 5834b7338ff9..36fa3a3f4e31 160000 --- a/platform/marvell/mrvl-prestera +++ b/platform/marvell/mrvl-prestera @@ -1 +1 @@ -Subproject commit 5834b7338ff9ac6f03d45ab85568048be1f62199 +Subproject commit 36fa3a3f4e317d8c0c111cc74aafffce12e1546d diff --git a/platform/marvell/platform_arm64.conf b/platform/marvell/platform_arm64.conf index 51af700c4cf7..4c55dd3ae78c 100644 --- a/platform/marvell/platform_arm64.conf +++ b/platform/marvell/platform_arm64.conf @@ -9,7 +9,7 @@ VAR_LOG=512 UBOOT_FW_DEFAULT=1 kernel_addr=0x1100000 -kernel_version=6.1.0-11-2-arm64 +kernel_version=6.1.0-22-2-arm64 kernel_fname="/boot/vmlinuz-$kernel_version" initrd_fname="/boot/initrd.img-$kernel_version" fit_fname="/boot/sonic_arm64.fit" diff --git a/platform/marvell/platform_armhf.conf b/platform/marvell/platform_armhf.conf index 931cddd12a47..9c3568957914 100644 --- a/platform/marvell/platform_armhf.conf +++ b/platform/marvell/platform_armhf.conf @@ -10,8 +10,8 @@ fdt_addr=0x2800000 fdt_high=0x28fffff initrd_addr=0x2900000 -kernel_fname="/boot/vmlinuz-6.1.0-11-2-armmp" -initrd_fname="/boot/initrd.img-6.1.0-11-2-armmp" +kernel_fname="/boot/vmlinuz-6.1.0-22-2-armmp" +initrd_fname="/boot/initrd.img-6.1.0-22-2-armmp" fdt_fname="/boot/armada-385-ET6448M_4G_Nand.dtb" if [ "$install_env" = "onie" ]; then @@ -61,6 +61,15 @@ demo_mnt=/tmp FW_ENV_DEFAULT='/dev/mtd0 0x00500000 0x80000 0x100000 8' UBOOT_FW_DEFAULT=1 +defrag_file() { + echo "Defragment file: $1 (used by U-Boot)" + e4defrag $1 >/dev/null + if [ $? -ne 0 ]; then + echo "ERROR: defrag failed for $1" + exit 3 + fi +} + prepare_boot_menu() { echo "Sync up cache ..." sync @@ -100,15 +109,22 @@ prepare_boot_menu() { echo $FW_ENV_DEFAULT > /etc/fw_env.config echo "Using pre-configured uboot env" fi + + image_name=${image_dir}${kernel_fname} + initrd_name=${image_dir}${initrd_fname} + fdt_name=${image_dir}${fdt_fname} + if [ "$PLATFORM" = "armhf-nokia_ixs7215_52x-r0" ]; then FW_ENV_DEFAULT='/dev/mtd0 0x00100000 0x10000 0x10000' echo $FW_ENV_DEFAULT > /etc/fw_env.config echo "Using pre-configured uboot env for armhf-nokia_ixs7215_52x-r0" + if [ "$install_env" != "onie" ]; then + defrag_file ${demo_mnt}/${image_name} + defrag_file ${demo_mnt}/${initrd_name} + defrag_file ${demo_mnt}/${fdt_name} + fi fi - image_name=${image_dir}${kernel_fname} - initrd_name=${image_dir}${initrd_fname} - fdt_name=${image_dir}${fdt_fname} if [ "$install_env" = "onie" ]; then FW_ARG="-f" diff --git a/platform/marvell/sai.mk b/platform/marvell/sai.mk index 3a50da904b99..87bd92448d5d 100644 --- a/platform/marvell/sai.mk +++ b/platform/marvell/sai.mk @@ -2,11 +2,11 @@ BRANCH = master ifeq ($(CONFIGURED_ARCH),arm64) -MRVL_SAI_VERSION = 1.13.0-1 +MRVL_SAI_VERSION = 1.14.0-1 else ifeq ($(CONFIGURED_ARCH),armhf) -MRVL_SAI_VERSION = 1.13.0-3 +MRVL_SAI_VERSION = 1.14.0-1 else -MRVL_SAI_VERSION = 1.13.0-1 +MRVL_SAI_VERSION = 1.14.0-1 endif MRVL_SAI_URL_PREFIX = https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/$(CONFIGURED_ARCH)/sai-plugin/$(BRANCH)/ diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh b/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh index 51474c2e0ff0..68613cb8676e 100644 --- a/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh +++ b/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh @@ -5,8 +5,8 @@ # Load required kernel-mode drivers load_kernel_drivers() { echo "Loading Kernel Drivers" - sudo insmod /lib/modules/6.1.0-11-2-arm64/kernel/extra/nokia_7215_ixs_a1_cpld.ko - sudo insmod /lib/modules/6.1.0-11-2-arm64/kernel/extra/cn9130_cpu_thermal_sensor.ko + sudo insmod /lib/modules/6.1.0-22-2-arm64/kernel/extra/nokia_7215_ixs_a1_cpld.ko + sudo insmod /lib/modules/6.1.0-22-2-arm64/kernel/extra/cn9130_cpu_thermal_sensor.ko } fw_uboot_env_cfg() diff --git a/platform/marvell/sonic_fit.its b/platform/marvell/sonic_fit.its index 3208388d980e..f3ff5ac7cec1 100644 --- a/platform/marvell/sonic_fit.its +++ b/platform/marvell/sonic_fit.its @@ -7,7 +7,7 @@ images { kernel_ac5x { description = "Linux Kernel for AC5x"; - data = /incbin/("/boot/vmlinuz-6.1.0-11-2-arm64"); + data = /incbin/("/boot/vmlinuz-6.1.0-22-2-arm64"); type = "kernel"; arch = "arm64"; os = "linux"; @@ -20,7 +20,7 @@ }; fdt_ac5x { description = "Flattened Device Tree blob for AC5x"; - data = /incbin/("/usr/lib/linux-image-6.1.0-11-2-arm64/marvell/ac5-98dx35xx-rd.dtb"); + data = /incbin/("/usr/lib/linux-image-6.1.0-22-2-arm64/marvell/ac5-98dx35xx-rd.dtb"); type = "flat_dt"; arch = "arm64"; compression = "none"; @@ -31,7 +31,7 @@ }; fdt_7215_a1 { description = "Flattened Device Tree blob for 7215_IXS_A1"; - data = /incbin/("/usr/lib/linux-image-6.1.0-11-2-arm64/marvell/7215-ixs-a1.dtb"); + data = /incbin/("/usr/lib/linux-image-6.1.0-22-2-arm64/marvell/7215-ixs-a1.dtb"); type = "flat_dt"; arch = "arm64"; compression = "none"; @@ -42,7 +42,7 @@ }; ramdisk_ac5x { description = "ramdisk for AC5x"; - data = /incbin/("/boot/initrd.img-6.1.0-11-2-arm64"); + data = /incbin/("/boot/initrd.img-6.1.0-22-2-arm64"); type = "ramdisk"; arch = "arm64"; os = "linux"; @@ -55,7 +55,7 @@ }; kernel_1 { description = "Linux Kernel"; - data = /incbin/("/boot/vmlinuz-6.1.0-11-2-arm64"); + data = /incbin/("/boot/vmlinuz-6.1.0-22-2-arm64"); type = "kernel"; arch = "arm64"; os = "linux"; @@ -68,7 +68,7 @@ }; ramdisk_1 { description = "ramdisk"; - data = /incbin/("/boot/initrd.img-6.1.0-11-2-arm64"); + data = /incbin/("/boot/initrd.img-6.1.0-22-2-arm64"); type = "ramdisk"; arch = "arm64"; os = "linux"; @@ -81,7 +81,7 @@ }; kernel_2 { description = "Linux Kernel"; - data = /incbin/("/boot/vmlinuz-6.1.0-11-2-arm64"); + data = /incbin/("/boot/vmlinuz-6.1.0-22-2-arm64"); type = "kernel"; arch = "arm64"; os = "linux"; @@ -94,7 +94,7 @@ }; ramdisk_2 { description = "ramdisk"; - data = /incbin/("/boot/initrd.img-6.1.0-11-2-arm64"); + data = /incbin/("/boot/initrd.img-6.1.0-22-2-arm64"); type = "ramdisk"; arch = "arm64"; os = "linux"; diff --git a/platform/mellanox/asic_table.j2 b/platform/mellanox/asic_table.j2 index 0069c6b77dfa..b45d0588a555 100644 --- a/platform/mellanox/asic_table.j2 +++ b/platform/mellanox/asic_table.j2 @@ -50,6 +50,7 @@ 'x86_64-nvidia_sn5400_simx-r0':'MELLANOX-SPECTRUM-4', 'x86_64-nvidia_sn5600_simx-r0':'MELLANOX-SPECTRUM-4', 'x86_64-nvidia_sn4280-r0':'MELLANOX-SPECTRUM-3', + 'x86_64-nvidia_sn5640_simx-r0':'MELLANOX-SPECTRUM-5', 'vs-platform':'vs' } %} @@ -60,7 +61,9 @@ "cell_size": "96", "pipeline_latency": "19", "mac_phy_delay": "0.8", - "peer_response_time": "3.8" + "peer_response_time": "3.8", + "port_reserved_shp": "20", + "port_max_shp": "8192" }, "OP": "SET" } @@ -70,7 +73,9 @@ "cell_size": "144", "pipeline_latency": "19", "mac_phy_delay": "0.8", - "peer_response_time": "3.8" + "peer_response_time": "3.8", + "port_reserved_shp": "20", + "port_max_shp": "8192" }, "OP": "SET" } @@ -80,13 +85,27 @@ "cell_size": "144", "pipeline_latency": "19", "mac_phy_delay": "0.8", - "peer_response_time": "3.8" + "peer_response_time": "3.8", + "port_reserved_shp": "20", + "port_max_shp": "8192" }, "OP": "SET" } {% elif asic_type == 'MELLANOX-SPECTRUM-4' %} { "ASIC_TABLE:MELLANOX-SPECTRUM-4": { + "cell_size": "192", + "pipeline_latency": "19", + "mac_phy_delay": "0.8", + "peer_response_time": "3.8", + "port_reserved_shp": "20", + "port_max_shp": "8192" + }, + "OP": "SET" + } +{% elif asic_type == 'MELLANOX-SPECTRUM-5' %} + { + "ASIC_TABLE:MELLANOX-SPECTRUM-5": { "cell_size": "192", "pipeline_latency": "19", "mac_phy_delay": "0.8", diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk index c1f1311d84f7..8a3f45c0350a 100644 --- a/platform/mellanox/fw.mk +++ b/platform/mellanox/fw.mk @@ -21,33 +21,33 @@ MLNX_FW_BASE_PATH = $(MLNX_SDK_BASE_PATH) # Place an URL here to FW if you want to download FW instead MLNX_FW_BASE_URL = -SIMX_VERSION = 24.4-1091 +SIMX_VERSION = 24.7-1154 FW_FROM_URL = y -MLNX_FW_ASSETS_RELEASE_TAG = fw-2012.4072 +MLNX_FW_ASSETS_RELEASE_TAG = fw-2014.1150 MLNX_FW_ASSETS_URL = $(MLNX_ASSETS_GITHUB_URL)/releases/download/$(MLNX_FW_ASSETS_RELEASE_TAG) ifeq ($(MLNX_FW_BASE_URL), ) MLNX_FW_BASE_URL = $(MLNX_FW_ASSETS_URL) endif -MLNX_SPC_FW_VERSION = 13.2012.4072 +MLNX_SPC_FW_VERSION = 13.2014.1150 MLNX_SPC_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_SPC_FW_VERSION))-EVB.mfa $(MLNX_SPC_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC_FW_FILE) -MLNX_SPC2_FW_VERSION = 29.2012.4072 +MLNX_SPC2_FW_VERSION = 29.2014.1150 MLNX_SPC2_FW_FILE = fw-SPC2-rel-$(subst .,_,$(MLNX_SPC2_FW_VERSION))-EVB.mfa $(MLNX_SPC2_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC2_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC2_FW_FILE) -MLNX_SPC3_FW_VERSION = 30.2012.4072 +MLNX_SPC3_FW_VERSION = 30.2014.1150 MLNX_SPC3_FW_FILE = fw-SPC3-rel-$(subst .,_,$(MLNX_SPC3_FW_VERSION))-EVB.mfa $(MLNX_SPC3_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC3_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC3_FW_FILE) -MLNX_SPC4_FW_VERSION = 34.2012.4072 +MLNX_SPC4_FW_VERSION = 34.2014.1150 MLNX_SPC4_FW_FILE = fw-SPC4-rel-$(subst .,_,$(MLNX_SPC4_FW_VERSION))-EVB.mfa $(MLNX_SPC4_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC4_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC4_FW_FILE) diff --git a/platform/mellanox/hw-management.mk b/platform/mellanox/hw-management.mk index 9664435a146d..6255e17cef33 100644 --- a/platform/mellanox/hw-management.mk +++ b/platform/mellanox/hw-management.mk @@ -16,7 +16,7 @@ # # Mellanox HW Management -MLNX_HW_MANAGEMENT_VERSION = 7.0030.4003 +MLNX_HW_MANAGEMENT_VERSION = 7.0040.1011 export MLNX_HW_MANAGEMENT_VERSION diff --git a/platform/mellanox/hw-management/hw-mgmt b/platform/mellanox/hw-management/hw-mgmt index 6cf13ac6000a..164c9ef66b10 160000 --- a/platform/mellanox/hw-management/hw-mgmt +++ b/platform/mellanox/hw-management/hw-mgmt @@ -1 +1 @@ -Subproject commit 6cf13ac6000ad7be68ef9b6b25261bbb0fd5d5a5 +Subproject commit 164c9ef66b10eb88bad20225d200c048449033cb diff --git a/platform/mellanox/mlnx-fw-upgrade.j2 b/platform/mellanox/mlnx-fw-upgrade.j2 index e4c567c1b76e..00796d54b096 100755 --- a/platform/mellanox/mlnx-fw-upgrade.j2 +++ b/platform/mellanox/mlnx-fw-upgrade.j2 @@ -36,6 +36,7 @@ declare -r VERBOSE_MIN="${VERBOSE_ERROR}" declare -r EXIT_SUCCESS="0" declare -r EXIT_FAILURE="1" declare -r FW_ALREADY_UPDATED_FAILURE="2" +declare -r FW_UPGRADE_IS_REQUIRED="10" declare -r QUERY_XML="mlxfwmanager --query-format XML" declare -r QUERY_CMD="mlxfwmanager --query" @@ -49,6 +50,7 @@ declare -r SPC1_ASIC="spc1" declare -r SPC2_ASIC="spc2" declare -r SPC3_ASIC="spc3" declare -r SPC4_ASIC="spc4" +declare -r BF3_NIC="bf3" declare -r UNKN_ASIC="unknown" declare -r UNKN_MST="unknown" @@ -57,8 +59,10 @@ declare -rA FW_FILE_MAP=( \ [$SPC2_ASIC]="fw-SPC2.mfa" \ [$SPC3_ASIC]="fw-SPC3.mfa" \ [$SPC4_ASIC]="fw-SPC4.mfa" \ + [$BF3_NIC]="fw-BF3.mfa" \ ) +DRY_RUN="${NO_PARAM}" IMAGE_UPGRADE="${NO_PARAM}" SYSLOG_LOGGER="${NO_PARAM}" VERBOSE_LEVEL="${VERBOSE_MIN}" @@ -72,6 +76,8 @@ function PrintHelp() { echo " -u, --upgrade Upgrade ASIC firmware using next boot image (useful after SONiC-To-SONiC update)" echo " -s, --syslog Use syslog logger (enabled when -u|--upgrade)" echo " -v, --verbose Verbose mode (enabled when -u|--upgrade)" + echo " -d, --dry-run Compare the FW versions without installation. Return code "0" means the FW is up-to-date, return code "10" means an upgrade is required, otherwise an error is detected." + echo " -c, --clear-semaphore Clear hw resources before updating firmware" echo " -h, --help Print help" echo echo "Examples:" @@ -95,6 +101,12 @@ function ParseArguments() { -s|--syslog) SYSLOG_LOGGER="${YES_PARAM}" ;; + -d|--dry-run) + DRY_RUN="${YES_PARAM}" + ;; + -c|--clear-semaphore) + CLEAR_SEMAPHORE="${YES_PARAM}" + ;; -h|--help) PrintHelp exit "${EXIT_SUCCESS}" @@ -179,26 +191,50 @@ function UnlockStateChange() { /usr/bin/flock -u ${LOCKFD} } +function GetMstDeviceType() { + local -r asic_type=$(GetAsicType) + + case $asic_type in + ${SPC1_ASIC}|${SPC2_ASIC}|${SPC3_ASIC}|${SPC4_ASIC}) + echo "Spectrum" + return ${EXIT_SUCCESS} + ;; + ${BF3_NIC}) + echo "BlueField3" + return ${EXIT_SUCCESS} + ;; + *) + echo "Unknown" + return ${EXIT_FAILURE} + ;; + esac +} + function WaitForDevice() { local -i QUERY_RETRY_COUNT_MAX="10" local -i QUERY_RETRY_COUNT="0" + local -r DEVICE_TYPE=$(GetMstDeviceType) + local SPC_MST_DEV + local QUERY_RC="" - local SPC_MST_DEV=$(GetSPCMstDevice) - - while [[ ("${QUERY_RETRY_COUNT}" -lt "${QUERY_RETRY_COUNT_MAX}") && ("${SPC_MST_DEV}" == "${UNKN_MST}") ]]; do + while : ; do + SPC_MST_DEV=$(GetSPCMstDevice) + ${QUERY_XML} -d ${SPC_MST_DEV} -o ${QUERY_FILE} + QUERY_RC="$?" + [[ ("${QUERY_RETRY_COUNT}" -lt "${QUERY_RETRY_COUNT_MAX}") && ("${QUERY_RC}" != "${EXIT_SUCCESS}") ]] || break sleep 1s ((QUERY_RETRY_COUNT++)) - SPC_MST_DEV=$(GetSPCMstDevice) + LogInfo "Retrying MST device query ${QUERY_RETRY_COUNT}" done - if [[ "${SPC_MST_DEV}" == "${UNKN_MST}" ]]; then + if [[ "${QUERY_RC}" != "${EXIT_SUCCESS}" ]]; then # Couldn't Detect the Spectrum ASIC. Exit failure and print the detailed information output=$(${QUERY_CMD}) failure_msg="${output#*Fail : }" ExitFailure "FW Query command: ${QUERY_CMD} failed to detect spectrum device with error: ${failure_msg}" fi - LogInfo "Spectrum ASIC successfully detected at ${SPC_MST_DEV}" + LogInfo "${DEVICE_TYPE} ASIC successfully detected at ${SPC_MST_DEV}" } function GetAsicType() { @@ -208,6 +244,7 @@ function GetAsicType() { local -r SPC2_PRODUCT_ID="cf6c" local -r SPC3_PRODUCT_ID="cf70" local -r SPC4_PRODUCT_ID="cf80" + local -r BF3_PRODUCT_ID="a2dc" if lspci -n | grep "${VENDOR_ID}:${SPC1_PRODUCT_ID}" &>/dev/null; then echo "${SPC1_ASIC}" @@ -221,6 +258,9 @@ function GetAsicType() { elif lspci -n | grep "${VENDOR_ID}:${SPC4_PRODUCT_ID}" &>/dev/null; then echo "${SPC4_ASIC}" exit "${EXIT_SUCCESS}" + elif lspci -n | grep "${VENDOR_ID}:${BF3_PRODUCT_ID}" &>/dev/null; then + echo "${BF3_NIC}" + exit "${EXIT_SUCCESS}" fi echo "${UNKN_ASIC}" @@ -228,11 +268,12 @@ function GetAsicType() { } function GetSPCMstDevice() { - local _MST_DEVICE=$(${QUERY_XML} | xmlstarlet sel -t -m "//Device[contains(@type,'Spectrum')]" -v @pciName | head -n 1) + local _DEVICE_TYPE=$(GetMstDeviceType) + local _MST_DEVICE=$(${QUERY_XML} | xmlstarlet sel -t -m "//Device[contains(@type,'${_DEVICE_TYPE}')]" -v @pciName | head -n 1) if [[ ! -c "${_MST_DEVICE}" ]]; then echo "${UNKN_MST}" - else + else echo "${_MST_DEVICE}" fi @@ -267,6 +308,8 @@ function RunCmd() { fi } +{% if sonic_asic_platform == "mellanox" %} + function RunFwUpdateCmd() { local ERROR_CODE="${EXIT_SUCCESS}" local COMMAND="${MFT_DIAGNOSIS_FLAGS} ${BURN_CMD} $@" @@ -301,6 +344,56 @@ function RunFwUpdateCmd() { fi } +function GetAvailableFwVersion() { + local -r _FW_FILE="$1" + local -r _MST_DEVICE="$2" + local -r _PSID="$3" + + RunCmd "${LIST_CONTENT_CMD} -i ${_FW_FILE} -d ${_MST_DEVICE} -o ${LIST_CONTENT_FILE}" + + local -r _FW_AVAILABLE_INFO="$(grep ${_PSID} ${LIST_CONTENT_FILE})" + local -r _FW_AVAILABLE="$(echo ${_FW_AVAILABLE_INFO} | awk '{print $4}')" + + echo ${_FW_AVAILABLE} +} + +{% elif sonic_asic_platform == "nvidia-bluefield" %} + +function RunFwUpdateCmd() { + local ERROR_CODE="${EXIT_SUCCESS}" + local -r _MST_DEVICE="$(GetSPCMstDevice)" + + # Reactivate FW prior to burning... + eval "flint -d ${_MST_DEVICE} ir" 2>&1 >/dev/null + + local COMMAND="${MFT_DIAGNOSIS_FLAGS} flint $@ burn" + + output=$(eval "${COMMAND}") + + ERROR_CODE="$?" + + if [[ "${ERROR_CODE}" != "${EXIT_SUCCESS}" ]]; then + echo "${output}" + failure_msg="${output#*Fail : }" + ExitFailure "FW Update command: ${COMMAND} failed with error: ${failure_msg}" + fi +} + +function GetAvailableFwVersion() { + local -r _FW_FILE="$1" + local -r _MST_DEVICE="$2" + local -r _PSID="$3" + + RunCmd "flint -i ${_FW_FILE} --psid ${_PSID} query 2>&1 > ${LIST_CONTENT_FILE}" + + local -r _FW_AVAILABLE_INFO="$(grep 'FW Version:' ${LIST_CONTENT_FILE})" + local -r _FW_AVAILABLE="$(echo ${_FW_AVAILABLE_INFO} | awk '{print $3}')" + + echo ${_FW_AVAILABLE} +} + +{% endif %} + function UpgradeFW() { local -r _FW_BIN_PATH="$1" @@ -323,10 +416,7 @@ function UpgradeFW() { RunCmd "${QUERY_XML} -d ${_MST_DEVICE} -o ${QUERY_FILE}" local -r _FW_CURRENT=$(GetXPathXML "//Device/Versions/FW/@current" ${QUERY_FILE}) local -r _PSID=$(GetXPathXML "//Device/@psid" ${QUERY_FILE}) - - RunCmd "${LIST_CONTENT_CMD} -i ${_FW_FILE} -d ${_MST_DEVICE} -o ${LIST_CONTENT_FILE}" - local -r _FW_AVAILABLE_INFO="$(grep ${_PSID} ${LIST_CONTENT_FILE})" - local -r _FW_AVAILABLE="$(echo ${_FW_AVAILABLE_INFO} | awk '{print $4}')" + local -r _FW_AVAILABLE="$(GetAvailableFwVersion ${_FW_FILE} ${_MST_DEVICE} ${_PSID})" if [[ -z "${_FW_CURRENT}" ]]; then ExitFailure "could not retreive current FW version" @@ -339,7 +429,13 @@ function UpgradeFW() { if [[ "${_FW_CURRENT}" == "${_FW_AVAILABLE}" ]]; then ExitSuccess "firmware is up to date" else + if [[ "${DRY_RUN}" == "${YES_PARAM}" ]]; then + LogNotice "firmware upgrade is required" + exit ${FW_UPGRADE_IS_REQUIRED} + fi + LogNotice "firmware upgrade is required. Installing compatible version..." + if [[ "${_MST_DEVICE}" = "${UNKN_MST}" ]]; then LogWarning "could not find fastest mst device, using default device" RunFwUpdateCmd "-i ${_FW_FILE}" @@ -394,6 +490,15 @@ function Cleanup() { fi } +function ClearSemaphore() { + if [[ "${CLEAR_SEMAPHORE}" == "${YES_PARAM}" ]]; then + local -r _MST_DEVICE="$(GetSPCMstDevice)" + if [[ "${_MST_DEVICE}" != "${UNKN_MST}" ]]; then + /usr/bin/flint -d $_MST_DEVICE --clear_semaphore + fi + fi +} + trap Cleanup EXIT ParseArguments "$@" @@ -404,6 +509,8 @@ LockStateChange WaitForDevice +ClearSemaphore + if [ "${IMAGE_UPGRADE}" != "${YES_PARAM}" ]; then UpgradeFW else diff --git a/platform/mellanox/mlnx-platform-api/setup.py b/platform/mellanox/mlnx-platform-api/setup.py index 31dba9d2ae00..cfa39aa2bf72 100644 --- a/platform/mellanox/mlnx-platform-api/setup.py +++ b/platform/mellanox/mlnx-platform-api/setup.py @@ -1,5 +1,5 @@ # -# Copyright (c) 2019-2021 NVIDIA CORPORATION & AFFILIATES. +# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -28,15 +28,24 @@ maintainer_email='kevinw@mellanox.com', packages=[ 'sonic_platform', - 'tests' + 'tests', + 'smart_switch.dpuctl' ], setup_requires= [ 'pytest-runner' ], + install_requires= [ + 'inotify' + ], tests_require = [ 'pytest', 'mock>=2.0.0' ], + entry_points={ + 'console_scripts': [ + 'dpuctl = smart_switch.dpuctl.main:dpuctl', + ] + }, classifiers=[ 'Development Status :: 3 - Alpha', 'Environment :: Plugins', diff --git a/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/__init__.py b/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/__init__.py new file mode 100644 index 000000000000..0a2c565b0ac3 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/__init__.py @@ -0,0 +1,18 @@ +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from smart_switch.dpuctl import * diff --git a/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/main.py b/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/main.py new file mode 100644 index 000000000000..7abcd24771cf --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/main.py @@ -0,0 +1,193 @@ +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +"""Click Implemenetation for dpuctl related commands""" +from multiprocessing import Process +from tabulate import tabulate +try: + import click + from sonic_platform.dpuctlplat import DpuCtlPlat +except ImportError as e: + raise ImportError(str(e) + '- required module not found') from e + + +def call_dpu_reset(obj, force): + """Function to call object specific Reset for each dpu""" + try: + obj.dpu_reboot(force) + except Exception as error: + print(f"An error occurred: {type(error).__name__} - {error}") + + +def call_dpu_power_on(obj, force): + """Function to call object specific power on for each dpu""" + try: + obj.dpu_power_on(force) + except Exception as error: + print(f"An error occurred: {type(error).__name__} - {error}") + + +def call_dpu_power_off(obj, force): + """Function to call object specific power off for each dpu""" + try: + obj.dpu_power_off(force) + except Exception as error: + print(f"An error occurred: {type(error).__name__} - {error}") + + +def call_dpu_status_update(obj): + """Function to call object specific status update for each dpu""" + try: + obj.dpu_status_update() + except Exception as error: + print(f"An error occurred: {type(error).__name__} - {error}") + + +def validate_return_dpus(all_dpus, dpu_names, dpuctl_list): + """Function to validate list of dpus provided by User""" + if (((not all_dpus) and (dpu_names is None)) or (all_dpus and (dpu_names is not None))): + raise AssertionError("Invalid Arguments provided!" + "Please provide either dpu_names or -all option") + + if all_dpus: + return dpuctl_list + dpu_names_l = dpu_names.split(',') + dpu_names_l = [dpu_name.strip() for dpu_name in dpu_names_l] + for provided_dpu in dpu_names_l: + if provided_dpu not in dpuctl_list: + raise AssertionError("Invalid Arguments provided!" + f"{provided_dpu} does not exist!") + return dpu_names_l + + +def execute_function_call(ctx, + all_dpus, + force, + dpu_names, + function_to_call, + verbose=None): + """Function to fork multiple child process for each DPU + and call required function""" + try: + dpuctl_dict = ctx.obj['dpuctl_dict'] + selected_dpus = validate_return_dpus(all_dpus, dpu_names, dpuctl_dict.keys()) + selected_dpus = list(set(selected_dpus)) + proc_list = [] + for dpu_name, dpu_obj in dpuctl_dict.items(): + if verbose: + dpu_obj.verbosity = True + if dpu_name in selected_dpus: + if function_to_call == "PW_ON": + proc = Process(target=call_dpu_power_on, args=(dpu_obj, force)) + elif function_to_call == "PW_OFF": + proc = Process(target=call_dpu_power_off, + args=(dpu_obj, force)) + elif function_to_call == "RST": + proc = Process(target=call_dpu_reset, args=(dpu_obj, force)) + proc_list.append(proc) + for proc in proc_list: + proc.start() + for proc in proc_list: + proc.join() + except Exception as error: + print(f"An error occurred: {type(error).__name__} - {error}") + + +@click.group() +@click.pass_context +def dpuctl(ctx=None): + """SONiC command line - 'dpuctl' Wrapper command: + Smart Switch DPU reset flow commands""" + # Hardcoded HW-mgmt names + try: + existing_dpu_list=['dpu0', 'dpu1', 'dpu2', 'dpu3'] + # dpu0 in Platform.json = dpu1 in HW-mgmt + dpuctl_dict = {} + for dpu_name in existing_dpu_list: + dpu_obj = DpuCtlPlat(dpu_name) + dpu_obj.setup_logger(use_print=True) + dpuctl_dict[dpu_name] = dpu_obj + context = { + "dpuctl_dict": dpuctl_dict, + } + ctx.obj = context + except Exception as error: + print(f"An error occurred: {type(error).__name__} - {error}") + ctx.exit() + + +@dpuctl.command(name='dpu-reset') +@click.option('--force', '-f', is_flag=True, default=False, help='Perform force Reboot - Turned off by default') +@click.option('--all', '-a', 'all_dpus', is_flag=True, default=False, help='Execute for all DPUs') +@click.argument('dpu_names', metavar='', required=False) +@click.option('--verbose', '-v', 'verbose', is_flag=True, default=False, help='Print debug messages') +@click.pass_context +def dpuctl_reset(ctx, force, all_dpus, verbose, dpu_names=None): + """Reboot individual or all DPUs""" + execute_function_call(ctx, all_dpus, force, dpu_names, "RST", verbose) + + +@dpuctl.command(name='dpu-power-on') +@click.option('--force', '-f', is_flag=True, default=False, help='Perform force power on - Turned off by default') +@click.option('--all', '-a', 'all_dpus', is_flag=True, default=False, help='Execute on all DPUs') +@click.option('--verbose', '-v', 'verbose', is_flag=True, default=False, help='Print debug messages') +@click.argument('dpu_names', metavar='', required=False) +@click.pass_context +def dpuctl_power_on(ctx, force, all_dpus, verbose, dpu_names=None): + """Power On individual or all DPUs""" + execute_function_call(ctx, all_dpus, force, dpu_names, "PW_ON", verbose) + + +@dpuctl.command(name='dpu-power-off') +@click.option('--force', '-f', is_flag=True, default=False, help='Perform force power off Turned of by default') +@click.option('--all', '-a', 'all_dpus', is_flag=True, default=False, help='Execute on all DPUs') +@click.option('--verbose', '-v', 'verbose', is_flag=True, default=False, help='Print debug messages') +@click.argument('dpu_names', metavar='', required=False) +@click.pass_context +def dpuctl_power_off(ctx, force, all_dpus, verbose, dpu_names=None): + """Power Off individual or all DPUs""" + execute_function_call(ctx, all_dpus, force, dpu_names, "PW_OFF", verbose) + + +@dpuctl.command(name='dpu-status') +@click.argument('dpu_names', metavar='', required=False) +@click.pass_context +def dpuctl_get_status(ctx, all_dpus=False, dpu_names=None): + """Obtain current status of the DPUs""" + try: + if not dpu_names: + all_dpus = True + dpuctl_dict = ctx.obj['dpuctl_dict'] + selected_dpus = validate_return_dpus(all_dpus, dpu_names, dpuctl_dict.keys()) + selected_dpus = list(set(selected_dpus)) + status_list = [] + for dpu_name, dpu_obj in dpuctl_dict.items(): + if dpu_name in selected_dpus: + call_dpu_status_update(dpu_obj) + dpu_status_list = [dpu_name, + dpu_obj.dpu_ready_indication, + dpu_obj.dpu_shtdn_ready_indication, + dpu_obj.boot_prog_indication] + status_list.append(dpu_status_list) + header = ['DPU', 'dpu ready', 'dpu shutdown ready', 'boot progress'] + click.echo(tabulate(status_list, header)) + except Exception as error: + print(f"An error occurred: {type(error).__name__} - {error}") + + +if __name__ == '__main__': + dpuctl() diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py index 1db831f586f1..cc140ac9935f 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py @@ -128,10 +128,6 @@ def __del__(self): if self.sfp_event: self.sfp_event.deinitialize() - if self._sfp_list: - if self.sfp_module.SFP.shared_sdk_handle: - self.sfp_module.deinitialize_sdk_handle(self.sfp_module.SFP.shared_sdk_handle) - @property def RJ45_port_list(self): if not self._RJ45_port_inited: @@ -475,6 +471,8 @@ def get_change_event_for_module_host_management_mode(self, timeout): if fd_type == 'hw_present': # event could be EVENT_NOT_PRESENT or EVENT_PRESENT event = sfp.EVENT_NOT_PRESENT if fd_value == 0 else sfp.EVENT_PRESENT + if fd_value == 1: + s.processing_insert_event = True s.on_event(event) elif fd_type == 'present': if str(fd_value) == sfp.SFP_STATUS_ERROR: diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py index 673e6258a09a..e0592fd58feb 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py @@ -268,6 +268,20 @@ def get_linecard_max_port_count(cls): return 0 return sfp_data.get('max_port_per_line_card', 0) + @classmethod + @utils.read_only_cache() + def get_platform_dpus_data(cls): + json_data = cls.get_platform_json_data() + return json_data.get('DPUS', None) + + @classmethod + @utils.read_only_cache() + def get_platform_json_data(cls): + from sonic_py_common import device_info + platform_path = device_info.get_path_to_platform_dir() + platform_json_path = os.path.join(platform_path, 'platform.json') + return utils.load_json_file(platform_json_path) + @classmethod def get_bios_component(cls): from .component import ComponentBIOS, ComponentBIOSSN2201 diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py b/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py new file mode 100644 index 000000000000..12281db1e789 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py @@ -0,0 +1,430 @@ +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +"""Class Implementation for per DPU functionality""" +import os.path +import time +import multiprocessing +import subprocess +from contextlib import contextmanager +from select import poll, POLLPRI, POLLIN +from enum import Enum + +try: + from .inotify_helper import InotifyHelper + from sonic_py_common.syslogger import SysLogger + from . import utils +except ImportError as e: + raise ImportError(str(e)) from e + +HW_BASE = "/var/run/hw-management/" +EVENT_BASE = os.path.join(HW_BASE, "events/") +SYSTEM_BASE = os.path.join(HW_BASE, "system/") +PCI_BASE = "/sys/bus/pci/" +PCI_DEV_BASE = os.path.join(PCI_BASE, "devices/") + +logger = SysLogger() + +WAIT_FOR_SHTDN = 120 +WAIT_FOR_DPU_READY = 180 +WAIT_FOR_PCI_DEV = 60 + + +class OperationType(Enum): + CLR = "0" + SET = "1" + +class BootProgEnum(Enum): + RST = 0 + BL2 = 1 + BL31 = 2 + UEFI = 3 + OS_START = 4 + OS_RUN = 5 + LOW_POWER = 6 + FW_UPDATE = 7 + OS_CRASH_PROG = 8 + OS_CRASH_DONE = 9 + FW_FAULT_PROG = 10 + FW_FAULT_DONE = 11 + SW_INACTIVE = 15 + +# The rshim services are in a different order as compared to the DPU names +dpu_map = { + "dpu1": {"pci_id": "0000:08:00.0", "rshim": "rshim@0"}, + "dpu2": {"pci_id": "0000:07:00.0", "rshim": "rshim@1"}, + "dpu3": {"pci_id": "0000:01:00.0", "rshim": "rshim@2"}, + "dpu4": {"pci_id": "0000:02:00.0", "rshim": "rshim@3"}, +} + + +class DpuCtlPlat(): + """Class for Per DPU API Call""" + def __init__(self, dpu_name): + self.dpu_name = dpu_name + self._name = self.get_hwmgmt_name() + self.rst_path = os.path.join(SYSTEM_BASE, + f"{self._name}_rst") + self.pwr_path = os.path.join(SYSTEM_BASE, + f"{self._name}_pwr") + self.pwr_f_path = os.path.join(SYSTEM_BASE, + f"{self._name}_pwr_force") + self.dpu_rdy_path = os.path.join(EVENT_BASE, + f"{self._name}_ready") + self.shtdn_ready_path = os.path.join(EVENT_BASE, + f"{self._name}_shtdn_ready") + self.boot_prog_path = os.path.join(HW_BASE, + f"{self._name}/system/boot_progress") + self.pci_dev_path = os.path.join(PCI_DEV_BASE, + dpu_map[self._name]["pci_id"], + "remove") + self.boot_prog_map = { + BootProgEnum.RST.value: "Reset/Boot-ROM", + BootProgEnum.BL2.value: "BL2 (from ATF image on eMMC partition)", + BootProgEnum.BL31.value: "BL31 (from ATF image on eMMC partition)", + BootProgEnum.UEFI.value: "UEFI (from UEFI image on eMMC partition)", + BootProgEnum.OS_START.value: "OS Starting", + BootProgEnum.OS_RUN.value: "OS is running", + BootProgEnum.LOW_POWER.value: "Low-Power Standby", + BootProgEnum.FW_UPDATE.value: "FW Update in progress", + BootProgEnum.OS_CRASH_PROG.value: "OS Crash Dump in progress", + BootProgEnum.OS_CRASH_DONE.value: "OS Crash Dump is complete", + BootProgEnum.FW_FAULT_PROG.value: "FW Fault Crash Dump in progress", + BootProgEnum.FW_FAULT_DONE.value: "FW Fault Crash Dump is complete", + BootProgEnum.SW_INACTIVE.value: "Software is inactive" + } + self.boot_prog_state = None + self.shtdn_state = None + self.dpu_ready_state = None + self.setup_logger() + self.verbosity = False + + def setup_logger(self, use_print=False): + if use_print: + self.logger_info = print + self.logger_error = print + self.logger_debug = print + return + self.logger_debug = logger.log_debug + self.logger_info = logger.log_info + self.logger_error = logger.log_error + + def log_debug(self, msg=None): + # Print only in verbose mode + if self.verbosity: + self.logger_debug(f"{self.dpu_name}: {msg}") + + def log_info(self, msg=None): + self.logger_info(f"{self.dpu_name}: {msg}") + + def log_error(self, msg=None): + self.logger_error(f"{self.dpu_name}: {msg}") + + def run_cmd_output(self, cmd): + try: + subprocess.check_output(cmd) + except Exception as err: + self.log_error(f"Failed to run cmd {' '.join(cmd)}") + raise err + + def dpu_pre_shutdown(self): + """Method to execute shutdown activities for the DPU""" + self.dpu_rshim_service_control("stop") + self.dpu_pci_remove() + + def dpu_post_startup(self): + """Method to execute all post startup activities for the DPU""" + self.dpu_pci_scan() + self.wait_for_pci() + self.dpu_rshim_service_control("start") + + def dpu_rshim_service_control(self, set_state): + """Start/Stop the RSHIM service for the current DPU""" + try: + cmd = ['systemctl', set_state, dpu_map[self.get_hwmgmt_name()]['rshim'] + ".service"] + self.run_cmd_output(cmd) + self.log_debug(f"Executed rshim service command: {' '.join(cmd)}") + except Exception: + self.log_error(f"Failed to start rshim!") + + @contextmanager + def get_open_fd(self, path, flag): + fd = os.open(path, flag) + try: + yield fd + finally: + os.close(fd) + + def wait_for_pci(self): + """Wait for the PCI device folder in the PCI Path, required before starting rshim""" + try: + with self.get_open_fd(PCI_DEV_BASE, os.O_RDONLY) as dir_fd: + if os.path.exists(os.path.dirname(self.pci_dev_path)): + return True + poll_obj = poll() + poll_obj.register(dir_fd, POLLIN) + start = time.time() + while (time.time() - start) < WAIT_FOR_PCI_DEV: + events = poll_obj.poll(WAIT_FOR_PCI_DEV * 1000) + if events: + if os.path.exists(os.path.dirname(self.pci_dev_path)): + return True + return os.path.exists(os.path.dirname(self.pci_dev_path)) + except Exception: + self.log_error("Unable to wait for PCI device") + + def write_file(self, file_name, content_towrite): + """Write given value to file only if file exists""" + try: + utils.write_file(file_name, content_towrite, raise_exception=True) + except Exception as e: + self.log_error(f'Failed to write {content_towrite} to file {file_name}') + raise type(e)(f"{self.dpu_name}:{str(e)}") + return True + + def get_hwmgmt_name(self): + """Return name of the DPU in the HW Management mapping""" + return f"{self.dpu_name[:3]}{str(int(self.dpu_name[3:])+1)}" + + def dpu_go_down(self): + """Per DPU going down API""" + self.write_file(self.rst_path, OperationType.CLR.value) + try: + get_shtdn_inotify = InotifyHelper(self.shtdn_ready_path) + with self.time_check_context("going down"): + dpu_shtdn_rdy = get_shtdn_inotify.wait_watch(WAIT_FOR_SHTDN, 1) + except (FileNotFoundError, PermissionError) as inotify_exc: + raise type(inotify_exc)(f"{self.dpu_name}:{str(inotify_exc)}") + if not dpu_shtdn_rdy: + self.log_error(f"Going Down Unsuccessful") + return False + return True + + def _power_off(self): + """Per DPU Power off private function""" + if not self.dpu_go_down(): + return self._power_off_force() + self.write_file(self.pwr_path, OperationType.CLR.value) + self.log_info(f"Power Off complete") + return True + + def _power_off_force(self): + """Per DPU Force Power off private function""" + self.write_file(self.rst_path, OperationType.CLR.value) + self.write_file(self.pwr_f_path, OperationType.CLR.value) + self.log_info(f"Force Power Off complete") + return True + + def _power_on_force(self, count=4): + """Per DPU Power on with force private function""" + if count < 4: + self.log_error(f"Failed Force Power on! Retry {4-count}..") + self.write_file(self.pwr_f_path, OperationType.SET.value) + self.write_file(self.rst_path, OperationType.SET.value) + get_rdy_inotify = InotifyHelper(self.dpu_rdy_path) + with self.time_check_context("power on force"): + dpu_rdy = get_rdy_inotify.wait_watch(WAIT_FOR_DPU_READY, 1) + if not dpu_rdy: + if count > 1: + time.sleep(1) + self._power_off_force() + return self._power_on_force(count=count - 1) + self.log_error(f"Failed Force power on! Exiting") + return False + self.log_info(f"Force Power on Successful!") + return True + + def _power_on(self): + """Per DPU Power on without force private function""" + self.write_file(self.pwr_path, OperationType.SET.value) + self.write_file(self.rst_path, OperationType.SET.value) + get_rdy_inotify = InotifyHelper(self.dpu_rdy_path) + with self.time_check_context("power on"): + dpu_rdy = get_rdy_inotify.wait_watch(WAIT_FOR_DPU_READY, 1) + if not dpu_rdy: + self.log_error(f"Failed power on! Trying Force Power on") + self._power_off_force() + return self._power_on_force() + self.log_info(f"Power on Successful!") + return True + + def dpu_pci_remove(self): + """Per DPU PCI remove API""" + try: + self.write_file(self.pci_dev_path, OperationType.SET.value) + except Exception: + self.log_info(f"Failed PCI Removal!") + + def dpu_pci_scan(self): + """PCI Scan API""" + pci_scan_path = "/sys/bus/pci/rescan" + self.write_file(pci_scan_path, OperationType.SET.value) + + def dpu_power_on(self, forced=False): + """Per DPU Power on API""" + with self.boot_prog_context(): + self.log_info(f"Power on with force = {forced}") + if forced: + return_value = self._power_on_force() + else: + return_value = self._power_on() + self.dpu_post_startup() + return return_value + + def dpu_power_off(self, forced=False): + """Per DPU Power off API""" + with self.boot_prog_context(): + self.dpu_pre_shutdown() + self.log_info(f"Power off with force = {forced}") + if forced: + return self._power_off_force() + elif self.read_boot_prog() != BootProgEnum.OS_RUN.value: + self.log_info(f"Power off with force = True since since OS is not in running state on DPU") + return self._power_off_force() + return self._power_off() + + def _reboot(self): + """Per DPU Reboot Private function API""" + if not self.dpu_go_down(): + self._power_off_force() + self.write_file(self.rst_path, OperationType.SET.value) + get_rdy_inotify = InotifyHelper(self.dpu_rdy_path) + with self.time_check_context("power on"): + dpu_rdy = get_rdy_inotify.wait_watch(WAIT_FOR_DPU_READY, 1) + return_value = True + if not dpu_rdy: + self._power_off_force() + return_value = self._power_on_force() + return return_value + + def _reboot_force(self): + """Per DPU Force Reboot Private function API""" + self._power_off_force() + return_value = self._power_on_force() + return return_value + + def dpu_reboot(self, forced=False): + """Per DPU Power on API""" + with self.boot_prog_context(): + self.dpu_pre_shutdown() + self.log_info(f"Reboot with force = {forced}") + if forced: + return_value = self._reboot_force() + elif self.read_boot_prog() != BootProgEnum.OS_RUN.value: + self.log_info(f"Reboot with force = True since OS is not in running state on DPU") + return_value = self._reboot_force() + else: + return_value = self._reboot() + self.dpu_post_startup() + if return_value: + self.log_info("Reboot Complete") + return return_value + + def dpu_boot_prog_update(self, read_value=None): + """Monitor and read changes to boot_progress sysfs file and map it to corresponding indication""" + try: + if read_value: + self.boot_prog_state = read_value + else: + self.boot_prog_state = self.read_boot_prog() + self.boot_prog_indication = f"{self.boot_prog_state} - {self.boot_prog_map.get(self.boot_prog_state,'N/A')}" + except Exception as e: + self.log_error(f"Could not update boot_progress of DPU") + raise e + + def dpu_ready_update(self): + """Monitor and read changes to dpu_ready sysfs file and map it to corresponding indication""" + try: + self.dpu_ready_state = utils.read_int_from_file(self.dpu_rdy_path, + raise_exception=True) + self.dpu_ready_indication = f"{False if self.dpu_ready_state == 0 else True if self.dpu_ready_state == 1 else str(self.dpu_ready_state)+' - N/A'}" + except Exception as e: + self.log_error(f"Could not update dpu_ready for DPU") + raise e + + def dpu_shtdn_ready_update(self): + """Monitor and read changes to dpu_shtdn_ready sysfs file and map it to corresponding indication""" + try: + self.dpu_shtdn_ready_state = utils.read_int_from_file(self.shtdn_ready_path, + raise_exception=True) + self.dpu_shtdn_ready_indication = f"{False if self.dpu_shtdn_ready_state == 0 else True if self.dpu_shtdn_ready_state == 1 else str(self.dpu_shtdn_ready_state)+' - N/A'}" + except Exception as e: + self.log_error(f"Could not update dpu_shtdn_ready for DPU") + raise e + + def dpu_status_update(self): + """Update status for all the three relevant sysfs files for DPU monitoring""" + try: + self.dpu_boot_prog_update() + self.dpu_ready_update() + self.dpu_shtdn_ready_update() + except Exception as e: + self.log_error(f"Could not obtain status of DPU") + raise e + + def read_boot_prog(self): + return utils.read_int_from_file(self.boot_prog_path, raise_exception=True) + + def update_boot_prog_once(self, poll_var): + """Read boot_progress and update the value once """ + poll_var.poll() + read_value = self.read_boot_prog() + if read_value != self.boot_prog_state: + self.dpu_boot_prog_update(read_value) + self.log_error(f"The boot_progress status is changed to = {self.boot_prog_indication}") + + def watch_boot_prog(self): + """Read boot_progress and update the value in an infinite loop""" + try: + self.dpu_boot_prog_update() + self.log_info(f"The initial boot_progress status is = {self.boot_prog_indication}") + file = open(self.boot_prog_path, "r") + p = poll() + p.register(file.fileno(), POLLPRI) + while True: + self.update_boot_prog_once(p) + except Exception: + self.log_error(f"Exception occured during watch_boot_progress!") + + @contextmanager + def boot_prog_context(self): + """Context manager for boot_progress update""" + if self.verbosity: + self.boot_prog_proc = None + try: + self.boot_prog_proc = multiprocessing.Process(target=self.watch_boot_prog) + self.boot_prog_proc.start() + yield + except Exception: + self.log_error(f"Exception occured during creating boot_prog_context manager!") + yield + finally: + if self.boot_prog_proc and self.boot_prog_proc.is_alive(): + self.boot_prog_proc.terminate() + self.boot_prog_proc.join() + else: + yield + + @contextmanager + def time_check_context(self, msg): + if self.verbosity: + start_time = time.time() + yield + end_time = time.time() + self.log_info(f"Total time taken = {end_time - start_time} for {msg}") + return + yield diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/inotify_helper.py b/platform/mellanox/mlnx-platform-api/sonic_platform/inotify_helper.py new file mode 100644 index 000000000000..b3ddae9052e2 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/inotify_helper.py @@ -0,0 +1,61 @@ +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +"""Helper code for Inotify Implementation for reading file until timeout""" +import os +import errno +import inotify.adapters + +try: + from sonic_py_common.syslogger import SysLogger + from . import utils +except ImportError as e: + raise ImportError(str(e) + '- required module not found') from e + +logger = SysLogger() + + +class InotifyHelper(): + """Helper Code for Inotify Implmentation""" + def __init__(self, file_path): + self.file_path = file_path + self.inotify_obj = inotify.adapters.Inotify() + if not self.inotify_obj: + logger.log_error("INOTIFY adapter error!") + raise RuntimeError("INOTIFY is not present!") + if not os.path.exists(self.file_path): + logger.log_error(f"{self.file_path} does not exist") + raise FileNotFoundError(errno.ENOENT, + os.strerror(errno.ENOENT), + self.file_path) + + def wait_watch(self, timeout, expected_value): + """Waits for changes in file until specified time and + compares written value to expected value""" + self.inotify_obj.add_watch(self.file_path, + mask=inotify.constants.IN_CLOSE_WRITE) + for event in self.inotify_obj.event_gen(timeout_s=timeout, + yield_nones=False): + read_value = utils.read_int_from_file(self.file_path, + raise_exception=True) + if read_value == expected_value: + return read_value + read_value = utils.read_int_from_file(self.file_path, + raise_exception=True) + if read_value != expected_value: + return None + return read_value diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py index 342dff2b603c..04d9679d1978 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py @@ -40,16 +40,6 @@ except ImportError as e: raise ImportError (str(e) + "- required module not found") -try: - # python_sdk_api does not support python3 for now. Daemons like thermalctld or psud - # also import this file without actually use the sdk lib. So we catch the ImportError - # and ignore it here. Meanwhile, we have to trigger xcvrd using python2 now because it - # uses the sdk lib. - from python_sdk_api.sxd_api import * - from python_sdk_api.sx_api import * -except ImportError as e: - pass - # Define the sdk constants SX_PORT_MODULE_STATUS_INITIALIZING = 0 SX_PORT_MODULE_STATUS_PLUGGED = 1 @@ -57,15 +47,6 @@ SX_PORT_MODULE_STATUS_PLUGGED_WITH_ERROR = 3 SX_PORT_MODULE_STATUS_PLUGGED_DISABLED = 4 -try: - if os.environ["PLATFORM_API_UNIT_TESTING"] == "1": - # Unable to import SDK constants under unit test - # Define them here - SX_PORT_ADMIN_STATUS_UP = True - SX_PORT_ADMIN_STATUS_DOWN = False -except KeyError: - pass - # identifier value of xSFP module which is in the first byte of the EEPROM # if the identifier value falls into SFP_TYPE_CODE_LIST the module is treated as a SFP module and parsed according to 8472 # for QSFP_TYPE_CODE_LIST the module is treated as a QSFP module and parsed according to 8436/8636 @@ -185,7 +166,7 @@ SFP_SYSFS_POWER_MODE = 'power_mode' SFP_SYSFS_POWER_MODE_POLICY = 'power_mode_policy' POWER_MODE_POLICY_HIGH = 1 -POWER_MODE_POLICY_AUTO = 2 +POWER_MODE_POLICY_LOW = 3 POWER_MODE_LOW = 1 # POWER_MODE_HIGH = 2 # not used @@ -288,38 +269,6 @@ logger = Logger() -# SDK initializing stuff, called from chassis -def initialize_sdk_handle(): - rc, sdk_handle = sx_api_open(None) - if (rc != SX_STATUS_SUCCESS): - logger.log_warning("Failed to open api handle, please check whether SDK is running.") - sdk_handle = None - - return sdk_handle - - -def deinitialize_sdk_handle(sdk_handle): - if sdk_handle is not None: - rc = sx_api_close(sdk_handle) - if (rc != SX_STATUS_SUCCESS): - logger.log_warning("Failed to close api handle.") - - return rc == SXD_STATUS_SUCCESS - else: - logger.log_warning("Sdk handle is none") - return False - -class SdkHandleContext(object): - def __init__(self): - self.sdk_handle = None - - def __enter__(self): - self.sdk_handle = initialize_sdk_handle() - return self.sdk_handle - - def __exit__(self, exc_type, exc_val, exc_tb): - deinitialize_sdk_handle(self.sdk_handle) - class NvidiaSFPCommon(SfpOptoeBase): sfp_index_to_logical_port_dict = {} sfp_index_to_logical_lock = threading.Lock() @@ -361,14 +310,6 @@ def __init__(self, sfp_index): self.index = sfp_index + 1 self.sdk_index = sfp_index - @property - def sdk_handle(self): - if not SFP.shared_sdk_handle: - SFP.shared_sdk_handle = initialize_sdk_handle() - if not SFP.shared_sdk_handle: - logger.log_error('Failed to open SDK handle') - return SFP.shared_sdk_handle - @classmethod def _get_module_info(self, sdk_index): """ @@ -476,6 +417,7 @@ def __init__(self, sfp_index, sfp_type=None, slot_id=0, linecard_port_count=0, l self.state = STATE_DOWN else: self.state = STATE_FCP_DOWN + self.processing_insert_event = False def __str__(self): return f'SFP {self.sdk_index}' @@ -619,24 +561,6 @@ def write_eeprom(self, offset, num_bytes, write_buffer): return False return True - @classmethod - def mgmt_phy_mod_pwr_attr_get(cls, power_attr_type, sdk_handle, sdk_index, slot_id): - sx_mgmt_phy_mod_pwr_attr_p = new_sx_mgmt_phy_mod_pwr_attr_t_p() - sx_mgmt_phy_mod_pwr_attr = sx_mgmt_phy_mod_pwr_attr_t() - sx_mgmt_phy_mod_pwr_attr.power_attr_type = power_attr_type - sx_mgmt_phy_mod_pwr_attr_t_p_assign(sx_mgmt_phy_mod_pwr_attr_p, sx_mgmt_phy_mod_pwr_attr) - module_id_info = sx_mgmt_module_id_info_t() - module_id_info.slot_id = slot_id - module_id_info.module_id = sdk_index - try: - rc = sx_mgmt_phy_module_pwr_attr_get(sdk_handle, module_id_info, sx_mgmt_phy_mod_pwr_attr_p) - assert SX_STATUS_SUCCESS == rc, "sx_mgmt_phy_module_pwr_attr_get failed {}".format(rc) - sx_mgmt_phy_mod_pwr_attr = sx_mgmt_phy_mod_pwr_attr_t_p_value(sx_mgmt_phy_mod_pwr_attr_p) - pwr_mode_attr = sx_mgmt_phy_mod_pwr_attr.pwr_mode_attr - return pwr_mode_attr.admin_pwr_mode_e, pwr_mode_attr.oper_pwr_mode_e - finally: - delete_sx_mgmt_phy_mod_pwr_attr_t_p(sx_mgmt_phy_mod_pwr_attr_p) - def get_lpmode(self): """ Retrieves the lpmode (low power mode) status of this SFP @@ -648,44 +572,13 @@ def get_lpmode(self): if self.is_sw_control(): api = self.get_xcvr_api() return api.get_lpmode() if api else False - elif DeviceDataManager.is_module_host_management_mode(): - file_path = SFP_SDK_MODULE_SYSFS_ROOT_TEMPLATE.format(self.sdk_index) + SFP_SYSFS_POWER_MODE - power_mode = utils.read_int_from_file(file_path) - return power_mode == POWER_MODE_LOW except Exception as e: print(e) return False - if utils.is_host(): - # To avoid performance issue, - # call class level method to avoid initialize the whole sonic platform API - get_lpmode_code = 'from sonic_platform import sfp;\n' \ - 'with sfp.SdkHandleContext() as sdk_handle:' \ - 'print(sfp.SFP._get_lpmode(sdk_handle, {}, {}))'.format(self.sdk_index, self.slot_id) - lpm_cmd = ["docker", "exec", "pmon", "python3", "-c", get_lpmode_code] - try: - output = subprocess.check_output(lpm_cmd, universal_newlines=True) - return 'True' in output - except subprocess.CalledProcessError as e: - print("Error! Unable to get LPM for {}, rc = {}, err msg: {}".format(self.sdk_index, e.returncode, e.output)) - return False - else: - return self._get_lpmode(self.sdk_handle, self.sdk_index, self.slot_id) - - @classmethod - def _get_lpmode(cls, sdk_handle, sdk_index, slot_id): - """Class level method to get low power mode. - - Args: - sdk_handle: SDK handle - sdk_index (integer): SDK port index - slot_id (integer): Slot ID - - Returns: - [boolean]: True if low power mode is on else off - """ - _, oper_pwr_mode = cls.mgmt_phy_mod_pwr_attr_get(SX_MGMT_PHY_MOD_PWR_ATTR_PWR_MODE_E, sdk_handle, sdk_index, slot_id) - return oper_pwr_mode == SX_MGMT_PHY_MOD_PWR_MODE_LOW_E + file_path = SFP_SDK_MODULE_SYSFS_ROOT_TEMPLATE.format(self.sdk_index) + SFP_SYSFS_POWER_MODE + power_mode = utils.read_int_from_file(file_path) + return power_mode == POWER_MODE_LOW def reset(self): """ @@ -708,128 +601,6 @@ def reset(self): logger.log_error(f'Failed to reset module - {e}') return False - - @classmethod - def is_nve(cls, port): - return (port & NVE_MASK) != 0 - - - @classmethod - def is_cpu(cls, port): - return (port & CPU_MASK) != 0 - - - @classmethod - def _fetch_port_status(cls, sdk_handle, log_port): - oper_state_p = new_sx_port_oper_state_t_p() - admin_state_p = new_sx_port_admin_state_t_p() - module_state_p = new_sx_port_module_state_t_p() - rc = sx_api_port_state_get(sdk_handle, log_port, oper_state_p, admin_state_p, module_state_p) - assert rc == SXD_STATUS_SUCCESS, "sx_api_port_state_get failed, rc = %d" % rc - - admin_state = sx_port_admin_state_t_p_value(admin_state_p) - oper_state = sx_port_oper_state_t_p_value(oper_state_p) - - delete_sx_port_oper_state_t_p(oper_state_p) - delete_sx_port_admin_state_t_p(admin_state_p) - delete_sx_port_module_state_t_p(module_state_p) - - return oper_state, admin_state - - - @classmethod - def is_port_admin_status_up(cls, sdk_handle, log_port): - _, admin_state = cls._fetch_port_status(sdk_handle, log_port); - return admin_state == SX_PORT_ADMIN_STATUS_UP - - - @classmethod - def set_port_admin_status_by_log_port(cls, sdk_handle, log_port, admin_status): - rc = sx_api_port_state_set(sdk_handle, log_port, admin_status) - if SX_STATUS_SUCCESS != rc: - logger.log_error("sx_api_port_state_set failed, rc = %d" % rc) - - return SX_STATUS_SUCCESS == rc - - - @classmethod - def get_logical_ports(cls, sdk_handle, sdk_index, slot_id): - # Get all the ports related to the sfp, if port admin status is up, put it to list - port_cnt_p = new_uint32_t_p() - uint32_t_p_assign(port_cnt_p, 0) - rc = sx_api_port_device_get(sdk_handle, DEVICE_ID, SWITCH_ID, None, port_cnt_p) - - assert rc == SX_STATUS_SUCCESS, "sx_api_port_device_get failed, rc = %d" % rc - port_cnt = uint32_t_p_value(port_cnt_p) - port_attributes_list = new_sx_port_attributes_t_arr(port_cnt) - - rc = sx_api_port_device_get(sdk_handle, DEVICE_ID , SWITCH_ID, port_attributes_list, port_cnt_p) - assert rc == SX_STATUS_SUCCESS, "sx_api_port_device_get failed, rc = %d" % rc - - port_cnt = uint32_t_p_value(port_cnt_p) - log_port_list = [] - for i in range(0, port_cnt): - port_attributes = sx_port_attributes_t_arr_getitem(port_attributes_list, i) - if not cls.is_nve(int(port_attributes.log_port)) \ - and not cls.is_cpu(int(port_attributes.log_port)) \ - and port_attributes.port_mapping.module_port == sdk_index \ - and port_attributes.port_mapping.slot == slot_id \ - and cls.is_port_admin_status_up(sdk_handle, port_attributes.log_port): - log_port_list.append(port_attributes.log_port) - - delete_sx_port_attributes_t_arr(port_attributes_list) - delete_uint32_t_p(port_cnt_p) - return log_port_list - - - @classmethod - def mgmt_phy_mod_pwr_attr_set(cls, sdk_handle, sdk_index, slot_id, power_attr_type, admin_pwr_mode): - result = False - sx_mgmt_phy_mod_pwr_attr = sx_mgmt_phy_mod_pwr_attr_t() - sx_mgmt_phy_mod_pwr_mode_attr = sx_mgmt_phy_mod_pwr_mode_attr_t() - sx_mgmt_phy_mod_pwr_attr.power_attr_type = power_attr_type - sx_mgmt_phy_mod_pwr_mode_attr.admin_pwr_mode_e = admin_pwr_mode - sx_mgmt_phy_mod_pwr_attr.pwr_mode_attr = sx_mgmt_phy_mod_pwr_mode_attr - sx_mgmt_phy_mod_pwr_attr_p = new_sx_mgmt_phy_mod_pwr_attr_t_p() - sx_mgmt_phy_mod_pwr_attr_t_p_assign(sx_mgmt_phy_mod_pwr_attr_p, sx_mgmt_phy_mod_pwr_attr) - module_id_info = sx_mgmt_module_id_info_t() - module_id_info.slot_id = slot_id - module_id_info.module_id = sdk_index - try: - rc = sx_mgmt_phy_module_pwr_attr_set(sdk_handle, SX_ACCESS_CMD_SET, module_id_info, sx_mgmt_phy_mod_pwr_attr_p) - if SX_STATUS_SUCCESS != rc: - logger.log_error("Error occurred when setting power mode for SFP module {}, slot {}, error code {}".format(sdk_index, slot_id, rc)) - result = False - else: - result = True - finally: - delete_sx_mgmt_phy_mod_pwr_attr_t_p(sx_mgmt_phy_mod_pwr_attr_p) - - return result - - - @classmethod - def _set_lpmode_raw(cls, sdk_handle, sdk_index, slot_id, ports, attr_type, power_mode): - result = False - # Check if the module already works in the same mode - admin_pwr_mode, oper_pwr_mode = cls.mgmt_phy_mod_pwr_attr_get(attr_type, sdk_handle, sdk_index, slot_id) - if (power_mode == SX_MGMT_PHY_MOD_PWR_MODE_LOW_E and oper_pwr_mode == SX_MGMT_PHY_MOD_PWR_MODE_LOW_E) \ - or (power_mode == SX_MGMT_PHY_MOD_PWR_MODE_AUTO_E and admin_pwr_mode == SX_MGMT_PHY_MOD_PWR_MODE_AUTO_E): - return True - try: - # Bring the port down - for port in ports: - cls.set_port_admin_status_by_log_port(sdk_handle, port, SX_PORT_ADMIN_STATUS_DOWN) - # Set the desired power mode - result = cls.mgmt_phy_mod_pwr_attr_set(sdk_handle, sdk_index, slot_id, attr_type, power_mode) - finally: - # Bring the port up - for port in ports: - cls.set_port_admin_status_by_log_port(sdk_handle, port, SX_PORT_ADMIN_STATUS_UP) - - return result - - def set_lpmode(self, lpmode): """ Sets the lpmode (low power mode) of SFP @@ -855,47 +626,16 @@ def set_lpmode(self, lpmode): # If at some point get_lpmode=desired_lpmode, it will return true. # If after timeout ends, lpmode will not be desired_lpmode, it will return false. return utils.wait_until(check_lpmode, 2, 1, api=api, lpmode=lpmode) - elif DeviceDataManager.is_module_host_management_mode(): - # FW control under CMIS host management mode. - # Currently, we don't support set LPM under this mode. - # Just return False to indicate set Fail - return False except Exception as e: print(e) return False - if utils.is_host(): - # To avoid performance issue, - # call class level method to avoid initialize the whole sonic platform API - set_lpmode_code = 'from sonic_platform import sfp;\n' \ - 'with sfp.SdkHandleContext() as sdk_handle:' \ - 'print(sfp.SFP._set_lpmode({}, sdk_handle, {}, {}))' \ - .format('True' if lpmode else 'False', self.sdk_index, self.slot_id) - lpm_cmd = ["docker", "exec", "pmon", "python3", "-c", set_lpmode_code] - - # Set LPM - try: - output = subprocess.check_output(lpm_cmd, universal_newlines=True) - return 'True' in output - except subprocess.CalledProcessError as e: - print("Error! Unable to set LPM for {}, rc = {}, err msg: {}".format(self.sdk_index, e.returncode, e.output)) - return False - else: - return self._set_lpmode(lpmode, self.sdk_handle, self.sdk_index, self.slot_id) - - - @classmethod - def _set_lpmode(cls, lpmode, sdk_handle, sdk_index, slot_id): - log_port_list = cls.get_logical_ports(sdk_handle, sdk_index, slot_id) - sdk_lpmode = SX_MGMT_PHY_MOD_PWR_MODE_LOW_E if lpmode else SX_MGMT_PHY_MOD_PWR_MODE_AUTO_E - cls._set_lpmode_raw(sdk_handle, - sdk_index, - slot_id, - log_port_list, - SX_MGMT_PHY_MOD_PWR_ATTR_PWR_MODE_E, - sdk_lpmode) - logger.log_info("{} low power mode for module {}, slot {}".format("Enabled" if lpmode else "Disabled", sdk_index, slot_id)) - return True + file_path = SFP_SDK_MODULE_SYSFS_ROOT_TEMPLATE.format(self.sdk_index) + SFP_SYSFS_POWER_MODE_POLICY + target_admin_mode = POWER_MODE_POLICY_LOW if lpmode else POWER_MODE_POLICY_HIGH + current_admin_mode = utils.read_int_from_file(file_path) + if current_admin_mode == target_admin_mode: + return True + return utils.write_file(file_path, str(target_admin_mode)) def is_replaceable(self): """ @@ -1504,7 +1244,12 @@ def action_on_start(cls, sfp): sfp.set_hw_reset(1) sfp.on_event(EVENT_RESET) else: - sfp.on_event(EVENT_POWER_ON) + if not sfp.processing_insert_event: + sfp.on_event(EVENT_POWER_ON) + else: + sfp.processing_insert_event = False + logger.log_info(f'SFP {sfp.sdk_index} is processing insert event and needs to wait module ready') + sfp.on_event(EVENT_RESET) @classmethod def action_fcp_on_start(cls, sfp): diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/wait_sfp_ready_task.py b/platform/mellanox/mlnx-platform-api/sonic_platform/wait_sfp_ready_task.py index 56b1f479fd44..4aa893773d29 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/wait_sfp_ready_task.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/wait_sfp_ready_task.py @@ -62,8 +62,8 @@ def schedule_wait(self, sfp_index): """ logger.log_debug(f'SFP {sfp_index} is scheduled for waiting reset done') with self.lock: - if len(self._wait_dict) == 0: - is_empty = True + is_empty = len(self._wait_dict) == 0 + # The item will be expired in 3 seconds self._wait_dict[sfp_index] = time.time() + self.WAIT_TIME diff --git a/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/dpuctl_test_inputs.py b/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/dpuctl_test_inputs.py new file mode 100644 index 000000000000..ad71d26c9172 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/dpuctl_test_inputs.py @@ -0,0 +1,143 @@ +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +"""Input Data for dpuctl tests""" +testData = { + 'PW_OFF': {'AssertionError': + {'arg_list': [['dpu5'], + ['dpu1', '--all'], + ['dpu1,dpu2,dpu3,dpu5'], + ['dpu5', '--all'], + ['dpu5', '--all', '--force'], + ]}, + 'Returncheck': + {'arg_list': [['dpu1'], + ['dpu1, dpu2,dpu3', '--force'], + ['--all', '--force'], + ['dpu4', '--path'], + ['--all', '--test'], + ], + 'rc': [0, 0, 0, 2, 2], + 'return_message': ["", + "", + "", + "Usage: dpu-power-off [OPTIONS]" + " \n" + "Try 'dpu-power-off --help' for" + " help.\n\nError: " + "No such option: --path\n", + "Usage: dpu-power-off [OPTIONS] " + "\n" + "Try 'dpu-power-off --help' for" + " help.\n\n" + "Error: No such option: --test\n"], + } + }, + 'PW_ON': {'AssertionError': + {'arg_list': [['dpu5'], + ['dpu1', '--all'], + ['dpu1,dpu2,dpu3,dpu5'], + ['dpu5', '--all'], + ['dpu5', '--all', '--force'], + ]}, + 'Returncheck': + {'arg_list': [['dpu1'], + ['dpu1,dpu2,dpu3', '--force'], + ['--all'], + ['--all', '--force'], + ['dpu4', '--path'], + ['--all', '--test'], + ], + 'rc': [0, 0, 0, 0, 2, 2], + 'return_message': ["", + "", + "", + "", + "Usage: dpu-power-on [OPTIONS]" + " \n" + "Try 'dpu-power-on --help'" + " for help.\n\nError: " + "No such option: --path\n", + "Usage: dpu-power-on [OPTIONS]" + " \n" + "Try 'dpu-power-on --help'" + " for help.\n\nError: " + "No such option: --test\n"], + } + }, + 'RST': {'AssertionError': + {'arg_list': [['dpu5'], + ['dpu1', '--all'], + ['dpu1,dpu2,dpu3,dpu5'], + ['dpu5', '--all'], + ['dpu1,dpu5', '--all'], + ]}, + 'Returncheck': + {'arg_list': [['dpu1'], + ['dpu1,dpu2,dpu3', '--force'], + ['--all'], + ['--all', '--test'], + ['dpu1,dpu2,dpu3'], + ['--all', '--test'], + ], + 'rc': [0, 0, 0, 2, 0, 2], + 'return_message': ["", + "", + "", + "Usage: dpu-reset [OPTIONS]" + " \n" + "Try 'dpu-reset --help' for help." + "\n\nError: " + "No such option: --test\n", + "", + "Usage: dpu-reset [OPTIONS]" + " \n" + "Try 'dpu-reset --help' for help." + "\n\nError: " + "No such option: --test\n"], + } + }, +} + +status_output = ["""DPU dpu ready dpu shutdown ready boot progress +----- ----------- -------------------- ----------------- +dpu0 True False 5 - OS is running +dpu1 True False 5 - OS is running +dpu2 True False 5 - OS is running +dpu3 True False 5 - OS is running +""", + """DPU dpu ready dpu shutdown ready boot progress +----- ----------- -------------------- ----------------- +dpu1 True False 5 - OS is running +""", + """DPU dpu ready dpu shutdown ready boot progress +----- ----------- -------------------- ----------------- +dpu0 True False 5 - OS is running +""", + """An error occurred: AssertionError - Invalid Arguments provided!dpu5 does not exist! +""", + """An error occurred: AssertionError - Invalid Arguments provided!dpu10 does not exist! +""", + """DPU dpu ready dpu shutdown ready boot progress +----- ----------- -------------------- ------------------ +dpu0 False True 0 - Reset/Boot-ROM +dpu1 False True 0 - Reset/Boot-ROM +dpu2 False True 0 - Reset/Boot-ROM +dpu3 False True 0 - Reset/Boot-ROM +""", + ["dpu1", "True", "False"], + ] diff --git a/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/platform.json b/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/platform.json new file mode 100644 index 000000000000..7af93ee06931 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/platform.json @@ -0,0 +1,16 @@ +{ + "DPUS": { + "dpu0": { + "midplane_interface": "dpu0" + }, + "dpu1": { + "midplane_interface": "dpu1" + }, + "dpu2": { + "midplane_interface": "dpu2" + }, + "dpu3": { + "midplane_interface": "dpu3" + } + } +} \ No newline at end of file diff --git a/platform/mellanox/mlnx-platform-api/tests/test_change_event.py b/platform/mellanox/mlnx-platform-api/tests/test_change_event.py index 0d3429c483de..70652dc74591 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_change_event.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_change_event.py @@ -83,7 +83,8 @@ def test_get_change_event_legacy(self, mock_status, mock_time, mock_create_poll, _, change_event = c.get_change_event(timeout) assert 'sfp' in change_event and sfp_index in change_event['sfp'] and change_event['sfp'][sfp_index] == '2' assert 'sfp_error' in change_event and sfp_index in change_event['sfp_error'] and change_event['sfp_error'][sfp_index] == 'some error' - + + @mock.patch('sonic_platform.wait_sfp_ready_task.WaitSfpReadyTask.get_ready_set') @mock.patch('sonic_platform.sfp.SFP.get_fd') @mock.patch('select.poll') @mock.patch('time.time') @@ -91,7 +92,7 @@ def test_get_change_event_legacy(self, mock_status, mock_time, mock_create_poll, @mock.patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', mock.MagicMock(return_value=1)) @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[])) @mock.patch('sonic_platform.module_host_mgmt_initializer.ModuleHostMgmtInitializer.initialize', mock.MagicMock()) - def test_get_change_event_for_module_host_management_mode(self, mock_time, mock_create_poll, mock_get_fd): + def test_get_change_event_for_module_host_management_mode(self, mock_time, mock_create_poll, mock_get_fd, mock_ready): """Test steps: 1. Simulate polling with no event 2. Simulate polling the first dummy event. (SDK always return a event when first polling the fd even if there is no change) @@ -163,6 +164,7 @@ def get_fd(fd_type): s.determine_control_type = mock.MagicMock(return_value=sfp.SFP_FW_CONTROL) s.set_control_type = mock.MagicMock() mock_time.side_effect = [0, timeout] + mock_ready.return_value = set([0]) mock_hw_present_file.read.return_value = sfp.SFP_STATUS_INSERTED _, change_event = c.get_change_event(timeout) assert 'sfp' in change_event and sfp_index in change_event['sfp'] and change_event['sfp'][sfp_index] == sfp.SFP_STATUS_INSERTED @@ -173,6 +175,7 @@ def get_fd(fd_type): print(c.registered_fds) # error event, expect returning error + mock_ready.return_value = [] mock_time.side_effect = [0, timeout] mock_poll.poll.return_value = [(3, 10)] mock_present_file.read.return_value = sfp.SFP_STATUS_ERROR @@ -193,6 +196,7 @@ def get_fd(fd_type): # plug in a software control cable, expect returning insert event mock_time.side_effect = [0, timeout] + mock_ready.return_value = set([0]) mock_poll.poll.return_value = [(1, 10)] mock_hw_present_file.read.return_value = sfp.SFP_STATUS_INSERTED s.determine_control_type.return_value = sfp.SFP_SW_CONTROL diff --git a/platform/mellanox/mlnx-platform-api/tests/test_dpuctl.py b/platform/mellanox/mlnx-platform-api/tests/test_dpuctl.py new file mode 100644 index 000000000000..7f6d2be7892b --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/tests/test_dpuctl.py @@ -0,0 +1,161 @@ +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +"""dpuctl Tests Implementation""" +import os +import sys +import json +from tabulate import tabulate + +from click.testing import CliRunner +from smart_switch.dpuctl.main import dpuctl, dpuctl_get_status, dpuctl_power_off, dpuctl_power_on, dpuctl_reset +from sonic_platform.dpuctlplat import DpuCtlPlat +from tests.dpuctl_inputs.dpuctl_test_inputs import testData, status_output + +if sys.version_info.major == 3: + from unittest.mock import MagicMock, patch + + +test_path = os.path.dirname(os.path.abspath(__file__)) +modules_path = os.path.dirname(test_path) +sys.path.insert(0, modules_path) +scripts_path = os.path.join(modules_path, "scripts") +test_ip = os.path.join(modules_path, "tests") +example_platform = os.path.join(str(test_ip), "dpuctl_inputs", "platform.json") + + +def create_dpu_list(): + """Create dpu object list for Function calls""" + existing_dpu_list = ['dpu0', 'dpu1', 'dpu2', 'dpu3'] + dpuctl_dict = {} + for dpu_name in existing_dpu_list: + dpuctl_dict[dpu_name] = DpuCtlPlat(dpu_name) + context = { + "dpuctl_dict": dpuctl_dict, + } + return context + + +obj = create_dpu_list() + + +def dpuctl_command_exec(exec_cmd, command_name): + """General Command Execution and return value + validation function for all the APIs""" + test_data_checks = testData[command_name] + runner = CliRunner() + assertion_checks = test_data_checks['AssertionError'] + for args in assertion_checks['arg_list']: + result = runner.invoke(exec_cmd, args, catch_exceptions=False, obj=obj) + assert "AssertionError" in result.output + + result_checks = test_data_checks['Returncheck'] + for index_value in range(len(result_checks['arg_list'])): + print(index_value) + args = result_checks['arg_list'][index_value] + return_code = result_checks['rc'][index_value] + return_message = result_checks['return_message'][index_value] + return_message = return_message.replace('"', "'").lower() + result = runner.invoke(exec_cmd, args, catch_exceptions=False, obj=obj) + assert result.exit_code == return_code + assert return_message == result.output.replace('"', "'").lower() + + +class Testdpuctl: + """Tests for dpuctl Platform API Wrapper""" + @classmethod + def setup_class(cls): + """Setup function for all tests for dpuctl implementation""" + os.environ["PATH"] += os.pathsep + scripts_path + os.environ["MLNX_PLATFORM_API_DPUCTL_UNIT_TESTING"] = "2" + + @patch('multiprocessing.Process.start', MagicMock(return_value=True)) + @patch('multiprocessing.Process.join', MagicMock(return_value=True)) + def test_dpuctl_power_off(self): + """Tests for dpuctl click Implementation for Power Off API""" + exec_cmd = dpuctl_power_off + dpuctl_command_exec(exec_cmd, "PW_OFF") + + @patch('multiprocessing.Process.start', MagicMock(return_value=True)) + @patch('multiprocessing.Process.join', MagicMock(return_value=True)) + def test_dpuctl_power_on(self): + """Tests for dpuctl click Implementation for Power On API""" + exec_cmd = dpuctl_power_on + dpuctl_command_exec(exec_cmd, "PW_ON") + + @patch('multiprocessing.Process.start', MagicMock(return_value=True)) + @patch('multiprocessing.Process.join', MagicMock(return_value=True)) + def test_dpuctl_reset(self): + """Tests for dpuctl click Implementation for Reset API""" + exec_cmd = dpuctl_reset + dpuctl_command_exec(exec_cmd, "RST") + + def test_dpuctl_status(self): + """Tests for dpuctl click Implementation for Status API""" + mock_file_list = ['shtdn_ready', '_ready', 'boot_progress'] + mock_return_value = [0, 1, 5] + + def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_func=None): + for index, value in enumerate(mock_file_list): + if file_path.endswith(value): + return mock_return_value[index] + return 0 + + with patch("sonic_platform.utils.read_int_from_file", wraps=mock_read_int_from_file): + cmd = dpuctl_get_status + runner = CliRunner() + result = runner.invoke(cmd, catch_exceptions=False, obj=obj) + assert result.output == status_output[0] + result = runner.invoke(cmd, ['dpu1'], catch_exceptions=False, obj=obj) + assert result.output == status_output[1] + result = runner.invoke(cmd, ['dpu0'], catch_exceptions=False, obj=obj) + assert result.output == status_output[2] + result = runner.invoke(cmd, ['dpu5'], catch_exceptions=False, obj=obj) + assert result.output == status_output[3] + result = runner.invoke(cmd, ['dpu10'], catch_exceptions=False, obj=obj) + assert result.output == status_output[4] + mock_return_value = [1, 0, 0] + result = runner.invoke(cmd, catch_exceptions=False, obj=obj) + assert result.output == status_output[5] + header = ["DPU", "dpu ready", "dpu shutdown ready", "boot progress"] + boot_prog_map = { + 0: "Reset/Boot-ROM", + 1: "BL2 (from ATF image on eMMC partition)", + 2: "BL31 (from ATF image on eMMC partition)", + 3: "UEFI (from UEFI image on eMMC partition)", + 4: "OS Starting", + 5: "OS is running", + 6: "Low-Power Standby", + 7: "FW Update in progress", + 8: "OS Crash Dump in progress", + 9: "OS Crash Dump is complete", + 10: "FW Fault Crash Dump in progress", + 11: "FW Fault Crash Dump is complete", + 15: "Software is inactive" + } + for key in boot_prog_map.keys(): + mock_return_value = [0, 1, key] + result = runner.invoke(cmd, ['dpu1'], catch_exceptions=False, obj=obj) + expected_value = f"{key} - {boot_prog_map.get(key)}" + expected_data = [[status_output[6][0], status_output[6][1], status_output[6][2], expected_value]] + expected_res = tabulate(expected_data, header) + assert result.output == expected_res + "\n" + mock_return_value = [5, 5, 25] + expected_data = [["dpu1", "5 - N/A", "5 - N/A", "25 - N/A"]] + result = runner.invoke(cmd, ['dpu1'], catch_exceptions=False, obj=obj) + expected_res = tabulate(expected_data, header) + assert result.output == expected_res + "\n" diff --git a/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py b/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py new file mode 100644 index 000000000000..7340a0041953 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py @@ -0,0 +1,478 @@ +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +"""dpuctlplat Tests Implementation""" +import os +import sys +import pytest +from sonic_platform.dpuctlplat import DpuCtlPlat, dpu_map, BootProgEnum + +from unittest.mock import MagicMock, patch, Mock, call + +test_path = os.path.dirname(os.path.abspath(__file__)) +modules_path = os.path.dirname(test_path) +sys.path.insert(0, modules_path) +scripts_path = os.path.join(modules_path, "scripts") + + +def create_dpu_list(): + """Create dpu object list for Function calls""" + existing_dpu_list = ['dpu0', 'dpu1', 'dpu2', 'dpu3'] + dpuctl_list = [] + for dpu_name in existing_dpu_list: + dpuctl_obj = DpuCtlPlat(dpu_name) + dpuctl_obj.setup_logger(True) + dpuctl_list.append(dpuctl_obj) + context = { + "dpuctl_list": dpuctl_list, + } + return context + + +obj = create_dpu_list() + + +class TestDpuClass: + """Tests for dpuctl Platform API Wrapper""" + @classmethod + def setup_class(cls): + """Setup function for all tests for dpuctl implementation""" + os.environ["PATH"] += os.pathsep + scripts_path + os.environ["MLNX_PLATFORM_API_DPUCTL_UNIT_TESTING"] = "2" + + @patch('os.path.exists', MagicMock(return_value=True)) + @patch('multiprocessing.Process.start', MagicMock(return_value=True)) + @patch('multiprocessing.Process.is_alive', MagicMock(return_value=False)) + @patch('sonic_platform.inotify_helper.InotifyHelper.wait_watch') + @patch('sonic_platform.inotify_helper.InotifyHelper.__init__') + @patch('subprocess.check_output', MagicMock(return_value=True)) + def test_power_off(self, mock_inotify, mock_add_watch): + """Tests for Per DPU Power Off function""" + dpuctl_obj = obj["dpuctl_list"][0] + mock_inotify.return_value = None + mock_add_watch.return_value = True + written_data = [] + + def mock_write_file(file_name, content_towrite): + written_data.append({"file": file_name, + "data": content_towrite}) + return True + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)): + assert dpuctl_obj.dpu_power_off(True) + assert written_data[0]["file"].endswith( + f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert "1" == written_data[0]["data"] + assert "0" == written_data[1]["data"] + assert written_data[1]["file"].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[2]["data"] + assert written_data[2]["file"].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + written_data = [] + assert dpuctl_obj.dpu_power_off(False) + assert mock_inotify.call_args.args[0].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_shtdn_ready") + assert written_data[0]["file"].endswith( + f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[1]["data"] + assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr") + assert "0" == written_data[2]["data"] + written_data = [] + mock_add_watch.return_value = None + assert dpuctl_obj.dpu_power_off(False) + assert mock_inotify.call_args.args[0].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_shtdn_ready") + assert written_data[0]["file"].endswith( + f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[1]["data"] + assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[2]["data"] + assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "0" == written_data[3]["data"] + # Test whether value of boot_progress changes power off to force_power_off + with patch.object(dpuctl_obj, 'read_boot_prog') as mock_boot_prog, \ + patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch.object(dpuctl_obj, '_power_off_force') as mock_power_off_force, \ + patch.object(dpuctl_obj, '_power_off') as mock_power_off, \ + patch.object(dpuctl_obj, 'log_info') as mock_obj: + mock_boot_prog.return_value = BootProgEnum.RST.value + mock_add_watch.return_value = True + assert dpuctl_obj.dpu_power_off(False) + assert mock_obj.call_args_list[1].args[0] == "Power off with force = True since since OS is not in running state on DPU" + mock_power_off_force.assert_called_once() + mock_power_off.assert_not_called() + mock_boot_prog.return_value = BootProgEnum.OS_RUN.value + mock_power_off_force.reset_mock() + mock_power_off.reset_mock() + assert dpuctl_obj.dpu_power_off(False) + mock_power_off_force.assert_not_called() + mock_power_off.assert_called_once() + + + @patch('os.path.exists', MagicMock(return_value=True)) + @patch('multiprocessing.Process.start', MagicMock(return_value=True)) + @patch('multiprocessing.Process.is_alive', MagicMock(return_value=False)) + @patch('sonic_platform.inotify_helper.InotifyHelper.wait_watch') + @patch('sonic_platform.inotify_helper.InotifyHelper.__init__') + @patch('subprocess.check_output', MagicMock(return_value=True)) + def test_power_on(self, mock_inotify, mock_add_watch): + """Tests for Per DPU Power On function""" + dpuctl_obj = obj["dpuctl_list"][0] + mock_inotify.return_value = None + mock_add_watch.return_value = True + written_data = [] + + def mock_write_file(file_name, content_towrite): + written_data.append({"file": file_name, + "data": content_towrite}) + return True + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch.object(dpuctl_obj, 'wait_for_pci', wraps=MagicMock(return_value=None)), \ + patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)): + assert dpuctl_obj.dpu_power_on(True) + assert mock_inotify.call_args.args[0].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_ready") + assert written_data[0]["file"].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[1]["data"] + written_data = [] + assert dpuctl_obj.dpu_power_on(False) + assert written_data[0]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[1]["data"] + assert written_data[2]["file"].endswith(f"rescan") + assert "1" == written_data[2]["data"] + written_data = [] + mock_add_watch.return_value = None + assert not dpuctl_obj.dpu_power_on(False) + assert len(written_data) == 19 + assert written_data[0]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[1]["data"] + for i in range(4): + assert written_data[2 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[2 + 4 * i]["data"] + assert written_data[3 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "0" == written_data[3 + 4 * i]["data"] + assert written_data[4 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "1" == written_data[4 + 4 * i]["data"] + assert written_data[5 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[5 + 4 * i]["data"] + assert written_data[18]["file"].endswith(f"rescan") + assert "1" == written_data[18]["data"] + + @patch('os.path.exists', MagicMock(return_value=True)) + @patch('multiprocessing.Process.start', MagicMock(return_value=True)) + @patch('multiprocessing.Process.is_alive', MagicMock(return_value=False)) + @patch('sonic_platform.inotify_helper.InotifyHelper.wait_watch') + @patch('sonic_platform.inotify_helper.InotifyHelper.__init__') + def test_dpu_reset(self, mock_inotify, mock_add_watch): + """Tests for Per DPU Reset function""" + dpuctl_obj = obj["dpuctl_list"][0] + mock_inotify.return_value = None + mock_add_watch.return_value = True + written_data = [] + + def mock_write_file(file_name, content_towrite): + written_data.append({"file": file_name, + "data": content_towrite}) + return True + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)), \ + patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)): + dpuctl_obj.write_file = mock_write_file + assert dpuctl_obj.dpu_reboot(False) + assert len(written_data) == 4 + assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[1]["data"] + assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[2]["data"] + assert written_data[3]["file"].endswith(f"rescan") + assert "1" == written_data[3]["data"] + assert mock_inotify.call_args.args[0].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_ready") + mock_add_watch.return_value = None + written_data = [] + assert not dpuctl_obj.dpu_reboot() + assert len(written_data) == 22 + assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[1]["data"] + assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[2]["data"] + assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "0" == written_data[3]["data"] + assert written_data[4]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[4]["data"] + for i in range(4): + assert written_data[5 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[5 + 4 * i]["data"] + assert written_data[6 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "0" == written_data[6 + 4 * i]["data"] + assert written_data[7 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "1" == written_data[7 + 4 * i]["data"] + assert written_data[8 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[8 + 4 * i]["data"] + assert written_data[21]["file"].endswith(f"rescan") + assert "1" == written_data[21]["data"] + # Force Reboot + mock_inotify.reset_mock() + mock_add_watch.return_value = True + mock_inotify.return_value = None + written_data=[] + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)), \ + patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)): + dpuctl_obj.write_file = mock_write_file + assert dpuctl_obj.dpu_reboot(True) + mock_add_watch.return_value = None + assert len(written_data) == 6 + assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[1]["data"] + assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "0" == written_data[2]["data"] + assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "1" == written_data[3]["data"] + assert written_data[4]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[4]["data"] + assert written_data[5]["file"].endswith(f"rescan") + assert "1" == written_data[5]["data"] + assert mock_inotify.call_args.args[0].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_ready") + mock_add_watch.return_value = None + written_data = [] + assert not dpuctl_obj.dpu_reboot(True) + assert len(written_data) == 18 + assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[1]["data"] + assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "0" == written_data[2]["data"] + assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "1" == written_data[3]["data"] + assert written_data[4]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[4]["data"] + for i in range(3): + assert written_data[5 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[5 + 4 * i]["data"] + assert written_data[6 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "0" == written_data[6 + 4 * i]["data"] + assert written_data[7 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "1" == written_data[7 + 4 * i]["data"] + assert written_data[8 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[8 + 4 * i]["data"] + assert written_data[17]["file"].endswith(f"rescan") + assert "1" == written_data[17]["data"] + # Test whether value of boot_progress changes power off to force_power_off + with patch.object(dpuctl_obj, 'read_boot_prog') as mock_boot_prog, \ + patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch.object(dpuctl_obj, '_reboot') as mock_reset, \ + patch.object(dpuctl_obj, '_reboot_force') as mock_reset_force, \ + patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)), \ + patch.object(dpuctl_obj, 'log_info') as mock_obj: + mock_boot_prog.return_value = BootProgEnum.RST.value + mock_add_watch.return_value = True + assert dpuctl_obj.dpu_reboot(False) + assert mock_obj.call_args_list[1].args[0] == "Reboot with force = True since OS is not in running state on DPU" + mock_reset_force.assert_called_once() + mock_reset.assert_not_called() + mock_boot_prog.return_value = 5 + mock_reset_force.reset_mock() + mock_reset.reset_mock() + assert dpuctl_obj.dpu_reboot(False) + mock_reset_force.assert_not_called() + mock_reset.assert_called_once() + + def test_prog_update(self): + dpuctl_obj = obj["dpuctl_list"][0] + dpuctl_obj.boot_prog_path = os.path.join(test_path, 'mock_dpu_boot_prog') + + class Dummy: + def poll(self): + return True + dummy_obj = Dummy() + mock_file_path = "mock_dpu_boot_prog" + mock_val = 0 + boot_prog_map = dpuctl_obj.boot_prog_map + + def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_func=None): + if file_path.endswith(mock_file_path): + return mock_val + else: + return 0 + with patch("sonic_platform.utils.read_int_from_file", wraps=mock_read_int_from_file), \ + patch.object(dpuctl_obj, 'wait_for_pci', wraps=MagicMock(return_value=None)), \ + patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)): + for key_val in boot_prog_map.keys(): + mock_val = key_val + dpuctl_obj.update_boot_prog_once(dummy_obj) + assert dpuctl_obj.boot_prog_state == key_val + assert dpuctl_obj.boot_prog_indication == f"{key_val} - {boot_prog_map.get(key_val)}" + mock_val = 25 + dpuctl_obj.update_boot_prog_once(dummy_obj) + assert dpuctl_obj.boot_prog_state == 25 + assert dpuctl_obj.boot_prog_indication == "25 - N/A" + mock_val = 36 + dpuctl_obj.update_boot_prog_once(dummy_obj) + assert dpuctl_obj.boot_prog_state == 36 + assert dpuctl_obj.boot_prog_indication == "36 - N/A" + mock_file_path = "dpu1_ready" + mock_val = 1 + dpuctl_obj.dpu_status_update() + assert dpuctl_obj.boot_prog_state == 0 + assert dpuctl_obj.boot_prog_indication == f"0 - {boot_prog_map.get(0)}" + assert dpuctl_obj.dpu_ready_state == 1 + assert dpuctl_obj.dpu_ready_indication == f"True" + assert dpuctl_obj.dpu_shtdn_ready_state == 0 + assert dpuctl_obj.dpu_shtdn_ready_indication == f"False" + mock_file_path = "dpu1_shtdn_ready" + dpuctl_obj.dpu_status_update() + assert dpuctl_obj.boot_prog_state == 0 + assert dpuctl_obj.boot_prog_indication == f"0 - {boot_prog_map.get(0)}" + assert dpuctl_obj.dpu_ready_state == 0 + assert dpuctl_obj.dpu_ready_indication == "False" + assert dpuctl_obj.dpu_shtdn_ready_state == 1 + assert dpuctl_obj.dpu_shtdn_ready_indication == "True" + mock_file_path = "dpu1_shtdn_ready" + mock_val = 25 + dpuctl_obj.dpu_status_update() + assert dpuctl_obj.dpu_shtdn_ready_indication == "25 - N/A" + mock_file_path = "dpu1_ready" + mock_val = 50 + dpuctl_obj.dpu_status_update() + assert dpuctl_obj.dpu_ready_indication == "50 - N/A" + + @patch('os.path.exists') + @patch('os.open', MagicMock(return_value=-1)) + @patch('os.close', MagicMock(return_value=None)) + @patch('sonic_platform.dpuctlplat.poll') + def test_pci_func(self, m1, mock_exists): + dpuctl_obj = obj["dpuctl_list"][0] + mock_exists.return_value = False + mock_obj = Mock() + mock_obj.register.return_value = None + mock_obj.poll.return_value = None + m1.return_value = mock_obj + timeout_val = 45 + + def mock_time_diff(): + mock_time_diff.counter += 1 + return mock_time_diff.counter * timeout_val + mock_time_diff.counter = 0 + with patch("time.time", wraps=mock_time_diff): + # PCI Device is not recognized + assert not dpuctl_obj.wait_for_pci() + assert f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}" in mock_exists.call_args.args[0] + mock_obj.register.assert_called_once() + mock_obj.poll.assert_called_once() + # PCI device is recognized immediately + mock_obj.reset_mock() + mock_exists.reset_mock() + mock_exists.return_value = True + assert dpuctl_obj.wait_for_pci() + assert f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}" in mock_exists.call_args.args[0] + mock_obj.register.assert_not_called() + mock_obj.poll.assert_not_called() + # PCI device is added later (Detected in Loop) + timeout_val = 20 + mock_exists.reset_mock() + mock_obj.reset_mock() + mock_exists.side_effect = [False, True] + mock_obj.poll.return_value = True + assert dpuctl_obj.wait_for_pci() + mock_obj.register.assert_called_once() + mock_obj.poll.assert_called_once() + # PCI device is added later (Detected at the end) + timeout_val = 80 + mock_exists.reset_mock() + mock_obj.reset_mock() + mock_exists.side_effect = [False, True] + assert dpuctl_obj.wait_for_pci() + mock_obj.register.assert_called_once() + mock_obj.poll.assert_not_called() + with patch.object(dpuctl_obj, '_name', "dpua"), patch.object(dpuctl_obj, 'log_error') as mock_obj: + dpuctl_obj.wait_for_pci() + mock_obj.assert_called_once_with("Unable to wait for PCI device") + + def test_rshim_service(self): + dpuctl_obj = obj["dpuctl_list"][0] + with patch.object(dpuctl_obj, 'run_cmd_output') as mock_method: + dpuctl_obj.dpu_rshim_service_control('start') + mock_method.assert_called_once() + cmd_string = ' '.join(mock_method.call_args.args[0]) + cmd_string == f"systemctl start {dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('rshim')}.service" + mock_method.reset_mock() + dpuctl_obj.dpu_rshim_service_control('stop') + cmd_string == f"systemctl stop {dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('rshim')}.service" + mock_method.assert_called_once() + with pytest.raises(TypeError): + dpuctl_obj.dpu_rshim_service_control() + with patch.object(dpuctl_obj, 'get_hwmgmt_name', return_value="dpu5"), patch.object(dpuctl_obj, 'log_error') as mock_obj: + dpuctl_obj.dpu_rshim_service_control('start') + mock_obj.assert_called_once_with("Failed to start rshim!") + + def test_pre_and_post(self): + dpuctl_obj = obj["dpuctl_list"][0] + with patch.object(dpuctl_obj, 'dpu_rshim_service_control') as mock_rshim, patch.object(dpuctl_obj, 'write_file') as mock_write: + manager_mock = Mock() + manager_mock.attach_mock(mock_rshim, 'rshim') + manager_mock.attach_mock(mock_write, 'write') + dpuctl_obj.dpu_pre_shutdown() + mock_rshim.assert_called_once() + mock_write.assert_called_once() + # Confirm the order of calls and the parameters + manager_mock.mock_calls[0] == call.rshim('stop') + manager_mock.mock_calls[1] == call.rshim(dpuctl_obj.pci_dev_path, '1') + # Test post startup + mock_rshim.reset_mock() + mock_write.reset_mock() + manager_mock.reset_mock() + with patch.object(dpuctl_obj, 'wait_for_pci') as mock_pci: + manager_mock.attach_mock(mock_rshim, 'rshim') + manager_mock.attach_mock(mock_write, 'write') + manager_mock.attach_mock(mock_pci, 'pci') + dpuctl_obj.dpu_post_startup() + mock_rshim.assert_called_once() + mock_write.assert_called_once() + mock_pci.assert_called_once() + # Confirm the order of calls and the parameters + manager_mock.mock_calls[0] == call.rshim('/sys/bus/pci/rescan', '1') + manager_mock.mock_calls[1] == call.pci() + manager_mock.mock_calls[2] == call.rshim('start') + + @classmethod + def teardown_class(cls): + """Teardown function for all tests for dpuctl implementation""" + os.environ["MLNX_PLATFORM_API_DPUCTL_UNIT_TESTING"] = "0" + os.environ["PATH"] = os.pathsep.join( + os.environ["PATH"].split(os.pathsep)[:-1]) diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py index 947736f3660d..092179f03fff 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py @@ -56,7 +56,6 @@ def test_sfp_index(self, mock_max_port): @mock.patch('sonic_platform.sfp.SFP.is_sw_control') @mock.patch('sonic_platform.sfp.SFP.read_eeprom', mock.MagicMock(return_value=None)) - @mock.patch('sonic_platform.sfp.SFP.shared_sdk_handle', mock.MagicMock(return_value=2)) @mock.patch('sonic_platform.sfp.SFP._get_module_info') @mock.patch('sonic_platform.chassis.Chassis.get_num_sfps', mock.MagicMock(return_value=2)) @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[])) @@ -169,14 +168,6 @@ def test_sfp_read_eeprom(self, mock_get_page): handle.seek.side_effect = [0, 128, 0, 128, 0] assert sfp.read_eeprom(0, 320) == bytearray([0]*128 + [1]*128 + [2]*64) - @mock.patch('sonic_platform.sfp.SFP._fetch_port_status') - def test_is_port_admin_status_up(self, mock_port_status): - mock_port_status.return_value = (0, True) - assert SFP.is_port_admin_status_up(None, None) - - mock_port_status.return_value = (0, False) - assert not SFP.is_port_admin_status_up(None, None) - @mock.patch('sonic_platform.sfp.SFP._get_eeprom_path', mock.MagicMock(return_value = None)) @mock.patch('sonic_platform.sfp.SFP._get_sfp_type_str') @mock.patch('sonic_platform.sfp.SFP.is_sw_control') @@ -376,38 +367,11 @@ def test_is_sw_control(self, mock_mode, mock_read): assert not sfp.is_sw_control() mock_read.return_value = 1 assert sfp.is_sw_control() - - @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', mock.MagicMock(return_value=False)) - @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=False)) - @mock.patch('sonic_platform.utils.is_host', mock.MagicMock(side_effect = [True, True, False, False])) - @mock.patch('subprocess.check_output', mock.MagicMock(side_effect = ['True', 'False'])) - @mock.patch('sonic_platform.sfp.SFP._get_lpmode', mock.MagicMock(side_effect = [True, False])) - @mock.patch('sonic_platform.sfp.SFP.sdk_handle', mock.MagicMock(return_value = None)) - def test_get_lpmode(self): - sfp = SFP(0) - assert sfp.get_lpmode() - assert not sfp.get_lpmode() - assert sfp.get_lpmode() - assert not sfp.get_lpmode() - - @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', mock.MagicMock(return_value=False)) - @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=False)) - @mock.patch('sonic_platform.utils.is_host', mock.MagicMock(side_effect = [True, True, False, False])) - @mock.patch('subprocess.check_output', mock.MagicMock(side_effect = ['True', 'False'])) - @mock.patch('sonic_platform.sfp.SFP._set_lpmode', mock.MagicMock(side_effect = [True, False])) - @mock.patch('sonic_platform.sfp.SFP.sdk_handle', mock.MagicMock(return_value = None)) - def test_set_lpmode(self): - sfp = SFP(0) - assert sfp.set_lpmode(True) - assert not sfp.set_lpmode(True) - assert sfp.set_lpmode(False) - assert not sfp.set_lpmode(False) @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', mock.MagicMock(return_value=True)) @mock.patch('sonic_platform.utils.read_int_from_file') - @mock.patch('sonic_platform.sfp.SFP.is_sw_control') - def test_get_lpmode_cmis_host_mangagement(self, mock_control, mock_read): - mock_control.return_value = True + @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=True)) + def test_get_lpmode_cmis_host_mangagement(self, mock_read): sfp = SFP(0) sfp.get_xcvr_api = mock.MagicMock(return_value=None) assert not sfp.get_lpmode() @@ -419,18 +383,10 @@ def test_get_lpmode_cmis_host_mangagement(self, mock_control, mock_read): mock_api.get_lpmode.return_value = True assert sfp.get_lpmode() - - mock_control.return_value = False - mock_read.return_value = 1 - assert sfp.get_lpmode() - - mock_read.return_value = 2 - assert not sfp.get_lpmode() @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', mock.MagicMock(return_value=True)) - @mock.patch('sonic_platform.sfp.SFP.is_sw_control') - def test_set_lpmode_cmis_host_mangagement(self, mock_control): - mock_control.return_value = True + @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=True)) + def test_set_lpmode_cmis_host_mangagement(self): sfp = SFP(0) sfp.get_xcvr_api = mock.MagicMock(return_value=None) assert not sfp.set_lpmode(False) @@ -440,10 +396,6 @@ def test_set_lpmode_cmis_host_mangagement(self, mock_control): mock_api.get_lpmode = mock.MagicMock(return_value=False) assert sfp.set_lpmode(False) assert not sfp.set_lpmode(True) - - mock_control.return_value = False - assert not sfp.set_lpmode(True) - assert not sfp.set_lpmode(False) def test_determine_control_type(self): sfp = SFP(0) @@ -556,3 +508,26 @@ def test_initialize_sfp_modules(self): SFP.wait_ready_task.stop() SFP.wait_ready_task.join() SFP.wait_ready_task = None + + @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=False)) + @mock.patch('sonic_platform.utils.read_int_from_file') + def test_get_lpmode(self, mock_read_int): + sfp = SFP(0) + mock_read_int.return_value = 1 + assert sfp.get_lpmode() + mock_read_int.assert_called_with('/sys/module/sx_core/asic0/module0/power_mode') + + mock_read_int.return_value = 2 + assert not sfp.get_lpmode() + + @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=False)) + @mock.patch('sonic_platform.utils.write_file') + @mock.patch('sonic_platform.utils.read_int_from_file') + def test_set_lpmode(self, mock_read_int, mock_write): + sfp = SFP(0) + mock_read_int.return_value = 1 + assert sfp.set_lpmode(False) + assert mock_write.call_count == 0 + + assert sfp.set_lpmode(True) + mock_write.assert_called_with('/sys/module/sx_core/asic0/module0/power_mode_policy', '3') diff --git a/platform/mellanox/non-upstream-patches/external-changes.patch b/platform/mellanox/non-upstream-patches/external-changes.patch index ffc749cfc05a..cde69e93e127 100644 --- a/platform/mellanox/non-upstream-patches/external-changes.patch +++ b/platform/mellanox/non-upstream-patches/external-changes.patch @@ -1,13 +1,14 @@ --- a/patch/kconfig-inclusions +++ b/patch/kconfig-inclusions -@@ -117,6 +117,9 @@ +@@ -124,6 +124,10 @@ CONFIG_PINCTRL_AMD=y CONFIG_EDAC_AMD64=m CONFIG_AMD_XGBE_DCB=y +CONFIG_USB_NET_DRIVERS=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_CDCETHER=m ++CONFIG_HOTPLUG_PCI_PCIE=n ###-> mellanox_amd64-end # For Cisco 8000 CONFIG_PHYLIB=m diff --git a/platform/mellanox/rshim.mk b/platform/mellanox/rshim.mk index 9a375aec8c1b..13ec5951cfbf 100644 --- a/platform/mellanox/rshim.mk +++ b/platform/mellanox/rshim.mk @@ -15,7 +15,7 @@ # limitations under the License. # -MLNX_RSHIM_DRIVER_VERSION = 2.0.19 +MLNX_RSHIM_DRIVER_VERSION = 2.0.29 MLNX_RSHIM_ASSETS_GITHUB_URL = https://github.com/Mellanox/sonic-bluefield-packages MLNX_RSHIM_ASSETS_RELEASE_TAG = rshim-$(MLNX_RSHIM_DRIVER_VERSION)-$(BLDENV)-$(CONFIGURED_ARCH) MLNX_RSHIM_ASSETS_URL = $(MLNX_RSHIM_ASSETS_GITHUB_URL)/releases/download/$(MLNX_RSHIM_ASSETS_RELEASE_TAG) diff --git a/platform/mellanox/rshim/.gitignore b/platform/mellanox/rshim/.gitignore index 6dbdff4573bb..1ccb02ed83b3 100644 --- a/platform/mellanox/rshim/.gitignore +++ b/platform/mellanox/rshim/.gitignore @@ -3,3 +3,4 @@ # Except these files !.gitignore !Makefile +!files/* diff --git a/platform/mellanox/rshim/Makefile b/platform/mellanox/rshim/Makefile index fee2e6ec7c5f..4a8099e61a3b 100644 --- a/platform/mellanox/rshim/Makefile +++ b/platform/mellanox/rshim/Makefile @@ -31,6 +31,10 @@ $(addprefix $(DEST)/, $(MLNX_RSHIM)): $(DEST)/% : tar xf rshim-${MLNX_RSHIM_DRIVER_VERSION}.tar.gz -C rshim_src --strip-components=1 pushd rshim_src + patch -p1 < ../rename_tmfifo_to_dpu.patch + + # disable default systemd service + sed -i 's/ dh_auto_configure/ dh_auto_configure -- --with-systemdsystemunitdir=no/' debian/rules # Build the package DEB_BUILD_OPTIONS=nocheck dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) diff --git a/platform/mellanox/rshim/files/rshim-manager.service b/platform/mellanox/rshim/files/rshim-manager.service new file mode 100644 index 000000000000..4998bd3ff22c --- /dev/null +++ b/platform/mellanox/rshim/files/rshim-manager.service @@ -0,0 +1,11 @@ +[Unit] +Description=Starts rshim driver for all DPUs +After=network.target +Wants=rshim@0.service rshim@1.service rshim@2.service rshim@3.service + +[Service] +Type=oneshot +ExecStart=/bin/true + +[Install] +WantedBy=multi-user.target diff --git a/platform/mellanox/rshim/files/rshim.sh b/platform/mellanox/rshim/files/rshim.sh new file mode 100644 index 000000000000..9663e39a6381 --- /dev/null +++ b/platform/mellanox/rshim/files/rshim.sh @@ -0,0 +1,44 @@ +#!/usr/bin/env bash +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +if [ $# -eq 0 ]; then + echo "Usage: $0 " + exit 1 +fi + +dpu_id=$1 + +declare -A dpu2pcie +dpu2pcie[0]="08:00.0" +dpu2pcie[1]="07:00.0" +dpu2pcie[2]="01:00.0" +dpu2pcie[3]="02:00.0" + +if [ -z "${dpu2pcie[$dpu_id]}" ]; then + echo "Error: Invalid dpu index $dpu_id" + exit 1 +fi + +pcie=${dpu2pcie[$dpu_id]} + +if ! lspci | grep $pcie > /dev/null; then + echo "PCIE device $pcie is not available" + exit 1 +fi + +/usr/sbin/rshim -i $dpu_id -d pcie-0000:$pcie diff --git a/platform/mellanox/rshim/files/rshim@.service b/platform/mellanox/rshim/files/rshim@.service new file mode 100644 index 000000000000..a3e26418d7e5 --- /dev/null +++ b/platform/mellanox/rshim/files/rshim@.service @@ -0,0 +1,13 @@ +[Unit] +Description=rshim driver for DPU %I +Documentation=man:rshim(8) +After=network.target + +[Service] +Restart=always +Type=forking +ExecStart=/usr/bin/rshim.sh %i +KillMode=control-group + +[Install] +WantedBy=multi-user.target diff --git a/platform/mellanox/rshim/rename_tmfifo_to_dpu.patch b/platform/mellanox/rshim/rename_tmfifo_to_dpu.patch new file mode 100644 index 000000000000..f01880d0c1f0 --- /dev/null +++ b/platform/mellanox/rshim/rename_tmfifo_to_dpu.patch @@ -0,0 +1,13 @@ +diff --git a/src/rshim_net.c b/src/rshim_net.c +index a9e8663..7214df2 100644 +--- a/src/rshim_net.c ++++ b/src/rshim_net.c +@@ -263,7 +263,7 @@ int rshim_net_init(rshim_backend_t *bd) + char ifname[IFNAMSIZ]; + int rc, fd[2]; + +- snprintf(ifname, sizeof(ifname), "tmfifo_net%d", bd->index); ++ snprintf(ifname, sizeof(ifname), "dpu%d", bd->index); + bd->net_fd = rshim_if_open(ifname, bd->index); + + if (bd->net_fd < 0) diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk index 422bb9f5ff86..5346e8a44589 100644 --- a/platform/mellanox/sdk.mk +++ b/platform/mellanox/sdk.mk @@ -14,7 +14,7 @@ # See the License for the specific language governing permissions and # limitations under the License. # -MLNX_SDK_VERSION = 4.6.4072 +MLNX_SDK_VERSION = 4.7.1150 MLNX_SDK_ISSU_VERSION = 101 MLNX_SDK_DRIVERS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers diff --git a/platform/mellanox/smartswitch/dpuctl/dpu.conf b/platform/mellanox/smartswitch/dpuctl/dpu.conf new file mode 100644 index 000000000000..b0dcbfee98e6 --- /dev/null +++ b/platform/mellanox/smartswitch/dpuctl/dpu.conf @@ -0,0 +1 @@ +DARK_MODE=true diff --git a/platform/mellanox/smartswitch/dpuctl/dpuctl.service b/platform/mellanox/smartswitch/dpuctl/dpuctl.service new file mode 100644 index 000000000000..e914d3e7abed --- /dev/null +++ b/platform/mellanox/smartswitch/dpuctl/dpuctl.service @@ -0,0 +1,12 @@ +[Unit] +Description=Controle DPUs state +Requires=hw-management.service +After=hw-management.service + +[Service] +Type=oneshot +RemainAfterExit=yes +ExecStart=/usr/bin/dpuctl.sh start + +[Install] +WantedBy=multi-user.target diff --git a/platform/mellanox/smartswitch/dpuctl/dpuctl.sh b/platform/mellanox/smartswitch/dpuctl/dpuctl.sh new file mode 100644 index 000000000000..c5393aa1f6d0 --- /dev/null +++ b/platform/mellanox/smartswitch/dpuctl/dpuctl.sh @@ -0,0 +1,60 @@ +#!/usr/bin/env bash +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +# By default the dark mode is enabled +DARK_MODE=true + +bf3_pci_id="15b3:c2d5" +dpu2pcie[0]="08:00.0" +dpu2pcie[1]="07:00.0" +dpu2pcie[2]="01:00.0" +dpu2pcie[3]="02:00.0" + +if [[ -f /etc/mlnx/dpu.conf ]]; then + . /etc/mlnx/dpu.conf +fi + +do_start() { + if [[ $DARK_MODE == "true" ]]; then + # By default all the DPUs are on. Power off the DPUs when is dark mode is required. + + for dpu_id in ${!dpu2pcie[@]}; do + pci_id=$(lspci -n | grep "${dpu2pcie[$dpu_id]}" | awk '{print $3}') + if [[ $pci_id == $bf3_pci_id ]]; then + dpuctl dpu-power-off dpu${dpu_id} & + fi + done + + # Wait for all dpuctl processes to finish + wait + else + # Start RSHIM per each DPU to create interfaces + systemctl start rshim-manager.service + fi +} + +case "$1" in + start) + do_start + ;; + *) + echo "Error: Invalid argument." + echo "Usage: $0 {start}" + exit 1 + ;; +esac diff --git a/platform/mellanox/sonic-bfb-installer.sh b/platform/mellanox/sonic-bfb-installer.sh index 57930d991c64..8950797fed7f 100755 --- a/platform/mellanox/sonic-bfb-installer.sh +++ b/platform/mellanox/sonic-bfb-installer.sh @@ -26,12 +26,12 @@ usage(){ echo "-c Config file" echo "-h Help" } +WORK_DIR=`mktemp -d -p "$DIR"` bfb_install_call(){ #Example:sudo bfb-install -b -r rshim - local result_file=$(mktemp "/tmp/result_file.XXXXX") - trap "rm -f $result_file" EXIT - local cmd="timeout 300s bfb-install -b $2 -r $1 $appendix" + local result_file=$(mktemp "${WORK_DIR}/result_file.XXXXX") + local cmd="timeout 600s bfb-install -b $2 -r $1 $appendix" echo "Installing bfb image on DPU connected to $1 using $cmd" local indicator="$1:" eval "$cmd" > "$result_file" 2>&1 > >(while IFS= read -r line; do echo "$indicator $line"; done > "$result_file") @@ -44,7 +44,26 @@ bfb_install_call(){ if [ $exit_status -ne 0 ] ||[ $verbose = true ]; then cat "$result_file" fi - rm -f $result_file +} + +file_cleanup(){ + rm -rf "$WORK_DIR" +} + +is_url() { + local link=$1 + if [[ $link =~ https?:// ]]; then + echo "Detected URL. Downloading file" + filename="${WORK_DIR}/sonic-nvidia-bluefield.bfb" + curl -L -o "$filename" "$link" + res=$? + if test "$res" != "0"; then + echo "the curl command failed with: $res" + exit 1 + fi + bfb="$filename" + echo "bfb path changed to $bfb" + fi } validate_rshim(){ @@ -71,8 +90,6 @@ check_for_root(){ fi } - - main(){ check_for_root local config= @@ -104,13 +121,16 @@ main(){ echo "Error : bfb image is not provided." usage exit 1 + else + is_url $bfb fi + trap "file_cleanup" EXIT if [[ -f ${config} ]]; then echo "Using ${config} file" appendix="-c ${config}" fi dev_names_det+=($( - ls /dev/rshim* | awk -F'/' '/^\/dev\/rshim/ {gsub(/:/,"",$NF); print $NF}' + ls -d /dev/rshim? | awk -F'/' '{print $NF}' )) if [ "${#dev_names_det[@]}" -eq 0 ]; then echo "No rshim interfaces detected! Make sure to run the $command_name script from the host device/ switch!" @@ -127,7 +147,7 @@ main(){ echo "${dev_names_det[@]}" else IFS=',' read -ra dev_names <<< "$rshim_dev" - validate_rshim $dev_names + validate_rshim ${dev_names[@]} fi fi trap 'kill_ch_procs' SIGINT SIGTERM SIGHUP @@ -148,7 +168,7 @@ kill_all_descendant_procs() { done fi if [[ "$self_kill" == true ]]; then - kill -15 "$pid" > /dev/null 2>&1 + kill -9 "$pid" > /dev/null 2>&1 fi } diff --git a/platform/nvidia-bluefield/byo/sonic-byo.py b/platform/nvidia-bluefield/byo/sonic-byo.py new file mode 100644 index 000000000000..a5c933f8e34d --- /dev/null +++ b/platform/nvidia-bluefield/byo/sonic-byo.py @@ -0,0 +1,192 @@ +#!/usr/bin/python +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import argparse +import docker +import subprocess +import os +import sys + +DOCKER_TIMEOUT = 600 +CONTAINER_NAME = 'byo-app-container' + +client = docker.DockerClient(timeout=DOCKER_TIMEOUT) +api_client = docker.APIClient(timeout=DOCKER_TIMEOUT) + + +def get_args(): + parser = argparse.ArgumentParser(description='Utility for SONiC BYO configuration') + mode = parser.add_subparsers(dest='mode') + mode.required = True + + mode.add_parser('disable', help='Stop BYO application, restart SONiC services') + + enable_parser = mode.add_parser('enable', help='Stop SONiC services and run BYO application') + group = enable_parser.add_mutually_exclusive_group(required=True) + group.add_argument('--pull', help='Docker image URL to pull') + group.add_argument('--file', help='Docker image gz file to load') + group.add_argument('--image', help='Docker image name to run') + + return parser.parse_args() + + +def run_cmd(cmd, verbose=False): + if verbose: + print(' '.join(cmd)) + subprocess.run(cmd) + + +def sonic_services_ctl(start, verbose): + services = [ + 'featured', + 'swss', + 'syncd', + 'pmon', + 'snmp', + 'lldp', + 'gnmi', + 'bgp', + 'eventd' + ] + + systemctlops_start = ['unmask', 'enable', 'start'] + systemctlops_stop = ['stop', 'disable', 'mask'] + + # Start featured last + if start: + services = services[1:] + services[:1] + + print('#', 'Starting' if start else 'Stopping', ', '.join(services)) + + ops = systemctlops_start if start else systemctlops_stop + for op in ops: + run_cmd(["systemctl", op] + services, verbose=verbose) + + +def prepare_sonic(verbose=False): + print('# Preparing sonic..') + + sonic_services_ctl(start=False, verbose=verbose) + + print('# Loading mlx5_core driver') + run_cmd(["modprobe", "mlx5_core"], verbose=verbose) + + +def restore_sonic(verbose=False): + print('# Restoring sonic..') + sonic_services_ctl(start=True, verbose=verbose) + + +def pull_image(name): + try: + print(f'# Pulling image {name}') + for line in api_client.pull(name, stream=True, decode=True): + status = line.get('status', '') + progress = line.get('progress', '') + if progress: + sys.stdout.write(f'\r{status}: {progress}') + else: + sys.stdout.write(f'\r{status}') + sys.stdout.flush() + print() + return api_client.inspect_image(name)['Id'] + except docker.errors.APIError as e: + print(f'Error pulling image: {e}') + return None + + +def load_gz(file): + def chunked_file(f): + loaded = 0 + total = os.path.getsize(file) + chunk_size = max(8192, int(total / 1000)) + with open(file, 'rb') as f: + while True: + chunk = f.read(chunk_size) + if not chunk: + print() + break + loaded += len(chunk) + progress = loaded / total * 100 + sys.stdout.write(f'\rLoading.. {progress:.2f}%') + sys.stdout.flush() + yield chunk + + try: + print(f'# Loading image {file}') + return client.images.load(chunked_file(file))[0].id + + except Exception as e: + print(f'Failed to load: {e}') + return None + + +def run_container(image): + print(f'# Running image {image}') + config = { + 'image': image, + 'name': CONTAINER_NAME, + 'detach': True, + 'tty': True, + 'privileged': True, + 'network_mode': 'host', + 'auto_remove': True + } + + container = client.containers.run(**config) # nosemgrep: python.docker.security.audit.docker-arbitrary-container-run.docker-arbitrary-container-run + print(f'Container name: {container.name}') + + +def stop_container(): + try: + container = client.containers.get(CONTAINER_NAME) + container.stop() + print(f'Container {CONTAINER_NAME} stopped and removed successfully') + + except docker.errors.NotFound: + print(f'Container {CONTAINER_NAME} not found') + except Exception as e: + print(f'Docker error occurred: {str(e)}') + + +def byo_enable(args): + prepare_sonic(verbose=True) + if args.pull: + image_name = pull_image(args.pull) + elif args.file: + image_name = load_gz(args.file) + else: + image_name = args.image + run_container(image_name) + + +def byo_disable(): + stop_container() + restore_sonic(verbose=True) + + +def main(): + args = get_args() + if args.mode == 'enable': + byo_enable(args) + if args.mode == 'disable': + byo_disable() + + +if __name__ == "__main__": + main() diff --git a/platform/pensando/dsc-drivers/debian/control b/platform/pensando/dsc-drivers/debian/control index 342424ccbf15..07d8ed353b3e 100644 --- a/platform/pensando/dsc-drivers/debian/control +++ b/platform/pensando/dsc-drivers/debian/control @@ -10,5 +10,5 @@ Standards-Version: 3.9.3 Package: ionic-modules Architecture: arm64 Section: main -Depends: linux-image-6.1.0-11-2-arm64-unsigned +Depends: linux-image-6.1.0-22-2-arm64-unsigned Description: kernel modules for pensando elba diff --git a/platform/pensando/dsc-drivers/debian/ionic-modules.install b/platform/pensando/dsc-drivers/debian/ionic-modules.install index cad27cea25f4..9e1d39a9b6b3 100644 --- a/platform/pensando/dsc-drivers/debian/ionic-modules.install +++ b/platform/pensando/dsc-drivers/debian/ionic-modules.install @@ -1,4 +1,4 @@ -src/drivers/linux/build/mdev.ko lib/modules/6.1.0-11-2-arm64/extra -src/drivers/linux/build/mnet_uio_pdrv_genirq.ko lib/modules/6.1.0-11-2-arm64/extra -src/drivers/linux/build/ionic_mnic.ko lib/modules/6.1.0-11-2-arm64/extra +src/drivers/linux/build/mdev.ko lib/modules/6.1.0-22-2-arm64/extra +src/drivers/linux/build/mnet_uio_pdrv_genirq.ko lib/modules/6.1.0-22-2-arm64/extra +src/drivers/linux/build/ionic_mnic.ko lib/modules/6.1.0-22-2-arm64/extra systemd/ionic-modules.service lib/systemd/system diff --git a/platform/pensando/platform.conf b/platform/pensando/platform.conf index b10f20e1ca28..8ebae0e2a0db 100644 --- a/platform/pensando/platform.conf +++ b/platform/pensando/platform.conf @@ -172,8 +172,8 @@ cat <> $bl_conf_path/$BL_CONF default main label main - kernel /$image_dir/boot/vmlinuz-6.1.0-11-2-arm64 - initrd /$image_dir/boot/initrd.img-6.1.0-11-2-arm64 + kernel /$image_dir/boot/vmlinuz-6.1.0-22-2-arm64 + initrd /$image_dir/boot/initrd.img-6.1.0-22-2-arm64 devicetree /$image_dir/boot/elba-asic-psci.dtb append softdog.soft_panic=1 FW_NAME=mainfwa root=/dev/mmcblk0p10 rw rootwait rootfstype=ext4 loopfstype=squashfs loop=/$image_dir/fs.squashfs } diff --git a/platform/vs/docker-sonic-vs/supervisord.conf.j2 b/platform/vs/docker-sonic-vs/supervisord.conf.j2 index ae32fe41d4d0..d8d9ce390cb8 100644 --- a/platform/vs/docker-sonic-vs/supervisord.conf.j2 +++ b/platform/vs/docker-sonic-vs/supervisord.conf.j2 @@ -164,7 +164,7 @@ environment=ASAN_OPTIONS="log_path=/var/log/asan/teammgrd-asan.log{{ asan_extra_ {% endif %} [program:zebra] -command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_nl +command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_sonic --asic-offload=notify_on_offload priority=13 autostart=false autorestart=false diff --git a/rules/config b/rules/config index d2ddcb704fbe..8229160b0d78 100644 --- a/rules/config +++ b/rules/config @@ -42,6 +42,9 @@ DEFAULT_BUILD_LOG_TIMESTAMP = none # CHANGE_DEFAULT_PASSWORD - enforce default user/users to change password on 1st login CHANGE_DEFAULT_PASSWORD ?= n +# Default value for SMARTSWITCH +SMARTSWITCH ?= 0 + # DEFAULT_USERNAME - default username for installer build DEFAULT_USERNAME = admin @@ -152,6 +155,11 @@ INCLUDE_DHCP_RELAY = y # INCLUDE_DHCP_SERVER - build and install dhcp-server package INCLUDE_DHCP_SERVER ?= n +# Conditionally enable DHCP_SERVER when SMARTSWITCH is set to 1 +ifeq ($(SMARTSWITCH), 1) + INCLUDE_DHCP_SERVER = y +endif + # INCLUDE_P4RT - build docker-p4rt for P4RT support INCLUDE_P4RT = n diff --git a/rules/ipmitool.mk b/rules/ipmitool.mk index 84cb248253ad..a3d08452473f 100644 --- a/rules/ipmitool.mk +++ b/rules/ipmitool.mk @@ -1,7 +1,7 @@ # ipmitool packages IPMITOOL_VERSION = 1.8.19 -IPMITOOL_VERSION_SUFFIX = 4 -IPMITOOL_VERSION_FULL = $(IPMITOOL_VERSION)-$(IPMITOOL_VERSION_SUFFIX)+deb12u1 +IPMITOOL_VERSION_SUFFIX = 4+deb12u1 +IPMITOOL_VERSION_FULL = $(IPMITOOL_VERSION)-$(IPMITOOL_VERSION_SUFFIX) IPMITOOL = ipmitool_$(IPMITOOL_VERSION_FULL)_$(CONFIGURED_ARCH).deb $(IPMITOOL)_SRC_PATH = $(SRC_PATH)/ipmitool SONIC_MAKE_DEBS += $(IPMITOOL) diff --git a/rules/linux-kernel.mk b/rules/linux-kernel.mk index acd900431332..246578086832 100644 --- a/rules/linux-kernel.mk +++ b/rules/linux-kernel.mk @@ -1,9 +1,9 @@ # linux kernel package -KVERSION_SHORT = 6.1.0-11-2 +KVERSION_SHORT = 6.1.0-22-2 KVERSION = $(KVERSION_SHORT)-$(CONFIGURED_ARCH) -KERNEL_VERSION = 6.1.38 -KERNEL_SUBVERSION = 4 +KERNEL_VERSION = 6.1.94 +KERNEL_SUBVERSION = 1 ifeq ($(CONFIGURED_ARCH), armhf) # Override kernel version for ARMHF as it uses arm MP (multi-platform) for short version KVERSION = $(KVERSION_SHORT)-armmp diff --git a/src/isc-dhcp/patch/0017-Register-IO-obj-before-create-fd-watch.patch b/src/isc-dhcp/patch/0017-Register-IO-obj-before-create-fd-watch.patch new file mode 100644 index 000000000000..7e1bddd63906 --- /dev/null +++ b/src/isc-dhcp/patch/0017-Register-IO-obj-before-create-fd-watch.patch @@ -0,0 +1,110 @@ +From debe69ebc8df454f0fa7a8c6f3a7c9622ceaf3c2 Mon Sep 17 00:00:00 2001 +From: yaqiangz +Date: Mon, 26 Aug 2024 02:18:52 +0000 +Subject: [PATCH] Register IO obj before create fd watch + +--- + omapip/dispatch.c | 44 +++++++++++++++++++++++++++----------------- + 1 file changed, 27 insertions(+), 17 deletions(-) + +diff --git a/omapip/dispatch.c b/omapip/dispatch.c +index 644ab43..d9b9a57 100644 +--- a/omapip/dispatch.c ++++ b/omapip/dispatch.c +@@ -123,6 +123,7 @@ omapi_iscsock_cb(isc_task_t *task, + int flags) + { + omapi_io_object_t *obj; ++ omapi_io_object_t *temp_obj; + isc_result_t status; + + /* Get the current time... */ +@@ -140,6 +141,9 @@ omapi_iscsock_cb(isc_task_t *task, + } + + if (obj == NULL) { ++ temp_obj = (omapi_io_object_t *) cbarg; ++ log_error ("Isc socket callback of fd %d return 0 because obj is NULL", ++ temp_obj->fd->methods->getfd(temp_obj->fd)); + return(0); + } + #else +@@ -157,6 +161,8 @@ omapi_iscsock_cb(isc_task_t *task, + * close the socket. + */ + if (obj->closed == ISC_TRUE) { ++ log_error ("Isc socket callback of fd %d return 0 because fd closed", ++ obj->fd->methods->getfd(obj->fd)); + return(0); + } + #endif +@@ -170,8 +176,11 @@ omapi_iscsock_cb(isc_task_t *task, + * read and got no bytes) we don't need to try + * again. + */ +- if (status == ISC_R_SHUTTINGDOWN) ++ if (status == ISC_R_SHUTTINGDOWN) { ++ log_error ("Isc socket callback of fd %d return 0 because reader shutdown", ++ obj->fd->methods->getfd(obj->fd)); + return (0); ++ } + /* Otherwise We always ask for more when reading */ + return (1); + } else if ((flags == ISC_SOCKFDWATCH_WRITE) && +@@ -190,6 +199,8 @@ omapi_iscsock_cb(isc_task_t *task, + * structures etc) or no more to write, tell the socket + * lib we don't have more to do right now. + */ ++ log_error ("Isc socket callback of fd %d return 0 because unknown issue", ++ obj->fd->methods->getfd(obj->fd)); + return (0); + } + +@@ -255,6 +266,21 @@ isc_result_t omapi_register_io_object (omapi_object_t *h, + fd = writefd(h); + } + ++ /* Find the last I/O state, if there are any. */ ++ for (p = omapi_io_states.next; ++ p && p -> next; p = p -> next) ++ ; ++ if (p) ++ omapi_io_reference (&p -> next, obj, MDL); ++ else ++ omapi_io_reference (&omapi_io_states.next, obj, MDL); ++ ++ obj -> readfd = readfd; ++ obj -> writefd = writefd; ++ obj -> reader = reader; ++ obj -> writer = writer; ++ obj -> reaper = reaper; ++ + if (fd_flags != 0) { + status = isc_socket_fdwatchcreate(dhcp_gbl_ctx.socketmgr, + fd, fd_flags, +@@ -274,22 +300,6 @@ isc_result_t omapi_register_io_object (omapi_object_t *h, + } + } + +- +- /* Find the last I/O state, if there are any. */ +- for (p = omapi_io_states.next; +- p && p -> next; p = p -> next) +- ; +- if (p) +- omapi_io_reference (&p -> next, obj, MDL); +- else +- omapi_io_reference (&omapi_io_states.next, obj, MDL); +- +- obj -> readfd = readfd; +- obj -> writefd = writefd; +- obj -> reader = reader; +- obj -> writer = writer; +- obj -> reaper = reaper; +- + omapi_io_dereference(&obj, MDL); + return ISC_R_SUCCESS; + } +-- +2.25.1 + diff --git a/src/isc-dhcp/patch/series b/src/isc-dhcp/patch/series index 755200d9eb99..d61fd2bf780b 100644 --- a/src/isc-dhcp/patch/series +++ b/src/isc-dhcp/patch/series @@ -14,3 +14,4 @@ 0014-enable-parallel-build.patch 0015-option-to-set-primary-address-in-interface.patch 0016-Don-t-look-up-the-ifindex-for-fallback.patch +0017-Register-IO-obj-before-create-fd-watch.patch diff --git a/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch b/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch new file mode 100644 index 000000000000..80f94a2a02b7 --- /dev/null +++ b/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch @@ -0,0 +1,154 @@ +From 70e995bd076b5027414e1332a453f366f20c7002 Mon Sep 17 00:00:00 2001 +From: Fernando +Date: Mon, 19 Sep 2022 12:56:46 -0300 +Subject: Adding support for RTA_NH_ID attribute + +--- + include/netlink-private/types.h | 1 + + include/netlink/route/route.h | 2 ++ + lib/route/route_obj.c | 23 +++++++++++++++++++++++ + 3 files changed, 26 insertions(+) + +diff --git a/include/netlink-private/types.h b/include/netlink-private/types.h +index 97af3e5..51e58b1 100644 +--- a/include/netlink-private/types.h ++++ b/include/netlink-private/types.h +@@ -348,6 +348,7 @@ struct rtnl_route + uint32_t rt_metrics[RTAX_MAX]; + uint32_t rt_metrics_mask; + uint32_t rt_nr_nh; ++ uint32_t rt_nh_id; + struct nl_addr * rt_pref_src; + struct nl_list_head rt_nexthops; + struct rtnl_rtcacheinfo rt_cacheinfo; +diff --git a/include/netlink/route/route.h b/include/netlink/route/route.h +index 824dae3..9cfa393 100644 +--- a/include/netlink/route/route.h ++++ b/include/netlink/route/route.h +@@ -93,6 +93,8 @@ extern int rtnl_route_set_pref_src(struct rtnl_route *, struct nl_addr *); + extern struct nl_addr *rtnl_route_get_pref_src(struct rtnl_route *); + extern void rtnl_route_set_iif(struct rtnl_route *, int); + extern int rtnl_route_get_iif(struct rtnl_route *); ++extern void rtnl_route_set_nh_id(struct rtnl_route *, uint32_t); ++extern uint32_t rtnl_route_get_nh_id(struct rtnl_route *); + extern int rtnl_route_get_src_len(struct rtnl_route *); + extern void rtnl_route_set_ttl_propagate(struct rtnl_route *route, + uint8_t ttl_prop); +diff --git a/lib/route/route_obj.c b/lib/route/route_obj.c +index bacabe8..5d9d4ce 100644 +--- a/lib/route/route_obj.c ++++ b/lib/route/route_obj.c +@@ -65,6 +65,7 @@ + #define ROUTE_ATTR_REALMS 0x010000 + #define ROUTE_ATTR_CACHEINFO 0x020000 + #define ROUTE_ATTR_TTL_PROPAGATE 0x040000 ++#define ROUTE_ATTR_NH_ID 0x080000 + /** @endcond */ + + static void route_constructor(struct nl_object *c) +@@ -252,6 +253,8 @@ static void route_dump_details(struct nl_object *a, struct nl_dump_params *p) + nl_dump(p, " ttl-propagate %s", + r->rt_ttl_propagate ? "enabled" : "disabled"); + } ++ if (r->ce_mask & ROUTE_ATTR_NH_ID) ++ nl_dump(p, "nh id %d ", r->rt_nh_id); + + nl_dump(p, "\n"); + +@@ -391,6 +394,7 @@ static uint64_t route_compare(struct nl_object *_a, struct nl_object *_b, + b->rt_pref_src)); + diff |= ROUTE_DIFF(TTL_PROPAGATE, + a->rt_ttl_propagate != b->rt_ttl_propagate); ++ diff |= ROUTE_DIFF(NH_ID, a->rt_nh_id != b->rt_nh_id); + + if (flags & LOOSE_COMPARISON) { + nl_list_for_each_entry(nh_b, &b->rt_nexthops, rtnh_list) { +@@ -589,6 +593,7 @@ static const struct trans_tbl route_attrs[] = { + __ADD(ROUTE_ATTR_REALMS, realms), + __ADD(ROUTE_ATTR_CACHEINFO, cacheinfo), + __ADD(ROUTE_ATTR_TTL_PROPAGATE, ttl_propagate), ++ __ADD(ROUTE_ATTR_NH_ID, nh_id), + }; + + static char *route_attrs2str(int attrs, char *buf, size_t len) +@@ -862,6 +867,17 @@ int rtnl_route_get_iif(struct rtnl_route *route) + return route->rt_iif; + } + ++void rtnl_route_set_nh_id(struct rtnl_route *route, uint32_t nhid) ++{ ++ route->rt_nh_id = nhid; ++ route->ce_mask |= ROUTE_ATTR_NH_ID; ++} ++ ++uint32_t rtnl_route_get_nh_id(struct rtnl_route *route) ++{ ++ return route->rt_nh_id; ++} ++ + void rtnl_route_add_nexthop(struct rtnl_route *route, struct rtnl_nexthop *nh) + { + nl_list_add_tail(&nh->rtnh_list, &route->rt_nexthops); +@@ -1018,6 +1034,7 @@ static struct nla_policy route_policy[RTA_MAX+1] = { + [RTA_TTL_PROPAGATE] = { .type = NLA_U8 }, + [RTA_ENCAP] = { .type = NLA_NESTED }, + [RTA_ENCAP_TYPE] = { .type = NLA_U16 }, ++ [RTA_NH_ID] = { .type = NLA_U32 }, + }; + + static int parse_multipath(struct rtnl_route *route, struct nlattr *attr) +@@ -1201,6 +1218,9 @@ int rtnl_route_parse(struct nlmsghdr *nlh, struct rtnl_route **result) + nl_addr_put(addr); + } + ++ if (tb[RTA_NH_ID]) ++ rtnl_route_set_nh_id(route, nla_get_u32(tb[RTA_NH_ID])); ++ + if (tb[RTA_METRICS]) { + struct nlattr *mtb[RTAX_MAX + 1]; + int i; +@@ -1404,6 +1424,9 @@ int rtnl_route_build_msg(struct nl_msg *msg, struct rtnl_route *route) + if (route->ce_mask & ROUTE_ATTR_TTL_PROPAGATE) + NLA_PUT_U8(msg, RTA_TTL_PROPAGATE, route->rt_ttl_propagate); + ++ if (route->ce_mask & ROUTE_ATTR_NH_ID) ++ NLA_PUT_U32(msg, RTA_NH_ID, route->rt_nh_id); ++ + if (route->rt_nmetrics > 0) { + uint32_t val; + +-- +2.25.1 + +diff --git a/include/linux-private/linux/rtnetlink.h b/include/linux-private/linux/rtnetlink.h +index 8c1d600..82fb56b 100644 +--- a/include/linux-private/linux/rtnetlink.h ++++ b/include/linux-private/linux/rtnetlink.h +@@ -342,6 +342,7 @@ enum rtattr_type_t { + RTA_IP_PROTO, + RTA_SPORT, + RTA_DPORT, ++ RTA_NH_ID, + __RTA_MAX + }; + +diff --git a/libnl-route-3.sym b/libnl-route-3.sym +index ce6d714..fb81b7f 100644 +--- a/libnl-route-3.sym ++++ b/libnl-route-3.sym +@@ -690,6 +690,7 @@ global: + rtnl_route_get_family; + rtnl_route_get_flags; + rtnl_route_get_iif; ++ rtnl_route_get_nh_id; + rtnl_route_get_metric; + rtnl_route_get_nexthops; + rtnl_route_get_nnexthops; +@@ -732,6 +733,7 @@ global: + rtnl_route_set_family; + rtnl_route_set_flags; + rtnl_route_set_iif; ++ rtnl_route_set_nh_id; + rtnl_route_set_metric; + rtnl_route_set_pref_src; + rtnl_route_set_priority; diff --git a/src/libnl3/patch/series b/src/libnl3/patch/series index 4508b1dd652a..4c7c2d8e25a5 100644 --- a/src/libnl3/patch/series +++ b/src/libnl3/patch/series @@ -1,2 +1,3 @@ 0001-mpls-encap-accessors.patch 0002-mpls-remove-nl_addr_valid.patch +0003-Adding-support-for-RTA_NH_ID-attribute.patch diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py index cb47d1976493..0b07f9cbcda7 100644 --- a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py +++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py @@ -312,10 +312,11 @@ def apply_op(self, cmd, vrf): :return: True if no errors, False if there are errors """ bgp_asn = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"]["bgp_asn"] + enable_bgp_suppress_fib_pending_cmd = 'bgp suppress-fib-pending' if vrf == 'default': - cmd = ('router bgp %s\n' % bgp_asn) + cmd + cmd = ('router bgp %s\n %s\n' % (bgp_asn, enable_bgp_suppress_fib_pending_cmd)) + cmd else: - cmd = ('router bgp %s vrf %s\n' % (bgp_asn, vrf)) + cmd + cmd = ('router bgp %s vrf %s\n %s\n' % (bgp_asn, vrf, enable_bgp_suppress_fib_pending_cmd)) + cmd self.cfg_mgr.push(cmd) return True diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_rm.py b/src/sonic-bgpcfgd/bgpcfgd/managers_rm.py index 35a3f864d55c..2412dc3d9eab 100644 --- a/src/sonic-bgpcfgd/bgpcfgd/managers_rm.py +++ b/src/sonic-bgpcfgd/bgpcfgd/managers_rm.py @@ -2,7 +2,7 @@ from swsscommon import swsscommon from .log import log_err, log_debug -ROUTE_MAPS = ["FROM_SDN_SLB_ROUTES"] +ROUTE_MAPS = ["FROM_SDN_SLB_ROUTES", "FROM_SDN_APPLIANCE_ROUTES"] FROM_SDN_SLB_DEPLOYMENT_ID = '2' class RouteMapMgr(Manager): @@ -83,7 +83,7 @@ def __read_asn(self): def __update_rm(self, rm, data): cmds = [] - if rm == "FROM_SDN_SLB_ROUTES": + if rm in ROUTE_MAPS : cmds.append("route-map %s permit 100" % ("%s_RM" % rm)) bgp_asn = self.__read_asn() if bgp_asn is None or bgp_asn is '': diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all.conf index 8d0c17d592b8..f19b98a859c8 100644 --- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all.conf +++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all.conf @@ -31,6 +31,7 @@ route-map FROM_BGP_PEER_V6 permit 11 route-map FROM_BGP_PEER_V4 permit 100 ! route-map TO_BGP_PEER_V4 permit 100 + call CHECK_IDF_ISOLATION ! route-map FROM_BGP_PEER_V6 permit 1 on-match next @@ -39,6 +40,9 @@ route-map FROM_BGP_PEER_V6 permit 1 route-map FROM_BGP_PEER_V6 permit 100 ! route-map TO_BGP_PEER_V6 permit 100 + call CHECK_IDF_ISOLATION +! +route-map CHECK_IDF_ISOLATION permit 10 ! ! end of template: bgpd/templates/general/policies.conf.j2 ! diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_base.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_base.conf index 8f7631caabd8..671eea007cf9 100644 --- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_base.conf +++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_base.conf @@ -4,6 +4,7 @@ route-map FROM_BGP_PEER_V4 permit 100 ! route-map TO_BGP_PEER_V4 permit 100 + call CHECK_IDF_ISOLATION ! route-map FROM_BGP_PEER_V6 permit 1 on-match next @@ -12,6 +13,9 @@ route-map FROM_BGP_PEER_V6 permit 1 route-map FROM_BGP_PEER_V6 permit 100 ! route-map TO_BGP_PEER_V6 permit 100 + call CHECK_IDF_ISOLATION +! +route-map CHECK_IDF_ISOLATION permit 10 ! ! end of template: bgpd/templates/general/policies.conf.j2 ! diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_deny.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_deny.conf index 661414bd579c..fdc10b84bf8f 100644 --- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_deny.conf +++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_deny.conf @@ -31,6 +31,7 @@ route-map FROM_BGP_PEER_V6 permit 11 route-map FROM_BGP_PEER_V4 permit 100 ! route-map TO_BGP_PEER_V4 permit 100 + call CHECK_IDF_ISOLATION ! route-map FROM_BGP_PEER_V6 permit 1 on-match next @@ -39,6 +40,9 @@ route-map FROM_BGP_PEER_V6 permit 1 route-map FROM_BGP_PEER_V6 permit 100 ! route-map TO_BGP_PEER_V6 permit 100 + call CHECK_IDF_ISOLATION +! +route-map CHECK_IDF_ISOLATION permit 10 ! ! end of template: bgpd/templates/general/policies.conf.j2 ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.conf.j2/all.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.conf.j2/all.conf index c39115706d79..a7f34245873a 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.conf.j2/all.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.conf.j2/all.conf @@ -55,6 +55,7 @@ route-map HIDE_INTERNAL permit 20 router bgp 55555 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/all.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/all.conf index c5ba79d34392..d2dc9e40e892 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/all.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/all.conf @@ -34,6 +34,7 @@ route-map HIDE_INTERNAL permit 10 router bgp 55555 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/base.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/base.conf index 77cc9d6fffd8..27d04b953a3e 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/base.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/base.conf @@ -12,6 +12,7 @@ ip prefix-list PL_LoopbackV4 permit 55.55.55.55/32 router bgp 55555 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults.conf index 00b09bd40d9a..b85dd67a5ca0 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults.conf @@ -34,6 +34,7 @@ route-map HIDE_INTERNAL permit 10 router bgp 55555 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.conf index c042f00a7c2a..96a30d0ab5df 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.conf @@ -34,6 +34,7 @@ route-map HIDE_INTERNAL permit 10 router bgp 55555 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/ipv6_lo.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/ipv6_lo.conf index 50414a89a389..5ee5ce5443aa 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/ipv6_lo.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/ipv6_lo.conf @@ -14,6 +14,7 @@ ipv6 prefix-list PL_LoopbackV6 permit fc00::1/128 router bgp 55555 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.conf index 31e0e66cb5af..b181dbd5e430 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.conf @@ -32,6 +32,7 @@ route-map HIDE_INTERNAL permit 10 router bgp 55555 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf index f0526d73976e..c41fa0cfedc9 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf @@ -32,6 +32,7 @@ route-map HIDE_INTERNAL permit 10 router bgp 55555 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis.conf index a949ce6e4512..6b2e1f257948 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis.conf @@ -34,6 +34,7 @@ route-map HIDE_INTERNAL permit 10 router bgp 55555 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf index 81c7d0f2bf42..381c5b05a1f0 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf @@ -34,6 +34,7 @@ route-map HIDE_INTERNAL permit 10 router bgp 55555 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf index 3acce1ffb6c1..213872f45c70 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf @@ -34,6 +34,7 @@ route-map HIDE_INTERNAL permit 10 router bgp 55555 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.conf index 3acce1ffb6c1..213872f45c70 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.conf @@ -34,6 +34,7 @@ route-map HIDE_INTERNAL permit 10 router bgp 55555 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/voq_chassis.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/voq_chassis.conf index 0d9eeebe9e8e..efd45eda1ea9 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/voq_chassis.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/voq_chassis.conf @@ -34,6 +34,7 @@ route-map HIDE_INTERNAL permit 10 router bgp 55555 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/frr.conf.j2/all.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/frr.conf.j2/all.conf index af2e974ee9b7..8856e58db686 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/frr.conf.j2/all.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/frr.conf.j2/all.conf @@ -71,6 +71,7 @@ route-map HIDE_INTERNAL permit 10 router bgp 55555 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf index 6b7e1feff000..bd8afe7f915c 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf @@ -22,9 +22,11 @@ log facility local4 ! vrf First vni 10 +exit ! vrf Second vni 20 +exit ! ! Enable nht through default route ip nht resolve-via-default diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v4.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v4.conf index 604af65d5e66..1250552211e0 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v4.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v4.conf @@ -7,7 +7,7 @@ neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 - neighbor 10.10.10.10 timers 3 10 + neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 neighbor 10.10.10.10 shutdown ! diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v6.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v6.conf index 793473c2e202..e6274e05332c 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v6.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v6.conf @@ -7,7 +7,7 @@ neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 - neighbor fc00::01 timers 3 10 + neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 neighbor fc00::01 shutdown ! diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v4.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v4.conf index 23bf5841f9cc..4d2f2c251e44 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v4.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v4.conf @@ -7,7 +7,7 @@ neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 - neighbor 10.10.10.10 timers 3 10 + neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 address-family ipv4 maximum-paths ibgp 64 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v6.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v6.conf index a0bd9379c8b2..375d00051199 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v6.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v6.conf @@ -7,7 +7,7 @@ neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 - neighbor fc00::01 timers 3 10 + neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 address-family ipv4 maximum-paths ibgp 64 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_1.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_1.conf index f26f0d6d3d0c..5181fad5187f 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_1.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_1.conf @@ -7,7 +7,7 @@ neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 - neighbor 10.10.10.10 timers 3 10 + neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 neighbor 10.10.10.10 shutdown ! diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_2.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_2.conf index 23bf5841f9cc..4d2f2c251e44 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_2.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_2.conf @@ -7,7 +7,7 @@ neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 - neighbor 10.10.10.10 timers 3 10 + neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 address-family ipv4 maximum-paths ibgp 64 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_1.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_1.conf index 4057147d5d58..144a26ca4852 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_1.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_1.conf @@ -7,7 +7,7 @@ neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 - neighbor fc00::01 timers 3 10 + neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 neighbor fc00::01 shutdown ! diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_2.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_2.conf index a0bd9379c8b2..375d00051199 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_2.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_2.conf @@ -7,7 +7,7 @@ neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 - neighbor fc00::01 timers 3 10 + neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 address-family ipv4 maximum-paths ibgp 64 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_1.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_1.conf index 23bf5841f9cc..4d2f2c251e44 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_1.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_1.conf @@ -7,7 +7,7 @@ neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 - neighbor 10.10.10.10 timers 3 10 + neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 address-family ipv4 maximum-paths ibgp 64 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_2.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_2.conf index 23bf5841f9cc..4d2f2c251e44 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_2.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_2.conf @@ -7,7 +7,7 @@ neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 - neighbor 10.10.10.10 timers 3 10 + neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 address-family ipv4 maximum-paths ibgp 64 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_1.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_1.conf index a0bd9379c8b2..375d00051199 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_1.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_1.conf @@ -7,7 +7,7 @@ neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 - neighbor fc00::01 timers 3 10 + neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 address-family ipv4 maximum-paths ibgp 64 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_2.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_2.conf index a0bd9379c8b2..375d00051199 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_2.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_2.conf @@ -7,7 +7,7 @@ neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 - neighbor fc00::01 timers 3 10 + neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 address-family ipv4 maximum-paths ibgp 64 diff --git a/src/sonic-bgpcfgd/tests/test_rm.py b/src/sonic-bgpcfgd/tests/test_rm.py index 867ae1a7a51c..697e3096602d 100644 --- a/src/sonic-bgpcfgd/tests/test_rm.py +++ b/src/sonic-bgpcfgd/tests/test_rm.py @@ -25,7 +25,7 @@ def constructor(): mgr = RouteMapMgr(common_objs, "APPL_DB", "BGP_PROFILE_TABLE") return mgr -def set_del_test(mgr, op, args, expected_ret, expected_cmds): +def set_del_test(mgr, op, cfg_args, expected_ret, expected_cmds): set_del_test.push_list_called = False def push_list(cmds): set_del_test.push_list_called = True @@ -34,10 +34,12 @@ def push_list(cmds): mgr.cfg_mgr.push_list = push_list if op == "SET": - ret = mgr.set_handler(*args) - assert ret == expected_ret + for i in range(0, len(cfg_args)): + ret = mgr.set_handler(cfg_args[i][0], cfg_args[i][1]) + assert ret == expected_ret elif op == "DEL": - mgr.del_handler(*args) + for i in range(0, len(cfg_args)): + mgr.del_handler(cfg_args[i]) else: assert False, "Wrong operation" @@ -51,9 +53,9 @@ def test_set_del(): set_del_test( mgr, "SET", - ("FROM_SDN_SLB_ROUTES", { + [("FROM_SDN_SLB_ROUTES", { "community_id": "1234:1234" - }), + })], True, [ ["route-map FROM_SDN_SLB_ROUTES_RM permit 100", @@ -72,3 +74,68 @@ def test_set_del(): ["no route-map FROM_SDN_SLB_ROUTES_RM permit 100"] ] ) + +def test_set_del_com_sdn_apl(): + mgr = constructor() + set_del_test( + mgr, + "SET", + [("FROM_SDN_APPLIANCE_ROUTES", { + "community_id": "1235:1235" + })], + True, + [ + ["route-map FROM_SDN_APPLIANCE_ROUTES_RM permit 100", + " set as-path prepend 12346 12346", + " set community 1235:1235", + " set origin incomplete"] + ] + ) + + set_del_test( + mgr, + "DEL", + ("FROM_SDN_APPLIANCE_ROUTES",), + True, + [ + ["no route-map FROM_SDN_APPLIANCE_ROUTES_RM permit 100"] + ] + ) + +def test_set_del_com_sdn_apl_and_slb(): + mgr = constructor() + set_del_test( + mgr, + "SET", + [("FROM_SDN_APPLIANCE_ROUTES", { + "community_id": "1235:1235" + }), + ("FROM_SDN_SLB_ROUTES", { + "community_id": "1234:1234" + } + )], + True, + [ + ["route-map FROM_SDN_APPLIANCE_ROUTES_RM permit 100", + " set as-path prepend 12346 12346", + " set community 1235:1235", + " set origin incomplete"], + ["route-map FROM_SDN_SLB_ROUTES_RM permit 100", + " set as-path prepend 12346 12346", + " set community 1234:1234", + " set origin incomplete"] + + ] + ) + + set_del_test( + mgr, + "DEL", + ("FROM_SDN_APPLIANCE_ROUTES", "FROM_SDN_SLB_ROUTES",), + True, + [ + ["no route-map FROM_SDN_APPLIANCE_ROUTES_RM permit 100"], + ["no route-map FROM_SDN_SLB_ROUTES_RM permit 100"] + ] + ) + diff --git a/src/sonic-bmpcfgd/__init__.py b/src/sonic-bmpcfgd/__init__.py new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service b/src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service new file mode 100644 index 000000000000..0a16edf77fe1 --- /dev/null +++ b/src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service @@ -0,0 +1,14 @@ +[Unit] +Description=Process which monitors config_db and manage openbmpd daemon +Requires=database.service config-setup.service +After=database.service config-setup.service +BindsTo=sonic.target +After=sonic.target + +[Service] +Type=simple +ExecStart=/usr/local/bin/bmpcfgd +Restart=always + +[Install] +WantedBy=sonic.target diff --git a/src/sonic-bmpcfgd/scripts/bmpcfgd b/src/sonic-bmpcfgd/scripts/bmpcfgd new file mode 100644 index 000000000000..448ca5b24617 --- /dev/null +++ b/src/sonic-bmpcfgd/scripts/bmpcfgd @@ -0,0 +1,111 @@ +#!/usr/bin/env python3 +''' +bmpcfgd +Daemon which monitors bmp relevant table enablement from CONFIG_DB, and reset BMP states +''' + +import os +import sys +import subprocess +import syslog +import signal +from shutil import copy2 +from datetime import datetime +from sonic_py_common import device_info +from sonic_py_common.general import check_output_pipe +from swsscommon.swsscommon import ConfigDBConnector, DBConnector, Table +from swsscommon import swsscommon +from sonic_py_common.daemon_base import DaemonBase + +CFG_DB = "CONFIG_DB" +BMP_STATE_DB = "BMP_STATE_DB" +REDIS_HOSTIP = "127.0.0.1" +BMP_TABLE = "BMP" + +def is_true(val): + return str(val).lower() == 'true' + +class BMPCfg(DaemonBase): + def __init__(self, state_db_conn): + DaemonBase.__init__(self, SYSLOG_IDENTIFIER) + self.bgp_neighbor_table = False + self.bgp_rib_in_table = False + self.bgp_rib_out_table = False + self.state_db_conn = state_db_conn + + + def load(self, data={}): + common_config = data.get('table', {}) + + self.bgp_neighbor_table = is_true(common_config.get('bgp_neighbor_table', 'false')) + self.bgp_rib_in_table = is_true(common_config.get('bgp_rib_in_table', 'false')) + self.bgp_rib_out_table = is_true(common_config.get('bgp_rib_out_table', 'false')) + self.log_info(f'BMPCfg: update : {self.bgp_neighbor_table}, {self.bgp_rib_in_table}, {self.bgp_rib_out_table}') + + # reset bmp table state once config is changed. + self.stop_bmp() + self.reset_bmp_table() + self.start_bmp() + + + def cfg_handler(self, data): + self.load(data) + + + def stop_bmp(self): + self.log_info('BMPCfg: stop bmp daemon') + subprocess.call(["service", "openbmpd", "stop"]) + + + def reset_bmp_table(self): + self.log_info('BMPCfg: Reset bmp table from state_db') + self.state_db_conn.delete_all_by_pattern(BMP_STATE_DB, 'BGP_NEIGHBOR*') + self.state_db_conn.delete_all_by_pattern(BMP_STATE_DB, 'BGP_RIB_IN_TABLE*') + self.state_db_conn.delete_all_by_pattern(BMP_STATE_DB, 'BGP_RIB_OUT_TABLE*') + + + def start_bmp(self): + self.log_info('BMPCfg: start bmp daemon') + subprocess.call(["service", "openbmpd", "start"]) + + +class BMPCfgDaemon: + def __init__(self): + self.state_db_conn = swsscommon.SonicV2Connector(host=REDIS_HOSTIP) + self.state_db_conn.connect(BMP_STATE_DB) + self.config_db = ConfigDBConnector() + self.config_db.connect(wait_for_init=True, retry_on=True) + self.bmpcfg = BMPCfg(self.state_db_conn) + + def bmp_handler(self, key, op, data): + data = self.config_db.get_table(BMP_TABLE) + self.bmpcfg.cfg_handler(data) + + def register_callbacks(self): + self.config_db.subscribe(BMP_TABLE, + lambda table, key, data: + self.bmp_handler(key, op, data)) + +def signal_handler(sig, frame): + if sig == signal.SIGHUP: + self.log_info("bmpcfgd: signal 'SIGHUP' is caught and ignoring..") + elif sig == signal.SIGINT: + self.log_info("bmpcfgd: signal 'SIGINT' is caught and exiting...") + sys.exit(128 + sig) + elif sig == signal.SIGTERM: + self.log_info("bmpcfgd: signal 'SIGTERM' is caught and exiting...") + sys.exit(128 + sig) + else: + self.log_info("bmpcfgd: invalid signal - ignoring..") + + +def main(): + signal.signal(signal.SIGTERM, signal_handler) + signal.signal(signal.SIGINT, signal_handler) + signal.signal(signal.SIGHUP, signal_handler) + daemon = BMPCfgDaemon() + daemon.register_callbacks() + + +if __name__ == "__main__": + main() diff --git a/src/sonic-bmpcfgd/setup.cfg b/src/sonic-bmpcfgd/setup.cfg new file mode 100644 index 000000000000..1ce2f2f07257 --- /dev/null +++ b/src/sonic-bmpcfgd/setup.cfg @@ -0,0 +1,5 @@ +[aliases] +test=pytest +[tool:pytest] +addopts = --verbose +python_files = tests/*.py \ No newline at end of file diff --git a/src/sonic-bmpcfgd/setup.py b/src/sonic-bmpcfgd/setup.py new file mode 100644 index 000000000000..33c3fd9803e7 --- /dev/null +++ b/src/sonic-bmpcfgd/setup.py @@ -0,0 +1,75 @@ +from __future__ import print_function +import sys +from setuptools import setup +import pkg_resources +from packaging import version + +# sonic_dependencies, version requirement only supports '>=' +sonic_dependencies = ['sonic-py-common', 'sonic-utilities'] +for package in sonic_dependencies: + try: + package_dist = pkg_resources.get_distribution(package.split(">=")[0]) + except pkg_resources.DistributionNotFound: + print(package + " is not found!", file=sys.stderr) + print("Please build and install SONiC python wheels dependencies from sonic-buildimage", file=sys.stderr) + exit(1) + if ">=" in package: + if version.parse(package_dist.version) >= version.parse(package.split(">=")[1]): + continue + print(package + " version not match!", file=sys.stderr) + exit(1) + +setup( + name = 'sonic-bmpcfgd-services', + version = '1.0', + description = 'Python services which run in the bmp container', + license = 'Apache 2.0', + author = 'SONiC Team', + author_email = 'linuxnetdev@microsoft.com', + url = 'https://github.com/Azure/sonic-buildimage', + maintainer = 'Feng Pan', + maintainer_email = 'fenpan@microsoft.com', + packages = setuptools.find_packages(), + scripts = [ + 'scripts/bmpcfgd' + ], + install_requires = [ + 'jinja2>=2.10', + 'netaddr==0.8.0', + 'pyyaml==6.0.1', + 'ipaddress==1.0.23' + ] + sonic_dependencies, + setup_requires = [ + 'pytest-runner', + 'wheel' + ], + tests_require = [ + 'parameterized', + 'pytest', + 'pyfakefs', + 'sonic-py-common', + 'pytest-cov' + ], + extras_require = { + "testing": [ + 'parameterized', + 'pytest', + 'pyfakefs', + 'sonic-py-common' + ] + }, + classifiers = [ + 'Development Status :: 3 - Alpha', + 'Environment :: Console', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: System', + ], + keywords = 'sonic SONiC bmp services', + test_suite = 'setup.get_test_suite' +) diff --git a/src/sonic-bmpcfgd/tests/__init__.py b/src/sonic-bmpcfgd/tests/__init__.py new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/src/sonic-bmpcfgd/tests/bmpcfgd_test.py b/src/sonic-bmpcfgd/tests/bmpcfgd_test.py new file mode 100644 index 000000000000..a6abc6c3b703 --- /dev/null +++ b/src/sonic-bmpcfgd/tests/bmpcfgd_test.py @@ -0,0 +1,116 @@ +import importlib.machinery +import importlib.util +import filecmp +import json +import shutil +import os +import sys +import signal +from swsscommon import swsscommon + +from parameterized import parameterized +from unittest import TestCase, mock +from tests.common.mock_configdb import MockConfigDb, MockDBConnector +from tests.common.mock_bootloader import MockBootloader +from sonic_py_common.general import getstatusoutput_noshell +from .mock_connector import MockConnector +from sonic_py_common.general import load_module_from_source +from mock import patch + +test_path = os.path.dirname(os.path.abspath(__file__)) +modules_path = os.path.dirname(test_path) +scripts_path = os.path.join(modules_path, "scripts") +sys.path.insert(0, modules_path) + +# Load the file under test +bmpcfgd_path = os.path.join(scripts_path, 'bmpcfgd') +bmpcfgd = load_module_from_source('bmpcfgd', bmpcfgd_path) + + +from bmpcfgd import signal_handler + +original_syslog = bmpcfgd.syslog + +# Mock swsscommon classes +bmpcfgd.ConfigDBConnector = MockConfigDb +bmpcfgd.DBConnector = MockDBConnector +bmpcfgd.Table = mock.Mock() +swsscommon.SonicV2Connector = MockConnector + +class TestBMPCfgDaemon(TestCase): + """ + Test bmpcfgd daemon + """ + def setUp(self): + self.test_data = {} + self.test_data['BMP'] = {} + self.test_data['BMP']['table'] = {'bgp_neighbor_table': 'false', 'bgp_rib_in_table': 'false', 'bgp_rib_out_table': 'false'} + + @mock.patch('sonic_installer.bootloader.get_bootloader', side_effect=[MockBootloader()]) + @mock.patch('syslog.syslog') + @mock.patch('subprocess.call') + def test_bmpcfgd_neighbor_enable(self, mock_check_call, mock_syslog, mock_get_bootloader): + self.test_data['BMP']['table']['bgp_neighbor_table'] = 'true' + MockConfigDb.set_config_db(self.test_data) + bmp_config_daemon = bmpcfgd.BMPCfgDaemon() + bmp_config_daemon.register_callbacks() + bmp_config_daemon.bmp_handler("BMP", '', self.test_data) + expected_calls = [ + mock.call(original_syslog.LOG_INFO, 'BMPCfg: update : True, False, False'), + mock.call(original_syslog.LOG_INFO, 'BMPCfg: stop bmp daemon'), + mock.call(original_syslog.LOG_INFO, 'BMPCfg: Reset bmp table from state_db'), + mock.call(original_syslog.LOG_INFO, 'BMPCfg: start bmp daemon'), + ] + mock_syslog.assert_has_calls(expected_calls) + + @mock.patch('sonic_installer.bootloader.get_bootloader', side_effect=[MockBootloader()]) + @mock.patch('syslog.syslog') + @mock.patch('subprocess.check_call') + def test_bmpcfgd_bgp_rib_in_enable(self, mock_check_call, mock_syslog, mock_get_bootloader): + self.test_data['BMP']['table']['bgp_rib_in_table'] = 'true' + MockConfigDb.set_config_db(self.test_data) + bmp_config_daemon = bmpcfgd.BMPCfgDaemon() + bmp_config_daemon.bmp_handler("BMP", '', self.test_data) + expected_calls = [ + mock.call(original_syslog.LOG_INFO, 'BMPCfg: update : False, True, False'), + mock.call(original_syslog.LOG_INFO, 'BMPCfg: stop bmp daemon'), + mock.call(original_syslog.LOG_INFO, 'BMPCfg: Reset bmp table from state_db'), + mock.call(original_syslog.LOG_INFO, 'BMPCfg: start bmp daemon'), + ] + mock_syslog.assert_has_calls(expected_calls) + + @mock.patch('sonic_installer.bootloader.get_bootloader', side_effect=[MockBootloader()]) + @mock.patch('syslog.syslog') + @mock.patch('subprocess.check_call') + def test_bmpcfgd_bgp_rib_out_enable(self, mock_check_call, mock_syslog, mock_get_bootloader): + self.test_data['BMP']['table']['bgp_rib_out_table'] = 'true' + MockConfigDb.set_config_db(self.test_data) + bmp_config_daemon = bmpcfgd.BMPCfgDaemon() + bmp_config_daemon.bmp_handler("BMP", '', self.test_data) + expected_calls = [ + mock.call(original_syslog.LOG_INFO, 'BMPCfg: update : False, False, True'), + mock.call(original_syslog.LOG_INFO, 'BMPCfg: stop bmp daemon'), + mock.call(original_syslog.LOG_INFO, 'BMPCfg: Reset bmp table from state_db'), + mock.call(original_syslog.LOG_INFO, 'BMPCfg: start bmp daemon'), + ] + mock_syslog.assert_has_calls(expected_calls) + + + @mock.patch('syslog.syslog') + @mock.patch.object(sys, 'exit') + def test_signal_handler(self, mock_exit, mock_syslog): + # Test SIGHUP signal + signal_handler(signal.SIGHUP, None) + mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: signal 'SIGHUP' is caught and ignoring..") + mock_exit.assert_not_called() + # Test SIGINT signal + signal_handler(signal.SIGINT, None) + mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: signal 'SIGINT' is caught and exiting...") + mock_exit.assert_called_once_with(128 + signal.SIGINT) + # Test SIGTERM signal + signal_handler(signal.SIGTERM, None) + mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: signal 'SIGTERM' is caught and exiting...") + mock_exit.assert_called_with(128 + signal.SIGTERM) + # Test invalid signal + signal_handler(999, None) + mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: invalid signal - ignoring..") diff --git a/src/sonic-bmpcfgd/tests/common/mock_configdb.py b/src/sonic-bmpcfgd/tests/common/mock_configdb.py new file mode 100644 index 000000000000..d6c3c055bc57 --- /dev/null +++ b/src/sonic-bmpcfgd/tests/common/mock_configdb.py @@ -0,0 +1,162 @@ +class MockConfigDb(object): + """ + Mock Config DB which responds to data tables requests and store updates to the data table + """ + STATE_DB = None + CONFIG_DB = None + event_queue = [] + + def __init__(self, **kwargs): + self.handlers = {} + + @staticmethod + def set_config_db(test_config_db): + MockConfigDb.CONFIG_DB = test_config_db + + @staticmethod + def mod_config_db(test_config_db): + MockConfigDb.CONFIG_DB.update(test_config_db) + + @staticmethod + def deserialize_key(key, separator="|"): + tokens = key.split(separator) + if len(tokens) > 1: + return tuple(tokens) + else: + return key + + @staticmethod + def get_config_db(): + return MockConfigDb.CONFIG_DB + + def connect(self, wait_for_init=True, retry_on=True): + pass + + def close(self, db_name): + pass + + def get(self, db_id, key, field): + return MockConfigDb.CONFIG_DB[key][field] + + def get_entry(self, key, field): + return MockConfigDb.CONFIG_DB[key][field] + + def mod_entry(self, key, field, data): + existing_data = self.get_entry(key, field) + existing_data.update(data) + self.set_entry(key, field, existing_data) + + def set_entry(self, key, field, data): + MockConfigDb.CONFIG_DB[key][field] = data + + def get_table(self, table_name): + data = {} + if table_name in MockConfigDb.CONFIG_DB: + for k, v in MockConfigDb.CONFIG_DB[table_name].items(): + data[self.deserialize_key(k)] = v + return data + + def subscribe(self, table_name, callback): + self.handlers[table_name] = callback + + def publish(self, table_name, key, op, data): + self.handlers[table_name](key, op, data) + + def listen(self, init_data_handler=None): + for e in MockConfigDb.event_queue: + self.handlers[e[0]](e[0], e[1], self.get_entry(e[0], e[1])) + + +class MockSelect(): + + event_queue = [] + OBJECT = "OBJECT" + TIMEOUT = "TIMEOUT" + ERROR = "" + NUM_TIMEOUT_TRIES = 0 + + @staticmethod + def set_event_queue(Q): + MockSelect.event_queue = Q + + @staticmethod + def get_event_queue(): + return MockSelect.event_queue + + @staticmethod + def reset_event_queue(): + MockSelect.event_queue = [] + + def __init__(self): + self.sub_map = {} + self.TIMEOUT = "TIMEOUT" + self.ERROR = "ERROR" + + def addSelectable(self, subscriber): + self.sub_map[subscriber.table] = subscriber + + def select(self, TIMEOUT): + if not MockSelect.get_event_queue() and MockSelect.NUM_TIMEOUT_TRIES == 0: + raise TimeoutError + elif MockSelect.NUM_TIMEOUT_TRIES != 0: + MockSelect.NUM_TIMEOUT_TRIES = MockSelect.NUM_TIMEOUT_TRIES - 1 + return MockSelect.TIMEOUT, 0 + + table, key = MockSelect.get_event_queue().pop(0) + self.sub_map[table].nextKey(key) + return "OBJECT", self.sub_map[table] + + +class MockSubscriberStateTable(): + + FD_INIT = 0 + + @staticmethod + def generate_fd(): + curr = MockSubscriberStateTable.FD_INIT + MockSubscriberStateTable.FD_INIT = curr + 1 + return curr + + @staticmethod + def reset_fd(): + MockSubscriberStateTable.FD_INIT = 0 + + def __init__(self, conn, table, pop=None, pri=None): + self.fd = MockSubscriberStateTable.generate_fd() + self.next_key = '' + self.table = table + + def getFd(self): + return self.fd + + def nextKey(self, key): + print("next key") + self.next_key = key + + def pop(self): + table = MockConfigDb.CONFIG_DB.get(self.table, {}) + print(self.next_key) + if self.next_key not in table: + op = "DEL" + fvs = {} + else: + op = "SET" + fvs = table.get(self.next_key, {}) + return self.next_key, op, fvs + + +class MockDBConnector(): + def __init__(self, db, val, tcpFlag=False, name=None): + self.data = {} + + def hget(self, key, field): + if key not in self.data: + return None + if field not in self.data[key]: + return None + return self.data[key][field] + + def hset(self, key, field, value): + if key not in self.data: + self.data[key] = {} + self.data[key][field] = value diff --git a/src/sonic-bmpcfgd/tests/mock_connector.py b/src/sonic-bmpcfgd/tests/mock_connector.py new file mode 100644 index 000000000000..71490796c823 --- /dev/null +++ b/src/sonic-bmpcfgd/tests/mock_connector.py @@ -0,0 +1,39 @@ +class MockConnector(object): + STATE_DB = None + data = {} + + def __init__(self, host): + pass + + def connect(self, db_id): + pass + + def get(self, db_id, key, field): + return MockConnector.data[key][field] + + def set(self, db_id, key, field, value): + if key not in MockConnector.data: + MockConnector.data[key] = {} + MockConnector.data[key][field] = value + + def keys(self, db_id, pattern): + match = pattern.split('*')[0] + ret = [] + for key in MockConnector.data.keys(): + if match in key: + ret.append(key) + + return ret + + def get_all(self, db_id, key): + return MockConnector.data[key] + + def delete(self, db_id, key): + return MockConnector.data.delete(key) + + def delete_all_by_pattern(self, db_id, pattern): + keys = self.keys(db_id, pattern) + for key in keys: + self.delete(db_id, key) + + diff --git a/src/sonic-config-engine/config_samples.py b/src/sonic-config-engine/config_samples.py index b5b25757b1e8..d72925c843c0 100644 --- a/src/sonic-config-engine/config_samples.py +++ b/src/sonic-config-engine/config_samples.py @@ -150,6 +150,18 @@ def generate_t1_smartswitch_dpu_sample_config(data, ss_config): data['PORT'][port]['admin_status'] = 'up' data['PORT'][port]['mtu'] = '9100' + dash_crm_resources = ["vnet", "eni", "eni_ether_address_map", "ipv4_inbound_routing", "ipv6_inbound_routing", "ipv4_outbound_routing", + "ipv6_outbound_routing", "ipv4_pa_validation", "ipv6_pa_validation", "ipv4_outbound_ca_to_pa", "ipv6_outbound_ca_to_pa", + "ipv4_acl_group", "ipv6_acl_group", "ipv4_acl_rule", "ipv6_acl_rule"] + dash_crm_thresholds = dict([thresholds for res in dash_crm_resources for thresholds in ( + (f"dash_{res}_threshold_type", "percentage"), + (f"dash_{res}_low_threshold", "70"), + (f"dash_{res}_high_threshold", "85") + )]) + + crmconfig = data.setdefault('CRM', {}).setdefault('Config', {}) + crmconfig.update(dash_crm_thresholds) + return data def generate_t1_smartswitch_sample_config(data): diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py index ed557d55ebdb..41fbd383b9ce 100644 --- a/src/sonic-config-engine/minigraph.py +++ b/src/sonic-config-engine/minigraph.py @@ -52,6 +52,7 @@ console_device_types = ['MgmtTsToR'] dhcp_server_enabled_device_types = ['BmcMgmtToRRouter'] mgmt_device_types = ['BmcMgmtToRRouter', 'MgmtToRRouter', 'MgmtTsToR'] +leafrouter_device_types = ['LeafRouter'] # Counters disabled on management devices mgmt_disabled_counters = ["BUFFER_POOL_WATERMARK", "PFCWD", "PG_DROP", "PG_WATERMARK", "PORT_BUFFER_DROP", "QUEUE", "QUEUE_WATERMARK"] @@ -341,14 +342,13 @@ def parse_chassis_deviceinfo_intf_metadata(device_info, chassis_linecards_info, if linecard_name is not None: key = "%s|%s" % (linecard_name, key) system_ports[key] = { - "system_port_id": system_port_id, + "system_port_id": 0, "switch_id": switch_id, "core_index": core_id, "core_port_index": core_port_id, "speed": intf_speed, "num_voq": num_voq } - system_port_id += 1 chassis_port_alias.setdefault(slot_index, {}).update( {(intf_sonic_name, intf_speed): intf_name}) @@ -362,8 +362,14 @@ def parse_chassis_deviceinfo_intf_metadata(device_info, chassis_linecards_info, port_default_speed.setdefault(slot_index, {}).update( {intf_sonic_name: intf_speed}) - return system_ports, chassis_port_alias, port_default_speed + # The above loop with findall("DeviceInterfaceMetadata") was not giving interfaces from minigraph + # in document order. So doing an explict sort so that system_port_ids remain same across LCs + sorted_system_ports = { key:system_ports[key] for key in sorted(system_ports.keys()) } + for k,v in sorted_system_ports.items(): + v["system_port_id"] = system_port_id + system_port_id += 1 + return sorted_system_ports, chassis_port_alias, port_default_speed def parse_chassis_deviceinfo_voq_int_intfs(device_info): @@ -2707,6 +2713,10 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw if current_device and current_device['type'] in mgmt_device_types: results["FLEX_COUNTER_TABLE"] = {counter: {"FLEX_COUNTER_STATUS": "disable"} for counter in mgmt_disabled_counters} + # Enable bgp-suppress-fib by default for leafrouter + if current_device and current_device['type'] in leafrouter_device_types: + results['DEVICE_METADATA']['localhost']['suppress-fib-pending'] = 'enabled' + return results def get_tunnel_entries(tunnel_intfs, tunnel_intfs_qos_remap_config, lo_intfs, tunnel_qos_remap, mux_tunnel_name, peer_switch_ip): diff --git a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/system_ports.json b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/system_ports.json index 0cb7e777b943..eb44ab1cc3f0 100644 --- a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/system_ports.json +++ b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/system_ports.json @@ -1,22 +1,70 @@ { - "str-sonic-lc03|ASIC0|Ethernet0": { + "str-sonic-lc03|ASIC0|Ethernet-IB0": { "system_port_id": 1, "switch_id": 8, "core_index": "1", - "core_port_index": "1", + "core_port_index": "50", "speed": "400000", "num_voq": "8" }, - "str-sonic-lc03|ASIC0|Ethernet8": { + "str-sonic-lc03|ASIC0|Ethernet-Rec0": { "system_port_id": 2, "switch_id": 8, + "core_index": "0", + "core_port_index": "49", + "speed": "400000", + "num_voq": "8" + }, + "str-sonic-lc03|ASIC0|Ethernet0": { + "system_port_id": 3, + "switch_id": 8, "core_index": "1", - "core_port_index": "2", + "core_port_index": "1", + "speed": "400000", + "num_voq": "8" + }, + "str-sonic-lc03|ASIC0|Ethernet104": { + "system_port_id": 4, + "switch_id": 8, + "core_index": "0", + "core_port_index": "14", + "speed": "400000", + "num_voq": "8" + }, + "str-sonic-lc03|ASIC0|Ethernet112": { + "system_port_id": 5, + "switch_id": 8, + "core_index": "0", + "core_port_index": "15", + "speed": "400000", + "num_voq": "8" + }, + "str-sonic-lc03|ASIC0|Ethernet120": { + "system_port_id": 6, + "switch_id": 8, + "core_index": "0", + "core_port_index": "16", + "speed": "400000", + "num_voq": "8" + }, + "str-sonic-lc03|ASIC0|Ethernet128": { + "system_port_id": 7, + "switch_id": 8, + "core_index": "0", + "core_port_index": "17", + "speed": "400000", + "num_voq": "8" + }, + "str-sonic-lc03|ASIC0|Ethernet136": { + "system_port_id": 8, + "switch_id": 8, + "core_index": "0", + "core_port_index": "18", "speed": "400000", "num_voq": "8" }, "str-sonic-lc03|ASIC0|Ethernet16": { - "system_port_id": 3, + "system_port_id": 9, "switch_id": 8, "core_index": "1", "core_port_index": "3", @@ -24,7 +72,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC0|Ethernet24": { - "system_port_id": 4, + "system_port_id": 10, "switch_id": 8, "core_index": "1", "core_port_index": "4", @@ -32,7 +80,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC0|Ethernet32": { - "system_port_id": 5, + "system_port_id": 11, "switch_id": 8, "core_index": "1", "core_port_index": "5", @@ -40,7 +88,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC0|Ethernet40": { - "system_port_id": 6, + "system_port_id": 12, "switch_id": 8, "core_index": "1", "core_port_index": "6", @@ -48,7 +96,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC0|Ethernet48": { - "system_port_id": 7, + "system_port_id": 13, "switch_id": 8, "core_index": "1", "core_port_index": "7", @@ -56,7 +104,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC0|Ethernet56": { - "system_port_id": 8, + "system_port_id": 14, "switch_id": 8, "core_index": "1", "core_port_index": "8", @@ -64,7 +112,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC0|Ethernet64": { - "system_port_id": 9, + "system_port_id": 15, "switch_id": 8, "core_index": "1", "core_port_index": "9", @@ -72,15 +120,23 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC0|Ethernet72": { - "system_port_id": 10, + "system_port_id": 16, "switch_id": 8, "core_index": "0", "core_port_index": "10", "speed": "400000", "num_voq": "8" }, + "str-sonic-lc03|ASIC0|Ethernet8": { + "system_port_id": 17, + "switch_id": 8, + "core_index": "1", + "core_port_index": "2", + "speed": "400000", + "num_voq": "8" + }, "str-sonic-lc03|ASIC0|Ethernet80": { - "system_port_id": 11, + "system_port_id": 18, "switch_id": 8, "core_index": "0", "core_port_index": "11", @@ -88,7 +144,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC0|Ethernet88": { - "system_port_id": 12, + "system_port_id": 19, "switch_id": 8, "core_index": "0", "core_port_index": "12", @@ -96,55 +152,39 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC0|Ethernet96": { - "system_port_id": 13, + "system_port_id": 20, "switch_id": 8, "core_index": "0", "core_port_index": "13", "speed": "400000", "num_voq": "8" }, - "str-sonic-lc03|ASIC0|Ethernet104": { - "system_port_id": 14, - "switch_id": 8, - "core_index": "0", - "core_port_index": "14", - "speed": "400000", - "num_voq": "8" - }, - "str-sonic-lc03|ASIC0|Ethernet112": { - "system_port_id": 15, - "switch_id": 8, - "core_index": "0", - "core_port_index": "15", - "speed": "400000", - "num_voq": "8" - }, - "str-sonic-lc03|ASIC0|Ethernet120": { - "system_port_id": 16, + "str-sonic-lc03|ASIC0|cpu0": { + "system_port_id": 21, "switch_id": 8, - "core_index": "0", - "core_port_index": "16", - "speed": "400000", + "core_index": 0, + "core_port_index": 0, + "speed": "10000", "num_voq": "8" }, - "str-sonic-lc03|ASIC0|Ethernet128": { - "system_port_id": 17, - "switch_id": 8, - "core_index": "0", - "core_port_index": "17", + "str-sonic-lc03|ASIC1|Ethernet-IB1": { + "system_port_id": 22, + "switch_id": 10, + "core_index": "1", + "core_port_index": "50", "speed": "400000", "num_voq": "8" }, - "str-sonic-lc03|ASIC0|Ethernet136": { - "system_port_id": 18, - "switch_id": 8, + "str-sonic-lc03|ASIC1|Ethernet-Rec1": { + "system_port_id": 23, + "switch_id": 10, "core_index": "0", - "core_port_index": "18", + "core_port_index": "49", "speed": "400000", "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet144": { - "system_port_id": 19, + "system_port_id": 24, "switch_id": 10, "core_index": "1", "core_port_index": "1", @@ -152,7 +192,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet152": { - "system_port_id": 20, + "system_port_id": 25, "switch_id": 10, "core_index": "1", "core_port_index": "2", @@ -160,7 +200,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet160": { - "system_port_id": 21, + "system_port_id": 26, "switch_id": 10, "core_index": "1", "core_port_index": "3", @@ -168,7 +208,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet168": { - "system_port_id": 22, + "system_port_id": 27, "switch_id": 10, "core_index": "1", "core_port_index": "4", @@ -176,7 +216,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet176": { - "system_port_id": 23, + "system_port_id": 28, "switch_id": 10, "core_index": "1", "core_port_index": "5", @@ -184,7 +224,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet184": { - "system_port_id": 24, + "system_port_id": 29, "switch_id": 10, "core_index": "1", "core_port_index": "6", @@ -192,7 +232,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet192": { - "system_port_id": 25, + "system_port_id": 30, "switch_id": 10, "core_index": "1", "core_port_index": "7", @@ -200,7 +240,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet200": { - "system_port_id": 26, + "system_port_id": 31, "switch_id": 10, "core_index": "1", "core_port_index": "8", @@ -208,7 +248,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet208": { - "system_port_id": 27, + "system_port_id": 32, "switch_id": 10, "core_index": "1", "core_port_index": "9", @@ -216,7 +256,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet216": { - "system_port_id": 28, + "system_port_id": 33, "switch_id": 10, "core_index": "0", "core_port_index": "10", @@ -224,7 +264,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet224": { - "system_port_id": 29, + "system_port_id": 34, "switch_id": 10, "core_index": "0", "core_port_index": "11", @@ -232,7 +272,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet232": { - "system_port_id": 30, + "system_port_id": 35, "switch_id": 10, "core_index": "0", "core_port_index": "12", @@ -240,7 +280,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet240": { - "system_port_id": 31, + "system_port_id": 36, "switch_id": 10, "core_index": "0", "core_port_index": "13", @@ -248,7 +288,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet248": { - "system_port_id": 32, + "system_port_id": 37, "switch_id": 10, "core_index": "0", "core_port_index": "14", @@ -256,7 +296,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet256": { - "system_port_id": 33, + "system_port_id": 38, "switch_id": 10, "core_index": "0", "core_port_index": "15", @@ -264,7 +304,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet264": { - "system_port_id": 34, + "system_port_id": 39, "switch_id": 10, "core_index": "0", "core_port_index": "16", @@ -272,7 +312,7 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet272": { - "system_port_id": 35, + "system_port_id": 40, "switch_id": 10, "core_index": "0", "core_port_index": "17", @@ -280,2099 +320,2059 @@ "num_voq": "8" }, "str-sonic-lc03|ASIC1|Ethernet280": { - "system_port_id": 36, + "system_port_id": 41, "switch_id": 10, "core_index": "0", "core_port_index": "18", "speed": "400000", "num_voq": "8" }, - "str-sonic-lc03|ASIC0|cpu0": { - "system_port_id": 37, - "switch_id": 8, - "core_index": 0, - "core_port_index": 0, - "speed": "10000", - "num_voq": "8" - }, "str-sonic-lc03|ASIC1|cpu1": { - "system_port_id": 38, + "system_port_id": 42, "switch_id": 10, "core_index": 0, "core_port_index": 0, "speed": "10000", "num_voq": "8" }, - "str-sonic-lc03|ASIC0|Ethernet-Rec0": { - "system_port_id": 39, - "switch_id": 8, - "core_index": "0", - "core_port_index": "49", - "speed": "400000", - "num_voq": "8" - }, - "str-sonic-lc03|ASIC1|Ethernet-Rec1": { - "system_port_id": 40, - "switch_id": 10, - "core_index": "0", - "core_port_index": "49", - "speed": "400000", - "num_voq": "8" - }, - "str-sonic-lc03|ASIC0|Ethernet-IB0": { - "system_port_id": 41, - "switch_id": 8, - "core_index": "1", - "core_port_index": "50", - "speed": "400000", - "num_voq": "8" - }, - "str-sonic-lc03|ASIC1|Ethernet-IB1": { - "system_port_id": 42, - "switch_id": 10, + "str-sonic-lc04|ASIC0|Ethernet-IB0": { + "system_port_id": 43, + "switch_id": 12, "core_index": "1", "core_port_index": "50", "speed": "400000", "num_voq": "8" }, - "str-sonic-lc04|ASIC0|Ethernet0": { - "system_port_id": 43, - "switch_id": 12, - "core_index": "0", - "core_port_index": "1", - "speed": "100000", - "num_voq": "8" - }, - "str-sonic-lc04|ASIC0|Ethernet4": { + "str-sonic-lc04|ASIC0|Ethernet-Rec0": { "system_port_id": 44, "switch_id": 12, "core_index": "0", - "core_port_index": "2", - "speed": "100000", + "core_port_index": "49", + "speed": "400000", "num_voq": "8" }, - "str-sonic-lc04|ASIC0|Ethernet8": { + "str-sonic-lc04|ASIC0|Ethernet0": { "system_port_id": 45, "switch_id": 12, "core_index": "0", - "core_port_index": "3", + "core_port_index": "1", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc04|ASIC0|Ethernet12": { + "str-sonic-lc04|ASIC0|Ethernet100": { "system_port_id": 46, "switch_id": 12, - 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"core_index": "0", - "core_port_index": "12", + "core_index": "1", + "core_port_index": "33", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet48": { + "str-sonic-lc10|ASIC0|Ethernet132": { "system_port_id": 358, "switch_id": 36, - "core_index": "0", - "core_port_index": "13", + "core_index": "1", + "core_port_index": "34", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet52": { + "str-sonic-lc10|ASIC0|Ethernet136": { "system_port_id": 359, "switch_id": 36, - "core_index": "0", - "core_port_index": "14", + "core_index": "1", + "core_port_index": "35", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet56": { + "str-sonic-lc10|ASIC0|Ethernet140": { "system_port_id": 360, "switch_id": 36, - "core_index": "0", - "core_port_index": "15", + "core_index": "1", + "core_port_index": "36", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet60": { + "str-sonic-lc10|ASIC0|Ethernet144": { "system_port_id": 361, "switch_id": 36, - "core_index": "0", - "core_port_index": "16", + "core_index": "1", + "core_port_index": "37", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet64": { + "str-sonic-lc10|ASIC0|Ethernet148": { "system_port_id": 362, "switch_id": 36, - "core_index": "0", - "core_port_index": "17", + "core_index": "1", + "core_port_index": "38", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet68": { + "str-sonic-lc10|ASIC0|Ethernet152": { "system_port_id": 363, "switch_id": 36, - "core_index": "0", - "core_port_index": "18", + "core_index": "1", + "core_port_index": "39", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet72": { + "str-sonic-lc10|ASIC0|Ethernet156": { "system_port_id": 364, "switch_id": 36, - "core_index": "0", - "core_port_index": "19", + "core_index": "1", + "core_port_index": "40", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet76": { + "str-sonic-lc10|ASIC0|Ethernet16": { "system_port_id": 365, "switch_id": 36, "core_index": "0", - "core_port_index": "20", + "core_port_index": "5", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet80": { + "str-sonic-lc10|ASIC0|Ethernet160": { "system_port_id": 366, "switch_id": 36, - "core_index": "0", - "core_port_index": "21", + "core_index": "1", + "core_port_index": "41", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet84": { + "str-sonic-lc10|ASIC0|Ethernet164": { "system_port_id": 367, "switch_id": 36, - "core_index": "0", - "core_port_index": "22", + "core_index": "1", + "core_port_index": "42", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet88": { + "str-sonic-lc10|ASIC0|Ethernet168": { "system_port_id": 368, "switch_id": 36, - "core_index": "0", - "core_port_index": "23", + "core_index": "1", + "core_port_index": "43", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet92": { + "str-sonic-lc10|ASIC0|Ethernet172": { "system_port_id": 369, "switch_id": 36, - "core_index": "0", - "core_port_index": "24", + "core_index": "1", + "core_port_index": "44", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet96": { + "str-sonic-lc10|ASIC0|Ethernet176": { "system_port_id": 370, "switch_id": 36, "core_index": "1", - "core_port_index": "25", + "core_port_index": "45", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet100": { + "str-sonic-lc10|ASIC0|Ethernet180": { "system_port_id": 371, "switch_id": 36, "core_index": "1", - "core_port_index": "26", + "core_port_index": "46", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet104": { + "str-sonic-lc10|ASIC0|Ethernet184": { "system_port_id": 372, "switch_id": 36, "core_index": "1", - "core_port_index": "27", + "core_port_index": "47", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet108": { + "str-sonic-lc10|ASIC0|Ethernet188": { "system_port_id": 373, "switch_id": 36, "core_index": "1", - "core_port_index": "28", + "core_port_index": "48", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet112": { + "str-sonic-lc10|ASIC0|Ethernet20": { "system_port_id": 374, "switch_id": 36, - "core_index": "1", - "core_port_index": "29", + "core_index": "0", + "core_port_index": "6", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet116": { + "str-sonic-lc10|ASIC0|Ethernet24": { "system_port_id": 375, "switch_id": 36, - "core_index": "1", - "core_port_index": "30", + "core_index": "0", + "core_port_index": "7", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet120": { + "str-sonic-lc10|ASIC0|Ethernet28": { "system_port_id": 376, "switch_id": 36, - "core_index": "1", - "core_port_index": "31", + "core_index": "0", + "core_port_index": "8", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet124": { + "str-sonic-lc10|ASIC0|Ethernet32": { "system_port_id": 377, "switch_id": 36, - "core_index": "1", - "core_port_index": "32", + "core_index": "0", + "core_port_index": "9", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet128": { + "str-sonic-lc10|ASIC0|Ethernet36": { "system_port_id": 378, "switch_id": 36, - "core_index": "1", - "core_port_index": "33", + "core_index": "0", + "core_port_index": "10", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet132": { + "str-sonic-lc10|ASIC0|Ethernet4": { "system_port_id": 379, "switch_id": 36, - "core_index": "1", - "core_port_index": "34", + "core_index": "0", + "core_port_index": "2", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet136": { + "str-sonic-lc10|ASIC0|Ethernet40": { "system_port_id": 380, "switch_id": 36, - "core_index": "1", - "core_port_index": "35", + "core_index": "0", + "core_port_index": "11", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet140": { + "str-sonic-lc10|ASIC0|Ethernet44": { "system_port_id": 381, "switch_id": 36, - "core_index": "1", - "core_port_index": "36", + "core_index": "0", + "core_port_index": "12", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet144": { + "str-sonic-lc10|ASIC0|Ethernet48": { "system_port_id": 382, "switch_id": 36, - "core_index": "1", - "core_port_index": "37", + "core_index": "0", + "core_port_index": "13", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet148": { + "str-sonic-lc10|ASIC0|Ethernet52": { "system_port_id": 383, "switch_id": 36, - "core_index": "1", - "core_port_index": "38", + "core_index": "0", + "core_port_index": "14", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet152": { + "str-sonic-lc10|ASIC0|Ethernet56": { "system_port_id": 384, "switch_id": 36, - "core_index": "1", - "core_port_index": "39", + "core_index": "0", + "core_port_index": "15", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet156": { + "str-sonic-lc10|ASIC0|Ethernet60": { "system_port_id": 385, "switch_id": 36, - "core_index": "1", - "core_port_index": "40", + "core_index": "0", + "core_port_index": "16", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet160": { + "str-sonic-lc10|ASIC0|Ethernet64": { "system_port_id": 386, "switch_id": 36, - "core_index": "1", - "core_port_index": "41", + "core_index": "0", + "core_port_index": "17", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet164": { + "str-sonic-lc10|ASIC0|Ethernet68": { "system_port_id": 387, "switch_id": 36, - "core_index": "1", - "core_port_index": "42", + "core_index": "0", + "core_port_index": "18", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet168": { + "str-sonic-lc10|ASIC0|Ethernet72": { "system_port_id": 388, "switch_id": 36, - "core_index": "1", - "core_port_index": "43", + "core_index": "0", + "core_port_index": "19", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet172": { + "str-sonic-lc10|ASIC0|Ethernet76": { "system_port_id": 389, "switch_id": 36, - "core_index": "1", - "core_port_index": "44", + "core_index": "0", + "core_port_index": "20", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet176": { + "str-sonic-lc10|ASIC0|Ethernet8": { "system_port_id": 390, "switch_id": 36, - "core_index": "1", - "core_port_index": "45", + "core_index": "0", + "core_port_index": "3", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet180": { + "str-sonic-lc10|ASIC0|Ethernet80": { "system_port_id": 391, "switch_id": 36, - "core_index": "1", - "core_port_index": "46", + "core_index": "0", + "core_port_index": "21", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet184": { + "str-sonic-lc10|ASIC0|Ethernet84": { "system_port_id": 392, "switch_id": 36, - "core_index": "1", - "core_port_index": "47", + "core_index": "0", + "core_port_index": "22", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet188": { + "str-sonic-lc10|ASIC0|Ethernet88": { "system_port_id": 393, "switch_id": 36, - "core_index": "1", - "core_port_index": "48", + "core_index": "0", + "core_port_index": "23", "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|cpu0": { + "str-sonic-lc10|ASIC0|Ethernet92": { "system_port_id": 394, "switch_id": 36, - "core_index": 0, - "core_port_index": 0, - "speed": "10000", + "core_index": "0", + "core_port_index": "24", + "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet-Rec0": { + "str-sonic-lc10|ASIC0|Ethernet96": { "system_port_id": 395, "switch_id": 36, - "core_index": "0", - "core_port_index": "49", - "speed": "400000", + "core_index": "1", + "core_port_index": "25", + "speed": "100000", "num_voq": "8" }, - "str-sonic-lc10|ASIC0|Ethernet-IB0": { + "str-sonic-lc10|ASIC0|cpu0": { "system_port_id": 396, "switch_id": 36, - "core_index": "1", - "core_port_index": "50", - "speed": "400000", + "core_index": 0, + "core_port_index": 0, + "speed": "10000", "num_voq": "8" } } diff --git a/src/sonic-config-engine/tests/sample-chassis-packet-lc-graph.xml b/src/sonic-config-engine/tests/sample-chassis-packet-lc-graph.xml index c0a69c29e04e..b2dfa5d9db30 100644 --- a/src/sonic-config-engine/tests/sample-chassis-packet-lc-graph.xml +++ b/src/sonic-config-engine/tests/sample-chassis-packet-lc-graph.xml @@ -146,11 +146,6 @@ - - - Eth1/1/47 - 27.1.1.1/24 - @@ -206,11 +201,6 @@ - - - Eth1/1/47 - 27.1.1.1/24 - @@ -261,13 +251,6 @@ - - DeviceInterfaceLink - IXIA-EBGP - Ethernet1 - str2-8808-lc2-1 - Eth1/1/47 - DeviceInterfaceLink 100000 @@ -402,20 +385,6 @@ true - - DeviceInterface - - true - true - 1 - Ethernet1/1/47 - - false - 47 - 0 - 100000 - Ethernet47 - true 0 diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf index 2c146698a960..3828af13fd71 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf @@ -42,6 +42,7 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.0.0/27 router bgp 65100 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf index d793dfa39a98..45cd03a540a8 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf @@ -53,6 +53,7 @@ route-map HIDE_INTERNAL permit 10 router bgp 65100 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf index 364a2c34bcaa..eda11ab9f285 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf @@ -42,6 +42,7 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.0.0/27 router bgp 65100 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy coalesce-time 10000 diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf index 94bd37e3b90f..8daeff2a61e9 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf @@ -53,6 +53,7 @@ route-map HIDE_INTERNAL permit 10 router bgp 65100 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json index 35b9c69d424e..661fd8cc28c5 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json @@ -75,7 +75,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, "BUFFER_PG": { diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json index ebca473bc48a..8a1163f95f72 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json @@ -75,7 +75,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, "BUFFER_PG": { diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json index 6ab0f7c6867d..b82f36fdda28 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json @@ -45,7 +45,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json index ba77ebdcfc64..7d7af2c6836c 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json @@ -45,7 +45,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json index 4ed219574116..7e39255e71d4 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json +++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json @@ -45,7 +45,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json index 7b81862068e8..010a8677eed9 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json +++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json @@ -45,7 +45,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py2/frr.conf b/src/sonic-config-engine/tests/sample_output/py2/frr.conf index 2653f8fc0893..032adb8c5106 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/frr.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/frr.conf @@ -62,6 +62,7 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.0.0/27 router bgp 65100 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json b/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json index ad978b8865a7..abcfa56eaea9 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json +++ b/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json @@ -8,6 +8,20 @@ }, "OP": "SET" }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:192.168.0.0/27" : { + "term_type":"MP2MP", + "subnet_type": "vlan" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:192.168.200.0/27" : { + "term_type":"MP2MP", + "subnet_type": "vlan" + }, + "OP": "SET" + }, { "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : { "tunnel_type":"IPINIP", diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf index 20744efaa40f..32a9abf88bac 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf @@ -58,6 +58,7 @@ ip prefix-list PL_LoopbackV4 permit 4.0.0.0/32 router bgp 4000 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf index 8bb483456829..4cdb8bceaba6 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf @@ -22,6 +22,7 @@ log facility local4 ! vrf VnetFE vni 9000 +exit ! ! ! Enable nht through default route diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf index 402230348a4a..ca56e9ca0fdd 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf @@ -22,6 +22,7 @@ log facility local4 ! vrf VnetFE vni 8000 +exit ! ! ! Enable nht through default route diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf index e7534d4b9781..e5ad8964454a 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf @@ -42,6 +42,7 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.200.0/27 router bgp 65100 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf index d793dfa39a98..45cd03a540a8 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf @@ -53,6 +53,7 @@ route-map HIDE_INTERNAL permit 10 router bgp 65100 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf index 4f606b80838c..0ada9a4f8d60 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf @@ -42,6 +42,7 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.200.0/27 router bgp 65100 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy coalesce-time 10000 diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf index 94bd37e3b90f..8daeff2a61e9 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf @@ -53,6 +53,7 @@ route-map HIDE_INTERNAL permit 10 router bgp 65100 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json index 35b9c69d424e..661fd8cc28c5 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json @@ -75,7 +75,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, "BUFFER_PG": { diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json index ebca473bc48a..8a1163f95f72 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json @@ -75,7 +75,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, "BUFFER_PG": { diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json index 6ab0f7c6867d..b82f36fdda28 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json @@ -45,7 +45,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json index ba77ebdcfc64..7d7af2c6836c 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json @@ -45,7 +45,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json index 4ed219574116..7e39255e71d4 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json @@ -45,7 +45,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json index 7b81862068e8..010a8677eed9 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json @@ -45,7 +45,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py3/frr.conf b/src/sonic-config-engine/tests/sample_output/py3/frr.conf index 5b7eacefe8ba..d0821f1b11ca 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/frr.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/frr.conf @@ -62,6 +62,7 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.200.0/27 router bgp 65100 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json b/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json index ad978b8865a7..abcfa56eaea9 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json +++ b/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json @@ -8,6 +8,20 @@ }, "OP": "SET" }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:192.168.0.0/27" : { + "term_type":"MP2MP", + "subnet_type": "vlan" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:192.168.200.0/27" : { + "term_type":"MP2MP", + "subnet_type": "vlan" + }, + "OP": "SET" + }, { "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : { "tunnel_type":"IPINIP", diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64-remap-disabled.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64-remap-disabled.json index 6e15d72074ff..d3abbd4da38e 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64-remap-disabled.json +++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64-remap-disabled.json @@ -345,12 +345,12 @@ "wred_yellow_enable" : "true", "wred_red_enable" : "true", "ecn" : "ecn_all", - "green_max_threshold" : "2097152", - "green_min_threshold" : "1048576", - "yellow_max_threshold" : "2097152", - "yellow_min_threshold" : "1048576", - "red_max_threshold" : "2097152", - "red_min_threshold" : "1048576", + "green_max_threshold" : "10000000", + "green_min_threshold" : "2000000", + "yellow_max_threshold" : "10000000", + "yellow_min_threshold" : "2000000", + "red_max_threshold" : "10000000", + "red_min_threshold" : "2000000", "green_drop_probability" : "5", "yellow_drop_probability": "5", "red_drop_probability" : "5" diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64.json index df3e773b7328..c09f14c4bc90 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64.json +++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64.json @@ -411,12 +411,12 @@ "wred_yellow_enable" : "true", "wred_red_enable" : "true", "ecn" : "ecn_all", - "green_max_threshold" : "2097152", - "green_min_threshold" : "1048576", - "yellow_max_threshold" : "2097152", - "yellow_min_threshold" : "1048576", - "red_max_threshold" : "2097152", - "red_min_threshold" : "1048576", + "green_max_threshold" : "10000000", + "green_min_threshold" : "2000000", + "yellow_max_threshold" : "10000000", + "yellow_min_threshold" : "2000000", + "red_max_threshold" : "10000000", + "red_min_threshold" : "2000000", "green_drop_probability" : "5", "yellow_drop_probability": "5", "red_drop_probability" : "5" diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0-remap-disabled.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0-remap-disabled.json index a131d36a5f82..3b205e0a1226 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0-remap-disabled.json +++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0-remap-disabled.json @@ -316,12 +316,12 @@ "wred_yellow_enable" : "true", "wred_red_enable" : "true", "ecn" : "ecn_all", - "green_max_threshold" : "2097152", - "green_min_threshold" : "1048576", - "yellow_max_threshold" : "2097152", - "yellow_min_threshold" : "1048576", - "red_max_threshold" : "2097152", - "red_min_threshold" : "1048576", + "green_max_threshold" : "10000000", + "green_min_threshold" : "2000000", + "yellow_max_threshold" : "10000000", + "yellow_min_threshold" : "2000000", + "red_max_threshold" : "10000000", + "red_min_threshold" : "2000000", "green_drop_probability" : "5", "yellow_drop_probability": "5", "red_drop_probability" : "5" diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0.json index 6c15a0fd9803..14cdb37ab994 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0.json +++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0.json @@ -507,12 +507,12 @@ "wred_yellow_enable" : "true", "wred_red_enable" : "true", "ecn" : "ecn_all", - "green_max_threshold" : "2097152", - "green_min_threshold" : "1048576", - "yellow_max_threshold" : "2097152", - "yellow_min_threshold" : "1048576", - "red_max_threshold" : "2097152", - "red_min_threshold" : "1048576", + "green_max_threshold" : "10000000", + "green_min_threshold" : "2000000", + "yellow_max_threshold" : "10000000", + "yellow_min_threshold" : "2000000", + "red_max_threshold" : "10000000", + "red_min_threshold" : "2000000", "green_drop_probability" : "5", "yellow_drop_probability": "5", "red_drop_probability" : "5" diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf index 20744efaa40f..32a9abf88bac 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf @@ -58,6 +58,7 @@ ip prefix-list PL_LoopbackV4 permit 4.0.0.0/32 router bgp 4000 ! bgp log-neighbor-changes + bgp suppress-fib-pending no bgp default ipv4-unicast no bgp ebgp-requires-policy ! diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf index b55906056616..67f4f030de0b 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf @@ -22,6 +22,7 @@ log facility local4 ! vrf VnetFE vni 9000 +exit ! ! ! Enable nht through default route diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf index 19e303639a55..3b7b1f727a2a 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf @@ -22,6 +22,7 @@ log facility local4 ! vrf VnetFE vni 8000 +exit ! ! ! Enable nht through default route diff --git a/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json b/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json index 23a29ba6ed7c..9421f40c3493 100644 --- a/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json +++ b/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json @@ -23,5 +23,54 @@ "FLEX_COUNTER_DELAY_STATUS": "true", "POLL_INTERVAL": "10000" } + }, + "CRM": { + "Config": { + "dash_vnet_threshold_type": "percentage", + "dash_vnet_low_threshold": "70", + "dash_vnet_high_threshold": "85", + "dash_eni_threshold_type": "percentage", + "dash_eni_low_threshold": "70", + "dash_eni_high_threshold": "85", + "dash_eni_ether_address_map_threshold_type": "percentage", + "dash_eni_ether_address_map_low_threshold": "70", + "dash_eni_ether_address_map_high_threshold": "85", + "dash_ipv4_inbound_routing_threshold_type": "percentage", + "dash_ipv4_inbound_routing_low_threshold": "70", + "dash_ipv4_inbound_routing_high_threshold": "85", + "dash_ipv6_inbound_routing_threshold_type": "percentage", + "dash_ipv6_inbound_routing_low_threshold": "70", + "dash_ipv6_inbound_routing_high_threshold": "85", + "dash_ipv4_outbound_routing_threshold_type": "percentage", + "dash_ipv4_outbound_routing_low_threshold": "70", + "dash_ipv4_outbound_routing_high_threshold": "85", + "dash_ipv6_outbound_routing_threshold_type": "percentage", + "dash_ipv6_outbound_routing_low_threshold": "70", + "dash_ipv6_outbound_routing_high_threshold": "85", + "dash_ipv4_pa_validation_threshold_type": "percentage", + "dash_ipv4_pa_validation_low_threshold": "70", + "dash_ipv4_pa_validation_high_threshold": "85", + "dash_ipv6_pa_validation_threshold_type": "percentage", + "dash_ipv6_pa_validation_low_threshold": "70", + "dash_ipv6_pa_validation_high_threshold": "85", + "dash_ipv4_outbound_ca_to_pa_threshold_type": "percentage", + "dash_ipv4_outbound_ca_to_pa_low_threshold": "70", + "dash_ipv4_outbound_ca_to_pa_high_threshold": "85", + "dash_ipv6_outbound_ca_to_pa_threshold_type": "percentage", + "dash_ipv6_outbound_ca_to_pa_low_threshold": "70", + "dash_ipv6_outbound_ca_to_pa_high_threshold": "85", + "dash_ipv4_acl_group_threshold_type": "percentage", + "dash_ipv4_acl_group_low_threshold": "70", + "dash_ipv4_acl_group_high_threshold": "85", + "dash_ipv6_acl_group_threshold_type": "percentage", + "dash_ipv6_acl_group_low_threshold": "70", + "dash_ipv6_acl_group_high_threshold": "85", + "dash_ipv4_acl_rule_threshold_type": "percentage", + "dash_ipv4_acl_rule_low_threshold": "70", + "dash_ipv4_acl_rule_high_threshold": "85", + "dash_ipv6_acl_rule_threshold_type": "percentage", + "dash_ipv6_acl_rule_low_threshold": "70", + "dash_ipv6_acl_rule_high_threshold": "85" + } } } diff --git a/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf index be261bab99a8..f4d987989c38 100644 --- a/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf @@ -10,6 +10,7 @@ enable password zebra ! vrf VnetFE vni 8000 +exit ! ! ! Enable nht through default route diff --git a/src/sonic-config-engine/tests/sample_output/t2-switch-masic1.json b/src/sonic-config-engine/tests/sample_output/t2-switch-masic1.json new file mode 100644 index 000000000000..c88d4c6997ff --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/t2-switch-masic1.json @@ -0,0 +1,11 @@ +[ + { + "SWITCH_TABLE:switch": { + "ecmp_hash_seed": "26", + "lag_hash_seed": "26", + "fdb_aging_time": "600", + "ordered_ecmp": "false" + }, + "OP": "SET" + } +] diff --git a/src/sonic-config-engine/tests/sample_output/t2-switch-masic3.json b/src/sonic-config-engine/tests/sample_output/t2-switch-masic3.json new file mode 100644 index 000000000000..2e5e3fbf4b94 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/t2-switch-masic3.json @@ -0,0 +1,11 @@ +[ + { + "SWITCH_TABLE:switch": { + "ecmp_hash_seed": "28", + "lag_hash_seed": "28", + "fdb_aging_time": "600", + "ordered_ecmp": "false" + }, + "OP": "SET" + } +] diff --git a/src/sonic-config-engine/tests/test_cfggen.py b/src/sonic-config-engine/tests/test_cfggen.py index 19e0af5cd4dd..1ef66030244f 100644 --- a/src/sonic-config-engine/tests/test_cfggen.py +++ b/src/sonic-config-engine/tests/test_cfggen.py @@ -1020,15 +1020,26 @@ def test_minigraph_dhcp(self): "'Vlan2000': {'dhcpv6_servers': ['fc02:2000::3', 'fc02:2000::4']}}" ) ) - - def test_minigraph_packet_chassis_acl(self): - argument = ['-m', self.packet_chassis_graph, '-p', self.packet_chassis_port_ini, '-v', "ACL_TABLE"] + + def test_minigraph_packet_chassis_acl_local_host(self): + # CFGGEN_UNIT_TESTING is set to '2' in the set_up function + # this causes the port_table to have ports from the previous test + # causing yang validation to fail + + os.environ["CFGGEN_UNIT_TESTING"] = "" + argument = ['-m', self.packet_chassis_graph, '-v', "ACL_TABLE"] output = self.run_script(argument) + print(output) self.assertEqual( utils.to_dict(output.strip()), utils.to_dict("{'SNMP_ACL': {'policy_desc': 'SNMP_ACL', 'type': 'CTRLPLANE', 'stage': 'ingress', 'services': ['SNMP']}, 'SSH_ONLY': {'policy_desc': 'SSH_ONLY', 'type': 'CTRLPLANE', 'stage': 'ingress', 'services': ['SSH']}}") ) + # set it back to the original value + os.environ["CFGGEN_UNIT_TESTING"] = "2" + + def test_minigraph_packet_chassis_acl_namespace(self): + argument = ['-m', self.packet_chassis_graph, '-p', self.packet_chassis_port_ini, '-n', "asic1", '-v', "ACL_TABLE"] output = self.run_script(argument) self.assertEqual( @@ -1045,20 +1056,13 @@ def test_minigraph_bgp_packet_chassis_peer(self): ) def test_minigraph_bgp_packet_chassis_static_route(self): - argument = ['-m', self.packet_chassis_graph, '-p', self.packet_chassis_port_ini, '-v', "STATIC_ROUTE"] - output = self.run_script(argument) - self.assertEqual( - utils.to_dict(output.strip()), - utils.to_dict("{'8.0.0.1/32': {'nexthop': '192.168.1.2,192.168.2.2', 'ifname': 'PortChannel40,PortChannel50', 'advertise':'false', 'bfd':'true'}}") - ) - argument = ['-m', self.packet_chassis_graph, '-p', self.packet_chassis_port_ini, '-n', "asic1", '-v', "STATIC_ROUTE"] output = self.run_script(argument) self.assertEqual( utils.to_dict(output.strip()), utils.to_dict("{'8.0.0.1/32': {'nexthop': '192.168.1.2,192.168.2.2', 'ifname': 'PortChannel40,PortChannel50', 'advertise':'false', 'bfd':'true'}}") ) - + os.environ["CFGGEN_UNIT_TESTING_TOPOLOGY"] = "" def test_minigraph_bgp_packet_chassis_vlan_subintf(self): argument = ['-m', self.packet_chassis_graph, '-p', self.packet_chassis_port_ini, '-n', "asic1", '-v', "VLAN_SUB_INTERFACE"] output = self.run_script(argument) diff --git a/src/sonic-config-engine/tests/test_cfggen_from_yang.py b/src/sonic-config-engine/tests/test_cfggen_from_yang.py index 48b970df8204..7caf1425e1ad 100644 --- a/src/sonic-config-engine/tests/test_cfggen_from_yang.py +++ b/src/sonic-config-engine/tests/test_cfggen_from_yang.py @@ -272,7 +272,9 @@ def test_fabric_monitor_data_table(self): "monErrThreshCrcCells": "1", "monErrThreshRxCells": "61035156", "monPollThreshIsolation": "1", - "monPollThreshRecovery": "8" + "monPollThreshRecovery": "8", + "monCapacityThreshWarn": "10", + "monState": "enable" } }) @@ -283,6 +285,7 @@ def test_fabric_port_table(self): "Fabric0": { "alias": "Fabric0", "isolateStatus": "False", - "lanes": "0" + "lanes": "0", + "forceUnisolateStatus": "0" } }) diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py index ed8ed58e488a..2f424f6c3949 100644 --- a/src/sonic-config-engine/tests/test_j2files.py +++ b/src/sonic-config-engine/tests/test_j2files.py @@ -47,6 +47,7 @@ def setUp(self): self.no_ip_helper_minigraph = os.path.join(self.test_dir, 't0-sample-no-ip-helper-graph.xml') self.nokia_ixr7250e_36x100g_t2_minigraph = os.path.join(self.test_dir, 'sample-nokia-ixr7250e-36x100g-t2-minigraph.xml') self.nokia_ixr7250e_36x400g_t2_minigraph = os.path.join(self.test_dir, 'sample-nokia-ixr7250e-36x400g-t2-minigraph.xml') + self.t2_sample_graph_chassis_packet = os.path.join(self.test_dir, 'sample-chassis-packet-lc-graph.xml') self.output_file = os.path.join(self.test_dir, 'output') os.environ["CFGGEN_UNIT_TESTING"] = "2" @@ -753,6 +754,36 @@ def test_swss_switch_render_template_multi_asic(self): assert utils.cmp(sample_output_file, self.output_file), self.run_diff(sample_output_file, self.output_file) os.environ["NAMESPACE_ID"] = "" + def test_swss_switch_render_template_t2(self): + # verify the ECMP hash seed changes per namespace + switch_template = os.path.join( + self.test_dir, '..', '..', '..', 'dockers', 'docker-orchagent', + 'switch.json.j2' + ) + constants_yml = os.path.join( + self.test_dir, '..', '..', '..', 'files', 'image_config', + 'constants', 'constants.yml' + ) + test_list = { + "0": { + "namespace_id": "1", + "output": "t2-switch-masic1.json" + }, + "1": { + "namespace_id": "3", + "output": "t2-switch-masic3.json" + }, + } + for _, v in test_list.items(): + os.environ["NAMESPACE_ID"] = v["namespace_id"] + argument = ["-m", self.t2_sample_graph_chassis_packet, "-y", constants_yml, "-t", switch_template] + sample_output_file = os.path.join( + self.test_dir, 'sample_output', v["output"] + ) + self.run_script(argument, output_file=self.output_file) + assert utils.cmp(sample_output_file, self.output_file), self.run_diff(sample_output_file, self.output_file) + os.environ["NAMESPACE_ID"] = "" + def test_ndppd_conf(self): conf_template = os.path.join(self.test_dir, "ndppd.conf.j2") vlan_interfaces_json = os.path.join(self.test_dir, "data", "ndppd", "vlan_interfaces.json") diff --git a/src/sonic-config-engine/tests/test_yang_data.json b/src/sonic-config-engine/tests/test_yang_data.json index 8126e7bc264a..b5cd43c717f5 100644 --- a/src/sonic-config-engine/tests/test_yang_data.json +++ b/src/sonic-config-engine/tests/test_yang_data.json @@ -378,7 +378,9 @@ "monErrThreshCrcCells": "1", "monErrThreshRxCells": "61035156", "monPollThreshIsolation": "1", - "monPollThreshRecovery": "8" + "monPollThreshRecovery": "8", + "monCapacityThreshWarn": "10", + "monState": "enable" } } }, @@ -389,7 +391,8 @@ "name": "Fabric0", "alias": "Fabric0", "isolateStatus": "False", - "lanes": "0" + "lanes": "0", + "forceUnisolateStatus": "0" } ] } diff --git a/src/sonic-dash-api b/src/sonic-dash-api index 39e4a6319542..0b33087d82c2 160000 --- a/src/sonic-dash-api +++ b/src/sonic-dash-api @@ -1 +1 @@ -Subproject commit 39e4a63195423a18789a209bbec0cb8531215d3a +Subproject commit 0b33087d82c2d297aadd75b2862fbd11a2fce386 diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list index b526724a7819..a4c904a3e125 100644 --- a/src/sonic-device-data/tests/permitted_list +++ b/src/sonic-device-data/tests/permitted_list @@ -347,3 +347,7 @@ sai_default_cpu_tx_tc oversubscribe_mixed_sister_25_50_enable sai_disable_srcmacqedstmac_ctrl programmability_ucode_relative_path +cache_coherency_check +core_clock_to_pm_clock_factor +flowtracker_ipfix_observation_domain_id +flowtracker_num_unique_user_entry_keys diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py index c41e61d5f9f8..53eab7b20aec 100755 --- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py +++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py @@ -107,7 +107,7 @@ def _parse_dpu(self, dpus_table, mid_plane_table): Returns: Parsed obj, sample: mid_plane = { - "bridge": "bridge_midplane", + "bridge": "bridge-midplane", "address": "169.254.200.254/24" } dpus = { diff --git a/src/sonic-dhcp-utilities/tests/test_data/dhcp_db_monitor_test_data.json b/src/sonic-dhcp-utilities/tests/test_data/dhcp_db_monitor_test_data.json index da422685a017..c22cc6f24eff 100644 --- a/src/sonic-dhcp-utilities/tests/test_data/dhcp_db_monitor_test_data.json +++ b/src/sonic-dhcp-utilities/tests/test_data/dhcp_db_monitor_test_data.json @@ -293,13 +293,13 @@ "test_mid_plane_update": [ { "table": [ - ["GLOBAL", "SET", [["bridge", "bridge_midplane"], ["ip_prefix", "169.254.200.254/24"]]] + ["GLOBAL", "SET", [["bridge", "bridge-midplane"], ["ip_prefix", "169.254.200.254/24"]]] ], "exp_res": true }, { "table": [ - ["GLOBAL", "SET", [["bridge", "bridge_midplane2"], ["ip_prefix", "169.254.200.254/24"]]] + ["GLOBAL", "SET", [["bridge", "bridge-midplane2"], ["ip_prefix", "169.254.200.254/24"]]] ], "exp_res": false }, diff --git a/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json b/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json index 06c3050a28af..c30716de7823 100644 --- a/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json +++ b/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json @@ -7,12 +7,12 @@ }, "MID_PLANE_BRIDGE": { "GLOBAL": { - "bridge": "bridge_midplane", + "bridge": "bridge-midplane", "ip_prefix": "169.254.200.254/24" } }, "DHCP_SERVER_IPV4": { - "bridge_midplane": { + "bridge-midplane": { "customized_options": [ "option60", "option223" @@ -25,22 +25,22 @@ } }, "DHCP_SERVER_IPV4_PORT": { - "bridge_midplane|dpu0": { + "bridge-midplane|dpu0": { "ips": [ "169.254.200.1" ] }, - "bridge_midplane|dpu1": { + "bridge-midplane|dpu1": { "ips": [ "169.254.200.2" ] }, - "bridge_midplane|dpu2": { + "bridge-midplane|dpu2": { "ips": [ "169.254.200.3" ] }, - "bridge_midplane|dpu3": { + "bridge-midplane|dpu3": { "ips": [ "169.254.200.4" ] diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py index 3548e39c1435..4e8b0504b01c 100644 --- a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py +++ b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py @@ -416,7 +416,7 @@ def test_parse_dpus(mock_swsscommon_dbconnector_init, mock_get_render_template, dhcp_db_connector = DhcpDbConnector() dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so") dpus_table = {"dpu0": {"midplane_interface": "dpu0"}} - mid_plane_table = {"GLOBAL": {"bridge": "bridge_midplane", "ip_prefix": "169.254.200.254/24"}} + mid_plane_table = {"GLOBAL": {"bridge": "bridge-midplane", "ip_prefix": "169.254.200.254/24"}} mid_plane, dpus = dhcp_cfg_generator._parse_dpu(dpus_table, mid_plane_table) - assert mid_plane == {"bridge": "bridge_midplane", "ip_prefix": "169.254.200.254/24"} + assert mid_plane == {"bridge": "bridge-midplane", "ip_prefix": "169.254.200.254/24"} assert dpus == set(["dpu0"]) diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py b/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py index 4352ee60f7a7..86c34663b485 100644 --- a/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py +++ b/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py @@ -369,7 +369,7 @@ def test_feature_table_checker(mock_swsscommon_dbconnector_init, tested_data, te assert expected_res == check_res -@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"bridge_midplane"}}, {}]) +@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"bridge-midplane"}}, {}]) @pytest.mark.parametrize("tested_data", get_subscribe_table_tested_data("test_mid_plane_update")) def test_mid_plane_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot): with patch.object(ConfigDbEventChecker, "enable"), \ diff --git a/src/sonic-dhcp-utilities/tests/test_smart_switch.py b/src/sonic-dhcp-utilities/tests/test_smart_switch.py index a5c6be2fd273..239cc00bacea 100644 --- a/src/sonic-dhcp-utilities/tests/test_smart_switch.py +++ b/src/sonic-dhcp-utilities/tests/test_smart_switch.py @@ -106,22 +106,22 @@ expected_lease = { - 'bridge_midplane|aa:bb:cc:dd:ff:01': { + 'bridge-midplane|aa:bb:cc:dd:ff:01': { 'ip': '169.254.200.1', 'lease_end': '1718053209', 'lease_start': '1718052309' }, - 'bridge_midplane|aa:bb:cc:dd:ff:02': { + 'bridge-midplane|aa:bb:cc:dd:ff:02': { 'ip': '169.254.200.2', 'lease_end': '1718053210', 'lease_start': '1718052310' }, - 'bridge_midplane|aa:bb:cc:dd:ff:03': { + 'bridge-midplane|aa:bb:cc:dd:ff:03': { 'ip': '169.254.200.3', 'lease_end': '1718053210', 'lease_start': '1718052310' }, - 'bridge_midplane|aa:bb:cc:dd:ff:04': { + 'bridge-midplane|aa:bb:cc:dd:ff:04': { 'ip': '169.254.200.4', 'lease_end': '1718053209', 'lease_start': '1718052309' @@ -154,7 +154,7 @@ def test_dhcp_dhcp_cfggen_generate(mock_swsscommon_dbconnector_init, mock_parse_ dhcp_cfg_generator.generate() assert json.loads(kea_dhcp4_config) == expected_kea_config assert used_ranges == set() - assert enabled_dhcp_interfaces == set(["bridge_midplane"]) + assert enabled_dhcp_interfaces == set(["bridge-midplane"]) assert used_options == set(["option60", "option223"]) expected_tables = set(["DpusTableEventChecker", "MidPlaneTableEventChecker", "VlanTableEventChecker", "VlanIntfTableEventChecker", "DhcpRangeTableEventChecker", "VlanMemberTableEventChecker", diff --git a/src/sonic-eventd/src/eventd.cpp b/src/sonic-eventd/src/eventd.cpp index eb692d5b3a9b..d4da44f32526 100644 --- a/src/sonic-eventd/src/eventd.cpp +++ b/src/sonic-eventd/src/eventd.cpp @@ -302,7 +302,9 @@ static bool validate_event(const internal_event_t &event, runtime_id_t &rid, sequence_t &seq) { bool ret = false; - + if(event.empty()) { + return ret; + } internal_event_t::const_iterator itc_r, itc_s, itc_e; itc_r = event.find(EVENT_RUNTIME_ID); itc_s = event.find(EVENT_SEQUENCE); @@ -357,7 +359,6 @@ capture_service::do_capture() int init_cnt; void *cap_sub_sock = NULL; counters_t total_overflow = 0; - static bool init_done = false; typedef enum { /* @@ -394,25 +395,6 @@ capture_service::do_capture() m_cap_run = true; - if(!init_done) { - zmq_msg_t msg; - zmq_msg_init(&msg); - int rc = zmq_msg_recv(&msg, cap_sub_sock, 0); - RET_ON_ERR(rc == 1, "Failed to read subscription message when XSUB connects to XPUB"); - /* - * When XSUB socket connects to XPUB, a subscription message is sent as a single byte 1. - * When capture service begins to read, the very first message that it will read is this - * control character. - * - * We will handle by reading this message and dropping it before we begin reading for - * cached events. - * - * This behavior will only happen once when XSUB connects to XPUB not everytime cache is started. - * - */ - init_done = true; - } - while (m_ctrl != START_CAPTURE) { /* Wait for capture start */ this_thread::sleep_for(chrono::milliseconds(10)); diff --git a/src/sonic-eventd/tests/eventd_ut.cpp b/src/sonic-eventd/tests/eventd_ut.cpp index 729563fcd39d..a499bb67a95e 100644 --- a/src/sonic-eventd/tests/eventd_ut.cpp +++ b/src/sonic-eventd/tests/eventd_ut.cpp @@ -150,9 +150,8 @@ static const test_data_t ldata[] = { }, }; - void run_cap(void *zctx, bool &term, string &read_source, - int &cnt, bool &should_read_control) + int &cnt) { void *mock_cap = zmq_socket (zctx, ZMQ_SUB); string source; @@ -165,11 +164,10 @@ void run_cap(void *zctx, bool &term, string &read_source, EXPECT_EQ(0, zmq_setsockopt(mock_cap, ZMQ_SUBSCRIBE, "", 0)); EXPECT_EQ(0, zmq_setsockopt(mock_cap, ZMQ_RCVTIMEO, &block_ms, sizeof (block_ms))); - if(should_read_control) { - zmq_msg_t msg; - zmq_msg_init(&msg); - EXPECT_NE(1, zmq_msg_recv(&msg, mock_cap, 0)); // Subscription message should be read by do_capture - } + zmq_msg_t msg; + zmq_msg_init(&msg); + int rc = zmq_msg_recv(&msg, mock_cap, 0); + EXPECT_EQ(1, rc); // read control character while(!term) { string source; @@ -228,7 +226,6 @@ void run_pub(void *mock_pub, const string wr_source, internal_events_lst_t &lst) TEST(eventd, proxy) { printf("Proxy TEST started\n"); - bool should_read_control = false; bool term_sub = false; bool term_cap = false; string rd_csource, rd_source, wr_source("hello"); @@ -246,7 +243,7 @@ TEST(eventd, proxy) EXPECT_EQ(0, pxy->init()); /* capture in a thread */ - thread thrc(&run_cap, zctx, ref(term_cap), ref(rd_csource), ref(rd_cevts_sz), ref(should_read_control)); + thread thrc(&run_cap, zctx, ref(term_cap), ref(rd_csource), ref(rd_cevts_sz)); /* subscriber in a thread */ thread thr(&run_sub, zctx, ref(term_sub), ref(rd_source), ref(rd_evts), ref(rd_evts_sz)); @@ -283,17 +280,9 @@ TEST(eventd, proxy) zmq_close(mock_pub); - /* Do control test */ - - should_read_control = true; - - /* capture in a thread */ - thread thrcc(&run_cap, zctx, ref(term_cap), ref(rd_csource), ref(rd_cevts_sz), ref(should_read_control)); - delete pxy; pxy = NULL; - thrcc.join(); zmq_ctx_term(zctx); /* Provide time for async proxy removal to complete */ diff --git a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py index 8db49bf327f5..c2a9f0c142ad 100755 --- a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py +++ b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py @@ -1486,7 +1486,7 @@ def listen(self): """Start listen Redis keyspace events and will trigger corresponding handlers when content of a table changes. """ self.pubsub = self.get_redis_client(self.db_name).pubsub() - self.sub_thread = threading.Thread(target=self.listen_thread, args=(0.01,)) + self.sub_thread = threading.Thread(target=self.listen_thread, args=(10,)) self.sub_thread.start() def stop_listen(self): @@ -1718,6 +1718,7 @@ class BGPConfigDaemon: DEFAULT_VRF = 'default' global_key_map = [('router_id', '{no:no-prefix}bgp router-id {}'), + ('srv6_locator', '{no:no-prefix}srv6-locator {}'), (['load_balance_mp_relax', '+as_path_mp_as_set'], '{no:no-prefix}bgp bestpath as-path multipath-relax {:mp-as-set}', ['true', 'false']), ('always_compare_med', '{no:no-prefix}bgp always-compare-med', ['true', 'false']), ('external_compare_router_id', '{no:no-prefix}bgp bestpath compare-routerid', ['true', 'false']), @@ -1759,6 +1760,16 @@ class BGPConfigDaemon: global_af_key_map = [(['ebgp_route_distance', 'ibgp_route_distance', 'local_route_distance'], '{no:no-prefix}distance bgp {} {} {}'), + ('rd_vpn_export', '{no:no-prefix}rd vpn export {}'), + ('rt_vpn_export', '{no:no-prefix}rt vpn export {}'), + ('rt_vpn_import', '{no:no-prefix}rt vpn import {}'), + ('rt_vpn_both', '{no:no-prefix}rt vpn both {}'), + ('export_vpn', '{no:no-prefix}export vpn', ['true','false']), + ('import_vpn', '{no:no-prefix}import vpn', ['true','false']), + ('redistribute_connected', '{no:no-prefix}redistribute connected', ['true','false']), + ('redistribute_static_rmap', '{no:no-prefix}redistribute static route-map {}'), + ('rmap_vpn_export', '{no:no-prefix}route-map vpn export {}'), + ('rmap_vpn_import', '{no:no-prefix}route-map vpn import {}'), ('max_ebgp_paths', '{no:no-prefix}maximum-paths {}'), (['max_ibgp_paths', '+ibgp_equal_cluster_length'], '{no:no-prefix}maximum-paths ibgp {} {:match-clust-len}', hdl_ibgp_maxpath), diff --git a/src/sonic-frr-mgmt-framework/templates/frr/frr.conf.j2 b/src/sonic-frr-mgmt-framework/templates/frr/frr.conf.j2 index f1f015a6e7a6..391e5d581cec 100644 --- a/src/sonic-frr-mgmt-framework/templates/frr/frr.conf.j2 +++ b/src/sonic-frr-mgmt-framework/templates/frr/frr.conf.j2 @@ -10,6 +10,9 @@ ! agentx ! +！Add fpm address for zebra +fpm address 127.0.0.1 +！ {% include "zebra/zebra.interfaces.conf.j2" %} ! {% if MGMT_VRF_CONFIG %} diff --git a/src/sonic-frr/Makefile b/src/sonic-frr/Makefile index c7c43ccecc0e..307089d91eae 100644 --- a/src/sonic-frr/Makefile +++ b/src/sonic-frr/Makefile @@ -6,6 +6,7 @@ MAIN_TARGET = $(FRR) DERIVED_TARGET = $(FRR_PYTHONTOOLS) $(FRR_DBG) $(FRR_SNMP) $(FRR_SNMP_DBG) SUFFIX = $(shell date +%Y%m%d\.%H%M%S) STG_BRANCH = stg_temp.$(SUFFIX) +DPLANE_FPM_SONIC_MODULE = dplane_fpm_sonic/dplane_fpm_sonic.c # DEBEMAIL required by gpb dch export DEBEMAIL := sonicproject@googlegroups.com @@ -20,6 +21,7 @@ endif stg branch --create $(STG_BRANCH) $(FRR_TAG) stg import -s ../patch/series gbp dch --ignore-branch --new-version=$(FRR_VERSION)-sonic-$(FRR_SUBVERSION) --dch-opt="--force-bad-version" --commit --git-author + cp ../$(DPLANE_FPM_SONIC_MODULE) zebra/ ifeq ($(CROSS_BUILD_ENVIRON), y) CFLAGS="-I $$CROSS_PERL_CORE_PATH" dpkg-buildpackage -rfakeroot -b -d -us -uc -Ppkg.frr.nortrlib -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) diff --git a/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c b/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c new file mode 100644 index 000000000000..c87a913acb1c --- /dev/null +++ b/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c @@ -0,0 +1,2253 @@ +/* + * Zebra dataplane plugin for Forwarding Plane Manager (FPM) using netlink. + * + * Copyright (C) 2019 Network Device Education Foundation, Inc. ("NetDEF") + * Rafael Zalamena + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; see the file COPYING; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" /* Include this explicitly */ +#endif + +#include + +#include +#include + +#include +#include + +#include "lib/zebra.h" +#include "lib/json.h" +#include "lib/libfrr.h" +#include "lib/frratomic.h" +#include "lib/command.h" +#include "lib/memory.h" +#include "lib/network.h" +#include "lib/ns.h" +#include "lib/frr_pthread.h" +#include "zebra/debug.h" +#include "zebra/interface.h" +#include "zebra/zebra_dplane.h" +#include "zebra/zebra_mpls.h" +#include "zebra/zebra_router.h" +#include "zebra/zebra_evpn.h" +#include "zebra/zebra_evpn_mac.h" +#include "zebra/zebra_vxlan_private.h" +#include "zebra/kernel_netlink.h" +#include "zebra/rt_netlink.h" +#include "zebra/debug.h" +#include "zebra/zebra_srv6.h" +#include "fpm/fpm.h" + +#define SOUTHBOUND_DEFAULT_ADDR INADDR_LOOPBACK +#define SOUTHBOUND_DEFAULT_PORT 2620 + +/** + * FPM header: + * { + * version: 1 byte (always 1), + * type: 1 byte (1 for netlink, 2 protobuf), + * len: 2 bytes (network order), + * } + * + * This header is used with any format to tell the users how many bytes to + * expect. + */ +#define FPM_HEADER_SIZE 4 + +/** + * Custom Netlink TLVs +*/ + +/* Custom Netlink message types */ +enum custom_nlmsg_types { + RTM_NEWSRV6LOCALSID = 1000, + RTM_DELSRV6LOCALSID = 1001, +}; + +/* Custom Netlink attribute types */ +enum custom_rtattr_encap { + FPM_ROUTE_ENCAP_SRV6 = 101, +}; + +enum custom_rtattr_srv6_localsid { + FPM_SRV6_LOCALSID_UNSPEC = 0, + FPM_SRV6_LOCALSID_SID_VALUE = 1, + FPM_SRV6_LOCALSID_FORMAT = 2, + FPM_SRV6_LOCALSID_ACTION = 3, + FPM_SRV6_LOCALSID_VRFNAME = 4, + FPM_SRV6_LOCALSID_NH6 = 5, + FPM_SRV6_LOCALSID_NH4 = 6, + FPM_SRV6_LOCALSID_IIF = 7, + FPM_SRV6_LOCALSID_OIF = 8, + FPM_SRV6_LOCALSID_BPF = 9, + FPM_SRV6_LOCALSID_SIDLIST = 10, + FPM_SRV6_LOCALSID_ENCAP_SRC_ADDR = 11, +}; + +enum custom_rtattr_encap_srv6 { + FPM_ROUTE_ENCAP_SRV6_ENCAP_UNSPEC = 0, + FPM_ROUTE_ENCAP_SRV6_VPN_SID = 1, + FPM_ROUTE_ENCAP_SRV6_ENCAP_SRC_ADDR = 2, +}; + +enum custom_rtattr_srv6_localsid_format { + FPM_SRV6_LOCALSID_FORMAT_UNSPEC = 0, + FPM_SRV6_LOCALSID_FORMAT_BLOCK_LEN = 1, + FPM_SRV6_LOCALSID_FORMAT_NODE_LEN = 2, + FPM_SRV6_LOCALSID_FORMAT_FUNC_LEN = 3, + FPM_SRV6_LOCALSID_FORMAT_ARG_LEN = 4, +}; + +enum custom_rtattr_srv6_localsid_action { + FPM_SRV6_LOCALSID_ACTION_UNSPEC = 0, + FPM_SRV6_LOCALSID_ACTION_END = 1, + FPM_SRV6_LOCALSID_ACTION_END_X = 2, + FPM_SRV6_LOCALSID_ACTION_END_T = 3, + FPM_SRV6_LOCALSID_ACTION_END_DX2 = 4, + FPM_SRV6_LOCALSID_ACTION_END_DX6 = 5, + FPM_SRV6_LOCALSID_ACTION_END_DX4 = 6, + FPM_SRV6_LOCALSID_ACTION_END_DT6 = 7, + FPM_SRV6_LOCALSID_ACTION_END_DT4 = 8, + FPM_SRV6_LOCALSID_ACTION_END_DT46 = 9, + FPM_SRV6_LOCALSID_ACTION_B6_ENCAPS = 10, + FPM_SRV6_LOCALSID_ACTION_B6_ENCAPS_RED = 11, + FPM_SRV6_LOCALSID_ACTION_B6_INSERT = 12, + FPM_SRV6_LOCALSID_ACTION_B6_INSERT_RED = 13, + FPM_SRV6_LOCALSID_ACTION_UN = 14, + FPM_SRV6_LOCALSID_ACTION_UA = 15, + FPM_SRV6_LOCALSID_ACTION_UDX2 = 16, + FPM_SRV6_LOCALSID_ACTION_UDX6 = 17, + FPM_SRV6_LOCALSID_ACTION_UDX4 = 18, + FPM_SRV6_LOCALSID_ACTION_UDT6 = 19, + FPM_SRV6_LOCALSID_ACTION_UDT4 = 20, + FPM_SRV6_LOCALSID_ACTION_UDT46 = 21, +}; + +static const char *prov_name = "dplane_fpm_sonic"; + +struct fpm_nl_ctx { + /* data plane connection. */ + int socket; + bool disabled; + bool connecting; + bool use_nhg; + struct sockaddr_storage addr; + + /* data plane buffers. */ + struct stream *ibuf; + struct stream *obuf; + pthread_mutex_t obuf_mutex; + + /* + * data plane context queue: + * When a FPM server connection becomes a bottleneck, we must keep the + * data plane contexts until we get a chance to process them. + */ + struct dplane_ctx_list_head ctxqueue; + pthread_mutex_t ctxqueue_mutex; + + /* data plane events. */ + struct zebra_dplane_provider *prov; + struct frr_pthread *fthread; + struct thread *t_connect; + struct thread *t_read; + struct thread *t_write; + struct thread *t_event; + struct thread *t_nhg; + struct thread *t_dequeue; + + /* zebra events. */ + struct thread *t_lspreset; + struct thread *t_lspwalk; + struct thread *t_nhgreset; + struct thread *t_nhgwalk; + struct thread *t_ribreset; + struct thread *t_ribwalk; + struct thread *t_rmacreset; + struct thread *t_rmacwalk; + + /* Statistic counters. */ + struct { + /* Amount of bytes read into ibuf. */ + _Atomic uint32_t bytes_read; + /* Amount of bytes written from obuf. */ + _Atomic uint32_t bytes_sent; + /* Output buffer current usage. */ + _Atomic uint32_t obuf_bytes; + /* Output buffer peak usage. */ + _Atomic uint32_t obuf_peak; + + /* Amount of connection closes. */ + _Atomic uint32_t connection_closes; + /* Amount of connection errors. */ + _Atomic uint32_t connection_errors; + + /* Amount of user configurations: FNE_RECONNECT. */ + _Atomic uint32_t user_configures; + /* Amount of user disable requests: FNE_DISABLE. */ + _Atomic uint32_t user_disables; + + /* Amount of data plane context processed. */ + _Atomic uint32_t dplane_contexts; + /* Amount of data plane contexts enqueued. */ + _Atomic uint32_t ctxqueue_len; + /* Peak amount of data plane contexts enqueued. */ + _Atomic uint32_t ctxqueue_len_peak; + + /* Amount of buffer full events. */ + _Atomic uint32_t buffer_full; + } counters; +} *gfnc; + +enum fpm_nl_events { + /* Ask for FPM to reconnect the external server. */ + FNE_RECONNECT, + /* Disable FPM. */ + FNE_DISABLE, + /* Reset counters. */ + FNE_RESET_COUNTERS, + /* Toggle next hop group feature. */ + FNE_TOGGLE_NHG, + /* Reconnect request by our own code to avoid races. */ + FNE_INTERNAL_RECONNECT, + + /* LSP walk finished. */ + FNE_LSP_FINISHED, + /* Next hop groups walk finished. */ + FNE_NHG_FINISHED, + /* RIB walk finished. */ + FNE_RIB_FINISHED, + /* RMAC walk finished. */ + FNE_RMAC_FINISHED, +}; + +#define FPM_RECONNECT(fnc) \ + thread_add_event((fnc)->fthread->master, fpm_process_event, (fnc), \ + FNE_INTERNAL_RECONNECT, &(fnc)->t_event) + +#define WALK_FINISH(fnc, ev) \ + thread_add_event((fnc)->fthread->master, fpm_process_event, (fnc), \ + (ev), NULL) + +/* + * Prototypes. + */ +static void fpm_process_event(struct thread *t); +static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx); +static void fpm_lsp_send(struct thread *t); +static void fpm_lsp_reset(struct thread *t); +static void fpm_nhg_send(struct thread *t); +static void fpm_nhg_reset(struct thread *t); +static void fpm_rib_send(struct thread *t); +static void fpm_rib_reset(struct thread *t); +static void fpm_rmac_send(struct thread *t); +static void fpm_rmac_reset(struct thread *t); + +/* + * CLI. + */ +#define FPM_STR "Forwarding Plane Manager configuration\n" + +DEFUN(fpm_set_address, fpm_set_address_cmd, + "fpm address [port (1-65535)]", + FPM_STR + "FPM remote listening server address\n" + "Remote IPv4 FPM server\n" + "Remote IPv6 FPM server\n" + "FPM remote listening server port\n" + "Remote FPM server port\n") +{ + struct sockaddr_in *sin; + struct sockaddr_in6 *sin6; + uint16_t port = 0; + uint8_t naddr[INET6_BUFSIZ]; + + if (argc == 5) + port = strtol(argv[4]->arg, NULL, 10); + + /* Handle IPv4 addresses. */ + if (inet_pton(AF_INET, argv[2]->arg, naddr) == 1) { + sin = (struct sockaddr_in *)&gfnc->addr; + + memset(sin, 0, sizeof(*sin)); + sin->sin_family = AF_INET; + sin->sin_port = + port ? htons(port) : htons(SOUTHBOUND_DEFAULT_PORT); +#ifdef HAVE_STRUCT_SOCKADDR_SA_LEN + sin->sin_len = sizeof(*sin); +#endif /* HAVE_STRUCT_SOCKADDR_SA_LEN */ + memcpy(&sin->sin_addr, naddr, sizeof(sin->sin_addr)); + + goto ask_reconnect; + } + + /* Handle IPv6 addresses. */ + if (inet_pton(AF_INET6, argv[2]->arg, naddr) != 1) { + vty_out(vty, "%% Invalid address: %s\n", argv[2]->arg); + return CMD_WARNING; + } + + sin6 = (struct sockaddr_in6 *)&gfnc->addr; + memset(sin6, 0, sizeof(*sin6)); + sin6->sin6_family = AF_INET6; + sin6->sin6_port = port ? htons(port) : htons(SOUTHBOUND_DEFAULT_PORT); +#ifdef HAVE_STRUCT_SOCKADDR_SA_LEN + sin6->sin6_len = sizeof(*sin6); +#endif /* HAVE_STRUCT_SOCKADDR_SA_LEN */ + memcpy(&sin6->sin6_addr, naddr, sizeof(sin6->sin6_addr)); + +ask_reconnect: + thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc, + FNE_RECONNECT, &gfnc->t_event); + return CMD_SUCCESS; +} + +DEFUN(no_fpm_set_address, no_fpm_set_address_cmd, + "no fpm address [ [port <1-65535>]]", + NO_STR + FPM_STR + "FPM remote listening server address\n" + "Remote IPv4 FPM server\n" + "Remote IPv6 FPM server\n" + "FPM remote listening server port\n" + "Remote FPM server port\n") +{ + thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc, + FNE_DISABLE, &gfnc->t_event); + return CMD_SUCCESS; +} + +DEFUN(fpm_use_nhg, fpm_use_nhg_cmd, + "fpm use-next-hop-groups", + FPM_STR + "Use netlink next hop groups feature.\n") +{ + /* Already enabled. */ + if (gfnc->use_nhg) + return CMD_SUCCESS; + + thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc, + FNE_TOGGLE_NHG, &gfnc->t_nhg); + + return CMD_SUCCESS; +} + +DEFUN(no_fpm_use_nhg, no_fpm_use_nhg_cmd, + "no fpm use-next-hop-groups", + NO_STR + FPM_STR + "Use netlink next hop groups feature.\n") +{ + /* Already disabled. */ + if (!gfnc->use_nhg) + return CMD_SUCCESS; + + thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc, + FNE_TOGGLE_NHG, &gfnc->t_nhg); + + return CMD_SUCCESS; +} + +DEFUN(fpm_reset_counters, fpm_reset_counters_cmd, + "clear fpm counters", + CLEAR_STR + FPM_STR + "FPM statistic counters\n") +{ + thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc, + FNE_RESET_COUNTERS, &gfnc->t_event); + return CMD_SUCCESS; +} + +DEFUN(fpm_show_counters, fpm_show_counters_cmd, + "show fpm counters", + SHOW_STR + FPM_STR + "FPM statistic counters\n") +{ + vty_out(vty, "%30s\n%30s\n", "FPM counters", "============"); + +#define SHOW_COUNTER(label, counter) \ + vty_out(vty, "%28s: %u\n", (label), (counter)) + + SHOW_COUNTER("Input bytes", gfnc->counters.bytes_read); + SHOW_COUNTER("Output bytes", gfnc->counters.bytes_sent); + SHOW_COUNTER("Output buffer current size", gfnc->counters.obuf_bytes); + SHOW_COUNTER("Output buffer peak size", gfnc->counters.obuf_peak); + SHOW_COUNTER("Connection closes", gfnc->counters.connection_closes); + SHOW_COUNTER("Connection errors", gfnc->counters.connection_errors); + SHOW_COUNTER("Data plane items processed", + gfnc->counters.dplane_contexts); + SHOW_COUNTER("Data plane items enqueued", + gfnc->counters.ctxqueue_len); + SHOW_COUNTER("Data plane items queue peak", + gfnc->counters.ctxqueue_len_peak); + SHOW_COUNTER("Buffer full hits", gfnc->counters.buffer_full); + SHOW_COUNTER("User FPM configurations", gfnc->counters.user_configures); + SHOW_COUNTER("User FPM disable requests", gfnc->counters.user_disables); + +#undef SHOW_COUNTER + + return CMD_SUCCESS; +} + +DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd, + "show fpm counters json", + SHOW_STR + FPM_STR + "FPM statistic counters\n" + JSON_STR) +{ + struct json_object *jo; + + jo = json_object_new_object(); + json_object_int_add(jo, "bytes-read", gfnc->counters.bytes_read); + json_object_int_add(jo, "bytes-sent", gfnc->counters.bytes_sent); + json_object_int_add(jo, "obuf-bytes", gfnc->counters.obuf_bytes); + json_object_int_add(jo, "obuf-bytes-peak", gfnc->counters.obuf_peak); + json_object_int_add(jo, "connection-closes", + gfnc->counters.connection_closes); + json_object_int_add(jo, "connection-errors", + gfnc->counters.connection_errors); + json_object_int_add(jo, "data-plane-contexts", + gfnc->counters.dplane_contexts); + json_object_int_add(jo, "data-plane-contexts-queue", + gfnc->counters.ctxqueue_len); + json_object_int_add(jo, "data-plane-contexts-queue-peak", + gfnc->counters.ctxqueue_len_peak); + json_object_int_add(jo, "buffer-full-hits", gfnc->counters.buffer_full); + json_object_int_add(jo, "user-configures", + gfnc->counters.user_configures); + json_object_int_add(jo, "user-disables", gfnc->counters.user_disables); + vty_json(vty, jo); + + return CMD_SUCCESS; +} + +static int fpm_write_config(struct vty *vty) +{ + struct sockaddr_in *sin; + struct sockaddr_in6 *sin6; + int written = 0; + + if (gfnc->disabled) + return written; + + switch (gfnc->addr.ss_family) { + case AF_INET: + written = 1; + sin = (struct sockaddr_in *)&gfnc->addr; + vty_out(vty, "fpm address %pI4", &sin->sin_addr); + if (sin->sin_port != htons(SOUTHBOUND_DEFAULT_PORT)) + vty_out(vty, " port %d", ntohs(sin->sin_port)); + + vty_out(vty, "\n"); + break; + case AF_INET6: + written = 1; + sin6 = (struct sockaddr_in6 *)&gfnc->addr; + vty_out(vty, "fpm address %pI6", &sin6->sin6_addr); + if (sin6->sin6_port != htons(SOUTHBOUND_DEFAULT_PORT)) + vty_out(vty, " port %d", ntohs(sin6->sin6_port)); + + vty_out(vty, "\n"); + break; + + default: + break; + } + + if (!gfnc->use_nhg) { + vty_out(vty, "no fpm use-next-hop-groups\n"); + written = 1; + } + + return written; +} + +static struct cmd_node fpm_node = { + .name = "fpm", + .node = FPM_NODE, + .prompt = "", + .config_write = fpm_write_config, +}; + +/* + * FPM functions. + */ +static void fpm_connect(struct thread *t); + +static void fpm_reconnect(struct fpm_nl_ctx *fnc) +{ + /* Cancel all zebra threads first. */ + thread_cancel_async(zrouter.master, &fnc->t_lspreset, NULL); + thread_cancel_async(zrouter.master, &fnc->t_lspwalk, NULL); + thread_cancel_async(zrouter.master, &fnc->t_nhgreset, NULL); + thread_cancel_async(zrouter.master, &fnc->t_nhgwalk, NULL); + thread_cancel_async(zrouter.master, &fnc->t_ribreset, NULL); + thread_cancel_async(zrouter.master, &fnc->t_ribwalk, NULL); + thread_cancel_async(zrouter.master, &fnc->t_rmacreset, NULL); + thread_cancel_async(zrouter.master, &fnc->t_rmacwalk, NULL); + + /* + * Grab the lock to empty the streams (data plane might try to + * enqueue updates while we are closing). + */ + frr_mutex_lock_autounlock(&fnc->obuf_mutex); + + /* Avoid calling close on `-1`. */ + if (fnc->socket != -1) { + close(fnc->socket); + fnc->socket = -1; + } + + stream_reset(fnc->ibuf); + stream_reset(fnc->obuf); + THREAD_OFF(fnc->t_read); + THREAD_OFF(fnc->t_write); + + /* FPM is disabled, don't attempt to connect. */ + if (fnc->disabled) + return; + + thread_add_timer(fnc->fthread->master, fpm_connect, fnc, 3, + &fnc->t_connect); +} + +static void fpm_read(struct thread *t) +{ + struct fpm_nl_ctx *fnc = THREAD_ARG(t); + fpm_msg_hdr_t fpm; + ssize_t rv; + char buf[65535]; + struct nlmsghdr *hdr; + struct zebra_dplane_ctx *ctx; + size_t available_bytes; + size_t hdr_available_bytes; + + /* Let's ignore the input at the moment. */ + rv = stream_read_try(fnc->ibuf, fnc->socket, + STREAM_WRITEABLE(fnc->ibuf)); + if (rv == 0) { + atomic_fetch_add_explicit(&fnc->counters.connection_closes, 1, + memory_order_relaxed); + + if (IS_ZEBRA_DEBUG_FPM) + zlog_debug("%s: connection closed", __func__); + + FPM_RECONNECT(fnc); + return; + } + if (rv == -1) { + atomic_fetch_add_explicit(&fnc->counters.connection_errors, 1, + memory_order_relaxed); + zlog_warn("%s: connection failure: %s", __func__, + strerror(errno)); + FPM_RECONNECT(fnc); + return; + } + + /* Schedule the next read */ + thread_add_read(fnc->fthread->master, fpm_read, fnc, fnc->socket, + &fnc->t_read); + + /* We've got an interruption. */ + if (rv == -2) + return; + + + /* Account all bytes read. */ + atomic_fetch_add_explicit(&fnc->counters.bytes_read, rv, + memory_order_relaxed); + + available_bytes = STREAM_READABLE(fnc->ibuf); + while (available_bytes) { + if (available_bytes < (ssize_t)FPM_MSG_HDR_LEN) { + stream_pulldown(fnc->ibuf); + return; + } + + fpm.version = stream_getc(fnc->ibuf); + fpm.msg_type = stream_getc(fnc->ibuf); + fpm.msg_len = stream_getw(fnc->ibuf); + + if (fpm.version != FPM_PROTO_VERSION && + fpm.msg_type != FPM_MSG_TYPE_NETLINK) { + stream_reset(fnc->ibuf); + zlog_warn( + "%s: Received version/msg_type %u/%u, expected 1/1", + __func__, fpm.version, fpm.msg_type); + + FPM_RECONNECT(fnc); + return; + } + + /* + * If the passed in length doesn't even fill in the header + * something is wrong and reset. + */ + if (fpm.msg_len < FPM_MSG_HDR_LEN) { + zlog_warn( + "%s: Received message length: %u that does not even fill the FPM header", + __func__, fpm.msg_len); + FPM_RECONNECT(fnc); + return; + } + + /* + * If we have not received the whole payload, reset the stream + * back to the beginning of the header and move it to the + * top. + */ + if (fpm.msg_len > available_bytes) { + stream_rewind_getp(fnc->ibuf, FPM_MSG_HDR_LEN); + stream_pulldown(fnc->ibuf); + return; + } + + available_bytes -= FPM_MSG_HDR_LEN; + + /* + * Place the data from the stream into a buffer + */ + hdr = (struct nlmsghdr *)buf; + stream_get(buf, fnc->ibuf, fpm.msg_len - FPM_MSG_HDR_LEN); + hdr_available_bytes = fpm.msg_len - FPM_MSG_HDR_LEN; + available_bytes -= hdr_available_bytes; + + /* Sanity check: must be at least header size. */ + if (hdr->nlmsg_len < sizeof(*hdr)) { + zlog_warn( + "%s: [seq=%u] invalid message length %u (< %zu)", + __func__, hdr->nlmsg_seq, hdr->nlmsg_len, + sizeof(*hdr)); + continue; + } + if (hdr->nlmsg_len > fpm.msg_len) { + zlog_warn( + "%s: Received a inner header length of %u that is greater than the fpm total length of %u", + __func__, hdr->nlmsg_len, fpm.msg_len); + FPM_RECONNECT(fnc); + } + /* Not enough bytes available. */ + if (hdr->nlmsg_len > hdr_available_bytes) { + zlog_warn( + "%s: [seq=%u] invalid message length %u (> %zu)", + __func__, hdr->nlmsg_seq, hdr->nlmsg_len, + available_bytes); + continue; + } + + if (!(hdr->nlmsg_flags & NLM_F_REQUEST)) { + if (IS_ZEBRA_DEBUG_FPM) + zlog_debug( + "%s: [seq=%u] not a request, skipping", + __func__, hdr->nlmsg_seq); + + /* + * This request is a bust, go to the next one + */ + continue; + } + + switch (hdr->nlmsg_type) { + case RTM_NEWROUTE: + ctx = dplane_ctx_alloc(); + dplane_ctx_route_init(ctx, DPLANE_OP_ROUTE_NOTIFY, NULL, + NULL); + if (netlink_route_change_read_unicast_internal( + hdr, 0, false, ctx) != 1) { + dplane_ctx_fini(&ctx); + stream_pulldown(fnc->ibuf); + /* + * Let's continue to read other messages + * Even if we ignore this one. + */ + } + break; + default: + if (IS_ZEBRA_DEBUG_FPM) + zlog_debug( + "%s: Received message type %u which is not currently handled", + __func__, hdr->nlmsg_type); + break; + } + } + + stream_reset(fnc->ibuf); +} + +static void fpm_write(struct thread *t) +{ + struct fpm_nl_ctx *fnc = THREAD_ARG(t); + socklen_t statuslen; + ssize_t bwritten; + int rv, status; + size_t btotal; + + if (fnc->connecting == true) { + status = 0; + statuslen = sizeof(status); + + rv = getsockopt(fnc->socket, SOL_SOCKET, SO_ERROR, &status, + &statuslen); + if (rv == -1 || status != 0) { + if (rv != -1) + zlog_warn("%s: connection failed: %s", __func__, + strerror(status)); + else + zlog_warn("%s: SO_ERROR failed: %s", __func__, + strerror(status)); + + atomic_fetch_add_explicit( + &fnc->counters.connection_errors, 1, + memory_order_relaxed); + + FPM_RECONNECT(fnc); + return; + } + + fnc->connecting = false; + + /* + * Starting with LSPs walk all FPM objects, marking them + * as unsent and then replaying them. + */ + thread_add_timer(zrouter.master, fpm_lsp_reset, fnc, 0, + &fnc->t_lspreset); + + /* Permit receiving messages now. */ + thread_add_read(fnc->fthread->master, fpm_read, fnc, + fnc->socket, &fnc->t_read); + } + + frr_mutex_lock_autounlock(&fnc->obuf_mutex); + + while (true) { + /* Stream is empty: reset pointers and return. */ + if (STREAM_READABLE(fnc->obuf) == 0) { + stream_reset(fnc->obuf); + break; + } + + /* Try to write all at once. */ + btotal = stream_get_endp(fnc->obuf) - + stream_get_getp(fnc->obuf); + bwritten = write(fnc->socket, stream_pnt(fnc->obuf), btotal); + if (bwritten == 0) { + atomic_fetch_add_explicit( + &fnc->counters.connection_closes, 1, + memory_order_relaxed); + + if (IS_ZEBRA_DEBUG_FPM) + zlog_debug("%s: connection closed", __func__); + break; + } + if (bwritten == -1) { + /* Attempt to continue if blocked by a signal. */ + if (errno == EINTR) + continue; + /* Receiver is probably slow, lets give it some time. */ + if (errno == EAGAIN || errno == EWOULDBLOCK) + break; + + atomic_fetch_add_explicit( + &fnc->counters.connection_errors, 1, + memory_order_relaxed); + zlog_warn("%s: connection failure: %s", __func__, + strerror(errno)); + + FPM_RECONNECT(fnc); + return; + } + + /* Account all bytes sent. */ + atomic_fetch_add_explicit(&fnc->counters.bytes_sent, bwritten, + memory_order_relaxed); + + /* Account number of bytes free. */ + atomic_fetch_sub_explicit(&fnc->counters.obuf_bytes, bwritten, + memory_order_relaxed); + + stream_forward_getp(fnc->obuf, (size_t)bwritten); + } + + /* Stream is not empty yet, we must schedule more writes. */ + if (STREAM_READABLE(fnc->obuf)) { + stream_pulldown(fnc->obuf); + thread_add_write(fnc->fthread->master, fpm_write, fnc, + fnc->socket, &fnc->t_write); + return; + } +} + +static void fpm_connect(struct thread *t) +{ + struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct sockaddr_in *sin = (struct sockaddr_in *)&fnc->addr; + struct sockaddr_in6 *sin6 = (struct sockaddr_in6 *)&fnc->addr; + socklen_t slen; + int rv, sock; + char addrstr[INET6_ADDRSTRLEN]; + + sock = socket(fnc->addr.ss_family, SOCK_STREAM, 0); + if (sock == -1) { + zlog_err("%s: fpm socket failed: %s", __func__, + strerror(errno)); + thread_add_timer(fnc->fthread->master, fpm_connect, fnc, 3, + &fnc->t_connect); + return; + } + + set_nonblocking(sock); + + if (fnc->addr.ss_family == AF_INET) { + inet_ntop(AF_INET, &sin->sin_addr, addrstr, sizeof(addrstr)); + slen = sizeof(*sin); + } else { + inet_ntop(AF_INET6, &sin6->sin6_addr, addrstr, sizeof(addrstr)); + slen = sizeof(*sin6); + } + + if (IS_ZEBRA_DEBUG_FPM) + zlog_debug("%s: attempting to connect to %s:%d", __func__, + addrstr, ntohs(sin->sin_port)); + + rv = connect(sock, (struct sockaddr *)&fnc->addr, slen); + if (rv == -1 && errno != EINPROGRESS) { + atomic_fetch_add_explicit(&fnc->counters.connection_errors, 1, + memory_order_relaxed); + close(sock); + zlog_warn("%s: fpm connection failed: %s", __func__, + strerror(errno)); + thread_add_timer(fnc->fthread->master, fpm_connect, fnc, 3, + &fnc->t_connect); + return; + } + + fnc->connecting = (errno == EINPROGRESS); + fnc->socket = sock; + if (!fnc->connecting) + thread_add_read(fnc->fthread->master, fpm_read, fnc, sock, + &fnc->t_read); + thread_add_write(fnc->fthread->master, fpm_write, fnc, sock, + &fnc->t_write); + + /* + * Starting with LSPs walk all FPM objects, marking them + * as unsent and then replaying them. + * + * If we are not connected, then delay the objects reset/send. + */ + if (!fnc->connecting) + thread_add_timer(zrouter.master, fpm_lsp_reset, fnc, 0, + &fnc->t_lspreset); +} + +static struct zebra_vrf *vrf_lookup_by_table_id(uint32_t table_id) +{ + struct vrf *vrf; + struct zebra_vrf *zvrf; + + RB_FOREACH (vrf, vrf_id_head, &vrfs_by_id) { + zvrf = vrf->info; + if (zvrf == NULL) + continue; + /* case vrf with netns : match the netnsid */ + if (vrf_is_backend_netns()) { + return NULL; + } else { + /* VRF is VRF_BACKEND_VRF_LITE */ + if (zvrf->table_id != table_id) + continue; + return zvrf; + } + } + + return NULL; + } + +/** + * Resets the SRv6 routes FPM flags so we send all SRv6 routes again. + */ +static void fpm_srv6_route_reset(struct thread *t) +{ + struct fpm_nl_ctx *fnc = THREAD_ARG(t); + rib_dest_t *dest; + struct route_node *rn; + struct route_entry *re; + struct route_table *rt; + struct nexthop *nexthop; + rib_tables_iter_t rt_iter; + + rt_iter.state = RIB_TABLES_ITER_S_INIT; + while ((rt = rib_tables_iter_next(&rt_iter))) { + for (rn = route_top(rt); rn; rn = srcdest_route_next(rn)) { + dest = rib_dest_from_rnode(rn); + /* Skip bad route entries. */ + if (dest == NULL) + continue; + + re = dest->selected_fib; + if (re == NULL) + continue; + + nexthop = re->nhe->nhg.nexthop; + if (nexthop && nexthop->nh_srv6 && + !sid_zero(&nexthop->nh_srv6->seg6_segs)) + /* Unset FPM installation flag so it gets installed again. */ + UNSET_FLAG(dest->flags, RIB_DEST_UPDATE_FPM); + } + } + + /* Schedule next step: send RIB routes. */ + thread_add_event(zrouter.master, fpm_rib_send, fnc, 0, &fnc->t_ribwalk); +} + +/* + * SRv6 localsid change via netlink interface, using a dataplane context object + * + * Returns -1 on failure, 0 when the msg doesn't fit entirely in the buffer + * otherwise the number of bytes written to buf. + */ +static ssize_t netlink_srv6_localsid_msg_encode(int cmd, + struct zebra_dplane_ctx *ctx, + uint8_t *data, size_t datalen, + bool fpm, bool force_nhg) +{ + struct zebra_srv6 *srv6 = zebra_srv6_get_default(); + struct zebra_vrf *zvrf; + struct srv6_locator *l, *locator = NULL; + struct listnode *node; + struct rtattr *nest; + const struct seg6local_context *seg6local_ctx; + struct nexthop *nexthop; + const struct prefix *p; + struct nlsock *nl; + int bytelen; + vrf_id_t vrf_id; + uint32_t table_id; + uint32_t action; + + struct { + struct nlmsghdr n; + struct rtmsg r; + char buf[]; + } *req = (void *)data; + + nexthop = dplane_ctx_get_ng(ctx)->nexthop; + if (!nexthop || !nexthop->nh_srv6 || nexthop->nh_srv6->seg6local_action == ZEBRA_SEG6_LOCAL_ACTION_UNSPEC) + return -1; + + p = dplane_ctx_get_dest(ctx); + + if (datalen < sizeof(*req)) + return 0; + + nl = kernel_netlink_nlsock_lookup(dplane_ctx_get_ns_sock(ctx)); + + memset(req, 0, sizeof(*req)); + + if (p->family != AF_INET6) { + zlog_err("%s: invalid family: expected %u, got %u", __func__, AF_INET6, p->family); + return -1; + } + + bytelen = IPV6_MAX_BYTELEN; + + req->n.nlmsg_len = NLMSG_LENGTH(sizeof(struct rtmsg)); + req->n.nlmsg_flags = NLM_F_CREATE | NLM_F_REQUEST; + + if ((cmd == RTM_NEWSRV6LOCALSID) && + (v6_rr_semantics)) + req->n.nlmsg_flags |= NLM_F_REPLACE; + + req->n.nlmsg_type = cmd; + + req->n.nlmsg_pid = nl->snl.nl_pid; + + req->r.rtm_family = p->family; + req->r.rtm_dst_len = p->prefixlen; + req->r.rtm_scope = RT_SCOPE_UNIVERSE; + + if (cmd == RTM_DELSRV6LOCALSID) + req->r.rtm_protocol = zebra2proto(dplane_ctx_get_old_type(ctx)); + else + req->r.rtm_protocol = zebra2proto(dplane_ctx_get_type(ctx)); + + if (!nl_attr_put(&req->n, datalen, FPM_SRV6_LOCALSID_SID_VALUE, &p->u.prefix, bytelen)) + return 0; + + /* Table corresponding to this route. */ + table_id = dplane_ctx_get_table(ctx); + if (!fpm) { + if (table_id < 256) + req->r.rtm_table = table_id; + else { + req->r.rtm_table = RT_TABLE_UNSPEC; + if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, table_id)) + return 0; + } + } else { + /* Put vrf if_index instead of table id */ + vrf_id = dplane_ctx_get_vrf(ctx); + if (vrf_id < 256) + req->r.rtm_table = vrf_id; + else { + req->r.rtm_table = RT_TABLE_UNSPEC; + if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, vrf_id)) + return 0; + } + } + + if (IS_ZEBRA_DEBUG_FPM) + zlog_debug( + "%s: %s %pFX vrf %u(%u)", __func__, + (cmd == RTM_NEWSRV6LOCALSID) ? "RTM_NEWSRV6LOCALSID" : "RTM_DELSRV6LOCALSID", p, dplane_ctx_get_vrf(ctx), + table_id); + + for (ALL_LIST_ELEMENTS_RO(srv6->locators, node, l)) { + if (prefix_match(&l->prefix, p)) { + locator = l; + break; + } + } + + if (locator) { + nest = + nl_attr_nest(&req->n, datalen, + FPM_SRV6_LOCALSID_FORMAT); + + if (locator->block_bits_length) + if (!nl_attr_put8( + &req->n, datalen, + FPM_SRV6_LOCALSID_FORMAT_BLOCK_LEN, + locator->block_bits_length)) + return -1; + + if (locator->node_bits_length) + if (!nl_attr_put8( + &req->n, datalen, + FPM_SRV6_LOCALSID_FORMAT_NODE_LEN, + locator->node_bits_length)) + return -1; + + if (locator->function_bits_length) + if (!nl_attr_put8( + &req->n, datalen, + FPM_SRV6_LOCALSID_FORMAT_FUNC_LEN, + locator->function_bits_length)) + return -1; + + if (locator->argument_bits_length) + if (!nl_attr_put8( + &req->n, datalen, + FPM_SRV6_LOCALSID_FORMAT_ARG_LEN, + locator->argument_bits_length)) + return -1; + + nl_attr_nest_end(&req->n, nest); + } + + if (cmd == RTM_DELSRV6LOCALSID) + return NLMSG_ALIGN(req->n.nlmsg_len); + + seg6local_ctx = &nexthop->nh_srv6->seg6local_ctx; + + switch (nexthop->nh_srv6->seg6local_action) { + case ZEBRA_SEG6_LOCAL_ACTION_END: + action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UN : FPM_SRV6_LOCALSID_ACTION_END; + if (!nl_attr_put32(&req->n, datalen, + FPM_SRV6_LOCALSID_ACTION, + action)) + return -1; + break; + case ZEBRA_SEG6_LOCAL_ACTION_END_X: + action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UA : FPM_SRV6_LOCALSID_ACTION_END_X; + if (!nl_attr_put32(&req->n, datalen, + FPM_SRV6_LOCALSID_ACTION, + action)) + return -1; + if (!nl_attr_put(&req->n, datalen, + FPM_SRV6_LOCALSID_NH6, &seg6local_ctx->nh6, + sizeof(struct in6_addr))) + return -1; + break; + case ZEBRA_SEG6_LOCAL_ACTION_END_T: + zvrf = vrf_lookup_by_table_id(seg6local_ctx->table); + if (!zvrf) + return false; + + if (!nl_attr_put32(&req->n, datalen, + FPM_SRV6_LOCALSID_ACTION, + FPM_SRV6_LOCALSID_ACTION_END_T)) + return -1; + if (!nl_attr_put(&req->n, datalen, + FPM_SRV6_LOCALSID_VRFNAME, + zvrf->vrf->name, + strlen(zvrf->vrf->name) + 1)) + return -1; + break; + case ZEBRA_SEG6_LOCAL_ACTION_END_DX6: + action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UDX6 : FPM_SRV6_LOCALSID_ACTION_END_DX6; + if (!nl_attr_put32(&req->n, datalen, + FPM_SRV6_LOCALSID_ACTION, + action)) + return -1; + if (!nl_attr_put(&req->n, datalen, + FPM_SRV6_LOCALSID_NH6, &seg6local_ctx->nh6, + sizeof(struct in6_addr))) + return -1; + break; + case ZEBRA_SEG6_LOCAL_ACTION_END_DX4: + action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UDX4 : FPM_SRV6_LOCALSID_ACTION_END_DX4; + if (!nl_attr_put32(&req->n, datalen, + FPM_SRV6_LOCALSID_ACTION, + action)) + return -1; + if (!nl_attr_put(&req->n, datalen, + FPM_SRV6_LOCALSID_NH4, &seg6local_ctx->nh4, + sizeof(struct in_addr))) + return -1; + break; + case ZEBRA_SEG6_LOCAL_ACTION_END_DT6: + zvrf = vrf_lookup_by_table_id(seg6local_ctx->table); + if (!zvrf) + return false; + + action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UDT6 : FPM_SRV6_LOCALSID_ACTION_END_DT6; + if (!nl_attr_put32(&req->n, datalen, + FPM_SRV6_LOCALSID_ACTION, + action)) + return -1; + if (!nl_attr_put(&req->n, datalen, + FPM_SRV6_LOCALSID_VRFNAME, + zvrf->vrf->name, + strlen(zvrf->vrf->name) + 1)) + return -1; + break; + case ZEBRA_SEG6_LOCAL_ACTION_END_DT4: + zvrf = vrf_lookup_by_table_id(seg6local_ctx->table); + if (!zvrf) + return false; + + action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UDT4 : FPM_SRV6_LOCALSID_ACTION_END_DT4; + if (!nl_attr_put32(&req->n, datalen, + FPM_SRV6_LOCALSID_ACTION, + action)) + return -1; + if (!nl_attr_put(&req->n, datalen, + FPM_SRV6_LOCALSID_VRFNAME, + zvrf->vrf->name, + strlen(zvrf->vrf->name) + 1)) + return -1; + break; + case ZEBRA_SEG6_LOCAL_ACTION_END_DT46: + zvrf = vrf_lookup_by_table_id(seg6local_ctx->table); + if (!zvrf) + return false; + + action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UDT46 : FPM_SRV6_LOCALSID_ACTION_END_DT46; + if (!nl_attr_put32(&req->n, datalen, + FPM_SRV6_LOCALSID_ACTION, + action)) + return -1; + if (!nl_attr_put(&req->n, datalen, + FPM_SRV6_LOCALSID_VRFNAME, + zvrf->vrf->name, + strlen(zvrf->vrf->name) + 1)) + return -1; + break; + default: + zlog_err("%s: unsupport seg6local behaviour action=%u", + __func__, + nexthop->nh_srv6->seg6local_action); + return -1; + } + + return NLMSG_ALIGN(req->n.nlmsg_len); +} + +/* + * SRv6 VPN route change via netlink interface, using a dataplane context object + * + * Returns -1 on failure, 0 when the msg doesn't fit entirely in the buffer + * otherwise the number of bytes written to buf. + */ +static ssize_t netlink_srv6_vpn_route_msg_encode(int cmd, + struct zebra_dplane_ctx *ctx, + uint8_t *data, size_t datalen, + bool fpm, bool force_nhg) +{ + struct rtattr *nest; + struct nexthop *nexthop; + const struct prefix *p; + struct nlsock *nl; + int bytelen; + vrf_id_t vrf_id; + uint32_t table_id; + struct interface *ifp; + struct in6_addr encap_src_addr = {}; + struct listnode *node; + struct connected *connected; + + struct { + struct nlmsghdr n; + struct rtmsg r; + char buf[]; + } *req = (void *)data; + + nexthop = dplane_ctx_get_ng(ctx)->nexthop; + if (!nexthop || !nexthop->nh_srv6 || sid_zero(&nexthop->nh_srv6->seg6_segs)) + return -1; + + p = dplane_ctx_get_dest(ctx); + + if (datalen < sizeof(*req)) + return 0; + + nl = kernel_netlink_nlsock_lookup(dplane_ctx_get_ns_sock(ctx)); + + memset(req, 0, sizeof(*req)); + + bytelen = (p->family == AF_INET ? IPV4_MAX_BYTELEN : IPV6_MAX_BYTELEN); + + req->n.nlmsg_len = NLMSG_LENGTH(sizeof(struct rtmsg)); + req->n.nlmsg_flags = NLM_F_CREATE | NLM_F_REQUEST; + + if ((cmd == RTM_NEWROUTE) && + ((p->family == AF_INET) || v6_rr_semantics)) + req->n.nlmsg_flags |= NLM_F_REPLACE; + + req->n.nlmsg_type = cmd; + + req->n.nlmsg_pid = nl->snl.nl_pid; + + req->r.rtm_family = p->family; + req->r.rtm_dst_len = p->prefixlen; + req->r.rtm_scope = RT_SCOPE_UNIVERSE; + + if (cmd == RTM_DELROUTE) + req->r.rtm_protocol = zebra2proto(dplane_ctx_get_old_type(ctx)); + else + req->r.rtm_protocol = zebra2proto(dplane_ctx_get_type(ctx)); + + req->r.rtm_type = RTN_UNICAST; + + if (!nl_attr_put(&req->n, datalen, RTA_DST, &p->u.prefix, bytelen)) + return 0; + + /* Table corresponding to this route. */ + table_id = dplane_ctx_get_table(ctx); + if (!fpm) { + if (table_id < 256) + req->r.rtm_table = table_id; + else { + req->r.rtm_table = RT_TABLE_UNSPEC; + if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, table_id)) + return 0; + } + } else { + /* Put vrf if_index instead of table id */ + vrf_id = dplane_ctx_get_vrf(ctx); + if (vrf_id < 256) + req->r.rtm_table = vrf_id; + else { + req->r.rtm_table = RT_TABLE_UNSPEC; + if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, vrf_id)) + return 0; + } + } + + if (IS_ZEBRA_DEBUG_FPM) + zlog_debug( + "%s: %s %pFX vrf %u(%u)", __func__, + nl_msg_type_to_str(cmd), p, dplane_ctx_get_vrf(ctx), + table_id); + + if (!nl_attr_put16(&req->n, datalen, RTA_ENCAP_TYPE, + FPM_ROUTE_ENCAP_SRV6)) + return false; + nest = nl_attr_nest(&req->n, datalen, RTA_ENCAP); + if (!nest) + return false; + + /* + * by default, we use the loopback address as encap source address, + * if it is valid + */ + ifp = if_lookup_by_name("lo", VRF_DEFAULT); + if (ifp) { + FOR_ALL_INTERFACES_ADDRESSES(ifp, connected, node) { + if (connected->address->family == AF_INET6 && + !IN6_IS_ADDR_LOOPBACK(&connected->address->u.prefix6) && + !IN6_IS_ADDR_LINKLOCAL(&connected->address->u.prefix6)) { + encap_src_addr = connected->address->u.prefix6; + break; + } + } + } + + if (!nl_attr_put( + &req->n, datalen, FPM_ROUTE_ENCAP_SRV6_ENCAP_SRC_ADDR, + &encap_src_addr, IPV6_MAX_BYTELEN)) + return false; + if (!nl_attr_put(&req->n, datalen, FPM_ROUTE_ENCAP_SRV6_VPN_SID, + &nexthop->nh_srv6->seg6_segs, + IPV6_MAX_BYTELEN)) + return false; + nl_attr_nest_end(&req->n, nest); + + return NLMSG_ALIGN(req->n.nlmsg_len); +} + +/* + * SRv6 change via netlink interface, using a dataplane context object + * + * Returns -1 on failure, 0 when the msg doesn't fit entirely in the buffer + * otherwise the number of bytes written to buf. + */ +static ssize_t netlink_srv6_msg_encode(int cmd, + struct zebra_dplane_ctx *ctx, + uint8_t *data, size_t datalen, + bool fpm, bool force_nhg) +{ + struct nexthop *nexthop = NULL; + + struct { + struct nlmsghdr n; + struct rtmsg r; + char buf[]; + } *req = (void *)data; + + nexthop = dplane_ctx_get_ng(ctx)->nexthop; + if (!nexthop || !nexthop->nh_srv6) + return -1; + + if (nexthop->nh_srv6->seg6local_action != + ZEBRA_SEG6_LOCAL_ACTION_UNSPEC) { + if (cmd == RTM_NEWROUTE) + cmd = RTM_NEWSRV6LOCALSID; + else if (cmd == RTM_DELROUTE) + cmd = RTM_DELSRV6LOCALSID; + + if (!netlink_srv6_localsid_msg_encode( + cmd, ctx, data, datalen, fpm, force_nhg)) + return 0; + } else if (!sid_zero(&nexthop->nh_srv6->seg6_segs)) { + if (!netlink_srv6_vpn_route_msg_encode( + cmd, ctx, data, datalen, fpm, force_nhg)) + return 0; + } else { + zlog_err( + "%s: invalid srv6 nexthop", __func__); + return -1; + } + + return NLMSG_ALIGN(req->n.nlmsg_len); +} + +/** + * Encode data plane operation context into netlink and enqueue it in the FPM + * output buffer. + * + * @param fnc the netlink FPM context. + * @param ctx the data plane operation context data. + * @return 0 on success or -1 on not enough space. + */ +static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx) +{ + uint8_t nl_buf[NL_PKT_BUF_SIZE]; + size_t nl_buf_len; + ssize_t rv; + uint64_t obytes, obytes_peak; + enum dplane_op_e op = dplane_ctx_get_op(ctx); + struct nexthop *nexthop; + + /* + * If we were configured to not use next hop groups, then quit as soon + * as possible. + */ + if ((!fnc->use_nhg) + && (op == DPLANE_OP_NH_DELETE || op == DPLANE_OP_NH_INSTALL + || op == DPLANE_OP_NH_UPDATE)) + return 0; + + /* + * Ignore route from default table, because when mgmt port goes down, + * zebra will remove the default route and causing ASIC to blackhole IO. + */ + if (dplane_ctx_get_table(ctx) == RT_TABLE_DEFAULT) { + zlog_debug("%s: discard default table route", __func__); + return 0; + } + + nl_buf_len = 0; + + frr_mutex_lock_autounlock(&fnc->obuf_mutex); + + switch (op) { + case DPLANE_OP_ROUTE_UPDATE: + case DPLANE_OP_ROUTE_DELETE: + nexthop = dplane_ctx_get_ng(ctx)->nexthop; + if (nexthop && nexthop->nh_srv6) { + rv = netlink_srv6_msg_encode(RTM_DELROUTE, ctx, + nl_buf, sizeof(nl_buf), + true, fnc->use_nhg); + if (rv <= 0) { + zlog_err( + "%s: netlink_srv6_msg_encode failed", + __func__); + return 0; + } + } else { + rv = netlink_route_multipath_msg_encode(RTM_DELROUTE, ctx, + nl_buf, sizeof(nl_buf), + true, fnc->use_nhg); + if (rv <= 0) { + zlog_err( + "%s: netlink_route_multipath_msg_encode failed", + __func__); + return 0; + } + } + + nl_buf_len = (size_t)rv; + + /* UPDATE operations need a INSTALL, otherwise just quit. */ + if (op == DPLANE_OP_ROUTE_DELETE) + break; + + /* FALL THROUGH */ + case DPLANE_OP_ROUTE_INSTALL: + nexthop = dplane_ctx_get_ng(ctx)->nexthop; + if (nexthop && nexthop->nh_srv6) { + rv = netlink_srv6_msg_encode( + RTM_NEWROUTE, ctx, &nl_buf[nl_buf_len], + sizeof(nl_buf) - nl_buf_len, true, fnc->use_nhg); + if (rv <= 0) { + zlog_err( + "%s: netlink_srv6_msg_encode failed", + __func__); + return 0; + } + } else { + rv = netlink_route_multipath_msg_encode( + RTM_NEWROUTE, ctx, &nl_buf[nl_buf_len], + sizeof(nl_buf) - nl_buf_len, true, fnc->use_nhg); + if (rv <= 0) { + zlog_err( + "%s: netlink_route_multipath_msg_encode failed", + __func__); + return 0; + } + } + + nl_buf_len += (size_t)rv; + + break; + + case DPLANE_OP_MAC_INSTALL: + case DPLANE_OP_MAC_DELETE: + rv = netlink_macfdb_update_ctx(ctx, nl_buf, sizeof(nl_buf)); + if (rv <= 0) { + zlog_err("%s: netlink_macfdb_update_ctx failed", + __func__); + return 0; + } + + nl_buf_len = (size_t)rv; + break; + + case DPLANE_OP_NH_DELETE: + rv = netlink_nexthop_msg_encode(RTM_DELNEXTHOP, ctx, nl_buf, + sizeof(nl_buf), true); + if (rv <= 0) { + zlog_err("%s: netlink_nexthop_msg_encode failed", + __func__); + return 0; + } + + nl_buf_len = (size_t)rv; + break; + case DPLANE_OP_NH_INSTALL: + case DPLANE_OP_NH_UPDATE: + rv = netlink_nexthop_msg_encode(RTM_NEWNEXTHOP, ctx, nl_buf, + sizeof(nl_buf), true); + if (rv <= 0) { + zlog_err("%s: netlink_nexthop_msg_encode failed", + __func__); + return 0; + } + + nl_buf_len = (size_t)rv; + break; + + case DPLANE_OP_LSP_INSTALL: + case DPLANE_OP_LSP_UPDATE: + case DPLANE_OP_LSP_DELETE: + rv = netlink_lsp_msg_encoder(ctx, nl_buf, sizeof(nl_buf)); + if (rv <= 0) { + zlog_err("%s: netlink_lsp_msg_encoder failed", + __func__); + return 0; + } + + nl_buf_len += (size_t)rv; + break; + + case DPLANE_OP_ADDR_INSTALL: + case DPLANE_OP_ADDR_UNINSTALL: + if (strmatch(dplane_ctx_get_ifname(ctx), "lo")) + thread_add_timer(fnc->fthread->master, fpm_srv6_route_reset, + fnc, 0, &fnc->t_ribreset); + break; + + /* Un-handled by FPM at this time. */ + case DPLANE_OP_PW_INSTALL: + case DPLANE_OP_PW_UNINSTALL: + case DPLANE_OP_NEIGH_INSTALL: + case DPLANE_OP_NEIGH_UPDATE: + case DPLANE_OP_NEIGH_DELETE: + case DPLANE_OP_VTEP_ADD: + case DPLANE_OP_VTEP_DELETE: + case DPLANE_OP_SYS_ROUTE_ADD: + case DPLANE_OP_SYS_ROUTE_DELETE: + case DPLANE_OP_ROUTE_NOTIFY: + case DPLANE_OP_LSP_NOTIFY: + case DPLANE_OP_RULE_ADD: + case DPLANE_OP_RULE_DELETE: + case DPLANE_OP_RULE_UPDATE: + case DPLANE_OP_NEIGH_DISCOVER: + case DPLANE_OP_BR_PORT_UPDATE: + case DPLANE_OP_IPTABLE_ADD: + case DPLANE_OP_IPTABLE_DELETE: + case DPLANE_OP_IPSET_ADD: + case DPLANE_OP_IPSET_DELETE: + case DPLANE_OP_IPSET_ENTRY_ADD: + case DPLANE_OP_IPSET_ENTRY_DELETE: + case DPLANE_OP_NEIGH_IP_INSTALL: + case DPLANE_OP_NEIGH_IP_DELETE: + case DPLANE_OP_NEIGH_TABLE_UPDATE: + case DPLANE_OP_GRE_SET: + case DPLANE_OP_INTF_ADDR_ADD: + case DPLANE_OP_INTF_ADDR_DEL: + case DPLANE_OP_INTF_NETCONFIG: + case DPLANE_OP_INTF_INSTALL: + case DPLANE_OP_INTF_UPDATE: + case DPLANE_OP_INTF_DELETE: + case DPLANE_OP_TC_QDISC_INSTALL: + case DPLANE_OP_TC_QDISC_UNINSTALL: + case DPLANE_OP_TC_CLASS_ADD: + case DPLANE_OP_TC_CLASS_DELETE: + case DPLANE_OP_TC_CLASS_UPDATE: + case DPLANE_OP_TC_FILTER_ADD: + case DPLANE_OP_TC_FILTER_DELETE: + case DPLANE_OP_TC_FILTER_UPDATE: + case DPLANE_OP_NONE: + case DPLANE_OP_STARTUP_STAGE: + break; + + } + + /* Skip empty enqueues. */ + if (nl_buf_len == 0) + return 0; + + /* We must know if someday a message goes beyond 65KiB. */ + assert((nl_buf_len + FPM_HEADER_SIZE) <= UINT16_MAX); + + /* Check if we have enough buffer space. */ + if (STREAM_WRITEABLE(fnc->obuf) < (nl_buf_len + FPM_HEADER_SIZE)) { + atomic_fetch_add_explicit(&fnc->counters.buffer_full, 1, + memory_order_relaxed); + + if (IS_ZEBRA_DEBUG_FPM) + zlog_debug( + "%s: buffer full: wants to write %zu but has %zu", + __func__, nl_buf_len + FPM_HEADER_SIZE, + STREAM_WRITEABLE(fnc->obuf)); + + return -1; + } + + /* + * Fill in the FPM header information. + * + * See FPM_HEADER_SIZE definition for more information. + */ + stream_putc(fnc->obuf, 1); + stream_putc(fnc->obuf, 1); + stream_putw(fnc->obuf, nl_buf_len + FPM_HEADER_SIZE); + + /* Write current data. */ + stream_write(fnc->obuf, nl_buf, (size_t)nl_buf_len); + + /* Account number of bytes waiting to be written. */ + atomic_fetch_add_explicit(&fnc->counters.obuf_bytes, + nl_buf_len + FPM_HEADER_SIZE, + memory_order_relaxed); + obytes = atomic_load_explicit(&fnc->counters.obuf_bytes, + memory_order_relaxed); + obytes_peak = atomic_load_explicit(&fnc->counters.obuf_peak, + memory_order_relaxed); + if (obytes_peak < obytes) + atomic_store_explicit(&fnc->counters.obuf_peak, obytes, + memory_order_relaxed); + + /* Tell the thread to start writing. */ + thread_add_write(fnc->fthread->master, fpm_write, fnc, fnc->socket, + &fnc->t_write); + + return 0; +} + +/* + * LSP walk/send functions + */ +struct fpm_lsp_arg { + struct zebra_dplane_ctx *ctx; + struct fpm_nl_ctx *fnc; + bool complete; +}; + +static int fpm_lsp_send_cb(struct hash_bucket *bucket, void *arg) +{ + struct zebra_lsp *lsp = bucket->data; + struct fpm_lsp_arg *fla = arg; + + /* Skip entries which have already been sent */ + if (CHECK_FLAG(lsp->flags, LSP_FLAG_FPM)) + return HASHWALK_CONTINUE; + + dplane_ctx_reset(fla->ctx); + dplane_ctx_lsp_init(fla->ctx, DPLANE_OP_LSP_INSTALL, lsp); + + if (fpm_nl_enqueue(fla->fnc, fla->ctx) == -1) { + fla->complete = false; + return HASHWALK_ABORT; + } + + /* Mark entry as sent */ + SET_FLAG(lsp->flags, LSP_FLAG_FPM); + return HASHWALK_CONTINUE; +} + +static void fpm_lsp_send(struct thread *t) +{ + struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct zebra_vrf *zvrf = vrf_info_lookup(VRF_DEFAULT); + struct fpm_lsp_arg fla; + + fla.fnc = fnc; + fla.ctx = dplane_ctx_alloc(); + fla.complete = true; + + hash_walk(zvrf->lsp_table, fpm_lsp_send_cb, &fla); + + dplane_ctx_fini(&fla.ctx); + + if (fla.complete) { + WALK_FINISH(fnc, FNE_LSP_FINISHED); + + /* Now move onto routes */ + thread_add_timer(zrouter.master, fpm_nhg_reset, fnc, 0, + &fnc->t_nhgreset); + } else { + /* Didn't finish - reschedule LSP walk */ + thread_add_timer(zrouter.master, fpm_lsp_send, fnc, 0, + &fnc->t_lspwalk); + } +} + +/* + * Next hop walk/send functions. + */ +struct fpm_nhg_arg { + struct zebra_dplane_ctx *ctx; + struct fpm_nl_ctx *fnc; + bool complete; +}; + +static int fpm_nhg_send_cb(struct hash_bucket *bucket, void *arg) +{ + struct nhg_hash_entry *nhe = bucket->data; + struct fpm_nhg_arg *fna = arg; + + /* This entry was already sent, skip it. */ + if (CHECK_FLAG(nhe->flags, NEXTHOP_GROUP_FPM)) + return HASHWALK_CONTINUE; + + /* Reset ctx to reuse allocated memory, take a snapshot and send it. */ + dplane_ctx_reset(fna->ctx); + dplane_ctx_nexthop_init(fna->ctx, DPLANE_OP_NH_INSTALL, nhe); + if (fpm_nl_enqueue(fna->fnc, fna->ctx) == -1) { + /* Our buffers are full, lets give it some cycles. */ + fna->complete = false; + return HASHWALK_ABORT; + } + + /* Mark group as sent, so it doesn't get sent again. */ + SET_FLAG(nhe->flags, NEXTHOP_GROUP_FPM); + + return HASHWALK_CONTINUE; +} + +static void fpm_nhg_send(struct thread *t) +{ + struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct fpm_nhg_arg fna; + + fna.fnc = fnc; + fna.ctx = dplane_ctx_alloc(); + fna.complete = true; + + /* Send next hops. */ + if (fnc->use_nhg) + hash_walk(zrouter.nhgs_id, fpm_nhg_send_cb, &fna); + + /* `free()` allocated memory. */ + dplane_ctx_fini(&fna.ctx); + + /* We are done sending next hops, lets install the routes now. */ + if (fna.complete) { + WALK_FINISH(fnc, FNE_NHG_FINISHED); + thread_add_timer(zrouter.master, fpm_rib_reset, fnc, 0, + &fnc->t_ribreset); + } else /* Otherwise reschedule next hop group again. */ + thread_add_timer(zrouter.master, fpm_nhg_send, fnc, 0, + &fnc->t_nhgwalk); +} + +/** + * Send all RIB installed routes to the connected data plane. + */ +static void fpm_rib_send(struct thread *t) +{ + struct fpm_nl_ctx *fnc = THREAD_ARG(t); + rib_dest_t *dest; + struct route_node *rn; + struct route_table *rt; + struct zebra_dplane_ctx *ctx; + rib_tables_iter_t rt_iter; + + /* Allocate temporary context for all transactions. */ + ctx = dplane_ctx_alloc(); + + rt_iter.state = RIB_TABLES_ITER_S_INIT; + while ((rt = rib_tables_iter_next(&rt_iter))) { + for (rn = route_top(rt); rn; rn = srcdest_route_next(rn)) { + dest = rib_dest_from_rnode(rn); + /* Skip bad route entries. */ + if (dest == NULL || dest->selected_fib == NULL) + continue; + + /* Check for already sent routes. */ + if (CHECK_FLAG(dest->flags, RIB_DEST_UPDATE_FPM)) + continue; + + /* Enqueue route install. */ + dplane_ctx_reset(ctx); + dplane_ctx_route_init(ctx, DPLANE_OP_ROUTE_INSTALL, rn, + dest->selected_fib); + if (fpm_nl_enqueue(fnc, ctx) == -1) { + /* Free the temporary allocated context. */ + dplane_ctx_fini(&ctx); + + thread_add_timer(zrouter.master, fpm_rib_send, + fnc, 1, &fnc->t_ribwalk); + return; + } + + /* Mark as sent. */ + SET_FLAG(dest->flags, RIB_DEST_UPDATE_FPM); + } + } + + /* Free the temporary allocated context. */ + dplane_ctx_fini(&ctx); + + /* All RIB routes sent! */ + WALK_FINISH(fnc, FNE_RIB_FINISHED); + + /* Schedule next event: RMAC reset. */ + thread_add_event(zrouter.master, fpm_rmac_reset, fnc, 0, + &fnc->t_rmacreset); +} + +/* + * The next three functions will handle RMAC enqueue. + */ +struct fpm_rmac_arg { + struct zebra_dplane_ctx *ctx; + struct fpm_nl_ctx *fnc; + struct zebra_l3vni *zl3vni; + bool complete; +}; + +static void fpm_enqueue_rmac_table(struct hash_bucket *bucket, void *arg) +{ + struct fpm_rmac_arg *fra = arg; + struct zebra_mac *zrmac = bucket->data; + struct zebra_if *zif = fra->zl3vni->vxlan_if->info; + const struct zebra_l2info_vxlan *vxl = &zif->l2info.vxl; + struct zebra_if *br_zif; + vlanid_t vid; + bool sticky; + + /* Entry already sent. */ + if (CHECK_FLAG(zrmac->flags, ZEBRA_MAC_FPM_SENT) || !fra->complete) + return; + + sticky = !!CHECK_FLAG(zrmac->flags, + (ZEBRA_MAC_STICKY | ZEBRA_MAC_REMOTE_DEF_GW)); + br_zif = (struct zebra_if *)(zif->brslave_info.br_if->info); + vid = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(br_zif) ? vxl->access_vlan : 0; + + dplane_ctx_reset(fra->ctx); + dplane_ctx_set_op(fra->ctx, DPLANE_OP_MAC_INSTALL); + dplane_mac_init(fra->ctx, fra->zl3vni->vxlan_if, + zif->brslave_info.br_if, vid, + &zrmac->macaddr, zrmac->fwd_info.r_vtep_ip, sticky, + 0 /*nhg*/, 0 /*update_flags*/); + if (fpm_nl_enqueue(fra->fnc, fra->ctx) == -1) { + thread_add_timer(zrouter.master, fpm_rmac_send, + fra->fnc, 1, &fra->fnc->t_rmacwalk); + fra->complete = false; + } +} + +static void fpm_enqueue_l3vni_table(struct hash_bucket *bucket, void *arg) +{ + struct fpm_rmac_arg *fra = arg; + struct zebra_l3vni *zl3vni = bucket->data; + + fra->zl3vni = zl3vni; + hash_iterate(zl3vni->rmac_table, fpm_enqueue_rmac_table, zl3vni); +} + +static void fpm_rmac_send(struct thread *t) +{ + struct fpm_rmac_arg fra; + + fra.fnc = THREAD_ARG(t); + fra.ctx = dplane_ctx_alloc(); + fra.complete = true; + hash_iterate(zrouter.l3vni_table, fpm_enqueue_l3vni_table, &fra); + dplane_ctx_fini(&fra.ctx); + + /* RMAC walk completed. */ + if (fra.complete) + WALK_FINISH(fra.fnc, FNE_RMAC_FINISHED); +} + +/* + * Resets the next hop FPM flags so we send all next hops again. + */ +static void fpm_nhg_reset_cb(struct hash_bucket *bucket, void *arg) +{ + struct nhg_hash_entry *nhe = bucket->data; + + /* Unset FPM installation flag so it gets installed again. */ + UNSET_FLAG(nhe->flags, NEXTHOP_GROUP_FPM); +} + +static void fpm_nhg_reset(struct thread *t) +{ + struct fpm_nl_ctx *fnc = THREAD_ARG(t); + + hash_iterate(zrouter.nhgs_id, fpm_nhg_reset_cb, NULL); + + /* Schedule next step: send next hop groups. */ + thread_add_event(zrouter.master, fpm_nhg_send, fnc, 0, &fnc->t_nhgwalk); +} + +/* + * Resets the LSP FPM flag so we send all LSPs again. + */ +static void fpm_lsp_reset_cb(struct hash_bucket *bucket, void *arg) +{ + struct zebra_lsp *lsp = bucket->data; + + UNSET_FLAG(lsp->flags, LSP_FLAG_FPM); +} + +static void fpm_lsp_reset(struct thread *t) +{ + struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct zebra_vrf *zvrf = vrf_info_lookup(VRF_DEFAULT); + + hash_iterate(zvrf->lsp_table, fpm_lsp_reset_cb, NULL); + + /* Schedule next step: send LSPs */ + thread_add_event(zrouter.master, fpm_lsp_send, fnc, 0, &fnc->t_lspwalk); +} + +/** + * Resets the RIB FPM flags so we send all routes again. + */ +static void fpm_rib_reset(struct thread *t) +{ + struct fpm_nl_ctx *fnc = THREAD_ARG(t); + rib_dest_t *dest; + struct route_node *rn; + struct route_table *rt; + rib_tables_iter_t rt_iter; + + rt_iter.state = RIB_TABLES_ITER_S_INIT; + while ((rt = rib_tables_iter_next(&rt_iter))) { + for (rn = route_top(rt); rn; rn = srcdest_route_next(rn)) { + dest = rib_dest_from_rnode(rn); + /* Skip bad route entries. */ + if (dest == NULL) + continue; + + UNSET_FLAG(dest->flags, RIB_DEST_UPDATE_FPM); + } + } + + /* Schedule next step: send RIB routes. */ + thread_add_event(zrouter.master, fpm_rib_send, fnc, 0, &fnc->t_ribwalk); +} + +/* + * The next three function will handle RMAC table reset. + */ +static void fpm_unset_rmac_table(struct hash_bucket *bucket, void *arg) +{ + struct zebra_mac *zrmac = bucket->data; + + UNSET_FLAG(zrmac->flags, ZEBRA_MAC_FPM_SENT); +} + +static void fpm_unset_l3vni_table(struct hash_bucket *bucket, void *arg) +{ + struct zebra_l3vni *zl3vni = bucket->data; + + hash_iterate(zl3vni->rmac_table, fpm_unset_rmac_table, zl3vni); +} + +static void fpm_rmac_reset(struct thread *t) +{ + struct fpm_nl_ctx *fnc = THREAD_ARG(t); + + hash_iterate(zrouter.l3vni_table, fpm_unset_l3vni_table, NULL); + + /* Schedule next event: send RMAC entries. */ + thread_add_event(zrouter.master, fpm_rmac_send, fnc, 0, + &fnc->t_rmacwalk); +} + +static void fpm_process_queue(struct thread *t) +{ + struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct zebra_dplane_ctx *ctx; + bool no_bufs = false; + uint64_t processed_contexts = 0; + + while (true) { + /* No space available yet. */ + if (STREAM_WRITEABLE(fnc->obuf) < NL_PKT_BUF_SIZE) { + no_bufs = true; + break; + } + + /* Dequeue next item or quit processing. */ + frr_with_mutex (&fnc->ctxqueue_mutex) { + ctx = dplane_ctx_dequeue(&fnc->ctxqueue); + } + if (ctx == NULL) + break; + + /* + * Intentionally ignoring the return value + * as that we are ensuring that we can write to + * the output data in the STREAM_WRITEABLE + * check above, so we can ignore the return + */ + if (fnc->socket != -1) + (void)fpm_nl_enqueue(fnc, ctx); + + /* Account the processed entries. */ + processed_contexts++; + atomic_fetch_sub_explicit(&fnc->counters.ctxqueue_len, 1, + memory_order_relaxed); + + dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_SUCCESS); + dplane_provider_enqueue_out_ctx(fnc->prov, ctx); + } + + /* Update count of processed contexts */ + atomic_fetch_add_explicit(&fnc->counters.dplane_contexts, + processed_contexts, memory_order_relaxed); + + /* Re-schedule if we ran out of buffer space */ + if (no_bufs) + thread_add_timer(fnc->fthread->master, fpm_process_queue, + fnc, 0, &fnc->t_dequeue); + + /* + * Let the dataplane thread know if there are items in the + * output queue to be processed. Otherwise they may sit + * until the dataplane thread gets scheduled for new, + * unrelated work. + */ + if (dplane_provider_out_ctx_queue_len(fnc->prov) > 0) + dplane_provider_work_ready(); +} + +/** + * Handles external (e.g. CLI, data plane or others) events. + */ +static void fpm_process_event(struct thread *t) +{ + struct fpm_nl_ctx *fnc = THREAD_ARG(t); + enum fpm_nl_events event = THREAD_VAL(t); + + switch (event) { + case FNE_DISABLE: + zlog_info("%s: manual FPM disable event", __func__); + fnc->disabled = true; + atomic_fetch_add_explicit(&fnc->counters.user_disables, 1, + memory_order_relaxed); + + /* Call reconnect to disable timers and clean up context. */ + fpm_reconnect(fnc); + break; + + case FNE_RECONNECT: + zlog_info("%s: manual FPM reconnect event", __func__); + fnc->disabled = false; + atomic_fetch_add_explicit(&fnc->counters.user_configures, 1, + memory_order_relaxed); + fpm_reconnect(fnc); + break; + + case FNE_RESET_COUNTERS: + zlog_info("%s: manual FPM counters reset event", __func__); + memset(&fnc->counters, 0, sizeof(fnc->counters)); + break; + + case FNE_TOGGLE_NHG: + zlog_info("%s: toggle next hop groups support", __func__); + fnc->use_nhg = !fnc->use_nhg; + fpm_reconnect(fnc); + break; + + case FNE_INTERNAL_RECONNECT: + fpm_reconnect(fnc); + break; + + case FNE_NHG_FINISHED: + if (IS_ZEBRA_DEBUG_FPM) + zlog_debug("%s: next hop groups walk finished", + __func__); + break; + case FNE_RIB_FINISHED: + if (IS_ZEBRA_DEBUG_FPM) + zlog_debug("%s: RIB walk finished", __func__); + break; + case FNE_RMAC_FINISHED: + if (IS_ZEBRA_DEBUG_FPM) + zlog_debug("%s: RMAC walk finished", __func__); + break; + case FNE_LSP_FINISHED: + if (IS_ZEBRA_DEBUG_FPM) + zlog_debug("%s: LSP walk finished", __func__); + break; + } +} + +/* + * Data plane functions. + */ +static int fpm_nl_start(struct zebra_dplane_provider *prov) +{ + struct fpm_nl_ctx *fnc; + + fnc = dplane_provider_get_data(prov); + fnc->fthread = frr_pthread_new(NULL, prov_name, prov_name); + assert(frr_pthread_run(fnc->fthread, NULL) == 0); + fnc->ibuf = stream_new(NL_PKT_BUF_SIZE); + fnc->obuf = stream_new(NL_PKT_BUF_SIZE * 128); + pthread_mutex_init(&fnc->obuf_mutex, NULL); + fnc->socket = -1; + fnc->disabled = true; + fnc->prov = prov; + dplane_ctx_q_init(&fnc->ctxqueue); + pthread_mutex_init(&fnc->ctxqueue_mutex, NULL); + + /* Set default values. */ + fnc->use_nhg = true; + + return 0; +} + +static int fpm_nl_finish_early(struct fpm_nl_ctx *fnc) +{ + /* Disable all events and close socket. */ + THREAD_OFF(fnc->t_lspreset); + THREAD_OFF(fnc->t_lspwalk); + THREAD_OFF(fnc->t_nhgreset); + THREAD_OFF(fnc->t_nhgwalk); + THREAD_OFF(fnc->t_ribreset); + THREAD_OFF(fnc->t_ribwalk); + THREAD_OFF(fnc->t_rmacreset); + THREAD_OFF(fnc->t_rmacwalk); + THREAD_OFF(fnc->t_event); + THREAD_OFF(fnc->t_nhg); + thread_cancel_async(fnc->fthread->master, &fnc->t_read, NULL); + thread_cancel_async(fnc->fthread->master, &fnc->t_write, NULL); + thread_cancel_async(fnc->fthread->master, &fnc->t_connect, NULL); + + if (fnc->socket != -1) { + close(fnc->socket); + fnc->socket = -1; + } + + return 0; +} + +static int fpm_nl_finish_late(struct fpm_nl_ctx *fnc) +{ + /* Stop the running thread. */ + frr_pthread_stop(fnc->fthread, NULL); + + /* Free all allocated resources. */ + pthread_mutex_destroy(&fnc->obuf_mutex); + pthread_mutex_destroy(&fnc->ctxqueue_mutex); + stream_free(fnc->ibuf); + stream_free(fnc->obuf); + free(gfnc); + gfnc = NULL; + + return 0; +} + +static int fpm_nl_finish(struct zebra_dplane_provider *prov, bool early) +{ + struct fpm_nl_ctx *fnc; + + fnc = dplane_provider_get_data(prov); + if (early) + return fpm_nl_finish_early(fnc); + + return fpm_nl_finish_late(fnc); +} + +static int fpm_nl_process(struct zebra_dplane_provider *prov) +{ + struct zebra_dplane_ctx *ctx; + struct fpm_nl_ctx *fnc; + int counter, limit; + uint64_t cur_queue, peak_queue = 0, stored_peak_queue; + + fnc = dplane_provider_get_data(prov); + limit = dplane_provider_get_work_limit(prov); + for (counter = 0; counter < limit; counter++) { + ctx = dplane_provider_dequeue_in_ctx(prov); + if (ctx == NULL) + break; + + /* + * Skip all notifications if not connected, we'll walk the RIB + * anyway. + */ + if (fnc->socket != -1 && fnc->connecting == false) { + /* + * Update the number of queued contexts *before* + * enqueueing, to ensure counter consistency. + */ + atomic_fetch_add_explicit(&fnc->counters.ctxqueue_len, + 1, memory_order_relaxed); + + frr_with_mutex (&fnc->ctxqueue_mutex) { + dplane_ctx_enqueue_tail(&fnc->ctxqueue, ctx); + } + + cur_queue = atomic_load_explicit( + &fnc->counters.ctxqueue_len, + memory_order_relaxed); + if (peak_queue < cur_queue) + peak_queue = cur_queue; + continue; + } + + dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_SUCCESS); + dplane_provider_enqueue_out_ctx(prov, ctx); + } + + /* Update peak queue length, if we just observed a new peak */ + stored_peak_queue = atomic_load_explicit( + &fnc->counters.ctxqueue_len_peak, memory_order_relaxed); + if (stored_peak_queue < peak_queue) + atomic_store_explicit(&fnc->counters.ctxqueue_len_peak, + peak_queue, memory_order_relaxed); + + if (atomic_load_explicit(&fnc->counters.ctxqueue_len, + memory_order_relaxed) + > 0) + thread_add_timer(fnc->fthread->master, fpm_process_queue, + fnc, 0, &fnc->t_dequeue); + + /* Ensure dataplane thread is rescheduled if we hit the work limit */ + if (counter >= limit) + dplane_provider_work_ready(); + + return 0; +} + +static int fpm_nl_new(struct thread_master *tm) +{ + struct zebra_dplane_provider *prov = NULL; + int rv; + + gfnc = calloc(1, sizeof(*gfnc)); + rv = dplane_provider_register(prov_name, DPLANE_PRIO_POSTPROCESS, + DPLANE_PROV_FLAG_THREADED, fpm_nl_start, + fpm_nl_process, fpm_nl_finish, gfnc, + &prov); + + if (IS_ZEBRA_DEBUG_DPLANE) + zlog_debug("%s register status: %d", prov_name, rv); + + install_node(&fpm_node); + install_element(ENABLE_NODE, &fpm_show_counters_cmd); + install_element(ENABLE_NODE, &fpm_show_counters_json_cmd); + install_element(ENABLE_NODE, &fpm_reset_counters_cmd); + install_element(CONFIG_NODE, &fpm_set_address_cmd); + install_element(CONFIG_NODE, &no_fpm_set_address_cmd); + install_element(CONFIG_NODE, &fpm_use_nhg_cmd); + install_element(CONFIG_NODE, &no_fpm_use_nhg_cmd); + + return 0; +} + +static int fpm_nl_init(void) +{ + hook_register(frr_late_init, fpm_nl_new); + return 0; +} + +FRR_MODULE_SETUP( + .name = "dplane_fpm_sonic", + .version = "0.0.1", + .description = "Data plane plugin for FPM using netlink.", + .init = fpm_nl_init, +); diff --git a/src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch b/src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch new file mode 100644 index 000000000000..791f52de3966 --- /dev/null +++ b/src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch @@ -0,0 +1,14 @@ +diff --git a/bgpd/bgp_network.c b/bgpd/bgp_network.c +index 76bb9949d..974a57ef2 100644 +--- a/bgpd/bgp_network.c ++++ b/bgpd/bgp_network.c +@@ -774,6 +774,9 @@ int bgp_connect(struct peer *peer) + ? IPV4_MAX_BITLEN + : IPV6_MAX_BITLEN; + ++ if (!BGP_PEER_SU_UNSPEC(peer)) ++ bgp_md5_set(peer); ++ + bgp_md5_set_connect(peer->fd, &peer->su, prefixlen, + peer->password); + } diff --git a/src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch b/src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch new file mode 100644 index 000000000000..1ada5d9604df --- /dev/null +++ b/src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch @@ -0,0 +1,52 @@ +Build dplane_fpm_sonic module + +From: Carmine Scarpitta + +Signed-off-by: Carmine Scarpitta +--- + debian/frr.install | 1 + + redhat/frr.spec.in | 1 + + zebra/subdir.am | 6 ++++++ + 3 files changed, 8 insertions(+) + +diff --git a/debian/frr.install b/debian/frr.install +index 044b48498..f53b874e3 100644 +--- a/debian/frr.install ++++ b/debian/frr.install +@@ -10,6 +10,7 @@ usr/lib/*/frr/libfrrcares.* + usr/lib/*/frr/libfrrospfapiclient.* + usr/lib/*/frr/modules/bgpd_bmp.so + usr/lib/*/frr/modules/dplane_fpm_nl.so ++usr/lib/*/frr/modules/dplane_fpm_sonic.so + usr/lib/*/frr/modules/zebra_cumulus_mlag.so + usr/lib/*/frr/modules/zebra_fpm.so + usr/lib/*/frr/modules/zebra_irdp.so +diff --git a/redhat/frr.spec.in b/redhat/frr.spec.in +index 4afd562a8..2eab817c9 100644 +--- a/redhat/frr.spec.in ++++ b/redhat/frr.spec.in +@@ -714,6 +714,7 @@ fi + %endif + %{_libdir}/frr/modules/zebra_cumulus_mlag.so + %{_libdir}/frr/modules/dplane_fpm_nl.so ++%{_libdir}/frr/modules/dplane_fpm_sonic.so + %{_libdir}/frr/modules/zebra_irdp.so + %{_libdir}/frr/modules/bgpd_bmp.so + %{_bindir}/* +diff --git a/zebra/subdir.am b/zebra/subdir.am +index 5c4a87b93..3f1807d26 100644 +--- a/zebra/subdir.am ++++ b/zebra/subdir.am +@@ -236,6 +236,12 @@ zebra_dplane_fpm_nl_la_LDFLAGS = $(MODULE_LDFLAGS) + zebra_dplane_fpm_nl_la_LIBADD = + endif + ++module_LTLIBRARIES += zebra/dplane_fpm_sonic.la ++ ++zebra_dplane_fpm_sonic_la_SOURCES = zebra/dplane_fpm_sonic.c ++zebra_dplane_fpm_sonic_la_LDFLAGS = $(MODULE_LDFLAGS) ++zebra_dplane_fpm_sonic_la_LIBADD = ++ + if NETLINK_DEBUG + zebra_zebra_SOURCES += \ + zebra/debug_nl.c \ diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series index 7f1d79d8199d..c14a56f5b10f 100644 --- a/src/sonic-frr/patch/series +++ b/src/sonic-frr/patch/series @@ -50,3 +50,5 @@ 0050-bgpd-backpressure-Avoid-use-after-free.patch 0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch 0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch +0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch +build-dplane-fpm-sonic-module.patch diff --git a/src/sonic-gnmi b/src/sonic-gnmi index 64ed32b715e1..743c7afac122 160000 --- a/src/sonic-gnmi +++ b/src/sonic-gnmi @@ -1 +1 @@ -Subproject commit 64ed32b715e1673c3376701ee192d6292f5ec0ec +Subproject commit 743c7afac122d07701de9077150edd22b72a265c diff --git a/src/sonic-host-services b/src/sonic-host-services index 39e31a95ba96..b7f26d4eaf12 160000 --- a/src/sonic-host-services +++ b/src/sonic-host-services @@ -1 +1 @@ -Subproject commit 39e31a95ba96d601bae90c54556a27f84691c910 +Subproject commit b7f26d4eaf125af4c889a9dbadeebacbeb9e9271 diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel index b9ac5ddff682..6d0f01bb20eb 160000 --- a/src/sonic-linux-kernel +++ b/src/sonic-linux-kernel @@ -1 +1 @@ -Subproject commit b9ac5ddff682490432c080562670888128f0a2b6 +Subproject commit 6d0f01bb20eb4a7409d5c31c11a94d39a02c4d5b diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common index 966adc0d92f7..b91a4df3bd0e 160000 --- a/src/sonic-mgmt-common +++ b/src/sonic-mgmt-common @@ -1 +1 @@ -Subproject commit 966adc0d92f7c5e2f77636288653489bb97d9deb +Subproject commit b91a4df3bd0e4be97e67ab3f27b1826b1713afc5 diff --git a/src/sonic-nettools/.gitignore b/src/sonic-nettools/.gitignore index 046d25633d83..5a87e35f5600 100644 --- a/src/sonic-nettools/.gitignore +++ b/src/sonic-nettools/.gitignore @@ -1,3 +1,4 @@ target/ bin/ -.vscode/ \ No newline at end of file +.vscode/ +*.pcap \ No newline at end of file diff --git a/src/sonic-nettools/Cargo.lock b/src/sonic-nettools/Cargo.lock index 695393102228..2f75b62942c2 100644 --- a/src/sonic-nettools/Cargo.lock +++ b/src/sonic-nettools/Cargo.lock @@ -135,9 +135,9 @@ checksum = "f8478577c03552c21db0e2724ffb8986a5ce7af88107e6be5d2ee6e158c12800" [[package]] name = "libc" -version = "0.2.155" +version = "0.2.159" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "97b3888a4aecf77e811145cadf6eef5901f4782c53886191b2f693f24761847c" +checksum = "561d97a539a36e26a9a5fad1ea11a3039a67714694aaa379433e580854bc3dc5" [[package]] name = "memchr" @@ -438,5 +438,6 @@ name = "wol" version = "0.0.1" dependencies = [ "clap", + "libc", "pnet", ] diff --git a/src/sonic-nettools/Makefile b/src/sonic-nettools/Makefile index 021b1eb805c6..db8242cf4ff0 100644 --- a/src/sonic-nettools/Makefile +++ b/src/sonic-nettools/Makefile @@ -14,4 +14,10 @@ endif clean: rm -rf target - rm -rf bin \ No newline at end of file + rm -rf bin + +test: + cargo test + +fmt: + cargo clippy diff --git a/src/sonic-nettools/wol/Cargo.toml b/src/sonic-nettools/wol/Cargo.toml index 6b2276e79724..26c8fd1c4f94 100644 --- a/src/sonic-nettools/wol/Cargo.toml +++ b/src/sonic-nettools/wol/Cargo.toml @@ -5,3 +5,4 @@ version = "0.0.1" [dependencies] pnet = "0.35.0" clap = { version = "4.5.7", features = ["derive"] } +libc = "0.2.159" diff --git a/src/sonic-nettools/wol/src/main.rs b/src/sonic-nettools/wol/src/main.rs index c04ba9411bcd..368f35a3c8ba 100644 --- a/src/sonic-nettools/wol/src/main.rs +++ b/src/sonic-nettools/wol/src/main.rs @@ -1,7 +1,9 @@ mod wol; +mod socket; extern crate clap; extern crate pnet; +extern crate libc; fn main() { if let Err(e) = wol::build_and_send() { diff --git a/src/sonic-nettools/wol/src/socket.rs b/src/sonic-nettools/wol/src/socket.rs new file mode 100644 index 000000000000..c67bcba82a32 --- /dev/null +++ b/src/sonic-nettools/wol/src/socket.rs @@ -0,0 +1,336 @@ +use libc; +use std::net::{Ipv4Addr, Ipv6Addr}; +use std::{convert::TryInto, io, ptr, mem}; +use std::ffi::CString; +use std::os::raw::c_int; +use std::result::Result; +use std::str::FromStr; + +use crate::wol::{ WolErr, WolErrCode, vprintln}; + +const ANY_INTERFACE: &str = "ANY_INTERFACE"; +const IPV4_ANY_ADDR : &str = "0.0.0.0"; +const IPV6_ANY_ADDR : &str = "::"; + +type CSocket = c_int; + +pub trait WolSocket { + fn get_socket(&self) -> CSocket; + + fn send_magic_packet(&self, buf : &[u8]) -> Result { + let res = unsafe { + libc::send(self.get_socket(), buf.as_ptr() as *const libc::c_void, buf.len(), 0) + }; + if res < 0 { + Err(WolErr { + msg: format!("Failed to send packet, rc={}, error: {}", res, io::Error::last_os_error()), + code: WolErrCode::InternalError as i32 + }) + } else { + Ok(res as usize) + } + } +} + +pub struct RawSocket{ + pub cs: CSocket +} + +impl RawSocket { + pub fn new(intf_name: &str) -> Result { + vprintln(format!("Creating raw socket for interface: {}", intf_name)); + let res = unsafe { + libc::socket(libc::AF_PACKET, libc::SOCK_RAW, libc::ETH_P_ALL.to_be()) + }; + if res < 0 { + return Err(WolErr { + msg: format!("Failed to create raw socket, rc={}, error: {}", res, io::Error::last_os_error()), + code: WolErrCode::InternalError as i32 + }) + } + let _socket = RawSocket{ cs: res }; + _socket.bind_to_intf(intf_name)?; + Ok(_socket) + } + + fn bind_to_intf(&self, intf_name: &str) -> Result<(), WolErr> { + vprintln(format!("Binding raw socket to interface: {}", intf_name)); + let addr_ll: libc::sockaddr_ll = RawSocket::generate_sockaddr_ll(intf_name)?; + + vprintln(format!("Interface index={}, MAC={}", addr_ll.sll_ifindex, addr_ll.sll_addr.iter().map(|x| format!("{:02x}", x)).collect::>().join(":"))); + + let res = unsafe { + libc::bind( + self.get_socket(), + &addr_ll as *const libc::sockaddr_ll as *const libc::sockaddr, + mem::size_of::() as u32, + ) + }; + + assert_return_code_is_zero(res, "Failed to bind raw socket to intface", WolErrCode::SocketError)?; + + Ok(()) + } + + fn generate_sockaddr_ll(intf_name: &str) -> Result { + let mut addr_ll: libc::sockaddr_ll = unsafe { mem::zeroed() }; + addr_ll.sll_family = libc::AF_PACKET as u16; + addr_ll.sll_protocol = (libc::ETH_P_ALL as u16).to_be(); + addr_ll.sll_halen = 6; // MAC address length in bytes + + let mut addrs: *mut libc::ifaddrs = ptr::null_mut(); + let res = unsafe { + libc::getifaddrs(&mut addrs) + }; + assert_return_code_is_zero(res, "Failed on getifaddrs function", WolErrCode::InternalError)?; + + let mut addr = addrs; + while !addr.is_null() { + let addr_ref = unsafe { *addr }; + if addr_ref.ifa_name.is_null() { + addr = addr_ref.ifa_next; + continue; + } + + let _in = unsafe { + std::ffi::CStr::from_ptr(addr_ref.ifa_name).to_str().unwrap() + }; + if _in == intf_name { + addr_ll.sll_ifindex = unsafe { + libc::if_nametoindex(addr_ref.ifa_name) as i32 + }; + addr_ll.sll_addr = unsafe { (*(addr_ref.ifa_addr as *const libc::sockaddr_ll)).sll_addr }; + break; + } + + addr = addr_ref.ifa_next; + } + + if addr.is_null() { + return Err(WolErr { + msg: format!("Failed to find interface: {}", intf_name), + code: WolErrCode::InternalError as i32 + }); + } + + unsafe { + libc::freeifaddrs(addrs); + } + + Ok(addr_ll) + } +} + +impl WolSocket for RawSocket { + fn get_socket(&self) -> CSocket { self.cs } +} + +#[derive(Debug)] +pub struct UdpSocket{ + pub cs: CSocket +} + +impl UdpSocket { + pub fn new(intf_name: &str, dst_port: u16, ip_addr: &str) -> Result { + vprintln(format!("Creating udp socket for interface: {}, destination port: {}, ip address: {}", intf_name, dst_port, ip_addr)); + let res = match ip_addr.contains(':') { + true => unsafe {libc::socket(libc::AF_INET6, libc::SOCK_DGRAM, libc::IPPROTO_UDP)}, + false => unsafe {libc::socket(libc::AF_INET, libc::SOCK_DGRAM, libc::IPPROTO_UDP)}, + }; + if res < 0 { + return Err(WolErr { + msg: format!("Failed to create udp socket, rc={}, error: {}", res, io::Error::last_os_error()), + code: WolErrCode::SocketError as i32 + }) + } + let _socket = UdpSocket{ cs: res }; + _socket.enable_broadcast()?; + _socket.bind_to_intf(intf_name)?; + _socket.connect_to_addr(dst_port, ip_addr)?; + Ok(_socket) + } + + fn enable_broadcast(&self) -> Result<(), WolErr> { + vprintln(String::from("Enabling broadcast on udp socket")); + let res = unsafe { + libc::setsockopt( + self.get_socket(), + libc::SOL_SOCKET, + libc::SO_BROADCAST, + &1 as *const i32 as *const libc::c_void, + mem::size_of::().try_into().unwrap(), + ) + }; + assert_return_code_is_zero(res, "Failed to enable broadcast on udp socket", WolErrCode::SocketError)?; + + Ok(()) + } + + fn bind_to_intf(&self, intf: &str) -> Result<(), WolErr> { + vprintln(format!("Binding udp socket to interface: {}", intf)); + let c_intf = CString::new(intf).map_err(|_| WolErr { + msg: String::from("Invalid interface name for binding"), + code: WolErrCode::SocketError as i32, + })?; + let res = unsafe { + libc::setsockopt( + self.get_socket(), + libc::SOL_SOCKET, + libc::SO_BINDTODEVICE, + c_intf.as_ptr() as *const libc::c_void, + c_intf.as_bytes_with_nul().len() as u32, + ) + }; + assert_return_code_is_zero(res, "Failed to bind udp socket to interface", WolErrCode::SocketError)?; + + Ok(()) + } + + fn connect_to_addr(&self, port: u16, ip_addr: &str) -> Result<(), WolErr> { + vprintln(format!("Setting udp socket destination as address: {}, port: {}", ip_addr, port)); + let (addr, addr_len) = match ip_addr.contains(':') { + true => ( + &ipv6_addr(port, ip_addr, ANY_INTERFACE)? as *const libc::sockaddr_in6 as *const libc::sockaddr, + mem::size_of::() as u32 + ), + false => ( + &ipv4_addr(port, ip_addr)? as *const libc::sockaddr_in as *const libc::sockaddr, + mem::size_of::() as u32 + ), + }; + let res = unsafe { + libc::connect( + self.get_socket(), + addr, + addr_len + ) + }; + assert_return_code_is_zero(res,"Failed to connect udp socket to address", WolErrCode::SocketError)?; + + Ok(()) + } +} + +impl WolSocket for UdpSocket { + fn get_socket(&self) -> CSocket { self.cs } +} + +fn ipv4_addr(port: u16, addr: &str) -> Result { + let _addr = match addr == IPV4_ANY_ADDR { + true => libc::in_addr { s_addr: libc::INADDR_ANY }, + false => libc::in_addr { s_addr: u32::from(Ipv4Addr::from_str(addr).map_err(|e| + WolErr{ + msg: format!("Failed to parse ipv4 address: {}", e), + code: WolErrCode::SocketError as i32 + } + )?).to_be() + }, + }; + Ok( + libc::sockaddr_in { + sin_family: libc::AF_INET as u16, + sin_port: port.to_be(), + sin_addr: _addr, + sin_zero: [0; 8], + } + ) +} + +fn ipv6_addr(port: u16, addr: &str, intf_name: &str) -> Result { + let _addr = match addr == IPV6_ANY_ADDR { + true => libc::IN6ADDR_ANY_INIT, + false => libc::in6_addr { s6_addr: Ipv6Addr::from_str(addr).map_err(|e| + WolErr{ + msg: format!("Failed to parse ipv6 address: {}", e), + code: WolErrCode::SocketError as i32 + } + )?.octets() + }, + }; + let _scope_id= match intf_name == ANY_INTERFACE { + true => 0, + false => unsafe { libc::if_nametoindex(CString::new(intf_name).map_err(|_| + WolErr{ + msg: String::from("Invalid interface name for binding"), + code: WolErrCode::SocketError as i32 + } + )?.as_ptr()) as u32 + } + }; + Ok( + libc::sockaddr_in6 { + sin6_family: libc::AF_INET6 as u16, + sin6_port: port.to_be(), + sin6_flowinfo: 0, + sin6_addr: _addr, + sin6_scope_id: _scope_id.to_be(), + } + ) +} + +fn assert_return_code_is_zero(rc: i32, msg: &str, err_code: WolErrCode) -> Result<(), WolErr> { + if rc != 0 { + Err(WolErr { + msg: format!("{}, rc={},error: {}", msg, rc, io::Error::last_os_error()), + code: err_code as i32, + }) + } else { + Ok(()) + } +} + + +#[cfg(test)] +mod tests { + use super::*; + + #[test] + fn test_ipv4_addr() { + let port = 1234; + let addr = ipv4_addr(port, IPV4_ANY_ADDR).unwrap(); + assert_eq!(addr.sin_family , libc::AF_INET as u16); + assert_eq!(addr.sin_port.to_le() , port.to_be()); + assert_eq!(addr.sin_addr.s_addr , libc::INADDR_ANY); + assert_eq!(addr.sin_zero , [0; 8]); + + let ip = "1.1.1.1"; + let addr = ipv4_addr(port, &ip).unwrap(); + assert_eq!(addr.sin_family , libc::AF_INET as u16); + assert_eq!(addr.sin_port.to_le() , port.to_be()); + assert_eq!(addr.sin_addr.s_addr , u32::from(Ipv4Addr::from_str(ip).unwrap()).to_be()); + assert_eq!(addr.sin_zero , [0; 8]); + } + + #[test] + fn test_ipv6_addr() { + let port = 1234; + let addr = ipv6_addr(port, IPV6_ANY_ADDR, ANY_INTERFACE).unwrap(); + assert_eq!(addr.sin6_family , libc::AF_INET6 as u16); + assert_eq!(addr.sin6_port.to_le() , port.to_be()); + assert_eq!(addr.sin6_flowinfo , 0); + assert_eq!(addr.sin6_addr.s6_addr , libc::IN6ADDR_ANY_INIT.s6_addr); + assert_eq!(addr.sin6_scope_id , 0); + + let ip = "2001:db8::1"; + let addr = ipv6_addr(port, &ip, ANY_INTERFACE).unwrap(); + assert_eq!(addr.sin6_family , libc::AF_INET6 as u16); + assert_eq!(addr.sin6_port.to_le() , port.to_be()); + assert_eq!(addr.sin6_flowinfo , 0); + assert_eq!(addr.sin6_addr.s6_addr , Ipv6Addr::from_str(ip).unwrap().octets()); + assert_eq!(addr.sin6_scope_id , 0); + } + + #[test] + fn test_assert_return_code_is_zero() { + let rc = 0; + assert_eq!(assert_return_code_is_zero(rc, "", WolErrCode::InternalError).is_ok(), true); + + let rc = -1; + let msg = "test"; + let err_code = WolErrCode::InternalError; + let result = assert_return_code_is_zero(rc, msg, err_code); + assert_eq!(result.is_err(), true); + assert_eq!(result.as_ref().unwrap_err().code, WolErrCode::InternalError as i32); + assert_eq!(result.unwrap_err().msg, format!("{}, rc=-1,error: {}", msg, io::Error::last_os_error())); + } +} \ No newline at end of file diff --git a/src/sonic-nettools/wol/src/wol.rs b/src/sonic-nettools/wol/src/wol.rs index b5d598d369f3..ff04c017cb78 100644 --- a/src/sonic-nettools/wol/src/wol.rs +++ b/src/sonic-nettools/wol/src/wol.rs @@ -1,15 +1,26 @@ use clap::builder::ArgPredicate; use clap::Parser; -use pnet::datalink::Channel::Ethernet; -use pnet::datalink::{self, DataLinkSender, MacAddr, NetworkInterface}; +use pnet::datalink; use std::fs::read_to_string; +use std::net::IpAddr; use std::result::Result; use std::str::FromStr; +use std::sync::Mutex; use std::thread; use std::time::Duration; +use crate::socket::{WolSocket, RawSocket, UdpSocket}; + const BROADCAST_MAC: [u8; 6] = [0xff, 0xff, 0xff, 0xff, 0xff, 0xff]; +pub static VERBOSE_OUTPUT: Mutex = Mutex::new(false); + +pub fn vprintln(msg: String) { + if *VERBOSE_OUTPUT.lock().unwrap() { + println!("{}", msg); + } +} + #[derive(Parser, Debug)] #[command( next_line_help = true, @@ -20,7 +31,13 @@ Examples: wol Ethernet10 00:11:22:33:44:55 wol Ethernet10 00:11:22:33:44:55 -b wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -p 00:22:44:66:88:aa - wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -p 192.168.1.1 -c 3 -i 2000" + wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -p 192.168.1.1 -c 3 -i 2000 + wol Ethernet10 00:11:22:33:44:55,11:33:55:77:99:bb -u + wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -u -c 3 -i 2000 + wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -u -a 192.168.255.255 + wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -u -a ffff::ffff + wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -u -a +" )] struct WolArgs { /// The name of the network interface to send the magic packet through @@ -30,29 +47,31 @@ struct WolArgs { target_mac: String, /// The flag to indicate if use broadcast MAC address instead of target device's MAC address as Destination MAC Address in Ethernet Frame Header [default: false] - #[arg(short, long, default_value_t = false)] + #[arg(short, long, default_value_t = false, conflicts_with("udp"))] broadcast: bool, + /// The flag to indicate if send udp packet [default: false] + #[arg(short, long, default_value_t = false, conflicts_with("broadcast"))] + udp: bool, + + /// The destination ip address, both IPv4 address and IPv6 address are supported + #[arg(short = 'a', long, default_value_t = String::from("255.255.255.255"), requires_if(ArgPredicate::IsPresent, "udp"))] + ip_address: String, + + /// The destination udp port. + #[arg(short = 't', long, default_value_t = 9, requires_if(ArgPredicate::IsPresent, "udp"))] + udp_port: u16, + /// An optional 4 or 6 byte password, in ethernet hex format or quad-dotted decimal (e.g. "127.0.0.1" or "00:11:22:33:44:55") #[arg(short, long, value_parser = parse_password)] password: Option, - /// For each target MAC address, the count of magic packets to send. count must between 1 and 5. This param must use with -i. [default: 1] - #[arg( - short, - long, - default_value_t = 1, - requires_if(ArgPredicate::IsPresent, "interval") - )] + /// For each target MAC address, the count of magic packets to send. count must between 1 and 5. This param must use with -i. + #[arg(short, long, default_value_t = 1, requires_if(ArgPredicate::IsPresent, "interval"))] count: u8, - /// Wait interval milliseconds between sending each magic packet. interval must between 0 and 2000. This param must use with -c. [default: 0] - #[arg( - short, - long, - default_value_t = 0, - requires_if(ArgPredicate::IsPresent, "count") - )] + /// Wait interval milliseconds between sending each magic packet. interval must between 0 and 2000. This param must use with -c. + #[arg(short, long, default_value_t = 0, requires_if(ArgPredicate::IsPresent, "count"))] interval: u64, /// The flag to indicate if we should print verbose output @@ -83,42 +102,31 @@ impl std::fmt::Display for WolErr { } } -enum WolErrCode { +pub enum WolErrCode { SocketError = 1, InvalidArguments = 2, - UnknownError = 999, + InternalError = 255, } pub fn build_and_send() -> Result<(), WolErr> { let args = WolArgs::parse(); let target_macs = parse_target_macs(&args)?; valide_arguments(&args)?; + *VERBOSE_OUTPUT.lock().unwrap() = args.verbose; let src_mac = get_interface_mac(&args.interface)?; - let mut tx = open_tx_channel(&args.interface)?; + let socket = create_wol_socket(&args)?; for target_mac in target_macs { - if args.verbose { - println!( + vprintln(format!( "Building and sending packet to target mac address {}", target_mac .iter() .map(|b| format!("{:02X}", b)) .collect::>() .join(":") - ); - } - let dst_mac = if args.broadcast { - BROADCAST_MAC - } else { - target_mac - }; - let magic_bytes = build_magic_packet(&src_mac, &dst_mac, &target_mac, &args.password)?; - send_magic_packet( - &mut tx, - magic_bytes, - &args.count, - &args.interval, - &args.verbose, - )?; + ) + ); + let magic_bytes = build_magic_bytes(&args, &src_mac, &target_mac, &args.password)?; + send_magic_packet(socket.as_ref(), magic_bytes, &args.count, &args.interval)?; } Ok(()) @@ -149,11 +157,18 @@ fn valide_arguments(args: &WolArgs) -> Result<(), WolErr> { }); } + if IpAddr::from_str(&args.ip_address).is_err() { + return Err(WolErr { + msg: String::from("Invalid ip address"), + code: WolErrCode::InvalidArguments as i32, + }); + } + Ok(()) } fn parse_mac_addr(mac_str: &str) -> Result<[u8; 6], WolErr> { - MacAddr::from_str(mac_str) + datalink::MacAddr::from_str(mac_str) .map(|mac| mac.octets()) .map_err(|_| WolErr { msg: String::from("Invalid MAC address"), @@ -230,14 +245,14 @@ fn is_ipv4_address_valid(ipv4_str: &str) -> bool { fn get_interface_mac(interface_name: &String) -> Result<[u8; 6], WolErr> { if let Some(interface) = datalink::interfaces() .into_iter() - .find(|iface: &NetworkInterface| iface.name == *interface_name) + .find(|iface: &datalink::NetworkInterface| iface.name == *interface_name) { if let Some(mac) = interface.mac { Ok(mac.octets()) } else { Err(WolErr { msg: String::from("Could not get MAC address of target interface"), - code: WolErrCode::UnknownError as i32, + code: WolErrCode::InternalError as i32, }) } } else { @@ -248,91 +263,76 @@ fn get_interface_mac(interface_name: &String) -> Result<[u8; 6], WolErr> { } } -fn build_magic_packet( +fn build_magic_bytes( + args: &WolArgs, src_mac: &[u8; 6], - dst_mac: &[u8; 6], target_mac: &[u8; 6], password: &Option, ) -> Result, WolErr> { let password_len = password.as_ref().map_or(0, |p| p.ref_bytes().len()); - let mut pkt = vec![0u8; 116 + password_len]; - pkt[0..6].copy_from_slice(dst_mac); - pkt[6..12].copy_from_slice(src_mac); - pkt[12..14].copy_from_slice(&[0x08, 0x42]); - pkt[14..20].copy_from_slice(&[0xff; 6]); - pkt[20..116].copy_from_slice(&target_mac.repeat(16)); + let mut mbs = vec![0u8; 102 + password_len]; + mbs[0..6].copy_from_slice(&[0xff; 6]); + mbs[6..102].copy_from_slice(&target_mac.repeat(16)); if let Some(p) = password { - pkt[116..116 + password_len].copy_from_slice(p.ref_bytes()); + mbs[102..102 + password_len].copy_from_slice(p.ref_bytes()); + } + if !args.udp { + let mut _ether_header = vec![0u8; 14]; + _ether_header[0..6].copy_from_slice( if args.broadcast { &BROADCAST_MAC } else { target_mac }); + _ether_header[6..12].copy_from_slice(src_mac); + _ether_header[12..14].copy_from_slice(&[0x08, 0x42]); // EtherType for WOL + mbs.splice(0..0, _ether_header); } - Ok(pkt) + Ok(mbs) } fn send_magic_packet( - tx: &mut Box, - packet: Vec, + socket: &dyn WolSocket, + payload: Vec, count: &u8, - interval: &u64, - verbose: &bool, -) -> Result<(), WolErr> { + interval: &u64 +) -> Result<(), WolErr> +{ for nth in 0..*count { - match tx.send_to(&packet, None) { - Some(Ok(_)) => {} - Some(Err(e)) => { + match socket.send_magic_packet(&payload) { + Ok(_) => {} + Err(e) => { return Err(WolErr { msg: format!("Network is down: {}", e), code: WolErrCode::SocketError as i32, }); } - None => { - return Err(WolErr { - msg: String::from("Network is down"), - code: WolErrCode::SocketError as i32, - }); - } } - if *verbose { - println!( + + vprintln( + format!( " | -> Sent the {}th packet and sleep for {} seconds", &nth + 1, &interval - ); - println!( - " | -> Packet bytes in hex {}", - &packet + ) + ); + vprintln( + format!( + " | -> paylod bytes in hex {}", + &payload .iter() .fold(String::new(), |acc, b| acc + &format!("{:02X}", b)) ) - } + ); thread::sleep(Duration::from_millis(*interval)); } Ok(()) } -fn open_tx_channel(interface: &str) -> Result, WolErr> { - if let Some(interface) = datalink::interfaces() - .into_iter() - .find(|iface: &NetworkInterface| iface.name == interface) - { - match datalink::channel(&interface, Default::default()) { - Ok(Ethernet(tx, _)) => Ok(tx), - Ok(_) => Err(WolErr { - msg: String::from("Network is down"), - code: WolErrCode::SocketError as i32, - }), - Err(e) => Err(WolErr { - msg: format!("Network is down: {}", e), - code: WolErrCode::SocketError as i32, - }), - } + +fn create_wol_socket(args: &WolArgs) -> Result, WolErr> { + let _socket: Box = if args.udp { + Box::new(UdpSocket::new(&args.interface, args.udp_port, &args.ip_address)?) } else { - Err(WolErr { - msg: format!( - "Invalid value for \"INTERFACE\": interface {} is not up", - interface - ), - code: WolErrCode::InvalidArguments as i32, - }) - } + Box::new(RawSocket::new(&args.interface)?) + }; + + Ok(_socket) } #[cfg(test)] @@ -460,6 +460,9 @@ mod tests { interface: "Ethernet10".to_string(), target_mac: "00:11:22:33:44:55".to_string(), broadcast: false, + udp: false, + ip_address: String::from(""), + udp_port: 9, password: None, count: 1, interval: 0, @@ -509,12 +512,13 @@ mod tests { } #[test] - fn test_build_magic_packet() { + fn test_build_magic_bytes() { + let args = WolArgs::try_parse_from(&["wol", "dontcare", "dontcare"]).unwrap(); let src_mac = [0x00, 0x11, 0x22, 0x33, 0x44, 0x55]; let target_mac = [0xff, 0xff, 0xff, 0xff, 0xff, 0xff]; let four_bytes_password = Some(Password(vec![0x00, 0x11, 0x22, 0x33])); let magic_packet = - build_magic_packet(&src_mac, &target_mac, &target_mac, &four_bytes_password).unwrap(); + build_magic_bytes(&args, &src_mac, &target_mac, &four_bytes_password).unwrap(); assert_eq!(magic_packet.len(), 120); assert_eq!(&magic_packet[0..6], &target_mac); assert_eq!(&magic_packet[6..12], &src_mac); @@ -524,7 +528,7 @@ mod tests { assert_eq!(&magic_packet[116..120], &[0x00, 0x11, 0x22, 0x33]); let six_bytes_password = Some(Password(vec![0x00, 0x11, 0x22, 0x33, 0x44, 0x55])); let magic_packet = - build_magic_packet(&src_mac, &target_mac, &target_mac, &six_bytes_password).unwrap(); + build_magic_bytes(&args, &src_mac, &target_mac, &six_bytes_password).unwrap(); assert_eq!(magic_packet.len(), 122); assert_eq!(&magic_packet[0..6], &target_mac); assert_eq!(&magic_packet[6..12], &src_mac); @@ -538,13 +542,23 @@ mod tests { } #[test] - fn test_build_magic_packet_without_password() { + fn test_build_magic_bytes_without_password() { + let args = WolArgs::try_parse_from(&["wol", "dontcare", "dontcare"]).unwrap(); let src_mac = [0x00, 0x11, 0x22, 0x33, 0x44, 0x55]; - let dst_mac = [0xff, 0xff, 0xff, 0xff, 0xff, 0xff]; let target_mac = [0x01, 0x02, 0x03, 0x04, 0x05, 0x06]; - let magic_packet = build_magic_packet(&src_mac, &dst_mac, &target_mac, &None).unwrap(); + let magic_packet = build_magic_bytes(&args, &src_mac, &target_mac, &None).unwrap(); assert_eq!(magic_packet.len(), 116); - assert_eq!(&magic_packet[0..6], &dst_mac); + assert_eq!(&magic_packet[0..6], &target_mac); + assert_eq!(&magic_packet[6..12], &src_mac); + assert_eq!(&magic_packet[12..14], &[0x08, 0x42]); + assert_eq!(&magic_packet[14..20], &[0xff; 6]); + assert_eq!(&magic_packet[20..116], target_mac.repeat(16)); + let args = WolArgs::try_parse_from(&["wol", "dontcare", "dontcare", "-b"]).unwrap(); + let src_mac = [0x00, 0x11, 0x22, 0x33, 0x44, 0x55]; + let target_mac = [0x01, 0x02, 0x03, 0x04, 0x05, 0x06]; + let magic_packet = build_magic_bytes(&args, &src_mac, &target_mac, &None).unwrap(); + assert_eq!(magic_packet.len(), 116); + assert_eq!(&magic_packet[0..6], BROADCAST_MAC); assert_eq!(&magic_packet[6..12], &src_mac); assert_eq!(&magic_packet[12..14], &[0x08, 0x42]); assert_eq!(&magic_packet[14..20], &[0xff; 6]); @@ -679,9 +693,59 @@ mod tests { "error: the following required arguments were not provided:\n --interval \n\nUsage: wol --count --interval \n\nFor more information, try '--help'.\n" ); // Verbose can be set - let args = - WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-b", "--verbose"]) - .unwrap(); + let args = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-b", "--verbose"]).unwrap(); assert_eq!(args.verbose, true); + // Ip address should be valid + let args = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-b", "-a", "xxx"]); + let result = valide_arguments(&args.unwrap()); + assert!(result.is_err()); + assert_eq!( + result.unwrap_err().to_string(), + "Error: Invalid ip address" + ); + // Udp port should be in 0-65535 + let args = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-u", "-t", "65535"]) + .unwrap(); + assert_eq!(args.udp_port, 65535); + let result = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-u", "-t", "65536"]); + assert!(result.is_err()); + assert_eq!( + result.unwrap_err().to_string(), + "error: invalid value '65536' for '--udp-port ': 65536 is not in 0..=65535\n\nFor more information, try '--help'.\n" + ); + // Udp port should be specified with udp flag + let result = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-t", "9"]); + assert!(result.is_err()); + assert_eq!( + result.unwrap_err().to_string(), + "error: the following required arguments were not provided:\n --udp\n\nUsage: wol --udp --udp-port \n\nFor more information, try '--help'.\n" + ); + // Ip address should be specified with udp flag + let result = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-a", "192.168.1.1"]); + assert!(result.is_err()); + assert_eq!( + result.unwrap_err().to_string(), + "error: the following required arguments were not provided:\n --udp\n\nUsage: wol --udp --ip-address \n\nFor more information, try '--help'.\n" + ); + // Broadcast and udp flags are mutually exclusive + let result = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-b", "-u"]); + assert!(result.is_err()); + assert_eq!( + result.unwrap_err().to_string(), + "error: the argument '--broadcast' cannot be used with '--udp'\n\nUsage: wol --broadcast \n\nFor more information, try '--help'.\n" + ); + } + + #[test] + fn verify_args_default_value(){ + let args = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05"]).unwrap(); + assert_eq!(args.broadcast, false); + assert_eq!(args.udp, false); + assert_eq!(args.ip_address, "255.255.255.255"); + assert_eq!(args.udp_port, 9); + assert_eq!(args.password.is_none(), true); + assert_eq!(args.count, 1); + assert_eq!(args.interval, 0); + assert_eq!(args.verbose, false); } } diff --git a/src/sonic-pac/Makefile.am b/src/sonic-pac/Makefile.am new file mode 100644 index 000000000000..0b6907063e0e --- /dev/null +++ b/src/sonic-pac/Makefile.am @@ -0,0 +1,3 @@ +SUBDIRS = fpinfra paccfg pacoper authmgr pacmgr hostapdmgr mab mabmgr + +ACLOCAL_AMFLAGS = -I m4 diff --git a/src/sonic-pac/authmgr/Makefile.am b/src/sonic-pac/authmgr/Makefile.am new file mode 100755 index 000000000000..e339c3db1dda --- /dev/null +++ b/src/sonic-pac/authmgr/Makefile.am @@ -0,0 +1,18 @@ +sonic_wpa_supp_path = $(top_srcdir)/../wpasupplicant/sonic-wpa-supplicant + +INCLUDES = -I $(top_srcdir)/paccfg -I $(top_srcdir)/pacoper -I $(top_srcdir)/authmgr/common -I $(top_srcdir)/authmgr/mapping/include -I $(top_srcdir)/fpinfra/inc -I $(top_srcdir)/authmgr/mapping/auth_mgr_sid -I $(top_srcdir)/authmgr/protocol/include -I $(sonic_wpa_supp_path)/src/common -I $(sonic_wpa_supp_path)/src/utils -I $(sonic_wpa_supp_path)/src/radius -I $(top_srcdir)/mab/mapping/include + +lib_LTLIBRARIES = libauthmgr.la + +if DEBUG +DBGFLAGS = -ggdb -DDEBUG +else +DBGFLAGS = -g -DNDEBUG +endif + +AM_CPPFLAGS = -save-temps -Wall -Wno-pointer-sign -Wno-pointer-sign -Wno-unused-but-set-variable -Wno-address -Wno-array-bounds -Wno-sequence-point -Wno-switch -Wno-uninitialized -Wno-unused-result -Wno-aggressive-loop-optimizations -Wno-sizeof-pointer-memaccess -Wno-unused-local-typedefs -Wno-unused-value -Wno-format-truncation -g -Werror $(SONIC_COMMON_CFLAGS) -DCONFIG_CTRL_IFACE -DCONFIG_CTRL_IFACE_UNIX -DCONFIG_SONIC_HOSTAPD + +libauthmgr_la_SOURCES = $(top_srcdir)/authmgr/protocol/auth_mgr_db.c $(top_srcdir)/authmgr/mapping/auth_mgr_cnfgr.c $(top_srcdir)/authmgr/mapping/auth_mgr_cfg.c $(top_srcdir)/authmgr/mapping/auth_mgr_api.c $(top_srcdir)/authmgr/mapping/auth_mgr_control.c $(top_srcdir)/authmgr/mapping/auth_mgr_client.c $(top_srcdir)/authmgr/mapping/auth_mgr_ih.c $(top_srcdir)/authmgr/mapping/auth_mgr_debug.c $(top_srcdir)/authmgr/mapping/auth_mgr_sid/auth_mgr_sid.c $(top_srcdir)/authmgr/mapping/auth_mgr_dot1x.c $(top_srcdir)/authmgr/mapping/auth_mgr_mab.c $(top_srcdir)/authmgr/mapping/auth_mgr_socket.c $(top_srcdir)/authmgr/protocol/auth_mgr_sm.c $(top_srcdir)/authmgr/protocol/auth_mgr_mac_db.c $(top_srcdir)/authmgr/protocol/auth_mgr_radius.c $(top_srcdir)/authmgr/protocol/auth_mgr_timer.c $(top_srcdir)/authmgr/protocol/auth_mgr_utils.c $(top_srcdir)/authmgr/protocol/auth_mgr_vlan.c $(top_srcdir)/authmgr/protocol/auth_mgr_vlan_db.c $(top_srcdir)/authmgr/protocol/auth_mgr_txrx.c $(sonic_wpa_supp_path)/src/common/wpa_ctrl.c $(sonic_wpa_supp_path)/src/utils/os_unix.c + +libauthmgr_la_LIBADD = -L$(top_srcdir)/fpinfra/ -lfpinfra -L$(top_srcdir)/paccfg/ -lpaccfg -L$(top_srcdir)/pacoper/ -lpacoper $(SONIC_COMMON_LDFLAGS) + diff --git a/src/sonic-pac/authmgr/common/auth_mgr_api.h b/src/sonic-pac/authmgr/common/auth_mgr_api.h new file mode 100755 index 000000000000..678fc7b7706c --- /dev/null +++ b/src/sonic-pac/authmgr/common/auth_mgr_api.h @@ -0,0 +1,1856 @@ +/* + * Copyright 2024 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#ifndef __AUTH_MGR_API_H_ +#define __AUTH_MGR_API_H_ + +/* USE C Declarations */ +#ifdef __cplusplus +extern "C" { +#endif + +#include "auth_mgr_exports.h" +#include "datatypes.h" + + +typedef struct authmgrAuthRespParams_s +{ + AUTHMGR_METHOD_t method; + AUTHMGR_STATUS_t status; + authmgrClientStatusInfo_t clientParams; +}authmgrAuthRespParams_t; + + +/********************************************************************* +* @purpose Get initialize value for a port +* +* @param intIfNum @b{(input)} internal interface number +* @param *initialize @b{(output)} initialize value +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments This value indicates whether a port is being initialized +* due to a management request +* +* @end +*********************************************************************/ +RC_t authmgrPortInitializeGet(uint32 intIfNum, BOOL *initialize); + +/********************************************************************* +* @purpose Set initialize value for a port +* +* @param intIfNum @b{(input)} internal interface number +* @param initialize @b{(input)} initialize value +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments This value is set to TRUE by management in order to force +* initialization of a port. It is re-set to FALSE after +* initialization has completed. +* +* @end +*********************************************************************/ +RC_t authmgrPortInitializeSet(uint32 intIfNum, BOOL initialize); + +/********************************************************************* +* @purpose Get auth mgr reauthenticate timer value +* +* @param intIfNum @b{(input)} internal interface number +* @param *timerVal@b{(output)}reauthenticate timer value +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrPortAuthRestartTimerGet(uint32 intIfNum, uint32 *timerVal); + +/********************************************************************* +* @purpose Set auth mgr reauthenticate timer value +* +* @param intIfNum @b{(input)} internal interface number +* @param timerval @b{(input)} reauthenticate timer value +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments Authentication restart timer value , for which the port will wait before, + retstarting authentication when all the authentication methods fail. +* +* @end +*********************************************************************/ +RC_t authmgrPortAuthRestartTimerSet(uint32 intIfNum, uint32 timerVal); + +/********************************************************************* +* @purpose Set auth mgr method or priority +* +* @param mode @b{(input)} order or priority +* @param index @b{(input)} position of the method or order +* @param method @b{(input)} authentication manager methods, + i.e.dot1x/mab/cp +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments Authentication restart timer value , for which the port will wait before, + retstarting authentication when all the authentication methods fail. +* +* @end +*********************************************************************/ +RC_t authmgrPortAuthMethodSet( AUTHMGR_METHOD_TYPE_t mode, uint32 intIfNum, + uint32 index, AUTHMGR_METHOD_t method); +/********************************************************************* +* @purpose Get auth mgr method or priority +* +* @param mode @b{(input)} order or priority +* @param index @b{(input)} position of the method or order +* @param *method @b{(output)} authentication manager methods, + i.e.dot1x/mab/cp +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments Authentication restart timer value , for which the port will wait before, + retstarting authentication when all the authentication methods fail. +* +* @end +*********************************************************************/ +RC_t authmgrPortAuthMethodGet( AUTHMGR_METHOD_TYPE_t mode, uint32 intIfNum, + uint32 index, AUTHMGR_METHOD_t *method); + +/********************************************************************* + * @purpose Clear authmgr stats for specified port + * + * @param intIfNum @b{(input)} internal interface number + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrPortStatsClear(uint32 intIfNum); +/********************************************************************* + * @purpose Get authmgr stats for specified port + * + * @param intIfNum @b{(input)} internal interface number + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrPortStatsGet(uint32 intIfNum, AUTHMGR_STATS_TYPE_t method, uint32 *stats); + +/********************************************************************* +* @purpose Return Internal Interface Number of next valid interface for +* authmgr. +* +* @param intIfNum @b{(input)} Internal Interface Number +* @param pNextintIfNum @b{(output)} pointer to Next Internal Interface Number, +* +* @returns SUCCESS if success +* @returns ERROR if interface does not exist +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrNextValidIntf(uint32 intIfNum, uint32 *pNextIntIfNum); +/********************************************************************* +* @purpose Return Internal Interface Number of the first valid interface for +* authmgr. +* +* @param pFirstIntIfNum @b{(output)} pointer to first internal interface number +* +* @returns SUCCESS if success +* @returns ERROR if interface does not exist +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrFirstValidIntfNumber(uint32 *pFirstIntIfNum); + +/********************************************************************* +* @purpose Returns the first logical port for the physcial interface +* +* @param intIfNum @b{(input)} internal interface number +* @param lIntIfNum @b((output)) the logical interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortFirstGet(uint32 intIfNum,uint32 *lIntIfNum); + +/********************************************************************* +* @purpose Returns the first logical port for the physcial interface +* +* @param lIntIfNum @b((input)) the logical interface +* @param nextIntf @b{(ouput)} the next interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortNextGet(uint32 lIntIfNum,uint32 *nextIntf); + +/********************************************************************* +* @purpose Returns the User Name for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param userName @b((output)) user name for the logical interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortUserNameGet (uint32 lIntIfNum, + uchar8 *userName); + +/********************************************************************* +* @purpose Returns the accouting session Id for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param acctSessionIdStr @b((output)) Accouting Session Id +* for the logical interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortAcctSessionIdGet (uint32 lIntIfNum, + uchar8 *acctSessionIdStr); + +/********************************************************************* +* @purpose Returns the client Mac address for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param macAddr @b((output)) Mac Address of the supplicant +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortClientMacAddrGet(uint32 lIntIfNum, + uchar8 *macAddr); + + +/********************************************************************* +* @purpose Returns the physical port corresponding to the logical interface +* +* @param lIntIfNum @b((input)) the logical interface +* @param physport @b{(ouput)} the physical interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrPhysicalPortGet(uint32 lIntIfNum,uint32 *physPort); + +/********************************************************************* +* +* @purpose Update the status and other information of the client + from the authentication method to Auth Mgr. +* +* @param uint32 intIfNum @b((input)) Internal interface number +* @param method @b{(input)} authentication manager methods, + i.e.dot1x/mab/cp +* @param status @b{(input)} authentication status, + i.e start/success/fail/timeout. +* @param clientParams @b{(input)} client status event related information +* +* @returns SUCCESS +* @returns FAILURE +* +* @notes This API is called from DOT1X and CP when they are starting the authentication + and also when the method is success/failure/timedout +* +* @end +*********************************************************************/ +RC_t authmgrPortClientAuthStatusUpdate(uint32 intIfNum, + AUTHMGR_METHOD_t method, + AUTHMGR_STATUS_t status, + void *clientParams); + + +/****************************************************************************** + * @purpose Gets the next History Log interface index + * + * @param intIfNum @b{(input/output)} Physical Interface Number + * + * @returns SUCCESS + * @returns FAILURE If there are no entries + * + * @notes + * + * @end + *******************************************************************************/ +RC_t authmgrAuthHistoryLogIfIndexNextGet(uint32 *intIfNum); + + +/****************************************************************************** + * @purpose Gets the next History Log entry indexs + * + * @param intIfNum @b{(input/output)} Physical Interface Number + * @param entryIndex @b{(input/output)} EntryIndex + * + * @returns SUCCESS + * @returns FAILURE If there are no entries + * + * @notes + * + * @end + *******************************************************************************/ +RC_t authmgrAuthHistoryLogIndexNextGet(uint32 *intIfNum, + uint32 *entryIndex); +/****************************************************************************** + * @purpose Gets the next History Log entry indexs in reverse order + * + * @param intIfNum @b{(input/output)} Physical Interface Number + * @param entryIndex @b{(input/output)} EntryIndex + * + * @returns SUCCESS + * @returns FAILURE If there are no entries + * + * @notes + * + * @end + *******************************************************************************/ +RC_t authmgrAuthHistoryLogReverseIndexNextGet(uint32 *intIfNum, + uint32 *entryIndex); + +/********************************************************************* + * @purpose Purge all authmgr auth history log entries for the given + * interface + * + * @param intIfNum @b{(input)} Physical Interface Number + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @notes + * @end + * + **********************************************************************/ +RC_t authmgrAuthHistoryLogInterfacePurge(uint32 intIfNum); + +/********************************************************************* + * @purpose Purge all authmgr auth history log entries + * + * @param void + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @notes + * + * @end + * + **********************************************************************/ +RC_t authmgrAuthHistoryLogPurgeAll(); + + +/********************************************************************* + * @purpose Get the timestamp from the authmgr Auth History table + * + * @param intIfNum @b{(input)} Physical Interface Number + * @param entryIndex @b{(input)} EntryIndex + * @param pTimeStamp @b{(output)} reference to the Reason Code + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @notes + * + * @end + * + *********************************************************************/ +RC_t authmgrAuthHistoryLogTimestampGet(uint32 intIfNum, + uint32 entryIndex, + uint32 *pTimeStamp); + +/********************************************************************* + * @purpose Get the VlanId from the authmgr Auth History table + * + * @param intIfNum @b{(input)} Physical Interface Number + * @param entryIndex @b{(input)} EntryIndex + * @param pVlanId @b{(output)} reference to the VLANID + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @notes + * + * @end + * + *********************************************************************/ +RC_t authmgrAuthHistoryLogVlanIdGet(uint32 intIfNum, + uint32 entryIndex, + ushort16 *pVlanId); + +/********************************************************************* + * @purpose Get the VlanId from the authmgr Auth History table + * + * @param intIfNum @b{(input)} Physical Interface Number + * @param entryIndex @b{(input)} EntryIndex + * @param pMethod @b{(output)} reference to the auth Method + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @notes + * + * @end + * + *********************************************************************/ +RC_t authmgrAuthHistoryLogMethodGet(uint32 intIfNum, + uint32 entryIndex, + AUTHMGR_METHOD_t *pMethod); + +/********************************************************************* + * @purpose Get the reasonCode from the authmgr Auth History table + * + * @param intIfNum @b{(input)} Physical Interface Number + * @param entryIndex @b{(input)} EntryIndex + * @param pReasonCode @b{(output)} Reference to the Reason Code + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @notes + * + * @end + * + *********************************************************************/ +RC_t authmgrAuthHistoryLogReasonCodeGet(uint32 intIfNum, + uint32 entryIndex, + uint32 *pReasonCode); + +/********************************************************************* + * @purpose Get the accessStatus from the authmgr Auth History table + * + * @param intIfNum @b{(input)} Physical Interface Number + * @param entryIndex @b{(input)} EntryIndex + * @param pStatus @b{(output)} Reference to the Access Status + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @notes + * + * @end + * + *********************************************************************/ +RC_t authmgrAuthHistoryLogAuthStatusGet(uint32 intIfNum, + uint32 entryIndex, + uint32 *pStatus); + + +/********************************************************************* + * @purpose Get the authmgr authentication Status from the authmgr Auth + * History table + * + * @param intIfNum @b{(input)} Physical Interface Number + * @param entryIndex @b{(input)} EntryIndex + * @param pStatus @b{(output)} Reference to the Auth Status + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @notes + * + * @end + * + *********************************************************************/ +RC_t authmgrAuthHistoryLogAuthStatusGet(uint32 intIfNum, + uint32 entryIndex, + uint32 *pStatus); + +/********************************************************************* + * @purpose Get the supplicant Mac Address from the authmgr Auth History table + * + * @param intIfNum @b{(input)} Physical Interface Number + * @param entryIndex @b{(input)} EntryIndex + * @param pMacAddress @b{(output)} Reference to the Mac Address + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @notes + * + * @end + * + *********************************************************************/ +RC_t authmgrAuthHistoryLogClientMacAddressGet(uint32 intIfNum, + uint32 entryIndex, + enetMacAddr_t *pMacAddress); + +/********************************************************************* + * @purpose Get the FilterID for the Authmgr Radius Accept Packet + * located in the authmgr Auth History table + * + * @param intIfNum @b{(input)} Physical Interface Number + * @param entryIndex @b{(input)} EntryIndex + * @param pFilterId @b{(output)} Reference to the filter Id + * @param pFilterLen @b{(input/output)} Reference to filter Length + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @notes + * + * @end + * + *********************************************************************/ +RC_t authmgrAuthHistoryLogFilterIdGet (uint32 intIfNum, + uint32 entryIndex, + uchar8 *pFilterIdName, + uint32 *pFilterLen); + +/********************************************************************* + * @purpose Check if the authmgr auth history log entry exists in History + * table + * + * @param intIfNum @b{(input)} Physical Interface Number + * @param entryIndex @b{(input)} EntryIndex + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @notes + * + * @end + * + *********************************************************************/ +RC_t authmgrAuthHistoryLogEntryIsValid(uint32 intIfNum, + uint32 entryIndex); + /********************************************************************* + * @purpose Return Reason in String format for the given entry + * + * @param intIfNum (input) - Interface + * entryIndex (input) - Entry Index + * reasonCode (input) - Reason Code + * strReason (output) - Reason in String format + * strLen (input/output) - Length of Reason String + * + * @returns SUCCESS/ FAILURE + * + * @comments + * + * @notes + * + * @end + * + *********************************************************************/ +RC_t authmgrAuthHistoryLogReasonStringGet(uint32 intIfNum, + uint32 entryIndex, + uint32 reasonCode, + char8 *strReason, + uint32 *strLen); + +/********************************************************************* + * @purpose Verify specified config interface index is valid + * + * @param intIfNum @b{(input)} Internal interface number + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrIntfIndexGet(uint32 intIfNum); + +/********************************************************************* + * @purpose Determine next sequential auth Mgr config interface index + * + * @param intIfNum @b{(input)} Internal interface number to begin search + * @param *pNext @b{(output)} Ptr to next internal interface number + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrIntfIndexGetNext(uint32 intIfNum, uint32 *pNext); + +/********************************************************************* + * @purpose Verify specified index exists + * + * @param index @b{(input)} index of the config array + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments Auth Mgr expects the index to come to the api with incremented by 1. + In the API we reduce the index by 1 as the data structure is array. + * + * @end + *********************************************************************/ +RC_t authmgrMethodIndexGet(uint32 index); + +/********************************************************************* + * @purpose Determine next sequential index + * + * @param index @b{(input)} index of the config array + * @param *pNext @b{(output)} Ptr to next priority + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrIndexGetNext(uint32 index, uint32 *pNext); + +/********************************************************************* + * @purpose Determine next sequential auth Mgr config interface index + * + * @param intIfNum @b{(input)} Internal interface number to begin search + * @param *pNext @b{(output)} Ptr to next internal interface number + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrEntryIndexGet(uint32 intIfNum, uint32 index); +/********************************************************************* + * @purpose Determine next sequential auth Mgr config interface index + * + * @param intIfNum @b{(input)} Internal interface number to begin search + * @param *pNext @b{(output)} Ptr to next internal interface number + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrEntryIndexGetNext(uint32 intIfNum, uint32 *pNextNum, + uint32 index, uint32 *pNextIndex); + +/********************************************************************* + * @purpose chechks if method order config is valid. + * + * @param intIfNum @b{(input)} internal interface number + * @param method @b{(input)} authentication manager methods, + i.e.dot1x/mab/cp + * + * @returns TRUE + * @returns FALSE + * + * @comments This API should only be called from the methods DOT1X and captive portal + applications only. When 8021x or CP receives a PDU or packet then they + query Auth mgr if the can start authentication process.This API returns if the + same can start the authentication process. + * + * @end + *********************************************************************/ +RC_t authmgrPortAuthMethodStartAuthAllowed(uint32 intIfNum, AUTHMGR_METHOD_t method); +/********************************************************************* + * @purpose gets the authenticated method or currently running authenticated method for the client + * + * @param intIfNum @b{(input)} internal interface number + * @param mac_addr @b{(input)}client's mac address + * @param *method @b{(input)}reference to the method + * + * @returns FALSE_ + * @returns TRUE + * + * @comments This API should only be called from the methods DOT1X and captive portal + * + * @end + *********************************************************************/ +RC_t authmgrClientAuthenticatedMethodGet(uint32 intIfNum, enetMacAddr_t mac_addr, AUTHMGR_METHOD_t *method ); + +/********************************************************************* + * @purpose chechs if method is Enabled. + * + * @param intIfNum @b{(input)} internal interface number + * @param method @b{(input)} authentication method which is being checked, + i.e.dot1x/mab/cp + * @param *entryIndex @b{(outout)}reference to the entry index + * + * @returns FALSE + * @returns TRUE + * + * @comments This API should only be called from the methods DOT1X and captive portal + applications only. + * + * @end + *********************************************************************/ + + BOOL authmgrIsMethodEnabled(uint32 intIfNum, AUTHMGR_METHOD_t method, uint32 *entryIndex); +/********************************************************************* + * @purpose Determine if the interface is valid for auth mgr + * + * @param intIfNum @b{(input)} internal interface number + * + * @returns TRUE + * @returns FALSE + * + * @comments none + * + * @end + *********************************************************************/ + BOOL authmgrIsValidIntf(uint32 intIfNum); + +/********************************************************************* +* @purpose Get number of attempts for the method +* +* @param intIfNum @b{(input)} internal interface number +* @param method @b{(input)} method for which the attempts are requested +* @param *numAttempts @b{(output)} number of attempts +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrPortAttemptsGet(uint32 intIfNum, AUTHMGR_METHOD_t method, uint32 *numAttempts); + +/********************************************************************* +* @purpose Get number of failed attempts for the method +* +* @param intIfNum @b{(input)} internal interface number +* @param method @b{(input)} method for which the attempts are requested +* @param *numAttempts @b{(output)} number of attempts +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrPortFailedAttemptsGet(uint32 intIfNum, AUTHMGR_METHOD_t method, uint32 *numAttempts); + + +/********************************************************************* + * @purpose Determine next sequential index + * + * @param index @b{(input)} index of the config array + * @param *pNext @b{(output)} Ptr to next priority + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrMethodIndexGetNext(uint32 index, uint32 *pNext); + +/********************************************************************* + * @purpose Get the number of clients authenticated. + * + * @param intIfNum @b((input)) interface number + * @param pCount @b((output)) ptr to the number of clients + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @notes + * @notes + * + * @end + * + *********************************************************************/ +RC_t authmgrNumClientsGet(uint32 intIfNum, uint32 *pCount); + +/********************************************************************* + * @purpose Get the number of clients authenticated. + * + * @param intIfNum @b((input)) interface number +* @param mode @b{(input)} order or priority +* @param index @b{(input)} position of the method or order +* @param *method @b{(output)} authentication manager methods, + i.e.dot1x/mab/cp + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @notes + * @notes + * + * @end + * + *********************************************************************/ +RC_t authmgrEnabledMethodGet( AUTHMGR_METHOD_TYPE_t mode, uint32 intIfNum, + uint32 index, AUTHMGR_METHOD_t *method); + +/********************************************************************* +* @purpose Returns the client authenticated Method for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param method @b((output)) authenticating method +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortClientAuthenticatedMethodGet(uint32 lIntIfNum, + AUTHMGR_METHOD_t *method); + + +/********************************************************************* +* @purpose Returns the client auth state for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param state @b((output)) authenticating state +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortClientAuthStateGet(uint32 lIntIfNum, + AUTHMGR_STATES_t *state); + +/********************************************************************* +* @purpose Returns the client reauth state for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param state @b((output)) reauthenticating state +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortClientReauthStateGet(uint32 lIntIfNum, + BOOL *state); + +/********************************************************************* +* @purpose Returns the client auth status for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param status @b((output)) authenticated status +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortClientAuthStatusGet(uint32 lIntIfNum, + AUTHMGR_PORT_STATUS_t *status); + +/********************************************************************* +* +* @purpose Update the status and other information of the client + from the authentication method to Auth Mgr. +* +* @param uint32 intIfNum @b((input)) Internal interface number +* @param method @b{(input)} authentication manager methods, + i.e.dot1x/mab/cp +* @param status @b{(input)} TRUE/ FALSE + i.e start/success/fail/timeout. +* +* @returns SUCCESS +* @returns FAILURE +* +* @notes This API is called from DOT1X and CP when the feature is enabled or disabled. + In case of Global mode changes, the interface will come as ALL_INTERFACES + and also when the method is success/failure/timedout +* +* @end +*********************************************************************/ +RC_t authmgrMethodAdminModeCallback( uint32 intIfNum, + AUTHMGR_METHOD_t method, + BOOL status); +/********************************************************************* +* @purpose Returns the logical port for the next client Mac Address +* in the mac address database +* +* @param mac_addr @b{(input)} supplicant mac address to be searched +* @param lIntIfNum @b((output)) the logical interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments for SNMP +* +* @end +*********************************************************************/ +RC_t authmgrClientMacAddressNextGet( enetMacAddr_t *macAddr,uint32 *lIntIfNum); +/********************************************************************* +* @purpose Returns the logical port for the corresponding supplicant Mac Address +* +* @param mac_addr @b{(input)} supplicant mac address to be searched +* @param lIntIfNum @b((output)) the logical interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments for SNMP +* +* @end +*********************************************************************/ +RC_t authmgrClientMacAddressGet( enetMacAddr_t *macAddr,uint32 *lIntIfNum); +/********************************************************************* +* @purpose function to validate of Mab is enabled before 8021x +* intIfNum : interface number +* +* @returns SUCCESS if MAB is enabled before 802.1X +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ + BOOL authmgrIsMabEnabledPriorToDot1x(uint32 intIfNum); +/************************************************************************** +* @purpose Wrapper function to authentication manager API +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*************************************************************************/ +RC_t authmgrEnabledMethodGetNext(uint32 intIfNum, uint32 method, uint32 *nextMethod); + +/********************************************************************* + * @purpose Get the Authentication Method string for given method type + * + * @param method @b{(input)} Authentication Method type + * + * @returns Method name String for given input method + * + * @comments none + * + * @end + *********************************************************************/ + uchar8 *authmgrMethodTypeToName( AUTHMGR_METHOD_t method); + +/********************************************************************* +* @purpose Get port control mode +* +* @param intIfNum @b{(input)} internal interface number +* @param *portControl @b{(output)} port control mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +extern RC_t authmgrPortControlModeGet(uint32 intIfNum, AUTHMGR_PORT_CONTROL_t *portControl); + +/********************************************************************* +* @purpose Set port control mode +* +* @param intIfNum @b{(input)} internal interface number +* @param portControl @b{(input)} port control mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +extern RC_t authmgrPortControlModeSet(uint32 intIfNum, AUTHMGR_PORT_CONTROL_t portControl); + +/********************************************************************* +* @purpose Get Authentiation Server timeout value +* +* @param intIfNum @b{(input)} internal interface number +* @param *serverTimeout @b{(output)} Authentication Server timeout +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The serverTimeout is the initialization value for aWhile, +* which is a timer used by the Authenticator state machine +* to time out the Authentiation Server. +* +* @end +*********************************************************************/ +extern RC_t authmgrPortServerTimeoutGet(uint32 intIfNum, uint32 *serverTimeout); + +/********************************************************************* +* @purpose Set Authentiation Server timeout value +* +* @param intIfNum @b{(input)} internal interface number +* @param serverTimeout @b{(input)} Authentication Server timeout +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The serverTimeout is the initialization value for aWhile, +* which is a timer used by the Authenticator state machine +* to time out the Authentiation Server. +* +* @end +*********************************************************************/ +extern RC_t authmgrPortServerTimeoutSet(uint32 intIfNum, uint32 serverTimeout); +/********************************************************************* +* +* @purpose Callback from DTL informing about an unauthorized address +* +* @param uint32 intIfNum @b((input)) Internal interface number +* @param enetMacAddr_t macAddr @b((output)) MAC address +* @param ushort16 vlanId @b((output)) VLAN ID +* +* @returns SUCCESS +* @returns FAILURE +* +* @notes none +* +* @end +*********************************************************************/ +extern RC_t authmgrUnauthAddrCallBack( uint32 intIfNum, enetMacAddr_t macAddr, ushort16 vlanId ); + + +/********************************************************************* +* @purpose Get host control mode +* +* @param intIfNum @b{(input)} internal interface number +* @param *hostControl @b{(output)} host control mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +extern RC_t authmgrHostControlModeGet(uint32 intIfNum, AUTHMGR_HOST_CONTROL_t *hostControl); + +/********************************************************************* +* @purpose Set port control mode +* +* @param intIfNum @b{(input)} internal interface number +* @param portControl @b{(input)} port control mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrHostControlModeSet(uint32 intIfNum, AUTHMGR_HOST_CONTROL_t hostMode); + +/********************************************************************* + * @purpose Determine if the interface type is valid to participate in authmgr + * + * @param sysIntfType @b{(input)} interface type + * + * @returns TRUE + * @returns FALSE + * + * @comments + * + * @end + *********************************************************************/ + BOOL authmgrIsValidIntfType(uint32 sysIntfType); + + +/********************************************************************* +* @purpose Determine if a client is authenticated on an interface +* +* @param intIfNum @b{(input)} internal interface number +* @param macAddr @b{(input)} client's MAC address +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ + BOOL authmgrPortClientAuthenticationGet(uint32 intIfNum, uchar8 *macAddr); + +/********************************************************************* +* @purpose Get operational value of controlled directions +* +* @param intIfNum @b{(input)} internal interface number +* @param *portStatus @b{(output)} port authentication status +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +extern RC_t authmgrPortAuthControlledPortStatusGet(uint32 intIfNum, + AUTHMGR_PORT_STATUS_t *portStatus); + +/********************************************************************* +* @purpose Get the port autherization status. +* +* @param intIfNum @b{(input)} internal interface number +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +extern RC_t authmgrPortIsAuthorized(uint32 intIfNum); + +/********************************************************************* + * @purpose Get the Authentication Method string for given method type + * + * @param method @b{(input)} Authentication Method type + * + * @returns Method name String for given input method + * + * @comments none + * + * @end + *********************************************************************/ +extern uchar8 *authmgrMethodTypeToName( AUTHMGR_METHOD_t method); + +/********************************************************************* + * @purpose function to get max users + * + * @param hostMode @b{(input)) hostmode + * @param *appyPolicy @b{(input)) bool value + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrMaxUsersGet(uint32 intIfNum, uint32 *maxUsers); + +/********************************************************************* +* @purpose Set administrative mode setting for authmgr Vlan Assignment +* +* @param mode @b{(input)} radius vlan assignment mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrVlanAssignmentModeSet (uint32 mode); + +/********************************************************************* +* @purpose Get administrative mode setting for authmgr Vlan Assignment +* +* @param mode @b{(input)} radius vlan assignment mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrVlanAssignmentModeGet(uint32 *mode); + +/********************************************************************* +* @purpose Set the Guest Vlan Id for the port. +* +* @param intIfNum @b{(input)} internal interface number +* @param *guestVlanId @b{(output)} guest vlan Id +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrAdvancedGuestPortsCfgSet(uint32 intIfNum,uint32 guestVlanId); + +/********************************************************************* +* @purpose Set the Guest Vlan Id for the port. +* +* @param intIfNum @b{(input)} internal interface number +* @param *guestVlanId @b{(output)} guest vlan Id +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrAdvancedGuestPortCfgGet(uint32 intIfNum,uint32 *guestVlanId); + +/********************************************************************* +* @purpose Set the Guest Vlan Period for the port. +* +* @param intIfNum @b{(input)} internal interface number +* @param guestVlanPeriod @b{(output)} guest vlan Period +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrAdvancedGuestVlanPeriodSet(uint32 intIfNum,uint32 guestVlanPeriod); + + +/********************************************************************* +* @purpose Set max users value +* +* @param intIfNum @b{(input)} internal interface number +* @param maxUsers @b{(input)} max users +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The maxUsers is the maximum number of hosts that can be +* authenticated on a port using mac based authentication +* +* @end +*********************************************************************/ +RC_t authmgrPortMaxUsersSet(uint32 intIfNum, uint32 maxUsers); + +/********************************************************************* +* @purpose Get max users value +* +* @param intIfNum @b{(input)} internal interface number +* @param *maxUsers @b{(output)} max users per port +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The maxUsers is the maximum number of hosts that can be +* authenticated on a port using mac based authentication +* +* @end +*********************************************************************/ +RC_t authmgrPortMaxUsersGet(uint32 intIfNum, uint32 *maxUsers); +/********************************************************************* +* @purpose Returns the session timeout value for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param sessiontimeout @b((output)) session timeout for the logical interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortSessionTimeoutGet(uint32 lIntIfNum, + uint32 *session_timeout); + +/********************************************************************* +* @purpose To get the time left for the session termination action +* to occur for the logical interface +* +* @param lIntIfNum @b((input)) Logical interface number +* @param timeLeft @b((output)) Pointer to store the left out time +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortTimeLeftForTerminateActionGet(uint32 lIntIfNum, + uint32 *timeLeft); + +/********************************************************************* +* @purpose Returns the termination Action for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param terminationAction @b((output)) termination Action for the logical interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortTerminationActionGet(uint32 lIntIfNum, + uint32 *terminationAction); + +/********************************************************************* +* @purpose Check if the vlan is assigned to any client or port +* +* @param phyPort @b{(input)} physical port +* @param vlanId @b{(input)} vlanId +* +* @returns TRUE +* @returns FALSE +* +* @comments +* +* @end +*********************************************************************/ + BOOL authmgrVlanAssignedCheck (uint32 phyPort, uint32 vlanId); + + +/********************************************************************* +* @purpose Get reauthentication value for a port +* +* @param intIfNum @b{(input)} internal interface number +* @param *reauthenticate @b{(output)} reauthentication value +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments This value indicates whether a port is being reauthenticated +* due to a management request +* +* @end +*********************************************************************/ +extern RC_t authmgrPortReauthenticateGet(uint32 intIfNum, BOOL *reauthenticate); + +/********************************************************************* +* @purpose Set reauthentication value for a port +* +* @param intIfNum @b{(input)} internal interface number +* @param reauthenticate @b{(input)} reauthentication value +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments This value is set to TRUE by management in order to force +* reauthentication of a port. It is re-set to FALSE after +* reauthentication has completed. +* +* @end +*********************************************************************/ +extern RC_t authmgrPortReauthenticateSet(uint32 intIfNum, BOOL reauthenticate); + + +/********************************************************************* +* @purpose Get the Reauthentication period +* +* @param intIfNum @b{(input)} internal interface number +* @param *reAuthPeriod @b{(output)} reauthentication period +* @param serverConfig @b{(output)} get reauthentication period +* from server option +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The reAuthPeriod is the initialization value for reAuthWhen, +* which is a timer used by the Authenticator state machine to +* determine when reauthentication of the Supplicant takes place. +* +* @end +*********************************************************************/ +extern RC_t authmgrPortReAuthPeriodGet(uint32 intIfNum, + uint32 *reAuthPeriod, + BOOL *serverConfig); + +/********************************************************************* +* @purpose Set the Reauthentication period +* +* @param intIfNum @b{(input)} internal interface number +* @param reAuthPeriod @b{(input)} reauthentication period +* @param serverConfig @b{(input)} set option to get reauthentication +* period from server option +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The reAuthPeriod is the initialization value for reAuthWhen, +* which is a timer used by the Authenticator state machine to +* determine when reauthentication of the Supplicant takes place. +* +* @end +*********************************************************************/ +extern RC_t authmgrPortReAuthPeriodSet(uint32 intIfNum, + uint32 reAuthPeriod, + BOOL serverConfig); + +/********************************************************************* +* @purpose Get the Reauthentication mode +* +* @param intIfNum @b{(input)} internal interface number +* @param *reAuthEnabled @b{(output)} reauthentication mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The reAuthEnabled mode determines whether reauthentication +* of the Supplicant takes place. +* +* @end +*********************************************************************/ +extern RC_t authmgrPortReAuthEnabledGet(uint32 intIfNum, BOOL *reAuthEnabled); + +/********************************************************************* +* @purpose Set the Reauthentication mode +* +* @param intIfNum @b{(input)} internal interface number +* @param reAuthEnabled @b{(input)} reauthentication mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The reAuthEnabled mode determines whether reauthentication +* of the Supplicant takes place. +* +* @end +*********************************************************************/ +extern RC_t authmgrPortReAuthEnabledSet(uint32 intIfNum, BOOL reAuthEnabled); +/********************************************************************* +* @purpose Get port operational mode +* +* @param intIfNum @b{(input)} internal interface number +* @param *portMode @b{(output)} port operational mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +extern RC_t authmgrPortOperControlModeGet(uint32 intIfNum, AUTHMGR_PORT_CONTROL_t *portMode); + + +/********************************************************************* +* @purpose Set maximum number of times authentication +* may be reattempted by the user on the port. +* +* @param intIfNum @b{(input)} internal interface number +* @param maxReq @b{(input)} maximum request value +* +* @returns SUCCESS +* @returns FAILURE +* @returns NOT_SUPPORTED +* +* @end +*********************************************************************/ +RC_t authmgrPortMaxAuthAttemptsSet(uint32 intIfNum, uint32 maxAuthAttempts); + +/********************************************************************* +* @purpose Get maximum number of times authentication +* may be reattempted by the user on the port. +* +* @param intIfNum @b{(input)} internal interface number +* @param *maxReq @b{(output)} maximum request value +* +* @returns SUCCESS +* @returns FAILURE +* +* @end +*********************************************************************/ +RC_t authmgrPortMaxAuthAttemptsGet(uint32 intIfNum, uint32 *maxAuthAttempts); + +/********************************************************************* +* @purpose Returns the Supplicant Mac address for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param macAddr @b((output)) Mac Address of the supplicant +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortSupplicantMacAddrGet(uint32 lIntIfNum, + uchar8 *macAddr); +/********************************************************************* +* @purpose Get the port acquire status. +* +* @param intIfNum @b{(input)} internal interface number +* +* @returns TRUE if yes +* @returns FALSE otherwise +* +* @comments +* +* @end +*********************************************************************/ + BOOL authmgrPortIsAcquired(uint32 intIfNum); + +/********************************************************************* + * + * @purpose Register routines to be called by Auth Manager for various events. + * + * @param method @b((input)) authentication protocol + * @param *notify @b((input)) pointer to a routine to be invoked upon a respones. + * portCtrlFn: routine to set port control mode + * hostCtrlFn: routine to set port host mode + * eventNotifyFn: routine to handle Auth Mgr events + * enableGetFn: routine to get admin mode of the authentication protocol + * radiusEnableGetFn: routine to get whether RADIUS is configured as + * an authentication method + * + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + * + *********************************************************************/ +RC_t authmgrEventCallbackRegister( AUTHMGR_METHOD_t method, + RC_t(*portCtrlFn) (uint32 intIfNum, AUTHMGR_PORT_CONTROL_t portControl), + RC_t(*hostCtrlFn) (uint32 intIfNum, AUTHMGR_HOST_CONTROL_t hostMode), + RC_t(*eventNotifyFn) (uint32 intIfNum, uint32 event, enetMacAddr_t *macAddr), + RC_t(*enableGetFn) (uint32 intIfNum, uint32 *enabled), + RC_t(*radiusEnableGetFn) (uint32 intIfNum, uint32 *enabled)); + + +/********************************************************************* +* +* @purpose Deregister all routines to be called when a RADIUS response is +* received from a server for a previously submitted request. +* +* @param componentId @b{(input)} one of COMPONENT_IDS_t +* +* @returns SUCCESS +* +* @comments +* +* @end +* +*********************************************************************/ +RC_t authmgrEventCallbackDeregister( AUTHMGR_METHOD_t method); + +/********************************************************************* +* +* @purpose Set the port capabilities +* +* @param intIfNum @b{(input)} interface number +* @param paeCapabilities @b{(input)} capabiities (authenticator or supplicant) +* +* @returns SUCCESS +* +* @comments +* +* @end +* +*********************************************************************/ +RC_t authmgrDot1xCapabilitiesUpdate(uint32 intIfNum, uint32 paeCapabilities); +/********************************************************************* +* @purpose Returns the Vlan assigned for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param vlan @b((output)) vlan assigned to the logical interface +* @param mode @b((output)) mode of assignment Radius/Default +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortVlanAssignmentGet(uint32 lIntIfNum, + uint32 *vlanId, + uint32 *mode); + +/********************************************************************* +* @purpose Returns the authentication status of the client +* +* @param lIntIfNum @b((input)) the specified interface +* @param authStat @b((output)) auth status +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrClientVlanGet(uint32 lIntIfNum, + uint32 *vlanType, + uint32 *vlanId); + +/********************************************************************* +* @purpose Returns the authentication status of the client +* +* @param lIntIfNum @b((input)) the specified interface +* @param authStat @b((output)) auth status +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrClientAuthStatusGet(uint32 lIntIfNum, + uint32 *authStatus); + +/********************************************************************* +* @purpose Get global port control mode +* +* @param *portControl @b{(output)} port control mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrGlobalPortControlModeGet( AUTHMGR_PORT_CONTROL_t *portControl); + +/********************************************************************* +* @purpose Set port control mode +* +* @param portControl @b{(input)} port control mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrGlobalPortControlModeSet( AUTHMGR_PORT_CONTROL_t portControl); + +/********************************************************************* +* @purpose Set port control mode to default +* +* @param intIfNum @b{(input)} internal interface number +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrPortControlModeReset(uint32 intIfNum); + +/********************************************************************* +* @purpose Set global host control mode +* +* @param intIfNum @b{(input)} internal interface number +* @param host @b{(input)} port control mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrGlobalHostModeSet( AUTHMGR_HOST_CONTROL_t hostMode); + +/********************************************************************* +* @purpose Get global host control mode +* +* @param intIfNum @b{(input)} internal interface number +* @param host @b{(input)} port control mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrGlobalHostModeGet( AUTHMGR_HOST_CONTROL_t *hostMode); + +/********************************************************************* +* @purpose Set host control mode to default +* +* @param intIfNum @b{(input)} internal interface number +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrHostModeReset(uint32 intIfNum); + +/********************************************************************* +* @purpose Get number of authenticated clients on a port +* +* @param intIfNum @b{(input)} internal interface number +* @param *count @b{(output)} number of authenticated clients +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrPortAuthCountGet(uint32 intIfNum, uint32 *count); + +/********************************************************************* +* @purpose Get number of authenticated clients on a port +* +* @param intIfNum @b{(input)} internal interface number +* @param *count @b{(output)} number of authenticated clients +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrPortAuthCountGet(uint32 intIfNum, uint32 *count); +/********************************************************************* +* @purpose Processes Authmgr-related event initiated by PACmgr. +* +* @param (in) vlanData VLAN data +* @param (in) intIfNum Interface Number +* @param (in) event +* +* @returns SUCCESS or FAILURE +* +* @end +*********************************************************************/ +RC_t authmgrVlanChangeCallback (dot1qNotifyData_t * vlanData, + uint32 intIfNum, uint32 event); + +/********************************************************************* +* @purpose Processes Authmgr-related event initiated by PACmgr. +* +* @param (in) vlanData VLAN data +* @param (in) intIfNum Interface Number +* @param (in) event +* +* @returns SUCCESS or FAILURE +* +* @end +*********************************************************************/ +RC_t authmgrVlanConfChangeCallback (dot1qNotifyData_t * vlanData, + uint32 intIfNum, uint32 event); + +/********************************************************************* +* @purpose Reset port information +* +* @param intIfNum @b{(input)} internal interface number +* @param initialize @b{(input)} initialize value +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments This value is set to TRUE by management in order to force +* initialization of a port. It is re-set to FALSE after +* initialization has completed. +* +* @end +*********************************************************************/ +RC_t authmgrPortInfoReset(uint32 intIfNum, BOOL initialize); + +/********************************************************************* + * @purpose Cleans up a client session + * + * @param mac_addr @b{(input)}client's mac address + * + * @returns FALSE_ + * @returns TRUE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrClientDelete( enetMacAddr_t macAddr); + +/* USE C Declarations */ +#ifdef __cplusplus +} +#endif + +#endif diff --git a/src/sonic-pac/authmgr/common/auth_mgr_common.h b/src/sonic-pac/authmgr/common/auth_mgr_common.h new file mode 100755 index 000000000000..0d62fff6d1a1 --- /dev/null +++ b/src/sonic-pac/authmgr/common/auth_mgr_common.h @@ -0,0 +1,354 @@ +/* + * Copyright 2024 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#ifndef INCLUDE_AUTH_MGR_COMMON +#define INCLUDE_AUTH_MGR_COMMON + +/* USE C Declarations */ +#ifdef __cplusplus +extern "C" { +#endif + +#include "commdefs.h" +#include "datatypes.h" +#include "resources.h" +#include "component_mask.h" +#include "log.h" +#include "packet.h" +#include "cpustats_api.h" + +#define SYSAPI_PRINTF printf +#define __FP_FILE__ __FILE__ + +#define AUTHMGR_INTF_MAX_COUNT ( MAX_PORT_COUNT + 1) + +#define IP6_LEN 40 +#define IP4_STR_LEN 20 +#define IP6_ADDR_LEN 16 + +#define DOT1Q_NULL_VLAN_ID 0 +#define DOT1Q_MIN_VLAN_ID 1 +#define DOT1Q_MAX_VLAN_ID 4094 // - RESERVED VLANs if any +#define VLAN_MAX_MASK_BIT DOT1Q_MAX_VLAN_ID + +#define CLI_MAX_STRING_LENGTH 256 + +#define ETYPE_EAPOL 0x888E + +/* EAPOL Packet types */ +#define EAPOL_EAPPKT 0 /* 0000 0000B */ +#define EAPOL_START 1 /* 0000 0001B */ +#define EAPOL_LOGOFF 2 /* 0000 0010B */ +#define EAPOL_KEY 3 /* 0000 0011B */ +#define EAPOL_ENCASFALERT 4 /* 0000 0100B */ + +/* EAPOL packet header */ +typedef struct eapolPacket_s +{ + uchar8 protocolVersion; + uchar8 packetType; + ushort16 packetBodyLength; +} eapolPacket_t; + +/* Length defines for EAPOL-Key frame */ +#define EAPOL_KEY_REPLAY_COUNTER_LEN 8 +#define EAPOL_KEY_IV_LEN 16 +#define EAPOL_KEY_SIGNATURE_LEN 16 + +/* Bitmask defines for keyIndex field in EAPOL-Key frame */ +#define EAPOL_KEY_UNICAST 0x80 /* first bit */ +#define EAPOL_KEY_INDEX 0x7F /* last 7 bits */ + +/* EAPOL-Key packet format */ +typedef struct eapolKeyPacket_s +{ + uchar8 descriptorType; + ushort16 keyLength; + uchar8 replayCounter[EAPOL_KEY_REPLAY_COUNTER_LEN]; + uchar8 keyIV[EAPOL_KEY_IV_LEN]; + uchar8 keyIndex; + uchar8 keySignature[EAPOL_KEY_SIGNATURE_LEN]; +} eapolKeyPacket_t; + +/* EAP Packet code types */ +#define EAP_REQUEST 1 +#define EAP_RESPONSE 2 +#define EAP_SUCCESS 3 +#define EAP_FAILURE 4 + +/* EAP packet header */ +typedef struct authmgrEapPacket_s +{ + uchar8 code; + uchar8 id; + ushort16 length; +} authmgrEapPacket_t; + +/* Defines for 'type' field of EAP Request and Response frames */ +#define EAP_RRIDENTITY 1 /* Request/Identity or Response/Identity */ +#define EAP_RRNOTIF 2 /* Notification */ +#define EAP_RRNAK 3 /* NAK (Response only) */ +#define EAP_RRMD5 4 /* MD5-Challenge */ +#define EAP_RROTP 5 /* One-Time Password */ +#define EAP_RRGTK 6 /* Generic Token Card */ +#define EAP_TLS 13 /* EAP/TLS */ +#define EAP_TTLS 21 /* EAP/TTLS */ +#define EAP_PEAP 25 /* EAP/PEAP */ + +/* EAP Request/Response packet header */ +typedef struct eapRrPacket_s +{ + uchar8 type; +} eapRrPacket_t; + +/* Ethernet Encapsulation Overlay */ +typedef struct enet_encaps_s +{ + ushort16 type; /* ether type */ +} enet_encaps_t; + +#define ENET_ENCAPS_HDR_SIZE (uint32)sizeof( enet_encaps_t) + +/* Ethernet MAC Address */ + +#define ENET_HDR_SIZE (uint32)sizeof( enetHeader_t) +#define ETH_HDR_SIZE (uint32)sizeof( ethHeader_t) + +typedef enum +{ + AUTH_METHOD_UNDEFINED = 0, + AUTH_METHOD_LOCAL, + AUTH_METHOD_NONE, + AUTH_METHOD_RADIUS, + AUTH_METHOD_REJECT +} USER_MGR_AUTH_METHOD_t; + +#define MAX_AUTH_METHODS 4 + +#define MAX_FRAME_SIZE 3000 + +#define VLAN_INDICES ((4095) / (sizeof( uchar8) * 8) + 1) + +typedef enum dot1qTaggingMode_s +{ + DOT1Q_MEMBER_UNTAGGED = 0, + DOT1Q_MEMBER_TAGGED = 1 +} dot1qTaggingMode_t; + +typedef struct +{ + uchar8 value[ VLAN_INDICES]; +} VLAN_MASK_t; + +#define VLAN_STRING_SIZE (32 + 1) + +/* VLAN Notification Structure */ +typedef struct dot1qNotifyData_s +{ +// uint32 numVlans; /* If num Vlan is 1 use vlanId member of the union, else use vlanMask of the union*/ +// VLAN_MASK_t vlanTagModeMask; /* If set, VLAN member is tagged else untagged. */ + BOOL tagged; /* VLAN member is tagged else untagged. */ + union + { + uint32 vlanId; + char8 vlanString[ VLAN_STRING_SIZE]; +// VLAN_MASK_t vlanMask; + }data; +}dot1qNotifyData_t; + +typedef struct sysnet_pdu_info_s +{ + /* Originally, this structure contained only intIfNum and vlanId on the + * receive side. Unfortunately, the meaning of intIfNum depends on context. + * intIfNum is originally set to the ingress physical port. + * Once IP MAP processes an incoming packet, it resets intIfNum to + * the logical (e.g., VLAN routing interface) ingress interface. See ipMapPduRcv(). + * All the software forwarding code and sysnet interceptors depend on + * this behavior. DHCP relay needs to know the ingress physical port to + * set option 82 correctly. So we add a new member, rxPort, to this + * structure as a place to put this. If we were starting over, intIfNum + * would always have the same meaning and we'd add a field for the + * logical ingress interface, but I'm afraid we're stuck with + * a bunch of code that depends on the current behavior. NOTE: rxPort is + * only set in IP MAP. So if packet hasn't been handled by IP MAP, you can't + * use rxPort. */ + uint32 intIfNum; /* Receiving intIfNum */ + uint32 rxPort; /* Physical port where packet was received */ + uint32 vlanId; /* Receiving VLAN */ + uint32 innerVlanId; /* Receiving inner VLAN if the packet is double tagged.*/ + + uint32 destIntIfNum; /* Destination intIfNum */ + uint32 destVlanId; /* Destination VLAN */ + + uint32 vrfId; /* NOTE: Identifier of the VRF that this PDU is received on + * and this field makes sense only when 'intIfNum' is not set. + * If 'intIfNum' is set, this field can be derived from that + * receiving interface number and 'vrfId' would be redundant. */ +} sysnet_pdu_info_t; + +typedef enum +{ + SYSNET_PDU_RC_DISCARD = 0, /* Discard this frame */ + SYSNET_PDU_RC_CONSUMED, /* Frame has been consumed by interceptor */ + SYSNET_PDU_RC_COPIED, /* Frame has been copied by interceptor */ + SYSNET_PDU_RC_IGNORED, /* Frame ignored by interceptor */ + SYSNET_PDU_RC_PROCESSED, /* Frame has been processed by interceptor */ + SYSNET_PDU_RC_MODIFIED, /* Frame has been modified by interceptor */ + SYSNET_PDU_RC_LAST +} SYSNET_PDU_RC_t; + +/* TLV handle type */ +typedef uint32 tlvHandle_t; + +typedef struct +{ + uint32 type; /* TLV type identifier */ + uint32 length; /* TLV length of value field */ + uchar8 valueStart[1]; /* start of TLV value field */ +} tlv_t; + + +/* VLAN outcall notification events */ +typedef enum +{ + VLAN_ADD_NOTIFY = 0x00000001, /* Create a new VLAN */ + VLAN_DELETE_PENDING_NOTIFY = 0x00000002, /* Vlan is about to be deleted */ + VLAN_DELETE_NOTIFY = 0x00000004, /* Delete a VLAN */ + VLAN_ADD_PORT_NOTIFY = 0x00000008, /* Add a port to a VLAN */ + VLAN_DELETE_PORT_NOTIFY = 0x00000010, /* Delete a port from a VLAN */ + VLAN_START_TAGGING_PORT_NOTIFY = 0x00000020, /* Start tagging on a port */ + VLAN_STOP_TAGGING_PORT_NOTIFY = 0x00000040, /* Stop tagging on a port */ + VLAN_INITIALIZED_NOTIFY = 0x00000080, + VLAN_RESTORE_NOTIFY = 0x00000100, + VLAN_PVID_CHANGE_NOTIFY = 0x00000200, /* PVID change on a port*/ + VLAN_DOT1P_PRIORITY_CHANGE_NOTIFY = 0x00000400, /* dot1p priority change on port*/ + VLAN_DYNAMIC_TO_STATIC_NOTIFY = 0x00000800, /* Dynamic to static convert notification */ + VLAN_INGRESS_FILTER_PORT_NOTIFY = 0x00001000, /* Ingress filter notification on port */ + VLAN_SWITCHPORT_MODE_CHANGE_NOTIFY = 0x00002000, /* Switchport mode change on port notification */ + VLAN_AUTO_TRUNK_CHANGE_NOTIFY = 0x00004000, /* Change in auto-trunk configuration os a port */ + VLAN_LAST_NOTIFY = 0x00004000 /* Any time we add an event adjust this be the last in the series */ +} vlanNotifyEvent_t; + + +/* +** The Termination Action value codes +*/ +#define RADIUS_TERMINATION_ACTION_DEFAULT 0 +#define RADIUS_TERMINATION_ACTION_RADIUS 1 +#define RADIUS_ACCT_TERM_CAUSE_REAUTHENTICATION_FAILURE 20 + + +#define RADIUS_VENDOR_9_VOICE 1<<0 +#define RADIUS_VENDOR_9_DACL 1<<1 +#define RADIUS_VENDOR_9_SWITCH 1<<2 +#define RADIUS_VENDOR_9_REDIRECT_URL 1<<3 +#define RADIUS_VENDOR_9_REDIRECT_ACL 1<<4 +#define RADIUS_VENDOR_9_ACS_SEC_DACL 1<<5 +#define RADIUS_VENDOR_9_LINKSEC_POLICY 1<<6 + +#define RADIUS_VENDOR_311_MS_MPPE_SEND_KEY 1<<0 +#define RADIUS_VENDOR_311_MS_MPPE_RECV_KEY 1<<1 + +/* The type of attribute values for Tunnel Medium type attribute +*/ +#define RADIUS_TUNNEL_MEDIUM_TYPE_802 6 + +#define RADIUS_ATTR_TYPE_TUNNEL_TYPE_SPECIFIED 0x1 +#define RADIUS_ATTR_TYPE_TUNNEL_MEDIUM_TYPE_SPECIFIED 0x2 +#define RADIUS_ATTR_TYPE_TUNNEL_PRIVATE_GROUP_ID_SPECIFIED 0x4 +#define RADIUS_REQUIRED_TUNNEL_ATTRIBUTES_SPECIFIED 0x7 + +/* Downloadable ACL Fields */ +#define RADIUS_TLV_HEADER_LENGTH 2 +#define RADIUS_VALUE_LENGTH 253 + +#define RADIUS_ATTR_SIZE_SERVICE_TYPE 6 +/* +** The Service-Type value codes +*/ +#define RADIUS_SERVICE_TYPE_LOGIN 1 +#define RADIUS_SERVICE_TYPE_FRAMED 2 +#define RADIUS_SERVICE_TYPE_CALLBACK_LOGIN 3 +#define RADIUS_SERVICE_TYPE_CALLBACK_FRAMED 4 +#define RADIUS_SERVICE_TYPE_OUTBOUND 5 +#define RADIUS_SERVICE_TYPE_ADMIN 6 +#define RADIUS_SERVICE_TYPE_NAS_PROMPT 7 +#define RADIUS_SERVICE_TYPE_AUTHEN_ONLY 8 +#define RADIUS_SERVICE_TYPE_CALLBACK_NAS_PROMPT 9 +#define RADIUS_SERVICE_TYPE_CALL_CHECK 10 + + +typedef struct radiusValuePair_s +{ + struct radiusValuePair_s *nextPair; + uint32 attrId; + uint32 attrType; + uint32 vendorCode; + uint32 vsAttrId; + uint32 intValue; + char8 strValue[RADIUS_VALUE_LENGTH + 1]; + +} radiusValuePair_t; + +typedef enum +{ + ACCT_METHOD_UNDEFINED = 0, + ACCT_METHOD_TACACS, + ACCT_METHOD_RADIUS, + ACCT_METHOD_MAX +} USER_MGR_ACCT_METHOD_t; + +#define MAX_AML_NAME_LEN 15 /*Maximum length of the Accounting Method List Name*/ + +/* Port PAE capabilities bitmask values */ +#define DOT1X_PAE_PORT_NONE_CAPABLE 0x00 +#define DOT1X_PAE_PORT_AUTH_CAPABLE 0x01 +#define DOT1X_PAE_PORT_SUPP_CAPABLE 0x02 + +#define DOT1X_PAE_PORT_PROTOCOL_VERSION_2 2 +#define DOT1X_PAE_PORT_PROTOCOL_VERSION_3 3 + +#define RADIUS_ACCT_TERM_CAUSE_ADMIN_RESET 6 + +#define DS_ADMIN_MODE_NOTIFY 0x00000001 +#define DSV6_ADMIN_MODE_NOTIFY 0x00000002 + +typedef enum +{ + FDB_ADDR_FLAG_STATIC = 0, + FDB_ADDR_FLAG_LEARNED, + FDB_ADDR_FLAG_MANAGEMENT, + FDB_ADDR_FLAG_GMRP_LEARNED, + FDB_ADDR_FLAG_SELF, + FDB_ADDR_FLAG_AUTHMGR_STATIC, + FDB_ADDR_FLAG_DOT1X_STATIC, + FDB_ADDR_FLAG_DOT1AG_STATIC, + FDB_ADDR_FLAG_ETH_CFM_STATIC, + FDB_ADDR_FLAG_L3_MANAGEMENT, /* Routing Intf address */ + FDB_ADDR_FLAG_LEARNED_UNCONFIRMED, /* Address is learned, but not guaranteed + * to be in HW (relevant for SW learning). */ + FDB_ADDR_FLAG_FIP_SNOOP_LEARNED, /* MAC added by FIP snooping */ + FDB_ADDR_FLAG_CAPTIVE_PORTAL_STATIC, /* CP client MAC Addr */ + FDB_ADDR_FLAG_Y1731_STATIC, +} FDB_ADDR_FLAG_t; + +/* USE C Declarations */ +#ifdef __cplusplus +} +#endif + +#endif diff --git a/src/sonic-pac/authmgr/common/auth_mgr_exports.h b/src/sonic-pac/authmgr/common/auth_mgr_exports.h new file mode 100755 index 000000000000..311a19c64c89 --- /dev/null +++ b/src/sonic-pac/authmgr/common/auth_mgr_exports.h @@ -0,0 +1,412 @@ +/* + * Copyright 2024 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#ifndef __AUTHMGR_EXPORTS_H_ +#define __AUTHMGR_EXPORTS_H_ + +/* USE C Declarations */ +#ifdef __cplusplus +extern "C" { +#endif + +#include "auth_mgr_common.h" +#include "pacinfra_common.h" +#include "defaultconfig.h" + +/* AUTHMGR Component Feature List */ +typedef enum +{ + AUTHMGR_FEATURE_ID = 0, /* general support statement */ + AUTHMGR_VLANASSIGN_FEATURE_ID, /* RFC 3580 VLAN Assignments via dot1x */ + AUTHMGR_DYNAMIC_VLANASSIGN_FEATURE_ID, + AUTHMGR_MAB_FEATURE_ID, + AUTHMGR_DACL_FEATURE_ID, + AUTHMGR_FEATURE_ID_TOTAL, /* total number of enum values */ +} AUTHMGR_FEATURE_IDS_t; + + + +#define AUTHMGR_USER_NAME_LEN 65 +#define AUTHMGR_CHALLENGE_LEN 32 + +#define AUTHMGR_MAC_ADDR_STR_LEN (( MAC_ADDR_LEN * 2) + ( MAC_ADDR_LEN - 1)) +#define AUTHMGR_SESSION_ID_LEN AUTHMGR_USER_NAME_LEN * 2 + + +/******************************************************************/ +/************* Start AUTHMGR types and defines *********/ +/******************************************************************/ + +#define AUTHMGR_USER_INDEX_INVALID -1 + +#define AUTHMGR_SERVER_STATE_LEN 253 +#define AUTHMGR_SERVER_CLASS_LEN 253 + + +#define AUTHMGR_RADIUS_VLAN_ASSIGNED_LEN 32 /* Radius Assigned vlan length */ + +typedef enum +{ + AUTHMGR_TYPE_ORDER = 1, + AUTHMGR_TYPE_PRIORITY, +} AUTHMGR_METHOD_TYPE_t; + +typedef enum +{ + AUTHMGR_METHOD_NONE = 0, + AUTHMGR_METHOD_8021X, + AUTHMGR_METHOD_MAB, + AUTHMGR_METHOD_LAST +} AUTHMGR_METHOD_t; + +typedef enum +{ + AUTHMGR_NEW_CLIENT = 1, /* fdb entry is received */ + AUTHMGR_AUTH_FAIL, + AUTHMGR_AUTH_SUCCESS, + AUTHMGR_AUTH_TIMEOUT, + AUTHMGR_AUTH_SERVER_COMM_FAILURE, + AUTHMGR_CLIENT_DISCONNECTED, + AUTHMGR_METHOD_CHANGE, +} AUTHMGR_STATUS_t; + +typedef enum +{ + AUTHMGR_INITIALIZE = 0, + AUTHMGR_AUTHENTICATING, + AUTHMGR_AUTHENTICATED, + AUTHMGR_HELD, + AUTHMGR_UNAUTHENTICATED, + AUTHMGR_STATES +} AUTHMGR_STATES_t; + +typedef enum +{ + AUTHMGR_ATTR_NA = 0, + AUTHMGR_ATTR_RADIUS +} AUTHMGR_ATTR_PROCESS_t; + +/* Port authorization status */ +typedef enum +{ + AUTHMGR_PORT_STATUS_NA = 0, + AUTHMGR_PORT_STATUS_AUTHORIZED, + AUTHMGR_PORT_STATUS_UNAUTHORIZED +} AUTHMGR_PORT_STATUS_t; + +typedef enum +{ + AUTHMGR_METHOD_8021X_ATTEMPTS = 1, + AUTHMGR_METHOD_8021X_FAILED_ATTEMPTS, + AUTHMGR_METHOD_MAB_ATTEMPTS, + AUTHMGR_METHOD_MAB_FAILED_ATTEMPTS, +} AUTHMGR_STATS_TYPE_t; + + +/* Port authorization mode */ +typedef enum +{ + AUTHMGR_PORT_CONTROL_INVALID = 0, + AUTHMGR_PORT_FORCE_UNAUTHORIZED = 1, + AUTHMGR_PORT_FORCE_AUTHORIZED, + AUTHMGR_PORT_AUTO, + AUTHMGR_PORT_NA +} AUTHMGR_PORT_CONTROL_t; + + +/* Port host mode */ +typedef enum +{ + AUTHMGR_INVALID_HOST_MODE = 0, + AUTHMGR_SINGLE_AUTH_MODE, + AUTHMGR_MULTI_HOST_MODE, + AUTHMGR_MULTI_AUTH_MODE +} AUTHMGR_HOST_CONTROL_t; + + +/* L2 learning */ +typedef enum +{ + AUTHMGR_PORT_LEARNING_NA = 0, + AUTHMGR_PORT_LEARNING_DISABLE, + AUTHMGR_PORT_LEARNING_ENABLE, + AUTHMGR_PORT_LEARNING_CPU +} AUTHMGR_PORT_LEARNING_t; + +/* violation callback */ +typedef enum +{ + AUTHMGR_PORT_VIOLATION_CALLBACK_NA = 0, + AUTHMGR_PORT_VIOLATION_CALLBACK_DISABLE, + AUTHMGR_PORT_VIOLATION_CALLBACK_ENABLE +} AUTHMGR_PORT_VIOLATION_CALLBACK_t; + +typedef enum authmgrClientType_s +{ + AUTHMGR_CLIENT_UNASSIGNED = 0, + AUTHMGR_CLIENT_AWARE, + AUTHMGR_CLIENT_UNAWARE, + AUTHMGR_CLIENT_MAB +}authmgrClientType_t; + + +typedef enum authmgrVlanType_s +{ + AUTHMGR_VLAN_UNASSIGNED = 0, + AUTHMGR_VLAN_RADIUS, + AUTHMGR_VLAN_UNAUTH, + AUTHMGR_VLAN_GUEST, + AUTHMGR_VLAN_DEFAULT, + AUTHMGR_VLAN_BLOCKED +}authmgrVlanType_t; + +/* Vlan Assignment Mode */ +typedef enum +{ + AUTHMGR_NOT_ASSIGNED = 0, + AUTHMGR_DEFAULT_ASSIGNED_VLAN, + AUTHMGR_RADIUS_ASSIGNED_VLAN, + AUTHMGR_UNAUTHENTICATED_VLAN, + AUTHMGR_GUEST_VLAN, +} AUTHMGR_VLAN_ASSIGNED_MODE_t; + + +/* Authentication violation types */ +typedef enum +{ + AUTHMGR_PORT_AUTH_VIOLATION_INVALID = 0, + AUTHMGR_PORT_AUTH_VIOLATION_PROTECT, + AUTHMGR_PORT_AUTH_VIOLATION_RESTRICT, + AUTHMGR_PORT_AUTH_VIOLATION_SHUTDOWN, + AUTHMGR_PORT_AUTH_VIOLATION_MODE_LAST +} AUTHMGR_PORT_AUTH_VIOLATION_MODE_t; + + +/* Radius Termination Action (needed by UI)*/ +typedef enum +{ + AUTHMGR_TERMINATION_ACTION_DEFAULT = 1, + AUTHMGR_TERMINATION_ACTION_RADIUS +} AUTHMGR_TERMINATION_ACTION_t; + + +/* Authentication types used for Mac-Authentication Bypass */ +typedef enum +{ + AUTHMGR_PORT_MAB_AUTH_TYPE_INVALID = 0, + AUTHMGR_PORT_MAB_AUTH_TYPE_EAP_MD5, + AUTHMGR_PORT_MAB_AUTH_TYPE_PAP, + AUTHMGR_PORT_MAB_AUTH_TYPE_CHAP, + AUTHMGR_PORT_MAB_AUTH_TYPE_LAST +} AUTHMGR_PORT_MAB_AUTH_TYPE_t; + + +typedef enum authmgrFailureReason_s +{ + AUTHMGR_FAIL_REASON_INVALID = 0, + AUTHMGR_FAIL_REASON_AUTH_FAILED = 1, + AUTHMGR_FAIL_REASON_WRONG_AUTH = 2, + AUTHMGR_FAIL_REASON_INVALID_USER = 3 + +}authmgrFailureReason_t; + +typedef enum authmgrRadiusAttrFlags_s +{ + AUTHMGR_RADIUS_ATTR_TYPE_STATE = (1 << 0), + AUTHMGR_RADIUS_ATTR_TYPE_SERVICE_TYPE = (1 << 1), + AUTHMGR_RADIUS_ATTR_TYPE_CLASS = (1 << 2), + AUTHMGR_RADIUS_ATTR_TYPE_SESSION_TIMEOUT = (1 << 3), + AUTHMGR_RADIUS_ATTR_TYPE_TERMINATION_ACTION = (1 << 4), + AUTHMGR_RADIUS_ATTR_TYPE_EAP_MESSAGE = (1 << 5), + AUTHMGR_RADIUS_ATTR_TYPE_TUNNEL_TYPE = (1 << 6), + AUTHMGR_RADIUS_ATTR_TYPE_TUNNEL_MEDIUM_TYPE = (1 << 7), + AUTHMGR_RADIUS_ATTR_TYPE_TUNNEL_PRIVATE_GROUP_ID = (1 << 8), + AUTHMGR_RADIUS_ATTR_USER_NAME = (1 << 9) +}authmgrRadiusAttrFlags_t; + + +typedef enum authmgrClientEventCode_s +{ + AUTHMGR_8021X_FIRST = (1 << 0), + AUTHMGR_8021X_HIGHER_PRIO = (1 << 1) +}authmgrClientEventCode_t; + + + +typedef struct authmgrPortSessionStats_s +{ + /* Authenticator Stats (9.4.4) */ + uint32 sessionOctetsRx; + uint32 sessionOctetsTx; + uint32 sessionOctetsGbRx; + uint32 sessionOctetsGbTx; + uint32 sessionPacketsRx; + uint32 sessionPacketsGbRx; + uint32 sessionPacketsTx; + uint32 sessionPacketsGbTx; + uint32 sessionTime; + uchar8 userName[AUTHMGR_USER_NAME_LEN]; + char8 sessionId[AUTHMGR_SESSION_ID_LEN]; +} authmgrPortSessionStats_t; + +typedef enum +{ + AUTHMGR_LOGICAL_PORT = 0, + AUTHMGR_PHYSICAL_PORT +}authmgrPortType_t; + +typedef enum authmgrNodeType_s +{ + AUTHMGR_NODE_UNASSIGNED = 0, + AUTHMGR_PHYSICAL, + AUTHMGR_LOGICAL +}authmgrNodeType_t; + + +typedef enum authmgrFilterAssignedType_s +{ + AUTHMGR_FILTER_ASSIGNED_NONE = 0, + AUTHMGR_FILTER_ASSIGNED_RADIUS = 1, + AUTHMGR_FILTER_ASSIGNED_FAILED = 2 +}authmgrFilterAssignedType_t; + + + +typedef struct authmgrAuthAttributeInfo_s +{ + uchar8 userName[AUTHMGR_USER_NAME_LEN]; + uint32 userNameLen; + + uchar8 serverState[AUTHMGR_SERVER_STATE_LEN]; + uint32 serverStateLen; + + uchar8 serverClass[AUTHMGR_SERVER_CLASS_LEN]; + uint32 serverClassLen; + + uint32 sessionTimeout; + uint32 terminationAction; + + uint32 accessLevel; + uchar8 idFromServer; /* Most recent ID in EAP pkt received from Auth Server (0-255) */ + uchar8 vlanString[AUTHMGR_RADIUS_VLAN_ASSIGNED_LEN+1]; + uint32 vlanId; /* parsed VLAN id from vlan string */ + uint32 attrFlags; + uint32 vlanAttrFlags; + BOOL rcvdEapAttr; +}authmgrAuthAttributeInfo_t; + + +typedef struct authmgrClientAuthInfo_s +{ + enetMacAddr_t macAddr; + uint32 eapolVersion; + uint32 authMethod; + authmgrAuthAttributeInfo_t attrInfo; + uint32 sessionId; + char8 authmgrUserName[AUTHMGR_USER_NAME_LEN]; + uint32 authmgrUserNameLength; +}authmgrClientAuthInfo_t; + +typedef struct authmgrClientStatusInfo_s +{ + union + { + authmgrClientAuthInfo_t authInfo; + uint32 enableStatus; + }info; +}authmgrClientStatusInfo_t; + +typedef struct authmgrClientStatusReply_s +{ + char intf[16]; + char addr[6]; + unsigned int method; + unsigned int status; + union + { + unsigned int vlanId; + unsigned int enableStatus; + }info; +}authmgrClientStatusReply_t; + +typedef enum authmgrNotifyEvent_s +{ + authmgrClientReAuthenticate = 1, + authmgrClientAuthStart, +// authmgrClientReqIdTx, + authmgrClientDisconnect +}authmgrNotifyEvent_t; + + +#define AUTHMGR_MULTI_HOST_MODE_MAX_USERS 1 +#define AUTHMGR_SINGLE_AUTH_MODE_MAX_USERS 1 + + +#define AUTHMGR_RADIUS_MAX_AUTH_ATTEMPTS 1 +#define AUTHMGR_RADIUS_MAX_AUTH_ATTEMPTS_RANGE_MIN 1 +#define AUTHMGR_RADIUS_MAX_AUTH_ATTEMPTS_RANGE_MAX 5 + +#define AUTHMGR_AUTHENTICATION_MAX_EVENTS 1024 + +#define AUTHMGR_AUTHENTICATION_MAX_INTF_EVENTS 20 + + +#define AUTHMGR_RESTART_TIMER_MIN 10 +#define AUTHMGR_RESTART_TIMER_MAX 65535 + +#define AUTHMGR_PORT_MIN_MAC_USERS 1 +#define AUTHMGR_PORT_MAX_MAC_USERS FD_AUTHMGR_PORT_MAX_USERS + + +#define AUTHMGR_PORT_MIN_QUIET_PERIOD 0 +#define AUTHMGR_PORT_MAX_QUIET_PERIOD 65535 + +#define AUTHMGR_PORT_MIN_TX_PERIOD 1 +#define AUTHMGR_PORT_MAX_TX_PERIOD 65535 + +#define AUTHMGR_PORT_MIN_SUPP_TIMEOUT 1 +#define AUTHMGR_PORT_MAX_SUPP_TIMEOUT 65535 + +#define AUTHMGR_PORT_MIN_SERVER_TIMEOUT 1 +#define AUTHMGR_PORT_MAX_SERVER_TIMEOUT 65535 + +#define AUTHMGR_PORT_MIN_MAX_REQ 1 +#define AUTHMGR_PORT_MAX_MAX_REQ 20 + +#define AUTHMGR_PORT_MIN_MAX_REQ_IDENTITY 1 +#define AUTHMGR_PORT_MAX_MAX_REQ_IDENTITY 20 + +#define AUTHMGR_PORT_MIN_REAUTH_PERIOD 1 +#define AUTHMGR_PORT_MAX_REAUTH_PERIOD 65535 + +#define AUTHMGR_MAX_USERS_PER_PORT FD_AUTHMGR_PORT_MAX_USERS + +/* Get the re-authentication timeout value from the server */ +#define AUTHMGR_PORT_REAUTH_PERIOD_FROM_SERVER TRUE + +/******************** conditional Override *****************************/ + +#ifdef INCLUDE_AUTH_MGR_EXPORTS_OVERRIDES +#include "auth_mgr_exports_overrides.h" +#endif + +/* USE C Declarations */ +#ifdef __cplusplus +} +#endif + +#endif /* __AUTHMGR_EXPORTS_H_*/ diff --git a/src/sonic-pac/authmgr/common/comm_mask.h b/src/sonic-pac/authmgr/common/comm_mask.h new file mode 100755 index 000000000000..b09fa49fcc0e --- /dev/null +++ b/src/sonic-pac/authmgr/common/comm_mask.h @@ -0,0 +1,704 @@ +/* + * Copyright 2024 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#ifndef INCLUDE_COMM_MASK +#define INCLUDE_COMM_MASK + +/* USE C Declarations */ +#ifdef __cplusplus +extern "C" { +#endif + +//#include "default_cnfgr.h" // shiva check with amit +#include "auth_mgr_common.h" +#include "pacinfra_common.h" + + +/*--------------------------------------*/ +/* Common Mask Macros & Defines */ +/* Generic Mask Macros & Defines */ +/*--------------------------------------*/ + +/* + * Note that these macros are for one-based masks, not zero-based. + */ + +typedef uchar8 mask_values_t; + +/* Number of entries per mask unit */ +#define MASK_UNIT (sizeof( mask_values_t) * 8) + +/* + * + * Number of elements of mask_values_t in mask. + * + * Declare a mask using this macro where _size is the number of bits to be + * used, starting with bit 1. + * + * E.g., for a mask for interfaces: + * + * mask_values_t myMask[ MASK_LEN( MAX_INTERFACE_COUNT)]; + * + */ +#define MASK_LEN(_size) ((((_size) - 1) / MASK_UNIT) + 1) + +#define MASK_BYTE_NUM(j) (sizeof((j)) / sizeof((j)[0])) + +/* + * NONZEROMASK returns 1 if any bit in word mask of NUM length + * is turned-on. The result, 1 or 0 is stored in result. + */ +#define NONZEROMASK(_mask, _result, _size) \ + do \ + { \ + uint32 _i_; \ + mask_values_t *_p_ = ( mask_values_t *)&(_mask); \ + \ + (_result) = 0; \ + for (_i_ = 0; _i_ < MASK_LEN(_size); _i_++) \ + { \ + if (_p_[_i_] != 0) \ + { \ + (_result) = 1; \ + break; \ + } \ + } \ + } while (0) + + +/* SETMASKBIT turns on bit index # k in mask j. Note: k is one-based. */ +#define SETMASKBIT(j, k) \ + ((j)[((k) - 1) / MASK_UNIT] |= 1 << (((k) - 1) % MASK_UNIT)) + +/* CLRMASKBIT turns off bit index # k in mask j. Note: k is one-based. */ +#define CLRMASKBIT(j, k) \ + ((j)[((k) - 1) / MASK_UNIT] &= ~(1 << (((k)-1) % MASK_UNIT))) + +/* SETMASKBITVAL sets bit index # k in mask j to value. Any non-zero value is + * converted to 1. Note: k is one-based. + */ +#define SETMASKBITVAL(j, k, v) \ + ((j)[((k) - 1) / MASK_UNIT] = \ + (((j)[((k) - 1) / MASK_UNIT] & ~(1 << (((k)-1) % MASK_UNIT))) | \ + (!!(v) << (((k) - 1) % MASK_UNIT)))) + + + +/* MASKEQ sets mask j equal to mask k. */ +#define MASKEQ(j, k, _size) \ + do \ + { \ + uint32 x; \ + \ + for (x = 0; x < MASK_LEN(_size); x++) \ + { \ + (j)[x] = (k)[x]; \ + } \ + } while (0) + +/* MASKOREQ or's on the bits in mask j that are on in either mask j or k. */ +#define MASKOREQ(j, k, _size) \ + do \ + { \ + uint32 x; \ + \ + for (x = 0; x < MASK_LEN(_size); x++) \ + { \ + (j)[x] |= (k)[x]; \ + } \ + } while (0) + +/* MASKOR or's two masks on per byte basis */ +#define MASKOR(j, k) \ + do \ + { \ + uint32 x; \ + \ + for (x = 0; x < MASK_BYTE_NUM(j); x++) \ + { \ + (j)[x] |= (k)[x]; \ + } \ + } while (0) + + +/* MASKEXOREQ turns-on the bits in mask j that are on in either mask j and k but not in both. */ +#define MASKEXOREQ(j, k, _size) \ + do \ + { \ + uint32 x; \ + \ + for (x = 0; x < MASK_LEN(_size); x++) \ + { \ + (j)[x] ^= (k)[x]; \ + } \ + } while (0) + +/* MASKANDEQ turns-on the bits in mask j that are on in both mask j and k. */ +#define MASKANDEQ(j, k, _size) \ + do \ + { \ + uint32 x; \ + \ + for (x = 0; x < MASK_LEN(_size); x++) \ + { \ + (j)[x] &= (k)[x]; \ + } \ + } while (0) + +/* MASKAND turns-on the bits in mask j that are on in both mask j and k. */ +#define MASKAND(j, k) \ + do \ + { \ + uint32 x; \ + \ + for (x = 0; x < MASK_BYTE_NUM(j); x++) \ + { \ + (j)[x] &= (k)[x]; \ + } \ + } while (0) + +/* MASKINV inverts the bits in mask j. */ +#define MASKINV(j, _size) \ + do \ + { \ + uint32 x; \ + \ + for (x = 0; x < MASK_LEN(_size); x++) \ + { \ + (j)[x] = ~((j)[x]); \ + } \ + } while (0) + +/* MASKANDEQINV turns on the bits in mask j that are on in both mask j + and the bitwise-inverse of mask k. */ +#define MASKANDEQINV(j, k, _size) \ + do \ + { \ + uint32 x; \ + \ + for (x = 0; x < MASK_LEN(_size); x++) \ + { \ + (j)[x] &= ~((k)[x]); \ + } \ + } while (0) + +/* MASKBITSCLR clears bits in mask j that are on in mask k */ +#define MASKBITSCLR(j, k) \ + do \ + { \ + uint32 x; \ + \ + for (x = 0; x < MASK_BYTE_NUM((j)); x++) \ + { \ + (j)[x] &= ~((k)[x]); \ + } \ + } while (0) + +/* FHMASKBIT finds the index of the most-significant bit turned-on in + mask j and returns that index in k. Since this is a 1-based + mask, 0 is returned for "no bits set". */ +#define FHMASKBIT(j, k, _size) \ + do \ + { \ + int32 x; \ + \ + for (x = ( MASK_LEN(_size) - 1); x >= 0; x--) \ + { \ + if ( (j)[x] ) \ + { \ + break; \ + } \ + } \ + \ + k = 0; \ + if (x >= 0) \ + { \ + int32 i; \ + for (i = MASK_UNIT - 1; i >= 0; i--) \ + { \ + if ( (j)[x] & (1 << i)) \ + { \ + k = i + 1 + (x * MASK_UNIT); \ + break; \ + } \ + } \ + } \ + } while (0) + +/* ISMASKBITSET returns 0 if the interface k is not set in mask j */ +#define ISMASKBITSET(j, k) \ + ((j)[(((k) - 1) / MASK_UNIT)] & ( 1 << ((k-1) % MASK_UNIT))) + +/* MASKREV reverses the bits in within each byte of mask j. */ +#define MASKREV(j, _size) \ + do \ + { \ + uint32 x,y; \ + uchar8 b=0; \ + \ + for (x = 0; x < MASK_LEN(_size); x++) \ + { \ + b = 0; \ + for (y=0; y<8; y++) \ + { \ + if ((j).value[x] & (0x80 >> y)) \ + { \ + b |= 0x1 << y; \ + } \ + } \ + (j).value[x] = b; \ + } \ + } while (0) + +/* FLCLEARMASKBIT finds the index of the least-significant bit turned-off in + * mask _mask and returns that index in _result. Since this is a 1-based + * mask, 0 is returned for "no bits set". */ +#define FLCLEARMASKBIT(_mask, _result, _size) \ + do \ + { \ + int32 x; \ + mask_values_t *_p_ = ( mask_values_t *)&(_mask); \ + \ + for (x = 0; x < MASK_LEN(_size); x++) \ + { \ + if ( (_p_)[x] != 0xFF) \ + { \ + break; \ + } \ + } \ + \ + if(x < MASK_LEN(_size)) \ + { \ + int32 i; \ + for (i = 0; i < MASK_UNIT; i++) \ + { \ + if ( ((_p_)[x] & (1 << i)) == 0) \ + { \ + _result = i + 1 + (x * MASK_UNIT); \ + break; \ + } \ + } \ + } \ + else \ + { \ + _result = 0; \ + } \ + } while (0) + +/* FSCMASKBIT finds the number of bits turned-on in mask _mask and + * returns that count in _result. */ +#define FSCMASKBIT(_mask, _result, _size) \ + do \ + { \ + int32 x; \ + int32 i; \ + mask_values_t *_p_ = ( mask_values_t *)&(_mask); \ + \ + _result = 0; \ + for (x = 0; x < MASK_LEN(_size); x++) \ + { \ + if ( (_p_)[x] != 0) \ + { \ + for (i = 0; i < MASK_UNIT; i++) \ + { \ + if ( ((_p_)[x] & (1 << i)) != 0) \ + { \ + _result++; \ + } \ + } \ + } \ + } \ + \ + } while (0) + + +/*--------------------------------------*/ +/* Interface Mask Macros & Defines */ +/*--------------------------------------*/ + +/* Number of entries per mask byte */ +#define INTF_MASK_UNIT (sizeof( uchar8) * 8) + +/* Number of bytes in mask */ +#define INTF_INDICES (( MAX_INTERFACE_COUNT - 1) / INTF_MASK_UNIT + 1) + +/* Interface storage */ +typedef struct +{ + uchar8 value[ INTF_INDICES]; +} INTF_MASK_t; + + +/* + * NONZEROMASK returns 1 if any bit in word mask of NUM length + * is turned-on. The result, 1 or 0 is stored in result. + */ +#define INTF_NONZEROMASK(mask, result){ \ + uint32 _i_; \ + INTF_MASK_t *_p_; \ + \ + _p_ = ( INTF_MASK_t *)&mask; \ + for(_i_ = 0; _i_ < INTF_INDICES; _i_++) \ + if(_p_->value[_i_] != 0){ \ + result = 1; \ + break; \ + } \ + else \ + result = 0; \ +} + + +/* Least significant bit/rightmost bit is lowest interface # */ +/* this is opposite of what SNMP wants */ + +/* SETMASKBIT turns on bit index # k in mask j. */ +#define INTF_SETMASKBIT(j, k) \ + ((j).value[((k-1)/(8*sizeof( uchar8)))] \ + |= 1 << ((k-1) % (8*sizeof( uchar8)))) + + +/* CLRMASKBIT turns off bit index # k in mask j. */ +#define INTF_CLRMASKBIT(j, k) \ + ((j).value[((k-1)/(8*sizeof( uchar8)))] \ + &= ~(1 << ((k-1) % (8*sizeof( uchar8))))) + + +/* MASKEQ sets mask j equal to mask k. */ +#define INTF_MASKEQ(j, k) { \ + uint32 x; \ + \ + for (x = 0; x < INTF_INDICES; x++) { \ + (j).value[x] = (k).value[x]; \ + } \ +} + + +/* MASKOREQ or's on the bits in mask j that are on in either mask j or k. */ +#define INTF_MASKOREQ(j, k) { \ + uint32 x; \ + \ + for (x = 0; x < INTF_INDICES; x++) { \ + (j).value[x] |= (k).value[x]; \ + } \ +} + + +/* MASKEXOREQ turns-on the bits in mask j that are on in either mask j and k but not in both. */ +#define INTF_MASKEXOREQ(j, k) { \ + uint32 x; \ + \ + for (x = 0; x < INTF_INDICES; x++) { \ + j.value[x] ^= k.value[x]; \ + } \ +} + + +/* MASKANDEQ turns-on the bits in mask j that are on in both mask j and k. */ +#define INTF_MASKANDEQ(j, k) { \ + uint32 x; \ + \ + for (x = 0; x < INTF_INDICES; x++) { \ + (j).value[x] &= (k).value[x]; \ + } \ +} + + +/* MASKINV inverts the bits in mask j. */ +#define INTF_MASKINV(j) { \ + uint32 x; \ + \ + for (x = 0; x < INTF_INDICES; x++) { \ + j.value[x] = ~(j.value[x]); \ + } \ +} + + +/* MASKANDEQINV turns on the bits in mask j that are on in both mask j + and the bitwise-inverse of mask k. */ +#define INTF_MASKANDEQINV(j, k) { \ + uint32 x; \ + \ + for (x = 0; x < INTF_INDICES; x++) { \ + (j).value[x] &= ~((k).value[x]); \ + } \ +} + + +/* FHMASKBIT finds the index of the most-significant bit turned-on in + mask j and returns that index in k. Since this is a 1-based + mask, 0 is returned for "no bits set". */ +#define INTF_FHMASKBIT(j, k) { \ + int32 x; \ + \ + for (x = ( INTF_INDICES - 1); x >= 0; x--) { \ + if ( j.value[x] ) \ + break; \ + }; \ + k = 0; \ + if (x >= 0) { \ +/* This is for i960 + asm volatile ("scanbit %1,%0" : "=d"(k) : "d"(j.value[x])); */ \ +/* This is not */ \ + int32 i; \ + for (i = 7; i >= 0; i--) { \ + if ( j.value[x] & (1 << i)) { \ + k = i + 1 + (x * (8 * sizeof( uchar8))); \ + break; \ + } \ + } \ +/* End non-i960 */ \ + }; \ +} + +/* FLMASKBIT finds the index of the least-significant bit turned-on in + mask j and returns that index in k. Since this is a 1-based + mask, 0 is returned for "no bits set". */ +#define INTF_FLMASKBIT(j, k) { \ + int32 x; \ + \ + for (x = 0; x <= ( INTF_INDICES - 1); x++) { \ + if ( j.value[x] ) \ + break; \ + }; \ + k = 0; \ + if (x < INTF_INDICES) { \ +/* This is for i960 + asm volatile ("scanbit %1,%0" : "=d"(k) : "d"(j.value[x])); */ \ +/* This is not */ \ + int32 i; \ + for (i = 0; i <= 7; i++) { \ + if ( j.value[x] & (1 << i)) { \ + k = i + 1 + (x * (8 * sizeof( uchar8))); \ + break; \ + } \ + } \ +/* End non-i960 */ \ + }; \ +} + + +/* ISMASKBITSET returns 0 if the interface k is not set in mask j */ +#define INTF_ISMASKBITSET(j, k) \ + ((j).value[((k-1)/(8*sizeof( uchar8)))] \ + & ( 1 << ((k-1) % (8*sizeof( char8)))) ) + + +/* MASKREV reverses the bits in within each byte of mask j. */ +#define INTF_MASKREV(j) { \ + uint32 x,y; \ + uchar8 b=0; \ + \ + for (x = 0; x < INTF_INDICES; x++) { \ + b = 0; \ + for (y=0; y<8; y++) \ + { \ + if ((j).value[x] & (0x80 >> y)) \ + b |= 0x1 << y; \ + } \ + (j).value[x] = b; \ + } \ +} + + + +/* Macro definitions for VLAN MASK operations */ +/* + * NONZEROMASK returns 1 if any bit in word mask of NUM length + * is turned-on. The result, 1 or 0 is stored in result. + */ +#define VLAN_NONZEROMASK(mask, result){ \ + uint32 _i_; \ + VLAN_MASK_t *_p_; \ + \ + _p_ = ( VLAN_MASK_t *)&mask; \ + for(_i_ = 0; _i_ < VLAN_INDICES; _i_++) \ + if(_p_->value[_i_] != 0){ \ + result = 1; \ + break; \ + } \ + else \ + result = 0; \ +} + +#define VLAN_NONZEROMASK_POINTER(mask, result){ \ + uint32 _i_; \ + VLAN_MASK_t *_p_; \ + \ + _p_ = mask; \ + for(_i_ = 0; _i_ < VLAN_INDICES; _i_++) \ + if(_p_->value[_i_] != 0){ \ + result = 1; \ + break; \ + } \ + else \ + result = 0; \ + } + +/* Least significant bit/rightmost bit is lowest interface # */ +/* this is opposite of what SNMP wants */ + +/* SETMASKBIT turns on bit index # k in mask j. */ +#define VLAN_SETMASKBIT(j, k) \ + ((j).value[((k-1)/(8*sizeof( uchar8)))] \ + |= 1 << ((k-1) % (8*sizeof( uchar8)))) + + +/* CLRMASKBIT turns off bit index # k in mask j. */ +#define VLAN_CLRMASKBIT(j, k) \ + ((j).value[((k-1)/(8*sizeof( uchar8)))] \ + &= ~(1 << ((k-1) % (8*sizeof( uchar8))))) +#define VLAN_CLRMASKBIT_POINTER(j, k) \ + ((j)->value[((k-1)/(8*sizeof( uchar8)))] \ + &= ~(1 << ((k-1) % (8*sizeof( uchar8))))) + +/* MASKEQ sets mask j equal to mask k. */ +#define VLAN_MASKEQ(j, k) { \ + uint32 x; \ + \ + for (x = 0; x < VLAN_INDICES; x++) { \ + (j).value[x] = (k).value[x]; \ + } \ +} + + +/* MASKOREQ or's on the bits in mask j that are on in either mask j or k. */ +#define VLAN_MASKOREQ(j, k) { \ + uint32 x; \ + \ + for (x = 0; x < VLAN_INDICES; x++) { \ + (j).value[x] |= (k).value[x]; \ + } \ +} + + +/* MASKEXOREQ turns-on the bits in mask j that are on in either mask j and k but not in both. */ +#define VLAN_MASKEXOREQ(j, k) { \ + uint32 x; \ + \ + for (x = 0; x < VLAN_INDICES; x++) { \ + j.value[x] ^= k.value[x]; \ + } \ +} + + +/* MASKANDEQ turns-on the bits in mask j that are on in both mask j and k. */ +#define VLAN_MASKANDEQ(j, k) { \ + uint32 x; \ + \ + for (x = 0; x < VLAN_INDICES; x++) { \ + j.value[x] &= k.value[x]; \ + } \ +} + + +/* MASKINV inverts the bits in mask j. */ +#define VLAN_MASKINV(j) { \ + uint32 x; \ + \ + for (x = 0; x < VLAN_INDICES; x++) { \ + j.value[x] = ~(j.value[x]); \ + } \ +} + + +/* MASKANDEQINV turns on the bits in mask j that are on in both mask j + and the bitwise-inverse of mask k. */ +#define VLAN_MASKANDEQINV(j, k) { \ + uint32 x; \ + \ + for (x = 0; x < VLAN_INDICES; x++) { \ + j.value[x] &= ~(k.value[x]); \ + } \ +} +#define VLAN_MASKANDEQINV_POINTER(j, k) { \ + uint32 x; \ + \ + for (x = 0; x < VLAN_INDICES; x++) { \ + j->value[x] &= ~(k.value[x]); \ + } \ +} + + + +/* ISMASKBITSET returns 0 if the interface k is not set in mask j */ +#define VLAN_ISMASKBITSET(j, k) \ + ((j).value[((k-1)/(8*sizeof( uchar8)))] \ + & ( 1 << ((k-1) % (8*sizeof( char8)))) ) + +#define VLAN_ISMASKBITSET_POINTER(j, k) \ + ((j)->value[((k-1)/(8*sizeof( uchar8)))] \ + & ( 1 << ((k-1) % (8*sizeof( char8)))) ) + + +/* FHMASKBIT finds the index of the most-significant bit turned-on in + mask j and returns that index in k. Since this is a 1-based + mask, 0 is returned for "no bits set". */ +#define VLAN_FHMASKBIT(j, k) { \ + int32 x; \ + \ + for (x = ( VLAN_INDICES - 1); x >= 0; x--) { \ + if ( j.value[x] ) \ + break; \ + }; \ + k = 0; \ + if (x >= 0) { \ +/* This is for i960 + asm volatile ("scanbit %1,%0" : "=d"(k) : "d"(j.value[x])); */ \ +/* This is not */ \ + int32 i; \ + for (i = 7; i >= 0; i--) { \ + if ( j.value[x] & (1 << i)) { \ + k = i + 1 + (x * (8 * sizeof( uchar8))); \ + break; \ + } \ + } \ +/* End non-i960 */ \ + }; \ +} + +/* FLMASKBIT finds the index of the least-significant bit turned-on in + mask j and returns that index in k. Since this is a 1-based + mask, 0 is returned for "no bits set". */ +#define VLAN_FLMASKBIT(j, k) { \ + int32 x; \ + \ + for (x = 0; x <= ( VLAN_INDICES - 1); x++) { \ + if ( j.value[x] ) \ + break; \ + }; \ + k = 0; \ + if (x < VLAN_INDICES) { \ +/* This is for i960 + asm volatile ("scanbit %1,%0" : "=d"(k) : "d"(j.value[x])); */ \ +/* This is not */ \ + int32 i; \ + for (i = 0; i <= 7; i++) { \ + if ( j.value[x] & (1 << i)) { \ + k = i + 1 + (x * (8 * sizeof( uchar8))); \ + break; \ + } \ + } \ +/* End non-i960 */ \ + }; \ +} + +/* USE C Declarations */ +#ifdef __cplusplus +} +#endif + +#endif diff --git a/src/sonic-pac/authmgr/common/component_mask.h b/src/sonic-pac/authmgr/common/component_mask.h new file mode 100755 index 000000000000..6175963fbc7c --- /dev/null +++ b/src/sonic-pac/authmgr/common/component_mask.h @@ -0,0 +1,116 @@ +/* + * Copyright 2024 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#ifndef COMPONENT_MASK_H +#define COMPONENT_MASK_H + +/*-----------------------*/ +/* Component Mask Macros */ +/*-----------------------*/ + +/* Number of bytes in mask */ +#define COMPONENT_INDICES (( LAST_COMPONENT_ID - 1) / (sizeof( uchar8) * 8) + 1) + +/* Component Mask Storage */ +typedef struct { + uchar8 value[COMPONENT_INDICES]; +} COMPONENT_MASK_t; + + +typedef COMPONENT_MASK_t ComponentMask; + +/* + * NONZEROMASK returns true if any bit in word mask of NUM length + * is turned-on. The result, TRUE or FALSE is stored in + * result. + */ +#define COMPONENT_NONZEROMASK(mask, result){ \ + uint32 _i_; \ + COMPONENT_MASK_t *_p_; \ + \ + _p_ = (COMPONENT_MASK_t *)&(mask); \ + for(_i_ = 0; _i_ < COMPONENT_INDICES; _i_++) \ + if(_p_ -> value[_i_]){ \ + result = TRUE; \ + break; \ + } \ + else \ + result = FALSE; \ +} + + +#define COMPONENT_MASKNUMBITSETGET(mask, result){ \ + uint32 _i_; \ + COMPONENT_MASK_t *_p_; \ + \ + _p_ = (COMPONENT_MASK_t *)&(mask);result=0; \ + for(_i_ = 0; _i_ < COMPONENT_INDICES; _i_++) \ + if(_p_ -> value[_i_]){ \ + result++; \ + break; \ + } \ +} + + +/* Least significant bit/rightmost bit is lowest interface # */ + +/* SETMASKBIT turns on bit index # k in mask j. */ +#define COMPONENT_SETMASKBIT(j, k) \ + ((j).value[((k-1)/(8*sizeof( uchar8)))] \ + |= 1 << ((k-1) % (8*sizeof( uchar8)))) + + + +/* CLRMASKBIT turns off bit index # k in mask j. */ +#define COMPONENT_CLRMASKBIT(j, k) \ + ((j).value[((k-1)/(8*sizeof( uchar8)))] \ + &= ~(1 << ((k-1) % (8*sizeof( uchar8))))) + + +/* ISMASKBITSET returns 0 if the interface k is not set in mask j */ +#define COMPONENT_ISMASKBITSET(j, k) \ + ((j).value[((k-1)/(8*sizeof( uchar8)))] \ + & ( 1 << ((k-1) % (8*sizeof( char8)))) ) + + + + + +/*--------------------------------------------*/ +/* COMPONENT ACQUISITION MACROS */ +/* + Used for managing masks of components + which have acquired an interface +*/ +/*--------------------------------------------*/ + +/* Number of bytes in mask */ +#define COMPONENT_ACQ_INDICES COMPONENT_INDICES} +#define COMPONENT_ACQUIRED_MASK_t COMPONENT_MASK_t + + +typedef COMPONENT_ACQUIRED_MASK_t AcquiredMask; /* Mask of components which have + "acquired" an interface */ + +#define COMPONENT_ACQ_NONZEROMASK COMPONENT_NONZEROMASK +#define COMPONENT_ACQ_SETMASKBIT COMPONENT_SETMASKBIT +#define COMPONENT_ACQ_CLRMASKBIT COMPONENT_CLRMASKBIT +#define COMPONENT_ACQ_ISMASKBITSET COMPONENT_ISMASKBITSET + + +#endif /* COMPONENT_MASK_H */ + diff --git a/src/sonic-pac/authmgr/common/mab_api.h b/src/sonic-pac/authmgr/common/mab_api.h new file mode 100755 index 000000000000..976b1a5185fb --- /dev/null +++ b/src/sonic-pac/authmgr/common/mab_api.h @@ -0,0 +1,310 @@ +/* + * Copyright 2024 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#ifndef INCLUDE_MAB_API_H +#define INCLUDE_MAB_API_H + +/* USE C Declarations */ +#ifdef __cplusplus +extern "C" { +#endif + +#include "pacinfra_common.h" +#include "auth_mgr_exports.h" +#include "mab_exports.h" + +/********************************************************************* +* @purpose Set initialize value for a port +* +* @param intIfNum @b{(input)} internal interface number +* @param initialize @b{(input)} initialize value +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments This value is set to TRUE by management in order to force +* initialization of a port. It is re-set to FALSE after +* initialization has completed. +* +* @end +*********************************************************************/ +RC_t mabPortInitializeSet(uint32 intIfNum, BOOL initialize); + +/********************************************************************* +* @purpose Clear mab stats for specified port +* +* @param intIfNum @b{(input)} internal interface number +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t mabPortStatsClear(uint32 intIfNum); + +/********************************************************************* +* @purpose Get the configured MAB value on the port. +* +* @param intIfNum @b{(input)} internal interface number +* @param mabEnable @b{(output)} value detrmining if MAB +* has been enabled on the port +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t mabPortMABEnableGet(uint32 intIfNum, uint32 *mabEnable); + +/********************************************************************* +* @purpose Set the MAB value on the port. +* +* @param intIfNum @b{(input)} internal interface number +* @param mabEnable @b{(output)} boolean value detrmining if MAB +* has been configured on the port +* +* @returns SUCCESS +* @returns FAILURE +* @results REQUEST_DENIED if port control mode of the port is +* not mac-based +* +* @comments +* +* @end +*********************************************************************/ +RC_t mabPortMABEnableSet(uint32 intIfNum, uint32 mabEnable); + +/********************************************************************* +* @purpose Get the operational MAB value on the port. +* +* @param intIfNum @b{(input)} internal interface number +* @param mabEnabled @b{(output)} value detrmining if MAB +* has been operationally +* enabled on the port +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t mabPortOperMABEnabledGet(uint32 intIfNum, uint32 *mabEnabled); + +/********************************************************************* +* @purpose Get the configured authentication type on the port to be used by MAB. +* +* @param intIfNum @b{(input)} internal interface number +* @param auth_type @b{(output)} Pointer to the authentication type {EAP-MD5 or PAP} +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t mabPortMABAuthTypeGet(uint32 intIfNum, + AUTHMGR_PORT_MAB_AUTH_TYPE_t *auth_type); + +/********************************************************************* +* @purpose Set the authentication type on the port to be used by MAB. +* +* @param intIfNum @b{(input)} internal interface number +* @param auth_type @b{(input)} Authentication type {EAP-MD5 or PAP} +* +* @returns SUCCESS if able to set the auth_type successfully +* @results REQUEST_DENIED if MAB is not enabled on that port +* @returns FAILURE otherwise +* +* @comments +* +* @end +*********************************************************************/ +RC_t mabPortMABAuthTypeSet(uint32 intIfNum, + AUTHMGR_PORT_MAB_AUTH_TYPE_t auth_type); + +/********************************************************************* +* @purpose Determine if the interface is valid to participate in mab +* +* @param intIfNum @b{(input)} internal interface number +* +* @returns TRUE +* @returns FALSE +* +* @comments +* +* @end +*********************************************************************/ + BOOL mabIsValidIntf(uint32 intIfNum); + +/********************************************************************* +* @purpose Determine if the interface type is valid to participate in mab +* +* @param sysIntfType @b{(input)} interface type +* +* @returns TRUE +* @returns FALSE +* +* @comments +* +* @end +*********************************************************************/ + BOOL mabIsValidIntfType(uint32 sysIntfType); + +/********************************************************************* +* @purpose Set port control mode +* +* @param intIfNum @b{(input)} internal interface number +* @param portControl @b{(input)} port control mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t mabPortControlModeSet(uint32 intIfNum, AUTHMGR_PORT_CONTROL_t portControl); + +/********************************************************************* +* @purpose Set host control mode +* +* @param intIfNum @b{(input)} internal interface number +* @param hostControl @b{(input)} host control mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t mabPortControlHostModeSet(uint32 intIfNum, AUTHMGR_HOST_CONTROL_t hostMode); + +/********************************************************************* + * @purpose Handle Auth Manager event + * + * @param intIfNum @b{(input)} internal interface number + * @param event @b{(input)} event + * @param macAddr @b{(input)} client mac address + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + *********************************************************************/ +RC_t mabClientEventUpdate(uint32 intIfNum, uint32 event, enetMacAddr_t *macAddr); + +/********************************************************************* +* @purpose Return Internal Interface Number of the first valid interface for +* mab. +* +* @param pFirstIntIfNum @b{(output)} pointer to first internal interface number +* +* @returns SUCCESS if success +* @returns ERROR if interface does not exist +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t mabFirstValidIntfNumber(uint32 *pFirstIntIfNum); + +/********************************************************************* +* @purpose Return Internal Interface Number of next valid interface for +* mab. +* +* @param intIfNum @b{(input)} Internal Interface Number +* @param pNextintIfNum @b{(output)} pointer to Next Internal Interface Number, +* +* @returns SUCCESS if success +* @returns ERROR if interface does not exist +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t mabNextValidIntf(uint32 intIfNum, uint32 *pNextIntIfNum); + +/********************************************************************* +* @purpose Get if RADIUS is configured as one of the authentication methods +* for MAB. +* +* @param intIfNum @b{(input)} interface number +* @param intIfNum @b{(output)} enabled/disabled +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t mabAuthmethodRadiusEnabled(uint32 intIfNum, uint32 *enabled); + +/********************************************************************* +* @purpose Update the RADIUS server configuration +* +* @param add @b{(input)} whether server should be added or deleted +* @param radius_type @b{(input)} radius server type +* @param serv_addr @b{(input)} radius server address +* @param serv_priority @b{(input)} radius server priority +* @param radius_key @b{(input)} radius server key +* @param serv_port @b{(input)} radius server port +* +* @returns SUCCESS values are valid and are updated successfully +* @returns FAILURE otherwise +* +* @comments +* +* @end +*********************************************************************/ +RC_t mabRadiusServerUpdate(uint32 cmd, const char *radius_type, + const char *serv_addr, const char *serv_priority, + const char *radius_key, const char *serv_port); + +/********************************************************************* +* @purpose Get RADIUS stats from MAB +* +* @param buf @b{(output)} Buffer to store stats. +* @param buflen @b{(output)} Length of buffer. +* +* @returns SUCCESS Stats retrieved successfully. +* @returns FAILURE Stats could not be retrieved. +* +* @comments +* +* @end +*********************************************************************/ +RC_t mabRadiusClientGetStats(char *buf, int buflen); + + +/* USE C Declarations */ +#ifdef __cplusplus +} +#endif + +#endif /* INCLUDE_MAB_API_H */ diff --git a/src/sonic-pac/authmgr/common/mab_exports.h b/src/sonic-pac/authmgr/common/mab_exports.h new file mode 100755 index 000000000000..6486db6012f5 --- /dev/null +++ b/src/sonic-pac/authmgr/common/mab_exports.h @@ -0,0 +1,93 @@ +/* + * Copyright 2024 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MAB_EXPORTS_H_ +#define __MAB_EXPORTS_H_ + +/* USE C Declarations */ +#ifdef __cplusplus +extern "C" { +#endif + +/* MAB Component Feature List */ +typedef enum +{ + MAB_FEATURE_ID = 0, /* general support statement */ + MAB_FEATURE_ID_TOTAL, /* total number of enum values */ +} MAB_FEATURE_IDS_t; + +#define MAB_MAX_USERS_PER_PORT FD_AUTHMGR_PORT_MAX_USERS + +#define MAB_USER_NAME_LEN 65 +#define MAB_CHALLENGE_LEN 32 + +#define MAB_CHAP_CHALLENGE_LEN 16 +#define MAB_FILTER_NAME_LEN 256 + +/******************************************************************/ +/************* Start MAB types and defines *********/ +/******************************************************************/ + +/* Port protocol version */ +typedef enum +{ + MAB_PAE_PORT_PROTOCOL_VERSION_1 = 1 +} MAB_PAE_PORT_PROTOCOL_VERSION_t; + + +/* MAB Request Attribute1 Group Size types */ +typedef enum +{ + MAB_REQUEST_ATTRIBUTE1_GROUP_SIZE_INVALID = 0, + MAB_REQUEST_ATTRIBUTE1_GROUP_SIZE_1 = 1, + MAB_REQUEST_ATTRIBUTE1_GROUP_SIZE_2 = 2, + MAB_REQUEST_ATTRIBUTE1_GROUP_SIZE_4 = 4, + MAB_REQUEST_ATTRIBUTE1_GROUP_SIZE_12 = 12 +} MAB_REQUEST_ATTRIBUTE1_GROUP_SIZE_t; + +/* MAB Request Attribute1 Separator types */ +typedef enum +{ + MAB_REQUEST_ATTRIBUTE1_SEPARATOR_INVALID = 0, + MAB_REQUEST_ATTRIBUTE1_SEPARATOR_IETF, /* '-' is used as a separator */ + MAB_REQUEST_ATTRIBUTE1_SEPARATOR_LEGACY, /* ':' is used as a separator */ + MAB_REQUEST_ATTRIBUTE1_SEPARATOR_DOT /* '.' is used as a separator */ +} MAB_REQUEST_ATTRIBUTE1_SEPARATOR_t; + +/* MAB Request Attribute1 Case types */ +typedef enum +{ + MAB_REQUEST_ATTRIBUTE1_CASE_INVALID = 0, + MAB_REQUEST_ATTRIBUTE1_CASE_UPPER, + MAB_REQUEST_ATTRIBUTE1_CASE_LOWER +} MAB_REQUEST_ATTRIBUTE1_CASE_t; + + + + + +/******************** conditional Override *****************************/ + +#ifdef INCLUDE_MAB_EXPORTS_OVERRIDES +#include "mab_exports_overrides.h" +#endif + +/* USE C Declarations */ +#ifdef __cplusplus +} +#endif + +#endif /* __MAB_EXPORTS_H_*/ diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_api.c b/src/sonic-pac/authmgr/mapping/auth_mgr_api.c new file mode 100755 index 000000000000..d86795237ee2 --- /dev/null +++ b/src/sonic-pac/authmgr/mapping/auth_mgr_api.c @@ -0,0 +1,2998 @@ +/* + * Copyright 2024 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#include "auth_mgr_include.h" +#include "auth_mgr_vlan.h" +#include "auth_mgr_vlan_db.h" +#include "auth_mgr_struct.h" +#include "pacoper_common.h" + +extern authmgrCB_t *authmgrCB; + +/********************************************************************* +* @purpose Get initialize value for a port +* +* @param intIfNum @b{(input)} internal interface number +* @param *initialize @b{(output)} initialize value +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments This value indicates whether a port is being initialized +* due to a management request +* +* @end +*********************************************************************/ +RC_t authmgrPortInitializeGet(uint32 intIfNum, BOOL *initialize) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + /* Setting this value to TRUE causes an action. It is not actually + * stored in the config structure. So, just return what's stored + * in the operational structure. + */ + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + *initialize = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].initialize; + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + return SUCCESS; +} + +/********************************************************************* +* @purpose Set initialize value for a port +* +* @param intIfNum @b{(input)} internal interface number +* @param initialize @b{(input)} initialize value +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments This value is set to TRUE by management in order to force +* initialization of a port. It is re-set to FALSE after +* initialization has completed. +* +* @end +*********************************************************************/ +RC_t authmgrPortInitializeSet(uint32 intIfNum, BOOL initialize) +{ + authmgrPortCfg_t *pCfg; + RC_t rc = SUCCESS; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + /* Port Mode must be Auto (i.e. not ForceAuthorized + * or ForceUnauthorized) + */ + if (pCfg->portControlMode == AUTHMGR_PORT_FORCE_AUTHORIZED || + pCfg->portControlMode == AUTHMGR_PORT_FORCE_UNAUTHORIZED ) + return SUCCESS; + + if (initialize == TRUE) + rc = authmgrIssueCmd(authmgrMgmtPortInitializeSet, intIfNum, &initialize); + + return rc; +} + +/********************************************************************* +* @purpose Get reauthentication value for a port +* +* @param intIfNum @b{(input)} internal interface number +* @param *reauthenticate @b{(output)} reauthentication value +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments This value indicates whether a port is being reauthenticated +* due to a management request. Per the MIB, this object always +* returns FALSE when read. +* +* @end +*********************************************************************/ +RC_t authmgrPortReauthenticateGet(uint32 intIfNum, BOOL *reauthenticate) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + /* Per the MIB, this object always returns FALSE when read */ + *reauthenticate = FALSE; + return SUCCESS; +} + +/********************************************************************* +* @purpose Set reauthentication value for a port +* +* @param intIfNum @b{(input)} internal interface number +* @param reauthenticate @b{(input)} reauthentication value +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments This value is set to TRUE by management in order to force +* reauthentication of a port. It is re-set to FALSE after +* reauthentication has completed. +* +* @end +*********************************************************************/ +RC_t authmgrPortReauthenticateSet(uint32 intIfNum, BOOL reauthenticate) +{ + authmgrPortCfg_t *pCfg; + RC_t rc = SUCCESS; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + /* Port Mode must be Auto (i.e. not ForceAuthorized + * or ForceUnauthorized) + */ + if (pCfg->portControlMode == AUTHMGR_PORT_FORCE_AUTHORIZED || + pCfg->portControlMode == AUTHMGR_PORT_FORCE_UNAUTHORIZED ) + return FAILURE; + + if (reauthenticate == TRUE) + rc = authmgrIssueCmd(authmgrMgmtPortReauthenticateSet, intIfNum, &reauthenticate); + + return rc; +} + +/********************************************************************* +* @purpose Get port control mode +* +* @param intIfNum @b{(input)} internal interface number +* @param *portControl @b{(output)} port control mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrPortControlModeGet(uint32 intIfNum, AUTHMGR_PORT_CONTROL_t *portControl) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + *portControl = pCfg->portControlMode; + (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock); + return SUCCESS; +} + +/********************************************************************* +* @purpose Get global port control mode +* +* @param *portControl @b{(output)} port control mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrGlobalPortControlModeGet( AUTHMGR_PORT_CONTROL_t *portControl) +{ + (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + *portControl = authmgrCB->globalInfo->authmgrCfg->portControlMode; + (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock); + return SUCCESS; +} + +/********************************************************************* +* @purpose Set port control mode +* +* @param intIfNum @b{(input)} internal interface number +* @param portControl @b{(input)} port control mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrPortControlModeSet(uint32 intIfNum, AUTHMGR_PORT_CONTROL_t portControl) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + pCfg->portControlMode = portControl; + (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock); + authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged = TRUE; + + return authmgrIssueCmd(authmgrMgmtPortControlModeSet, intIfNum, &portControl); +} + +/********************************************************************* +* @purpose Set port control mode to default +* +* @param intIfNum @b{(input)} internal interface number +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrPortControlModeReset(uint32 intIfNum) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + + (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + pCfg->portControlMode = FD_AUTHMGR_PORT_MODE; + (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock); + authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged = TRUE; + + return authmgrIssueCmd(authmgrMgmtPortControlModeSet, intIfNum, (void *)(&pCfg->portControlMode)); +} + +/********************************************************************* +* @purpose Get quiet period value +* +* @param intIfNum @b{(input)} internal interface number +* @param *quietPeriod @b{(output)} quiet period +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The quietTime is the initialization value for quietWhile, +* which is a timer used by the Authenticator state machine +* to define periods of time in which it will not attempt to +* acquire a Supplicant. +* +* @end +*********************************************************************/ +RC_t authmgrPortAuthRestartTimerGet(uint32 intIfNum, uint32 *quietPeriod) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + *quietPeriod = pCfg->quietPeriod; + (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock); + return SUCCESS; +} + +/********************************************************************* +* @purpose Set quiet period value +* +* @param intIfNum @b{(input)} internal interface number +* @param quietPeriod @b{(input)} quiet period +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The quietPeriod is the initialization value for quietWhile, +* which is a timer used by the Authenticator state machine +* to define periods of time in which it will not attempt to +* acquire a Supplicant. +* +* @end +*********************************************************************/ +RC_t authmgrPortAuthRestartTimerSet(uint32 intIfNum, uint32 quietPeriod) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock); + pCfg->quietPeriod = quietPeriod; + (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock); + authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged = TRUE; + + return authmgrIssueCmd(authmgrMgmtPortQuietPeriodSet, intIfNum, &quietPeriod); +} +/********************************************************************* +* @purpose Get the Reauthentication period +* +* @param intIfNum @b{(input)} internal interface number +* @param *reAuthPeriod @b{(output)} reauthentication period +* @param serverConfig @b{(output)} get reauthentication period +* from server option +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The reAuthPeriod is the initialization value for reAuthWhen, +* which is a timer used by the Authenticator state machine to +* determine when reauthentication of the Supplicant takes place. +* +* @end +*********************************************************************/ +RC_t authmgrPortReAuthPeriodGet(uint32 intIfNum, + uint32 *reAuthPeriod, + BOOL *serverConfig) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + *reAuthPeriod = pCfg->reAuthPeriod; + *serverConfig = pCfg->reAuthPeriodServer; + (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock); + return SUCCESS; +} + +/********************************************************************* +* @purpose Set the Reauthentication period +* +* @param intIfNum @b{(input)} internal interface number +* @param reAuthPeriod @b{(input)} reauthentication period +* @param serverConfig @b{(input)} set option to get reauthentication +* period from server option +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The reAuthPeriod is the initialization value for reAuthWhen, +* which is a timer used by the Authenticator state machine to +* determine when reauthentication of the Supplicant takes place. +* +* @end +*********************************************************************/ +RC_t authmgrPortReAuthPeriodSet(uint32 intIfNum, uint32 reAuthPeriod, BOOL serverConfig) +{ + authmgrPortCfg_t *pCfg; + authmgrMgmtTimePeriod_t params; + + memset(¶ms, 0, sizeof(authmgrMgmtTimePeriod_t)); + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + if (serverConfig) + { + pCfg->reAuthPeriodServer = TRUE; + pCfg->reAuthPeriod = FD_AUTHMGR_PORT_REAUTH_PERIOD; + } + else + { + pCfg->reAuthPeriodServer = FALSE; + pCfg->reAuthPeriod = reAuthPeriod; + } + (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock); + authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged = TRUE; + + params.reAuthPeriodServer = pCfg->reAuthPeriodServer; + params.val = pCfg->reAuthPeriod; + + return authmgrIssueCmd(authmgrMgmtPortReAuthPeriodSet, intIfNum, (void *)¶ms); +} + +/********************************************************************* +* @purpose Get the Reauthentication mode +* +* @param intIfNum @b{(input)} internal interface number +* @param *reAuthEnabled @b{(output)} reauthentication mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The reAuthEnabled mode determines whether reauthentication +* of the Supplicant takes place. +* +* @end +*********************************************************************/ +RC_t authmgrPortReAuthEnabledGet(uint32 intIfNum, BOOL *reAuthEnabled) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + *reAuthEnabled = pCfg->reAuthEnabled; + (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock); + return SUCCESS; +} + +/********************************************************************* +* @purpose Set the Reauthentication mode +* +* @param intIfNum @b{(input)} internal interface number +* @param reAuthEnabled @b{(input)} reauthentication mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The reAuthEnabled mode determines whether reauthentication +* of the Supplicant takes place. +* +* @end +*********************************************************************/ +RC_t authmgrPortReAuthEnabledSet(uint32 intIfNum, BOOL reAuthEnabled) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + + (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + pCfg->reAuthEnabled = reAuthEnabled; + (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock); + authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged = TRUE; + + return authmgrIssueCmd(authmgrMgmtPortReAuthEnabledSet, intIfNum, &reAuthEnabled); +} + + +/********************************************************************* +* @purpose Get operational value of controlled directions +* +* @param intIfNum @b{(input)} internal interface number +* @param *portStatus @b{(output)} port authentication status +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrPortAuthControlledPortStatusGet(uint32 intIfNum, AUTHMGR_PORT_STATUS_t *portStatus) +{ + if (authmgrCB->globalInfo->authmgrPortInfo == NULLPTR) + return FAILURE; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + + if ( AUTHMGR_PORT_STATUS_AUTHORIZED == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portStatus) + { + *portStatus = AUTHMGR_PORT_STATUS_AUTHORIZED; + } + else + { + *portStatus = AUTHMGR_PORT_STATUS_UNAUTHORIZED; + } + + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + return SUCCESS; +} + +/********************************************************************* +* @purpose Get port operational mode +* +* @param intIfNum @b{(input)} internal interface number +* @param *portMode @b{(output)} port operational mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrPortOperControlModeGet(uint32 intIfNum, AUTHMGR_PORT_CONTROL_t *portMode) +{ + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + if(authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled == TRUE) + *portMode = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode; + else + *portMode = AUTHMGR_PORT_NA; + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + return SUCCESS; +} + +/********************************************************************* +* @purpose Clear authmgr stats for specified port +* +* @param intIfNum @b{(input)} internal interface number +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrPortStatsClear(uint32 intIfNum) +{ + RC_t rc = SUCCESS; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + rc = authmgrIssueCmd(authmgrMgmtPortStatsClear, intIfNum, NULLPTR); + + return rc; +} + +/********************************************************************* +* @purpose Determine if the interface is valid to participate in authmgr +* +* @param sysIntfType @b{(input)} interface type +* +* @returns TRUE +* @returns FALSE +* +* @comments +* +* @end +*********************************************************************/ + BOOL authmgrIsValidIntfType(uint32 sysIntfType) +{ + if (sysIntfType != PHYSICAL_INTF) + return FALSE; + + return TRUE; +} + +/********************************************************************* +* @purpose Determine if the interface is valid to participate in authmgr +* +* @param intIfNum @b{(input)} internal interface number +* +* @returns TRUE +* @returns FALSE +* +* @comments +* +* @end +*********************************************************************/ +BOOL authmgrIsValidIntf(uint32 intIfNum) +{ + INTF_TYPES_t sysIntfType; + + if ((nimGetIntfType(intIfNum, &sysIntfType) != SUCCESS) || + (authmgrIsValidIntfType(sysIntfType) != TRUE)) + { + return FALSE; + } + + return TRUE; +} + + +/********************************************************************* +* @purpose Return Internal Interface Number of next valid interface for +* authmgr. +* +* @param intIfNum @b{(input)} Internal Interface Number +* @param pNextintIfNum @b{(output)} pointer to Next Internal Interface Number, +* +* @returns SUCCESS if success +* @returns ERROR if interface does not exist +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrNextValidIntf(uint32 intIfNum, uint32 *pNextIntIfNum) +{ + RC_t rc = FAILURE; + uint32 nextIntIfNum = intIfNum; + + while ( SUCCESS == nimNextValidIntfNumberByType( PHYSICAL_INTF, nextIntIfNum, &nextIntIfNum)) + { + if ( TRUE == authmgrIsValidIntf(nextIntIfNum)) + { + /* Next authmgr valid interface found. */ + *pNextIntIfNum = nextIntIfNum; + rc = SUCCESS; + break; + } + } + + return rc; +} + +/********************************************************************* +* @purpose Return Internal Interface Number of the first valid interface for +* authmgr. +* +* @param pFirstIntIfNum @b{(output)} pointer to first internal interface number +* +* @returns SUCCESS if success +* @returns ERROR if interface does not exist +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrFirstValidIntfNumber(uint32 *pFirstIntIfNum) +{ + RC_t rc = FAILURE; + uint32 intIfNum = NULL; + + if ( SUCCESS == nimFirstValidIntfNumberByType( PHYSICAL_INTF, &intIfNum)) + { + if ( FALSE == authmgrIsValidIntf(intIfNum)) + { + /* Front panel and fixed stack ports are not a valid authmgr interfaces. + * Hence get the next authmgr valid interface. + */ + rc = authmgrNextValidIntf(intIfNum, &intIfNum); + } + else + { + rc = SUCCESS; + } + + if ( SUCCESS == rc) + { + /* Copy the valid interface in the output pointer */ + *pFirstIntIfNum = intIfNum; + } + } + + return rc; + +} + +/********************************************************************* +* @purpose Set administrative mode setting for authmgr Vlan Assignment +* +* @param mode @b{(input)} radius vlan assignment mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrVlanAssignmentModeSet (uint32 mode) +{ + if (authmgrCB->globalInfo->authmgrCfg->vlanAssignmentMode == mode) + return SUCCESS; + + (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + if(mode == ENABLE) + { + authmgrCB->globalInfo->authmgrCfg->vlanAssignmentMode = ENABLE; + } + else + { + authmgrCB->globalInfo->authmgrCfg->vlanAssignmentMode = DISABLE; + } + (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock); + authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged = TRUE; + + return SUCCESS; +} + +/********************************************************************* +* @purpose Get administrative mode setting for authmgr Vlan Assignment +* +* @param mode @b{(input)} radius vlan assignment mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrVlanAssignmentModeGet(uint32 *mode) +{ + (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + *mode = authmgrCB->globalInfo->authmgrCfg->vlanAssignmentMode; + (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock); + return SUCCESS; +} + +/********************************************************************* +* @purpose Set max users value +* +* @param intIfNum @b{(input)} internal interface number +* @param maxUsers @b{(input)} max users +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The maxUsers is the maximum number of hosts that can be +* authenticated on a port using mac based authentication +* +* @end +*********************************************************************/ +RC_t authmgrPortMaxUsersSet(uint32 intIfNum, uint32 maxUsers) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + if ((maxUsers < AUTHMGR_PORT_MIN_MAC_USERS) || + (maxUsers > AUTHMGR_PORT_MAX_MAC_USERS)) + { + return FAILURE; + } + + (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + pCfg->maxUsers = maxUsers; + (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock); + authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged = TRUE; + + return authmgrIssueCmd(authmgrMgmtPortMaxUsersSet, intIfNum, &maxUsers); +} + +/********************************************************************* +* @purpose Get max users value +* +* @param intIfNum @b{(input)} internal interface number +* @param *maxUsers @b{(output)} max users per port +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The maxUsers is the maximum number of hosts that can be +* authenticated on a port using mac based authentication +* +* @end +*********************************************************************/ +RC_t authmgrPortMaxUsersGet(uint32 intIfNum, uint32 *maxUsers) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + *maxUsers = pCfg->maxUsers; + (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock); + return SUCCESS; +} + +/********************************************************************* +* @purpose Returns the first logical port in use for the physcial interface +* +* @param intIfNum @b{(input)} internal interface number +* @param lIntIfNum @b((output)) the logical interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortFirstGet(uint32 intIfNum,uint32 *lIntIfNum) +{ + authmgrPortCfg_t *pCfg; + authmgrLogicalPortInfo_t *logicalPortInfo; + RC_t rc = FAILURE; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return rc; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return rc; + + if ( AUTHMGR_PORT_AUTO == pCfg->portControlMode) + { + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + authmgrLogicalPortInfoTakeLock(); + logicalPortInfo = authmgrLogicalPortInfoFirstGet(intIfNum,lIntIfNum); + + if ( NULLPTR != logicalPortInfo) + { + if (0 != logicalPortInfo->key.keyNum) + { + rc = SUCCESS; + } + } + authmgrLogicalPortInfoGiveLock(); + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + } + return rc; +} + +/********************************************************************* +* @purpose Returns the next logical port for the physcial interface +* +* @param lIntIfNum @b((input)) the logical interface +* @param nextIntf @b{(ouput)} the next interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortNextGet(uint32 lIntIfNum,uint32 *nextIntf) +{ + authmgrPortCfg_t *pCfg; + uint32 next; + RC_t rc = FAILURE; + uint32 physPort = 0; + + AUTHMGR_PORT_GET(physPort, lIntIfNum); + + if (authmgrIsValidIntf(physPort) != TRUE) + return rc; + + if (authmgrIntfIsConfigurable(physPort, &pCfg) != TRUE) + return rc; + + if ( AUTHMGR_PORT_AUTO == pCfg->portControlMode) + { + next = lIntIfNum; + authmgrLogicalPortInfoTakeLock(); + if(authmgrLogicalPortInfoGetNextNode(physPort,&next)!= NULLPTR) + { + *nextIntf = next; + rc = SUCCESS; + } + authmgrLogicalPortInfoGiveLock(); + } + return rc; +} + +/********************************************************************* +* @purpose Returns the Supplicant Mac address for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param macAddr @b((output)) Mac Address of the supplicant +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortSupplicantMacAddrGet(uint32 lIntIfNum, + uchar8 *macAddr) +{ + uint32 physPort = 0; + authmgrPortCfg_t *pCfg; + RC_t rc = SUCCESS; + authmgrLogicalPortInfo_t *logicalPortInfo; + + AUTHMGR_PORT_GET (physPort, lIntIfNum); + + if (authmgrIsValidIntf(physPort) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(physPort, &pCfg) != TRUE) + return FAILURE; + + + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + authmgrLogicalPortInfoTakeLock(); + logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum); + if(logicalPortInfo != NULLPTR) + { + memcpy(macAddr,&logicalPortInfo->client.suppMacAddr, ENET_MAC_ADDR_LEN); + } + else + { + rc = FAILURE; + } + authmgrLogicalPortInfoGiveLock(); + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + return rc; +} + + +/********************************************************************* +* @purpose Returns the PAE state for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param authState @b((output)) PAE state +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortStateGet(uint32 lIntIfNum, + uint32 *authState) +{ + uint32 physPort; + authmgrPortCfg_t *pCfg; + RC_t rc = SUCCESS; + authmgrLogicalPortInfo_t *logicalPortInfo; + + AUTHMGR_PORT_GET(physPort, lIntIfNum); + + if (authmgrIsValidIntf(physPort) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(physPort, &pCfg) != TRUE) + return FAILURE; + + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + authmgrLogicalPortInfoTakeLock(); + logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum); + if(logicalPortInfo != NULLPTR) + { + *authState = logicalPortInfo->protocol.authState + 1; + } + else + { + rc = FAILURE; + } + authmgrLogicalPortInfoGiveLock(); + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + return rc; +} + +/********************************************************************* +* @purpose Returns the Vlan assigned for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param vlan @b((output)) vlan assigned to the logical interface +* @param mode @b((output)) mode of assignment Radius/unauthenticated/Default +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortVlanAssignmentGet(uint32 lIntIfNum, + uint32 *vlanId, + uint32 *mode) +{ + uint32 physPort; + authmgrPortCfg_t *pCfg; + authmgrLogicalPortInfo_t *logicalPortInfo; + authmgrVlanInfoEntry_t entry; + + AUTHMGR_PORT_GET(physPort, lIntIfNum); + + if (authmgrIsValidIntf(physPort) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(physPort, &pCfg) != TRUE) + return FAILURE; + + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + authmgrLogicalPortInfoTakeLock(); + logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum); + if(logicalPortInfo != NULLPTR) + { + memset(&entry, 0, sizeof(authmgrVlanInfoEntry_t)); + if ( SUCCESS != authmgrVlanTypeInfoGet(logicalPortInfo->client.vlanType, &entry)) + { + AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_FAILURE,physPort, + "%s %s Unable to find the vlan Info entry for the vlan type %d\n", + __FUNCTION__, authmgrIntfIfNameGet(physPort), logicalPortInfo->client.vlanType); + authmgrLogicalPortInfoGiveLock(); + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + return FAILURE; + } + + *vlanId =logicalPortInfo->client.vlanId; + *mode = entry.assignmentReason; + } + + authmgrLogicalPortInfoGiveLock(); + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + return SUCCESS; + } + +/********************************************************************* +* @purpose Returns the User Name for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param userName @b((output)) user name for the logical interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortUserNameGet(uint32 lIntIfNum, + uchar8 *userName) +{ + uint32 physPort; + authmgrPortCfg_t *pCfg; + RC_t rc = SUCCESS; + authmgrLogicalPortInfo_t *logicalPortInfo; + + AUTHMGR_PORT_GET(physPort, lIntIfNum); + + if (authmgrIsValidIntf(physPort) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(physPort, &pCfg) != TRUE) + return FAILURE; + + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + authmgrLogicalPortInfoTakeLock(); + logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum); + if(logicalPortInfo != NULLPTR) + { + memcpy(userName,logicalPortInfo->client.authmgrUserName, + logicalPortInfo->client.authmgrUserNameLength); + } + else + { + rc = FAILURE; + } + authmgrLogicalPortInfoGiveLock(); + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + return rc; +} + + +/********************************************************************* +* @purpose Returns the session timeout value for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param sessiontimeout @b((output)) session timeout for the logical interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortSessionTimeoutGet(uint32 lIntIfNum, + uint32 *session_timeout) +{ + uint32 physPort; + authmgrPortCfg_t *pCfg; + RC_t rc = SUCCESS; + authmgrLogicalPortInfo_t *logicalPortInfo; + + AUTHMGR_PORT_GET(physPort, lIntIfNum); + + if (authmgrIsValidIntf(physPort) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(physPort, &pCfg) != TRUE) + return FAILURE; + + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + authmgrLogicalPortInfoTakeLock(); + logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum); + if(logicalPortInfo != NULLPTR) + { + *session_timeout = logicalPortInfo->client.sessionTimeout; + } + else + { + rc = FAILURE; + } + authmgrLogicalPortInfoGiveLock(); + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + return rc; +} + +/********************************************************************* +* @purpose To get the time left for the session termination action +* to occur for the logical interface +* +* @param lIntIfNum @b((input)) Logical interface number +* @param timeLeft @b((output)) Pointer to store the left out time +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortTimeLeftForTerminateActionGet(uint32 lIntIfNum, + uint32 *timeLeft) +{ + uint32 physPort; + authmgrPortCfg_t *pCfg; + RC_t rc = SUCCESS; + authmgrLogicalPortInfo_t *logicalPortInfo; + + AUTHMGR_PORT_GET(physPort, lIntIfNum); + + if (authmgrIsValidIntf(physPort) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(physPort, &pCfg) != TRUE) + return FAILURE; + + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + authmgrLogicalPortInfoTakeLock(); + logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum); + if(logicalPortInfo != NULLPTR) + { + rc = appTimerTimeLeftGet(authmgrCB->globalInfo->authmgrTimerCB, + logicalPortInfo->authmgrTimer.handle.timer, + timeLeft); + } + else + { + rc = FAILURE; + } + authmgrLogicalPortInfoGiveLock(); + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + return rc; +} + + +/********************************************************************* +* @purpose Returns the termination Action for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param terminationAction @b((output)) termination Action for the logical interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortTerminationActionGet(uint32 lIntIfNum, + uint32 *terminationAction) +{ + uint32 physPort; + authmgrPortCfg_t *pCfg; + RC_t rc = SUCCESS; + authmgrLogicalPortInfo_t *logicalPortInfo; + + AUTHMGR_PORT_GET(physPort, lIntIfNum); + + if (authmgrIsValidIntf(physPort) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(physPort, &pCfg) != TRUE) + return FAILURE; + + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + authmgrLogicalPortInfoTakeLock(); + logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum); + if(logicalPortInfo != NULLPTR) + { + *terminationAction = logicalPortInfo->client.terminationAction + 1; + } + else + { + rc = FAILURE; + } + authmgrLogicalPortInfoGiveLock(); + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + return rc; +} + +/********************************************************************* +* @purpose Returns the logical port for the corresponding supplicant Mac Address +* +* @param mac_addr @b{(input)} supplicant mac address to be searched +* @param lIntIfNum @b((output)) the logical interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments for SNMP +* +* @end +*********************************************************************/ +RC_t authmgrClientMacAddressGet( enetMacAddr_t *macAddr,uint32 *lIntIfNum) +{ + return authmgrMacAddrInfoFind(macAddr,lIntIfNum); +} + +/********************************************************************* +* @purpose Returns the logical port for the next supplicant Mac Address +* in the mac address database +* +* @param mac_addr @b{(input)} supplicant mac address to be searched +* @param lIntIfNum @b((output)) the logical interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments for SNMP +* +* @end +*********************************************************************/ +RC_t authmgrClientMacAddressNextGet( enetMacAddr_t *macAddr,uint32 *lIntIfNum) +{ + return authmgrMacAddrInfoFindNext(macAddr,lIntIfNum); +} + +/********************************************************************* +* @purpose Returns the physical port corresponding to the logical interface +* +* @param lIntIfNum @b((input)) the logical interface +* @param physport @b{(ouput)} the physical interface +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrPhysicalPortGet(uint32 lIntIfNum,uint32 *physPort) +{ + AUTHMGR_PORT_GET(*physPort, lIntIfNum) + return SUCCESS; +} +/********************************************************************* +* +* @purpose Callback from DTL informing about an unauthorized address +* +* @param uint32 intIfNum @b((input)) Internal interface number +* @param enetMacAddr_t macAddr @b((output)) MAC address +* @param ushort16 vlanId @b((output)) VLAN ID +* +* @returns SUCCESS +* @returns FAILURE +* +* @notes none +* +* @end +*********************************************************************/ +RC_t authmgrUnauthAddrCallBack( uint32 intIfNum, enetMacAddr_t macAddr, ushort16 vlanId ) +{ + authmgrPortCfg_t *pCfg; + authmgrUnauthCallbackParms_t parms; + + /* If it is not a valid interface drop the request */ + if ( authmgrIsValidIntf( intIfNum ) != TRUE ) + { + return FAILURE; + } + + /* check if Guest vlan is enabled */ + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + { + return FAILURE; + } + + memcpy(&parms.macAddr,&macAddr.addr, ENET_MAC_ADDR_LEN); + parms.vlanId = vlanId; + + /* send the message to the authmgr component */ + return authmgrIssueCmd(authmgrUnauthAddrCallBackEvent,intIfNum,(void *)&parms); +} + +/********************************************************************* +* @purpose Returns the authentication status of the client +* +* @param lIntIfNum @b((input)) the specified interface +* @param authStat @b((output)) auth status +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrClientVlanGet(uint32 lIntIfNum, + uint32 *vlanType, + uint32 *vlanId) +{ + RC_t rc = SUCCESS; + authmgrLogicalPortInfo_t *logicalPortInfo; + + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + authmgrLogicalPortInfoTakeLock(); + logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum); + if(logicalPortInfo != NULLPTR) + { + *vlanType = logicalPortInfo->client.vlanType; + *vlanId = logicalPortInfo->client.vlanId; + } + else + { + rc = FAILURE; + } + authmgrLogicalPortInfoGiveLock(); + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + return rc; +} + + +/********************************************************************* +* @purpose Returns the authentication status of the client +* +* @param lIntIfNum @b((input)) the specified interface +* @param authStat @b((output)) auth status +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrClientAuthStatusGet(uint32 lIntIfNum, + uint32 *authStatus) +{ + RC_t rc = SUCCESS; + authmgrLogicalPortInfo_t *logicalPortInfo; + + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + authmgrLogicalPortInfoTakeLock(); + logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum); + if(logicalPortInfo != NULLPTR) + { + *authStatus = logicalPortInfo->client.logicalPortStatus; + } + else + { + rc = FAILURE; + } + authmgrLogicalPortInfoGiveLock(); + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + return rc; +} + +/********************************************************************* +* @purpose Determine if a client is authenticated on an interface +* +* @param intIfNum @b{(input)} internal interface number +* @param macAddr @b{(input)} client's MAC address +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ + BOOL authmgrPortClientAuthenticationGet(uint32 intIfNum, uchar8 *macAddr) +{ + AUTHMGR_PORT_CONTROL_t portControl; + AUTHMGR_PORT_STATUS_t status; + uint32 lIntIfNum; + uint32 physPort=0; + + if (authmgrCB->globalInfo->authmgrCfg->adminMode != ENABLE) + { + return TRUE; + } + if ( SUCCESS != authmgrPortControlModeGet(intIfNum, &portControl)) + { + return TRUE; + } + + if ( AUTHMGR_PORT_FORCE_UNAUTHORIZED == portControl) + { + /* If port is force unauthorized, client is not authenticated */ + return FALSE; + } + + if ( AUTHMGR_PORT_FORCE_AUTHORIZED == portControl) + { + /* If port is force authorized, client is assumed to be authenticated */ + return TRUE; + } + + if ( SUCCESS != authmgrClientMacAddressGet(( enetMacAddr_t *)macAddr, &lIntIfNum)) + { + return FALSE; + } + + if (( SUCCESS != authmgrPhysicalPortGet(lIntIfNum, &physPort)) || + (physPort != intIfNum)) + { + return FALSE; + } + + if (( SUCCESS != authmgrClientAuthStatusGet(lIntIfNum, &status)) || + ( AUTHMGR_PORT_STATUS_AUTHORIZED != status)) + { + return FALSE; + } + + return TRUE; + +} + +/********************************************************************* +* @purpose Get the port acquire status. +* +* @param intIfNum @b{(input)} internal interface number +* +* @returns TRUE if yes +* @returns FALSE otherwise +* +* @comments +* +* @end +*********************************************************************/ + BOOL authmgrPortIsAcquired(uint32 intIfNum) +{ + authmgrPortCfg_t *pCfg; + BOOL val = FALSE; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FALSE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FALSE; + + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + val = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authmgrAcquire; + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + + return val; +} + +/********************************************************************* +* @purpose Get maximum number of times authentication +* may be reattempted by the user on the port. +* +* @param intIfNum @b{(input)} internal interface number +* @param *maxReq @b{(output)} maximum request value +* +* @returns SUCCESS +* @returns FAILURE +* +* @end +*********************************************************************/ +RC_t authmgrPortMaxAuthAttemptsGet(uint32 intIfNum, uint32 *maxAuthAttempts) +{ + authmgrPortCfg_t *pCfg = NULLPTR; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + { + return FAILURE; + } + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + { + return FAILURE; + } + + (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + *maxAuthAttempts = pCfg->maxAuthAttempts; + (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock); + return SUCCESS; +} + +/********************************************************************* +* @purpose Set maximum number of times authentication +* may be reattempted by the user on the port. +* +* @param intIfNum @b{(input)} internal interface number +* @param maxReq @b{(input)} maximum request value +* +* @returns SUCCESS +* @returns FAILURE +* @returns NOT_SUPPORTED +* +* @end +*********************************************************************/ +RC_t authmgrPortMaxAuthAttemptsSet(uint32 intIfNum, uint32 maxAuthAttempts) +{ + authmgrPortCfg_t *pCfg = NULLPTR; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + { + return FAILURE; + } + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + { + return FAILURE; + } + + if ((maxAuthAttempts < AUTHMGR_RADIUS_MAX_AUTH_ATTEMPTS_RANGE_MIN) || + (maxAuthAttempts > AUTHMGR_RADIUS_MAX_AUTH_ATTEMPTS_RANGE_MAX)) + { + return FAILURE; + } + + (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + pCfg->maxAuthAttempts = maxAuthAttempts; + (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock); + authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged = TRUE; + return authmgrIssueCmd(authmgrMaxAuthAttemptsSet, intIfNum, (void *)&maxAuthAttempts); + +} + +/********************************************************************* +* @purpose Check if the vlan is assigned to any client or port +* +* @param intIfNum @b{(input)} internal interface number +* @param vlanId @b{(input)} vlanId +* +* @returns TRUE +* @returns FALSE +* +* @comments +* +* @end +*********************************************************************/ + BOOL authmgrVlanAssignedCheck (uint32 intIfNum, uint32 vlanId) +{ + uint32 lIntIfNum; + authmgrLogicalPortInfo_t *logicalPortInfo; + + if (authmgrCB->globalInfo->authmgrCfg->adminMode != ENABLE) + { + return FALSE; + } + if (authmgrIsValidIntf(intIfNum) != TRUE) + { + return FALSE; + } + + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + /* iterate through all the logical interfaces of the physical interface */ + lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE; + while((logicalPortInfo=authmgrLogicalPortInfoGetNextNode(intIfNum, &lIntIfNum))!= NULLPTR) + { + if (0 != logicalPortInfo->key.keyNum) + { + if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled == TRUE && + (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode == AUTHMGR_PORT_AUTO)) + { + if ((AUTHMGR_VLAN_RADIUS == logicalPortInfo->client.vlanType) && + (logicalPortInfo->client.vlanId == vlanId)) + { + /* Vlan is assigned. Return TRUE. */ + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + return TRUE; + } + } + } + } + + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + + /* If we reach here, Vlan is not assigned. Return FALSE. */ + return FALSE; +} + + +/********************************************************************* +* @purpose Get port control mode +* +* @param intIfNum @b{(input)} internal interface number +* @param *portControl @b{(output)} port control mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrHostControlModeGet(uint32 intIfNum, AUTHMGR_HOST_CONTROL_t *hostMode) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + *hostMode = pCfg->hostMode; + return SUCCESS; +} + +/********************************************************************* +* @purpose Set port control mode +* +* @param intIfNum @b{(input)} internal interface number +* @param portControl @b{(input)} port control mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrHostControlModeSet(uint32 intIfNum, AUTHMGR_HOST_CONTROL_t hostMode) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + if (hostMode == pCfg->hostMode) + { + return SUCCESS; + } + + (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + pCfg->hostMode = hostMode; + (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock); + authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged = TRUE; + + return authmgrIssueCmd(authmgrMgmtHostControlModeSet, intIfNum, &hostMode); +} + +/********************************************************************* +* @purpose Set host control mode to default +* +* @param intIfNum @b{(input)} internal interface number +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrHostModeReset(uint32 intIfNum) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + + (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + pCfg->hostMode = FD_AUTHMGR_HOST_MODE; + (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock); + authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged = TRUE; + + return authmgrIssueCmd(authmgrMgmtHostControlModeSet, intIfNum, (void *)&pCfg->hostMode); +} + + +void debugUnLearnAddrCallback(uint32 intIfNum) +{ + enetMacAddr_t macAddr; + ushort16 vlanId; + + memset(&macAddr, 0, sizeof( enetMacAddr_t)); + + macAddr.addr[5] = 1; + vlanId = 1; + authmgrUnauthAddrCallBack(intIfNum, macAddr, vlanId); +} +/********************************************************************* + * @purpose chechks if method order config is valid. + * + * @param intIfNum @b{(input)} internal interface number + * @param index @b{(input)} position of the method or order + * @param method @b{(input)} authentication manager methods, + i.e.dot1x/mab/cp + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments Captive portal is always the last method. If any other method is tried + to configure after captive portal it should not allow. + * + * @end + *********************************************************************/ +RC_t authmgrPortAuthMethodOrderValidate(uint32 intIfNum, uint32 index, + AUTHMGR_METHOD_t method) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + /* either no command or + first method in the list . + Allow */ + if(( AUTHMGR_METHOD_NONE == method) || + (0 == index)) + { + return SUCCESS; + } + + else if ( AUTHMGR_METHOD_NONE == pCfg->methodList[index-1]) + { + return FAILURE; + } + return SUCCESS; +} + +/********************************************************************* +* @purpose Set auth mgr method or priority +* +* @param mode @b{(input)} order or priority +* @param index @b{(input)} position of the method or order +* @param method @b{(input)} authentication manager methods, + i.e.dot1x/mab/cp +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments Authentication restart timer value , for which the port will wait before, + retstarting authentication when all the authentication methods fail. +* +* @end +*********************************************************************/ +RC_t authmgrPortAuthMethodSet( AUTHMGR_METHOD_TYPE_t mode, uint32 intIfNum, + uint32 index, AUTHMGR_METHOD_t method) +{ + authmgrPortCfg_t *pCfg; + uint32 i = 0, j = 0; + RC_t rc = FAILURE; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + if (( AUTHMGR_TYPE_ORDER != mode) && ( AUTHMGR_TYPE_PRIORITY != mode)) + { + return FAILURE; + } + + if ((index < AUTHMGR_METHOD_START ) || (index > AUTHMGR_METHOD_MAX)) + { + return FAILURE; + } + + if (( AUTHMGR_METHOD_8021X != method) && + ( AUTHMGR_METHOD_MAB != method) && + ( AUTHMGR_METHOD_NONE != method)) + { + return FAILURE; + } + /* Now input always comes with order+1, reduce the order by 1 */ + j = index - 1; + + if ( AUTHMGR_TYPE_ORDER == mode) + { + /* Validate if the config of the order is correct */ + if ( FAILURE == authmgrPortAuthMethodOrderValidate(intIfNum, j, method)) + { + return ERROR; + } + + if (pCfg->methodList[j] == method) + { + return SUCCESS; + } + (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + + pCfg->methodList[j] = method; + for (i = index; i < AUTHMGR_METHOD_MAX; i++) + { + /* reset the configuration after the passed order + since we don't know if the configuration stops here or not */ + pCfg->methodList[i] = AUTHMGR_METHOD_NONE; + } + (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock); + } + else if ( AUTHMGR_TYPE_PRIORITY == mode) + { + if (pCfg->priorityList[j] == method) + { + return SUCCESS; + } + (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + pCfg->priorityList[j] = method; + for (i = index; i < AUTHMGR_METHOD_MAX; i++) + { + /* reset the configuration after the passed order + since we don't know if the configuration stops here or not */ + pCfg->priorityList[i] = AUTHMGR_METHOD_NONE; + } + } + (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock); + + authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged = TRUE; + + AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_API_CALLS,intIfNum,"%s:exiting-%s \n", + __FUNCTION__,authmgrIntfIfNameGet(intIfNum)); + if ( AUTHMGR_TYPE_ORDER == mode) + { + rc = authmgrIssueCmd(authmgrMethodOrderModify, intIfNum, NULL); + } + else if ( AUTHMGR_TYPE_PRIORITY == mode) + { + rc = authmgrIssueCmd(authmgrMethodPriorityModify, intIfNum, NULL); + } + return rc; +} + + +/********************************************************************* +* @purpose Get auth mgr method or priority +* +* @param mode @b{(input)} order or priority +* @param index @b{(input)} position of the method or order +* @param *method @b{(output)} authentication manager methods, + i.e.dot1x/mab/cp +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments Authentication restart timer value , for which the port will wait before, + retstarting authentication when all the authentication methods fail. +* +* @end +*********************************************************************/ +RC_t authmgrPortAuthMethodGet( AUTHMGR_METHOD_TYPE_t mode, uint32 intIfNum, + uint32 index, AUTHMGR_METHOD_t *method) +{ + authmgrPortCfg_t *pCfg; + uint32 j = 0; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + if (( AUTHMGR_TYPE_ORDER != mode) && ( AUTHMGR_TYPE_PRIORITY != mode)) + { + return FAILURE; + } + + if ((index < AUTHMGR_METHOD_START ) || (index > AUTHMGR_METHOD_MAX)) + { + return FAILURE; + } + + /* Now input always comes with order+1, reduce the order by 1 */ + j = index - 1; + + (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + if ( AUTHMGR_TYPE_ORDER == mode) + { + *method = pCfg->methodList[j]; + } + else if ( AUTHMGR_TYPE_PRIORITY == mode) + { + *method = pCfg->priorityList[j]; + } + + (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock); + + return SUCCESS; +} + + +/********************************************************************* + * @purpose Get the number of clients authenticated. + * + * @param intIfNum @b((input)) interface number +* @param mode @b{(input)} order or priority +* @param index @b{(input)} position of the method or order +* @param *method @b{(output)} authentication manager methods, + i.e.dot1x/mab/cp + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @notes + * @notes + * + * @end + * + *********************************************************************/ +RC_t authmgrEnabledMethodGet( AUTHMGR_METHOD_TYPE_t mode, uint32 intIfNum, + uint32 index, AUTHMGR_METHOD_t *method) +{ + uint32 j = 0; + + if ( TRUE != authmgrIsValidIntf(intIfNum)) + { + return FAILURE; + } + if (( AUTHMGR_TYPE_ORDER != mode) && ( AUTHMGR_TYPE_PRIORITY != mode)) + { + return FAILURE; + } + + if ((index < AUTHMGR_METHOD_START ) || (index > AUTHMGR_METHOD_MAX)) + { + return FAILURE; + } + + /* Now input always comes with order+1, reduce the order by 1 */ + j = index - 1; + + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + if ( AUTHMGR_TYPE_ORDER == mode) + { + *method = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[j]; + } + else if ( AUTHMGR_TYPE_PRIORITY == mode) + { + *method = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority[j]; + } + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + + return SUCCESS; +} + + +/********************************************************************* + * + * @purpose Register routines to be called by Auth Manager for various events. + * + * @param method @b((input)) authentication protocol + * @param *notify @b((input)) pointer to a routine to be invoked upon a respones. + * portCtrlFn: routine to set port control mode + * hostCtrlFn: routine to set port host mode + * eventNotifyFn: routine to handle Auth Mgr events + * enableGetFn: routine to get admin mode of the authentication protocol + * radiusEnableGetFn: routine to get whether RADIUS is configured as + * an authentication method + * + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + * +*********************************************************************/ +RC_t authmgrEventCallbackRegister( AUTHMGR_METHOD_t method, + RC_t(*portCtrlFn) (uint32 intIfNum, AUTHMGR_PORT_CONTROL_t portControl), + RC_t(*hostCtrlFn) (uint32 intIfNum, AUTHMGR_HOST_CONTROL_t hostMode), + RC_t(*eventNotifyFn) (uint32 intIfNum, uint32 event, enetMacAddr_t *macAddr), + RC_t(*enableGetFn) (uint32 intIfNum, uint32 *enabled), + RC_t(*radiusEnabledGetFn) (uint32 intIfNum, uint32 *enabled)) +{ + + AUTHMGR_IF_INVALID_METHOD_RETURN_LOG(method); + + if ((authmgrCB->globalInfo->authmgrCallbacks[method].method != AUTHMGR_METHOD_NONE) || + (method == AUTHMGR_METHOD_NONE)) + { + LOGF( LOG_SEVERITY_INFO, + "AUTHMGR: method ID %s already registered", authmgrMethodStringGet(authmgrCB->globalInfo->authmgrCallbacks[method].method)); + return FAILURE; + } + + authmgrCB->globalInfo->authmgrCallbacks[method].method = method; + authmgrCB->globalInfo->authmgrCallbacks[method].portCtrlFn = portCtrlFn; + authmgrCB->globalInfo->authmgrCallbacks[method].hostCtrlFn = hostCtrlFn; + authmgrCB->globalInfo->authmgrCallbacks[method].eventNotifyFn = eventNotifyFn; + authmgrCB->globalInfo->authmgrCallbacks[method].enableGetFn = enableGetFn; + authmgrCB->globalInfo->authmgrCallbacks[method].radiusEnabledGetFn = radiusEnabledGetFn; + + return SUCCESS; +} + +/********************************************************************* +* +* @purpose Deregister all routines to be called when a RADIUS response is +* received from a server for a previously submitted request. +* +* @param componentId @b{(input)} one of COMPONENT_IDS_t +* +* @returns SUCCESS +* +* @comments +* +* @end +* +*********************************************************************/ +RC_t authmgrEventCallbackDeregister( AUTHMGR_METHOD_t method) +{ + AUTHMGR_IF_INVALID_METHOD_RETURN_LOG(method); + + if ((authmgrCB->globalInfo->authmgrCallbacks[method].method == AUTHMGR_METHOD_NONE) || + (method != authmgrCB->globalInfo->authmgrCallbacks[method].method)) + { + LOGF( LOG_SEVERITY_INFO, + "AUTHMGR: fail to de reigister method ID %s, existing method is %s", + authmgrMethodStringGet(method), authmgrMethodStringGet(authmgrCB->globalInfo->authmgrCallbacks[method].method)); + return FAILURE; + } + + memset(&authmgrCB->globalInfo->authmgrCallbacks[method], 0, sizeof(authmgrMethodCallbackNotifyMap_t)); + + return SUCCESS; +} + +/********************************************************************* +* @purpose Get the port autherization status. +* +* @param intIfNum @b{(input)} internal interface number +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrPortIsAuthorized(uint32 intIfNum) +{ + authmgrPortCfg_t *pCfg; + AUTHMGR_PORT_STATUS_t portStatus; + + if (authmgrIsValidIntf(intIfNum) == TRUE) + { + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + { + return SUCCESS; + } + if ((authmgrPortAuthControlledPortStatusGet(intIfNum, &portStatus) != SUCCESS) || + (portStatus != AUTHMGR_PORT_STATUS_AUTHORIZED)) + { + return FAILURE; + } + } + return SUCCESS; +} + + +/********************************************************************* + * @purpose Get the Authentication Method string for given method type + * + * @param method @b{(input)} Authentication Method type + * + * @returns Method name String for given input method + * + * @comments none + * + * @end + *********************************************************************/ + uchar8 *authmgrMethodTypeToName( AUTHMGR_METHOD_t method) +{ + switch(method) + { + case AUTHMGR_METHOD_NONE: + return ( uchar8 *)"Auth Method Undefined"; //shiva check with amit + + case AUTHMGR_METHOD_8021X: + return ( uchar8 *)"Dot1X"; + + case AUTHMGR_METHOD_MAB: + return ( uchar8 *)"MAB"; + + default: + break; + } + return ( uchar8 *)"Invalid Auth Method"; +} + + +/********************************************************************* + * @purpose function to get max users + * + * @param hostMode @b{(input)) hostmode + * @param *appyPolicy @b{(input)) bool value + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrMaxUsersGet(uint32 intIfNum, uint32 *maxUsers) +{ + RC_t rc = SUCCESS; + authmgrPortCfg_t *pCfg; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + switch (pCfg->hostMode) + { + case AUTHMGR_MULTI_HOST_MODE: + *maxUsers = AUTHMGR_MULTI_HOST_MODE_MAX_USERS; + break; + + case AUTHMGR_SINGLE_AUTH_MODE: + *maxUsers = AUTHMGR_SINGLE_AUTH_MODE_MAX_USERS; + break; + + case AUTHMGR_MULTI_AUTH_MODE: + *maxUsers = pCfg->maxUsers; + break; + + default: + rc = FAILURE; + } + (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock); + + return rc; +} + +/********************************************************************* + * @purpose Verify specified config interface index is valid + * + * @param intIfNum @b{(input)} Internal interface number + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrIntfIndexGet(uint32 intIfNum) +{ + /* the global ALL_INTERFACES value is not valid in context of this API */ + if (intIfNum == ALL_INTERFACES) + return FAILURE; + + if ( TRUE != authmgrIsValidIntf(intIfNum)) + return FAILURE; + + return SUCCESS; +} + + +/********************************************************************* + * @purpose Determine next sequential auth Mgr config interface index + * + * @param intIfNum @b{(input)} Internal interface number to begin search + * @param *pNext @b{(output)} Ptr to next internal interface number + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrIntfIndexGetNext(uint32 intIfNum, uint32 *pNext) +{ + RC_t rc = FAILURE; + uint32 nextIntIfNum = intIfNum; + + while ( SUCCESS == nimNextValidIntfNumberByType( PHYSICAL_INTF, nextIntIfNum, &nextIntIfNum)) + { + if ( TRUE == authmgrIsValidIntf(nextIntIfNum)) + { + /* Next authmgr valid interface found. */ + *pNext = nextIntIfNum; + rc = SUCCESS; + break; + } + } + + return rc; +} + +/********************************************************************* + * @purpose Verify specified index exists + * + * @param index @b{(input)} index of the config array + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments Auth Mgr expects the index to come to the api with incremented by 1. + In the API we reduce the index by 1 as the data structure is array. + * + * @end + *********************************************************************/ +RC_t authmgrMethodIndexGet(uint32 index) +{ + if ((index >= AUTHMGR_METHOD_START) && + (index <= AUTHMGR_METHOD_MAX)) + return SUCCESS; + + return FAILURE; +} + +/********************************************************************* + * @purpose Determine next sequential index + * + * @param index @b{(input)} index of the config array + * @param *pNext @b{(output)} Ptr to next priority + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrMethodIndexGetNext(uint32 index, uint32 *pNext) +{ + if (index > AUTHMGR_METHOD_MAX) + return FAILURE; + + if (pNext == NULLPTR) + return FAILURE; + + if (index < AUTHMGR_METHOD_START) + *pNext = AUTHMGR_METHOD_START; + else + *pNext = index + 1; + + return SUCCESS; +} + +/********************************************************************* + * @purpose Determine next sequential auth Mgr config interface index + * + * @param intIfNum @b{(input)} Internal interface number to begin search + * @param *pNext @b{(output)} Ptr to next internal interface number + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrEntryIndexGet(uint32 intIfNum, uint32 index) +{ + + if (( SUCCESS == authmgrIntfIndexGet(intIfNum))&& + ( SUCCESS == authmgrMethodIndexGet(index))) + { + return SUCCESS; + } + + return FAILURE; +} +/********************************************************************* + * @purpose Determine next sequential auth Mgr config interface index + * + * @param intIfNum @b{(input)} Internal interface number to begin search + * @param *pNext @b{(output)} Ptr to next internal interface number + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrEntryIndexGetNext(uint32 intIfNum, uint32 *pNextNum, + uint32 index, uint32 *pNextIndex) +{ + RC_t rc = FAILURE; + + if ( SUCCESS == authmgrIntfIndexGet(intIfNum)) + { + rc = authmgrMethodIndexGetNext(index,pNextIndex); + } + if ( SUCCESS != rc) + { + if ( SUCCESS == authmgrIntfIndexGetNext(intIfNum, pNextNum)) + { + rc = authmgrMethodIndexGetNext(0,pNextIndex); + } + } + return rc; + +} +/********************************************************************* + * @purpose chechs if method is configured in the order. + * + * @param intIfNum @b{(input)} internal interface number + * @param method @b{(input)} authentication method which is being checked, + i.e.dot1x/mab/cp + * + * @returns FAILURE_ + * @returns SUCCESS + * + * @comments This API should only be called from the methods DOT1X and captive portal + applications only. + * + * @end + *********************************************************************/ + +RC_t authmgrIsMethodConfigured(uint32 intIfNum, AUTHMGR_METHOD_t method, uint32 *entryIndex) +{ + authmgrPortCfg_t *pCfg; + uint32 methodIndex = 0xFFFF; + uint32 i; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + for (i = AUTHMGR_METHOD_MIN; i < AUTHMGR_METHOD_MAX; i++) + { + if(method == pCfg->methodList[i]) + { + methodIndex = i; + break; + } + } + + if (methodIndex >= AUTHMGR_METHOD_MAX) + { + return FAILURE; + } + *entryIndex = methodIndex; + return SUCCESS; +} + +/********************************************************************* + * @purpose chechs if method is Enabled. + * + * @param intIfNum @b{(input)} internal interface number + * @param method @b{(input)} authentication method which is being checked, + i.e.dot1x/mab/cp + * @param *entryIndex @b{(outout)}reference to the entry index + * + * @returns FALSE + * @returns TRUE + * + * @comments This API should only be called from the methods DOT1X and captive portal + applications only. + * + * @end + *********************************************************************/ + + BOOL authmgrIsMethodEnabled(uint32 intIfNum, AUTHMGR_METHOD_t method, uint32 *entryIndex) +{ + uint32 methodIndex = 0xFF; + uint32 i; + + if ( TRUE != authmgrIsValidIntf(intIfNum)) + return FALSE; + + + for (i = AUTHMGR_METHOD_MIN; i < AUTHMGR_METHOD_MAX; i++) + { + if(method == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[i]) + { + methodIndex = i; + break; + } + } + + if (methodIndex >= AUTHMGR_METHOD_MAX) + { + return FALSE; + } + *entryIndex = methodIndex; + return TRUE; +} + +/********************************************************************* +* @purpose Returns the client auth status for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param status @b((output)) authenticated status +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortClientAuthStatusGet(uint32 lIntIfNum, AUTHMGR_PORT_STATUS_t *status) +{ + authmgrLogicalPortInfo_t *logicalPortInfo; + logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum); + + authmgrLogicalPortInfoTakeLock(); + if ( NULLPTR == logicalPortInfo) + { + authmgrLogicalPortInfoGiveLock(); + return FAILURE; + } + + *status = logicalPortInfo->client.logicalPortStatus; + authmgrLogicalPortInfoGiveLock(); + + return SUCCESS; +} + +/********************************************************************* +* @purpose Returns the client auth state for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param state @b((output)) authenticating state +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortClientAuthStateGet(uint32 lIntIfNum, AUTHMGR_STATES_t *state) +{ + authmgrLogicalPortInfo_t *logicalPortInfo; + logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum); + + authmgrLogicalPortInfoTakeLock(); + if ( NULLPTR == logicalPortInfo) + { + authmgrLogicalPortInfoGiveLock(); + return FAILURE; + } + + *state = logicalPortInfo->protocol.authState; + authmgrLogicalPortInfoGiveLock(); + + return SUCCESS; +} + +/********************************************************************* +* @purpose Returns the client reauth state for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param state @b((output)) reauthenticating state +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortClientReauthStateGet(uint32 lIntIfNum, BOOL *state) +{ + authmgrLogicalPortInfo_t *logicalPortInfo; + logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum); + + authmgrLogicalPortInfoTakeLock(); + if ( NULLPTR == logicalPortInfo) + { + authmgrLogicalPortInfoGiveLock(); + return FAILURE; + } + + *state = logicalPortInfo->protocol.reauth; + authmgrLogicalPortInfoGiveLock(); + + return SUCCESS; +} + +/********************************************************************* +* @purpose Returns the client authenticated Method for the logical interface +* +* @param lIntIfNum @b((input)) the specified interface +* @param method @b((output)) authenticating method +* +* @returns SUCCESS if success +* @returns FAILURE if other failure +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrLogicalPortClientAuthenticatedMethodGet(uint32 lIntIfNum, + AUTHMGR_METHOD_t *method) +{ + authmgrLogicalPortInfo_t *logicalPortInfo; + logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum); + + authmgrLogicalPortInfoTakeLock(); + if ( NULLPTR == logicalPortInfo) + { + authmgrLogicalPortInfoGiveLock(); + return FAILURE; + } + + *method = logicalPortInfo->client.authenticatedMethod; + authmgrLogicalPortInfoGiveLock(); + + return SUCCESS; +} +/********************************************************************* + * @purpose gets the authenticated method or currently running authenticated method for the client + * + * @param intIfNum @b{(input)} internal interface number + * @param mac_addr @b{(input)}client's mac address + * @param *method @b{(input)}reference to the method + * + * @returns FALSE_ + * @returns TRUE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrClientAuthenticatedMethodGet(uint32 intIfNum, enetMacAddr_t macAddr, AUTHMGR_METHOD_t *method ) +{ + uint32 lIntIfNum; + enetMacAddr_t tempMac; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + memset (tempMac.addr, 0, ENET_MAC_ADDR_LEN); + + if (0 == memcmp(tempMac.addr, macAddr.addr, ENET_MAC_ADDR_LEN)) + { + return FAILURE; + } + /* first find the logical node for this mac address */ + if ( SUCCESS != authmgrMacAddrInfoFind(&macAddr, &lIntIfNum)) + { + return FAILURE; + } + + if ( SUCCESS != authmgrLogicalPortClientAuthenticatedMethodGet(lIntIfNum, method)) + { + return FAILURE; + } + return SUCCESS; +} + + +/********************************************************************* +* @purpose Get number of attempts for the method +* +* @param intIfNum @b{(input)} internal interface number +* @param method @b{(input)} method for which the attempts are requested +* @param *numAttempts @b{(output)} number of attempts +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrPortAttemptsGet(uint32 intIfNum, AUTHMGR_METHOD_t method, uint32 *numAttempts) +{ + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + switch (method) + { + case AUTHMGR_METHOD_8021X: + *numAttempts = authmgrCB->globalInfo->authmgrPortStats[intIfNum].dot1x.authEntersAuthenticating; + break; + case AUTHMGR_METHOD_MAB: + *numAttempts = authmgrCB->globalInfo->authmgrPortStats[intIfNum].mab.authEntersAuthenticating; + break; + default: + break; + } + return SUCCESS; +} + +/********************************************************************* +* @purpose Get number of failed attempts for the method +* +* @param intIfNum @b{(input)} internal interface number +* @param method @b{(input)} method for which the attempts are requested +* @param *numAttempts @b{(output)} number of attempts +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrPortFailedAttemptsGet(uint32 intIfNum, AUTHMGR_METHOD_t method, uint32 *numAttempts) +{ + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + switch (method) + { + case AUTHMGR_METHOD_8021X: + *numAttempts = authmgrCB->globalInfo->authmgrPortStats[intIfNum].dot1x.authFailure; + *numAttempts = *numAttempts + authmgrCB->globalInfo->authmgrPortStats[intIfNum].dot1x.authTimeout; + break; + case AUTHMGR_METHOD_MAB: + *numAttempts = authmgrCB->globalInfo->authmgrPortStats[intIfNum].mab.authFailure; + *numAttempts = *numAttempts + authmgrCB->globalInfo->authmgrPortStats[intIfNum].mab.authTimeout; + break; + default: + break; + } + return SUCCESS; +} + + +/********************************************************************* + * @purpose Get the number of clients authenticated. + * + * @param intIfNum @b((input)) interface number + * @param pCount @b((output)) ptr to the number of clients + * + * @returns SUCCESS + * @returns FAILURE + * + * @comments + * + * @notes + * @notes + * + * @end + * + *********************************************************************/ +RC_t authmgrNumClientsGet(uint32 intIfNum, uint32 *pCount) +{ + + if ( TRUE != authmgrIsValidIntf(intIfNum)) + { + return FAILURE; + } + + if(pCount == NULLPTR) + { + return FAILURE; + } + + *pCount = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].numUsers; + return SUCCESS; +} + +/********************************************************************* +* +* @purpose Update the status and other information of the client + from the authentication method to Auth Mgr. +* +* @param uint32 intIfNum @b((input)) Internal interface number +* @param method @b{(input)} authentication manager methods, + i.e.dot1x/mab/cp +* @param status @b{(input)} authentication status, + i.e start/success/fail/timeout. +* @param clientParams @b{(input)} client status event related information +* +* @returns SUCCESS +* @returns FAILURE +* +* @notes This API is called from DOT1X and CP when they are starting the authentication + and also when the method is success/failure/timedout +* +* @end +*********************************************************************/ +RC_t authmgrPortClientAuthStatusUpdate(uint32 intIfNum, + AUTHMGR_METHOD_t method, + AUTHMGR_STATUS_t status, + void *clientParams) +{ + authmgrPortCfg_t *pCfg; + authmgrAuthRespParams_t parms; + authmgrClientStatusInfo_t *temp = NULLPTR; + RC_t rc = SUCCESS; + + + if ( ALL_INTERFACES != intIfNum) + { + /* If it is not a valid interface drop the request */ + if ( authmgrIsValidIntf( intIfNum ) != TRUE ) + { + return FAILURE; + } + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + { + return FAILURE; + } + } + + AUTHMGR_IF_NULLPTR_RETURN_LOG(clientParams); + + temp = (authmgrClientStatusInfo_t *)clientParams; + + parms.status = status; + parms.method = method; + + parms.clientParams = *temp; + rc = authmgrIssueCmd(authmgrAuthMethodCallbackEvent, intIfNum, (void *)&parms); + + AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0, + "Updated PAC on user %02X:%02X:%02X:%02X:%02X:%02X with Status %s method %s, rc %d", + (unsigned int)parms.clientParams.info.authInfo.macAddr.addr[0], + (unsigned int)parms.clientParams.info.authInfo.macAddr.addr[1], + (unsigned int)parms.clientParams.info.authInfo.macAddr.addr[2], + (unsigned int)parms.clientParams.info.authInfo.macAddr.addr[3], + (unsigned int)parms.clientParams.info.authInfo.macAddr.addr[4], + (unsigned int)parms.clientParams.info.authInfo.macAddr.addr[5], + authmgrMethodStatusStringGet(parms.status), authmgrMethodStringGet(parms.method), rc); + /* send the message to the authmgr component */ + AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_API_CALLS,intIfNum,"%s:exiting-%s \n", + __FUNCTION__,authmgrIntfIfNameGet(intIfNum)); + + return rc; +} + +/********************************************************************* +* +* @purpose Set the port capabilities +* +* @param intIfNum @b{(input)} interface number +* @param paeCapabilities @b{(input)} capabiities (authenticator or supplicant) +* +* @returns SUCCESS +* +* @comments +* +* @end +* +*********************************************************************/ +RC_t authmgrDot1xCapabilitiesUpdate(uint32 intIfNum, uint32 paeCapabilities) +{ + authmgrPortCfg_t *pCfg; + + /* If it is not a valid interface drop the request */ + if ( authmgrIsValidIntf( intIfNum ) != TRUE ) + { + return FAILURE; + } + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + { + return FAILURE; + } + + if (paeCapabilities == pCfg->paeCapabilities) +{ + return SUCCESS; +} + + (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock, WAIT_FOREVER); + pCfg->paeCapabilities = paeCapabilities; + (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock); + + /* send the message to the authmgr component */ + AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_API_CALLS,intIfNum,"%s:exiting-%s \n", + __FUNCTION__,authmgrIntfIfNameGet(intIfNum)); + return authmgrIssueCmd(authmgrPaeCapabilitiesEvent, intIfNum, &paeCapabilities); + + +} + +/********************************************************************* +* @purpose Set administrative mode setting for authmgr +* +* @param adminMode @b{(input)} authmgr admin mode +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrAdminModeSet(uint32 adminMode) +{ + + if (authmgrCB->globalInfo->authmgrCfg->adminMode == adminMode) + return SUCCESS; + + authmgrCB->globalInfo->authmgrCfg->adminMode = ENABLE; + + authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged = TRUE; + + return SUCCESS; +} + +/********************************************************************* +* @purpose Get administrative mode setting for authmgr +* +* @param *adminMode @b{(output)} authmgr admin mode +* +* @returns SUCCESS +* +* @comments +* +* @end +*********************************************************************/ +RC_t authmgrAdminModeGet(uint32 *adminMode) +{ + *adminMode = authmgrCB->globalInfo->authmgrCfg->adminMode; + + return SUCCESS; +} + + +/********************************************************************* +* @purpose Get number of authenticated clients on a port +* +* @param intIfNum @b{(input)} internal interface number +* @param *count @b{(output)} number of authenticated clients +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments none +* +* @end +*********************************************************************/ +RC_t authmgrPortAuthCountGet(uint32 intIfNum, uint32 *count) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + (void)osapiReadLockTake(authmgrCB->authmgrRWLock, WAIT_FOREVER); + *count = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authCount; + (void)osapiReadLockGive(authmgrCB->authmgrRWLock); + return SUCCESS; +} + +/********************************************************************* +* @purpose Set inactivity period value +* +* @param intIfNum @b{(input)} internal interface number +* @param inActivityPeriod @b{(input)} inActivity period +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments The inactivity period is the time period for which the system will +*, wait. At the expiry of this timer, the authenticated client is removed, if inactive. +* +* @end +*********************************************************************/ +RC_t authmgrPortAuthInactiveTimerSet(uint32 intIfNum, uint32 inActivityPeriod) +{ + authmgrPortCfg_t *pCfg; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + + if (inActivityPeriod == pCfg->inActivityPeriod) + return SUCCESS; + + (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock); + pCfg->inActivityPeriod = inActivityPeriod; + (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock); + authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged = TRUE; + + return authmgrIssueCmd(authmgrMgmtPortInactivePeriodSet, intIfNum, &inActivityPeriod); +} + +/********************************************************************* +* @purpose Reset port information +* +* @param intIfNum @b{(input)} internal interface number +* @param initialize @b{(input)} initialize value +* +* @returns SUCCESS +* @returns FAILURE +* +* @comments This value is set to TRUE by management in order to force +* initialization of a port. It is re-set to FALSE after +* initialization has completed. +* +* @end +*********************************************************************/ +RC_t authmgrPortInfoReset(uint32 intIfNum, BOOL initialize) +{ + authmgrPortCfg_t *pCfg; + RC_t rc = SUCCESS; + + if (authmgrIsValidIntf(intIfNum) != TRUE) + return FAILURE; + + if (authmgrIntfIsConfigurable(intIfNum, &pCfg) != TRUE) + return FAILURE; + + /* Set the config values to default */ + authmgrBuildDefaultIntfConfigData( NULLPTR, pCfg); + + if (initialize == TRUE) + rc = authmgrIssueCmd(authmgrCtlPortInfoReset, intIfNum, &initialize); + + return rc; +} + +/********************************************************************* + * @purpose Cleans up a client session + * + * @param mac_addr @b{(input)}client's mac address + * + * @returns FALSE_ + * @returns TRUE + * + * @comments + * + * @end + *********************************************************************/ +RC_t authmgrClientDelete( enetMacAddr_t macAddr) +{ + uint32 lIntIfNum = NULL; + + if ( SUCCESS == authmgrClientMacAddressGet(( enetMacAddr_t *)&macAddr, &lIntIfNum)) + { + return authmgrIssueCmd(authmgrClientCleanup, lIntIfNum, NULLPTR); + + } + else + { + AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_API_CALLS, 0, + "%s: Device not found in Auth Mgr db \n", + __FUNCTION__); + } + return SUCCESS; +} + diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid.c b/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid.c new file mode 100755 index 000000000000..cb43c2ee4989 --- /dev/null +++ b/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid.c @@ -0,0 +1,69 @@ +/* + * Copyright 2024 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "pacinfra_common.h" +#include "auth_mgr_sid.h" +#include "auth_mgr_sid_const.h" + + +/********************************************************************* +* @purpose Get thread default Stack Size +* +* @param void +* +* @returns CNFGR_MSG_HANDLER_THREAD_STACK_SIZE +* +* @comments none +* +* @end +*********************************************************************/ + int32 authmgrSidDefaultStackSize() +{ + return ( FD_CNFGR_AUTHMGR_DEFAULT_STACK_SIZE ); +} + +/********************************************************************* +* @purpose Get thread default task slice +* +* @param void +* +* @returns CNFGR_MSG_HANDLER_THREAD_STACK_SIZE +* +* @comments none +* +* @end +*********************************************************************/ + int32 authmgrSidDefaultTaskSlice() +{ + return ( FD_CNFGR_AUTHMGR_DEFAULT_TASK_SLICE ); +} + +/********************************************************************* +* @purpose Get thread default task priority +* +* @param void +* +* @returns CNFGR_MSG_HANDLER_THREAD_STACK_SIZE +* +* @comments none +* +* @end +*********************************************************************/ + int32 authmgrSidDefaultTaskPriority() +{ + return ( FD_CNFGR_AUTHMGR_DEFAULT_TASK_PRI ); +} + diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid.h b/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid.h new file mode 100755 index 000000000000..9663bc63fac2 --- /dev/null +++ b/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid.h @@ -0,0 +1,63 @@ +/* + * Copyright 2024 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef INCLUDE_AUTHMGR_SID_H +#define INCLUDE_AUTHMGR_SID_H + +#include "commdefs.h" +#include "datatypes.h" + +/********************************************************************* +* @purpose Get thread default Stack Size +* +* @param void +* +* @returns CNFGR_MSG_HANDLER_THREAD_STACK_SIZE +* +* @comments none +* +* @end +*********************************************************************/ + int32 authmgrSidDefaultStackSize(); + +/********************************************************************* +* @purpose Get thread default task slice +* +* @param void +* +* @returns CNFGR_MSG_HANDLER_THREAD_STACK_SIZE +* +* @comments none +* +* @end +*********************************************************************/ + int32 authmgrSidDefaultTaskSlice(); + +/********************************************************************* +* @purpose Get thread default task priority +* +* @param void +* +* @returns CNFGR_MSG_HANDLER_THREAD_STACK_SIZE +* +* @comments none +* +* @end +*********************************************************************/ + int32 authmgrSidDefaultTaskPriority(); + + +#endif /* INCLUDE_AUTHMGR_SID_H */ diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid_const.h b/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid_const.h new file mode 100755 index 000000000000..1b4e239f2094 --- /dev/null +++ b/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid_const.h @@ -0,0 +1,47 @@ +/* + * Copyright 2024 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef INCLUDE_AUTHMGR_SID_CONST_H +#define INCLUDE_AUTHMGR_SID_CONST_H + +/* USE C Declarations */ +#ifdef __cplusplus +extern "C" { +#endif + +#include "auth_mgr_common.h" + + +/* +*********************************************************************** +* CONSTANTS +*********************************************************************** +*/ + +enum +{ + FD_CNFGR_AUTHMGR_DEFAULT_STACK_SIZE = DEFAULT_STACK_SIZE, + FD_CNFGR_AUTHMGR_DEFAULT_TASK_SLICE = DEFAULT_TASK_SLICE, + FD_CNFGR_AUTHMGR_DEFAULT_TASK_PRI = TASK_PRIORITY_LEVEL( DEFAULT_TASK_PRIORITY) +}; + +/* USE C Declarations */ +#ifdef __cplusplus +} +#endif + +#endif /* INCLUDE_AUTHMGR_SID_CONST_H */ + diff --git a/src/sonic-pac/autogen.sh b/src/sonic-pac/autogen.sh new file mode 100755 index 000000000000..c8d0bbe4a251 --- /dev/null +++ b/src/sonic-pac/autogen.sh @@ -0,0 +1,6 @@ +#!/bin/bash + +libtoolize --force --copy && +autoreconf --force --install -I m4 +rm -Rf autom4te.cache + diff --git a/src/sonic-pac/configure.ac b/src/sonic-pac/configure.ac new file mode 100644 index 000000000000..5c51b9d0a892 --- /dev/null +++ b/src/sonic-pac/configure.ac @@ -0,0 +1,77 @@ +AC_INIT([sonic-pac],[1.0.0]) +AC_CONFIG_SRCDIR([]) +AC_CONFIG_AUX_DIR(config) +AM_CONFIG_HEADER(config.h) +AM_INIT_AUTOMAKE([foreign subdir-objects]) +AC_LANG_C +AC_LANG([C++]) +AC_PROG_CC +AC_PROG_CXX +AC_PROG_LIBTOOL +AC_HEADER_STDC + +AC_CHECK_LIB([hiredis], [redisConnect],, + AC_MSG_ERROR([libhiredis is not installed.])) + +#AC_CHECK_LIB([nl-genl-3], [genl_connect]) + +AC_ARG_ENABLE(debug, +[ --enable-debug Compile with debugging flags], +[case "${enableval}" in + yes) debug=true ;; + no) debug=false ;; + *) AC_MSG_ERROR(bad value ${enableval} for --enable-debug) ;; +esac],[debug=false]) +AM_CONDITIONAL(DEBUG, test x$debug = xtrue) + +CFLAGS_COMMON="-std=c++11 -Wall -fPIC -Wno-write-strings -I/usr/include/libnl3 -I/usr/include/swss -I/usr/include/security" + +CFLAGS_COMMON+=" -Werror" +CFLAGS_COMMON+=" -Wno-reorder" +#CFLAGS_COMMON+=" -Wno-pointer-sign" +CFLAGS_COMMON+=" -Wno-unused-but-set-variable" +CFLAGS_COMMON+=" -Wcast-align" +CFLAGS_COMMON+=" -Wcast-qual" +CFLAGS_COMMON+=" -Wdisabled-optimization" +CFLAGS_COMMON+=" -Wextra" +CFLAGS_COMMON+=" -Wfloat-equal" +CFLAGS_COMMON+=" -Wimport" +CFLAGS_COMMON+=" -Winit-self" +CFLAGS_COMMON+=" -Winvalid-pch" +CFLAGS_COMMON+=" -Wlong-long" +CFLAGS_COMMON+=" -Wmissing-field-initializers" +CFLAGS_COMMON+=" -Wno-aggregate-return" +CFLAGS_COMMON+=" -Wno-padded" +CFLAGS_COMMON+=" -Wno-switch-enum" +CFLAGS_COMMON+=" -Wno-unused-parameter" +CFLAGS_COMMON+=" -Wpacked" +CFLAGS_COMMON+=" -Wpointer-arith" +CFLAGS_COMMON+=" -Wredundant-decls" +CFLAGS_COMMON+=" -Wstack-protector" +CFLAGS_COMMON+=" -Wstrict-aliasing=3" +CFLAGS_COMMON+=" -Wswitch" +CFLAGS_COMMON+=" -Wswitch-default" +CFLAGS_COMMON+=" -Wunreachable-code" +CFLAGS_COMMON+=" -Wunused" +CFLAGS_COMMON+=" -Wvariadic-macros" +CFLAGS_COMMON+=" -Wno-switch-default" +CFLAGS_COMMON+=" -Wno-long-long" +CFLAGS_COMMON+=" -Wno-redundant-decls" +#CFLAGS_COMMON+=" -Wno-misleading-indentation" +CFLAGS_COMMON+=" -save-temps" + +AC_SUBST(CFLAGS_COMMON) + +AC_CONFIG_FILES([ + fpinfra/Makefile + paccfg/Makefile + pacoper/Makefile + authmgr/Makefile + pacmgr/Makefile + hostapdmgr/Makefile + mab/Makefile + mabmgr/Makefile + Makefile +]) + +AC_OUTPUT diff --git a/src/sonic-pac/fpinfra/sim/sim.cpp b/src/sonic-pac/fpinfra/sim/sim.cpp new file mode 100644 index 000000000000..724e8df51a41 --- /dev/null +++ b/src/sonic-pac/fpinfra/sim/sim.cpp @@ -0,0 +1,122 @@ +/* + * Copyright 2024 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include "fpnim.h" + +extern "C" { +#include "datatypes.h" +#include "system_exports.h" +#include "simapi.h" +#include "osapi.h" +} + +/********************************************************************* +* @purpose Get the Unit's System Mac Address Type +* +* @param none +* +* @returns sysMacType System Mac Address Type +* +* @comments +* +* @end +*********************************************************************/ +uint32 simGetSystemIPMacType(void) +{ + return( SYSMAC_BIA); +} + +/********************************************************************* +* @purpose Get the Unit's System Burned in Mac Address +* +* @param *sysBIA @b{(output)} pointer to system burned in mac address +* Length MAC_ADDR_LEN +* +* @returns none +* +* @comments +* +* @end +*********************************************************************/ +void simGetSystemIPBurnedInMac( uchar8 *sysBIA) +{ + FpNim * nim = FpNim::getInstance(); + if(nim) + { + nim->getSystemMac(sysBIA); + } +} + + +/********************************************************************* +* @purpose Get the Unit's System Locally Administered Mac Address +* +* @param *sysLAA @b{(output)} pointer to system local admin mac address +* +* @returns none +* +* @comments +* +* @end +*********************************************************************/ +void simGetSystemIPLocalAdminMac( uchar8 *sysLAA) +{ + simGetSystemIPBurnedInMac(sysLAA); +} + +/********************************************************************* +* +* @purpose Get the stack up time +* +* @param none +* +* @returns stack up time in seconds +* +* @comments Stack up time is the time since the stack performed a cold +* restart. Stack up time does not reset on a warm restart. +* +* @end +* +*********************************************************************/ +uint32 simSystemUpTimeGet(void) +{ + return osapiUpTimeRaw(); +} + +/********************************************************************** +* @purpose Adjusts current time for timezone and summer time +* +* @returns Adjusted time +* +* +* @end +*********************************************************************/ +uint32 simAdjustedTimeGet() +{ + struct timespec tp; + int rc; + + rc = clock_gettime(CLOCK_REALTIME, &tp); + if (rc < 0) + { + return 0; + } + return(tp.tv_sec); +} + + + diff --git a/src/sonic-pac/fpinfra/sysapi/sysapi.c b/src/sonic-pac/fpinfra/sysapi/sysapi.c new file mode 100644 index 000000000000..642a9e62ca53 --- /dev/null +++ b/src/sonic-pac/fpinfra/sysapi/sysapi.c @@ -0,0 +1,137 @@ +/* + * Copyright 2024 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include "pacinfra_common.h" +#include "product.h" +#include "resources.h" +#include "osapi.h" +#include "sysapi.h" +#include "defaultconfig.h" + +static void * sysapiTimerTaskID = 0; + +/************************************* + * Mbuf Queue declarations + *************************************/ +void **pMbufQTop; /* top of queue */ +void **pMbufQBot; /* bottom of queue */ +void **MbufQHead; +void **MbufQTail; +uint32 MbufsFree; +uint32 MbufsRxUsed; +uint32 MbufsMaxFree; +void *pMbufPool; + + +/************************************************************************** + * + * @purpose Task that creates the application timer function + * + * @param none + * + * @returns none. + * + * @notes If the task is already created, just return. + * + * @end + * + *************************************************************************/ +void sysapiTimerTaskStart(void) +{ + if ( sysapiTimerTaskID != 0 ) + { + return; + } + sysapiTimerTaskID = osapiTaskCreate( "osapiTimer", + (void *)osapiTimerHandler, + 0, + NULLPTR, + DEFAULT_STACK_SIZE, + MEDIUM_TASK_PRIORITY, + DEFAULT_TASK_SLICE); + + /* Wait for osapiTimer task to finish initialization.*/ + if (osapiWaitForTaskInit( OSAPI_TIMER_TASK_SYNC, WAIT_FOREVER) != SUCCESS) + { + //SYSAPI_PRINTF(SYSAPI_LOGGING_ALWAYS, "In routine %s line %d, osapiWaitForTaskInit failed\n", + // __FUNCTION__, __LINE__); + //LOG_ERROR(0); + } + return; +} + +/************************************************************************** + * @purpose Initialize the sysapi component + * + * @param none + * + * @returns SUCCESS + * @returns ERROR + * + * @notes + * + * @end + * + *************************************************************************/ +RC_t sysapiSystemInit(void) +{ + int32 i; + uint32 temp32; + uint32 phy_size = 0; + uint32 mtu_size = FD_NIM_DEFAULT_MTU_SIZE; + + /* initialize system timers */ + sysapiTimerTaskStart(); + + /* Reserve extra space for control overhead. */ + phy_size += (sizeof(SYSAPI_NET_MBUF_HEADER_t) + NET_MBUF_START_OFFSET + 64); + + temp32 = phy_size + mtu_size + SYSAPI_PKT_BUF_ALIGN_LEN; + + pMbufPool = osapiMalloc ( SIM_COMPONENT_ID, MAX_NETWORK_BUFF_PER_BOX * ( temp32 ) ); + if ( pMbufPool == NULLPTR ) + return( ERROR); + + + /******************************************************** + * Allocate the "mbuf" Queue. Each entry is a 32 bit ptr + *********************************************************/ + pMbufQTop = ( void ** )osapiMalloc ( SIM_COMPONENT_ID, MAX_NETWORK_BUFF_PER_BOX * sizeof (void *)); + if ( pMbufQTop == NULLPTR ) + return( ERROR); + + /*************************************************** + * Initialize the "mbuf" Queue and counter. + ****************************************************/ + MbufQHead = pMbufQTop; + MbufQTail = pMbufQTop; + MbufsMaxFree = MAX_NETWORK_BUFF_PER_BOX; + MbufsFree = MbufsMaxFree; + MbufsRxUsed = 0; + memset(&mbuf_stats, 0, sizeof(mbuf_stats_t)); + + for ( i=0;i<( int32)MbufsFree;i++ ) + { + *MbufQHead = ( void * ) ( ( uchar8 *)pMbufPool + i * ( temp32 )); + MbufQHead++; + } + pMbufQBot = --MbufQHead; /* set bottom of queue ptr */ + MbufQHead = pMbufQTop; /* reset head ptr to top */ + + + return( SUCCESS); +} diff --git a/src/sonic-pac/fpinfra/sysapi/sysapi_hpc.c b/src/sonic-pac/fpinfra/sysapi/sysapi_hpc.c new file mode 100644 index 000000000000..1401c9662f38 --- /dev/null +++ b/src/sonic-pac/fpinfra/sysapi/sysapi_hpc.c @@ -0,0 +1,45 @@ +/* + * Copyright 2024 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "pacinfra_common.h" + +typedef struct +{ + IANA_INTF_TYPE_t type; + PORT_SPEEDS_t defaultSpeed; + uint64 phyCapabilities; /* combination of all applicable PHY_CAPABILITIES_t */ + /* CONNECTOR_TYPES_t connectorType;*/ + fec_mode_t defaultFEC; + uint32 fecCapabilities; /* combination of all applicable FEC_CAPABILITY_t */ +} SYSAPI_HPC_PORT_DESCRIPTOR_t; + +/************************************************************************** +* +* @purpose Return the number of physical ports, given a slot number. +* +* @param slotNum slot number for requested card ID. +* +* @returns portCount Number of physical ports in slot number +* +* @notes +* +* @end +* +*************************************************************************/ +uint32 sysapiHpcPhysPortsInSlotGet(int slotNum) +{ + return 255; //needs to work on it +} diff --git a/src/sonic-pac/fpinfra/sysapi/sysapi_if_net.c b/src/sonic-pac/fpinfra/sysapi/sysapi_if_net.c new file mode 100644 index 000000000000..778184fa11a7 --- /dev/null +++ b/src/sonic-pac/fpinfra/sysapi/sysapi_if_net.c @@ -0,0 +1,389 @@ +/* + * Copyright 2024 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#include +#include "pacinfra_common.h" +#include "product.h" +#include "resources.h" +#include "osapi.h" +#include "sysapi.h" +#include "system_exports.h" +#include "log.h" + +/************************************* +* Mbuf Queue declarations +*************************************/ +extern void **pMbufQTop; /* top of queue */ +extern void **pMbufQBot; /* bottom of queue */ +extern void **MbufQHead; +extern void **MbufQTail; +extern uint32 MbufsFree; +extern uint32 MbufsRxUsed; +extern uint32 MbufsMaxFree; +extern void *pMbufPool; + +mbuf_stats_t mbuf_stats; + +#define __USE_GNU +#include +#include +static pthread_mutex_t sysapiMbufMutex = PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP; +#undef __USE_GNU +#define SYSAPI_MBUF_LOCK() pthread_mutex_lock(&sysapiMbufMutex) +#define SYSAPI_MBUF_UNLOCK() pthread_mutex_unlock(&sysapiMbufMutex) + +/************************************************************************** +* @purpose Function used to track the Mbuf with the file name and the line num. +* This can be used by the individual components for further tracking of Mbuf. +* +* @param netMbufHandle - Ptr to network mbuf handle +* @param file - file name +* @param line - line number +* +* @returns void +* +* @comments +* +* @end +*************************************************************************/ +void sysapiNetMbufTrack( netBufHandle netMbufHandle, uchar8 *file, uint32 line) +{ + SYSAPI_NET_MBUF_HEADER_t *bufHandle = (SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle; + + osapiStrncpySafe(bufHandle->last_file, file, sizeof(bufHandle->last_file)); + bufHandle->last_line = line; +} + + +/************************************************************************** +* +* @purpose Retrieve a network mbuf to the caller (and track the caller) +* +* @param none. +* +* @returns A ptr to a network mbuf handle +* @returns 0 if none are available +* +* @notes Delegates to sysapiNetMbufGet +* +* @end +* +*************************************************************************/ + netBufHandle sysapiNetMbufGetTrack(const char8 *file, uint32 line) +{ + SYSAPI_NET_MBUF_HEADER_t *netMbufHandle = 0; + + /* get the MBUF */ + netMbufHandle = (SYSAPI_NET_MBUF_HEADER_t *)sysapiNetMbufGet(); + + /* store tracking information */ + if(netMbufHandle) + { + osapiStrncpySafe(netMbufHandle->last_file, file, sizeof(netMbufHandle->last_file)); + netMbufHandle->last_line = line; + netMbufHandle->mbufLoc = MBUF_LOC_ALLOC; + + } + + return(( netBufHandle)netMbufHandle); +} + + +/************************************************************************** +* @purpose Retrieve an mbuf to the caller +* +* @param none. +* +* @returns A ptr to an mbuf +* @returns NULL if none are available +* +* @comments Use the Mutex semaphore to inhibit global variable corruption +* +* @end +*************************************************************************/ +static uint32 *sysapiMbufGet( void ) +{ + void * buffer; + uint32 mbufUsed = 0; + + if ( MbufsFree != 0 ) + { + buffer = *MbufQHead; + if ( MbufQHead >= pMbufQBot ) + MbufQHead = pMbufQTop; /* wrap the Q head ptr */ + else + MbufQHead++; /* move the Q head ptr */ + MbufsFree--; /* keep track... */ + + ((SYSAPI_NET_MBUF_HEADER_t *)buffer)->in_use = TRUE; + } + else + { + buffer = NULL; + } + + mbufUsed = MbufsMaxFree - MbufsFree; + /* (void) sysapiMbufUsedNotify(mbufUsed); */ + + return( ( uint32 * )buffer ); +} + +/************************************************************************** +* @purpose Retrieve a network mbuf to the caller +* +* @param none. +* +* @returns A ptr to a network mbuf handle +* @returns 0 if none are available +* +* @comments +* +* @end +*************************************************************************/ + netBufHandle sysapiNetMbufGet( void ) +{ + SYSAPI_NET_MBUF_HEADER_t *netMbufHandle; + + SYSAPI_MBUF_LOCK(); + mbuf_stats.alloc_tx_alloc_attempts++; + + netMbufHandle = (SYSAPI_NET_MBUF_HEADER_t *)sysapiMbufGet(); + if (netMbufHandle != NULL) + { + netMbufHandle->bufStart = ( uchar8 *)netMbufHandle + sizeof(SYSAPI_NET_MBUF_HEADER_t) + + NET_MBUF_START_OFFSET; + + netMbufHandle->bufStart = ( char8 *)SYSAPI_BUF_ALIGN(netMbufHandle->bufStart, MBUF_ALIGN_BOUND); + + netMbufHandle->bufLength = 0; + netMbufHandle->taskId = osapiTaskIdSelf(); + netMbufHandle->timeStamp = osapiUpTimeRaw(); + netMbufHandle->rxBuffer = FALSE; + + /* wipe out tracking information */ + netMbufHandle->last_file[0] = 0; + netMbufHandle->last_line = 0; + netMbufHandle->mbufLoc = MBUF_LOC_ALLOC; + } + else + { + mbuf_stats.alloc_tx_failures++; + } + + SYSAPI_MBUF_UNLOCK(); + + return(( netBufHandle)netMbufHandle); +} + + +/************************************************************************** +* @purpose Retrieve an aligned network mbuf to the caller +* +* @param align @b{(input)} Alignment indicator, for IP or frame +* +* @returns A ptr to a network mbuf handle +* @returns 0 if none are available +* +* @note All mbufs are 4 byte aligned +* +* @end +*************************************************************************/ + netBufHandle sysapiNetMbufAlignGet( uchar8 *file, uint32 line, + MBUF_ALIGNMENT alignType) +{ + SYSAPI_NET_MBUF_HEADER_t *netMbufHandle = 0; + + /* get the MBUF */ + netMbufHandle = (SYSAPI_NET_MBUF_HEADER_t *)sysapiNetMbufGet(); + + /* store tracking information */ + if(netMbufHandle) + { + if ( MBUF_IP_ALIGNED == alignType) + { + /* Compensate for ipheader offset */ + netMbufHandle->bufStart += MBUF_IP_CORRECTION; + } + osapiStrncpySafe(netMbufHandle->last_file, file, sizeof(netMbufHandle->last_file)); + netMbufHandle->last_line = line; + netMbufHandle->mbufLoc = MBUF_LOC_ALLOC; + } + + return(( netBufHandle)netMbufHandle); +} + +/************************************************************************** +* @purpose Free a network mbuf with debug information. +* +* @param Ptr to network mbuf handle +* +* @returns void +* +* @comments +* +* @end +*************************************************************************/ +void sysapiNetMbufFreeTrack( netBufHandle netMbufHandle, const char8 *file, uint32 line) +{ + SYSAPI_NET_MBUF_HEADER_t *header; +#if FEAT_CPUSTATS + uint32 headNext = NULL; + uint32 traceIndex = NULL; + uint32 currentStep = NULL; +#endif /* FEAT_CPUSTATS */ + + header = (SYSAPI_NET_MBUF_HEADER_t *) netMbufHandle; + + if (header->in_use == FALSE) + { + LOG_ERROR ((uint32) ((unsigned long) netMbufHandle)); + } + + osapiStrncpySafe(header->last_file, file, sizeof(header->last_file)); + header->last_line = line; + header->mbufLoc = MBUF_LOC_FREE; + + sysapiNetMbufFree (netMbufHandle); + +} + + +/************************************************************************** +* @purpose Return an mbuf to the mbuf pool +* +* @param *mbuf ptr to the mbuf to return +* +* @returns none. +* +* @comments Use the Mutex semaphore to inhibit global variable corruption +* +* @end +*************************************************************************/ +static void sysapiMbufFree( uint32 *mbuf ) +{ + uint32 mbufUsed = 0; + + + *MbufQTail = ( void * )mbuf; + if ( MbufQTail >= pMbufQBot ) + MbufQTail = pMbufQTop; /* wrap the Q tail ptr */ + else + MbufQTail++; /* move the Q tail ptr */ + + MbufsFree++; /* keep track... */ + + /* If we have extra buffers then somebody must have freed a buffer twice. + ** This is a fatal error. + */ + if (MbufsFree > MbufsMaxFree) + { + LOG_ERROR ((unsigned long) mbuf); + } + + mbufUsed = MbufsMaxFree - MbufsFree; + /*(void) sysapiMbufUsedNotify(mbufUsed);*/ + + + return; +} + +/************************************************************************** +* @purpose Free a network mbuf +* +* @param Ptr to network mbuf handle +* +* @returns void +* +* @comments +* +* @end +*************************************************************************/ +void sysapiNetMbufFree( netBufHandle netMbufHandle ) +{ + SYSAPI_MBUF_LOCK(); + if (netMbufHandle != NULL) + { + if (((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->in_use == TRUE) + { + sysapiMbufRxusedStatsUpdate(((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->priorityPool, + FALSE); + } + ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->bufStart = NULL; + ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->bufLength = 0; + ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->taskId = 0; + ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->timeStamp = 0; + ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->in_use = FALSE; + ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->mbufLoc = MBUF_LOC_FREE; + ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->priorityPool = MBUF_RX_PRIORITY_NULL; + ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->rxCode = MBUF_RX_REASON_NONE; + + if (((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->rxBuffer == TRUE) + { + ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->rxBuffer = FALSE; + + MbufsRxUsed--; + } + + sysapiMbufFree ((uint32 *)netMbufHandle); + } + SYSAPI_MBUF_UNLOCK(); +} + + +/********************************************************************** +* @pupose To increment or decrement Mbuf stats per RX priority as in +* MBUF_RX_PRIORITY +* +* @param priority @b{(input)} Mbuf priority to increment/decrement +* corresponding stats +* operation @b{(input)} Bool value to increment/decrement +* TRUE - to increment +* FALSE - to decrement +* +* @returns SUCCESS, +* +* @notes +* +* @end +* +*********************************************************************/ +RC_t sysapiMbufRxusedStatsUpdate( MBUF_RX_PRIORITY priority, + BOOL operation) +{ + switch(priority) + { + case MBUF_RX_PRIORITY_HIGH: + operation ? mbuf_stats.alloc_rx_high++ : mbuf_stats.alloc_rx_high--; + break; + case MBUF_RX_PRIORITY_MID0: + operation ? mbuf_stats.alloc_rx_mid0++ : mbuf_stats.alloc_rx_mid0--; + break; + case MBUF_RX_PRIORITY_MID1: + operation ? mbuf_stats.alloc_rx_mid1++ : mbuf_stats.alloc_rx_mid1--; + break; + case MBUF_RX_PRIORITY_MID2: + operation ? mbuf_stats.alloc_rx_mid2++ : mbuf_stats.alloc_rx_mid2--; + break; + case MBUF_RX_PRIORITY_NORMAL: + operation ? mbuf_stats.alloc_rx_norm++ : mbuf_stats.alloc_rx_norm--; + break; + default : + break; + } + return SUCCESS; +} + diff --git a/src/sonic-pac/mabmgr/Makefile.am b/src/sonic-pac/mabmgr/Makefile.am new file mode 100644 index 000000000000..019ef7986b45 --- /dev/null +++ b/src/sonic-pac/mabmgr/Makefile.am @@ -0,0 +1,16 @@ +INCLUDES = -I $(top_srcdir)/mab -I $(top_srcdir)/mab/common -I $(top_srcdir)/mab/mapping/include -I $(top_srcdir)/fpinfra/inc -I $(top_srcdir)/mab/mapping/mab_sid -I $(top_srcdir)/mab/protocol/include -I $(top_srcdir)/authmgr/common -I $(top_srcdir)/../wpasupplicant/sonic-wpa-supplicant/src/radius + +bin_PROGRAMS = mabd + +if DEBUG +DBGFLAGS = -ggdb -DDEBUG +else +DBGFLAGS = -g -DNDEBUG +endif + +mabd_SOURCES = $(top_srcdir)/mabmgr/mabmgr_main.cpp $(top_srcdir)/mabmgr/mabmgr.cpp + +mabd_CPPFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(SONIC_COMMON_CFLAGS) + +AM_LDFLAGS = -L$(top_srcdir)/fpinfra/ -lfpinfra +AM_LDFLAGS += -lswsscommon -lnl-3 -lnl-route-3 -lhiredis -L$(top_srcdir)/mab/ -lmab $(SONIC_COMMON_LDFLAGS) diff --git a/src/sonic-pac/mabmgr/mabmgr.cpp b/src/sonic-pac/mabmgr/mabmgr.cpp new file mode 100644 index 000000000000..8ec30672bab3 --- /dev/null +++ b/src/sonic-pac/mabmgr/mabmgr.cpp @@ -0,0 +1,549 @@ +/* + * Copyright 2019 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include "mabmgr.h" +#include "mab_api.h" +#include "mab_exports.h" +#include "mab_include.h" +#include "datatypes.h" +#include "nimapi.h" +#include +#include +#include "fpSonicUtils.h" + +#define MABD_CMD_BUFFSZ 2048 +MabMgr *mab; + +const string INTFS_PREFIX = "E"; + +MabMgr::MabMgr(DBConnector *configDb, DBConnector *stateDb, DBConnector *appDb) : + m_confMabPortTbl(configDb, "MAB_PORT_CONFIG_TABLE"), + m_confRadiusServerTable(configDb, "RADIUS_SERVER"), + m_confRadiusGlobalTable(configDb, "RADIUS") { + + Logger::linkToDbNative("mabmgr"); + mab = this; +} + +std::vector MabMgr::getSelectables() { + vector selectables{ &m_confMabPortTbl, &m_confRadiusServerTable, &m_confRadiusGlobalTable }; + return selectables; +} + + +bool MabMgr::processDbEvent(Selectable *tbl) { + + SWSS_LOG_DEBUG("Received a MAB Database event"); + + //check the source table and accordingly invoke the appropriate handlers + + if (tbl == ((Selectable *) & m_confMabPortTbl)) { + return processMabConfigPortTblEvent(tbl); + } + + if (tbl == ((Selectable *) & m_confRadiusServerTable)) { + return processRadiusServerTblEvent(tbl); + } + + if (tbl == ((Selectable *) & m_confRadiusGlobalTable)) { + return processRadiusGlobalTblEvent(tbl); + } + + SWSS_LOG_DEBUG("Received event UNKNOWN to MAB, ignoring "); + return false; +} + +//Process the config db table events + +bool MabMgr::processMabConfigPortTblEvent(Selectable *tbl) +{ + SWSS_LOG_ENTER(); + SWSS_LOG_DEBUG("Received a table config event on MAB_PORT_CONFIG_TABLE table"); + + std::deque entries; + m_confMabPortTbl.pops(entries); + + SWSS_LOG_DEBUG("Received %d entries", (int) entries.size()); + + /* Nothing popped */ + if (entries.empty()) + { + return false; + } + + // Check through all the data + for (auto entry : entries) + { + std::string key = kfvKey(entry); + std::string op = kfvOp(entry); + bool task_result = false; + uint32 intIfNum; + + SWSS_LOG_DEBUG("Received %s as key and %s as OP", key.c_str(), op.c_str()); + + if(key.find(INTFS_PREFIX) == string::npos) + { + SWSS_LOG_NOTICE("Invalid key format. No 'E' prefix: %s", key.c_str()); + continue; + } + + if(fpGetIntIfNumFromHostIfName(key.c_str(), &intIfNum) != SUCCESS) + { + SWSS_LOG_NOTICE("Unable to get the internal interface number for %s.", key.c_str()); + continue; + } + + if (op == SET_COMMAND) + { + task_result = doMabPortTableSetTask(entry, intIfNum); + } + else if (op == DEL_COMMAND) + { + task_result = doMabPortTableDeleteTask(entry, intIfNum); + } + if (!task_result) + return false; + } + return true; +} + +bool MabMgr::doMabPortTableSetTask(const KeyOpFieldsValuesTuple & t, uint32 & intIfNum) +{ + SWSS_LOG_ENTER(); + const std::string & key = kfvKey(t); + + // Update mabPortConfigCache cache with incoming table data + mabPortConfigCacheParams_t mabPortConfigCache; + mabPortConfigCache.mab_enable = MABMGR_MAB_PORT_ENABLE_DEF; + mabPortConfigCache.mab_auth_type = MABMGR_MAB_PORT_AUTH_TYPE_DEF; + + for (auto item = kfvFieldsValues(t).begin(); item != kfvFieldsValues(t).end(); item++) + { + const std::string & field = fvField(*item); + const std::string & value = fvValue(*item); + + if (field == "mab_enable") + { + if (value == "true") + mabPortConfigCache.mab_enable = ENABLE; + else if (value == "false") + mabPortConfigCache.mab_enable = DISABLE; + else { + SWSS_LOG_WARN("Invalid configuration option received for mab enable: %s", value.c_str()); + continue; + } + } + if (field == "mab_auth_type") + { + if (value == "pap") + mabPortConfigCache.mab_auth_type= AUTHMGR_PORT_MAB_AUTH_TYPE_PAP; + else if (value == "chap") + mabPortConfigCache.mab_auth_type = AUTHMGR_PORT_MAB_AUTH_TYPE_CHAP; + else if (value == "eap-md5") + mabPortConfigCache.mab_auth_type = AUTHMGR_PORT_MAB_AUTH_TYPE_EAP_MD5; + else { + SWSS_LOG_WARN("Invalid configuration option received for mab auth type: %s", value.c_str()); + continue; + } + } + } + + mabPortConfigTableMap::iterator iter = m_mabPortConfigMap.find(key); + if(iter == m_mabPortConfigMap.end()) + { + m_mabPortConfigMap.insert(pair(key, mabPortConfigCache)); + mabPortConfigTableMap::iterator iter = m_mabPortConfigMap.find(key); + + if(mabPortConfigCache.mab_enable != MABMGR_MAB_PORT_ENABLE_DEF) + { + if ( SUCCESS != mabPortMABEnableSet(intIfNum, mabPortConfigCache.mab_enable)) + { + iter->second.mab_enable = MABMGR_MAB_PORT_ENABLE_DEF; + SWSS_LOG_ERROR("Unable to enable MAB operationally."); + } + } + if(mabPortConfigCache.mab_auth_type != MABMGR_MAB_PORT_AUTH_TYPE_DEF) + { + if ( SUCCESS != mabPortMABAuthTypeSet(intIfNum, mabPortConfigCache.mab_auth_type)) + { + iter->second.mab_auth_type = MABMGR_MAB_PORT_AUTH_TYPE_DEF; + SWSS_LOG_ERROR("Unable to set MAB authentication type operationally."); + } + } + } + else //Interface entry already exists in local cache, check for any parameter change for Add/Update/Delete + { + // mab_enable + if (((iter->second.mab_enable == MABMGR_MAB_PORT_ENABLE_DEF) && + (mabPortConfigCache.mab_enable != MABMGR_MAB_PORT_ENABLE_DEF)) || + ((iter->second.mab_enable != MABMGR_MAB_PORT_ENABLE_DEF) && + (mabPortConfigCache.mab_enable != iter->second.mab_enable))) + { + if ( SUCCESS == mabPortMABEnableSet(intIfNum, mabPortConfigCache.mab_enable)) + { + iter->second.mab_enable = mabPortConfigCache.mab_enable; + } + else + { + SWSS_LOG_ERROR("Unable to enable/disable MAB operationally."); + return false; + } + } + // mab_auth_type + if (((iter->second.mab_auth_type == MABMGR_MAB_PORT_AUTH_TYPE_DEF) && + (mabPortConfigCache.mab_auth_type != MABMGR_MAB_PORT_AUTH_TYPE_DEF)) || + ((iter->second.mab_auth_type != MABMGR_MAB_PORT_AUTH_TYPE_DEF) && + (mabPortConfigCache.mab_auth_type != iter->second.mab_auth_type))) + { + if ( SUCCESS == mabPortMABAuthTypeSet(intIfNum, mabPortConfigCache.mab_auth_type)) + { + iter->second.mab_auth_type = mabPortConfigCache.mab_auth_type; + } + else + { + SWSS_LOG_ERROR("Unable to set MAB authentication type operationally."); + return false; + } + } + } + return true; +} + +bool MabMgr::doMabPortTableDeleteTask(const KeyOpFieldsValuesTuple & t, uint32 & intIfNum) +{ + SWSS_LOG_ENTER(); + const std::string & key = kfvKey(t); + mabPortConfigTableMap::iterator iter = m_mabPortConfigMap.find(key); + if(iter != m_mabPortConfigMap.end()) + { + if (iter->second.mab_enable != MABMGR_MAB_PORT_ENABLE_DEF) + { + if ( SUCCESS == mabPortMABEnableSet(intIfNum, MABMGR_MAB_PORT_ENABLE_DEF)) + { + iter->second.mab_enable = MABMGR_MAB_PORT_ENABLE_DEF; + } + else + { + SWSS_LOG_ERROR("Unable to set MAB enable with default."); + return false; + } + } + if (iter->second.mab_auth_type != MABMGR_MAB_PORT_AUTH_TYPE_DEF) + { + if ( SUCCESS == mabPortMABAuthTypeSet(intIfNum, MABMGR_MAB_PORT_AUTH_TYPE_DEF)) + { + iter->second.mab_auth_type = MABMGR_MAB_PORT_AUTH_TYPE_DEF; + } + else + { + SWSS_LOG_ERROR("Unable to set MAB authentication type with default."); + return false; + } + } + } + return true; +} + +void MabMgr::updateRadiusServerGlobalKey(string newKey, string oldKey) { + + SWSS_LOG_ENTER(); + bool update = false; + RC_t rc = FAILURE; + + if (0 == newKey.compare(oldKey)) + { + return; + } + + for (auto& item: m_radius_info.radius_auth_server_list) + { + /* server specific is configured */ + if (0 != item.second.server_key.size()) + { + continue; + } + + /* Check and update Radius server if using Global key */ + if (0 != newKey.size()) + { + item.second.server_update = true; + update = true; + } + else + { + rc = mabRadiusServerUpdate(RADIUS_MAB_SERVER_DELETE, "auth", + item.second.server_ip.c_str(), + item.second.server_priority.c_str(), + oldKey.c_str(), + item.second.server_port.c_str()); + if ( SUCCESS != rc) + { + SWSS_LOG_ERROR("Unable to update radius server details for MAB ip = %s, port = %s, priority = %s", + item.second.server_ip.c_str(), + item.second.server_port.c_str(), + item.second.server_priority.c_str()); + } + } + } + + /* Due to global key change update server needed */ + if (true == update) + { + updateRadiusServer(); + } +} + +void MabMgr::updateRadiusServer() { + + SWSS_LOG_ENTER(); + RC_t rc = FAILURE; + struct addrinfo* result; + char ip[INET6_ADDRSTRLEN+1]; + void * src = NULL; + + SWSS_LOG_NOTICE("Deriving new RADIUS Servers for MAB"); + + for (auto& item: m_radius_info.radius_auth_server_list) + { + if (false == item.second.server_update) + { + SWSS_LOG_INFO("skipped %s as update not needed.", item.first.c_str()); + continue; + } + + if (getaddrinfo(item.first.c_str(), NULL, NULL, &result) || result == NULL) + { + SWSS_LOG_WARN("skipped %s as it could not resolve.", item.first.c_str()); + item.second.dns_ok = false; + continue; + } + + if(result->ai_family == AF_INET) + src = &((struct sockaddr_in*)result->ai_addr)->sin_addr; + else + src = &((struct sockaddr_in6*)result->ai_addr)->sin6_addr; + + inet_ntop(result->ai_family, src, ip, INET6_ADDRSTRLEN+1); + freeaddrinfo(result); + + //Check if radius server has key configured. If not, + // pick global key. If key does not exist, skip to next server. + if ((item.second.server_key == "") && (m_radius_info.m_radiusGlobalKey == "")) + { + SWSS_LOG_WARN("skipped %s as no key is configured.", item.first.c_str()); + continue; + } + + string newKey = m_radius_info.m_radiusGlobalKey; + if (item.second.server_key != "") + { + newKey = item.second.server_key; + } + + string radiusIp(ip); + item.second.server_ip = radiusIp; + + rc = mabRadiusServerUpdate(RADIUS_MAB_SERVER_ADD, "auth", item.second.server_ip.c_str(), + item.second.server_priority.c_str(), + newKey.c_str(), + item.second.server_port.c_str()); + if ( SUCCESS != rc) + { + SWSS_LOG_ERROR("Radius server update - Unable to update radius server details for MAB."); + return; + } + SWSS_LOG_NOTICE("Updating radius details for MAB ip = %s, port = %s, priority = %s", + item.second.server_ip.c_str(), + item.second.server_port.c_str(), + item.second.server_priority.c_str()); + item.second.server_update = false; + item.second.dns_ok = true; + } + return; +} + +void MabMgr::reloadRadiusServers() +{ + SWSS_LOG_ENTER(); + RC_t rc = FAILURE; + bool server_update = false; + + SWSS_LOG_NOTICE("Reloading RADIUS Servers for MAB"); + + /*Check for servers that failed DNS resolution */ + for (auto& item: m_radius_info.radius_auth_server_list) + { + if (false == item.second.dns_ok) + { + item.second.server_update = true; + server_update = true; + } + } + + if (true == server_update) + { + SWSS_LOG_NOTICE("Reloading DNS failed RADIUS Servers for MAB"); + updateRadiusServer(); + } + + rc = mabRadiusServerUpdate(RADIUS_MAB_SERVERS_RELOAD, "auth", + NULL, NULL, NULL, NULL); + + if ( SUCCESS != rc) + { + SWSS_LOG_ERROR("RADIUS Servers reload - Unable to reload."); + } + + return; +} + +bool MabMgr::processRadiusServerTblEvent(Selectable *tbl) +{ + SWSS_LOG_ENTER(); + SWSS_LOG_NOTICE("Received a RADIUS_SERVER event"); + + deque entries; + m_confRadiusServerTable.pops(entries); + + SWSS_LOG_NOTICE("Received %d entries", (int) entries.size()); + + /* Nothing popped */ + if (entries.empty()) + { + return false; + } + + // Check through all the data + for (auto entry : entries) + { + string key = kfvKey(entry); + string val = kfvOp(entry); + string cmd(""); + + SWSS_LOG_NOTICE("Received %s as key and %s as OP", key.c_str(), val.c_str()); + + if (val == SET_COMMAND) + { + SWSS_LOG_NOTICE("SET operation on RADIUS_SERVER table"); + + m_radius_info.radius_auth_server_list[key].server_port = ""; + m_radius_info.radius_auth_server_list[key].server_key = ""; + m_radius_info.radius_auth_server_list[key].server_priority = ""; + m_radius_info.radius_auth_server_list[key].server_update = true; + m_radius_info.radius_auth_server_list[key].dns_ok = true; + + // Look at the data that is sent for this key + + for (auto i : kfvFieldsValues(entry)) + { + string a = fvField(i); + string b = fvValue(i); + + SWSS_LOG_DEBUG("Received %s as field and %s as value", a.c_str(), b.c_str()); + + if (a == "passkey") + { + m_radius_info.radius_auth_server_list[key].server_key = b; + } + else if (a == "auth_port") + { + m_radius_info.radius_auth_server_list[key].server_port = b; + } + else if (a == "priority") + { + m_radius_info.radius_auth_server_list[key].server_priority = b; + } + } + updateRadiusServer(); + } + else if (val == DEL_COMMAND) + { + RC_t rc = FAILURE; + SWSS_LOG_INFO("Delete Radius server for MAB %s ", + m_radius_info.radius_auth_server_list[key].server_ip.c_str()); + // server deleted + rc = mabRadiusServerUpdate(RADIUS_MAB_SERVER_DELETE, "auth", + m_radius_info.radius_auth_server_list[key].server_ip.c_str(), + m_radius_info.radius_auth_server_list[key].server_priority.c_str(), + m_radius_info.radius_auth_server_list[key].server_key.c_str(), + m_radius_info.radius_auth_server_list[key].server_port.c_str()); + if (rc != SUCCESS) + { + SWSS_LOG_ERROR("Radius server delete - Unable to delete radius server details for MAB."); + } + m_radius_info.radius_auth_server_list.erase(key); + } + } + + return true; +} + +bool MabMgr::processRadiusGlobalTblEvent(Selectable *tbl) +{ + SWSS_LOG_ENTER(); + SWSS_LOG_NOTICE("Received a RADIUS event"); + string tmp_radiusGlobalKey(m_radius_info.m_radiusGlobalKey); + + deque entries; + m_confRadiusGlobalTable.pops(entries); + + SWSS_LOG_NOTICE("Received %d entries", (int) entries.size()); + + /* Nothing popped */ + if (entries.empty()) + { + return false; + } + + // Check through all the data + for (auto entry : entries) + { + string key = kfvKey(entry); + string val = kfvOp(entry); + string cmd(""); + + SWSS_LOG_NOTICE("Received %s as key and %s as OP", key.c_str(), val.c_str()); + + if (val == SET_COMMAND) + { + SWSS_LOG_NOTICE("SET operation on RADIUS table"); + + // Look at the data that is sent for this key + for (auto i : kfvFieldsValues(entry)) + { + string a = fvField(i); + string b = fvValue(i); + + SWSS_LOG_DEBUG("Received %s as field and %s as value", a.c_str(), b.c_str()); + + if (a == "passkey") + { + m_radius_info.m_radiusGlobalKey = b; + } + } + } + else if (val == DEL_COMMAND) + { + m_radius_info.m_radiusGlobalKey = ""; + } + } + + updateRadiusServerGlobalKey(m_radius_info.m_radiusGlobalKey, tmp_radiusGlobalKey); + + return true; +} diff --git a/src/sonic-pac/mabmgr/mabmgr.h b/src/sonic-pac/mabmgr/mabmgr.h new file mode 100644 index 000000000000..17bbc4a226f3 --- /dev/null +++ b/src/sonic-pac/mabmgr/mabmgr.h @@ -0,0 +1,97 @@ +/* + * Copyright 2019 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef _MABMGR_H_ +#define _MABMGR_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "redisapi.h" +#include "auth_mgr_exports.h" +#include "mab_exports.h" + +typedef struct radius_server_info_s { + std::string server_port; + std::string server_key; + std::string server_ip; + std::string server_priority; + bool server_update; + bool dns_ok; +}radius_server_info_t; + +typedef std::map radius_server_info_map_t; + +typedef struct radius_info_s { + std::string m_radiusGlobalKey; + radius_server_info_map_t radius_auth_server_list; +}radius_info_t; + +#define MABMGR_MAB_PORT_ENABLE_DEF DISABLE +#define MABMGR_MAB_PORT_AUTH_TYPE_DEF AUTHMGR_PORT_MAB_AUTH_TYPE_EAP_MD5 + +/* MAB port config table param cache Info */ +typedef struct mabPortConfigCacheParams_t { + bool mab_enable; + AUTHMGR_PORT_MAB_AUTH_TYPE_t mab_auth_type; +} mabPortConfigCacheParams_t; + +/* MAP to store MAB port config table params, + * Key is "interface-id" (Eg. Ethernet0) + * Value is "mabPortConfigCacheParams_t" + */ +typedef std::map mabPortConfigTableMap; + +using namespace swss; +using namespace std; + +class MabMgr +{ +public: + MabMgr(DBConnector *configDb, DBConnector *stateDb, DBConnector *appDb); + std::vector getSelectables(); + bool processDbEvent(Selectable *source); + +private: + //tables this component listens to + SubscriberStateTable m_confMabPortTbl; + SubscriberStateTable m_confRadiusServerTable; + SubscriberStateTable m_confRadiusGlobalTable; + + radius_info_t m_radius_info; + mabPortConfigTableMap m_mabPortConfigMap; + + // DB Event handler functions + bool processMabConfigPortTblEvent(Selectable *tbl); + bool processRadiusServerTblEvent(Selectable *tbl); + bool processRadiusGlobalTblEvent(Selectable *tbl); + bool doMabPortTableSetTask(const KeyOpFieldsValuesTuple & t, uint32 & intIfNum); + bool doMabPortTableDeleteTask(const KeyOpFieldsValuesTuple & t, uint32 & intIfNum); + + void updateRadiusServer(); + void updateRadiusServerGlobalKey(std::string newKey, std::string oldKey); + void reloadRadiusServers() ; +}; + +#endif // _MABMGR_H_ diff --git a/src/sonic-pac/mabmgr/mabmgr_main.cpp b/src/sonic-pac/mabmgr/mabmgr_main.cpp new file mode 100644 index 000000000000..4172eaf9d875 --- /dev/null +++ b/src/sonic-pac/mabmgr/mabmgr_main.cpp @@ -0,0 +1,101 @@ +/* + * Copyright 2019 Broadcom Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include +#include +#include +#include "datatypes.h" +#include "osapi.h" +#include "mabmgr.h" +#include "mab_include.h" +#include +#include "fpinfra.h" + +int main(int argc, char *argv[]) +{ + cout<<"Invoking fpinfraInit" << endl; + fpinfraInit(); + + if (mabInit () != SUCCESS) + cout<<"Fail" << endl; + else + cout<<"Success linked" << endl; + + if (osapiWaitForTaskInit ( MAB_DB_TASK_SYNC, WAIT_FOREVER) != + SUCCESS) + { + return -1; + } + + cout<<"DB_TASK_SYNC Success" << endl; + + /* Set log level MSG_DEBUG to get hostapd logs for debugging purposes + * Use the below values from wpa_debug.h + * enum { MSG_EXCESSIVE, MSG_MSGDUMP, MSG_DEBUG, MSG_INFO, MSG_WARNING, MSG_ERROR }; + */ + // mab_radius_server_debug_level_set(2 /*MSG_DEBUG*/); + + try + { + SWSS_LOG_NOTICE("-----Starting MabMgr-----"); + sleep(20); + swss::DBConnector stateDb("STATE_DB", 0); + swss::DBConnector configDb("CONFIG_DB", 0); + swss::DBConnector appDb("APPL_DB", 0); + + MabMgr mab(&configDb, &stateDb, &appDb); + +#if 0 + // App Marking closest UP status + Table feat_tbl(&stateDb, STATE_FEATURE_TABLE_NAME); + std::vector attrs; + FieldValueTuple up_ready_status("UP_STATUS", "True"); + FieldValueTuple fail_reason("FAIL_REASON", ""); + char buffer[100]; + std::time_t rawtime; + struct tm *timeinfo; + time(&rawtime); + timeinfo = gmtime(&rawtime); + strftime(buffer, 100, "%Y-%m-%d %H:%M:%S", timeinfo); + FieldValueTuple time("TIME", string(buffer)); + attrs.push_back(up_ready_status); + attrs.push_back(fail_reason); + attrs.push_back(time); + feat_tbl.set("mabd", attrs); + SWSS_LOG_NOTICE("mabd marked its UP Status to True"); +#endif + //register for the table events + swss::Select s; + s.addSelectables(mab.getSelectables()); + + //wait for the events and process them + while (true) + { + SWSS_LOG_NOTICE("Waiting for MAB Table Events"); + + swss::Selectable *sel = NULL; + s.select(&sel); + + //Pass on the processing to the Mab Manager + mab.processDbEvent(sel); + } + + } + catch (const exception &e) + { + SWSS_LOG_ERROR("Runtime error: %s", e.what()); + } + return -1; +} diff --git a/src/sonic-platform-common b/src/sonic-platform-common index e55eebf00382..f07a6aa8ef19 160000 --- a/src/sonic-platform-common +++ b/src/sonic-platform-common @@ -1 +1 @@ -Subproject commit e55eebf00382642db43026bf39594da7b158dad2 +Subproject commit f07a6aa8ef19f1ea2043e6443f476ff8fdfc0fed diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons index b3189e32dcc0..ca812b0df105 160000 --- a/src/sonic-platform-daemons +++ b/src/sonic-platform-daemons @@ -1 +1 @@ -Subproject commit b3189e32dcc070c09bf575ed7366b6930c50d9ef +Subproject commit ca812b0df105ecb98b90f2b9ef6b7aa24592222b diff --git a/src/sonic-py-common/setup.py b/src/sonic-py-common/setup.py index 59e7bb0bf1df..d4ae68536414 100644 --- a/src/sonic-py-common/setup.py +++ b/src/sonic-py-common/setup.py @@ -8,7 +8,7 @@ sonic_dependencies = ['redis-dump-load'] dependencies = [ - 'natsort==6.2.1', # 6.2.1 is the last version which supports Python 2 + 'natsort', 'pyyaml', ] diff --git a/src/sonic-py-common/sonic_py_common/device_info.py b/src/sonic-py-common/sonic_py_common/device_info.py index a5f982130484..75e8dcb5761a 100644 --- a/src/sonic-py-common/sonic_py_common/device_info.py +++ b/src/sonic-py-common/sonic_py_common/device_info.py @@ -576,6 +576,22 @@ def is_chassis(): return is_voq_chassis() or is_packet_chassis() +def is_smartswitch(): + # Get platform + platform = get_platform() + if not platform: + return False + + # get platform.json file path + platform_json = os.path.join(HOST_DEVICE_PATH, platform, "platform.json") + try: + with open(platform_json, 'r') as f: + platform_cfg = json.loads(f.read()) + return "DPUS" in platform_cfg + except IOError: + return False + + def is_supervisor(): platform_env_conf_file_path = get_platform_env_conf_file_path() if platform_env_conf_file_path is None: diff --git a/src/sonic-sairedis b/src/sonic-sairedis index 45ff42c3ca00..d62ac0d57efb 160000 --- a/src/sonic-sairedis +++ b/src/sonic-sairedis @@ -1 +1 @@ -Subproject commit 45ff42c3ca002b4426f6dad1fe8fc132be9dece7 +Subproject commit d62ac0d57efbe3b1970dae697151adc335f3f702 diff --git a/src/sonic-snmpagent b/src/sonic-snmpagent index deb7b7c43c2e..c5301b2cf943 160000 --- a/src/sonic-snmpagent +++ b/src/sonic-snmpagent @@ -1 +1 @@ -Subproject commit deb7b7c43c2e9fa26acbac9907443b5d6f7310d2 +Subproject commit c5301b2cf94304deb8e09959d67af6a089155507 diff --git a/src/sonic-swss b/src/sonic-swss index 29cea04a0b98..90fceadf7565 160000 --- a/src/sonic-swss +++ b/src/sonic-swss @@ -1 +1 @@ -Subproject commit 29cea04a0b98cc440fd5730c758a9b73ac95362c +Subproject commit 90fceadf75654501e5fb2d9726344c6e0d0d0a86 diff --git a/src/sonic-swss-common b/src/sonic-swss-common index aba0f66dfe1c..352234ae773d 160000 --- a/src/sonic-swss-common +++ b/src/sonic-swss-common @@ -1 +1 @@ -Subproject commit aba0f66dfe1c77c6256cd6be6d2edeefa611efa4 +Subproject commit 352234ae773dc6010ea2fd3b3446ced48f33ee0a diff --git a/src/sonic-utilities b/src/sonic-utilities index 9a3f359ee8bd..4a6d12180763 160000 --- a/src/sonic-utilities +++ b/src/sonic-utilities @@ -1 +1 @@ -Subproject commit 9a3f359ee8bd4034b191506eb3a6dd203734cbfe +Subproject commit 4a6d12180763af3a62c8ae773f140737052d0011 diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md index 3c2401597cd3..4d264417d509 100644 --- a/src/sonic-yang-models/doc/Configuration.md +++ b/src/sonic-yang-models/doc/Configuration.md @@ -1197,7 +1197,9 @@ The FG_NHG_PREFIX table provides the FG_NHG_PREFIX for which FG behavior is desi "monErrThreshCrcCells": "1", "monErrThreshRxCells": "61035156", "monPollThreshIsolation": "1", - "monPollThreshRecovery": "8" + "monPollThreshRecovery": "8", + "monCapacityThreshWarn": "10", + "monState": "enable" } } } @@ -1211,12 +1213,14 @@ The FG_NHG_PREFIX table provides the FG_NHG_PREFIX for which FG behavior is desi "Fabric0": { "alias": "Fabric0", "isolateStatus": "False", - "lanes": "0" + "lanes": "0", + "forceUnisolateStatus": "0" }, "Fabric1": { "alias": "Fabric1", "isolateStatus": "False", - "lanes": "1" + "lanes": "1", + "forceUnisolateStatus": "0" } } } @@ -2690,20 +2694,41 @@ There are 4 classes } ``` +### SERIAL_CONSOLE + +In this table collected configuration of the next serial-console attributes: +- inactivity_timeout - Inactivity timeout for serial-console session, allowed values: 0-35000 (minutes), default value: 15 +- sysrq_capabilities - Enabling or disabling SysRq functionality for serial-console session, allowed values: enabled/disabled, default value disabled + +``` +{ + SERIAL_CONSOLE:{ + "POLICIES":{ + "inactivity_timeout": 15 + "sysrq_capabilities": "disabled" + } + } +} +``` + ### SSH_SERVER -In this table, we allow configuring ssh server global settings. This will feature includes 3 configurations: +In this table, we allow configuring ssh server global settings. This will feature includes 5 configurations: - authentication_retries - number of login attepmts 1-100 - login_timeout - Timeout in seconds for login session for user to connect 1-600 - ports - Ssh port numbers - string of port numbers seperated by ',' +- inactivity_timeout - Inactivity timeout for SSH session, allowed values: 0-35000 (min), default value: 15 (min) +- max_sessions - Max number of concurrent logins, allowed values: 0-100 (where 0 means no limit), default value: 0 ``` { "SSH_SERVER": { "POLICIES":{ "authentication_retries": "6", "login_timeout": "120", - "ports": "22" + "ports": "22", + "inactivity_timeout": "15", + "max_sessions": "0" } } } @@ -2846,7 +2871,7 @@ The MID_PLANE_BRIDGE" table introduces the configuration for the midplane bridge { "MID_PLANE_BRIDGE": { "GLOBAL" : { - "bridge": "bridge_midplane", + "bridge": "bridge-midplane", "ip_prefix": "169.254.200.254/24" } } diff --git a/src/sonic-yang-models/setup.py b/src/sonic-yang-models/setup.py index 6748bb137848..420dd36a24ca 100644 --- a/src/sonic-yang-models/setup.py +++ b/src/sonic-yang-models/setup.py @@ -203,6 +203,7 @@ def run(self): './yang-models/sonic-macsec.yang', './yang-models/sonic-bgp-sentinel.yang', './yang-models/sonic-bmp.yang', + './yang-models/sonic-serial-console.yang', './yang-models/sonic-smart-switch.yang',]), ('cvlyang-models', ['./cvlyang-models/sonic-acl.yang', './cvlyang-models/sonic-banner.yang', @@ -245,6 +246,7 @@ def run(self): './cvlyang-models/sonic-nat.yang', './cvlyang-models/sonic-nvgre-tunnel.yang', './cvlyang-models/sonic-pbh.yang', + './cvlyang-models/sonic-ssh-server.yang', './cvlyang-models/sonic-policer.yang', './cvlyang-models/sonic-port.yang', './cvlyang-models/sonic-portchannel.yang', @@ -280,6 +282,7 @@ def run(self): './cvlyang-models/sonic-system-port.yang', './cvlyang-models/sonic-macsec.yang', './cvlyang-models/sonic-bmp.yang', + './cvlyang-models/sonic-serial-console.yang', './cvlyang-models/sonic-bgp-sentinel.yang']), ], zip_safe=False, diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json index 05f64029b69a..d58849dd04eb 100644 --- a/src/sonic-yang-models/tests/files/sample_config_db.json +++ b/src/sonic-yang-models/tests/files/sample_config_db.json @@ -377,7 +377,8 @@ "timezone": "Europe/Kiev", "bgp_router_id": "8.8.8.8", "chassis_hostname": "str-sonic-chassis-1", - "slice_type": "AZNG_Production" + "slice_type": "AZNG_Production", + "nexthop_group": "disabled" } }, "VLAN": { @@ -590,7 +591,8 @@ "link_training": "off", "laser_freq": "191600", "tx_power": "-26.6", - "mode":"trunk" + "mode":"trunk", + "dhcp_rate_limit": "300" }, "Ethernet1": { "alias": "Eth1/2", @@ -608,7 +610,8 @@ "link_training": "on", "laser_freq": "191300", "tx_power": "-27.3", - "mode":"trunk" + "mode":"trunk", + "dhcp_rate_limit": "300" }, "Ethernet2": { "alias": "Eth1/3", @@ -626,7 +629,8 @@ "adv_interface_types": "all", "subport" : "0", "mode":"trunk", - "dom_polling":"enabled" + "dom_polling":"enabled", + "dhcp_rate_limit": "300" }, "Ethernet3": { "alias": "Eth1/4", @@ -636,7 +640,8 @@ "tpid": "0x88A8", "admin_status": "up", "subport": "1", - "mode":"trunk" + "mode":"trunk", + "dhcp_rate_limit": "300" }, "Ethernet4": { "alias": "Eth2/1", @@ -647,7 +652,8 @@ "admin_status": "up", "subport": "2", "mode":"trunk", - "dom_polling":"enabled" + "dom_polling":"enabled", + "dhcp_rate_limit": "300" }, "Ethernet5": { "alias": "Eth2/2", @@ -657,7 +663,8 @@ "tpid": "0x9200", "admin_status": "up", "subport": "3", - "mode":"trunk" + "mode":"trunk", + "dhcp_rate_limit": "300" }, "Ethernet6": { "alias": "Eth2/3", @@ -667,7 +674,8 @@ "tpid": "0x8100", "admin_status": "up", "subport": "4", - "mode":"trunk" + "mode":"trunk", + "dhcp_rate_limit": "300" }, "Ethernet7": { "alias": "Eth2/4", @@ -677,7 +685,8 @@ "tpid": "0x8100", "admin_status": "up", "subport": "5", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet8": { "alias": "Eth3/1", @@ -687,7 +696,8 @@ "tpid": "0x8100", "admin_status": "up", "subport": "6", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet9": { "alias": "Eth3/2", @@ -697,7 +707,8 @@ "tpid": "0x8100", "admin_status": "up", "subport": "7", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet10": { "alias": "Eth3/3", @@ -707,7 +718,8 @@ "tpid": "0x8100", "admin_status": "up", "subport": "8", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet11": { "alias": "Eth3/4", @@ -716,7 +728,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet12": { "alias": "Eth4/1", @@ -725,7 +738,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet13": { "alias": "Eth4/2", @@ -734,7 +748,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet14": { "alias": "Eth4/3", @@ -743,7 +758,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet15": { "alias": "Eth4/4", @@ -752,7 +768,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet16": { "alias": "Eth5/1", @@ -761,7 +778,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet17": { "alias": "Eth5/2", @@ -770,7 +788,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet18": { "alias": "Eth5/3", @@ -779,7 +798,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet19": { "alias": "Eth5/4", @@ -788,7 +808,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet20": { "alias": "Eth6/1", @@ -797,7 +818,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet21": { "alias": "Eth6/2", @@ -806,7 +828,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet22": { "alias": "Eth6/3", @@ -815,7 +838,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet23": { "alias": "Eth6/4", @@ -824,7 +848,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet24": { "alias": "Eth7/1", @@ -833,7 +858,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet25": { "alias": "Eth7/2", @@ -842,7 +868,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet26": { "alias": "Eth7/3", @@ -851,7 +878,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet27": { "alias": "Eth7/4", @@ -860,7 +888,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet28": { "alias": "Eth8/1", @@ -869,7 +898,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet29": { "alias": "Eth8/2", @@ -878,7 +908,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"trunk" + "mode":"trunk", + "dhcp_rate_limit": "300" }, "Ethernet30": { "alias": "Eth8/3", @@ -887,7 +918,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"trunk" + "mode":"trunk", + "dhcp_rate_limit": "300" }, "Ethernet31": { "alias": "Eth8/4", @@ -896,7 +928,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"trunk" + "mode":"trunk", + "dhcp_rate_limit": "300" }, "Ethernet32": { "alias": "Eth9/1", @@ -905,7 +938,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"trunk" + "mode":"trunk", + "dhcp_rate_limit": "300" }, "Ethernet33": { "alias": "Eth9/2", @@ -914,7 +948,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"trunk" + "mode":"trunk", + "dhcp_rate_limit": "300" }, "Ethernet34": { "alias": "Eth9/3", @@ -923,7 +958,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"trunk" + "mode":"trunk", + "dhcp_rate_limit": "300" }, "Ethernet35": { "alias": "Eth9/4", @@ -932,7 +968,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"trunk" + "mode":"trunk", + "dhcp_rate_limit": "300" }, "Ethernet36": { "alias": "Eth10/1", @@ -941,7 +978,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"trunk" + "mode":"trunk", + "dhcp_rate_limit": "300" }, "Ethernet112": { "alias": "Eth29/1", @@ -951,7 +989,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet120": { "alias": "Eth31/1", @@ -961,7 +1000,8 @@ "speed": "11100", "tpid": "0x8100", "admin_status": "up", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet-BP0": { "admin_status": "up", @@ -975,7 +1015,8 @@ "role": "Int", "speed": "40000", "tpid": "0x8100", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" }, "Ethernet-BP4": { "admin_status": "up", @@ -989,7 +1030,8 @@ "role": "Int", "speed": "40000", "tpid": "0x8100", - "mode":"routed" + "mode":"routed", + "dhcp_rate_limit": "300" } }, "LOGGER": { @@ -1386,19 +1428,23 @@ "monErrThreshCrcCells": "1", "monErrThreshRxCells": "61035156", "monPollThreshIsolation": "1", - "monPollThreshRecovery": "8" + "monPollThreshRecovery": "8", + "monCapacityThreshWarn": "10", + "monState": "enable" } }, "FABRIC_PORT": { "Fabric0": { "alias": "Fabric0", "isolateStatus": "False", - "lanes": "0" + "lanes": "0", + "forceUnisolateStatus": "0" }, "Fabric1": { "alias": "Fabric1", "isolateStatus": "False", - "lanes": "1" + "lanes": "1", + "forceUnisolateStatus": "0" } }, "FLEX_COUNTER_TABLE": { @@ -1442,6 +1488,10 @@ "TUNNEL": { "FLEX_COUNTER_STATUS": "enable", "POLL_INTERVAL": "10000" + }, + "ENI": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": "10000" } }, "FLOW_COUNTER_ROUTE_PATTERN": { @@ -2444,7 +2494,16 @@ "POLICIES":{ "authentication_retries": "6", "login_timeout": "120", - "ports": "22" + "ports": "22", + "inactivity_timeout": "15", + "max_sessions": "0" + } + }, + + "SERIAL_CONSOLE": { + "POLICIES":{ + "inactivity_timeout": "15", + "sysrq_capabilities": "disabled" } }, @@ -2673,7 +2732,7 @@ }, "MID_PLANE_BRIDGE": { "GLOBAL" : { - "bridge": "bridge_midplane", + "bridge": "bridge-midplane", "ip_prefix": "169.254.200.254/24" } }, diff --git a/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py b/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py index ccd0f312e676..f1242719c028 100644 --- a/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py +++ b/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py @@ -8,7 +8,7 @@ def test_valid_data(self, yang_model): "sonic-smart-switch:sonic-smart-switch": { "sonic-smart-switch:MID_PLANE_BRIDGE": { "GLOBAL": { - "bridge": "bridge_midplane", + "bridge": "bridge-midplane", "ip_prefix": "169.254.200.254/24" } }, @@ -31,8 +31,8 @@ def test_valid_data(self, yang_model): @pytest.mark.parametrize( "bridge_name, error_message", [ - ("bridge_midplane", None), - ("wrong_name", 'Value "wrong_name" does not satisfy the constraint "bridge_midplane"')] + ("bridge-midplane", None), + ("wrong_name", 'Value "wrong_name" does not satisfy the constraint "bridge-midplane"')] ) def test_bridge_name(self, yang_model, bridge_name, error_message): data = { @@ -58,7 +58,7 @@ def test_bridge_ip_prefix(self, yang_model, ip_prefix, error_message): "sonic-smart-switch:sonic-smart-switch": { "sonic-smart-switch:MID_PLANE_BRIDGE": { "GLOBAL": { - "bridge": "bridge_midplane", + "bridge": "bridge-midplane", "ip_prefix": ip_prefix } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json index 43100cf3a3ba..119e5b7cec44 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json @@ -135,6 +135,16 @@ "DEVICE_METADATA_ADVERTISE_LO_PREFIX_AS_128": { "desc": "Verifying advertising lo prefix as /128." }, + "DEVICE_METADATA_SUPPRESS_PENDING_FIB_ENABLED": { + "desc": "Enable bgp-suppress-fib-pending" + }, + "DEVICE_METADATA_SUPPRESS_PENDING_FIB_DISABLED": { + "desc": "Disable bgp-suppress-fib-pending" + }, + "DEVICE_METADATA_SUPPRESS_PENDING_FIB_ENABLED_SYNCHRONOUS_MODE_DISABLED": { + "desc": "Enable bgp-suppress-fib-pending when synchronous mode is disabled", + "eStr": ["ASIC synchronous mode must be enabled in order to enable suppress FIB pending feature"] + }, "DEVICE_METADATA_VALID_RACK_MGMT_MAP": { "desc": "Verifying rack_mgmt_map configuration." }, @@ -168,5 +178,8 @@ }, "DEVICE_METADATA_VALID_SLICE_TYPE": { "desc": "Verifying valid slice_type configuration." - } + }, + "DEVICE_METADATA_VALID_NEXTHOP_GROUP": { + "desc": "Verifying nexthop_group configuration." + } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/mirror_session.json b/src/sonic-yang-models/tests/yang_model_tests/tests/mirror_session.json index 0affa83c40a9..5bc6b54a0443 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/mirror_session.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/mirror_session.json @@ -60,7 +60,7 @@ }, "MIRROR_ERSPAN_ENTRY_WRONG_TTL": { "desc": "Configuring ERSPAN entry with invalid ttl", - "eStr": "Invalid TTL value" + "eStr": "Invalid ttl value" }, "MIRROR_ERSPAN_ENTRY_WRONG_TTL_TYPE": { "desc": "Configuring ERSPAN entry with invalid ttl", diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests/port.json index b35f9fd2231f..f53d19f42e63 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/port.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/port.json @@ -13,6 +13,10 @@ "eStrKey" : "Pattern", "eStr": ["rc"] }, + "PORT_VALID_DHCP_RATE_LIMIT": { + "desc": "PORT_VALID_DHCP_RATE_LIMIT no failure." + }, + "PORT_VALID_MTU_TEST_1": { "desc": "PORT_VALID_MTU_TEST_1 no failure." }, @@ -151,7 +155,27 @@ "eStrKey" : "InvalidValue", "eStr": ["dom_polling"] }, - "PORT_AUTO_FEC_TEST": { - "desc": "PORT_AUTO_FEC_TEST validate auto mode in fec." - } + "PORT_AUTO_FEC_TEST": { + "desc": "PORT_AUTO_FEC_TEST validate auto mode in fec." + }, + "PORT_NO_LANES_NEGATIVE_TEST": { + "desc": "PORT_NO_LANES_NEGATIVE_TEST no lanes.", + "eStrKey": "Mandatory", + "eStr": ["Missing"] + }, + "PORT_VOQ_CHASSIS_WITH_NO_LANES": { + "desc": "PORT_VOQ_CHASSIS_WITH_NO_LANES no failure." + }, + "PORT_PACKET_CHASSIS_WITH_NO_LANES": { + "desc": "PORT_PACKET_CHASSIS_WITH_NO_LANES no failure." + }, + "PORT_FABRIC_WITH_NO_LANES": { + "desc": "PORT_FABRIC_WITH_NO_LANES no failure." + }, + "PORT_VOQ_CHASSIS_WITH_LANES": { + "desc": "PORT_VOQ_CHASSIS_WITH_LANES no failure." + } + + + } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/serial_console.json b/src/sonic-yang-models/tests/yang_model_tests/tests/serial_console.json new file mode 100644 index 000000000000..76e39bb17944 --- /dev/null +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/serial_console.json @@ -0,0 +1,13 @@ +{ + "SERIAL_CONSOLE": { + "desc": "SERIAL_CONSOLE configuration in the Config DB table." + }, + "SERIAL_CONSOLE_INVALID_INACTIVITY_TIMEOUT": { + "desc": "SERIAL_CONSOLE attribute 'inactivity_timeout' set to invalid value (out of allowed range of [0, 35000] minutes).", + "eStr": "does not satisfy the constraint \"0..35000\"" + }, + "SERIAL_CONSOLE_INVALID_SYSRQ" : { + "desc": "SERIAL_CONSOLE attribute 'sysrq' set to invalid value", + "eStr": "Invalid value" + } +} diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/ssh-server.json b/src/sonic-yang-models/tests/yang_model_tests/tests/ssh-server.json index f3a1c30ef47a..e7bc0af10acb 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/ssh-server.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/ssh-server.json @@ -22,5 +22,13 @@ "SSH_SERVER_INVALID_PORTS_2": { "desc": "Configure invalid port value in SSH_SERVER.", "eStr": "Invalid port numbers value" + }, + "SSH_SERVER_INVALID_INACTIVITY_TIMEOUT": { + "desc": "Configure invalid inactivity_timeout value in SSH_SERVER.", + "eStr": "does not satisfy the constraint \"0..35000\"" + }, + "SSH_SERVER_INVALID_MAX_SESSIONS": { + "desc": "Configure invalid max_sessions value in SSH_SERVER.", + "eStr": "does not satisfy the constraint \"0..100\"" } -} \ No newline at end of file +} diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json index 4efaca82396f..5d0e0201b4ff 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json @@ -371,6 +371,36 @@ } } }, + "DEVICE_METADATA_SUPPRESS_PENDING_FIB_ENABLED": { + "sonic-device_metadata:sonic-device_metadata": { + "sonic-device_metadata:DEVICE_METADATA": { + "sonic-device_metadata:localhost": { + "synchronous_mode": "enable", + "suppress-fib-pending": "enabled" + } + } + } + }, + "DEVICE_METADATA_SUPPRESS_PENDING_FIB_DISABLED": { + "sonic-device_metadata:sonic-device_metadata": { + "sonic-device_metadata:DEVICE_METADATA": { + "sonic-device_metadata:localhost": { + "synchronous_mode": "disable", + "suppress-fib-pending": "disabled" + } + } + } + }, + "DEVICE_METADATA_SUPPRESS_PENDING_FIB_ENABLED_SYNCHRONOUS_MODE_DISABLED": { + "sonic-device_metadata:sonic-device_metadata": { + "sonic-device_metadata:DEVICE_METADATA": { + "sonic-device_metadata:localhost": { + "synchronous_mode": "disable", + "suppress-fib-pending": "enabled" + } + } + } + }, "DEVICE_METADATA_VALID_RACK_MGMT_MAP": { "sonic-device_metadata:sonic-device_metadata": { "sonic-device_metadata:DEVICE_METADATA": { @@ -460,5 +490,14 @@ } } } + }, + "DEVICE_METADATA_VALID_NEXTHOP_GROUP": { + "sonic-device_metadata:sonic-device_metadata": { + "sonic-device_metadata:DEVICE_METADATA": { + "sonic-device_metadata:localhost": { + "nexthop_group": "disabled" + } + } + } } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json index 9e0f6f686172..42e03c647227 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json @@ -3,7 +3,7 @@ "sonic-smart-switch:sonic-smart-switch": { "sonic-smart-switch:MID_PLANE_BRIDGE": { "GLOBAL": { - "bridge": "bridge_midplane", + "bridge": "bridge-midplane", "ip_prefix": "169.254.200.254/24" } } @@ -49,7 +49,7 @@ "state": "enabled" }, { - "name": "bridge_midplane", + "name": "bridge-midplane", "gateway": "169.254.200.254", "lease_time": 3600, "mode": "PORT", @@ -185,7 +185,7 @@ "sonic-smart-switch:sonic-smart-switch": { "sonic-smart-switch:MID_PLANE_BRIDGE": { "GLOBAL": { - "bridge": "bridge_midplane", + "bridge": "bridge-midplane", "ip_prefix": "169.254.200.254/24" } } @@ -194,7 +194,7 @@ "sonic-dhcp-server-ipv4:DHCP_SERVER_IPV4": { "DHCP_SERVER_IPV4_LIST": [ { - "name": "non_exist_bridge_midplane", + "name": "non_exist_bridge-midplane", "gateway": "192.168.0.1", "lease_time": 3600, "mode": "PORT", @@ -294,7 +294,7 @@ "sonic-smart-switch:sonic-smart-switch": { "sonic-smart-switch:MID_PLANE_BRIDGE": { "GLOBAL": { - "bridge": "bridge_midplane", + "bridge": "bridge-midplane", "ip_prefix": "169.254.200.254/24" } } @@ -303,7 +303,7 @@ "sonic-dhcp-server-ipv4:DHCP_SERVER_IPV4": { "DHCP_SERVER_IPV4_LIST": [ { - "name": "bridge_midplane", + "name": "bridge-midplane", "gateway": "169.254.200.254", "lease_time": 3600, "mode": "PORT", @@ -315,7 +315,7 @@ "sonic-dhcp-server-ipv4:DHCP_SERVER_IPV4_PORT": { "DHCP_SERVER_IPV4_PORT_LIST": [ { - "name": "bridge_midplane", + "name": "bridge-midplane", "port": "non_exit_dpu", "ips": [ "169.254.200.1" diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_monitor_data.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_monitor_data.json index ad71aabd9c4c..a7452bf326e4 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_monitor_data.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_monitor_data.json @@ -6,7 +6,9 @@ "monErrThreshCrcCells": "1", "monErrThreshRxCells": "61035156", "monPollThreshIsolation": "1", - "monPollThreshRecovery": "8" + "monPollThreshRecovery": "8", + "monCapacityThreshWarn": "10", + "monState": "enable" } } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_port.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_port.json index 278834826120..401607c92894 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_port.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_port.json @@ -7,7 +7,8 @@ "name": "Fabric0", "alias": "Fabric0", "isolateStatus": "False", - "lanes": "0" + "lanes": "0", + "forceUnisolateStatus": "0" } ] } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json index 73da6d21d2d9..60386bdd72ea 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json @@ -9,6 +9,10 @@ "DEBUG_COUNTER": { "FLEX_COUNTER_STATUS": "enable" }, + "ENI": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 10000 + }, "PFCWD": { "FLEX_COUNTER_STATUS": "enable" }, diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/mirror_session.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/mirror_session.json index 93a5afcdc76a..ac8293e88c12 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/mirror_session.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/mirror_session.json @@ -266,7 +266,7 @@ "src_ip": "10.1.1.1", "gre_type": "0x1234", "dscp": "10", - "ttl": "65" + "ttl": "256" } ] } @@ -283,7 +283,7 @@ "src_ip": "10.1.1.1", "gre_type": "0x1234", "dscp": "10", - "ttl": "63" + "ttl": "255" } ] } @@ -315,7 +315,7 @@ "src_ip": "10.1.1.1", "gre_type": "0x1234", "dscp": "10", - "ttl": "63", + "ttl": "255", "src_port": "Ethernet0" } ] @@ -343,7 +343,7 @@ "src_ip": "10.1.1.1", "gre_type": "0x1234", "dscp": "10", - "ttl": "63", + "ttl": "255", "src_port": "PortChannel5" } ] diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json index 37c5606c1c33..bd375b73717b 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json @@ -88,6 +88,52 @@ } } }, + + "PORT_VALID_DHCP_RATE_LIMIT": { + "sonic-port:sonic-port": { + "sonic-port:PORT": { + "PORT_LIST": [ + { + "name": "Ethernet0", + "alias": "etp1a", + "lanes": "60, 61", + "speed": 100000, + "subport": 1, + "mode":"trunk", + "dhcp_rate_limit": "301" + }, + { + "name": "Ethernet2", + "alias": "etp1b", + "lanes": "62, 63", + "speed": 100000, + "subport": 2, + "mode":"trunk", + "dhcp_rate_limit": "500" + }, + { + "name": "Ethernet4", + "alias": "etp1c", + "lanes": "64, 65", + "speed": 100000, + "subport": 3, + "mode":"trunk", + "dhcp_rate_limit": "100000" + }, + { + "name": "Ethernet6", + "alias": "etp1d", + "lanes": "66, 67", + "speed": 100000, + "subport": 4, + "mode":"trunk", + "dhcp_rate_limit": "400000" + } + ] + } + } + }, + "PORT_VALID_AUTONEG_TEST_1": { "sonic-port:sonic-port": { "sonic-port:PORT": { @@ -804,5 +850,107 @@ ] } } + }, + "PORT_NO_LANES_NEGATIVE_TEST": { + "sonic-port:sonic-port": { + "sonic-port:PORT": { + "PORT_LIST": [ + { + "name": "Ethernet0", + "alias": "etp1a", + "speed": 100000, + "role": "Ext" + } + ] + } + } + }, + "PORT_VOQ_CHASSIS_WITH_NO_LANES": { + "sonic-device_metadata:sonic-device_metadata": { + "sonic-device_metadata:DEVICE_METADATA": { + "sonic-device_metadata:localhost": { + "switch_type": "voq" + } + } + }, + "sonic-port:sonic-port": { + "sonic-port:PORT": { + "PORT_LIST": [ + { + "name": "Ethernet0", + "alias": "etp1a", + "speed": 100000, + "role": "Ext" + } + ] + } + } + }, + "PORT_VOQ_CHASSIS_WITH_LANES": { + "sonic-device_metadata:sonic-device_metadata": { + "sonic-device_metadata:DEVICE_METADATA": { + "sonic-device_metadata:localhost": { + "switch_type": "voq", + "asic_name": "asic0" + } + } + }, + "sonic-port:sonic-port": { + "sonic-port:PORT": { + "PORT_LIST": [ + { + "name": "Ethernet0", + "alias": "etp1a", + "speed": 100000, + "role": "Ext", + "lanes": "60, 61" + } + ] + } + } + }, + "PORT_PACKET_CHASSIS_WITH_NO_LANES": { + "sonic-device_metadata:sonic-device_metadata": { + "sonic-device_metadata:DEVICE_METADATA": { + "sonic-device_metadata:localhost": { + "switch_type": "chassis-packet" + } + } + }, + "sonic-port:sonic-port": { + "sonic-port:PORT": { + "PORT_LIST": [ + { + "name": "Ethernet0", + "alias": "etp1a", + "speed": 100000, + "role": "Ext" + + } + ] + } + } + }, + "PORT_FABRIC_WITH_NO_LANES": { + "sonic-device_metadata:sonic-device_metadata": { + "sonic-device_metadata:DEVICE_METADATA": { + "sonic-device_metadata:localhost": { + "switch_type": "fabric" + } + } + }, + "sonic-port:sonic-port": { + "sonic-port:PORT": { + "PORT_LIST": [ + { + "name": "Ethernet0", + "alias": "etp1a", + "speed": 100000, + "role": "Int" + + } + ] + } + } } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/serial_console.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/serial_console.json new file mode 100644 index 000000000000..34453ac63b51 --- /dev/null +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/serial_console.json @@ -0,0 +1,31 @@ +{ + "SERIAL_CONSOLE": { + "sonic-serial-console:sonic-serial-console": { + "sonic-serial-console:SERIAL_CONSOLE": { + "POLICIES": { + "inactivity_timeout": 900, + "sysrq_capabilities": "disabled" + } + } + } + }, + + "SERIAL_CONSOLE_INVALID_INACTIVITY_TIMEOUT": { + "sonic-serial-console:sonic-serial-console": { + "sonic-serial-console:SERIAL_CONSOLE": { + "POLICIES": { + "inactivity_timeout": -500 + } + } + } + }, + "SERIAL_CONSOLE_INVALID_SYSRQ" : { + "sonic-serial-console:sonic-serial-console": { + "sonic-serial-console:SERIAL_CONSOLE": { + "POLICIES": { + "sysrq_capabilities": "negative" + } + } + } + } +} diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/ssh-server.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/ssh-server.json index e0abc1a1320a..1780bab89582 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/ssh-server.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/ssh-server.json @@ -56,5 +56,23 @@ } } } + }, + "SSH_SERVER_INVALID_INACTIVITY_TIMEOUT": { + "sonic-ssh-server:sonic-ssh-server": { + "sonic-ssh-server:SSH_SERVER": { + "POLICIES":{ + "inactivity_timeout": 500000 + } + } + } + }, + "SSH_SERVER_INVALID_MAX_SESSIONS": { + "sonic-ssh-server:sonic-ssh-server": { + "sonic-ssh-server:SSH_SERVER": { + "POLICIES":{ + "max_sessions": 222 + } + } + } } -} \ No newline at end of file +} diff --git a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang index efa1d4c96a0a..c097da81a870 100644 --- a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang +++ b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang @@ -212,6 +212,18 @@ module sonic-device_metadata { By default SONiC advertises /128 subnet prefix in Loopback0 as /64 subnet route"; } + leaf suppress-fib-pending { + description "Enable BGP suppress FIB pending feature. BGP will wait for route FIB installation before announcing routes"; + type enumeration { + enum enabled; + enum disabled; + } + default disabled; + + must "((current() = 'disabled') or (current() = 'enabled' and ../synchronous_mode = 'enable'))" { + error-message "ASIC synchronous mode must be enabled in order to enable suppress FIB pending feature"; + } + } leaf rack_mgmt_map { type string { length 0..128 { @@ -253,6 +265,15 @@ module sonic-device_metadata { type string; } + leaf nexthop_group { + description "Enable or disable Nexthop Group feature. This value only takes effect during boot time."; + type enumeration { + enum enabled; + enum disabled; + } + default disabled; + } + } /* end of container localhost */ } diff --git a/src/sonic-yang-models/yang-models/sonic-fabric-monitor.yang b/src/sonic-yang-models/yang-models/sonic-fabric-monitor.yang index 0c0464ab965d..e9730496738b 100644 --- a/src/sonic-yang-models/yang-models/sonic-fabric-monitor.yang +++ b/src/sonic-yang-models/yang-models/sonic-fabric-monitor.yang @@ -5,6 +5,10 @@ module sonic-fabric-monitor{ namespace "http://github.com/sonic-net/sonic-fabric-monitor"; prefix fabric-monitor; + import sonic-types { + prefix stypes; + } + description "FABRIC_MONITOR yang Module for SONiC OS"; revision 2023-03-14 { @@ -32,17 +36,35 @@ module sonic-fabric-monitor{ } leaf monPollThreshIsolation { - type uint32; + type uint8 { + range 1..10; + } default 1; description "Consecutive polls with higher error rate for isolation."; } leaf monPollThreshRecovery { - type uint32; + type uint8 { + range 1..10; + } default 8; description "Consecutive polls with lesser error rate for inclusion."; } + leaf monCapacityThreshWarn { + type uint8 { + range 5..100; + } + default 10; + description "Percentage of up fabric links."; + } + + leaf monState { + description "Configuration to set fabric link monitoring state: enable/disable"; + type stypes:mode-status; + default disable; + } + } /* end of container FABRIC_MONITOR_DATA */ } /* end of container FABRIC_MONITOR */ diff --git a/src/sonic-yang-models/yang-models/sonic-fabric-port.yang b/src/sonic-yang-models/yang-models/sonic-fabric-port.yang index f2266507deef..92b384ab7a98 100644 --- a/src/sonic-yang-models/yang-models/sonic-fabric-port.yang +++ b/src/sonic-yang-models/yang-models/sonic-fabric-port.yang @@ -52,6 +52,12 @@ module sonic-fabric-port{ } } + leaf forceUnisolateStatus { + description "Force unisolate status of a fabric port"; + type uint32; + default 0; + } + } /* end of list FABRIC_PORT_LIST */ } /* end of container FABRIC_PORT */ diff --git a/src/sonic-yang-models/yang-models/sonic-flex_counter.yang b/src/sonic-yang-models/yang-models/sonic-flex_counter.yang index 90c75eadc60d..11e09f9f2a9f 100644 --- a/src/sonic-yang-models/yang-models/sonic-flex_counter.yang +++ b/src/sonic-yang-models/yang-models/sonic-flex_counter.yang @@ -68,6 +68,19 @@ module sonic-flex_counter { } } + container ENI { + /* ENI_STAT_COUNTER_FLEX_COUNTER_GROUP */ + leaf FLEX_COUNTER_STATUS { + type flex_status; + } + leaf FLEX_COUNTER_DELAY_STATUS { + type flex_delay_status; + } + leaf POLL_INTERVAL { + type poll_interval; + } + } + container PFCWD { /* PFC_WD_FLEX_COUNTER_GROUP */ leaf FLEX_COUNTER_STATUS { diff --git a/src/sonic-yang-models/yang-models/sonic-mirror-session.yang b/src/sonic-yang-models/yang-models/sonic-mirror-session.yang index b3e82f2d0c67..b0f695fbe9c5 100644 --- a/src/sonic-yang-models/yang-models/sonic-mirror-session.yang +++ b/src/sonic-yang-models/yang-models/sonic-mirror-session.yang @@ -125,7 +125,7 @@ module sonic-mirror-session { leaf ttl { when "current()/../type = 'ERSPAN'"; type uint8 { - range "0..63" { + range "0..255" { error-message "Invalid TTL value"; error-app-tag ttl-invalid; } diff --git a/src/sonic-yang-models/yang-models/sonic-port.yang b/src/sonic-yang-models/yang-models/sonic-port.yang index 459b6520847d..7d315626d5cf 100644 --- a/src/sonic-yang-models/yang-models/sonic-port.yang +++ b/src/sonic-yang-models/yang-models/sonic-port.yang @@ -13,6 +13,10 @@ module sonic-port{ prefix ext; } + import sonic-device_metadata { + prefix sdm; + } + import sonic-macsec { prefix macsec; } @@ -67,6 +71,12 @@ module sonic-port{ } leaf lanes { + when "not(not(/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:asic_name) and + ((/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type='voq') or + (/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type='chassis-packet') or + (/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type='fabric')))"; + + description "Number of hardware lanes for the port. This is mandatory for all devices except for chassis devices"; mandatory true; type string { length 1..128; @@ -91,6 +101,12 @@ module sonic-port{ } } + leaf dhcp_rate_limit { + description "DHCP DOS Mitigation Rate with default value 300"; + type uint32; + default 300; + } + leaf link_training { description "Port link training mode"; diff --git a/src/sonic-yang-models/yang-models/sonic-serial-console.yang b/src/sonic-yang-models/yang-models/sonic-serial-console.yang new file mode 100644 index 000000000000..378910e72f0b --- /dev/null +++ b/src/sonic-yang-models/yang-models/sonic-serial-console.yang @@ -0,0 +1,37 @@ +//filename: sonic-serial-console.yang +module sonic-serial-console { + yang-version 1.1; + namespace "http://github.com/Azure/sonic-serial-console"; + prefix cli-sessions; + import sonic-types { + prefix stypes; + } + description "SERIAL_CONSOLE YANG Module for SONiC-based OS"; + revision 2023-06-07 { + description "First Revision"; + } + container sonic-serial-console { + container SERIAL_CONSOLE { + description "SERIAL_CONSOLE part of config_db.json"; + container POLICIES { + leaf inactivity_timeout { + description "serial-console inactivity-timeout timer value in minutes"; + type int32 { + range "0..35000"; + } + default 15; + } + + leaf sysrq_capabilities { + type stypes:admin_mode; + description "managing SysRq capabilities"; + default disabled; + } + } + /* end of container POLICIES */ + } + /* end of container SERIAL_CONSOLE */ + } + /* end of top level container */ +} +/* end of module sonic-serial-console */ diff --git a/src/sonic-yang-models/yang-models/sonic-smart-switch.yang b/src/sonic-yang-models/yang-models/sonic-smart-switch.yang index fdd4deb17551..77880f0362c3 100644 --- a/src/sonic-yang-models/yang-models/sonic-smart-switch.yang +++ b/src/sonic-yang-models/yang-models/sonic-smart-switch.yang @@ -32,7 +32,7 @@ module sonic-smart-switch { container GLOBAL { leaf bridge { type string { - pattern "bridge_midplane"; + pattern "bridge-midplane"; } description "Name of the midplane bridge"; diff --git a/src/sonic-yang-models/yang-models/sonic-ssh-server.yang b/src/sonic-yang-models/yang-models/sonic-ssh-server.yang index a53fddac5bfc..fb17159eea94 100644 --- a/src/sonic-yang-models/yang-models/sonic-ssh-server.yang +++ b/src/sonic-yang-models/yang-models/sonic-ssh-server.yang @@ -11,6 +11,11 @@ module sonic-ssh-server { description "First Revision"; } + + revision 2023-06-07 { + description + "Introduce inactivity timeout and max syslogins options"; + } container sonic-ssh-server { container SSH_SERVER { @@ -40,6 +45,20 @@ module sonic-ssh-server { } } } + leaf inactivity_timeout { + description "inactivity timeout (in minutes), 0 means no timeout"; + default 15; + type uint32 { + range 0..35000; + } + } + leaf max_sessions { + description "limit of concurrent system logins, 0 means no limit"; + default 0; + type uint32 { + range 0..100; + } + } }/*container policies */ } /* container SSH_SERVER */ }/* container sonic-ssh-server */ diff --git a/src/wpasupplicant/sonic-wpa-supplicant b/src/wpasupplicant/sonic-wpa-supplicant index 3c7fd8e10d0e..6153c6d52b40 160000 --- a/src/wpasupplicant/sonic-wpa-supplicant +++ b/src/wpasupplicant/sonic-wpa-supplicant @@ -1 +1 @@ -Subproject commit 3c7fd8e10d0e675c3cc1376206a2276e4d8e16da +Subproject commit 6153c6d52b4056bf8b0860b343471c041cd38eea